Richard Barry
|
0773e6b805
|
Change to use interrupt priority definitions that use shifted values from 0 to 7, rather than the full numeric value.
|
17 years ago |
|
Richard Barry
|
e12614df23
|
Change to use interrupt priority definitions that use shifted values from 0 to 7, rather than the full numeric value.
|
17 years ago |
|
Richard Barry
|
b6690dfc9a
|
Switch from post increment to pre increment on values sent to queues. This allows the test to execute on systems where interrupt level critical sections cannot nest.
|
17 years ago |
|
Richard Barry
|
603ec6a42b
|
Change the force register from low to heigh.
|
17 years ago |
|
Richard Barry
|
799cccac42
|
Use the low force register.
|
17 years ago |
|
Richard Barry
|
130e2f2c0a
|
Prepare for V5.0.4 release.
|
17 years ago |
|
Richard Barry
|
1d0cf84e80
|
Change the default vector used for context switching.
|
17 years ago |
|
Richard Barry
|
36471ef3e8
|
Change init value for a variable that was generating compiler warnings on one of the more pedantic compilers.
|
17 years ago |
|
Richard Barry
|
c3a33e5e7c
|
Improve example code for xTaskCreate().
|
17 years ago |
|
Richard Barry
|
10edc1088a
|
Added extra compiler specific structure packing options.
|
17 years ago |
|
Richard Barry
|
aa2ffbfde5
|
Added extra compiler specific structure packing options.
|
17 years ago |
|
Richard Barry
|
d6ec78a568
|
Added extra compiler specific options.
|
17 years ago |
|
Richard Barry
|
ed240e58a1
|
Add assert required for linking.
|
17 years ago |
|
Richard Barry
|
9d1ab2c90b
|
Change default vector number to 16.
|
17 years ago |
|
Richard Barry
|
aa7485ab0f
|
BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
|
17 years ago |
|
Richard Barry
|
a91d3d8afe
|
Note to users only.
|
17 years ago |
|
Richard Barry
|
f8abff1e04
|
BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
|
17 years ago |
|
Richard Barry
|
3b34009b75
|
Tidy up.
|
17 years ago |
|
Richard Barry
|
223bd9c75f
|
BUG FIX: Changed
*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
to
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
|
17 years ago |
|
Richard Barry
|
8e264c901e
|
Added dummy header files to allow the Cortex uIP demo to compile.
|
17 years ago |
|
Richard Barry
|
172114c49f
|
Added a #error line to check that FreeRTOS.h is included before one of the subordinate header files.
|
17 years ago |
|
Richard Barry
|
cb12d3a973
|
Added CodeWarrior definitions.
|
17 years ago |
|
Richard Barry
|
0a8889d62b
|
Change comments only.
|
17 years ago |
|
Richard Barry
|
a36ef26b0c
|
Add bracket where appropriate.
|
17 years ago |
|
Richard Barry
|
8f33ce9c30
|
Use correct counter in reg test 2 task.
|
17 years ago |
|
Richard Barry
|
4c0c3038cc
|
Add cleaned up eclipse workspace.
|
17 years ago |
|
Richard Barry
|
049459af87
|
Add URL to configuration pages on FreeRTOS.org site.
|
17 years ago |
|
Richard Barry
|
5d83f61228
|
Documentation only.
|
17 years ago |
|
Richard Barry
|
54dbbc3cdf
|
Documentation only.
|
17 years ago |
|
Richard Barry
|
be92c862be
|
Minor mods only.
|
17 years ago |
|
Richard Barry
|
9c2512f54e
|
Permit no more than two simultaneous occurrences of interrupts adding everything to queues instead of tasks.
|
17 years ago |
|
Richard Barry
|
5116051604
|
Remove initialisation of xQueueRegistry.
|
17 years ago |
|
Richard Barry
|
e5d85bc87e
|
Correct version number.
|
17 years ago |
|
Richard Barry
|
aeea09e21e
|
Minor changes only.
|
17 years ago |
|
Richard Barry
|
6eec108bdd
|
Ensure a yield cannot be pended simultaneously with a critical section being entered.
|
17 years ago |
|
Richard Barry
|
d427489391
|
Tidy up.
|
17 years ago |
|
Richard Barry
|
513b1a25e0
|
Use internal RAM only.
|
17 years ago |
|
Richard Barry
|
a2bdba02ad
|
Tidy up.
|
17 years ago |
|
Richard Barry
|
0dffe8d801
|
Increase stack sizes as we now have interrupts nesting 3 deep.
|
17 years ago |
|
Richard Barry
|
cebb479b0a
|
Add lwIP V1.3 files.
|
17 years ago |
|
Richard Barry
|
bfdbfce22f
|
Add in interrupt nesting and chache support.
|
17 years ago |
|
Richard Barry
|
60da4247dd
|
Add interrupt nesting support, cache setup and reg test tasks.
|
17 years ago |
|
Richard Barry
|
a943ccd85a
|
Use internal RAM only for data.
|
17 years ago |
|
Richard Barry
|
adf9eb9fb0
|
Remove white space only.
|
17 years ago |
|
Richard Barry
|
f68aab980d
|
Interrupt nesting and cache support added.
|
17 years ago |
|
Richard Barry
|
53a8d172df
|
Com test now working.
|
17 years ago |
|
Richard Barry
|
3a8161372d
|
Add serial test code (not yet complete).
|
17 years ago |
|
Richard Barry
|
3ea597543a
|
Add ColdFire definitions.
|
17 years ago |
|
Richard Barry
|
431d1c009d
|
Update to allow interrupt nesting (not yet complete).
|
17 years ago |
|
Richard Barry
|
181889d6b1
|
Basic demo up and running.
|
17 years ago |