Update RX231 projects to blink the LED.
Richard Barry
10 years ago
parent
e5c8119b96
commit
b3f343fdae
@ -0,0 +1,203 @@
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/***********************************************************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
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* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
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* applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
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||||||
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* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
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||||||
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* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
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||||||
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* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
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||||||
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* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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||||||
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* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
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* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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*
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* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
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***********************************************************************************************************************/
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/***********************************************************************************************************************
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* File Name : r_cg_icu.c
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* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
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* Device(s) : R5F52318AxFP
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* Tool-Chain : CCRX
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* Description : This file implements device driver for ICU module.
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* Creation Date: 2015/08/17
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***********************************************************************************************************************/
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/***********************************************************************************************************************
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Pragma directive
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***********************************************************************************************************************/
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/* Start user code for pragma. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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/***********************************************************************************************************************
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Includes
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***********************************************************************************************************************/
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#include "r_cg_macrodriver.h"
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#include "r_cg_icu.h"
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/* Start user code for include. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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#include "r_cg_userdefine.h"
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/***********************************************************************************************************************
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Global variables and functions
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***********************************************************************************************************************/
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/* Start user code for global. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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/***********************************************************************************************************************
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* Function Name: R_ICU_Create
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* Description : This function initializes ICU module.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_ICU_Create(void)
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{
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/* Disable IRQ0~7 interrupts */
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ICU.IER[0x08].BYTE = _00_ICU_IRQ0_DISABLE | _00_ICU_IRQ1_DISABLE | _00_ICU_IRQ2_DISABLE | _00_ICU_IRQ3_DISABLE |
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_00_ICU_IRQ4_DISABLE | _00_ICU_IRQ5_DISABLE | _00_ICU_IRQ6_DISABLE | _00_ICU_IRQ7_DISABLE;
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/* Set IRQ settings */
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ICU.IRQCR[1].BYTE = _04_ICU_IRQ_EDGE_FALLING;
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ICU.IRQCR[4].BYTE = _04_ICU_IRQ_EDGE_FALLING;
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/* Set IRQ1 priority level */
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IPR(ICU,IRQ1) = _0F_ICU_PRIORITY_LEVEL15;
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/* Set IRQ4 priority level */
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IPR(ICU,IRQ4) = _0F_ICU_PRIORITY_LEVEL15;
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/* Set IRQ1 pin */
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MPC.P31PFS.BYTE = 0x40U;
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PORT3.PDR.BYTE &= 0xFDU;
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PORT3.PMR.BYTE &= 0xFDU;
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/* Set IRQ4 pin */
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MPC.P34PFS.BYTE = 0x40U;
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PORT3.PDR.BYTE &= 0xEFU;
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PORT3.PMR.BYTE &= 0xEFU;
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}
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/***********************************************************************************************************************
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* Function Name: R_ICU_IRQ1_Start
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* Description : This function enables IRQ1 interrupt.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_ICU_IRQ1_Start(void)
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{
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/* Enable IRQ1 interrupt */
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IEN(ICU,IRQ1) = 1U;
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}
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/***********************************************************************************************************************
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* Function Name: R_ICU_IRQ1_Stop
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* Description : This function disables IRQ1 interrupt.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_ICU_IRQ1_Stop(void)
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{
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/* Disable IRQ1 interrupt */
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IEN(ICU,IRQ1) = 0U;
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}
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/***********************************************************************************************************************
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* Function Name: R_ICU_IRQ4_Start
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* Description : This function enables IRQ4 interrupt.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_ICU_IRQ4_Start(void)
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{
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/* Enable IRQ4 interrupt */
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IEN(ICU,IRQ4) = 1U;
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}
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/***********************************************************************************************************************
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* Function Name: R_ICU_IRQ4_Stop
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* Description : This function disables IRQ4 interrupt.
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* Arguments : None
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* Return Value : None
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***********************************************************************************************************************/
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void R_ICU_IRQ4_Stop(void)
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{
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/* Disable IRQ4 interrupt */
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IEN(ICU,IRQ4) = 0U;
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}
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/* Start user code for adding. Do not edit comment generated here */
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/*******************************************************************************
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* Function Name: R_ICU_IRQIsFallingEdge
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* Description : This function returns 1 if the specified ICU_IRQ is set to
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* falling edge triggered, otherwise 0.
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* Arguments : uint8_t irq_no
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* Return Value : 1 if falling edge triggered, 0 if not
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*******************************************************************************/
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uint8_t R_ICU_IRQIsFallingEdge (const uint8_t irq_no)
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{
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uint8_t falling_edge_trig = 0x0;
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if (ICU.IRQCR[irq_no].BYTE & _04_ICU_IRQ_EDGE_FALLING)
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{
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falling_edge_trig = 1;
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}
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return falling_edge_trig;
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}
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/*******************************************************************************
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* End of function R_ICU_IRQIsFallingEdge
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*******************************************************************************/
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/*******************************************************************************
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* Function Name: R_ICU_IRQSetFallingEdge
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* Description : This function sets/clears the falling edge trigger for the
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* specified ICU_IRQ.
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* Arguments : uint8_t irq_no
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* uint8_t set_f_edge, 1 if setting falling edge triggered, 0 if
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* clearing
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* Return Value : None
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*******************************************************************************/
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void R_ICU_IRQSetFallingEdge (const uint8_t irq_no, const uint8_t set_f_edge)
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{
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if (1 == set_f_edge)
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{
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ICU.IRQCR[irq_no].BYTE |= _04_ICU_IRQ_EDGE_FALLING;
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}
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else
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{
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ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_04_ICU_IRQ_EDGE_FALLING;
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}
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}
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/******************************************************************************
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* End of function R_ICU_IRQSetFallingEdge
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*******************************************************************************/
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/*******************************************************************************
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* Function Name: R_ICU_IRQSetRisingEdge
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* Description : This function sets/clear the rising edge trigger for the
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* specified ICU_IRQ.
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* Arguments : uint8_t irq_no
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* uint8_t set_r_edge, 1 if setting rising edge triggered, 0 if
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* clearing
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* Return Value : None
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*******************************************************************************/
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void R_ICU_IRQSetRisingEdge (const uint8_t irq_no, const uint8_t set_r_edge)
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{
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if (1 == set_r_edge)
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{
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ICU.IRQCR[irq_no].BYTE |= _08_ICU_IRQ_EDGE_RISING;
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}
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else
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{
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ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_08_ICU_IRQ_EDGE_RISING;
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}
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}
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/******************************************************************************
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* End of function R_ICU_IRQSetRisingEdge
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*******************************************************************************/
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/* End user code. Do not edit comment generated here */
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@ -0,0 +1,185 @@
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/***********************************************************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
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* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
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* applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
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* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
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* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
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* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
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* following link:
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* http://www.renesas.com/disclaimer
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*
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* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
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***********************************************************************************************************************/
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/***********************************************************************************************************************
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* File Name : r_cg_icu.h
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* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
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* Device(s) : R5F52318AxFP
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* Tool-Chain : CCRX
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* Description : This file implements device driver for ICU module.
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* Creation Date: 2015/08/17
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***********************************************************************************************************************/
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#ifndef ICU_H
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#define ICU_H
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/***********************************************************************************************************************
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Macro definitions (Register bit)
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***********************************************************************************************************************/
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/*
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Interrupt Request Enable Register 08 (IER08)
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*/
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/*Interrupt Request Enable/Disable(IENn) */
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#define _00_ICU_IRQ0_DISABLE (0x00U) /* IRQ0 interrupt request is disabled */
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#define _01_ICU_IRQ0_ENABLE (0x01U) /* IRQ0 interrupt request is enabled */
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#define _00_ICU_IRQ1_DISABLE (0x00U) /* IRQ1 interrupt request is disabled */
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#define _02_ICU_IRQ1_ENABLE (0x02U) /* IRQ1 interrupt request is enabled */
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#define _00_ICU_IRQ2_DISABLE (0x00U) /* IRQ2 interrupt request is disabled */
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#define _04_ICU_IRQ2_ENABLE (0x04U) /* IRQ2 interrupt request is enabled */
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#define _00_ICU_IRQ3_DISABLE (0x00U) /* IRQ3 interrupt request is disabled */
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#define _08_ICU_IRQ3_ENABLE (0x08U) /* IRQ3 interrupt request is enabled */
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#define _00_ICU_IRQ4_DISABLE (0x00U) /* IRQ4 interrupt request is disabled */
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#define _10_ICU_IRQ4_ENABLE (0x10U) /* IRQ4 interrupt request is enabled */
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#define _00_ICU_IRQ5_DISABLE (0x00U) /* IRQ5 interrupt request is disabled */
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#define _20_ICU_IRQ5_ENABLE (0x20U) /* IRQ5 interrupt request is enabled */
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#define _00_ICU_IRQ6_DISABLE (0x00U) /* IRQ6 interrupt request is disabled */
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#define _40_ICU_IRQ6_ENABLE (0x40U) /* IRQ6 interrupt request is enabled */
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#define _00_ICU_IRQ7_DISABLE (0x00U) /* IRQ7 interrupt request is disabled */
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#define _80_ICU_IRQ7_ENABLE (0x80U) /* IRQ7 interrupt request is enabled */
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/*
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Interrupt Source Priority Register n (IPRn)
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*/
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/* Interrupt Priority Level Select (IPR[3:0]) */
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#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (interrupt disabled) */
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#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */
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#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */
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#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */
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#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */
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#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */
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#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */
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#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */
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#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */
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#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */
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#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */
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#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */
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#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */
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#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */
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#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */
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#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 (highest) */
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/*
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Fast Interrupt Set Register (FIR)
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*/
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/* Fast Interrupt Enable (FIEN) */
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#define _0000_ICU_FAST_INTERRUPT_DISABLE (0x0000U) /* Fast interrupt is disabled */
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#define _8000_ICU_FAST_INTERRUPT_ENABLE (0x8000U) /* Fast interrupt is enabled */
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/*
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IRQ Control Register i (IRQCRi) (i = 0 to 7)
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*/
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/* IRQ Detection Sense Select (IRQMD[1:0]) */
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#define _00_ICU_IRQ_EDGE_LOW_LEVEL (0x00U) /* Low level */
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#define _04_ICU_IRQ_EDGE_FALLING (0x04U) /* Falling edge */
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#define _08_ICU_IRQ_EDGE_RISING (0x08U) /* Rising edge */
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#define _0C_ICU_IRQ_EDGE_BOTH (0x0CU) /* Rising and falling edge */
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/*
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IRQ Pin Digital Filter Enable Register 0 (IRQFLTE0)
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*/
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/* Digital Filter Enable (FLTEN0n) */
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#define _00_ICU_IRQn_FILTER_DISABLE (0x00U) /* IRQn digital filter is disabled */
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#define _01_ICU_IRQ0_FILTER_ENABLE (0x01U) /* IRQ0 digital filter is enabled */
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#define _02_ICU_IRQ1_FILTER_ENABLE (0x02U) /* IRQ1 digital filter is enabled */
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#define _04_ICU_IRQ2_FILTER_ENABLE (0x04U) /* IRQ2 digital filter is enabled */
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#define _08_ICU_IRQ3_FILTER_ENABLE (0x08U) /* IRQ3 digital filter is enabled */
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#define _10_ICU_IRQ4_FILTER_ENABLE (0x10U) /* IRQ4 digital filter is enabled */
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#define _20_ICU_IRQ5_FILTER_ENABLE (0x20U) /* IRQ5 digital filter is enabled */
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#define _40_ICU_IRQ6_FILTER_ENABLE (0x40U) /* IRQ6 digital filter is enabled */
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#define _80_ICU_IRQ7_FILTER_ENABLE (0x80U) /* IRQ7 digital filter is enabled */
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/*
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IRQ Pin Digital Filter Setting Register 0 (IRQFLTC0)
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*/
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/* IRQn Digital Filter Sampling Clock (FCLKSELn) */
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#define _0000_ICU_IRQ0_FILTER_PCLK (0x0000U) /* IRQ0 sample clock is run at every PCLK cycle */
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#define _0001_ICU_IRQ0_FILTER_PCLK_8 (0x0001U) /* IRQ0 sample clock is run at every PCLK/8 cycle */
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#define _0002_ICU_IRQ0_FILTER_PCLK_32 (0x0002U) /* IRQ0 sample clock is run at every PCLK/32 cycle */
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#define _0003_ICU_IRQ0_FILTER_PCLK_64 (0x0003U) /* IRQ0 sample clock is run at every PCLK/64 cycle */
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#define _0000_ICU_IRQ1_FILTER_PCLK (0x0000U) /* IRQ1 sample clock is run at every PCLK cycle */
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#define _0004_ICU_IRQ1_FILTER_PCLK_8 (0x0004U) /* IRQ1 sample clock is run at every PCLK/8 cycle */
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#define _0008_ICU_IRQ1_FILTER_PCLK_32 (0x0008U) /* IRQ1 sample clock is run at every PCLK/32 cycle */
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#define _000C_ICU_IRQ1_FILTER_PCLK_64 (0x000CU) /* IRQ1 sample clock is run at every PCLK/64 cycle */
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#define _0000_ICU_IRQ2_FILTER_PCLK (0x0000U) /* IRQ2 sample clock is run at every PCLK cycle */
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||||||
|
#define _0010_ICU_IRQ2_FILTER_PCLK_8 (0x0010U) /* IRQ2 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0020_ICU_IRQ2_FILTER_PCLK_32 (0x0020U) /* IRQ2 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0030_ICU_IRQ2_FILTER_PCLK_64 (0x0030U) /* IRQ2 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ3_FILTER_PCLK (0x0000U) /* IRQ3 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0040_ICU_IRQ3_FILTER_PCLK_8 (0x0040U) /* IRQ3 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0080_ICU_IRQ3_FILTER_PCLK_32 (0x0080U) /* IRQ3 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _00C0_ICU_IRQ3_FILTER_PCLK_64 (0x00C0U) /* IRQ3 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ4_FILTER_PCLK (0x0000U) /* IRQ4 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0100_ICU_IRQ4_FILTER_PCLK_8 (0x0100U) /* IRQ4 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0200_ICU_IRQ4_FILTER_PCLK_32 (0x0200U) /* IRQ4 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0300_ICU_IRQ4_FILTER_PCLK_64 (0x0300U) /* IRQ4 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ5_FILTER_PCLK (0x0000U) /* IRQ5 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0400_ICU_IRQ5_FILTER_PCLK_8 (0x0400U) /* IRQ5 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0800_ICU_IRQ5_FILTER_PCLK_32 (0x0800U) /* IRQ5 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0C00_ICU_IRQ5_FILTER_PCLK_64 (0x0C00U) /* IRQ5 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ6_FILTER_PCLK (0x0000U) /* IRQ6 sample clock is run at every PCLK cycle */
|
||||||
|
#define _1000_ICU_IRQ6_FILTER_PCLK_8 (0x1000U) /* IRQ6 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _2000_ICU_IRQ6_FILTER_PCLK_32 (0x2000U) /* IRQ6 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _3000_ICU_IRQ6_FILTER_PCLK_64 (0x3000U) /* IRQ6 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ7_FILTER_PCLK (0x0000U) /* IRQ7 sample clock is run at every PCLK cycle */
|
||||||
|
#define _4000_ICU_IRQ7_FILTER_PCLK_8 (0x4000U) /* IRQ7 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _8000_ICU_IRQ7_FILTER_PCLK_32 (0x8000U) /* IRQ7 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _C000_ICU_IRQ7_FILTER_PCLK_64 (0xC000U) /* IRQ7 sample clock is run at every PCLK/64 cycle */
|
||||||
|
|
||||||
|
/*
|
||||||
|
NMI Pin Interrupt Control Register (NMICR)
|
||||||
|
*/
|
||||||
|
/* NMI Digital Filter Sampling Clock (NMIMD) */
|
||||||
|
#define _00_ICU_NMI_EDGE_FALLING (0x00U) /* Falling edge */
|
||||||
|
#define _08_ICU_NMI_EDGE_RISING (0x08U) /* Rising edge */
|
||||||
|
|
||||||
|
/*
|
||||||
|
NMI Pin Digital Filter Setting Register (NMIFLTC)
|
||||||
|
*/
|
||||||
|
/* NMI Digital Filter Sampling Clock (NFCLKSEL[1:0]) */
|
||||||
|
#define _00_ICU_NMI_FILTER_PCLK (0x00U) /* NMI sample clock is run at every PCLK cycle */
|
||||||
|
#define _01_ICU_NMI_FILTER_PCLK_8 (0x01U) /* NMI sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _02_ICU_NMI_FILTER_PCLK_32 (0x02U) /* NMI sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _03_ICU_NMI_FILTER_PCLK_64 (0x03U) /* NMI sample clock is run at every PCLK/64 cycle */
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_Create(void);
|
||||||
|
void R_ICU_IRQ1_Start(void);
|
||||||
|
void R_ICU_IRQ1_Stop(void);
|
||||||
|
void R_ICU_IRQ4_Start(void);
|
||||||
|
void R_ICU_IRQ4_Stop(void);
|
||||||
|
|
||||||
|
/* Start user code for function. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/* Function prototypes for detecting and setting the edge trigger of ICU_IRQ */
|
||||||
|
uint8_t R_ICU_IRQIsFallingEdge(const uint8_t irq_no);
|
||||||
|
void R_ICU_IRQSetFallingEdge(const uint8_t irq_no, const uint8_t set_f_edge);
|
||||||
|
void R_ICU_IRQSetRisingEdge(const uint8_t irq_no, const uint8_t set_r_edge);
|
||||||
|
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#endif
|
||||||
@ -0,0 +1,69 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_port.c
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for Port module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Pragma directive
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for pragma. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Includes
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#include "r_cg_macrodriver.h"
|
||||||
|
#include "r_cg_port.h"
|
||||||
|
/* Start user code for include. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#include "r_cg_userdefine.h"
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global variables and functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for global. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_PORT_Create
|
||||||
|
* Description : This function initializes the Port I/O.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_PORT_Create(void)
|
||||||
|
{
|
||||||
|
PORT1.PODR.BYTE = _80_Pm7_OUTPUT_1;
|
||||||
|
PORT3.PODR.BYTE = _08_Pm3_OUTPUT_1;
|
||||||
|
PORT5.PODR.BYTE = _01_Pm0_OUTPUT_1 | _02_Pm1_OUTPUT_1 | _04_Pm2_OUTPUT_1;
|
||||||
|
PORTE.PODR.BYTE = _08_Pm3_OUTPUT_1 | _80_Pm7_OUTPUT_1;
|
||||||
|
PORT1.PDR.BYTE = _80_Pm7_MODE_OUTPUT;
|
||||||
|
PORT3.PDR.BYTE = _08_Pm3_MODE_OUTPUT;
|
||||||
|
PORT5.PDR.BYTE = _01_Pm0_MODE_OUTPUT | _02_Pm1_MODE_OUTPUT | _04_Pm2_MODE_OUTPUT;
|
||||||
|
PORTE.PDR.BYTE = _08_Pm3_MODE_OUTPUT | _10_Pm4_MODE_OUTPUT | _80_Pm7_MODE_OUTPUT;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Start user code for adding. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
@ -0,0 +1,170 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_port.h
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for Port module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef PORT_H
|
||||||
|
#define PORT_H
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions (Register bit)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/*
|
||||||
|
Port Direction Register (PDR)
|
||||||
|
*/
|
||||||
|
/* Pmn Direction Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_MODE_NOT_USED (0x00U) /* Pm0 not used */
|
||||||
|
#define _00_Pm0_MODE_INPUT (0x00U) /* Pm0 as input */
|
||||||
|
#define _01_Pm0_MODE_OUTPUT (0x01U) /* Pm0 as output */
|
||||||
|
#define _00_Pm1_MODE_NOT_USED (0x00U) /* Pm1 not used */
|
||||||
|
#define _00_Pm1_MODE_INPUT (0x00U) /* Pm1 as input */
|
||||||
|
#define _02_Pm1_MODE_OUTPUT (0x02U) /* Pm1 as output */
|
||||||
|
#define _00_Pm2_MODE_NOT_USED (0x00U) /* Pm2 not used */
|
||||||
|
#define _00_Pm2_MODE_INPUT (0x00U) /* Pm2 as input */
|
||||||
|
#define _04_Pm2_MODE_OUTPUT (0x04U) /* Pm2 as output */
|
||||||
|
#define _00_Pm3_MODE_NOT_USED (0x00U) /* Pm3 not used */
|
||||||
|
#define _00_Pm3_MODE_INPUT (0x00U) /* Pm3 as input */
|
||||||
|
#define _08_Pm3_MODE_OUTPUT (0x08U) /* Pm3 as output */
|
||||||
|
#define _00_Pm4_MODE_NOT_USED (0x00U) /* Pm4 not used */
|
||||||
|
#define _00_Pm4_MODE_INPUT (0x00U) /* Pm4 as input */
|
||||||
|
#define _10_Pm4_MODE_OUTPUT (0x10U) /* Pm4 as output */
|
||||||
|
#define _00_Pm5_MODE_NOT_USED (0x00U) /* Pm5 not used */
|
||||||
|
#define _00_Pm5_MODE_INPUT (0x00U) /* Pm5 as input */
|
||||||
|
#define _20_Pm5_MODE_OUTPUT (0x20U) /* Pm5 as output */
|
||||||
|
#define _00_Pm6_MODE_NOT_USED (0x00U) /* Pm6 not used */
|
||||||
|
#define _00_Pm6_MODE_INPUT (0x00U) /* Pm6 as input */
|
||||||
|
#define _40_Pm6_MODE_OUTPUT (0x40U) /* Pm6 as output */
|
||||||
|
#define _00_Pm7_MODE_NOT_USED (0x00U) /* Pm7 not used */
|
||||||
|
#define _00_Pm7_MODE_INPUT (0x00U) /* Pm7 as input */
|
||||||
|
#define _80_Pm7_MODE_OUTPUT (0x80U) /* Pm7 as output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Port Output Data Register (PODR)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Data Store (B7 - B0) */
|
||||||
|
#define _00_Pm0_OUTPUT_0 (0x00U) /* output low at B0 */
|
||||||
|
#define _01_Pm0_OUTPUT_1 (0x01U) /* output high at B0 */
|
||||||
|
#define _00_Pm1_OUTPUT_0 (0x00U) /* output low at B1 */
|
||||||
|
#define _02_Pm1_OUTPUT_1 (0x02U) /* output high at B1 */
|
||||||
|
#define _00_Pm2_OUTPUT_0 (0x00U) /* output low at B2 */
|
||||||
|
#define _04_Pm2_OUTPUT_1 (0x04U) /* output high at B2 */
|
||||||
|
#define _00_Pm3_OUTPUT_0 (0x00U) /* output low at B3 */
|
||||||
|
#define _08_Pm3_OUTPUT_1 (0x08U) /* output high at B3 */
|
||||||
|
#define _00_Pm4_OUTPUT_0 (0x00U) /* output low at B4 */
|
||||||
|
#define _10_Pm4_OUTPUT_1 (0x10U) /* output high at B4 */
|
||||||
|
#define _00_Pm5_OUTPUT_0 (0x00U) /* output low at B5 */
|
||||||
|
#define _20_Pm5_OUTPUT_1 (0x20U) /* output high at B5 */
|
||||||
|
#define _00_Pm6_OUTPUT_0 (0x00U) /* output low at B6 */
|
||||||
|
#define _40_Pm6_OUTPUT_1 (0x40U) /* output high at B6 */
|
||||||
|
#define _00_Pm7_OUTPUT_0 (0x00U) /* output low at B7 */
|
||||||
|
#define _80_Pm7_OUTPUT_1 (0x80U) /* output high at B7 */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Open Drain Control Register 0 (ODR0)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Type Select (Pm0 to Pm3) */
|
||||||
|
#define _00_Pm0_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _01_Pm0_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm1_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _04_Pm1_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
|
||||||
|
#define _08_Pm1_PCH_OPEN_DRAIN (0x08U) /* PMOS open-drain output, for PE1 only*/
|
||||||
|
#define _00_Pm2_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _10_Pm2_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm3_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _40_Pm3_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Open Drain Control Register 1 (ODR1)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Type Select (Pm4 to Pm7) */
|
||||||
|
#define _00_Pm4_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _01_Pm4_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm5_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _04_Pm5_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm6_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _10_Pm6_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm7_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _40_Pm7_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pull-Up Control Register (PCR)
|
||||||
|
*/
|
||||||
|
/* Pmn Input Pull-Up Resistor Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_PULLUP_OFF (0x00U) /* Pm0 pull-up resistor not connected */
|
||||||
|
#define _01_Pm0_PULLUP_ON (0x01U) /* Pm0 pull-up resistor connected */
|
||||||
|
#define _00_Pm1_PULLUP_OFF (0x00U) /* Pm1 pull-up resistor not connected */
|
||||||
|
#define _02_Pm1_PULLUP_ON (0x02U) /* Pm1 pull-up resistor connected */
|
||||||
|
#define _00_Pm2_PULLUP_OFF (0x00U) /* Pm2 Pull-up resistor not connected */
|
||||||
|
#define _04_Pm2_PULLUP_ON (0x04U) /* Pm2 pull-up resistor connected */
|
||||||
|
#define _00_Pm3_PULLUP_OFF (0x00U) /* Pm3 pull-up resistor not connected */
|
||||||
|
#define _08_Pm3_PULLUP_ON (0x08U) /* Pm3 pull-up resistor connected */
|
||||||
|
#define _00_Pm4_PULLUP_OFF (0x00U) /* Pm4 pull-up resistor not connected */
|
||||||
|
#define _10_Pm4_PULLUP_ON (0x10U) /* Pm4 pull-up resistor connected */
|
||||||
|
#define _00_Pm5_PULLUP_OFF (0x00U) /* Pm5 pull-up resistor not connected */
|
||||||
|
#define _20_Pm5_PULLUP_ON (0x20U) /* Pm5 pull-up resistor connected */
|
||||||
|
#define _00_Pm6_PULLUP_OFF (0x00U) /* Pm6 pull-up resistor not connected */
|
||||||
|
#define _40_Pm6_PULLUP_ON (0x40U) /* Pm6 pull-up resistor connected */
|
||||||
|
#define _00_Pm7_PULLUP_OFF (0x00U) /* Pm7 pull-up resistor not connected */
|
||||||
|
#define _80_Pm7_PULLUP_ON (0x80U) /* Pm7 pull-up resistor connected */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Drive Capacity Control Register (DSCR)
|
||||||
|
*/
|
||||||
|
/* Pmn Drive Capacity Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_HIDRV_OFF (0x00U) /* Pm0 Normal drive output */
|
||||||
|
#define _01_Pm0_HIDRV_ON (0x01U) /* Pm0 High-drive output */
|
||||||
|
#define _00_Pm1_HIDRV_OFF (0x00U) /* Pm1 Normal drive output */
|
||||||
|
#define _02_Pm1_HIDRV_ON (0x02U) /* Pm1 High-drive output */
|
||||||
|
#define _00_Pm2_HIDRV_OFF (0x00U) /* Pm2 Normal drive output */
|
||||||
|
#define _04_Pm2_HIDRV_ON (0x04U) /* Pm2 High-drive output */
|
||||||
|
#define _00_Pm3_HIDRV_OFF (0x00U) /* Pm3 Normal drive output */
|
||||||
|
#define _08_Pm3_HIDRV_ON (0x08U) /* Pm3 High-drive output */
|
||||||
|
#define _00_Pm4_HIDRV_OFF (0x00U) /* Pm4 Normal drive output */
|
||||||
|
#define _10_Pm4_HIDRV_ON (0x10U) /* Pm4 High-drive output */
|
||||||
|
#define _00_Pm5_HIDRV_OFF (0x00U) /* Pm5 Normal drive output */
|
||||||
|
#define _20_Pm5_HIDRV_ON (0x20U) /* Pm5 High-drive output */
|
||||||
|
#define _00_Pm6_HIDRV_OFF (0x00U) /* Pm6 Normal drive output */
|
||||||
|
#define _40_Pm6_HIDRV_ON (0x40U) /* Pm6 High-drive output */
|
||||||
|
#define _00_Pm7_HIDRV_OFF (0x00U) /* Pm7 Normal drive output */
|
||||||
|
#define _80_Pm7_HIDRV_ON (0x80U) /* Pm7 High-drive output */
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_PORT_Create(void);
|
||||||
|
|
||||||
|
/* Start user code for function. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#endif
|
||||||
@ -0,0 +1,71 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
|
||||||
|
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||||
|
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
|
||||||
|
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
|
||||||
|
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
|
||||||
|
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
|
||||||
|
* this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : rskrx231def.h
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* H/W Platform : RSKRX231
|
||||||
|
* Description : Defines macros relating to the RSKRX231 user LEDs and switches
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/**********************************************************************************************************************
|
||||||
|
* History : DD.MM.YYYY Version Description
|
||||||
|
* : 01.06.2015 1.00 First Release
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef RSKRX231_H
|
||||||
|
#define RSKRX231_H
|
||||||
|
|
||||||
|
|
||||||
|
/* General Values */
|
||||||
|
#define LED_ON (0)
|
||||||
|
#define LED_OFF (1)
|
||||||
|
#define SET_BIT_HIGH (1)
|
||||||
|
#define SET_BIT_LOW (0)
|
||||||
|
#define SET_BYTE_HIGH (0xFF)
|
||||||
|
#define SET_BYTE_LOW (0x00)
|
||||||
|
|
||||||
|
/* Switches */
|
||||||
|
#define SW1 (PORT3.PIDR.BIT.B1)
|
||||||
|
#define SW2 (PORT3.PIDR.BIT.B4)
|
||||||
|
#define SW3 (PORT0.PIDR.BIT.B7)
|
||||||
|
|
||||||
|
/* LED port settings */
|
||||||
|
#define LED0 (PORT1.PODR.BIT.B7)
|
||||||
|
#define LED1 (PORT5.PODR.BIT.B0)
|
||||||
|
#define LED2 (PORT5.PODR.BIT.B1)
|
||||||
|
#define LED3 (PORT5.PODR.BIT.B2)
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Exported global variables
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Exported global functions (to be accessed by other files)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
@ -0,0 +1,203 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_icu.c
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for ICU module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Pragma directive
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for pragma. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Includes
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#include "r_cg_macrodriver.h"
|
||||||
|
#include "r_cg_icu.h"
|
||||||
|
/* Start user code for include. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#include "r_cg_userdefine.h"
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global variables and functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for global. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_ICU_Create
|
||||||
|
* Description : This function initializes ICU module.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_Create(void)
|
||||||
|
{
|
||||||
|
/* Disable IRQ0~7 interrupts */
|
||||||
|
ICU.IER[0x08].BYTE = _00_ICU_IRQ0_DISABLE | _00_ICU_IRQ1_DISABLE | _00_ICU_IRQ2_DISABLE | _00_ICU_IRQ3_DISABLE |
|
||||||
|
_00_ICU_IRQ4_DISABLE | _00_ICU_IRQ5_DISABLE | _00_ICU_IRQ6_DISABLE | _00_ICU_IRQ7_DISABLE;
|
||||||
|
|
||||||
|
/* Set IRQ settings */
|
||||||
|
ICU.IRQCR[1].BYTE = _04_ICU_IRQ_EDGE_FALLING;
|
||||||
|
ICU.IRQCR[4].BYTE = _04_ICU_IRQ_EDGE_FALLING;
|
||||||
|
|
||||||
|
/* Set IRQ1 priority level */
|
||||||
|
IPR(ICU,IRQ1) = _0F_ICU_PRIORITY_LEVEL15;
|
||||||
|
|
||||||
|
/* Set IRQ4 priority level */
|
||||||
|
IPR(ICU,IRQ4) = _0F_ICU_PRIORITY_LEVEL15;
|
||||||
|
|
||||||
|
/* Set IRQ1 pin */
|
||||||
|
MPC.P31PFS.BYTE = 0x40U;
|
||||||
|
PORT3.PDR.BYTE &= 0xFDU;
|
||||||
|
PORT3.PMR.BYTE &= 0xFDU;
|
||||||
|
|
||||||
|
/* Set IRQ4 pin */
|
||||||
|
MPC.P34PFS.BYTE = 0x40U;
|
||||||
|
PORT3.PDR.BYTE &= 0xEFU;
|
||||||
|
PORT3.PMR.BYTE &= 0xEFU;
|
||||||
|
}
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQ1_Start
|
||||||
|
* Description : This function enables IRQ1 interrupt.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_IRQ1_Start(void)
|
||||||
|
{
|
||||||
|
/* Enable IRQ1 interrupt */
|
||||||
|
IEN(ICU,IRQ1) = 1U;
|
||||||
|
}
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQ1_Stop
|
||||||
|
* Description : This function disables IRQ1 interrupt.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_IRQ1_Stop(void)
|
||||||
|
{
|
||||||
|
/* Disable IRQ1 interrupt */
|
||||||
|
IEN(ICU,IRQ1) = 0U;
|
||||||
|
}
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQ4_Start
|
||||||
|
* Description : This function enables IRQ4 interrupt.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_IRQ4_Start(void)
|
||||||
|
{
|
||||||
|
/* Enable IRQ4 interrupt */
|
||||||
|
IEN(ICU,IRQ4) = 1U;
|
||||||
|
}
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQ4_Stop
|
||||||
|
* Description : This function disables IRQ4 interrupt.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_IRQ4_Stop(void)
|
||||||
|
{
|
||||||
|
/* Disable IRQ4 interrupt */
|
||||||
|
IEN(ICU,IRQ4) = 0U;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Start user code for adding. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQIsFallingEdge
|
||||||
|
* Description : This function returns 1 if the specified ICU_IRQ is set to
|
||||||
|
* falling edge triggered, otherwise 0.
|
||||||
|
* Arguments : uint8_t irq_no
|
||||||
|
* Return Value : 1 if falling edge triggered, 0 if not
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t R_ICU_IRQIsFallingEdge (const uint8_t irq_no)
|
||||||
|
{
|
||||||
|
uint8_t falling_edge_trig = 0x0;
|
||||||
|
|
||||||
|
if (ICU.IRQCR[irq_no].BYTE & _04_ICU_IRQ_EDGE_FALLING)
|
||||||
|
{
|
||||||
|
falling_edge_trig = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
return falling_edge_trig;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* End of function R_ICU_IRQIsFallingEdge
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQSetFallingEdge
|
||||||
|
* Description : This function sets/clears the falling edge trigger for the
|
||||||
|
* specified ICU_IRQ.
|
||||||
|
* Arguments : uint8_t irq_no
|
||||||
|
* uint8_t set_f_edge, 1 if setting falling edge triggered, 0 if
|
||||||
|
* clearing
|
||||||
|
* Return Value : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void R_ICU_IRQSetFallingEdge (const uint8_t irq_no, const uint8_t set_f_edge)
|
||||||
|
{
|
||||||
|
if (1 == set_f_edge)
|
||||||
|
{
|
||||||
|
ICU.IRQCR[irq_no].BYTE |= _04_ICU_IRQ_EDGE_FALLING;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_04_ICU_IRQ_EDGE_FALLING;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* End of function R_ICU_IRQSetFallingEdge
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name: R_ICU_IRQSetRisingEdge
|
||||||
|
* Description : This function sets/clear the rising edge trigger for the
|
||||||
|
* specified ICU_IRQ.
|
||||||
|
* Arguments : uint8_t irq_no
|
||||||
|
* uint8_t set_r_edge, 1 if setting rising edge triggered, 0 if
|
||||||
|
* clearing
|
||||||
|
* Return Value : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void R_ICU_IRQSetRisingEdge (const uint8_t irq_no, const uint8_t set_r_edge)
|
||||||
|
{
|
||||||
|
if (1 == set_r_edge)
|
||||||
|
{
|
||||||
|
ICU.IRQCR[irq_no].BYTE |= _08_ICU_IRQ_EDGE_RISING;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
ICU.IRQCR[irq_no].BYTE &= (uint8_t) ~_08_ICU_IRQ_EDGE_RISING;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* End of function R_ICU_IRQSetRisingEdge
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
@ -0,0 +1,185 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_icu.h
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for ICU module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef ICU_H
|
||||||
|
#define ICU_H
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions (Register bit)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/*
|
||||||
|
Interrupt Request Enable Register 08 (IER08)
|
||||||
|
*/
|
||||||
|
/*Interrupt Request Enable/Disable(IENn) */
|
||||||
|
#define _00_ICU_IRQ0_DISABLE (0x00U) /* IRQ0 interrupt request is disabled */
|
||||||
|
#define _01_ICU_IRQ0_ENABLE (0x01U) /* IRQ0 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ1_DISABLE (0x00U) /* IRQ1 interrupt request is disabled */
|
||||||
|
#define _02_ICU_IRQ1_ENABLE (0x02U) /* IRQ1 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ2_DISABLE (0x00U) /* IRQ2 interrupt request is disabled */
|
||||||
|
#define _04_ICU_IRQ2_ENABLE (0x04U) /* IRQ2 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ3_DISABLE (0x00U) /* IRQ3 interrupt request is disabled */
|
||||||
|
#define _08_ICU_IRQ3_ENABLE (0x08U) /* IRQ3 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ4_DISABLE (0x00U) /* IRQ4 interrupt request is disabled */
|
||||||
|
#define _10_ICU_IRQ4_ENABLE (0x10U) /* IRQ4 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ5_DISABLE (0x00U) /* IRQ5 interrupt request is disabled */
|
||||||
|
#define _20_ICU_IRQ5_ENABLE (0x20U) /* IRQ5 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ6_DISABLE (0x00U) /* IRQ6 interrupt request is disabled */
|
||||||
|
#define _40_ICU_IRQ6_ENABLE (0x40U) /* IRQ6 interrupt request is enabled */
|
||||||
|
#define _00_ICU_IRQ7_DISABLE (0x00U) /* IRQ7 interrupt request is disabled */
|
||||||
|
#define _80_ICU_IRQ7_ENABLE (0x80U) /* IRQ7 interrupt request is enabled */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Interrupt Source Priority Register n (IPRn)
|
||||||
|
*/
|
||||||
|
/* Interrupt Priority Level Select (IPR[3:0]) */
|
||||||
|
#define _00_ICU_PRIORITY_LEVEL0 (0x00U) /* Level 0 (interrupt disabled) */
|
||||||
|
#define _01_ICU_PRIORITY_LEVEL1 (0x01U) /* Level 1 */
|
||||||
|
#define _02_ICU_PRIORITY_LEVEL2 (0x02U) /* Level 2 */
|
||||||
|
#define _03_ICU_PRIORITY_LEVEL3 (0x03U) /* Level 3 */
|
||||||
|
#define _04_ICU_PRIORITY_LEVEL4 (0x04U) /* Level 4 */
|
||||||
|
#define _05_ICU_PRIORITY_LEVEL5 (0x05U) /* Level 5 */
|
||||||
|
#define _06_ICU_PRIORITY_LEVEL6 (0x06U) /* Level 6 */
|
||||||
|
#define _07_ICU_PRIORITY_LEVEL7 (0x07U) /* Level 7 */
|
||||||
|
#define _08_ICU_PRIORITY_LEVEL8 (0x08U) /* Level 8 */
|
||||||
|
#define _09_ICU_PRIORITY_LEVEL9 (0x09U) /* Level 9 */
|
||||||
|
#define _0A_ICU_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */
|
||||||
|
#define _0B_ICU_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */
|
||||||
|
#define _0C_ICU_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */
|
||||||
|
#define _0D_ICU_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */
|
||||||
|
#define _0E_ICU_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */
|
||||||
|
#define _0F_ICU_PRIORITY_LEVEL15 (0x0FU) /* Level 15 (highest) */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Fast Interrupt Set Register (FIR)
|
||||||
|
*/
|
||||||
|
/* Fast Interrupt Enable (FIEN) */
|
||||||
|
#define _0000_ICU_FAST_INTERRUPT_DISABLE (0x0000U) /* Fast interrupt is disabled */
|
||||||
|
#define _8000_ICU_FAST_INTERRUPT_ENABLE (0x8000U) /* Fast interrupt is enabled */
|
||||||
|
|
||||||
|
/*
|
||||||
|
IRQ Control Register i (IRQCRi) (i = 0 to 7)
|
||||||
|
*/
|
||||||
|
/* IRQ Detection Sense Select (IRQMD[1:0]) */
|
||||||
|
#define _00_ICU_IRQ_EDGE_LOW_LEVEL (0x00U) /* Low level */
|
||||||
|
#define _04_ICU_IRQ_EDGE_FALLING (0x04U) /* Falling edge */
|
||||||
|
#define _08_ICU_IRQ_EDGE_RISING (0x08U) /* Rising edge */
|
||||||
|
#define _0C_ICU_IRQ_EDGE_BOTH (0x0CU) /* Rising and falling edge */
|
||||||
|
|
||||||
|
/*
|
||||||
|
IRQ Pin Digital Filter Enable Register 0 (IRQFLTE0)
|
||||||
|
*/
|
||||||
|
/* Digital Filter Enable (FLTEN0n) */
|
||||||
|
#define _00_ICU_IRQn_FILTER_DISABLE (0x00U) /* IRQn digital filter is disabled */
|
||||||
|
#define _01_ICU_IRQ0_FILTER_ENABLE (0x01U) /* IRQ0 digital filter is enabled */
|
||||||
|
#define _02_ICU_IRQ1_FILTER_ENABLE (0x02U) /* IRQ1 digital filter is enabled */
|
||||||
|
#define _04_ICU_IRQ2_FILTER_ENABLE (0x04U) /* IRQ2 digital filter is enabled */
|
||||||
|
#define _08_ICU_IRQ3_FILTER_ENABLE (0x08U) /* IRQ3 digital filter is enabled */
|
||||||
|
#define _10_ICU_IRQ4_FILTER_ENABLE (0x10U) /* IRQ4 digital filter is enabled */
|
||||||
|
#define _20_ICU_IRQ5_FILTER_ENABLE (0x20U) /* IRQ5 digital filter is enabled */
|
||||||
|
#define _40_ICU_IRQ6_FILTER_ENABLE (0x40U) /* IRQ6 digital filter is enabled */
|
||||||
|
#define _80_ICU_IRQ7_FILTER_ENABLE (0x80U) /* IRQ7 digital filter is enabled */
|
||||||
|
|
||||||
|
/*
|
||||||
|
IRQ Pin Digital Filter Setting Register 0 (IRQFLTC0)
|
||||||
|
*/
|
||||||
|
/* IRQn Digital Filter Sampling Clock (FCLKSELn) */
|
||||||
|
#define _0000_ICU_IRQ0_FILTER_PCLK (0x0000U) /* IRQ0 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0001_ICU_IRQ0_FILTER_PCLK_8 (0x0001U) /* IRQ0 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0002_ICU_IRQ0_FILTER_PCLK_32 (0x0002U) /* IRQ0 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0003_ICU_IRQ0_FILTER_PCLK_64 (0x0003U) /* IRQ0 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ1_FILTER_PCLK (0x0000U) /* IRQ1 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0004_ICU_IRQ1_FILTER_PCLK_8 (0x0004U) /* IRQ1 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0008_ICU_IRQ1_FILTER_PCLK_32 (0x0008U) /* IRQ1 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _000C_ICU_IRQ1_FILTER_PCLK_64 (0x000CU) /* IRQ1 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ2_FILTER_PCLK (0x0000U) /* IRQ2 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0010_ICU_IRQ2_FILTER_PCLK_8 (0x0010U) /* IRQ2 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0020_ICU_IRQ2_FILTER_PCLK_32 (0x0020U) /* IRQ2 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0030_ICU_IRQ2_FILTER_PCLK_64 (0x0030U) /* IRQ2 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ3_FILTER_PCLK (0x0000U) /* IRQ3 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0040_ICU_IRQ3_FILTER_PCLK_8 (0x0040U) /* IRQ3 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0080_ICU_IRQ3_FILTER_PCLK_32 (0x0080U) /* IRQ3 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _00C0_ICU_IRQ3_FILTER_PCLK_64 (0x00C0U) /* IRQ3 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ4_FILTER_PCLK (0x0000U) /* IRQ4 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0100_ICU_IRQ4_FILTER_PCLK_8 (0x0100U) /* IRQ4 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0200_ICU_IRQ4_FILTER_PCLK_32 (0x0200U) /* IRQ4 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0300_ICU_IRQ4_FILTER_PCLK_64 (0x0300U) /* IRQ4 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ5_FILTER_PCLK (0x0000U) /* IRQ5 sample clock is run at every PCLK cycle */
|
||||||
|
#define _0400_ICU_IRQ5_FILTER_PCLK_8 (0x0400U) /* IRQ5 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _0800_ICU_IRQ5_FILTER_PCLK_32 (0x0800U) /* IRQ5 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _0C00_ICU_IRQ5_FILTER_PCLK_64 (0x0C00U) /* IRQ5 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ6_FILTER_PCLK (0x0000U) /* IRQ6 sample clock is run at every PCLK cycle */
|
||||||
|
#define _1000_ICU_IRQ6_FILTER_PCLK_8 (0x1000U) /* IRQ6 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _2000_ICU_IRQ6_FILTER_PCLK_32 (0x2000U) /* IRQ6 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _3000_ICU_IRQ6_FILTER_PCLK_64 (0x3000U) /* IRQ6 sample clock is run at every PCLK/64 cycle */
|
||||||
|
#define _0000_ICU_IRQ7_FILTER_PCLK (0x0000U) /* IRQ7 sample clock is run at every PCLK cycle */
|
||||||
|
#define _4000_ICU_IRQ7_FILTER_PCLK_8 (0x4000U) /* IRQ7 sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _8000_ICU_IRQ7_FILTER_PCLK_32 (0x8000U) /* IRQ7 sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _C000_ICU_IRQ7_FILTER_PCLK_64 (0xC000U) /* IRQ7 sample clock is run at every PCLK/64 cycle */
|
||||||
|
|
||||||
|
/*
|
||||||
|
NMI Pin Interrupt Control Register (NMICR)
|
||||||
|
*/
|
||||||
|
/* NMI Digital Filter Sampling Clock (NMIMD) */
|
||||||
|
#define _00_ICU_NMI_EDGE_FALLING (0x00U) /* Falling edge */
|
||||||
|
#define _08_ICU_NMI_EDGE_RISING (0x08U) /* Rising edge */
|
||||||
|
|
||||||
|
/*
|
||||||
|
NMI Pin Digital Filter Setting Register (NMIFLTC)
|
||||||
|
*/
|
||||||
|
/* NMI Digital Filter Sampling Clock (NFCLKSEL[1:0]) */
|
||||||
|
#define _00_ICU_NMI_FILTER_PCLK (0x00U) /* NMI sample clock is run at every PCLK cycle */
|
||||||
|
#define _01_ICU_NMI_FILTER_PCLK_8 (0x01U) /* NMI sample clock is run at every PCLK/8 cycle */
|
||||||
|
#define _02_ICU_NMI_FILTER_PCLK_32 (0x02U) /* NMI sample clock is run at every PCLK/32 cycle */
|
||||||
|
#define _03_ICU_NMI_FILTER_PCLK_64 (0x03U) /* NMI sample clock is run at every PCLK/64 cycle */
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_ICU_Create(void);
|
||||||
|
void R_ICU_IRQ1_Start(void);
|
||||||
|
void R_ICU_IRQ1_Stop(void);
|
||||||
|
void R_ICU_IRQ4_Start(void);
|
||||||
|
void R_ICU_IRQ4_Stop(void);
|
||||||
|
|
||||||
|
/* Start user code for function. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/* Function prototypes for detecting and setting the edge trigger of ICU_IRQ */
|
||||||
|
uint8_t R_ICU_IRQIsFallingEdge(const uint8_t irq_no);
|
||||||
|
void R_ICU_IRQSetFallingEdge(const uint8_t irq_no, const uint8_t set_f_edge);
|
||||||
|
void R_ICU_IRQSetRisingEdge(const uint8_t irq_no, const uint8_t set_r_edge);
|
||||||
|
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#endif
|
||||||
@ -0,0 +1,72 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_interrupt_handlers.h
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : GCCRX
|
||||||
|
* Description : This file declares interrupt handlers.
|
||||||
|
* Creation Date: 23/09/2015
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef INTERRUPT_HANDLERS_H
|
||||||
|
#define INTERRUPT_HANDLERS_H
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions (Register bit)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/* Undefined */
|
||||||
|
void r_undefined_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* Access Exception */
|
||||||
|
void r_access_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* Privileged Instruction Exception */
|
||||||
|
void r_privileged_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* Floating Point Exception */
|
||||||
|
void r_floatingpoint_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* NMI */
|
||||||
|
void r_nmi_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* BRK */
|
||||||
|
void r_brk_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* Hardware Vectors */
|
||||||
|
void PowerON_Reset(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
/* Idle Vectors */
|
||||||
|
void r_undefined_exception(void) __attribute__ ((interrupt));
|
||||||
|
void r_reserved_exception(void) __attribute__ ((interrupt));
|
||||||
|
|
||||||
|
#endif
|
||||||
@ -0,0 +1,69 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_port.c
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for Port module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Pragma directive
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for pragma. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Includes
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#include "r_cg_macrodriver.h"
|
||||||
|
#include "r_cg_port.h"
|
||||||
|
/* Start user code for include. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#include "r_cg_userdefine.h"
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global variables and functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/* Start user code for global. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* Function Name: R_PORT_Create
|
||||||
|
* Description : This function initializes the Port I/O.
|
||||||
|
* Arguments : None
|
||||||
|
* Return Value : None
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_PORT_Create(void)
|
||||||
|
{
|
||||||
|
PORT1.PODR.BYTE = _80_Pm7_OUTPUT_1;
|
||||||
|
PORT3.PODR.BYTE = _08_Pm3_OUTPUT_1;
|
||||||
|
PORT5.PODR.BYTE = _01_Pm0_OUTPUT_1 | _02_Pm1_OUTPUT_1 | _04_Pm2_OUTPUT_1;
|
||||||
|
PORTE.PODR.BYTE = _08_Pm3_OUTPUT_1 | _80_Pm7_OUTPUT_1;
|
||||||
|
PORT1.PDR.BYTE = _80_Pm7_MODE_OUTPUT;
|
||||||
|
PORT3.PDR.BYTE = _08_Pm3_MODE_OUTPUT;
|
||||||
|
PORT5.PDR.BYTE = _01_Pm0_MODE_OUTPUT | _02_Pm1_MODE_OUTPUT | _04_Pm2_MODE_OUTPUT;
|
||||||
|
PORTE.PDR.BYTE = _08_Pm3_MODE_OUTPUT | _10_Pm4_MODE_OUTPUT | _80_Pm7_MODE_OUTPUT;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Start user code for adding. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
@ -0,0 +1,170 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||||
|
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||||
|
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||||
|
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||||
|
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||||
|
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : r_cg_port.h
|
||||||
|
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* Description : This file implements device driver for Port module.
|
||||||
|
* Creation Date: 2015/08/17
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef PORT_H
|
||||||
|
#define PORT_H
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions (Register bit)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/*
|
||||||
|
Port Direction Register (PDR)
|
||||||
|
*/
|
||||||
|
/* Pmn Direction Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_MODE_NOT_USED (0x00U) /* Pm0 not used */
|
||||||
|
#define _00_Pm0_MODE_INPUT (0x00U) /* Pm0 as input */
|
||||||
|
#define _01_Pm0_MODE_OUTPUT (0x01U) /* Pm0 as output */
|
||||||
|
#define _00_Pm1_MODE_NOT_USED (0x00U) /* Pm1 not used */
|
||||||
|
#define _00_Pm1_MODE_INPUT (0x00U) /* Pm1 as input */
|
||||||
|
#define _02_Pm1_MODE_OUTPUT (0x02U) /* Pm1 as output */
|
||||||
|
#define _00_Pm2_MODE_NOT_USED (0x00U) /* Pm2 not used */
|
||||||
|
#define _00_Pm2_MODE_INPUT (0x00U) /* Pm2 as input */
|
||||||
|
#define _04_Pm2_MODE_OUTPUT (0x04U) /* Pm2 as output */
|
||||||
|
#define _00_Pm3_MODE_NOT_USED (0x00U) /* Pm3 not used */
|
||||||
|
#define _00_Pm3_MODE_INPUT (0x00U) /* Pm3 as input */
|
||||||
|
#define _08_Pm3_MODE_OUTPUT (0x08U) /* Pm3 as output */
|
||||||
|
#define _00_Pm4_MODE_NOT_USED (0x00U) /* Pm4 not used */
|
||||||
|
#define _00_Pm4_MODE_INPUT (0x00U) /* Pm4 as input */
|
||||||
|
#define _10_Pm4_MODE_OUTPUT (0x10U) /* Pm4 as output */
|
||||||
|
#define _00_Pm5_MODE_NOT_USED (0x00U) /* Pm5 not used */
|
||||||
|
#define _00_Pm5_MODE_INPUT (0x00U) /* Pm5 as input */
|
||||||
|
#define _20_Pm5_MODE_OUTPUT (0x20U) /* Pm5 as output */
|
||||||
|
#define _00_Pm6_MODE_NOT_USED (0x00U) /* Pm6 not used */
|
||||||
|
#define _00_Pm6_MODE_INPUT (0x00U) /* Pm6 as input */
|
||||||
|
#define _40_Pm6_MODE_OUTPUT (0x40U) /* Pm6 as output */
|
||||||
|
#define _00_Pm7_MODE_NOT_USED (0x00U) /* Pm7 not used */
|
||||||
|
#define _00_Pm7_MODE_INPUT (0x00U) /* Pm7 as input */
|
||||||
|
#define _80_Pm7_MODE_OUTPUT (0x80U) /* Pm7 as output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Port Output Data Register (PODR)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Data Store (B7 - B0) */
|
||||||
|
#define _00_Pm0_OUTPUT_0 (0x00U) /* output low at B0 */
|
||||||
|
#define _01_Pm0_OUTPUT_1 (0x01U) /* output high at B0 */
|
||||||
|
#define _00_Pm1_OUTPUT_0 (0x00U) /* output low at B1 */
|
||||||
|
#define _02_Pm1_OUTPUT_1 (0x02U) /* output high at B1 */
|
||||||
|
#define _00_Pm2_OUTPUT_0 (0x00U) /* output low at B2 */
|
||||||
|
#define _04_Pm2_OUTPUT_1 (0x04U) /* output high at B2 */
|
||||||
|
#define _00_Pm3_OUTPUT_0 (0x00U) /* output low at B3 */
|
||||||
|
#define _08_Pm3_OUTPUT_1 (0x08U) /* output high at B3 */
|
||||||
|
#define _00_Pm4_OUTPUT_0 (0x00U) /* output low at B4 */
|
||||||
|
#define _10_Pm4_OUTPUT_1 (0x10U) /* output high at B4 */
|
||||||
|
#define _00_Pm5_OUTPUT_0 (0x00U) /* output low at B5 */
|
||||||
|
#define _20_Pm5_OUTPUT_1 (0x20U) /* output high at B5 */
|
||||||
|
#define _00_Pm6_OUTPUT_0 (0x00U) /* output low at B6 */
|
||||||
|
#define _40_Pm6_OUTPUT_1 (0x40U) /* output high at B6 */
|
||||||
|
#define _00_Pm7_OUTPUT_0 (0x00U) /* output low at B7 */
|
||||||
|
#define _80_Pm7_OUTPUT_1 (0x80U) /* output high at B7 */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Open Drain Control Register 0 (ODR0)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Type Select (Pm0 to Pm3) */
|
||||||
|
#define _00_Pm0_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _01_Pm0_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm1_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _04_Pm1_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
|
||||||
|
#define _08_Pm1_PCH_OPEN_DRAIN (0x08U) /* PMOS open-drain output, for PE1 only*/
|
||||||
|
#define _00_Pm2_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _10_Pm2_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm3_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _40_Pm3_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Open Drain Control Register 1 (ODR1)
|
||||||
|
*/
|
||||||
|
/* Pmn Output Type Select (Pm4 to Pm7) */
|
||||||
|
#define _00_Pm4_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _01_Pm4_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm5_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _04_Pm5_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm6_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _10_Pm6_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
|
||||||
|
#define _00_Pm7_CMOS_OUTPUT (0x00U) /* CMOS output */
|
||||||
|
#define _40_Pm7_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pull-Up Control Register (PCR)
|
||||||
|
*/
|
||||||
|
/* Pmn Input Pull-Up Resistor Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_PULLUP_OFF (0x00U) /* Pm0 pull-up resistor not connected */
|
||||||
|
#define _01_Pm0_PULLUP_ON (0x01U) /* Pm0 pull-up resistor connected */
|
||||||
|
#define _00_Pm1_PULLUP_OFF (0x00U) /* Pm1 pull-up resistor not connected */
|
||||||
|
#define _02_Pm1_PULLUP_ON (0x02U) /* Pm1 pull-up resistor connected */
|
||||||
|
#define _00_Pm2_PULLUP_OFF (0x00U) /* Pm2 Pull-up resistor not connected */
|
||||||
|
#define _04_Pm2_PULLUP_ON (0x04U) /* Pm2 pull-up resistor connected */
|
||||||
|
#define _00_Pm3_PULLUP_OFF (0x00U) /* Pm3 pull-up resistor not connected */
|
||||||
|
#define _08_Pm3_PULLUP_ON (0x08U) /* Pm3 pull-up resistor connected */
|
||||||
|
#define _00_Pm4_PULLUP_OFF (0x00U) /* Pm4 pull-up resistor not connected */
|
||||||
|
#define _10_Pm4_PULLUP_ON (0x10U) /* Pm4 pull-up resistor connected */
|
||||||
|
#define _00_Pm5_PULLUP_OFF (0x00U) /* Pm5 pull-up resistor not connected */
|
||||||
|
#define _20_Pm5_PULLUP_ON (0x20U) /* Pm5 pull-up resistor connected */
|
||||||
|
#define _00_Pm6_PULLUP_OFF (0x00U) /* Pm6 pull-up resistor not connected */
|
||||||
|
#define _40_Pm6_PULLUP_ON (0x40U) /* Pm6 pull-up resistor connected */
|
||||||
|
#define _00_Pm7_PULLUP_OFF (0x00U) /* Pm7 pull-up resistor not connected */
|
||||||
|
#define _80_Pm7_PULLUP_ON (0x80U) /* Pm7 pull-up resistor connected */
|
||||||
|
|
||||||
|
/*
|
||||||
|
Drive Capacity Control Register (DSCR)
|
||||||
|
*/
|
||||||
|
/* Pmn Drive Capacity Control (B7 - B0) */
|
||||||
|
#define _00_Pm0_HIDRV_OFF (0x00U) /* Pm0 Normal drive output */
|
||||||
|
#define _01_Pm0_HIDRV_ON (0x01U) /* Pm0 High-drive output */
|
||||||
|
#define _00_Pm1_HIDRV_OFF (0x00U) /* Pm1 Normal drive output */
|
||||||
|
#define _02_Pm1_HIDRV_ON (0x02U) /* Pm1 High-drive output */
|
||||||
|
#define _00_Pm2_HIDRV_OFF (0x00U) /* Pm2 Normal drive output */
|
||||||
|
#define _04_Pm2_HIDRV_ON (0x04U) /* Pm2 High-drive output */
|
||||||
|
#define _00_Pm3_HIDRV_OFF (0x00U) /* Pm3 Normal drive output */
|
||||||
|
#define _08_Pm3_HIDRV_ON (0x08U) /* Pm3 High-drive output */
|
||||||
|
#define _00_Pm4_HIDRV_OFF (0x00U) /* Pm4 Normal drive output */
|
||||||
|
#define _10_Pm4_HIDRV_ON (0x10U) /* Pm4 High-drive output */
|
||||||
|
#define _00_Pm5_HIDRV_OFF (0x00U) /* Pm5 Normal drive output */
|
||||||
|
#define _20_Pm5_HIDRV_ON (0x20U) /* Pm5 High-drive output */
|
||||||
|
#define _00_Pm6_HIDRV_OFF (0x00U) /* Pm6 Normal drive output */
|
||||||
|
#define _40_Pm6_HIDRV_ON (0x40U) /* Pm6 High-drive output */
|
||||||
|
#define _00_Pm7_HIDRV_OFF (0x00U) /* Pm7 Normal drive output */
|
||||||
|
#define _80_Pm7_HIDRV_ON (0x80U) /* Pm7 High-drive output */
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Global functions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
void R_PORT_Create(void);
|
||||||
|
|
||||||
|
/* Start user code for function. Do not edit comment generated here */
|
||||||
|
/* End user code. Do not edit comment generated here */
|
||||||
|
#endif
|
||||||
@ -0,0 +1,71 @@
|
|||||||
|
/***********************************************************************************************************************
|
||||||
|
* DISCLAIMER
|
||||||
|
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
|
||||||
|
* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||||
|
* applicable laws, including copyright laws.
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||||
|
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
|
||||||
|
* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
|
||||||
|
* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
|
||||||
|
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
|
||||||
|
* this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||||
|
* following link:
|
||||||
|
* http://www.renesas.com/disclaimer
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
* File Name : rskrx231def.h
|
||||||
|
* Device(s) : R5F52318AxFP
|
||||||
|
* Tool-Chain : CCRX
|
||||||
|
* H/W Platform : RSKRX231
|
||||||
|
* Description : Defines macros relating to the RSKRX231 user LEDs and switches
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
/**********************************************************************************************************************
|
||||||
|
* History : DD.MM.YYYY Version Description
|
||||||
|
* : 01.06.2015 1.00 First Release
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Macro definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
#ifndef RSKRX231_H
|
||||||
|
#define RSKRX231_H
|
||||||
|
|
||||||
|
|
||||||
|
/* General Values */
|
||||||
|
#define LED_ON (0)
|
||||||
|
#define LED_OFF (1)
|
||||||
|
#define SET_BIT_HIGH (1)
|
||||||
|
#define SET_BIT_LOW (0)
|
||||||
|
#define SET_BYTE_HIGH (0xFF)
|
||||||
|
#define SET_BYTE_LOW (0x00)
|
||||||
|
|
||||||
|
/* Switches */
|
||||||
|
#define SW1 (PORT3.PIDR.BIT.B1)
|
||||||
|
#define SW2 (PORT3.PIDR.BIT.B4)
|
||||||
|
#define SW3 (PORT0.PIDR.BIT.B7)
|
||||||
|
|
||||||
|
/* LED port settings */
|
||||||
|
#define LED0 (PORT1.PODR.BIT.B7)
|
||||||
|
#define LED1 (PORT5.PODR.BIT.B0)
|
||||||
|
#define LED2 (PORT5.PODR.BIT.B1)
|
||||||
|
#define LED3 (PORT5.PODR.BIT.B2)
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Typedef definitions
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Exported global variables
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
/***********************************************************************************************************************
|
||||||
|
Exported global functions (to be accessed by other files)
|
||||||
|
***********************************************************************************************************************/
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
Loading…
Reference in New Issue