There is a regression issue introduced in
cfc268814a.
This PR was intended to update MIT licensed header from v9 to v10.
But it accidentally changed "portYIELD_FROM_ISR( x )" in MSVC-MingW/portmacro.h.
It caused "portYIELD_FROM_ISR( x )" does not return correct value to "prvProcessSimulatedInterrupts".
Release tags use a capitalized V.
Our manifest tag is used by our SBOM
script to generate the URL and so
this needs to be capitalized to generate
a valid URL.
Add public dependency to hardware_sync because portable\ThirdParty\GCC\RP2040\include\portmacro.h exposes include "hardware/sync.h" to FreeRTOS.h which is PUBLIC.
Add private dependency to pico_multicore because of usage prvFIFOInterruptHandler() and sio_hw in portable/ThirdParty/GCC/RP2040/port.c.
The PACBTI is an optional hardware security feature,
the current implementation assumes that every SoC that
has Armv8.1-M architecture extension, has the PACBTI
hardware feature, which does not have to be the case.
Hence, the `portHAS_PACBTI_FEATURE` is removed
and the implementation is modified to rely on
`configENABLE_PAC` and `configENABLE_BTI` macros
that can either be set using CMake or FreeRTOSConfig.h
header file.
Enabling PAC and/or BTI on a port variant that
doesn't have the PACBTI hardware feature would be
caught by a `configASSERT` statement.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Tony Josi <tonyjosi@amazon.com>
This commit adds new API functionality to reset xMinimumEverFreeBytesRemaining.
This functionality provides ability to get heap statistics during a particular period of time.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
* Fix SMP debugging issue on rp2040
Related to #1172
Add `multicore_reset_core1` before `multicore_launch_core1` in `xPortStartScheduler` function to fix debugging issue on rp2040 with SMP enabled.
* Modify `portable/ThirdParty/GCC/RP2040/port.c` to include a call to `multicore_reset_core1` before `multicore_launch_core1` within the `#if portRUNNING_ON_BOTH_CORES` block.
* Recover comments back
---------
Co-authored-by: ActoryOu <jay2002824@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Rahul Kar <118818625+kar-rahul-aws@users.noreply.github.com>
Related to #189
Update `configMTIMECMP_BASE_ADDRESS` to be stored in a 64-bit integer.
* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/GCC/RISC-V/port.c`.
* Change the type of `ullMachineTimerCompareRegisterBase` to `uint64_t` in `portable/IAR/RISC-V/port.c`.
* Update the initialization of `ullMachineTimerCompareRegisterBase` to use `configMTIMECMP_BASE_ADDRESS` in both files.
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Since `freertos_config` is an interface library,
`INTERFACE` scope shall be used to define compile
definitions.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
We have removed the use of pthread_attr_setstack and as a result,
the task stack is no longer used as the corresponding pthread's stack.
There is no use of calling pthread_attr_setstacksize as the default is
always good enough and we don't need to handle OS specific cases.
This PR simplifies the code by removing the call to pthread_attr_setstacksize.
Signed-off-by: Paul Hollinsky <paulhollinsky@gmail.com>
* copyright-checker: Add FreeRTOS Arm collab copyright
FreeRTOS Arm collab files shall have both Amazon's
and Arm's copyright headers. Hence, the copyright
checker is modified to check for both copyrights.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
* armv8-m: Add support for IAR with TFM FREERTOS PORT
As the case for ARMClang, and GCC toolchains, IAR
with TFM FreeRTOS Port support is added.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* armv8-m: Do not overwrite Control register value
The current ARMv8-M FreeRTOS-Kernel Port code
implementation is modified in a way that allows
the CONTROL register's value to be retained
rather than being overwritten.
This is needed for adding PACBTI support as
the special-purpose CONTROL register `PAC_EN`,
`UPAC_EN`, `BTI_EN`, and `UBTI_EN` PACBTI
enablement bits should be configured before calling
`vRestoreContextOfFirstTask()` function which currently
overwrite the value inside the CONTROL register.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* armv8.1-m: Add PACBTI support to kernel non-secure implementation
In this commit, Pointer Authentication, and Branch Target
Identification Extension (PACBTI) support is added for
Non-Secure and Non-TrustZone variants of Cortex-M85
FreeRTOS-Kernel Port.
The PACBTI support is added for Arm Compiler For
Embedded, and IAR toolchains only. The support in
the kernel is not yet enabled for GNU toolchain
due to known issues.
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
* Fix CI check
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
Co-authored-by: Ahmed Ismail <ahmism01@e133373.arm.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
In environments that do not support static allocation
(configSUPPORT_STATIC_ALLOCATION == 0), at prvCreateIdleTasks(), call
xCreateTask() and compare its return value to pdFAIL to check whether
xCreateTask() failed. However, xCreateTask() returns
errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY as the error value, so the
result of this comparison is always false.
This commit fixes this problem by changing the return value comparison
to pdPASS instead of pdFAIL.
* Xtensa support moved to Partner-Supported ports
Removing legacy Xtensa port; leave README with pointer to latest code
* Updated submodule ThirdParty/FreeRTOS-Kernel-Partner-Supported-Ports
refactor: change methods ENTER|EXIT critical
The read and write of BaseType_t are atomic for a number of ports
and therefore, do not require taskENTER_CRITICAL/taskEXIT_CRITICAL.
This PR introduces portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL which default to taskENTER_CRITICAL
and taskEXIT_CRITICAL. The APIs that read/write BaseType_t are updated
to use these new macros.
The next change would to be to define portBASE_TYPE_ENTER_CRITICAL and
portBASE_TYPE_EXIT_CRITICAL to nothing for ports where BaseType_t
read and write are atomic.
Signed-off-by: guilherme giacomo simoes <trintaeoitogc@gmail.com>
Add missing MPU prototypes
This commit address the following issues with MPU prototypes:
1. Fix the decorator according to which MPU wrapper is used.
2. Add the missing prototypes for v1.
3. Add the corresponding mapping to mpu_wrappers.h.
4. Update MPU v1 wrappers for vTaskList and vTaskGetRunTimeStats.
This was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470/5.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Support for 16 MPU regions was added to Cortex-M33, M35P, M55 and M85
ports was added but the compile time error check was not removed. This
results in compilation error when 16 MPU regions are used. This PR
removes the not needed compile time error check.
It was reported here - https://forums.freertos.org/t/cortex-m55-and-16-region-mpu-support/21470.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Add configVALIDATE_HEAP_BLOCK_POINTER on heap_5
heap_5 is used for multiple separated memory spaces. In the
previous implementation, it only verifies the highest and
lowest addresses. A pointer may not be within heap regions,
but is still located between the highest and lowest addressed.
Add maco configVALIDATE_HEAP_BLOCK_POINTER to provide
customized heap block pointers detection based on the settings
of heap regions.
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Event Groups: snapshot xEventGroupSetBits returning value while in
vTaskSuspendAll. Fixes uxEventBits dereference after event group
deleted by higher priority thread.
When a task deletes itself, it calls portPRE_TASK_DELETE_HOOK which
translates to vPortCloseRunningThread on the Windows port.
vPortCloseRunningThread never returns and as a result,
taskYIELD_WITHIN_API in vTaskDelete does not get called. As a result,
the next task is not scheduled when configUSE_PREEMPTION is set to 0.
This change records that a yield is pending so that the next tick
interrupt switches out the task that was deleted.
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
When validate those allocated heap block structure, the canary is not used.
Do xor with canary when allocating a new block.
Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
* Remove hardware dependence in portmacros.h
The IAR MSP430X port `#include "msp430.h"` which pulls all the hardware
register definitions into anything which `#include "FreeRTOS.h"`. This
removes that hardware dependency "leak" by removing the header file
and re-defining the `portDISABLE_INTERRUPTS()` and
`portENABLE_INTERRUPTS()` macros in terms of `__asm`.
* Code review suggestions
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
---------
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
* Fix compilation issue of IAR32 port
* Add new line at EOF
* Fix header check
---------
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
The original implementation only initializes the first
variable. After executing xTaskIncrementTick, the schedule
might not behave as expected.
When configUSE_PREEMPTION == 1 & configUSE_TIME_SLICING == 1,
replace setting xYieldRequiredForCore[ xCoreID ] with setting
xYieldPendings[ xCoreID ].
And when configUSE_PREEMPTION == 1, simplify the check
condition to only check xYieldPendings[ xCoreID ].
Signed-off-by: cymzier <cymb103u@cs.ccu.edu.tw>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
wwhheerree
Rahul Kar
Kody Stribrny
yh-sb
Ryan
Tony Josi
Ahmed Ismail
Graham Sanderson
Gaurav-Aggarwal-AWS
Jeff Tenney
Tomas Galbicka
Trong Nguyen
Vishwanath Martur
ActoryOu
Paul Hollinsky
kakkoko
Ian Thompson
K.Kashi
Guilherme Giácomo Simões
Florian La Roche
Saiiijchan
あく
Oliver Mueller
Ryzee119
chinglee-iot
mayl
Chen YM
xuelix