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Minor updates to demo projects to ensure correct building with V8 rc1.

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pull/4/head
Richard Barry 11 years ago
parent f9072e7bac
commit e95b482f56
18 changed files with 206 additions and 142 deletions
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6
FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c
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@ -199,7 +199,7 @@ void vRegisterSampleCLICommands( void )
static portBASE_TYPE prvTaskStatsCommand( int8_t *pcWriteBuffer, size_t xWriteBufferLen, const int8_t *pcCommandString )
{
const char *const pcHeader = ( int8_t * ) "Task State Priority Stack #\r\n************************************************\r\n";
const char *const pcHeader = "Task State Priority Stack #\r\n************************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the
@ -210,7 +210,7 @@ const char *const pcHeader = ( int8_t * ) "Task State Priority Stack
/* Generate a table of task stats. */
strcpy( ( char * ) pcWriteBuffer, pcHeader );
vTaskList( pcWriteBuffer + strlen( pcHeader ) );
vTaskList( ( char * ) pcWriteBuffer + strlen( pcHeader ) );
/* There is no more data to return after this single string, so return
pdFALSE. */
@ -220,7 +220,7 @@ const char *const pcHeader = ( int8_t * ) "Task State Priority Stack
static portBASE_TYPE prvRunTimeStatsCommand( int8_t *pcWriteBuffer, size_t xWriteBufferLen, const int8_t *pcCommandString )
{
const char * const pcHeader = ( int8_t * ) "Task Abs Time % Time\r\n****************************************\r\n";
const char * const pcHeader = "Task Abs Time % Time\r\n****************************************\r\n";
/* Remove compile time warnings about unused parameters, and check the
write buffer is not NULL. NOTE - for simplicity, this example assumes the

15
FreeRTOS/Demo/PIC18_MPLAB/stdint.h
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@ -0,0 +1,15 @@
#ifndef STDINT_INC
#define STDINT_INC
/* This file will get picked up when stdint.h does not appear in the default
include path (which it doesn't seem to be - even though the file exists). */
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;
#endif /* STDINT_INC */

4
FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h
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@ -142,6 +142,10 @@ to exclude the API function. */
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
/* Tick interrupt vector - this must match the INTIT_vect definition contained
in the ior5fnnnn.h header file included at the top of this file (the value is
dependent on the hardware being used. */
#define configTICK_VECTOR 56
/******************************************************************************
* PORT SPECIFIC CONFIGURATION OPTIONS

4
FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c
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@ -200,11 +200,11 @@ static xTimerHandle xDemoTimer = NULL;
/* This variable is incremented each time the demo timer expires. */
static volatile unsigned long ulDemoSoftwareTimerCounter = 0UL;
/* RL78/G13 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface
/* RL78 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface
enabled. */
__root __far const unsigned char OptionByte[] @ 0x00C0 =
{
WATCHDOG_DISABLED, LVI_ENABLED, RESERVED_FF, OCD_ENABLED
0x6eU, 0xffU, 0xe8U, 0x85U
};
/* Security byte definition */

15
FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/stdint.h
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@ -0,0 +1,15 @@
#ifndef STDINT_INC
#define STDINT_INC
/* This file will get picked up when stdint.h does not appear in the default
include path (which it doesn't seem to be - even though the file exists). */
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;
#endif /* STDINT_INC */

15
FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/stdint.h
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@ -0,0 +1,15 @@
#ifndef STDINT_INC
#define STDINT_INC
/* This file will get picked up when stdint.h does not appear in the default
include path (which it doesn't seem to be - even though the file exists). */
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;
#endif /* STDINT_INC */

5
FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/RenesasCode/typedefine.h
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@ -40,6 +40,7 @@
#ifndef _TYPE_DEFINE_H_
#define _TYPE_DEFINE_H_
#include <stdint.h>
typedef unsigned char Bool;
@ -47,12 +48,8 @@ typedef unsigned char Bool;
typedef signed char char8_t;
typedef unsigned char uchar8_t;
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef signed short short16_t;
typedef unsigned short ushort16_t;
typedef signed long int32_t;
typedef unsigned long uint32_t;
typedef signed long long32_t;
typedef unsigned long ulong32_t;

15
FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/stdint.h
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@ -0,0 +1,15 @@
#ifndef STDINT_INC
#define STDINT_INC
/* This file will get picked up when stdint.h does not appear in the default
include path (which it doesn't seem to be - even though the file exists). */
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef long int32_t;
typedef unsigned long uint32_t;
#endif /* STDINT_INC */

48
FreeRTOS/Demo/uIP_Demo_Rowley_ARM7/uip/cs8900a.c
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@ -278,11 +278,11 @@ cs8900a_write(unsigned addr, unsigned int data)
GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus
GPIO_IOSET = data << 16;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = 0xf << 4;
GPIO_IOSET = ((addr | 1) << 4); // And put next address on bus
@ -290,11 +290,11 @@ cs8900a_write(unsigned addr, unsigned int data)
GPIO_IOCLR = 0xff << 16; // Write high order byte to data bus
GPIO_IOSET = data >> 8 << 16;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
}
// Reads a word in little-endian byte order from a specified port-address
@ -308,17 +308,17 @@ cs8900a_read(unsigned addr)
GPIO_IOCLR = 0xf << 4; // Put address on bus
GPIO_IOSET = addr << 4;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOR; // IOR-signal low
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
value = (GPIO_IOPIN >> 16) & 0xff; // get low order byte from data bus
GPIO_IOSET = IOR;
GPIO_IOSET = 1 << 4; // IOR high and put next address on bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOR; // IOR-signal low
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
value |= ((GPIO_IOPIN >> 8) & 0xff00); // get high order byte from data bus
GPIO_IOSET = IOR; // IOR-signal low
@ -336,17 +336,17 @@ cs8900a_read_addr_high_first(unsigned addr)
GPIO_IOCLR = 0xf << 4; // Put address on bus
GPIO_IOSET = (addr+1) << 4;
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOR; // IOR-signal low
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
value = ((GPIO_IOPIN >> 8) & 0xff00); // get high order byte from data bus
GPIO_IOSET = IOR; // IOR-signal high
GPIO_IOCLR = 1 << 4; // Put low address on bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOR; // IOR-signal low
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
value |= (GPIO_IOPIN >> 16) & 0xff; // get low order byte from data bus
GPIO_IOSET = IOR;
@ -427,9 +427,9 @@ cs8900a_send(void)
GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus
GPIO_IOSET = uip_buf[u] << 16; // write low order byte to data bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
GPIO_IOCLR = 0xf << 4; // Put address on bus
@ -438,9 +438,9 @@ cs8900a_send(void)
GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus
GPIO_IOSET = uip_buf[u+1] << 16; // write low order byte to data bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
}
@ -461,9 +461,9 @@ cs8900a_send(void)
GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus
GPIO_IOSET = uip_appdata[u] << 16; // write low order byte to data bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
GPIO_IOCLR = 0xf << 4; // Put address on bus
@ -472,9 +472,9 @@ cs8900a_send(void)
GPIO_IOCLR = 0xff << 16; // Write low order byte to data bus
GPIO_IOSET = uip_appdata[u+1] << 16; // write low order byte to data bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOCLR = IOW; // Toggle IOW-signal
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOW;
}
@ -528,13 +528,13 @@ cs8900a_poll(void)
GPIO_IOCLR = IOR; // IOR-signal low
uip_buf[u] = GPIO_IOPIN >> 16; // get high order byte from data bus
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
GPIO_IOSET = IOR; // IOR-signal high
GPIO_IOSET = 1 << 4; // put address on bus
GPIO_IOCLR = IOR; // IOR-signal low
asm volatile ( "NOP" );
__asm volatile ( "NOP" );
uip_buf[u+1] = GPIO_IOPIN >> 16; // get high order byte from data bus
GPIO_IOSET = IOR; // IOR-signal high
u += 2;

3
FreeRTOS/Source/include/FreeRTOS.h
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@ -708,6 +708,9 @@ typedef TickType_t EventBits_t;
#define xTaskStatusType TaskStatus_t
#define xTimerHandle TimerHandle_t
#define xCoRoutineHandle CoRoutineHandle_t
#define xListItem ListItem_t
#define xList List_t
#define xTimeOutType TimeOut_t
#endif /* INC_FREERTOS_H */

10
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
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@ -124,7 +124,7 @@ void vPortYieldProcessor( void )
/* Within an IRQ ISR the link register has an offset from the true return
address, but an SWI ISR does not. Add the offset manually so the same
ISR return code can be used in both cases. */
asm volatile ( "ADD LR, LR, #4" );
__asm volatile ( "ADD LR, LR, #4" );
/* Perform the context switch. First save the context of the current task. */
portSAVE_CONTEXT();
@ -200,7 +200,7 @@ void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
void vPortDisableInterruptsFromThumb( void )
{
asm volatile (
__asm volatile (
"STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
@ -211,7 +211,7 @@ void vPortDisableInterruptsFromThumb( void )
void vPortEnableInterruptsFromThumb( void )
{
asm volatile (
__asm volatile (
"STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
@ -228,7 +228,7 @@ in a variable, which is then saved as part of the stack context. */
void vPortEnterCritical( void )
{
/* Disable interrupts as per portDISABLE_INTERRUPTS(); */
asm volatile (
__asm volatile (
"STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
@ -253,7 +253,7 @@ void vPortExitCritical( void )
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
{
/* Enable interrupts as per portEXIT_CRITICAL(). */
asm volatile (
__asm volatile (
"STMDB SP!, {R0} \n\t" /* Push R0. */
"MRS R0, CPSR \n\t" /* Get CPSR. */
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */

12
FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
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@ -129,7 +129,7 @@ typedef unsigned long UBaseType_t;
#define portSTACK_GROWTH ( -1 )
#define portTICK_RATE_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8
#define portNOP() asm volatile ( "NOP" );
#define portNOP() __asm volatile ( "NOP" );
/*-----------------------------------------------------------*/
@ -148,7 +148,7 @@ extern volatile void * volatile pxCurrentTCB; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Set the LR to the task stack. */ \
asm volatile ( \
__asm volatile ( \
"LDR R0, =pxCurrentTCB \n\t" \
"LDR R0, [R0] \n\t" \
"LDR LR, [R0] \n\t" \
@ -185,7 +185,7 @@ extern volatile void * volatile pxCurrentTCB; \
extern volatile uint32_t ulCriticalNesting; \
\
/* Push R0 as we are going to use the register. */ \
asm volatile ( \
__asm volatile ( \
"STMDB SP!, {R0} \n\t" \
\
/* Set R0 to point to the task stack pointer. */ \
@ -227,7 +227,7 @@ extern volatile uint32_t ulCriticalNesting; \
#define portYIELD_FROM_ISR() vTaskSwitchContext()
#define portYIELD() asm volatile ( "SWI 0" )
#define portYIELD() __asm volatile ( "SWI 0" )
/*-----------------------------------------------------------*/
@ -251,7 +251,7 @@ extern volatile uint32_t ulCriticalNesting; \
#else
#define portDISABLE_INTERRUPTS() \
asm volatile ( \
__asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \
@ -259,7 +259,7 @@ extern volatile uint32_t ulCriticalNesting; \
"LDMIA SP!, {R0} " ) /* Pop R0. */
#define portENABLE_INTERRUPTS() \
asm volatile ( \
__asm volatile ( \
"STMDB SP!, {R0} \n\t" /* Push R0. */ \
"MRS R0, CPSR \n\t" /* Get CPSR. */ \
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \

10
FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
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@ -282,7 +282,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -291,14 +291,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -319,7 +319,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

10
FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
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@ -300,7 +300,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -309,14 +309,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -337,7 +337,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

10
FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
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@ -238,7 +238,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -247,14 +247,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -275,7 +275,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

12
FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
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@ -111,7 +111,7 @@
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( int8_t ) 0xff )
#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
@ -258,7 +258,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( volatile int8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -267,14 +267,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -295,7 +295,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

10
FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
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@ -284,7 +284,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -293,14 +293,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -321,7 +321,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

10
FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
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@ -322,7 +322,7 @@ BaseType_t xPortStartScheduler( void )
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile int8_t * const pcFirstUserPriorityRegister = ( int8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API
@ -331,14 +331,14 @@ BaseType_t xPortStartScheduler( void )
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pcFirstUserPriorityRegister;
ulOriginalPriority = *pucFirstUserPriorityRegister;
/* Determine the number of priority bits available. First write to all
possible bits. */
*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pcFirstUserPriorityRegister;
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
@ -359,7 +359,7 @@ BaseType_t xPortStartScheduler( void )
/* Restore the clobbered interrupt priority register to its original
value. */
*pcFirstUserPriorityRegister = ulOriginalPriority;
*pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */

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