Some efficiency improvements in Risc-V port.

FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c

@@ -49,9 +49,10 @@ static void prvTaskExitError( void );
 /*-----------------------------------------------------------*/
 
 /* Used to program the machine timer compare register. */
-static uint64_t ullNextTime = 0ULL;
-static const uint64_t ullTimerIncrementsForOneTick = ( uint64_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
-static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );
+uint64_t ullNextTime = 0ULL;
+const uint64_t *pullNextTime = &ullNextTime;
+const uint32_t ulTimerIncrementsForOneTick = ( uint32_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */
+volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );
 
 /*-----------------------------------------------------------*/
 
@@ -187,11 +188,11 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLI
 	ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
 	ullNextTime <<= 32ULL;
 	ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
-	ullNextTime += ullTimerIncrementsForOneTick;
+	ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;
 	*pullMachineTimerCompareRegister = ullNextTime;
 
 	/* Prepare the time to use after the next tick interrupt. */
-	ullNextTime += ullTimerIncrementsForOneTick;
+	ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;
 
 	/* Enable timer interrupt */
 	__asm volatile( "csrs mie, %0" :: "r"(0x80) ); /* 1<<7 for timer interrupt. */
@@ -209,21 +210,6 @@ volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCLINT_BASE_ADDR
 }
 /*-----------------------------------------------------------*/
 
-void Timer_IRQHandler( void )
-{
-extern void vTaskSwitchContext( void );
-
-	/* Reload for the next timer interrupt. */
-	*pullMachineTimerCompareRegister = ullNextTime;
-	ullNextTime += ullTimerIncrementsForOneTick;
-
-	if( xTaskIncrementTick() != pdFALSE )
-	{
-		vTaskSwitchContext();
-	}
-}
-/*-----------------------------------------------------------*/
-
 BaseType_t xPortStartScheduler( void )
 {
 extern void xPortStartFirstTask( void );

FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S

@@ -42,6 +42,14 @@
 .global vPortTrapHandler
 .extern pxCurrentTCB
 .extern ulPortTrapHandler
+.extern vTaskSwitchContext
+.extern Timer_IRQHandler
+
+
+.extern pullMachineTimerCompareRegister
+.extern pullNextTime
+.extern ulTimerIncrementsForOneTick
+
 
 /*-----------------------------------------------------------*/
 
@@ -129,13 +137,45 @@ vPortTrapHandler:
 	csrr a0, mcause
 	csrr a1, mepc
 	mv a2, sp
-/*_RB_ Does stack need aligning here? */
-	jal ulPortTrapHandler
-	csrw mepc, a0
-	/* Save exception return address. */
-	sw a0, 0( sp )
-
 
+test_if_environment_call:
+	li t0, 11 								/* 11 == environment call when using qemu. */
+	bne a0, t0, test_if_timer
+	addi a1, a1, 4 							/* Synchronous so return to the instruction after the environment call. */
+	sw a1, 0( sp ) 							/* Save updated exception return address. */
+/*_RB_ Does stack need aligning here? */
+	jal vTaskSwitchContext
+	j processed_source
+
+
+test_if_timer:
+	sw a1, 0( sp ) 							/* Asynch so save unmodified exception return address. */
+
+	lui t0, 0x80000
+	addi t1,t0, 7 							/* 0x80000007 == machine timer interrupt. */
+	bne a0, t1, as_yet_unhandled
+
+	lw t0, pullMachineTimerCompareRegister 	/* Load address of compare register into t0. */
+	lw t1, pullNextTime 					/* Load the address of ullNextTime into t1. */
+	lw t2, 0(t1)							/* Load the low word of ullNextTime into t2. */
+	lw t3, 4(t1)							/* Load the high word of ullNextTime into t3. */
+	sw t2, 0(t0)							/* Store low word of ullNextTime into compare register. */
+	sw t3, 4(t0)							/* Store high word of ullNextTime into compare register. */
+	lw t0, ulTimerIncrementsForOneTick		/* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */
+	add t4, t0, t2							/* Add the low word of ullNextTime to the timer increments for one tick (assumes timer increment for one tick fits in 32-bits. */
+	sltu t5, t4, t2							/* See if the sum of low words overflowed (what about the zero case?). */
+	add t6, t3, t5							/* Add overflow to high word of ullNextTime. */
+	sw t4, 0(t1)							/* Store new low word of ullNextTime. */
+	sw t6, 4(t1)							/* Store new high word of ullNextTime. */
+	jal xTaskIncrementTick
+	beqz a0, processed_source				/* Don't switch context if incrementing tick didn't unblock a task. */
+	jal vTaskSwitchContext
+	j processed_source
+
+as_yet_unhandled:
+	j as_yet_unhandled 						/* External interrupt? */
+
+processed_source:
 	lw  sp, pxCurrentTCB					/* Load pxCurrentTCB. */
 	lw  sp, 0( sp )				 			/* Read sp from first TCB member. */