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Fix build error for MSP430 and Cortex A with IAR (#937)

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* fix whitespace in asm macros

* Revert formatting ARM_CA5_No_GIC and ARM_CA9
pull/935/head^2
Jeff Tenney 1 year ago committed by GitHub
parent 58f0d36e76
commit 5544c78299
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 243 additions and 341 deletions
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245
portable/IAR/ARM_CA5_No_GIC/portASM.h
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@ -1,158 +1,109 @@
; /* ;/*
* ; * FreeRTOS Kernel <DEVELOPMENT BRANCH> ; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* ; * ; *
* ; * SPDX-License-Identifier: MIT ; * SPDX-License-Identifier: MIT
* ; * ; *
* ; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
* ; * this software and associated documentation files (the "Software"), to deal in ; * this software and associated documentation files (the "Software"), to deal in
* ; * the Software without restriction, including without limitation the rights to ; * the Software without restriction, including without limitation the rights to
* ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* ; * the Software, and to permit persons to whom the Software is furnished to do so, ; * the Software, and to permit persons to whom the Software is furnished to do so,
* ; * subject to the following conditions: ; * subject to the following conditions:
* ; * ; *
* ; * The above copyright notice and this permission notice shall be included in all ; * The above copyright notice and this permission notice shall be included in all
* ; * copies or substantial portions of the Software. ; * copies or substantial portions of the Software.
* ; * ; *
* ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* ; * ; *
* ; * https://www.FreeRTOS.org ; * https://www.FreeRTOS.org
* ; * https://github.com/FreeRTOS ; * https://github.com/FreeRTOS
* ; * ; *
* ; */ ; */
EXTERN vTaskSwitchContext EXTERN vTaskSwitchContext
EXTERN ulCriticalNesting EXTERN ulCriticalNesting
EXTERN pxCurrentTCB EXTERN pxCurrentTCB
EXTERN ulPortTaskHasFPUContext EXTERN ulPortTaskHasFPUContext
EXTERN ulAsmAPIPriorityMask EXTERN ulAsmAPIPriorityMask
portSAVE_CONTEXT macro portSAVE_CONTEXT macro
; ; Save the LR and SPSR onto the system mode stack before switching to
Save the LR and SPSR onto the system mode stack before switching to ; system mode to save the remaining system mode registers
; SRSDB sp!, #SYS_MODE
system mode to save the remaining system mode registers CPS #SYS_MODE
SRSDB sp !, # SYS_MODE PUSH {R0-R12, R14}
CPS # SYS_MODE
PUSH { ; Push the critical nesting count
R0 - R12, R14 LDR R2, =ulCriticalNesting
} LDR R1, [R2]
PUSH {R1}
;
Push the critical nesting count ; Does the task have a floating point context that needs saving? If
LDR R2, = ulCriticalNesting ; ulPortTaskHasFPUContext is 0 then no.
LDR R1, [ R2 ] LDR R2, =ulPortTaskHasFPUContext
PUSH { LDR R3, [R2]
R1 CMP R3, #0
}
; Save the floating point context, if any
; FMRXNE R1, FPSCR
Does the task have a floating point context that needs saving ? If VPUSHNE {D0-D15}
;
ulPortTaskHasFPUContext is 0 then no.
LDR R2, = ulPortTaskHasFPUContext
LDR R3, [ R2 ]
CMP R3, # 0
;
Save the floating point context,
if any
FMRXNE R1, FPSCR
VPUSHNE {
D0 - D15
}
#if configFPU_D32 == 1 #if configFPU_D32 == 1
VPUSHNE { VPUSHNE {D16-D31}
D16 - D31 #endif ; configFPU_D32
} PUSHNE {R1}
#endif; configFPU_D32
PUSHNE { ; Save ulPortTaskHasFPUContext itself
R1 PUSH {R3}
}
; Save the stack pointer in the TCB
; LDR R0, =pxCurrentTCB
Save ulPortTaskHasFPUContext itself LDR R1, [R0]
PUSH { STR SP, [R1]
R3
} endm
;
Save the stack pointer in the TCB
LDR R0, = pxCurrentTCB
LDR R1, [ R0 ]
STR SP, [ R1 ]
endm
; /**********************************************************************/ ; /**********************************************************************/
portRESTORE_CONTEXT macro portRESTORE_CONTEXT macro
; ; Set the SP to point to the stack of the task being restored.
Set the SP to point to the stack of the task being restored. LDR R0, =pxCurrentTCB
LDR R0, = pxCurrentTCB LDR R1, [R0]
LDR R1, [ R0 ] LDR SP, [R1]
LDR SP, [ R1 ]
; Is there a floating point context to restore? If the restored
; ; ulPortTaskHasFPUContext is zero then no.
Is there a floating point context to restore ? If the restored LDR R0, =ulPortTaskHasFPUContext
; POP {R1}
ulPortTaskHasFPUContext is zero then no. STR R1, [R0]
LDR R0, = ulPortTaskHasFPUContext CMP R1, #0
POP {
R1
}
STR R1, [ R0 ]
CMP R1, # 0
;
Restore the floating point context,
if any
POPNE {
R0
}
; Restore the floating point context, if any
POPNE {R0}
#if configFPU_D32 == 1 #if configFPU_D32 == 1
VPOPNE { VPOPNE {D16-D31}
D16 - D31 #endif ; configFPU_D32
} VPOPNE {D0-D15}
#endif; configFPU_D32 VMSRNE FPSCR, R0
VPOPNE {
D0 - D15 ; Restore the critical section nesting depth
} LDR R0, =ulCriticalNesting
VMSRNE FPSCR, R0 POP {R1}
STR R1, [R0]
;
Restore the critical section nesting depth ; Restore all system mode registers other than the SP (which is already
LDR R0, = ulCriticalNesting ; being used)
POP { POP {R0-R12, R14}
R1
} ; Return to the task code, loading CPSR on the way. CPSR has the interrupt
STR R1, [ R0 ] ; enable bit set appropriately for the task about to execute.
RFEIA sp!
;
Restore all system mode registers other than the SP( which is already endm
;
being used )
POP
{
R0 - R12, R14
}
Return to the task code, loading CPSR on the way.CPSR has the interrupt
;
enable bit set appropriately
for the task about to execute.
RFEIA sp !
endm

255
portable/IAR/ARM_CA9/portASM.h
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@ -1,160 +1,111 @@
; /* ;/*
* ; * FreeRTOS Kernel <DEVELOPMENT BRANCH> ; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
* ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* ; * ; *
* ; * SPDX-License-Identifier: MIT ; * SPDX-License-Identifier: MIT
* ; * ; *
* ; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
* ; * this software and associated documentation files (the "Software"), to deal in ; * this software and associated documentation files (the "Software"), to deal in
* ; * the Software without restriction, including without limitation the rights to ; * the Software without restriction, including without limitation the rights to
* ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of ; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* ; * the Software, and to permit persons to whom the Software is furnished to do so, ; * the Software, and to permit persons to whom the Software is furnished to do so,
* ; * subject to the following conditions: ; * subject to the following conditions:
* ; * ; *
* ; * The above copyright notice and this permission notice shall be included in all ; * The above copyright notice and this permission notice shall be included in all
* ; * copies or substantial portions of the Software. ; * copies or substantial portions of the Software.
* ; * ; *
* ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS ; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR ; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER ; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* ; * ; *
* ; * https://www.FreeRTOS.org ; * https://www.FreeRTOS.org
* ; * https://github.com/FreeRTOS ; * https://github.com/FreeRTOS
* ; * ; *
* ; */ ; */
EXTERN vTaskSwitchContext EXTERN vTaskSwitchContext
EXTERN ulCriticalNesting EXTERN ulCriticalNesting
EXTERN pxCurrentTCB EXTERN pxCurrentTCB
EXTERN ulPortTaskHasFPUContext EXTERN ulPortTaskHasFPUContext
EXTERN ulAsmAPIPriorityMask EXTERN ulAsmAPIPriorityMask
portSAVE_CONTEXT macro portSAVE_CONTEXT macro
; ; Save the LR and SPSR onto the system mode stack before switching to
Save the LR and SPSR onto the system mode stack before switching to ; system mode to save the remaining system mode registers
; SRSDB sp!, #SYS_MODE
system mode to save the remaining system mode registers CPS #SYS_MODE
SRSDB sp !, # SYS_MODE PUSH {R0-R12, R14}
CPS # SYS_MODE
PUSH { ; Push the critical nesting count
R0 - R12, R14 LDR R2, =ulCriticalNesting
} LDR R1, [R2]
PUSH {R1}
;
Push the critical nesting count ; Does the task have a floating point context that needs saving? If
LDR R2, = ulCriticalNesting ; ulPortTaskHasFPUContext is 0 then no.
LDR R1, [ R2 ] LDR R2, =ulPortTaskHasFPUContext
PUSH { LDR R3, [R2]
R1 CMP R3, #0
}
; Save the floating point context, if any
; FMRXNE R1, FPSCR
Does the task have a floating point context that needs saving ? If VPUSHNE {D0-D15}
; VPUSHNE {D16-D31}
ulPortTaskHasFPUContext is 0 then no. PUSHNE {R1}
LDR R2, = ulPortTaskHasFPUContext
LDR R3, [ R2 ] ; Save ulPortTaskHasFPUContext itself
CMP R3, # 0 PUSH {R3}
; ; Save the stack pointer in the TCB
Save the floating point context, LDR R0, =pxCurrentTCB
LDR R1, [R0]
if any STR SP, [R1]
FMRXNE R1, FPSCR
VPUSHNE { endm
D0 - D15
}
VPUSHNE {
D16 - D31
}
PUSHNE {
R1
}
;
Save ulPortTaskHasFPUContext itself
PUSH {
R3
}
;
Save the stack pointer in the TCB
LDR R0, = pxCurrentTCB
LDR R1, [ R0 ]
STR SP, [ R1 ]
endm
; /**********************************************************************/ ; /**********************************************************************/
portRESTORE_CONTEXT macro portRESTORE_CONTEXT macro
; ; Set the SP to point to the stack of the task being restored.
Set the SP to point to the stack of the task being restored. LDR R0, =pxCurrentTCB
LDR R0, = pxCurrentTCB LDR R1, [R0]
LDR R1, [ R0 ] LDR SP, [R1]
LDR SP, [ R1 ]
; Is there a floating point context to restore? If the restored
; ; ulPortTaskHasFPUContext is zero then no.
Is there a floating point context to restore ? If the restored LDR R0, =ulPortTaskHasFPUContext
; POP {R1}
ulPortTaskHasFPUContext is zero then no. STR R1, [R0]
LDR R0, = ulPortTaskHasFPUContext CMP R1, #0
POP {
R1 ; Restore the floating point context, if any
} POPNE {R0}
STR R1, [ R0 ] VPOPNE {D16-D31}
CMP R1, # 0 VPOPNE {D0-D15}
VMSRNE FPSCR, R0
;
Restore the floating point context, ; Restore the critical section nesting depth
LDR R0, =ulCriticalNesting
if any POP {R1}
POPNE { STR R1, [R0]
R0
} ; Ensure the priority mask is correct for the critical nesting depth
LDR R2, =portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS
VPOPNE { CMP R1, #0
D16 - D31 MOVEQ R4, #255
} LDRNE R4, =( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT )
VPOPNE { STR R4, [r2]
D0 - D15
} ; Restore all system mode registers other than the SP (which is already
VMSRNE FPSCR, R0 ; being used)
POP {R0-R12, R14}
;
Restore the critical section nesting depth ; Return to the task code, loading CPSR on the way.
LDR R0, = ulCriticalNesting RFEIA sp!
POP {
R1 endm
}
STR R1, [ R0 ]
;
Ensure the priority mask is correct
for the critical nesting depth
LDR R2, = portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS
CMP R1, # 0
MOVEQ R4, # 255
LDRNE R4, = ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT )
STR R4, [ r2 ]
;
Restore all system mode registers other than the SP( which is already
;
being used )
POP
{
R0 - R12, R14
}
Return to the task code, loading CPSR on the way.
RFEIA sp !
endm

78
portable/IAR/MSP430/portasm.h
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portSAVE_CONTEXT macro portSAVE_CONTEXT macro
IMPORT pxCurrentTCB IMPORT pxCurrentTCB
IMPORT usCriticalNesting IMPORT usCriticalNesting
/* Save the remaining registers. */ /* Save the remaining registers. */
push r4 push r4
push r5 push r5
push r6 push r6
push r7 push r7
push r8 push r8
push r9 push r9
push r10 push r10
push r11 push r11
push r12 push r12
push r13 push r13
push r14 push r14
push r15 push r15
mov.w &usCriticalNesting, r14 mov.w &usCriticalNesting, r14
push r14 push r14
mov.w &pxCurrentTCB, r12 mov.w &pxCurrentTCB, r12
mov.w r1, 0 ( r12 ) mov.w r1, 0(r12)
endm endm
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portRESTORE_CONTEXT macro portRESTORE_CONTEXT macro
mov.w & pxCurrentTCB, r12 mov.w &pxCurrentTCB, r12
mov.w @r12, r1 mov.w @r12, r1
pop r15 pop r15
mov.w r15, &usCriticalNesting mov.w r15, &usCriticalNesting
pop r15 pop r15
pop r14 pop r14
pop r13 pop r13
pop r12 pop r12
pop r11 pop r11
pop r10 pop r10
pop r9 pop r9
pop r8 pop r8
pop r7 pop r7
pop r6 pop r6
pop r5 pop r5
pop r4 pop r4
/* The last thing on the stack will be the status register. /* The last thing on the stack will be the status register.
* Ensure the power down bits are clear ready for the next * Ensure the power down bits are clear ready for the next
* time this power down register is popped from the stack. */ * time this power down register is popped from the stack. */
bic.w # 0xf0, 0 ( SP ) bic.w #0xf0, 0(SP)
reti reti
endm endm
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#endif /* ifndef PORTASM_H */ #endif /* ifndef PORTASM_H */

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