Improve efficiency even further. Introduce the configMAX_SYSCALL_INTERRUPT_PRIORITY feature.

Source/portable/GCC/ARM_CM3/port.c

@@ -83,7 +83,7 @@ const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
 
 /* Each task maintains its own interrupt status in the critical nesting
 variable. */
-unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
+static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
 
 /*
  * Setup the timer to generate the tick interrupts.
@@ -118,8 +118,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
 	*pxTopOfStack = 0;	/* LR */
 	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 	*pxTopOfStack = ( portSTACK_TYPE ) pvParameters;	/* R0 */
-	pxTopOfStack -= 9;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
+	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
-	*pxTopOfStack = 0x00000000; /* uxCriticalNesting. */
 
 	return pxTopOfStack;
 }
@@ -131,9 +130,7 @@ void vPortSVCHandler( void )
 					"	ldr	r3, pxCurrentTCBConst2		\n" /* Restore the context. */
 					"	ldr r1, [r3]					\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
 					"	ldr r0, [r1]					\n" /* The first item in pxCurrentTCB is the task top of stack. */
-					"	ldmia r0!, {r1, r4-r11}			\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
+					"	ldmia r0!, {r4-r11}				\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
-					"	ldr r2, uxCriticalNestingConst2	\n" /* Restore the critical nesting count used by the task. */
-					"	str r1, [r2]					\n"
 					"	msr psp, r0						\n" /* Restore the task stack pointer. */
 					"	mov r0, #0 						\n"
 					"	msr	basepri, r0					\n"
@@ -142,7 +139,6 @@ void vPortSVCHandler( void )
 					"									\n"
 					"	.align 2						\n"
 					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-					"uxCriticalNestingConst2: .word uxCriticalNesting	\n"
 				);
 }
 /*-----------------------------------------------------------*/
@@ -154,6 +150,9 @@ void vPortStartFirstTask( unsigned long ulValue )
 	( void ) ulValue;
 
 	asm volatile(
+					" ldr r0, =0xE000ED08 	\n" /* Use the NVIC offset register to locate the stack. */
+					" ldr r0, [r0] 			\n"
+					" ldr r0, [r0] 			\n"
 					" msr msp, r0			\n" /* Set the msp back to the start of the stack. */
 					" svc 0					\n" /* System call to start first task. */
 				);
@@ -173,6 +172,9 @@ portBASE_TYPE xPortStartScheduler( void )
 	here already. */
 	prvSetupTimerInterrupt();
 
+	/* Initialise the critical nesting count ready for the first task. */
+	uxCriticalNesting = 0;
+
 	/* Start the first task. */
 	vPortStartFirstTask( *((unsigned portLONG *) 0 ) );
 
@@ -192,10 +194,6 @@ void vPortYieldFromISR( void )
 {
 	/* Set a PendSV to request a context switch. */
 	*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
-
-	/* This function is also called in response to a Yield(), so we want
-	the yield to occur immediately. */
-	portENABLE_INTERRUPTS();
 }
 /*-----------------------------------------------------------*/
 
@@ -227,35 +225,26 @@ void xPortPendSVHandler( void )
 	"	ldr	r3, pxCurrentTCBConst			\n" /* Get the location of the current TCB. */
 	"	ldr	r2, [r3]						\n"
 	"										\n"
-	"	ldr r1, uxCriticalNestingConst	\n" /* Save the remaining registers and the critical nesting count onto the task stack. */
+	"	stmdb r0!, {r4-r11}					\n" /* Save the remaining registers. */
-	"	ldr r1, [r1]					\n"
-	"	stmdb r0!, {r1,r4-r11}			\n"
 	"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
 	"										\n"
 	"	stmdb sp!, {r3, r14}				\n"
+	"	mov r0, %0							\n"
+	"	msr basepri, r0						\n"
 	"	bl vTaskSwitchContext				\n"
+	"	mov r0, #0							\n"
+	"	msr basepri, r0						\n"			
 	"	ldmia sp!, {r3, r14}				\n"
 	"										\n"	/* Restore the context, including the critical nesting count. */
 	"	ldr r1, [r3]						\n"
-	"	ldr r2, uxCriticalNestingConst	\n"
 	"	ldr r0, [r1]						\n" /* The first item in pxCurrentTCB is the task top of stack. */
-	"	ldmia r0!, {r1, r4-r11}			\n" /* Pop the registers and the critical nesting count. */
+	"	ldmia r0!, {r4-r11}					\n" /* Pop the registers. */
-	"	str r1, [r2]					\n" /* Save the new critical nesting value into ulCriticalNesting. */ 
 	"	msr psp, r0							\n"
-	"	orr r14, #0xd					\n"
-	"									\n"	/* Exit with interrupts in the state required by the task. */	
-	"	cbnz r1, sv_disable_interrupts	\n" /* If the nesting count is greater than 0 we need to exit with interrupts masked. */
-	"	bx r14							\n"
-	"									\n"
-	"sv_disable_interrupts:				\n" 
-	"	ldr r1, =ulKernelPriority 		\n"
-	"	ldr r1, [r1]					\n"
-	"	msr	basepri, r1					\n"
 	"	bx r14								\n"
 	"										\n"
 	"	.align 2							\n"
 	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
-	"uxCriticalNestingConst: .word uxCriticalNesting	\n"
+	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
 	);
 }
 /*-----------------------------------------------------------*/
@@ -267,7 +256,11 @@ void xPortSysTickHandler( void )
 		*(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
 	#endif
 
+	portSET_INTERRUPT_MASK_FROM_ISR();
+	{
 		vTaskIncrementTick();
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR();
 }
 /*-----------------------------------------------------------*/
 

Source/portable/GCC/ARM_CM3/portmacro.h

@@ -101,35 +101,39 @@ extern void vPortYieldFromISR( void );
 
 /* Critical section management. */
 
-#define vPortSetInterruptMask()							\
+/* 
+ * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
+ * registers.  r0 is clobbered.
+ */ 
+#define portSET_INTERRUPT_MASK()						\
 	__asm volatile										\
 	(													\
-		"	push { r0 }								\n"	\
+		"	mov r0, %0								\n"	\
-		"	ldr r0, =ulKernelPriority 				\n"	\
-		"	ldr r0, [r0]							\n"	\
 		"	msr basepri, r0							\n" \
-		"	pop { r0 }								"	\
+		::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0"	\
 	)
 	
-/*-----------------------------------------------------------*/
+/*
-
+ * Set basepri back to 0 without effective other registers.
-#define vPortClearInterruptMask()						\
+ * r0 is clobbered.
+ */
+#define portCLEAR_INTERRUPT_MASK()			\
 	__asm volatile							\
 	(										\
-		"	push { r0 }								\n"	\
 		"	mov r0, #0					\n"	\
 		"	msr basepri, r0				\n"	\
-		"	pop	 { r0 }								"	\
+		:::"r0"								\
 	)
 
-/*-----------------------------------------------------------*/
+#define portSET_INTERRUPT_MASK_FROM_ISR()		0;portSET_INTERRUPT_MASK()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)	portCLEAR_INTERRUPT_MASK()
 
 
 extern void vPortEnterCritical( void );
 extern void vPortExitCritical( void );
 
-#define portDISABLE_INTERRUPTS()	vPortSetInterruptMask();
+#define portDISABLE_INTERRUPTS()	portSET_INTERRUPT_MASK()
-#define portENABLE_INTERRUPTS()		vPortClearInterruptMask();
+#define portENABLE_INTERRUPTS()		portCLEAR_INTERRUPT_MASK()
 #define portENTER_CRITICAL()		vPortEnterCritical()
 #define portEXIT_CRITICAL()			vPortExitCritical()
 /*-----------------------------------------------------------*/