Richard Barry
e75b609c74
In small FreeRTOS applications it is unlikely there will be any task pools other than the system task pool. IotTaskPool_CreateRecyclableSystemJob() is therefore introduced to complement IotTaskPool_CreateRecyclableJob() that does not require the handle of the target task pool to be specified as a parameter. Likewise IotTaskPool_ScheduleSystemJob() is introduced to complement IotTaskPool_ScheduleJob() for the same reason.
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IotTaskPool_CreateSystemTaskPool() calls synchronisation primitives, so cannot be called before the scheduler starts. Add a configASSERT() to ensure the scheduler is running when it executes.
IotTaskPool_CreateSystemTaskPool() can conceivably be called from multiple different libraries that depend on the thread pool. In this version _IotSystemTaskPool.running can be used to check the system task pool has not already been created. If the task pool has been created simply return from IotTaskPool_CreateSystemTaskPool() instead of re-creating it (which would leak memory and leave orphaned tasks).
Call taskENTER_CRITICAL() and taskEXIT_CRITICAL() directly in place of mapping them to TASKPOOL_ENTER_CRITICAL() and TASKPOOL_EXIT_CRITICAL() in the same file.
Rename _timerThread() _timerCallback(), as it is a callback function and not a thread.
Remove the unused flags parameter from _scheduleInternal().
6 years ago
Richard Barry
76cc2a00c6
Add the first and most basic task pool example.
6 years ago
Richard Barry
87eb37342f
Create a project that builds a subset of the dependencies of the IoT SDK that have been brought into SVN thus far. The application does nothing other than build at this time.
6 years ago
Richard Barry
0b0a02b76a
Bring in a minimum subset of the IoT SDK - at this time just a subset of the library dependencies rather than the libraries themselves.
6 years ago
Richard Barry
fb3eaeac40
Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
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Added #define portPOINTER_SIZE_TYPE uint64_t to the 64-bit RISC-V port layer.
6 years ago
Richard Barry
b51529a284
Update version number ready for next release.
6 years ago
Gaurav Aggarwal
9e10b08a3a
Delete the Release configuration from the NXP project.
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Also, some cosmetic changes.
6 years ago
Richard Barry
db5d265c07
Removing obsolete code and files only.
6 years ago
Richard Barry
53cb12e389
Add M7/M4 AMP demo.
6 years ago
Gaurav Aggarwal
0b1a025789
Add NXP libs needed to build the project
6 years ago
Gaurav Aggarwal
aa9c8d2697
Delete the not needed file missed in last commit
6 years ago
Gaurav Aggarwal
b9e379951a
Do not strip required symbols when LTO is on
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Link time optimization was stripping off some symbols which were
accessed from assembly code.
6 years ago
Gaurav Aggarwal
b6e5f96f0e
Ensure that fault handlers are declared naked.
6 years ago
Gaurav Aggarwal
2279a86566
Add ARMv8M demo project for NXP LPC55S69.
6 years ago
Gaurav Aggarwal
ae448fc952
Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.
6 years ago
Richard Barry
079d081346
Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit.
6 years ago
Richard Barry
27ca5c8341
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation.
6 years ago
Richard Barry
84377442fc
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation.
6 years ago
Richard Barry
606845492b
Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
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Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
6 years ago
Gaurav Aggarwal
dd9a9710c6
Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack.
6 years ago
Gaurav Aggarwal
ba39a958b5
Fix spelling of priority in comments.
6 years ago
Gaurav Aggarwal
12fb75be37
Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
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portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
6 years ago
Richard Barry
2265d70499
Correcting spelling mistakes in comments only.
6 years ago
Richard Barry
06596c3192
Prepare the RISC-V port layer for addition of 64-bit port.
6 years ago
Richard Barry
50e67a89f1
Update version number in +TCP code.
6 years ago
Gaurav Aggarwal
5fe8465a35
Change type of usStackDepth to configSTACK_DEPTH_TYPE.
6 years ago
Gaurav Aggarwal
5623c69748
Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files.
6 years ago
Richard Barry
8b6ab5f197
Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
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Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
6 years ago
Gaurav Aggarwal
ceeff14524
Set default value of configRUN_FREERTOS_SECURE_ONLY to 0.
6 years ago
Gaurav Aggarwal
5849459c65
Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs.
6 years ago
Richard Barry
c3c9c12ce2
Update the common demo death.c to use the updated macro name to give it a secure context.
6 years ago
Gaurav Aggarwal
ce576f3683
First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees.
6 years ago
Richard Barry
58ba10eee8
Update version number in readiness for V10.2.0 release.
6 years ago
Gaurav Aggarwal
55ad3861c5
Sync the Renesas port to AFR Git Repo
6 years ago
Gaurav Aggarwal
0de2a2758a
Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
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tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
6 years ago
Gaurav Aggarwal
2c88fb7fa1
Fix build failure when dynamic allocation is not enabled.
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When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
6 years ago
Richard Barry
6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
6 years ago
Richard Barry
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
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Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
6 years ago
Richard Barry
3153131fa7
Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project.
6 years ago
Richard Barry
7e08fd6d07
Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks).
6 years ago
Richard Barry
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
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Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
6 years ago
Richard Barry
df5952f655
Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations.
6 years ago
Gaurav Aggarwal
817783d75c
Copyright updates from Cadence.
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e1df894752
6 years ago
Richard Barry
a4941ac5db
Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized.
6 years ago
Richard Barry
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
6 years ago
Richard Barry
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
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Add a project for the Vega board's RI5CY core.
6 years ago
Richard Barry
e2af102c80
Re-org of RISC-V file structure and naming step 2.
6 years ago
Richard Barry
818eeccc0c
Re-org of RISC-V file structure and naming step 1.
6 years ago
Richard Barry
3474e750fa
Create folder to hold RISC-V chip specific extensions.
6 years ago
Richard Barry
db750d0c82
Update RSIC-V port layer after testing saving and receiving of chip specific registers.
6 years ago