Add new port layer for Cortex-A devices without the means to mask interrupt priorities.
Richard Barry
11 years ago
parent
5b96c12e92
commit
f4a1a7d577
@ -0,0 +1,321 @@
|
|||||||
|
/*
|
||||||
|
FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
|
||||||
|
All rights reserved
|
||||||
|
|
||||||
|
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS provides completely free yet professionally developed, *
|
||||||
|
* robust, strictly quality controlled, supported, and cross *
|
||||||
|
* platform software that has become a de facto standard. *
|
||||||
|
* *
|
||||||
|
* Help yourself get started quickly and support the FreeRTOS *
|
||||||
|
* project by purchasing a FreeRTOS tutorial book, reference *
|
||||||
|
* manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||||
|
* *
|
||||||
|
* Thank you! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||||
|
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||||
|
>>! obliged to provide the source code for proprietary components !<<
|
||||||
|
>>! outside of the FreeRTOS kernel. !<<
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||||
|
link: http://www.freertos.org/a00114.html
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||||
|
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||||
|
licenses offer ticketed support, indemnification and middleware.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Standard includes. */
|
||||||
|
#include <stdlib.h>
|
||||||
|
|
||||||
|
/* IAR includes. */
|
||||||
|
#include <intrinsics.h>
|
||||||
|
|
||||||
|
/* Scheduler includes. */
|
||||||
|
#include "FreeRTOS.h"
|
||||||
|
#include "task.h"
|
||||||
|
|
||||||
|
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||||
|
/* Check the configuration. */
|
||||||
|
#if( configMAX_PRIORITIES > 32 )
|
||||||
|
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
|
||||||
|
#endif
|
||||||
|
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||||
|
|
||||||
|
/* A critical section is exited when the critical section nesting count reaches
|
||||||
|
this value. */
|
||||||
|
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||||
|
|
||||||
|
/* Tasks are not created with a floating point context, but can be given a
|
||||||
|
floating point context after they have been created. A variable is stored as
|
||||||
|
part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
|
||||||
|
does not have an FPU context, or any other value if the task does have an FPU
|
||||||
|
context. */
|
||||||
|
#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
|
||||||
|
|
||||||
|
/* Constants required to setup the initial task context. */
|
||||||
|
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||||
|
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||||
|
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
||||||
|
|
||||||
|
/* Masks all bits in the APSR other than the mode bits. */
|
||||||
|
#define portAPSR_MODE_BITS_MASK ( 0x1F )
|
||||||
|
|
||||||
|
/* The value of the mode bits in the APSR when the CPU is executing in user
|
||||||
|
mode. */
|
||||||
|
#define portAPSR_USER_MODE ( 0x10 )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Starts the first task executing. This function is necessarily written in
|
||||||
|
* assembly code so is implemented in portASM.s.
|
||||||
|
*/
|
||||||
|
extern void vPortRestoreTaskContext( void );
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* A variable is used to keep track of the critical section nesting. This
|
||||||
|
variable has to be stored as part of the task context and must be initialised to
|
||||||
|
a non zero value to ensure interrupts don't inadvertently become unmasked before
|
||||||
|
the scheduler starts. As it is stored as part of the task context it will
|
||||||
|
automatically be set to 0 when the first task is started. */
|
||||||
|
volatile uint32_t ulCriticalNesting = 9999UL;
|
||||||
|
|
||||||
|
/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
|
||||||
|
then a floating point context must be saved and restored for the task. */
|
||||||
|
uint32_t ulPortTaskHasFPUContext = pdFALSE;
|
||||||
|
|
||||||
|
/* Set to 1 to pend a context switch from an ISR. */
|
||||||
|
uint32_t ulPortYieldRequired = pdFALSE;
|
||||||
|
|
||||||
|
/* Counts the interrupt nesting depth. A context switch is only performed if
|
||||||
|
if the nesting depth is 0. */
|
||||||
|
uint32_t ulPortInterruptNesting = 0UL;
|
||||||
|
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
#warning What about branch distance in asm file.
|
||||||
|
#warning Does not support flop use in ISRs.
|
||||||
|
#warning Level interrupts must be cleared in their handling function.
|
||||||
|
#warning Can this be made generic by defining the vector address register externally?
|
||||||
|
|
||||||
|
/*
|
||||||
|
* See header file for description.
|
||||||
|
*/
|
||||||
|
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||||
|
{
|
||||||
|
/* Setup the initial stack of the task. The stack is set exactly as
|
||||||
|
expected by the portRESTORE_CONTEXT() macro.
|
||||||
|
|
||||||
|
The fist real value on the stack is the status register, which is set for
|
||||||
|
system mode, with interrupts enabled. A few NULLs are added first to ensure
|
||||||
|
GDB does not try decoding a non-existent return address. */
|
||||||
|
*pxTopOfStack = NULL;
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = NULL;
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = NULL;
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||||
|
|
||||||
|
if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
|
||||||
|
{
|
||||||
|
/* The task will start in THUMB mode. */
|
||||||
|
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
pxTopOfStack--;
|
||||||
|
#warning What about task exit error function?
|
||||||
|
/* Next the return address, which in this case is the start of the task. */
|
||||||
|
*pxTopOfStack = ( StackType_t ) pxCode;
|
||||||
|
pxTopOfStack--;
|
||||||
|
|
||||||
|
/* Next all the registers other than the stack pointer. */
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||||
|
pxTopOfStack--;
|
||||||
|
|
||||||
|
/* The task will start with a critical nesting count of 0 as interrupts are
|
||||||
|
enabled. */
|
||||||
|
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||||
|
pxTopOfStack--;
|
||||||
|
|
||||||
|
/* The task will start without a floating point context. A task that uses
|
||||||
|
the floating point hardware must call vPortTaskUsesFPU() before executing
|
||||||
|
any floating point instructions. */
|
||||||
|
*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
|
||||||
|
|
||||||
|
return pxTopOfStack;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
BaseType_t xPortStartScheduler( void )
|
||||||
|
{
|
||||||
|
uint32_t ulAPSR;
|
||||||
|
|
||||||
|
/* Only continue if the CPU is not in User mode. The CPU must be in a
|
||||||
|
Privileged mode for the scheduler to start. */
|
||||||
|
__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
|
||||||
|
ulAPSR &= portAPSR_MODE_BITS_MASK;
|
||||||
|
configASSERT( ulAPSR != portAPSR_USER_MODE );
|
||||||
|
|
||||||
|
if( ulAPSR != portAPSR_USER_MODE )
|
||||||
|
{
|
||||||
|
/* Start the timer that generates the tick ISR. */
|
||||||
|
configSETUP_TICK_INTERRUPT();
|
||||||
|
#warning Install spurious handler
|
||||||
|
__enable_irq();
|
||||||
|
vPortRestoreTaskContext();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Will only get here if xTaskStartScheduler() was called with the CPU in
|
||||||
|
a non-privileged mode or the binary point register was not set to its lowest
|
||||||
|
possible value. */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEndScheduler( void )
|
||||||
|
{
|
||||||
|
/* Not implemented in ports where there is nothing to return to.
|
||||||
|
Artificially force an assert. */
|
||||||
|
configASSERT( ulCriticalNesting == 1000UL );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEnterCritical( void )
|
||||||
|
{
|
||||||
|
portDISABLE_INTERRUPTS();
|
||||||
|
|
||||||
|
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||||
|
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||||
|
portENTER_CRITICAL() has been called. */
|
||||||
|
ulCriticalNesting++;
|
||||||
|
|
||||||
|
/* This is not the interrupt safe version of the enter critical function so
|
||||||
|
assert() if it is being called from an interrupt context. Only API
|
||||||
|
functions that end in "FromISR" can be used in an interrupt. Only assert if
|
||||||
|
the critical nesting count is 1 to protect against recursive calls if the
|
||||||
|
assert function also uses a critical section. */
|
||||||
|
if( ulCriticalNesting == 1 )
|
||||||
|
{
|
||||||
|
configASSERT( ulPortInterruptNesting == 0 );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortExitCritical( void )
|
||||||
|
{
|
||||||
|
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
/* Decrement the nesting count as the critical section is being
|
||||||
|
exited. */
|
||||||
|
ulCriticalNesting--;
|
||||||
|
|
||||||
|
/* If the nesting level has reached zero then all interrupt
|
||||||
|
priorities must be re-enabled. */
|
||||||
|
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
/* Critical nesting has reached zero so all interrupt priorities
|
||||||
|
should be unmasked. */
|
||||||
|
portENABLE_INTERRUPTS();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void FreeRTOS_Tick_Handler( void )
|
||||||
|
{
|
||||||
|
portDISABLE_INTERRUPTS();
|
||||||
|
|
||||||
|
/* Increment the RTOS tick. */
|
||||||
|
if( xTaskIncrementTick() != pdFALSE )
|
||||||
|
{
|
||||||
|
ulPortYieldRequired = pdTRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
portENABLE_INTERRUPTS();
|
||||||
|
configCLEAR_TICK_INTERRUPT();
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortTaskUsesFPU( void )
|
||||||
|
{
|
||||||
|
uint32_t ulInitialFPSCR = 0;
|
||||||
|
|
||||||
|
/* A task is registering the fact that it needs an FPU context. Set the
|
||||||
|
FPU flag (which is saved as part of the task context). */
|
||||||
|
ulPortTaskHasFPUContext = pdTRUE;
|
||||||
|
|
||||||
|
/* Initialise the floating point status register. */
|
||||||
|
__asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,145 @@
|
|||||||
|
;/*
|
||||||
|
; FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
|
||||||
|
; All rights reserved
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; ***************************************************************************
|
||||||
|
; * *
|
||||||
|
; * FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
; * Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
; * available. *
|
||||||
|
; * *
|
||||||
|
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
; * ensuring you get running as quickly as possible and with an *
|
||||||
|
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
; * the FreeRTOS project to continue with its mission of providing *
|
||||||
|
; * professional grade, cross platform, de facto standard solutions *
|
||||||
|
; * for microcontrollers - completely free of charge! *
|
||||||
|
; * *
|
||||||
|
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
; * *
|
||||||
|
; * Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
; * *
|
||||||
|
; ***************************************************************************
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; This file is part of the FreeRTOS distribution.
|
||||||
|
;
|
||||||
|
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
; the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||||
|
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
; provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||||
|
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
; more details. You should have received a copy of the GNU General Public
|
||||||
|
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||||
|
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||||
|
; by writing to Richard Barry, contact details for whom are available on the
|
||||||
|
; FreeRTOS WEB site.
|
||||||
|
;
|
||||||
|
; 1 tab == 4 spaces!
|
||||||
|
;
|
||||||
|
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||||
|
; contact details.
|
||||||
|
;
|
||||||
|
; http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||||
|
; critical systems.
|
||||||
|
;
|
||||||
|
; http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||||
|
; licensing and training services.
|
||||||
|
;*/
|
||||||
|
|
||||||
|
EXTERN vTaskSwitchContext
|
||||||
|
EXTERN ulCriticalNesting
|
||||||
|
EXTERN pxCurrentTCB
|
||||||
|
EXTERN ulPortTaskHasFPUContext
|
||||||
|
EXTERN ulAsmAPIPriorityMask
|
||||||
|
|
||||||
|
portSAVE_CONTEXT macro
|
||||||
|
|
||||||
|
; Save the LR and SPSR onto the system mode stack before switching to
|
||||||
|
; system mode to save the remaining system mode registers
|
||||||
|
SRSDB sp!, #SYS_MODE
|
||||||
|
CPS #SYS_MODE
|
||||||
|
PUSH {R0-R12, R14}
|
||||||
|
|
||||||
|
; Push the critical nesting count
|
||||||
|
LDR R2, =ulCriticalNesting
|
||||||
|
LDR R1, [R2]
|
||||||
|
PUSH {R1}
|
||||||
|
|
||||||
|
; Does the task have a floating point context that needs saving? If
|
||||||
|
; ulPortTaskHasFPUContext is 0 then no.
|
||||||
|
LDR R2, =ulPortTaskHasFPUContext
|
||||||
|
LDR R3, [R2]
|
||||||
|
CMP R3, #0
|
||||||
|
|
||||||
|
; Save the floating point context, if any
|
||||||
|
FMRXNE R1, FPSCR
|
||||||
|
VPUSHNE {D0-D15}
|
||||||
|
VPUSHNE {D16-D31}
|
||||||
|
PUSHNE {R1}
|
||||||
|
|
||||||
|
; Save ulPortTaskHasFPUContext itself
|
||||||
|
PUSH {R3}
|
||||||
|
|
||||||
|
; Save the stack pointer in the TCB
|
||||||
|
LDR R0, =pxCurrentTCB
|
||||||
|
LDR R1, [R0]
|
||||||
|
STR SP, [R1]
|
||||||
|
|
||||||
|
endm
|
||||||
|
|
||||||
|
; /**********************************************************************/
|
||||||
|
|
||||||
|
portRESTORE_CONTEXT macro
|
||||||
|
|
||||||
|
; Switch to system mode
|
||||||
|
CPS #SYS_MODE
|
||||||
|
|
||||||
|
; Set the SP to point to the stack of the task being restored.
|
||||||
|
LDR R0, =pxCurrentTCB
|
||||||
|
LDR R1, [R0]
|
||||||
|
LDR SP, [R1]
|
||||||
|
|
||||||
|
; Is there a floating point context to restore? If the restored
|
||||||
|
; ulPortTaskHasFPUContext is zero then no.
|
||||||
|
LDR R0, =ulPortTaskHasFPUContext
|
||||||
|
POP {R1}
|
||||||
|
STR R1, [R0]
|
||||||
|
CMP R1, #0
|
||||||
|
|
||||||
|
; Restore the floating point context, if any
|
||||||
|
POPNE {R0}
|
||||||
|
VPOPNE {D16-D31}
|
||||||
|
VPOPNE {D0-D15}
|
||||||
|
VMSRNE FPSCR, R0
|
||||||
|
|
||||||
|
; Restore the critical section nesting depth
|
||||||
|
LDR R0, =ulCriticalNesting
|
||||||
|
POP {R1}
|
||||||
|
STR R1, [R0]
|
||||||
|
|
||||||
|
; Ensure the priority mask is correct for the critical nesting depth
|
||||||
|
;_RB_ LDR R2, =portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS
|
||||||
|
CMP R1, #0
|
||||||
|
MOVEQ R4, #255
|
||||||
|
;_RB_ LDRNE R4, =( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT )
|
||||||
|
STR R4, [r2]
|
||||||
|
|
||||||
|
; Restore all system mode registers other than the SP (which is already
|
||||||
|
; being used)
|
||||||
|
POP {R0-R12, R14}
|
||||||
|
|
||||||
|
; Return to the task code, loading CPSR on the way.
|
||||||
|
RFEIA sp!
|
||||||
|
|
||||||
|
endm
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,198 @@
|
|||||||
|
;/*
|
||||||
|
; FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
|
||||||
|
; All rights reserved
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; ***************************************************************************
|
||||||
|
; * *
|
||||||
|
; * FreeRTOS tutorial books are available in pdf and paperback. *
|
||||||
|
; * Complete, revised, and edited pdf reference manuals are also *
|
||||||
|
; * available. *
|
||||||
|
; * *
|
||||||
|
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||||
|
; * ensuring you get running as quickly as possible and with an *
|
||||||
|
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||||
|
; * the FreeRTOS project to continue with its mission of providing *
|
||||||
|
; * professional grade, cross platform, de facto standard solutions *
|
||||||
|
; * for microcontrollers - completely free of charge! *
|
||||||
|
; * *
|
||||||
|
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||||
|
; * *
|
||||||
|
; * Thank you for using FreeRTOS, and thank you for your support! *
|
||||||
|
; * *
|
||||||
|
; ***************************************************************************
|
||||||
|
;
|
||||||
|
;
|
||||||
|
; This file is part of the FreeRTOS distribution.
|
||||||
|
;
|
||||||
|
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
; the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||||
|
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||||
|
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||||
|
; provide the source code for proprietary components outside of the FreeRTOS
|
||||||
|
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||||
|
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
; more details. You should have received a copy of the GNU General Public
|
||||||
|
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||||
|
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||||
|
; by writing to Richard Barry, contact details for whom are available on the
|
||||||
|
; FreeRTOS WEB site.
|
||||||
|
;
|
||||||
|
; 1 tab == 4 spaces!
|
||||||
|
;
|
||||||
|
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||||
|
; contact details.
|
||||||
|
;
|
||||||
|
; http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||||
|
; critical systems.
|
||||||
|
;
|
||||||
|
; http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||||
|
; licensing and training services.
|
||||||
|
;*/
|
||||||
|
|
||||||
|
INCLUDE FreeRTOSConfig.h
|
||||||
|
INCLUDE portmacro.h
|
||||||
|
|
||||||
|
EXTERN vTaskSwitchContext
|
||||||
|
EXTERN ulPortYieldRequired
|
||||||
|
EXTERN ulPortInterruptNesting
|
||||||
|
|
||||||
|
PUBLIC FreeRTOS_SWI_Handler
|
||||||
|
PUBLIC FreeRTOS_IRQ_Handler
|
||||||
|
PUBLIC vPortRestoreTaskContext
|
||||||
|
|
||||||
|
SYS_MODE EQU 0x1f
|
||||||
|
SVC_MODE EQU 0x13
|
||||||
|
IRQ_MODE EQU 0x12
|
||||||
|
|
||||||
|
; AIC register definitions.
|
||||||
|
AIC_IVR EQU 0xFFFFF010UL
|
||||||
|
AIC_EOICR EQU 0xFFFFF038UL
|
||||||
|
|
||||||
|
SECTION .text:CODE:ROOT(2)
|
||||||
|
ARM
|
||||||
|
|
||||||
|
INCLUDE portASM.h
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; SVC handler is used to start the scheduler and yield a task.
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
FreeRTOS_SWI_Handler
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
|
||||||
|
; Save the context of the current task and select a new task to run.
|
||||||
|
portSAVE_CONTEXT
|
||||||
|
LDR R0, =vTaskSwitchContext
|
||||||
|
BLX R0
|
||||||
|
|
||||||
|
vPortRestoreTaskContext
|
||||||
|
portRESTORE_CONTEXT
|
||||||
|
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
; AIC interrupt handler
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
FreeRTOS_IRQ_Handler
|
||||||
|
|
||||||
|
; Return to the interrupted instruction.
|
||||||
|
SUB lr, lr, #4
|
||||||
|
|
||||||
|
; Push the return address and SPSR
|
||||||
|
PUSH {lr}
|
||||||
|
MRS lr, SPSR
|
||||||
|
PUSH {lr}
|
||||||
|
|
||||||
|
; Change to supervisor mode to allow reentry.
|
||||||
|
CPS #SVC_MODE
|
||||||
|
|
||||||
|
; Push used registers.
|
||||||
|
PUSH {r0-r4, r12}
|
||||||
|
|
||||||
|
; Increment nesting count. r3 holds the address of ulPortInterruptNesting
|
||||||
|
; for future use. r1 holds the original ulPortInterruptNesting value for
|
||||||
|
; future use.
|
||||||
|
LDR r3, =ulPortInterruptNesting
|
||||||
|
LDR r1, [r3]
|
||||||
|
ADD r4, r1, #1
|
||||||
|
STR r4, [r3]
|
||||||
|
|
||||||
|
; Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
|
||||||
|
; future use.
|
||||||
|
MOV r2, sp
|
||||||
|
AND r2, r2, #4
|
||||||
|
SUB sp, sp, r2
|
||||||
|
|
||||||
|
; Call the interrupt handler
|
||||||
|
PUSH {r0-r3, lr}
|
||||||
|
LDR r1, =AIC_IVR
|
||||||
|
LDR r0, [r1]
|
||||||
|
STR r1, [r1] ; Write to IVR in case protect mode is being used.
|
||||||
|
BLX r0
|
||||||
|
POP {r0-r3, lr}
|
||||||
|
ADD sp, sp, r2
|
||||||
|
|
||||||
|
CPSID i
|
||||||
|
|
||||||
|
; Write to the EOI register
|
||||||
|
LDR r4, =AIC_EOICR
|
||||||
|
STR r0, [r4]
|
||||||
|
|
||||||
|
; Restore the old nesting count
|
||||||
|
STR r1, [r3]
|
||||||
|
|
||||||
|
; A context switch is never performed if the nesting count is not 0
|
||||||
|
CMP r1, #0
|
||||||
|
BNE exit_without_switch
|
||||||
|
|
||||||
|
; Did the interrupt request a context switch? r1 holds the address of
|
||||||
|
; ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
|
||||||
|
; use.
|
||||||
|
LDR r1, =ulPortYieldRequired
|
||||||
|
LDR r0, [r1]
|
||||||
|
CMP r0, #0
|
||||||
|
BNE switch_before_exit
|
||||||
|
|
||||||
|
exit_without_switch
|
||||||
|
; No context switch. Restore used registers, LR_irq and SPSR before
|
||||||
|
; returning.
|
||||||
|
POP {r0-r4, r12}
|
||||||
|
CPS #IRQ_MODE
|
||||||
|
POP {LR}
|
||||||
|
MSR SPSR_cxsf, LR
|
||||||
|
POP {LR}
|
||||||
|
MOVS PC, LR
|
||||||
|
|
||||||
|
switch_before_exit
|
||||||
|
; A context switch is to be performed. Clear the context switch pending
|
||||||
|
; flag.
|
||||||
|
MOV r0, #0
|
||||||
|
STR r0, [r1]
|
||||||
|
|
||||||
|
; Restore used registers, LR-irq and SPSR before saving the context
|
||||||
|
; to the task stack.
|
||||||
|
POP {r0-r4, r12}
|
||||||
|
CPS #IRQ_MODE
|
||||||
|
POP {LR}
|
||||||
|
MSR SPSR_cxsf, LR
|
||||||
|
POP {LR}
|
||||||
|
portSAVE_CONTEXT
|
||||||
|
|
||||||
|
; Call the function that selects the new task to execute.
|
||||||
|
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||||
|
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||||
|
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||||
|
LDR r0, =vTaskSwitchContext
|
||||||
|
BLX r0
|
||||||
|
|
||||||
|
; Restore the context of, and branch to, the task selected to execute next.
|
||||||
|
portRESTORE_CONTEXT
|
||||||
|
|
||||||
|
|
||||||
|
END
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,192 @@
|
|||||||
|
/*
|
||||||
|
FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
|
||||||
|
All rights reserved
|
||||||
|
|
||||||
|
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* FreeRTOS provides completely free yet professionally developed, *
|
||||||
|
* robust, strictly quality controlled, supported, and cross *
|
||||||
|
* platform software that has become a de facto standard. *
|
||||||
|
* *
|
||||||
|
* Help yourself get started quickly and support the FreeRTOS *
|
||||||
|
* project by purchasing a FreeRTOS tutorial book, reference *
|
||||||
|
* manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||||
|
* *
|
||||||
|
* Thank you! *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
This file is part of the FreeRTOS distribution.
|
||||||
|
|
||||||
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||||
|
the terms of the GNU General Public License (version 2) as published by the
|
||||||
|
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||||
|
|
||||||
|
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||||
|
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||||
|
>>! obliged to provide the source code for proprietary components !<<
|
||||||
|
>>! outside of the FreeRTOS kernel. !<<
|
||||||
|
|
||||||
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||||
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||||
|
FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||||
|
link: http://www.freertos.org/a00114.html
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
* *
|
||||||
|
* Having a problem? Start by reading the FAQ "My application does *
|
||||||
|
* not run, what could be wrong?" *
|
||||||
|
* *
|
||||||
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||||
|
* *
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||||
|
license and Real Time Engineers Ltd. contact details.
|
||||||
|
|
||||||
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||||
|
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||||
|
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||||
|
|
||||||
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||||
|
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||||
|
licenses offer ticketed support, indemnification and middleware.
|
||||||
|
|
||||||
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||||
|
engineered and independently SIL3 certified version for use in safety and
|
||||||
|
mission critical applications that require provable dependability.
|
||||||
|
|
||||||
|
1 tab == 4 spaces!
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef PORTMACRO_H
|
||||||
|
#define PORTMACRO_H
|
||||||
|
|
||||||
|
/* IAR includes. */
|
||||||
|
#ifdef __ICCARM__
|
||||||
|
|
||||||
|
#include <intrinsics.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Port specific definitions.
|
||||||
|
*
|
||||||
|
* The settings in this file configure FreeRTOS correctly for the given hardware
|
||||||
|
* and compiler.
|
||||||
|
*
|
||||||
|
* These settings should not be altered.
|
||||||
|
*-----------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Type definitions. */
|
||||||
|
#define portCHAR char
|
||||||
|
#define portFLOAT float
|
||||||
|
#define portDOUBLE double
|
||||||
|
#define portLONG long
|
||||||
|
#define portSHORT short
|
||||||
|
#define portSTACK_TYPE uint32_t
|
||||||
|
#define portBASE_TYPE long
|
||||||
|
|
||||||
|
typedef portSTACK_TYPE StackType_t;
|
||||||
|
typedef long BaseType_t;
|
||||||
|
typedef unsigned long UBaseType_t;
|
||||||
|
|
||||||
|
typedef uint32_t TickType_t;
|
||||||
|
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Hardware specifics. */
|
||||||
|
#define portSTACK_GROWTH ( -1 )
|
||||||
|
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||||
|
#define portBYTE_ALIGNMENT 8
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Task utilities. */
|
||||||
|
|
||||||
|
/* Called at the end of an ISR that can cause a context switch. */
|
||||||
|
#define portEND_SWITCHING_ISR( xSwitchRequired )\
|
||||||
|
{ \
|
||||||
|
extern uint32_t ulPortYieldRequired; \
|
||||||
|
\
|
||||||
|
if( xSwitchRequired != pdFALSE ) \
|
||||||
|
{ \
|
||||||
|
ulPortYieldRequired = pdTRUE; \
|
||||||
|
} \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||||
|
#define portYIELD() __asm( "SWI 0" );
|
||||||
|
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
* Critical section control
|
||||||
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
|
extern void vPortEnterCritical( void );
|
||||||
|
extern void vPortExitCritical( void );
|
||||||
|
extern uint32_t ulPortSetInterruptMask( void );
|
||||||
|
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
||||||
|
|
||||||
|
#define portENTER_CRITICAL() vPortEnterCritical();
|
||||||
|
#define portEXIT_CRITICAL() vPortExitCritical();
|
||||||
|
#define portDISABLE_INTERRUPTS() __disable_irq() /* No priority mask register so global disable is used. */
|
||||||
|
#define portENABLE_INTERRUPTS() __enable_irq()
|
||||||
|
#define portSET_INTERRUPT_MASK_FROM_ISR() __get_interrupt_state()
|
||||||
|
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) __set_interrupt_state(x)
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||||
|
not required for this port but included in case common demo code that uses these
|
||||||
|
macros is used. */
|
||||||
|
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||||
|
|
||||||
|
/* Prototype of the FreeRTOS tick handler. This must be installed as the
|
||||||
|
handler for whichever peripheral is used to generate the RTOS tick. */
|
||||||
|
void FreeRTOS_Tick_Handler( void );
|
||||||
|
|
||||||
|
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
||||||
|
before any floating point instructions are executed. */
|
||||||
|
void vPortTaskUsesFPU( void );
|
||||||
|
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
||||||
|
|
||||||
|
/* Architecture specific optimisations. */
|
||||||
|
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||||
|
|
||||||
|
/* Store/clear the ready priorities in a bit map. */
|
||||||
|
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||||
|
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
|
||||||
|
|
||||||
|
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||||
|
|
||||||
|
#define portNOP() __asm volatile( "NOP" )
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
} /* extern C */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Suppress warnings that are generated by the IAR tools, but cannot be
|
||||||
|
fixed in the source code because to do so would cause other compilers to
|
||||||
|
generate warnings. */
|
||||||
|
#pragma diag_suppress=Pe191
|
||||||
|
#pragma diag_suppress=Pa082
|
||||||
|
|
||||||
|
#endif /* __ICCARM__ */
|
||||||
|
|
||||||
|
#endif /* PORTMACRO_H */
|
||||||
|
|
||||||
Loading…
Reference in New Issue