Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead.
Yuhui.Zheng
6 years ago
parent
9052882500
commit
f001126ea8
@ -1,324 +0,0 @@
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/*
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* FreeRTOS Kernel V10.2.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Check the configuration. */
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#if( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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#endif
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#ifndef configSETUP_TICK_INTERRUPT
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#error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt.
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#endif
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#ifndef configCLEAR_TICK_INTERRUPT
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#error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt.
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#endif
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/* A critical section is exited when the critical section nesting count reaches
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this value. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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/* Tasks are not created with a floating point context, but can be given a
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floating point context after they have been created. A variable is stored as
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part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task
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does not have an FPU context, or any other value if the task does have an FPU
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context. */
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#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 )
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/* Constants required to setup the initial task context. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portTHUMB_MODE_ADDRESS ( 0x01UL )
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/* Masks all bits in the APSR other than the mode bits. */
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#define portAPSR_MODE_BITS_MASK ( 0x1F )
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/* The value of the mode bits in the APSR when the CPU is executing in user
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mode. */
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#define portAPSR_USER_MODE ( 0x10 )
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/* Let the user override the pre-loading of the initial LR with the address of
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prvTaskExitError() in case it messes up unwinding of the stack in the
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debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/*-----------------------------------------------------------*/
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/*
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* Starts the first task executing. This function is necessarily written in
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* assembly code so is implemented in portASM.s.
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*/
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extern void vPortRestoreTaskContext( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/* A variable is used to keep track of the critical section nesting. This
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variable has to be stored as part of the task context and must be initialised to
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a non zero value to ensure interrupts don't inadvertently become unmasked before
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the scheduler starts. As it is stored as part of the task context it will
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automatically be set to 0 when the first task is started. */
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volatile uint32_t ulCriticalNesting = 9999UL;
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/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
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a floating point context must be saved and restored for the task. */
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volatile uint32_t ulPortTaskHasFPUContext = pdFALSE;
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/* Set to 1 to pend a context switch from an ISR. */
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volatile uint32_t ulPortYieldRequired = pdFALSE;
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/* Counts the interrupt nesting depth. A context switch is only performed if
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if the nesting depth is 0. */
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volatile uint32_t ulPortInterruptNesting = 0UL;
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/* Used in the asm file to clear an interrupt. */
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__attribute__(( used )) const uint32_t ulICCEOIR = configEOI_ADDRESS;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro.
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The fist real value on the stack is the status register, which is set for
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system mode, with interrupts enabled. A few NULLs are added first to ensure
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GDB does not try decoding a non-existent return address. */
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*pxTopOfStack = ( StackType_t ) NULL;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) NULL;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) NULL;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL )
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{
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/* The task will start in THUMB mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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pxTopOfStack--;
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/* Next the return address, which in this case is the start of the task. */
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*pxTopOfStack = ( StackType_t ) pxCode;
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pxTopOfStack--;
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/* Next all the registers other than the stack pointer. */
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The task will start with a critical nesting count of 0 as interrupts are
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enabled. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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pxTopOfStack--;
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/* The task will start without a floating point context. A task that uses
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the floating point hardware must call vPortTaskUsesFPU() before executing
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any floating point instructions. */
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*pxTopOfStack = portNO_FLOATING_POINT_CONTEXT;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( ulPortInterruptNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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uint32_t ulAPSR;
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/* Only continue if the CPU is not in User mode. The CPU must be in a
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Privileged mode for the scheduler to start. */
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__asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) );
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ulAPSR &= portAPSR_MODE_BITS_MASK;
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configASSERT( ulAPSR != portAPSR_USER_MODE );
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if( ulAPSR != portAPSR_USER_MODE )
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{
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/* Start the timer that generates the tick ISR. */
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portDISABLE_INTERRUPTS();
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configSETUP_TICK_INTERRUPT();
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/* Start the first task executing. */
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vPortRestoreTaskContext();
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}
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/* Will only get here if vTaskStartScheduler() was called with the CPU in
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a non-privileged mode or the binary point register was not set to its lowest
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possible value. prvTaskExitError() is referenced to prevent a compiler
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warning about it being defined but not referenced in the case that the user
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defines their own exit address. */
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( void ) prvTaskExitError;
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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/* This is not the interrupt safe version of the enter critical function so
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assert() if it is being called from an interrupt context. Only API
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functions that end in "FromISR" can be used in an interrupt. Only assert if
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the critical nesting count is 1 to protect against recursive calls if the
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assert function also uses a critical section. */
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if( ulCriticalNesting == 1 )
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{
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configASSERT( ulPortInterruptNesting == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as the critical section is being
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exited. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then all interrupt
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priorities must be re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Critical nesting has reached zero so all interrupt priorities
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should be unmasked. */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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void FreeRTOS_Tick_Handler( void )
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{
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uint32_t ulInterruptStatus;
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ulInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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ulPortYieldRequired = pdTRUE;
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulInterruptStatus );
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configCLEAR_TICK_INTERRUPT();
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}
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/*-----------------------------------------------------------*/
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void vPortTaskUsesFPU( void )
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{
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#if configFPU == 1
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uint32_t ulInitialFPSCR = 0;
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/* A task is registering the fact that it needs an FPU context. Set the
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FPU flag (which is saved as part of the task context). */
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ulPortTaskHasFPUContext = pdTRUE;
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/* Initialise the floating point status register. */
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__asm volatile ( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
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#else
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/* If FreeRTOS was built without FPU support but a task is using the FPU, we have a problem */
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configASSERT( 0 );
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#endif
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}
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/*-----------------------------------------------------------*/
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@ -1,268 +0,0 @@
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/*
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* FreeRTOS Kernel V10.2.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
|
||||||
* this software and associated documentation files (the "Software"), to deal in
|
|
||||||
* the Software without restriction, including without limitation the rights to
|
|
||||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
|
||||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
|
||||||
* subject to the following conditions:
|
|
||||||
*
|
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||||||
* The above copyright notice and this permission notice shall be included in all
|
|
||||||
* copies or substantial portions of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
|
||||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
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||||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
|
||||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
||||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
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||||||
* http://www.FreeRTOS.org
|
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||||||
* http://aws.amazon.com/freertos
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||||||
*
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* 1 tab == 4 spaces!
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*/
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.text
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.arm
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.set SYS_MODE, 0x1f
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.set SVC_MODE, 0x13
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.set IRQ_MODE, 0x12
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/* Variables and functions. */
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.extern ulMaxAPIPriorityMask
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.extern _freertos_vector_table
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vApplicationIRQHandler
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.extern ulPortInterruptNesting
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.extern ulPortTaskHasFPUContext
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.extern ulICCEOIR
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.extern ulPortYieldRequired
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.global FreeRTOS_IRQ_Handler
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.global FreeRTOS_SVC_Handler
|
|
||||||
.global vPortRestoreTaskContext
|
|
||||||
|
|
||||||
|
|
||||||
.macro portSAVE_CONTEXT
|
|
||||||
|
|
||||||
/* Save the LR and SPSR onto the system mode stack before switching to
|
|
||||||
system mode to save the remaining system mode registers. */
|
|
||||||
SRSDB sp!, #SYS_MODE
|
|
||||||
CPS #SYS_MODE
|
|
||||||
PUSH {R0-R12, R14}
|
|
||||||
|
|
||||||
/* Push the critical nesting count. */
|
|
||||||
LDR R2, ulCriticalNestingConst
|
|
||||||
LDR R1, [R2]
|
|
||||||
PUSH {R1}
|
|
||||||
|
|
||||||
/* Does the task have a floating point context that needs saving? If
|
|
||||||
ulPortTaskHasFPUContext is 0 then no. */
|
|
||||||
LDR R2, ulPortTaskHasFPUContextConst
|
|
||||||
LDR R3, [R2]
|
|
||||||
CMP R3, #0
|
|
||||||
|
|
||||||
#if configFPU == 1
|
|
||||||
/* Save the floating point context, if any. */
|
|
||||||
FMRXNE R1, FPSCR
|
|
||||||
VPUSHNE {D0-D15}
|
|
||||||
#if configFPU_D32 == 1
|
|
||||||
VPUSHNE {D16-D31}
|
|
||||||
#endif /* configFPU_D32 */
|
|
||||||
PUSHNE {R1}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Save ulPortTaskHasFPUContext itself. */
|
|
||||||
PUSH {R3}
|
|
||||||
|
|
||||||
/* Save the stack pointer in the TCB. */
|
|
||||||
LDR R0, pxCurrentTCBConst
|
|
||||||
LDR R1, [R0]
|
|
||||||
STR SP, [R1]
|
|
||||||
|
|
||||||
.endm
|
|
||||||
|
|
||||||
; /**********************************************************************/
|
|
||||||
|
|
||||||
.macro portRESTORE_CONTEXT
|
|
||||||
|
|
||||||
/* Set the SP to point to the stack of the task being restored. */
|
|
||||||
LDR R0, pxCurrentTCBConst
|
|
||||||
LDR R1, [R0]
|
|
||||||
LDR SP, [R1]
|
|
||||||
|
|
||||||
/* Is there a floating point context to restore? If the restored
|
|
||||||
ulPortTaskHasFPUContext is zero then no. */
|
|
||||||
LDR R0, ulPortTaskHasFPUContextConst
|
|
||||||
POP {R1}
|
|
||||||
STR R1, [R0]
|
|
||||||
CMP R1, #0
|
|
||||||
|
|
||||||
#if configFPU == 1
|
|
||||||
/* Restore the floating point context, if any. */
|
|
||||||
POPNE {R0}
|
|
||||||
#if configFPU_D32 == 1
|
|
||||||
VPOPNE {D16-D31}
|
|
||||||
#endif /* configFPU_D32 */
|
|
||||||
VPOPNE {D0-D15}
|
|
||||||
VMSRNE FPSCR, R0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Restore the critical section nesting depth. */
|
|
||||||
LDR R0, ulCriticalNestingConst
|
|
||||||
POP {R1}
|
|
||||||
STR R1, [R0]
|
|
||||||
|
|
||||||
/* Restore all system mode registers other than the SP (which is already
|
|
||||||
being used). */
|
|
||||||
POP {R0-R12, R14}
|
|
||||||
|
|
||||||
/* Return to the task code, loading CPSR on the way. */
|
|
||||||
RFEIA sp!
|
|
||||||
|
|
||||||
.endm
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* SVC handler is used to yield.
|
|
||||||
*****************************************************************************/
|
|
||||||
.align 4
|
|
||||||
.type FreeRTOS_SVC_Handler, %function
|
|
||||||
FreeRTOS_SVC_Handler:
|
|
||||||
/* Save the context of the current task and select a new task to run. */
|
|
||||||
portSAVE_CONTEXT
|
|
||||||
LDR R0, vTaskSwitchContextConst
|
|
||||||
BLX R0
|
|
||||||
portRESTORE_CONTEXT
|
|
||||||
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* vPortRestoreTaskContext is used to start the scheduler.
|
|
||||||
*****************************************************************************/
|
|
||||||
.align 4
|
|
||||||
.type vPortRestoreTaskContext, %function
|
|
||||||
vPortRestoreTaskContext:
|
|
||||||
/* Switch to system mode. */
|
|
||||||
CPS #SYS_MODE
|
|
||||||
portRESTORE_CONTEXT
|
|
||||||
|
|
||||||
.align 4
|
|
||||||
.type FreeRTOS_IRQ_Handler, %function
|
|
||||||
FreeRTOS_IRQ_Handler:
|
|
||||||
/* Return to the interrupted instruction. */
|
|
||||||
SUB lr, lr, #4
|
|
||||||
|
|
||||||
/* Push the return address and SPSR. */
|
|
||||||
PUSH {lr}
|
|
||||||
MRS lr, SPSR
|
|
||||||
PUSH {lr}
|
|
||||||
|
|
||||||
/* Change to supervisor mode to allow reentry. */
|
|
||||||
CPS #0x13
|
|
||||||
|
|
||||||
/* Push used registers. */
|
|
||||||
PUSH {r0-r3, r12}
|
|
||||||
|
|
||||||
/* Increment nesting count. r3 holds the address of ulPortInterruptNesting
|
|
||||||
for future use. r1 holds the original ulPortInterruptNesting value for
|
|
||||||
future use. */
|
|
||||||
LDR r3, ulPortInterruptNestingConst
|
|
||||||
LDR r1, [r3]
|
|
||||||
ADD r0, r1, #1
|
|
||||||
STR r0, [r3]
|
|
||||||
|
|
||||||
/* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
|
|
||||||
future use. */
|
|
||||||
MOV r0, sp
|
|
||||||
AND r2, r0, #4
|
|
||||||
SUB sp, sp, r2
|
|
||||||
|
|
||||||
/* Call the interrupt handler. */
|
|
||||||
PUSH {r0-r3, lr}
|
|
||||||
LDR r1, vApplicationIRQHandlerConst
|
|
||||||
BLX r1
|
|
||||||
POP {r0-r3, lr}
|
|
||||||
ADD sp, sp, r2
|
|
||||||
|
|
||||||
CPSID i
|
|
||||||
DSB
|
|
||||||
ISB
|
|
||||||
|
|
||||||
/* Write to the EOI register. */
|
|
||||||
LDR r0, ulICCEOIRConst
|
|
||||||
LDR r2, [r0]
|
|
||||||
STR r0, [r2]
|
|
||||||
|
|
||||||
/* Restore the old nesting count. */
|
|
||||||
STR r1, [r3]
|
|
||||||
|
|
||||||
/* A context switch is never performed if the nesting count is not 0. */
|
|
||||||
CMP r1, #0
|
|
||||||
BNE exit_without_switch
|
|
||||||
|
|
||||||
/* Did the interrupt request a context switch? r1 holds the address of
|
|
||||||
ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
|
|
||||||
use. */
|
|
||||||
LDR r1, ulPortYieldRequiredConst
|
|
||||||
LDR r0, [r1]
|
|
||||||
CMP r0, #0
|
|
||||||
BNE switch_before_exit
|
|
||||||
|
|
||||||
exit_without_switch:
|
|
||||||
/* No context switch. Restore used registers, LR_irq and SPSR before
|
|
||||||
returning. */
|
|
||||||
POP {r0-r3, r12}
|
|
||||||
CPS #IRQ_MODE
|
|
||||||
POP {LR}
|
|
||||||
MSR SPSR_cxsf, LR
|
|
||||||
POP {LR}
|
|
||||||
MOVS PC, LR
|
|
||||||
|
|
||||||
switch_before_exit:
|
|
||||||
/* A context swtich is to be performed. Clear the context switch pending
|
|
||||||
flag. */
|
|
||||||
MOV r0, #0
|
|
||||||
STR r0, [r1]
|
|
||||||
|
|
||||||
/* Restore used registers, LR-irq and SPSR before saving the context
|
|
||||||
to the task stack. */
|
|
||||||
POP {r0-r3, r12}
|
|
||||||
CPS #IRQ_MODE
|
|
||||||
POP {LR}
|
|
||||||
MSR SPSR_cxsf, LR
|
|
||||||
POP {LR}
|
|
||||||
portSAVE_CONTEXT
|
|
||||||
|
|
||||||
/* Call the function that selects the new task to execute.
|
|
||||||
vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
|
||||||
instructions, or 8 byte aligned stack allocated data. LR does not need
|
|
||||||
saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
|
|
||||||
LDR R0, vTaskSwitchContextConst
|
|
||||||
BLX R0
|
|
||||||
|
|
||||||
/* Restore the context of, and branch to, the task selected to execute
|
|
||||||
next. */
|
|
||||||
portRESTORE_CONTEXT
|
|
||||||
|
|
||||||
ulICCEOIRConst: .word ulICCEOIR
|
|
||||||
pxCurrentTCBConst: .word pxCurrentTCB
|
|
||||||
ulCriticalNestingConst: .word ulCriticalNesting
|
|
||||||
ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
|
|
||||||
vTaskSwitchContextConst: .word vTaskSwitchContext
|
|
||||||
vApplicationIRQHandlerConst: .word vApplicationIRQHandler
|
|
||||||
ulPortInterruptNestingConst: .word ulPortInterruptNesting
|
|
||||||
ulPortYieldRequiredConst: .word ulPortYieldRequired
|
|
||||||
|
|
||||||
.end
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -1,179 +0,0 @@
|
|||||||
/*
|
|
||||||
* FreeRTOS Kernel V10.2.0
|
|
||||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
|
||||||
* this software and associated documentation files (the "Software"), to deal in
|
|
||||||
* the Software without restriction, including without limitation the rights to
|
|
||||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
|
||||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
|
||||||
* subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice shall be included in all
|
|
||||||
* copies or substantial portions of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
|
||||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
|
||||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
|
||||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
||||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
* http://www.FreeRTOS.org
|
|
||||||
* http://aws.amazon.com/freertos
|
|
||||||
*
|
|
||||||
* 1 tab == 4 spaces!
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef PORTMACRO_H
|
|
||||||
#define PORTMACRO_H
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------
|
|
||||||
* Port specific definitions.
|
|
||||||
*
|
|
||||||
* The settings in this file configure FreeRTOS correctly for the given hardware
|
|
||||||
* and compiler.
|
|
||||||
*
|
|
||||||
* These settings should not be altered.
|
|
||||||
*-----------------------------------------------------------
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Type definitions. */
|
|
||||||
#define portCHAR char
|
|
||||||
#define portFLOAT float
|
|
||||||
#define portDOUBLE double
|
|
||||||
#define portLONG long
|
|
||||||
#define portSHORT short
|
|
||||||
#define portSTACK_TYPE uint32_t
|
|
||||||
#define portBASE_TYPE long
|
|
||||||
|
|
||||||
typedef portSTACK_TYPE StackType_t;
|
|
||||||
typedef long BaseType_t;
|
|
||||||
typedef unsigned long UBaseType_t;
|
|
||||||
|
|
||||||
typedef uint32_t TickType_t;
|
|
||||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
|
||||||
|
|
||||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
|
||||||
not need to be guarded with a critical section. */
|
|
||||||
#define portTICK_TYPE_IS_ATOMIC 1
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Hardware specifics. */
|
|
||||||
#define portSTACK_GROWTH ( -1 )
|
|
||||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
|
||||||
#define portBYTE_ALIGNMENT 8
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Task utilities. */
|
|
||||||
|
|
||||||
/* Called at the end of an ISR that can cause a context switch. */
|
|
||||||
#define portEND_SWITCHING_ISR( xSwitchRequired )\
|
|
||||||
{ \
|
|
||||||
extern volatile uint32_t ulPortYieldRequired; \
|
|
||||||
\
|
|
||||||
if( xSwitchRequired != pdFALSE ) \
|
|
||||||
{ \
|
|
||||||
ulPortYieldRequired = pdTRUE; \
|
|
||||||
} \
|
|
||||||
}
|
|
||||||
|
|
||||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
|
||||||
#define portYIELD() __asm volatile ( "SWI 0 \n" \
|
|
||||||
"ISB " );
|
|
||||||
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------
|
|
||||||
* Critical section control
|
|
||||||
*----------------------------------------------------------*/
|
|
||||||
|
|
||||||
extern void vPortEnterCritical( void );
|
|
||||||
extern void vPortExitCritical( void );
|
|
||||||
extern uint32_t ulPortSetInterruptMask( void );
|
|
||||||
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
|
|
||||||
extern void vPortInstallFreeRTOSVectorTable( void );
|
|
||||||
|
|
||||||
/* The I bit within the CPSR. */
|
|
||||||
#define portINTERRUPT_ENABLE_BIT ( 1 << 7 )
|
|
||||||
|
|
||||||
/* In the absence of a priority mask register, these functions and macros
|
|
||||||
globally enable and disable interrupts. */
|
|
||||||
#define portENTER_CRITICAL() vPortEnterCritical();
|
|
||||||
#define portEXIT_CRITICAL() vPortExitCritical();
|
|
||||||
#define portENABLE_INTERRUPTS() __asm volatile ( "CPSIE i \n" );
|
|
||||||
#define portDISABLE_INTERRUPTS() __asm volatile ( "CPSID i \n" \
|
|
||||||
"DSB \n" \
|
|
||||||
"ISB " );
|
|
||||||
|
|
||||||
__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void )
|
|
||||||
{
|
|
||||||
volatile uint32_t ulCPSR;
|
|
||||||
|
|
||||||
__asm volatile ( "MRS %0, CPSR" : "=r" (ulCPSR) );
|
|
||||||
ulCPSR &= portINTERRUPT_ENABLE_BIT;
|
|
||||||
portDISABLE_INTERRUPTS();
|
|
||||||
return ulCPSR;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR()
|
|
||||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) if( x == 0 ) portENABLE_INTERRUPTS()
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
|
||||||
|
|
||||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
|
||||||
not required for this port but included in case common demo code that uses these
|
|
||||||
macros is used. */
|
|
||||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
|
||||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
|
||||||
|
|
||||||
/* Tickless idle/low power functionality. */
|
|
||||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
|
||||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
|
||||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Prototype of the FreeRTOS tick handler. This must be installed as the
|
|
||||||
handler for whichever peripheral is used to generate the RTOS tick. */
|
|
||||||
void FreeRTOS_Tick_Handler( void );
|
|
||||||
|
|
||||||
/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
|
|
||||||
before any floating point instructions are executed. */
|
|
||||||
void vPortTaskUsesFPU( void );
|
|
||||||
#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
|
|
||||||
|
|
||||||
#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
|
|
||||||
#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
|
|
||||||
|
|
||||||
/* Architecture specific optimisations. */
|
|
||||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
|
||||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
|
||||||
|
|
||||||
/* Store/clear the ready priorities in a bit map. */
|
|
||||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
|
||||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
|
||||||
|
|
||||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
|
|
||||||
|
|
||||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
|
||||||
|
|
||||||
#define portNOP() __asm volatile( "NOP" )
|
|
||||||
#define portINLINE __inline
|
|
||||||
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#ifdef __cplusplus
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||||||
} /* extern C */
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#endif
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||||||
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||||||
|
|
||||||
#endif /* PORTMACRO_H */
|
|
||||||
|
|
||||||
Loading…
Reference in New Issue