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Add new PPC405 demo.

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Richard Barry 17 years ago
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commit 6128d1a86e
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110
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/FreeRTOSConfig.h
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 250 )
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 200000000 ) /* Clock setup from start.asm in the demo application. */
#define configTICK_RATE_HZ ( (portTickType) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 6 )
#define configTOTAL_HEAP_SIZE ( (size_t) (80 * 1024) )
#define configMAX_TASK_NAME_LEN ( 20 )
#define configUSE_16_BIT_TICKS 1
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_TRACE_FACILITY 0
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_COUNTING_SEMAPHORES 1
#define configUSE_APPLICATION_TASK_TAG 1
#define configUSE_FPU 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 4 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 1
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vResumeFromISR 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define configUSE_RECURSIVE_MUTEXES 1
#if configUSE_FPU == 1
/* Include the header that define the traceTASK_SWITCHED_IN() and
traceTASK_SWITCHED_OUT() macros to save and restore the floating
point registers for tasks that have requested this behaviour. */
#include "FPU_Macros.h"
#endif
#endif /* FREERTOS_CONFIG_H */

209
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/RTOSDemo_linker_script.ld
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/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: Xilinx EDK 10.1.01 EDK_K_SP1.3 */
/* */
/* Copyright (c) 2004 Xilinx, Inc. All rights reserved. */
/* */
/* Description : PowerPC405 Linker Script */
/* */
/*******************************************************************/
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x100;
/* Define Memories in the system */
MEMORY
{
SRAM_C_MEM0_BASEADDR : ORIGIN = 0xFFF00000, LENGTH = 0x000FFFEC
}
/* Specify the default entry point to the program */
ENTRY(_boot)
STARTUP(boot.o)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.vectors : {
__vectors_start = .;
*(.vectors)
__vectors_end = .;
} > SRAM_C_MEM0_BASEADDR
.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > SRAM_C_MEM0_BASEADDR
.init : {
KEEP (*(.init))
} > SRAM_C_MEM0_BASEADDR
.fini : {
KEEP (*(.fini))
} > SRAM_C_MEM0_BASEADDR
.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > SRAM_C_MEM0_BASEADDR
.sdata2 : {
__sdata2_start = .;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
__sdata2_end = .;
} > SRAM_C_MEM0_BASEADDR
.sbss2 : {
__sbss2_start = .;
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > SRAM_C_MEM0_BASEADDR
.data : {
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__data_end = .;
} > SRAM_C_MEM0_BASEADDR
.got : {
*(.got)
} > SRAM_C_MEM0_BASEADDR
.got1 : {
*(.got1)
} > SRAM_C_MEM0_BASEADDR
.got2 : {
*(.got2)
} > SRAM_C_MEM0_BASEADDR
.ctors : {
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > SRAM_C_MEM0_BASEADDR
.dtors : {
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > SRAM_C_MEM0_BASEADDR
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > SRAM_C_MEM0_BASEADDR
.eh_frame : {
*(.eh_frame)
} > SRAM_C_MEM0_BASEADDR
.jcr : {
*(.jcr)
} > SRAM_C_MEM0_BASEADDR
.gcc_except_table : {
*(.gcc_except_table)
} > SRAM_C_MEM0_BASEADDR
.sdata : {
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > SRAM_C_MEM0_BASEADDR
.sbss : {
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
__sbss_end = .;
} > SRAM_C_MEM0_BASEADDR
.tdata : {
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > SRAM_C_MEM0_BASEADDR
.tbss : {
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > SRAM_C_MEM0_BASEADDR
.bss : {
__bss_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > SRAM_C_MEM0_BASEADDR
.boot0 0xFFFFFFEC : {
__boot0_start = .;
*(.boot0)
__boot0_end = .;
}
.boot 0xFFFFFFFC : {
__boot_start = .;
*(.boot)
__boot_end = .;
}
/* Generate Stack and Heap Sections */
.stack : {
_stack_end = .;
. += _STACK_SIZE;
. = ALIGN(16);
__stack = .;
} > SRAM_C_MEM0_BASEADDR
.heap : {
. = ALIGN(16);
_heap_start = .;
. += _HEAP_SIZE;
. = ALIGN(16);
_heap_end = .;
_end = .;
} > SRAM_C_MEM0_BASEADDR
}

244
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/flop/flop-reg-test.c
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* Tests the floating point context save and restore mechanism.
*
* Two tasks are created - each of which is allocated a buffer of
* portNO_FLOP_REGISTERS_TO_SAVE 32bit variables into which the flop context
* of the task is saved when the task is switched out, and from which the
* flop context of the task is restored when the task is switch in. Prior to
* the tasks being created each position in the two buffers is filled with a
* unique value - this way the flop context of each task is different.
*
* The two test tasks never block so are always in either the Running or
* Ready state. They execute at the lowest priority so will get pre-empted
* regularly, although the yield frequently so will not get much execution
* time. The lack of execution time is not a problem as its only the
* switching in and out that is being tested.
*
* Whenever a task is moved from the Ready to the Running state its flop
* context will be loaded from the buffer, but while the task is in the
* Running state the buffer is not used and can contain any value - in this
* case and for test purposes the task itself clears the buffer to zero.
* The next time the task is moved out of the Running state into the
* Ready state the flop context will once more get saved to the buffer -
* overwriting the zeros.
*
* Therefore whenever the task is not in the Running state its buffer contains
* the most recent values of its floating point registers - the zeroing out
* of the buffer while the task was executing being used to ensure the values
* the buffer contains are not stale.
*
* When neither test task is in the Running state the buffers should contain
* the unique values allocated before the tasks were created. If so then
* the floating point context has been maintained. This check is performed
* by the 'check' task (defined in main.c) by calling
* xAreFlopRegisterTestsStillRunning().
*
* The test tasks also increment a value each time they execute.
* xAreFlopRegisterTestsStillRunning() also checks that this value has changed
* since it last ran to ensure the test tasks are still getting processing time.
*/
/* Standard includes files. */
#include <string.h>
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/*-----------------------------------------------------------*/
#define flopNUMBER_OF_TASKS 2
#define flopSTART_VALUE ( 0x1 )
/*-----------------------------------------------------------*/
/* The two test tasks as described at the top of this file. */
static void vFlopTest1( void *pvParameters );
static void vFlopTest2( void *pvParameters );
/*-----------------------------------------------------------*/
/* Buffers into which the flop registers will be saved. There is a buffer for
both tasks. */
static volatile unsigned portLONG ulFlopRegisters[ flopNUMBER_OF_TASKS ][ portNO_FLOP_REGISTERS_TO_SAVE ];
/* Variables that are incremented by the tasks to indicate that they are still
running. */
static volatile unsigned portLONG ulFlop1CycleCount = 0, ulFlop2CycleCount = 0;
/*-----------------------------------------------------------*/
void vStartFlopRegTests( void )
{
xTaskHandle xTaskJustCreated;
unsigned portBASE_TYPE x, y, z = flopSTART_VALUE;
/* Fill the arrays into which the flop registers are to be saved with
known values. These are the values that will be written to the flop
registers when the tasks start, and as the tasks do not perform any
flop operations the values should never change. Each position in the
buffer contains a different value so the flop context of each task
will be different. */
for( x = 0; x < flopNUMBER_OF_TASKS; x++ )
{
for( y = 0; y < ( portNO_FLOP_REGISTERS_TO_SAVE - 1); y++ )
{
ulFlopRegisters[ x ][ y ] = z;
z++;
}
}
/* Create the first task. */
xTaskCreate( vFlopTest1, ( signed portCHAR * ) "flop1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xTaskJustCreated );
/* The task tag value is a value that can be associated with a task, but
is not used by the scheduler itself. Its use is down to the application so
it makes a convenient place in this case to store the pointer to the buffer
into which the flop context of the task will be stored. The first created
task uses ulFlopRegisters[ 0 ], the second ulFlopRegisters[ 1 ]. */
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 0 ][ 0 ] ) );
/* Do the same for the second task. */
xTaskCreate( vFlopTest2, ( signed portCHAR * ) "flop2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 1 ][ 0 ] ) );
}
/*-----------------------------------------------------------*/
static void vFlopTest1( void *pvParameters )
{
/* Just to remove compiler warning. */
( void ) pvParameters;
for( ;; )
{
/* The values from the buffer should have now been written to the flop
registers. Clear the buffer to ensure the same values then get written
back the next time the task runs. Being preempted during this memset
could cause the test to fail, hence the critical section. */
portENTER_CRITICAL();
memset( ( void * ) ulFlopRegisters[ 0 ], 0x00, ( portNO_FLOP_REGISTERS_TO_SAVE * sizeof( unsigned portBASE_TYPE ) ) );
portEXIT_CRITICAL();
/* We don't have to do anything other than indicate that we are
still running. */
ulFlop1CycleCount++;
taskYIELD();
}
}
/*-----------------------------------------------------------*/
static void vFlopTest2( void *pvParameters )
{
/* Just to remove compiler warning. */
( void ) pvParameters;
for( ;; )
{
/* The values from the buffer should have now been written to the flop
registers. Clear the buffer to ensure the same values then get written
back the next time the task runs. */
portENTER_CRITICAL();
memset( ( void * ) ulFlopRegisters[ 1 ], 0x00, ( portNO_FLOP_REGISTERS_TO_SAVE * sizeof( unsigned portBASE_TYPE ) ) );
portEXIT_CRITICAL();
/* We don't have to do anything other than indicate that we are
still running. */
ulFlop2CycleCount++;
taskYIELD();
}
}
/*-----------------------------------------------------------*/
portBASE_TYPE xAreFlopRegisterTestsStillRunning( void )
{
portBASE_TYPE xReturn = pdPASS;
unsigned portBASE_TYPE x, y, z = flopSTART_VALUE;
static unsigned portLONG ulLastFlop1CycleCount = 0, ulLastFlop2CycleCount = 0;
/* Called from the 'check' task.
The flop tasks cannot be currently running, check their saved registers
are as expected. The tests tasks do not perform any flop operations so
their registers should be as per their initial setting. */
for( x = 0; x < flopNUMBER_OF_TASKS; x++ )
{
for( y = 0; y < ( portNO_FLOP_REGISTERS_TO_SAVE - 1 ); y++ )
{
if( ulFlopRegisters[ x ][ y ] != z )
{
xReturn = pdFAIL;
break;
}
z++;
}
}
/* Check both tasks have actually been swapped in and out since this function
last executed. */
if( ulFlop1CycleCount == ulLastFlop1CycleCount )
{
xReturn = pdFAIL;
}
if( ulFlop2CycleCount == ulLastFlop2CycleCount )
{
xReturn = pdFAIL;
}
ulLastFlop1CycleCount = ulFlop1CycleCount;
ulLastFlop2CycleCount = ulFlop2CycleCount;
return xReturn;
}

56
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/flop/flop-reg-test.h
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FLOP_REG_TEST_H
#define FLOP_REG_TEST_H
void vStartFlopRegTests( void );
portBASE_TYPE xAreFlopRegisterTestsStillRunning( void );
#endif

400
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/flop/flop.c
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* Creates eight tasks, each of which loops continuously performing a
* floating point calculation.
*
* All the tasks run at the idle priority and never block or yield. This causes
* all eight tasks to time slice with the idle task. Running at the idle priority
* means that these tasks will get pre-empted any time another task is ready to run
* or a time slice occurs. More often than not the pre-emption will occur mid
* calculation, creating a good test of the schedulers context switch mechanism - a
* calculation producing an unexpected result could be a symptom of a corruption in
* the context of a task.
*
* This file demonstrates the use of the task tag and traceTASK_SWITCHED_IN and
* traceTASK_SWITCHED_OUT macros to save and restore the floating point context.
*/
#include <stdlib.h>
#include <math.h>
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo program include files. */
#include "flop.h"
/* Misc. definitions. */
#define mathSTACK_SIZE configMINIMAL_STACK_SIZE
#define mathNUMBER_OF_TASKS ( 8 )
/* Four tasks, each of which performs a different floating point calculation.
Each of the four is created twice. */
static portTASK_FUNCTION_PROTO( vCompetingMathTask1, pvParameters );
static portTASK_FUNCTION_PROTO( vCompetingMathTask2, pvParameters );
static portTASK_FUNCTION_PROTO( vCompetingMathTask3, pvParameters );
static portTASK_FUNCTION_PROTO( vCompetingMathTask4, pvParameters );
/* These variables are used to check that all the tasks are still running. If a
task gets a calculation wrong it will stop incrementing its check variable. */
static volatile unsigned portSHORT usTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned portSHORT ) 0 };
/* Buffers into which the flop registers will be saved. There is a buffer for
each task created within this file. Zeroing out this array is the normal and
safe option as this will cause the task to start with all zeros in its flop
context. */
static unsigned portLONG ulFlopRegisters[ mathNUMBER_OF_TASKS ][ portNO_FLOP_REGISTERS_TO_SAVE ];
/*-----------------------------------------------------------*/
void vStartMathTasks( unsigned portBASE_TYPE uxPriority )
{
xTaskHandle xTaskJustCreated;
portBASE_TYPE x, y;
/* Place known values into the buffers into which the flop registers are
to be saved. This is for debug purposes only, it is not normally
required. The last position in each array is left at zero as the status
register will be loaded from there.
It is intended that these values can be viewed being loaded into the
flop registers when a task is started - however the Insight debugger
does not seem to want to show the flop register values. */
for( x = 0; x < mathNUMBER_OF_TASKS; x++ )
{
for( y = 0; y < ( portNO_FLOP_REGISTERS_TO_SAVE - 1 ); y++ )
{
ulFlopRegisters[ x ][ y ] = ( x + 1 );
}
}
/* Create the first task - passing it the address of the check variable
that it is going to increment. This check variable is used as an
indication that the task is still running. */
xTaskCreate( vCompetingMathTask1, ( signed portCHAR * ) "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, &xTaskJustCreated );
/* The task tag value is a value that can be associated with a task, but
is not used by the scheduler itself. Its use is down to the application so
it makes a convenient place in this case to store the pointer to the buffer
into which the flop context of the task will be stored. The first created
task uses ulFlopRegisters[ 0 ], the second ulFlopRegisters[ 1 ], etc. */
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 0 ][ 0 ] ) );
/* Create another 7 tasks, allocating a buffer for each. */
xTaskCreate( vCompetingMathTask2, ( signed portCHAR * ) "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 1 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask3, ( signed portCHAR * ) "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 2 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask4, ( signed portCHAR * ) "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 3 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask1, ( signed portCHAR * ) "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 4 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask2, ( signed portCHAR * ) "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 5 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask3, ( signed portCHAR * ) "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 6 ][ 0 ] ) );
xTaskCreate( vCompetingMathTask4, ( signed portCHAR * ) "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, &xTaskJustCreated );
vTaskSetApplicationTaskTag( xTaskJustCreated, ( void * ) &( ulFlopRegisters[ 7 ][ 0 ] ) );
}
/*-----------------------------------------------------------*/
static portTASK_FUNCTION( vCompetingMathTask1, pvParameters )
{
volatile portFLOAT ff1, ff2, ff3, ff4;
volatile unsigned portSHORT *pusTaskCheckVariable;
volatile portFLOAT fAnswer;
portSHORT sError = pdFALSE;
ff1 = 123.4567F;
ff2 = 2345.6789F;
ff3 = -918.222F;
fAnswer = ( ff1 + ff2 ) * ff3;
/* The variable this task increments to show it is still running is passed in
as the parameter. */
pusTaskCheckVariable = ( unsigned portSHORT * ) pvParameters;
/* Keep performing a calculation and checking the result against a constant. */
for(;;)
{
ff1 = 123.4567F;
ff2 = 2345.6789F;
ff3 = -918.222F;
ff4 = ( ff1 + ff2 ) * ff3;
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/* If the calculation does not match the expected constant, stop the
increment of the check variable. */
if( fabs( ff4 - fAnswer ) > 0.001F )
{
sError = pdTRUE;
}
if( sError == pdFALSE )
{
/* If the calculation has always been correct, increment the check
variable so we know this task is still running okay. */
( *pusTaskCheckVariable )++;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
}
}
/*-----------------------------------------------------------*/
static portTASK_FUNCTION( vCompetingMathTask2, pvParameters )
{
volatile portFLOAT ff1, ff2, ff3, ff4;
volatile unsigned portSHORT *pusTaskCheckVariable;
volatile portFLOAT fAnswer;
portSHORT sError = pdFALSE;
ff1 = -389.38F;
ff2 = 32498.2F;
ff3 = -2.0001F;
fAnswer = ( ff1 / ff2 ) * ff3;
/* The variable this task increments to show it is still running is passed in
as the parameter. */
pusTaskCheckVariable = ( unsigned portSHORT * ) pvParameters;
/* Keep performing a calculation and checking the result against a constant. */
for( ;; )
{
ff1 = -389.38F;
ff2 = 32498.2F;
ff3 = -2.0001F;
ff4 = ( ff1 / ff2 ) * ff3;
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
/* If the calculation does not match the expected constant, stop the
increment of the check variable. */
if( fabs( ff4 - fAnswer ) > 0.001F )
{
sError = pdTRUE;
}
if( sError == pdFALSE )
{
/* If the calculation has always been correct, increment the check
variable so we know
this task is still running okay. */
( *pusTaskCheckVariable )++;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
}
}
/*-----------------------------------------------------------*/
static portTASK_FUNCTION( vCompetingMathTask3, pvParameters )
{
volatile portFLOAT *pfArray, fTotal1, fTotal2, fDifference;
volatile unsigned portSHORT *pusTaskCheckVariable;
const size_t xArraySize = 10;
size_t xPosition;
portSHORT sError = pdFALSE;
/* The variable this task increments to show it is still running is passed in
as the parameter. */
pusTaskCheckVariable = ( unsigned portSHORT * ) pvParameters;
pfArray = ( portFLOAT * ) pvPortMalloc( xArraySize * sizeof( portFLOAT ) );
/* Keep filling an array, keeping a running total of the values placed in the
array. Then run through the array adding up all the values. If the two totals
do not match, stop the check variable from incrementing. */
for( ;; )
{
fTotal1 = 0.0F;
fTotal2 = 0.0F;
for( xPosition = 0; xPosition < xArraySize; xPosition++ )
{
pfArray[ xPosition ] = ( portFLOAT ) xPosition + 5.5F;
fTotal1 += ( portFLOAT ) xPosition + 5.5F;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
for( xPosition = 0; xPosition < xArraySize; xPosition++ )
{
fTotal2 += pfArray[ xPosition ];
}
fDifference = fTotal1 - fTotal2;
if( fabs( fDifference ) > 0.001F )
{
sError = pdTRUE;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
if( sError == pdFALSE )
{
/* If the calculation has always been correct, increment the check
variable so we know this task is still running okay. */
( *pusTaskCheckVariable )++;
}
}
}
/*-----------------------------------------------------------*/
static portTASK_FUNCTION( vCompetingMathTask4, pvParameters )
{
volatile portFLOAT *pfArray, fTotal1, fTotal2, fDifference;
volatile unsigned portSHORT *pusTaskCheckVariable;
const size_t xArraySize = 10;
size_t xPosition;
portSHORT sError = pdFALSE;
/* The variable this task increments to show it is still running is passed in
as the parameter. */
pusTaskCheckVariable = ( unsigned portSHORT * ) pvParameters;
pfArray = ( portFLOAT * ) pvPortMalloc( xArraySize * sizeof( portFLOAT ) );
/* Keep filling an array, keeping a running total of the values placed in the
array. Then run through the array adding up all the values. If the two totals
do not match, stop the check variable from incrementing. */
for( ;; )
{
fTotal1 = 0.0F;
fTotal2 = 0.0F;
for( xPosition = 0; xPosition < xArraySize; xPosition++ )
{
pfArray[ xPosition ] = ( portFLOAT ) xPosition * 12.123F;
fTotal1 += ( portFLOAT ) xPosition * 12.123F;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
for( xPosition = 0; xPosition < xArraySize; xPosition++ )
{
fTotal2 += pfArray[ xPosition ];
}
fDifference = fTotal1 - fTotal2;
if( fabs( fDifference ) > 0.001F )
{
sError = pdTRUE;
}
#if configUSE_PREEMPTION == 0
taskYIELD();
#endif
if( sError == pdFALSE )
{
/* If the calculation has always been correct, increment the check
variable so we know this task is still running okay. */
( *pusTaskCheckVariable )++;
}
}
}
/*-----------------------------------------------------------*/
/* This is called to check that all the created tasks are still running. */
portBASE_TYPE xAreMathsTaskStillRunning( void )
{
/* Keep a history of the check variables so we know if they have been incremented
since the last call. */
static unsigned portSHORT usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned portSHORT ) 0 };
portBASE_TYPE xReturn = pdTRUE, xTask;
/* Check the maths tasks are still running by ensuring their check variables
are still incrementing. */
for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ )
{
if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] )
{
/* The check has not incremented so an error exists. */
xReturn = pdFALSE;
}
usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ];
}
return xReturn;
}

705
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c
Unescape Escape View File

@ -0,0 +1,705 @@
/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* In addition to the standard demo tasks, the follow demo specific tasks are
* create:
*
* The "Check" task. This only executes every three seconds but has the highest
* priority so is guaranteed to get processor time. Its main function is to
* check that all the other tasks are still operational. Most tasks maintain
* a unique count that is incremented each time the task successfully completes
* its function. Should any error occur within such a task the count is
* permanently halted. The check task inspects the count of each task to ensure
* it has changed since the last time the check task executed. If all the count
* variables have changed all the tasks are still executing error free, and the
* check task toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* The "Register Check" tasks. These tasks fill the CPU registers with known
* values, then check that each register still contains the expected value, the
* discovery of an unexpected value being indicative of an error in the RTOS
* context switch mechanism. The register check tasks operate at low priority
* so are switched in and out frequently.
*
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Xilinx library includes. */
#include "xcache_l.h"
#include "xintc.h"
/* Demo application includes. */
#include "flash.h"
#include "integer.h"
#include "comtest2.h"
#include "semtest.h"
#include "BlockQ.h"
#include "dynamic.h"
#include "GenQTest.h"
#include "QPeek.h"
#include "blocktim.h"
#include "death.h"
#include "partest.h"
#include "countsem.h"
#include "recmutex.h"
#include "flop.h"
#include "flop-reg-test.h"
/* Priorities assigned to the demo tasks. */
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainQUEUE_BLOCK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainDEATH_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainGENERIC_QUEUE_PRIORITY ( tskIDLE_PRIORITY )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainFLOP_PRIORITY ( tskIDLE_PRIORITY )
/* The first LED used by the COM test and check tasks respectively. */
#define mainCOM_TEST_LED ( 4 )
#define mainCHECK_TEST_LED ( 3 )
/* The baud rate used by the comtest tasks is set by the hardware, so the
baud rate parameters passed into the comtest initialisation has no effect. */
#define mainBAUD_SET_IN_HARDWARE ( 0 )
/* Delay periods used by the check task. If no errors have been found then
the check LED will toggle every mainNO_ERROR_CHECK_DELAY milliseconds. If an
error has been found at any time then the toggle rate will increase to
mainERROR_CHECK_DELAY milliseconds. */
#define mainNO_ERROR_CHECK_DELAY ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_CHECK_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
/*
* The tasks defined within this file - described within the comments at the
* head of this page.
*/
static void prvRegTestTask1( void *pvParameters );
static void prvRegTestTask2( void *pvParameters );
static void prvErrorChecks( void *pvParameters );
/*
* Called by the 'check' task to inspect all the standard demo tasks within
* the system, as described within the comments at the head of this page.
*/
static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void );
/*
* Perform any hardware initialisation required by the demo application.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/* xRegTestStatus will get set to pdFAIL by the regtest tasks if they
discover an unexpected value. */
static volatile unsigned portBASE_TYPE xRegTestStatus = pdPASS;
/* Counters used to ensure the regtest tasks are still running. */
static volatile unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;
/*-----------------------------------------------------------*/
int main( void )
{
/* Must be called prior to installing any interrupt handlers! */
vPortSetupInterruptController();
/* In this case prvSetupHardware() just enables the caches and and
configures the IO ports for the LED outputs. */
prvSetupHardware();
/* Start the standard demo application tasks. Note that the baud rate used
by the comtest tasks is set by the hardware, so the baud rate parameter
passed has no effect. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_SET_IN_HARDWARE, mainCOM_TEST_LED );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );
vStartDynamicPriorityTasks();
vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );
vStartQueuePeekTasks();
vCreateBlockTimeTasks();
vStartCountingSemaphoreTasks();
vStartRecursiveMutexTasks();
#if ( configUSE_FPU == 1 )
{
/* A different project is provided that has configUSE_FPU set to 1
in order to demonstrate all the settings required to use the floating
point unit. If you wish to use the floating point unit do not start
with this project. */
vStartMathTasks( mainFLOP_PRIORITY );
vStartFlopRegTests();
}
#endif
/* Create the tasks defined within this file. */
xTaskCreate( prvRegTestTask1, ( signed portCHAR * ) "Regtest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTestTask2, ( signed portCHAR * ) "Regtest2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* The suicide tasks must be started last as they record the number of other
tasks that exist within the system. The value is then used to ensure at run
time the number of tasks that exists is within expected bounds. */
vCreateSuicidalTasks( mainDEATH_PRIORITY );
/* Now start the scheduler. Following this call the created tasks should
be executing. */
vTaskStartScheduler();
/* vTaskStartScheduler() will only return if an error occurs while the
idle task is being created. */
for( ;; );
return 0;
}
/*-----------------------------------------------------------*/
static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void )
{
portBASE_TYPE lReturn = pdPASS;
static unsigned portLONG ulLastRegTest1Counter= 0UL, ulLastRegTest2Counter = 0UL;
/* The demo tasks maintain a count that increments every cycle of the task
provided that the task has never encountered an error. This function
checks the counts maintained by the tasks to ensure they are still being
incremented. A count remaining at the same value between calls therefore
indicates that an error has been detected. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xIsCreateTaskStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
#if ( configUSE_FPU == 1 )
if( xAreMathsTaskStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreFlopRegisterTestsStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
#endif
/* Have the register test tasks found any errors? */
if( xRegTestStatus != pdPASS )
{
lReturn = pdFAIL;
}
/* Are the register test tasks still looping? */
if( ulLastRegTest1Counter == ulRegTest1Counter )
{
lReturn = pdFAIL;
}
else
{
ulLastRegTest1Counter = ulRegTest1Counter;
}
if( ulLastRegTest2Counter == ulRegTest2Counter )
{
lReturn = pdFAIL;
}
else
{
ulLastRegTest2Counter = ulRegTest2Counter;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void prvErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
volatile unsigned portBASE_TYPE uxFreeStack;
/* Just to remove compiler warning. */
( void ) pvParameters;
/* This call is just to demonstrate the use of the function - nothing is
done with the value. You would expect the stack high water mark to be
lower (the function to return a larger value) here at function entry than
later following calls to other functions. */
uxFreeStack = uxTaskGetStackHighWaterMark( NULL );
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
works correctly. */
xLastExecutionTime = xTaskGetTickCount();
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. */
for( ;; )
{
/* Again just for demo purposes - uxFreeStack should have a lower value
here than following the call to uxTaskGetStackHighWaterMark() on the
task entry. */
uxFreeStack = uxTaskGetStackHighWaterMark( NULL );
/* Wait until it is time to check again. The time we wait here depends
on whether an error has been detected or not. When an error is
detected the time is shortened resulting in a faster LED flash rate. */
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
/* See if the other tasks are all ok. */
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error occurred in one of the tasks so shorten the delay
period - which has the effect of increasing the frequency of the
LED toggle. */
xDelayPeriod = mainERROR_CHECK_DELAY;
}
/* Flash! */
vParTestToggleLED( mainCHECK_TEST_LED );
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
XCache_EnableICache( 0x80000000 );
XCache_EnableDCache( 0x80000000 );
/* Setup the IO port for use with the LED outputs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
void prvRegTest1Pass( void )
{
/* Called from the inline assembler - this cannot be static
otherwise it can get optimised away. */
ulRegTest1Counter++;
}
/*-----------------------------------------------------------*/
void prvRegTest2Pass( void )
{
/* Called from the inline assembler - this cannot be static
otherwise it can get optimised away. */
ulRegTest2Counter++;
}
/*-----------------------------------------------------------*/
void prvRegTestFail( void )
{
/* Called from the inline assembler - this cannot be static
otherwise it can get optimised away. */
xRegTestStatus = pdFAIL;
}
/*-----------------------------------------------------------*/
static void prvRegTestTask1( void *pvParameters )
{
/* Just to remove compiler warning. */
( void ) pvParameters;
/* The first register test task as described at the top of this file. The
values used in the registers are different to those use in the second
register test task. Also, unlike the second register test task, this task
yields between setting the register values and subsequently checking the
register values. */
asm volatile
(
"RegTest1Start: \n\t" \
" \n\t" \
" li 0, 301 \n\t" \
" mtspr 256, 0 #USPRG0 \n\t" \
" li 0, 501 \n\t" \
" mtspr 8, 0 #LR \n\t" \
" li 0, 4 \n\t" \
" mtspr 1, 0 #XER \n\t" \
" \n\t" \
" li 0, 1 \n\t" \
" li 2, 2 \n\t" \
" li 3, 3 \n\t" \
" li 4, 4 \n\t" \
" li 5, 5 \n\t" \
" li 6, 6 \n\t" \
" li 7, 7 \n\t" \
" li 8, 8 \n\t" \
" li 9, 9 \n\t" \
" li 10, 10 \n\t" \
" li 11, 11 \n\t" \
" li 12, 12 \n\t" \
" li 13, 13 \n\t" \
" li 14, 14 \n\t" \
" li 15, 15 \n\t" \
" li 16, 16 \n\t" \
" li 17, 17 \n\t" \
" li 18, 18 \n\t" \
" li 19, 19 \n\t" \
" li 20, 20 \n\t" \
" li 21, 21 \n\t" \
" li 22, 22 \n\t" \
" li 23, 23 \n\t" \
" li 24, 24 \n\t" \
" li 25, 25 \n\t" \
" li 26, 26 \n\t" \
" li 27, 27 \n\t" \
" li 28, 28 \n\t" \
" li 29, 29 \n\t" \
" li 30, 30 \n\t" \
" li 31, 31 \n\t" \
" \n\t" \
" sc \n\t" \
" nop \n\t" \
" \n\t" \
" cmpwi 0, 1 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 2, 2 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 3, 3 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 4, 4 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 5, 5 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 6, 6 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 7, 7 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 8, 8 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 9, 9 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 10, 10 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 11, 11 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 12, 12 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 13, 13 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 14, 14 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 15, 15 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 16, 16 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 17, 17 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 18, 18 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 19, 19 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 20, 20 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 21, 21 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 22, 22 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 23, 23 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 24, 24 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 25, 25 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 26, 26 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 27, 27 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 28, 28 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 29, 29 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 30, 30 \n\t" \
" bne RegTest1Fail \n\t" \
" cmpwi 31, 31 \n\t" \
" bne RegTest1Fail \n\t" \
" \n\t" \
" mfspr 0, 256 #USPRG0 \n\t" \
" cmpwi 0, 301 \n\t" \
" bne RegTest1Fail \n\t" \
" mfspr 0, 8 #LR \n\t" \
" cmpwi 0, 501 \n\t" \
" bne RegTest1Fail \n\t" \
" mfspr 0, 1 #XER \n\t" \
" cmpwi 0, 4 \n\t" \
" bne RegTest1Fail \n\t" \
" \n\t" \
" bl prvRegTest1Pass \n\t" \
" b RegTest1Start \n\t" \
" \n\t" \
"RegTest1Fail: \n\t" \
" \n\t" \
" \n\t" \
" bl prvRegTestFail \n\t" \
" b RegTest1Start \n\t" \
);
}
/*-----------------------------------------------------------*/
static void prvRegTestTask2( void *pvParameters )
{
/* Just to remove compiler warning. */
( void ) pvParameters;
/* The second register test task as described at the top of this file.
Note that this task fills the registers with different values to the
first register test task. */
asm volatile
(
"RegTest2Start: \n\t" \
" \n\t" \
" li 0, 300 \n\t" \
" mtspr 256, 0 #USPRG0 \n\t" \
" li 0, 500 \n\t" \
" mtspr 8, 0 #LR \n\t" \
" li 0, 4 \n\t" \
" mtspr 1, 0 #XER \n\t" \
" \n\t" \
" li 0, 11 \n\t" \
" li 2, 12 \n\t" \
" li 3, 13 \n\t" \
" li 4, 14 \n\t" \
" li 5, 15 \n\t" \
" li 6, 16 \n\t" \
" li 7, 17 \n\t" \
" li 8, 18 \n\t" \
" li 9, 19 \n\t" \
" li 10, 110 \n\t" \
" li 11, 111 \n\t" \
" li 12, 112 \n\t" \
" li 13, 113 \n\t" \
" li 14, 114 \n\t" \
" li 15, 115 \n\t" \
" li 16, 116 \n\t" \
" li 17, 117 \n\t" \
" li 18, 118 \n\t" \
" li 19, 119 \n\t" \
" li 20, 120 \n\t" \
" li 21, 121 \n\t" \
" li 22, 122 \n\t" \
" li 23, 123 \n\t" \
" li 24, 124 \n\t" \
" li 25, 125 \n\t" \
" li 26, 126 \n\t" \
" li 27, 127 \n\t" \
" li 28, 128 \n\t" \
" li 29, 129 \n\t" \
" li 30, 130 \n\t" \
" li 31, 131 \n\t" \
" \n\t" \
" cmpwi 0, 11 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 2, 12 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 3, 13 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 4, 14 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 5, 15 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 6, 16 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 7, 17 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 8, 18 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 9, 19 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 10, 110 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 11, 111 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 12, 112 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 13, 113 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 14, 114 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 15, 115 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 16, 116 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 17, 117 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 18, 118 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 19, 119 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 20, 120 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 21, 121 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 22, 122 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 23, 123 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 24, 124 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 25, 125 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 26, 126 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 27, 127 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 28, 128 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 29, 129 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 30, 130 \n\t" \
" bne RegTest2Fail \n\t" \
" cmpwi 31, 131 \n\t" \
" bne RegTest2Fail \n\t" \
" \n\t" \
" mfspr 0, 256 #USPRG0 \n\t" \
" cmpwi 0, 300 \n\t" \
" bne RegTest2Fail \n\t" \
" mfspr 0, 8 #LR \n\t" \
" cmpwi 0, 500 \n\t" \
" bne RegTest2Fail \n\t" \
" mfspr 0, 1 #XER \n\t" \
" cmpwi 0, 4 \n\t" \
" bne RegTest2Fail \n\t" \
" \n\t" \
" bl prvRegTest2Pass \n\t" \
" b RegTest2Start \n\t" \
" \n\t" \
"RegTest2Fail: \n\t" \
" \n\t" \
" \n\t" \
" bl prvRegTestFail \n\t" \
" b RegTest2Start \n\t" \
);
}
/*-----------------------------------------------------------*/
/* This hook function will get called if there is a suspected stack overflow.
An overflow can cause the task name to be corrupted, in which case the task
handle needs to be used to determine the offending task. */
void vApplicationStackOverflowHook( xTaskHandle xTask, signed portCHAR *pcTaskName );
void vApplicationStackOverflowHook( xTaskHandle xTask, signed portCHAR *pcTaskName )
{
/* To prevent the optimiser removing the variables. */
volatile xTaskHandle xTaskIn = xTask;
volatile signed portCHAR *pcTaskNameIn = pcTaskName;
/* Remove compiler warnings. */
( void ) xTaskIn;
( void ) pcTaskNameIn;
/* The following three calls are simply to stop compiler warnings about the
functions not being used - they are called from the inline assembly. */
prvRegTest1Pass();
prvRegTest2Pass();
prvRegTestFail();
for( ;; );
}

168
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/partest/partest.c
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Demo application includes. */
#include "partest.h"
/* Library includes. */
#include "xparameters.h"
#include "xgpio_l.h"
/* Misc hardware specific definitions. */
#define partstALL_AS_OUTPUT 0x00
#define partstCHANNEL_1 0x01
#define partstMAX_4BIT_LED 0x03
/* The outputs are split into two IO sections, these variables maintain the
current value of either section. */
static unsigned portBASE_TYPE uxCurrentOutput4Bit, uxCurrentOutput5Bit;
/*-----------------------------------------------------------*/
/*
* Setup the IO for the LED outputs.
*/
void vParTestInitialise( void )
{
/* Set both sets of LED's on the demo board to outputs. */
XGpio_mSetDataDirection( XPAR_LEDS_4BIT_BASEADDR, partstCHANNEL_1, partstALL_AS_OUTPUT );
XGpio_mSetDataDirection( XPAR_LEDS_POSITIONS_BASEADDR, partstCHANNEL_1, partstALL_AS_OUTPUT );
/* Start with all outputs off. */
uxCurrentOutput4Bit = 0;
XGpio_mSetDataReg( XPAR_LEDS_4BIT_BASEADDR, partstCHANNEL_1, 0x00 );
uxCurrentOutput5Bit = 0;
XGpio_mSetDataReg( XPAR_LEDS_POSITIONS_BASEADDR, partstCHANNEL_1, 0x00 );
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portBASE_TYPE uxBaseAddress, *puxCurrentValue;
portENTER_CRITICAL();
{
/* Which IO section does the LED being set/cleared belong to? The
4 bit or 5 bit outputs? */
if( uxLED <= partstMAX_4BIT_LED )
{
uxBaseAddress = XPAR_LEDS_4BIT_BASEADDR;
puxCurrentValue = &uxCurrentOutput5Bit;
}
else
{
uxBaseAddress = XPAR_LEDS_POSITIONS_BASEADDR;
puxCurrentValue = &uxCurrentOutput4Bit;
uxLED -= partstMAX_4BIT_LED;
}
/* Setup the bit mask accordingly. */
uxLED = 0x01 << uxLED;
/* Maintain the current output value. */
if( xValue )
{
*puxCurrentValue |= uxLED;
}
else
{
*puxCurrentValue &= ~uxLED;
}
/* Write the value to the port. */
XGpio_mSetDataReg( uxBaseAddress, partstCHANNEL_1, *puxCurrentValue );
}
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portBASE_TYPE uxBaseAddress, *puxCurrentValue;
portENTER_CRITICAL();
{
/* Which IO section does the LED being toggled belong to? The
4 bit or 5 bit outputs? */
if( uxLED <= partstMAX_4BIT_LED )
{
uxBaseAddress = XPAR_LEDS_4BIT_BASEADDR;
puxCurrentValue = &uxCurrentOutput5Bit;
}
else
{
uxBaseAddress = XPAR_LEDS_POSITIONS_BASEADDR;
puxCurrentValue = &uxCurrentOutput4Bit;
uxLED -= partstMAX_4BIT_LED;
}
/* Setup the bit mask accordingly. */
uxLED = 0x01 << uxLED;
/* Maintain the current output value. */
if( *puxCurrentValue & uxLED )
{
*puxCurrentValue &= ~uxLED;
}
else
{
*puxCurrentValue |= uxLED;
}
/* Write the value to the port. */
XGpio_mSetDataReg(uxBaseAddress, partstCHANNEL_1, *puxCurrentValue );
}
portEXIT_CRITICAL();
}

233
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c
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/*
FreeRTOS.org V5.0.0 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/* Library includes. */
#include "xparameters.h"
#include "xuartlite.h"
#include "xuartlite_l.h"
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/* Structure that maintains information on the UART being used. */
static XUartLite xUART;
/*
* Sample UART interrupt handler. Note this is used to demonstrate the kernel
* features and test the port - it is not intended to represent an efficient
* implementation.
*/
static void vSerialISR( XUartLite *pxUART );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
/* NOTE: The baud rate used by this driver is determined by the hardware
parameterization of the UART Lite peripheral, and the baud value passed to
this function has no effect. */
( void ) ulWantedBaud;
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Only initialise the UART if the queues were created correctly. */
if( ( xRxedChars != NULL ) && ( xCharsForTx != NULL ) )
{
XUartLite_Initialize( &xUART, XPAR_RS232_UART_DEVICE_ID );
XUartLite_ResetFifos( &xUART );
XUartLite_DisableInterrupt( &xUART );
if( xPortInstallInterruptHandler( XPAR_XPS_INTC_0_RS232_UART_INTERRUPT_INTR, ( XInterruptHandler )vSerialISR, (void *)&xUART ) == pdPASS )
{
/* xPortInstallInterruptHandler() could fail if
vPortSetupInterruptController() has not been called prior to this
function. */
XUartLite_EnableInterrupt( &xUART );
}
}
/* There is only one port so the handle is not used. */
return ( xComPortHandle ) 0;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports one UART. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
portBASE_TYPE xReturn = pdTRUE;
/* Just to remove compiler warning. */
( void ) pxPort;
portENTER_CRITICAL();
{
/* If the UART FIFO is full we can block posting the new data on the
Tx queue. */
if( XUartLite_mIsTransmitFull( XPAR_RS232_UART_BASEADDR ) )
{
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
xReturn = pdFAIL;
}
}
/* Otherwise, if there is data already in the queue we should add the
new data to the back of the queue to ensure the sequencing is
maintained. */
else if( uxQueueMessagesWaiting( xCharsForTx ) )
{
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
{
xReturn = pdFAIL;
}
}
/* If the UART FIFO is not full and there is no data already in the
queue we can write directly to the FIFO without disrupting the
sequence. */
else
{
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cOutChar );
}
}
portEXIT_CRITICAL();
return xReturn;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
( void ) xPort;
}
/*-----------------------------------------------------------*/
static void vSerialISR( XUartLite *pxUART )
{
unsigned portLONG ulISRStatus;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, lDidSomething;
portCHAR cChar;
/* Just to remove compiler warning. */
( void ) pxUART;
do
{
lDidSomething = pdFALSE;
ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
if( ( ulISRStatus & XUL_SR_RX_FIFO_VALID_DATA ) != 0 )
{
/* A character is available - place it in the queue of received
characters. This might wake a task that was blocked waiting for
data. */
cChar = ( portCHAR ) XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
lDidSomething = pdTRUE;
}
if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
{
/* There is space in the FIFO - if there are any characters queue for
transmission they can be sent to the UART now. This might unblock a
task that was waiting for space to become available on the Tx queue. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
lDidSomething = pdTRUE;
}
}
} while( lDidSomething == pdTRUE );
/* If we woke any tasks we may require a context switch. */
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}
}

211
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSVG_BifShapes.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
doctype-public="-//W3C//DTD SVG 1.0//EN"
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
<!-- ======================= DEF BLOCK =================================== -->
<xsl:template name="Define_BifTypes">
<xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
<xsl:call-template name="Define_BifType">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
<xsl:call-template name="Define_BifBusConnectors">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
</xsl:for-each>
<!--
<xsl:message>The color of bus <xsl:value-of select="@BUSSTD"/> is <xsl:value-of select="@RGB"/></xsl:message>
<xsl:message>The OPB Bus color is <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[@BUSSTD = 'OPB']/@RGB"/> </xsl:message>
-->
</xsl:template>
<xsl:template name="Define_BifType">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<symbol id="{$iBusType}_Bif">
<rect x="0"
y="0"
rx="3"
ry="3"
width= "{$BIF_W}"
height="{$BIF_H}"
style="fill:{$busColor_}; stroke:black; stroke-width:1"/>
</symbol>
</xsl:template>
<xsl:template name="Define_BifBusConnectors">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="busColor_lt_">
<xsl:call-template name="BusType2LightColor">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="bifc_wi_" select="ceiling($BIFC_W div 3)"/>
<xsl:variable name="bifc_hi_" select="ceiling($BIFC_H div 3)"/>
<symbol id="{$iBusType}_busconn_MASTER">
<rect x="0"
y="0"
width= "{$BIFC_W}"
height="{$BIFC_H}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<rect x="{$BIFC_dx + 0.5}"
y="{$BIFC_dy}"
width= "{$BIFC_Wi}"
height="{$BIFC_Hi}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_INITIATOR">
<rect x="0"
y="0"
width= "{$BIFC_W}"
height="{$BIFC_H}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<rect x="{$BIFC_dx + 0.5}"
y="{$BIFC_dy}"
width= "{$BIFC_Wi}"
height="{$BIFC_Hi}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_SLAVE">
<circle
cx="{ceiling($BIFC_W div 2)}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_W div 2)}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<circle
cx="{ceiling($BIFC_W div 2) + 0.5}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_Wi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_TARGET">
<circle
cx="{ceiling($BIFC_W div 2)}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_W div 2)}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<circle
cx="{ceiling($BIFC_W div 2) + 0.5}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_Wi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_MASTER_SLAVE">
<circle
cx="{ceiling($BIFC_W div 2)}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_W div 2)}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<circle
cx="{ceiling($BIFC_W div 2) + 0.5}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_Wi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
<rect x="0"
y="{ceiling($BIFC_H div 2)}"
width= "{$BIFC_W}"
height="{ceiling($BIFC_H div 2)}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<rect x="{$BIFC_dx + 0.5}"
y="{ceiling($BIFC_H div 2)}"
width= "{$BIFC_Wi}"
height="{ceiling($BIFC_Hi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_MONITOR">
<rect x="0"
y="0.5"
width= "{$BIFC_W}"
height="{ceiling($BIFC_Hi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
<rect x="0"
y="{ceiling($BIFC_H div 2) + 4}"
width= "{$BIFC_W}"
height="{ceiling($BIFC_Hi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_TRANSPARENT">
<circle
cx="{ceiling($BIFC_W div 2)}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_W div 2)}"
style="fill:{$busColor_lt_}; stroke:{$busColor_}; stroke-width:1"/>
<circle
cx="{ceiling($BIFC_W div 2) + 0.5}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_Wi div 2)}"
style="fill:{$busColor_}; stroke:none;"/>
</symbol>
<symbol id="{$iBusType}_busconn_">
<circle
cx="{ceiling($BIFC_W div 2)}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_W div 2)}"
style="fill:{$COL_WHITE}; stroke:{$busColor_}; stroke-width:1"/>
<circle
cx="{ceiling($BIFC_W div 2) + 0.5}"
cy="{ceiling($BIFC_H div 2)}"
r="{ceiling($BIFC_Wi div 2)}"
style="fill:{$COL_WHITE}; stroke:none;"/>
</symbol>
</xsl:template>
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSVG_Colors.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:variable name="COL_RED" select="'#AA0000'"/>
<xsl:variable name="COL_GRAY" select="'#E1E1E1'"/>
<xsl:variable name="COL_BLACK" select="'#000000'"/>
<xsl:variable name="COL_WHITE" select="'#FFFFFF'"/>
<xsl:variable name="COL_YELLOW" select="'#FFFFDD'"/>
<xsl:variable name="COL_YELLOW_LT" select="'#FFFFEE'"/>
<xsl:variable name="COL_BG" select="'#CCCCCC'"/>
<xsl:variable name="COL_BG_LT" select="'#EEEEEE'"/>
<xsl:variable name="COL_BG_UNK" select="'#DDDDDD'"/>
<xsl:variable name="COL_PROC_BG" select="'#FFCCCC'"/>
<xsl:variable name="COL_PROC_BG_MB" select="'#222222'"/>
<xsl:variable name="COL_PROC_BG_PP" select="'#90001C'"/>
<xsl:variable name="COL_PROC_BG_USR" select="'#666699'"/>
<xsl:variable name="COL_MPMC_BG" select="'#8B0800'"/>
<xsl:variable name="COL_MOD_BG" select="'#F0F0F0'"/>
<xsl:variable name="COL_MOD_SPRT" select="'#888888'"/>
<xsl:variable name="COL_MOD_MPRT" select="'#888888'"/>
<xsl:variable name="COL_INTR_0" select="'#FF9900'"/>
<xsl:variable name="COL_INTR_1" select="'#00CCCC'"/>
<xsl:variable name="COL_INTR_2" select="'#33FF33'"/>
<xsl:variable name="COL_INTR_3" select="'#FF00CC'"/>
<xsl:variable name="COL_INTR_4" select="'#99FF33'"/>
<xsl:variable name="COL_INTR_5" select="'#0066CC'"/>
<xsl:variable name="COL_INTR_6" select="'#9933FF'"/>
<xsl:variable name="COL_INTR_7" select="'#3300FF'"/>
<xsl:variable name="COL_INTR_8" select="'#00FF33'"/>
<xsl:variable name="COL_INTR_9" select="'#FF3333'"/>
<xsl:variable name="COL_IORING" select="'#000088'"/>
<xsl:variable name="COL_IORING_LT" select="'#CCCCFF'"/>
<xsl:variable name="COL_SYSPRT" select="'#0000BB'"/>
<xsl:variable name="COL_BUSSTDS">
<BUSCOLOR BUSSTD="XIL" RGB="#990066" RGB_LT="#CC3399"/>
<BUSCOLOR BUSSTD="OCM" RGB="#0000DD" RGB_LT="#9999DD"/>
<BUSCOLOR BUSSTD="OPB" RGB="#339900" RGB_LT="#CCDDCC"/>
<BUSCOLOR BUSSTD="LMB" RGB="#7777FF" RGB_LT="#DDDDFF"/>
<BUSCOLOR BUSSTD="FSL" RGB="#CC00CC" RGB_LT="#FFBBFF"/>
<BUSCOLOR BUSSTD="DCR" RGB="#6699FF" RGB_LT="#BBDDFF"/>
<BUSCOLOR BUSSTD="FCB" RGB="#8C00FF" RGB_LT="#CCCCFF"/>
<BUSCOLOR BUSSTD="PLB" RGB="#FF5500" RGB_LT="#FFBB00"/>
<BUSCOLOR BUSSTD="PLBV46" RGB="#BB9955" RGB_LT="#FFFFDD"/>
<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#BB9955" RGB_LT="#FFFFDD"/>
<!--
<BUSCOLOR BUSSTD="PLBV46" RGB="#9966FF" RGB_LT="#CCCCFF"/>
<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#9966FF" RGB_LT="#CCCCFF"/>
<BUSCOLOR BUSSTD="PLB" RGB="#FFAA33" RGB_LT="#FFEE33"/>
<BUSCOLOR BUSSTD="PLBV46" RGB="#FF5500" RGB_LT="#FFBB00"/>
<BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#FF5500" RGB_LT="#FFBB00"/>
-->
<BUSCOLOR BUSSTD="TRS" RGB="#009999" RGB_LT="#00CCCC"/>
<BUSCOLOR BUSSTD="TRANS" RGB="#009999" RGB_LT="#00CCCC"/>
<BUSCOLOR BUSSTD="TRANSPARENT" RGB="#009999" RGB_LT="#00CCCC"/>
<BUSCOLOR BUSSTD="TARGET" RGB="#009999" RGB_LT="#00CCCC"/>
<BUSCOLOR BUSSTD="INITIATOR" RGB="#009999" RGB_LT="#00CCCC"/>
<BUSCOLOR BUSSTD="KEY" RGB="#444444" RGB_LT="#888888"/>
</xsl:variable>
<xsl:template name="BusType2Color">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:choose>
<xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusType)]/@RGB">
<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusType)]/@RGB"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'TRS')]/@RGB"/>
</xsl:otherwise>
</xsl:choose>
</xsl:template>
<xsl:template name="BusType2LightColor">
<xsl:param name="iBusType" select="'OPB'"/>
<!--
<xsl:message>The color of bus <xsl:value-of select="$busType"/> is <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $busType)]/@RGB"/>
-->
<xsl:choose>
<xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusType)]/@RGB_LT">
<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusType)]/@RGB_LT"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'TRS')]/@RGB_LT"/>
</xsl:otherwise>
</xsl:choose>
</xsl:template>
<xsl:template name="intcIdx2Color">
<xsl:param name="iIntcIdx" select="'0'"/>
<xsl:variable name="idx_" select="$iIntcIdx mod 9"/>
<xsl:choose>
<xsl:when test="$idx_ = '0'"><xsl:value-of select="$COL_INTR_0"/></xsl:when>
<xsl:when test="$idx_ = '1'"><xsl:value-of select="$COL_INTR_1"/></xsl:when>
<xsl:when test="$idx_ = '2'"><xsl:value-of select="$COL_INTR_2"/></xsl:when>
<xsl:when test="$idx_ = '3'"><xsl:value-of select="$COL_INTR_3"/></xsl:when>
<xsl:when test="$idx_ = '4'"><xsl:value-of select="$COL_INTR_4"/></xsl:when>
<xsl:when test="$idx_ = '5'"><xsl:value-of select="$COL_INTR_5"/></xsl:when>
<xsl:when test="$idx_ = '6'"><xsl:value-of select="$COL_INTR_6"/></xsl:when>
<xsl:when test="$idx_ = '7'"><xsl:value-of select="$COL_INTR_7"/></xsl:when>
<xsl:when test="$idx_ = '8'"><xsl:value-of select="$COL_INTR_8"/></xsl:when>
<xsl:when test="$idx_ = '9'"><xsl:value-of select="$COL_INTR_9"/></xsl:when>
<xsl:otherwise>
<xsl:value-of select="$COL_INTR_0"/>
</xsl:otherwise>
</xsl:choose>
</xsl:template>
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSVG_Diagrams.css
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text.busintlabel {
fill: #810017;
stroke: none;
font-size: 7pt;
font-style: italic;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mpmctitle {
fill: #FFFFFF;
stroke: none;
font-size: 16pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Verdana Helvetica sans-serif;
}
text.mpmcbiflabel {
fill: #FFFFFF;
stroke: none;
font-size: 6pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.buslabel {
fill: #CC3333;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.iplabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: 800;
text-anchor: middle;
font-family: Courier Arial Helvetica sans-serif;
}
text.iptype {
fill: #AA0017;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ipclass {
fill: #000000;
stroke: none;
font-size: 7pt;
font-style: normal;
font-weight: bold;
text-anchor: start;
font-family: Times Arial Helvetica sans-serif;
}
text.procclass {
fill: #000000;
stroke: none;
font-size: 7pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Times Arial Helvetica sans-serif;
}
text.portlabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ipdbiflbl {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: bold;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmMHeader {
fill: #FFFFFF;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmSHeader {
fill: #810017;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.dbglabel {
fill: #555555;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Times Arial Helvetica sans-serif;
}
text.iopnumb {
fill: #555555;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ioplblgrp {
fill: #000088;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
tspan.iopgrp {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
baseline-shift:super;
font-family: Arial Courier san-serif;
}
text.biflabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.p2pbuslabel {
fill: #000000;
stroke: none;
font-size: 10pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
writing-mode: tb;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mpbuslabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
writing-mode: tb;
font-family: Verdana Arial Helvetica sans-serif;
}
text.sharedbuslabel {
fill: #000000;
stroke: none;
font-size: 10pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
}
text.bciplabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Courier Arial Helvetica sans-serif;
}
text.bciptype {
fill: #AA0017;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.splitbustxt {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: sans-serif;
}
text.horizp2pbuslabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
}
text.keytitle {
fill: #AA0017;
stroke: none;
font-size: 12pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
}
text.keyheader {
fill: #000000;
stroke: none;
font-size: 10pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
}
text.keylabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
}
text.keylblul {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
text-decoration: underline;
font-family: Verdana Arial Helvetica sans-serif;
}
text.specsheader {
fill: #000000;
stroke: none;
font-size: 10pt;
font-weight: bold;
text-anchor: start;
font-family: Arial Helvetica sans-serif;
}
text.specsvalue {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
}
text.specsvaluemid {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.intrsymbol {
fill: #000000;
stroke: none;
font-size: 8pt;
font-weight: bold;
text-anchor: start;
font-family: Arial Helvetica sans-serif;
}

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_BusLaneSpaces.xsl
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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_Busses.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
doctype-public="-//W3C//DTD SVG 1.0//EN"
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
<xsl:template name="Define_Busses">
<!--
<xsl:param name="drawarea_w" select="500"/>
<xsl:param name="drawarea_h" select="500"/>
-->
<xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
<xsl:call-template name="Define_BusArrowsEastWest">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
<xsl:call-template name="Define_BusArrowsNorthSouth">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
<xsl:call-template name="Define_SplitBusses">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
</xsl:for-each>
<xsl:call-template name="Define_SharedBus">
<xsl:with-param name="iBusType" select="'PLB'"/>
</xsl:call-template>
<xsl:call-template name="Define_SharedBus">
<xsl:with-param name="iBusType" select="'PLBV46'"/>
</xsl:call-template>
<xsl:call-template name="Define_SharedBus">
<xsl:with-param name="iBusType" select="'OPB'"/>
</xsl:call-template>
<xsl:call-template name="Define_SharedBus_Group"/>
</xsl:template>
<xsl:template name="Define_BusArrowsEastWest">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:variable name="bus_col_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="bus_col_lt_">
<xsl:call-template name="BusType2LightColor">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<symbol id="{$iBusType}_BusArrowEast">
<path class="bus"
d="M 0,0
L {$BLKD_BUS_ARROW_W}, {ceiling($BLKD_BUS_ARROW_H div 2)}
L 0,{$BLKD_BUS_ARROW_H},
Z" style="stroke:none; fill:{$bus_col_}"/>
</symbol>
<symbol id="{$iBusType}_BusArrowWest">
<use x="0" y="0" xlink:href="#{$iBusType}_BusArrowEast" transform="scale(-1,1) translate({$BLKD_BUS_ARROW_W * -1},0)"/>
</symbol>
<symbol id="{$iBusType}_BusArrowHInitiator">
<rect x="0"
y="{$BLKD_BUS_ARROW_G}"
width= "{$BLKD_BUS_ARROW_W}"
height="{$BLKD_P2P_BUS_W}"
style="stroke:none; fill:{$bus_col_}"/>
</symbol>
</xsl:template>
<!--
<xsl:param name="bus_col" select="'OPB'"/>
-->
<xsl:template name="Define_BusArrowsNorthSouth">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="busColor_lt_">
<xsl:call-template name="BusType2LightColor">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<symbol id="{$iBusType}_BusArrowSouth">
<path class="bus"
d="M 0,0
L {$BLKD_BUS_ARROW_H},0
L {ceiling($BLKD_BUS_ARROW_H div 2)}, {$BLKD_BUS_ARROW_W}
Z" style="stroke:none; fill:{$busColor_}"/>
</symbol>
<symbol id="{$iBusType}_BusArrowNorth">
<use x="0" y="0" xlink:href="#{$iBusType}_BusArrowSouth" transform="scale(1,-1) translate(0,{$BLKD_BUS_ARROW_H * -1})"/>
</symbol>
<symbol id="{$iBusType}_BusArrowInitiator">
<rect x="{$BLKD_BUS_ARROW_G}"
y="0"
width= "{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
height="{$BLKD_BUS_ARROW_H}"
style="stroke:none; fill:{$busColor_}"/>
</symbol>
</xsl:template>
<xsl:template name="Draw_P2PBus">
<xsl:param name="iBusX" select="0"/>
<xsl:param name="iBusTop" select="0"/>
<xsl:param name="iBusBot" select="0"/>
<xsl:param name="iBotRnk" select="'_unk_'"/>
<xsl:param name="iTopRnk" select="'_unk_'"/>
<xsl:param name="iBusStd" select="'_bstd_'"/>
<xsl:param name="iBusName" select="'_p2pbus_'"/>
<xsl:variable name="busColor_">
<xsl:choose>
<xsl:when test="@BUSSTD">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="@BUSSTD"/>
</xsl:call-template>
</xsl:when>
<xsl:when test="not($iBusStd = '_bstd_')">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusStd"/>
</xsl:call-template>
</xsl:when>
<xsl:otherwise>
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="'TRS'"/>
</xsl:call-template>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="p2pH_" select="($iBusBot - $iBusTop) - ($BLKD_BUS_ARROW_H * 2)"/>
<xsl:variable name="botArrow_">
<xsl:choose>
<xsl:when test="((($iBotRnk = 'INITIATOR') or ($iBotRnk = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
<xsl:otherwise>BusArrowSouth</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="topArrow_">
<xsl:choose>
<xsl:when test="((($iTopRnk = 'INITIATOR') or ($iTopRnk = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
<xsl:otherwise>BusArrowNorth</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:if test="@BUSSTD">
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
xlink:href="#{@BUSSTD}_{$topArrow_}"/>
<use x="{($busX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
y="{$busBot - $BLKD_BUS_ARROW_H}"
xlink:href="#{@BUSSTD}_{$botArrow_}"/>
</xsl:if>
<xsl:if test="(not(@BUSSTD) and not($busStd = '_bstd_'))">
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
xlink:href="#{$iBusStd}_{$topArrow_}"/>
<use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
y="{$iBusBot - $BLKD_BUS_ARROW_H}"
xlink:href="#{$iBusStd}_{$botArrow_}"/>
</xsl:if>
<rect x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2) + $BLKD_BUS_ARROW_G}"
y="{$iBusTop + $BLKD_BIFC_H + $BLKD_BUS_ARROW_H}"
height= "{$p2pH_ - ($BLKD_BUS_ARROW_H * 2)}"
width="{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
style="stroke:none; fill:{$busColor_}"/>
<text class="p2pbuslabel"
x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
y="{$iBusTop + ($BLKD_BUS_ARROW_H * 3)}">
<xsl:value-of select="$iBusName"/>
</text>
<xsl:if test="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP">
<text class="ioplblgrp"
x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
y="{$iBusTop + ($BLKD_BUS_ARROW_H * 10)}">
<xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iBusName)]/@GROUP"/>
</text>
</xsl:if>
</xsl:template>
<xsl:template name="Draw_Proc2ProcBus">
<xsl:param name="iBc_Y" select="0"/>
<xsl:param name="iBcLeft_X" select="0"/>
<xsl:param name="iBcRght_X" select="0"/>
<xsl:param name="iLeftRnk" select="'_unk_'"/>
<xsl:param name="iRghtRnk" select="'_unk_'"/>
<xsl:param name="iBusStd" select="'_bstd_'"/>
<xsl:param name="iBusName" select="'_p2pbus_'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusStd"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="pr2pr_W_" select="($iBcRght_X - $iBcLeft_X)"/>
<xsl:variable name="leftArrow_">
<xsl:choose>
<xsl:when test="((($iLeftRnk = 'INITIATOR') or ($iLeftRnk = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
<xsl:otherwise>BusArrowWest</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="rghtArrow_">
<xsl:choose>
<xsl:when test="((($iRghtRnk = 'INITIATOR') or ($iRghtRnk = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
<xsl:otherwise>BusArrowEast</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="bus_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
<use x="{$iBcLeft_X}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$leftArrow_}"/>
<use x="{$iBcRght_X - $BLKD_BUS_ARROW_W}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$rghtArrow_}"/>
<rect x="{$iBcLeft_X + $BLKD_BUS_ARROW_W}"
y="{$bus_Y_ + $BLKD_BUS_ARROW_G}"
width= "{$pr2pr_W_ - (2 * $BLKD_BUS_ARROW_W)}"
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busColor_}"/>
<text class="horizp2pbuslabel"
x="{$iBcLeft_X + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
<text class="horizp2pbuslabel"
x="{$iBcRght_X - (string-length($iBusName) * 8)}"
y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
</xsl:template>
<xsl:template name="Draw_SplitConnBus">
<xsl:param name="iBc_X" select="0"/>
<xsl:param name="iBc_Y" select="0"/>
<xsl:param name="iBc_Rnk" select="'_unk_'"/>
<xsl:param name="iBc_Side" select="'_unk_'"/>
<xsl:param name="iBusStd" select="'_bstd_'"/>
<xsl:param name="iBusName" select="'_p2pbus_'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusStd"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="connArrow_">
<xsl:choose>
<xsl:when test="((($iBc_Rnk = 'INITIATOR') or ($iBc_Rnk = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
<xsl:otherwise>BusArrowEast</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="arrow_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
<xsl:variable name="bus_X_">
<xsl:choose>
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - ($BLKD_BUS_ARROW_W * 2))"/></xsl:when>
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/></xsl:when>
</xsl:choose>
</xsl:variable>
<!--
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$busStd}_BusArrowHInitiator"/>
-->
<xsl:variable name="arrow_X_">
<xsl:choose>
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - $BLKD_BUS_ARROW_W)"/></xsl:when>
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W)"/></xsl:when>
</xsl:choose>
</xsl:variable>
<!--
<xsl:message>The bus name is <xsl:value-of select="$busName"/></xsl:message>
<xsl:message>The bif side is <xsl:value-of select="$bc_Side"/></xsl:message>
<xsl:message>The bif rank is <xsl:value-of select="$bc_Rnk"/></xsl:message>
-->
<xsl:choose>
<xsl:when test="(($iBusStd = 'FSL') and (($iBc_Rnk = 'MASTER') or ($iBc_Rnk = 'INITIATOR')))">
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
</xsl:when>
<xsl:when test="(($iBc_Side = '1') and not($iBusStd = 'FSL') and (($iBc_Rnk = 'MASTER') or ($iBc_Rnk = 'INITIATOR')))">
<use x="{$arrow_X_ - $BLKD_BIFC_W}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_WEST"/>
</xsl:when>
<xsl:when test="(($iBc_Side = '1') and (($iBc_Rnk = 'SLAVE') or ($iBc_Rnk = 'TARGET') or ($iBc_Rnk = 'TRANSPARENT')))">
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_EAST"/>
</xsl:when>
<xsl:otherwise>
<use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
<use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
</xsl:otherwise>
</xsl:choose>
<xsl:variable name="text_X_">
<xsl:choose>
<xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($bus_X_ - $BLKD_BUS_ARROW_W - (string-length($iBusName) * 5))"/></xsl:when>
<xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($bus_X_ + $BLKD_BUS_ARROW_W)"/></xsl:when>
</xsl:choose>
</xsl:variable>
<text class="horizp2pbuslabel"
x="{$text_X_}"
y="{($arrow_Y_)}">
<xsl:value-of select="$iBusName"/>
</text>
</xsl:template>
<xsl:template name="Define_SharedBus">
<xsl:param name="iBusType" select="'OPB'"/>
<xsl:variable name="sharedbus_w_" select="($G_total_drawarea_W - ($BLKD_INNER_GAP * 2))"/>
<xsl:variable name="bus_col_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="bus_col_lt_">
<xsl:call-template name="BusType2LightColor">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<symbol id="{$iBusType}_SharedBus">
<use x="0" y="0" xlink:href="#{$iBusType}_BusArrowWest"/>
<use x="{$sharedbus_w_ - $BLKD_BUS_ARROW_W}" y="0" xlink:href="#{$iBusType}_BusArrowEast"/>
<rect x="{$BLKD_BUS_ARROW_W}"
y="{$BLKD_BUS_ARROW_G}"
width= "{$sharedbus_w_ - ($BLKD_BUS_ARROW_W * 2)}"
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$bus_col_}"/>
</symbol>
</xsl:template>
<xsl:template name="Define_SplitBusses">
<xsl:param name="iBusType" sselect="'FSL'"/>
<xsl:variable name="busColor_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$iBusType"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="bifc_r_" select="ceiling($BLKD_BIFC_W div 3)"/>
<symbol id="{$iBusType}_SplitBus_EAST">
<use x="0" y="0" xlink:href="#{$iBusType}_BusArrowWest"/>
<rect x="{$BLKD_BUS_ARROW_W}"
y="{$BLKD_BUS_ARROW_G}"
width= "{$BLKD_BIFC_W}"
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busColor_}"/>
</symbol>
<xsl:variable name="splbus_w_" select="($BLKD_BUS_ARROW_W + $BLKD_BIFC_W + $BLKD_BIFC_Wi)"/>
<symbol id="{$iBusType}_SplitBus_WEST">
<use x="0" y="0" xlink:href="#{$iBusType}_SplitBus_EAST" transform="scale(-1,1) translate({$splbus_w_ * -1},0)"/>
</symbol>
<symbol id="{$iBusType}_SplitBus_OneWay">
<rect x="0"
y="{$BLKD_BUS_ARROW_G}"
width= "{($BLKD_BUS_ARROW_W * 2)}"
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busColor_}"/>
<rect x="{($BLKD_BUS_ARROW_W * 2)}"
y="0"
width= "{$BLKD_BUS_ARROW_H}"
height="{$BLKD_BUS_ARROW_H}" style="stroke:none; fill:{$busColor_}"/>
</symbol>
</xsl:template>
<xsl:template name="Define_SharedBus_Group">
<!-- The Bridges go into the shared bus shape -->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/BRIDGESHAPES/MODULE">
<xsl:variable name="modInst_" select="@INSTANCE"/>
<xsl:variable name="modType_" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
<xsl:call-template name="Define_Peripheral">
<xsl:with-param name="iModVori" select="'normal'"/>
<xsl:with-param name="iModInst" select="$modInst_"/>
<xsl:with-param name="iModType" select="$modType_"/>
</xsl:call-template>
</xsl:for-each>
<symbol id="group_sharedBusses">
<!-- Draw the shared bus shapes first -->
<xsl:for-each select="BLKDSHAPES/SBSSHAPES/MODULE">
<xsl:variable name="instance_" select="@INSTANCE"/>
<xsl:variable name="busStd_" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUSSTD"/>
<xsl:variable name="busIndex_" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUSINDEX"/>
<xsl:variable name="busY_" select="($busIndex_ * $BLKD_SBS_LANE_H)"/>
<use x="0" y="{$busY_}" xlink:href="#{$busStd_}_SharedBus"/>
<text class="sharedbuslabel"
x="8"
y="{$busY_ + $BLKD_BUS_ARROW_H + 10}">
<xsl:value-of select="$instance_"/>
</text>
</xsl:for-each>
</symbol>
<symbol id="KEY_SharedBus">
<use x="0" y="0" xlink:href="#KEY_BusArrowWest"/>
<use x="30" y="0" xlink:href="#KEY_BusArrowEast"/>
<xsl:variable name="key_col_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="'KEY'"/>
</xsl:call-template>
</xsl:variable>
<rect x="{$BLKD_BUS_ARROW_W}"
y="{$BLKD_BUS_ARROW_G}"
width= "{30 - $BLKD_BUS_ARROW_W}"
height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$key_col_}"/>
</symbol>
</xsl:template>
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_Calculations.xsl
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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_Dimensions.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
doctype-public="-//W3C//DTD SVG 1.0//EN"
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
<!--
======================================================
BUS INTERFACE DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_BIF_H" select="16"/>
<xsl:variable name="BLKD_BIF_W" select="32"/>
<xsl:variable name="BLKD_BIFC_H" select="24"/>
<xsl:variable name="BLKD_BIFC_W" select="24"/>
<xsl:variable name="BLKD_BIFC_dx" select="ceiling($BLKD_BIFC_W div 5)"/>
<xsl:variable name="BLKD_BIFC_dy" select="ceiling($BLKD_BIFC_H div 5)"/>
<xsl:variable name="BLKD_BIFC_Hi" select="($BLKD_BIFC_H - ($BLKD_BIFC_dy * 2))"/>
<xsl:variable name="BLKD_BIFC_Wi" select="($BLKD_BIFC_W - ($BLKD_BIFC_dx * 2))"/>
<xsl:variable name="BLKD_BIF_TYPE_ONEWAY" select="'OneWay'"/>
<!--
======================================================
GLOLBAL BUS INTERFACE DIMENSIONS
(Define for global MdtSVG_BifShapes.xsl which is used across all
diagrams to define the shapes of bifs the same across all diagrams)
======================================================
-->
<xsl:variable name="BIF_H" select="$BLKD_BIF_H"/>
<xsl:variable name="BIF_W" select="$BLKD_BIF_W"/>
<xsl:variable name="BIFC_H" select="$BLKD_BIFC_H"/>
<xsl:variable name="BIFC_W" select="$BLKD_BIFC_W"/>
<xsl:variable name="BIFC_dx" select="$BLKD_BIFC_dx"/>
<xsl:variable name="BIFC_dy" select="$BLKD_BIFC_dy"/>
<xsl:variable name="BIFC_Hi" select="$BLKD_BIFC_Hi"/>
<xsl:variable name="BIFC_Wi" select="$BLKD_BIFC_Wi"/>
<!--
======================================================
BUS DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_P2P_BUS_W" select="($BLKD_BUS_ARROW_H - ($BLKD_BUS_ARROW_G * 2))"/>
<xsl:variable name="BLKD_SBS_LANE_H" select="($BLKD_MOD_H + ($BLKD_BIF_H * 2))"/>
<xsl:variable name="BLKD_BUS_LANE_W" select="($BLKD_BIF_W + ($BLKD_MOD_BIF_GAP_H * 2))"/>
<xsl:variable name="BLKD_BUS_ARROW_W" select="ceiling($BLKD_BIFC_W div 3)"/>
<xsl:variable name="BLKD_BUS_ARROW_H" select="ceiling($BLKD_BIFC_H div 2)"/>
<xsl:variable name="BLKD_BUS_ARROW_G" select="ceiling($BLKD_BIFC_W div 12)"/>
<!--
======================================================
IO PORT DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_IOP_H" select="16"/>
<xsl:variable name="BLKD_IOP_W" select="16"/>
<xsl:variable name="BLKD_IOP_SPC" select="12"/>
<!--
======================================================
INTERRUPT NOTATION DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_INTR_W" select="18"/>
<xsl:variable name="BLKD_INTR_H" select="18"/>
<!--
======================================================
MODULE DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_MOD_IO_GAP" select="8"/>
<xsl:variable name="BLKD_MOD_W" select="( ($BLKD_BIF_W * 2) + ($BLKD_MOD_BIF_GAP_H * 1) + ($BLKD_MOD_LANE_W * 2))"/>
<xsl:variable name="BLKD_MOD_H" select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 1) + ($BLKD_MOD_LANE_H * 2))"/>
<xsl:variable name="BLKD_MOD_BIF_GAP_H" select="ceiling($BLKD_BIF_H div 4)"/>
<xsl:variable name="BLKD_MOD_BIF_GAP_V" select="ceiling($BLKD_BIFC_H div 2)"/>
<xsl:variable name="BLKD_MOD_LABEL_W" select="(($BLKD_BIF_W * 2) + $BLKD_MOD_BIF_GAP_H)"/>
<xsl:variable name="BLKD_MOD_LABEL_H" select="(($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 3))"/>
<xsl:variable name="BLKD_MOD_LANE_W" select="ceiling($BLKD_BIF_W div 3)"/>
<xsl:variable name="BLKD_MOD_LANE_H" select="ceiling($BLKD_BIF_H div 4)"/>
<xsl:variable name="BLKD_MOD_EDGE_W" select="ceiling($BLKD_MOD_LANE_W div 2)"/>
<xsl:variable name="BLKD_MOD_SHAPES_G" select="($BLKD_BIF_W + $BLKD_BIF_W)"/>
<xsl:variable name="BLKD_MOD_BKTLANE_H" select="$BLKD_BIF_H"/>
<xsl:variable name="BLKD_MOD_BKTLANE_W" select="$BLKD_BIF_H"/>
<xsl:variable name="BLKD_MOD_BUCKET_G" select="ceiling($BLKD_BIF_W div 2)"/>
<xsl:variable name="BLKD_MPMC_MOD_H" select="(($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 2) + ($BLKD_MOD_LANE_H * 2))"/>
<!--
======================================================
GLOBAL DIAGRAM DIMENSIONS
======================================================
-->
<xsl:variable name="BLKD_IORCHAN_H" select="$BLKD_BIF_H"/>
<xsl:variable name="BLKD_IORCHAN_W" select="$BLKD_BIF_H"/>
<xsl:variable name="BLKD_PRTCHAN_H" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2)"/>
<xsl:variable name="BLKD_PRTCHAN_W" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2) + 8"/>
<xsl:variable name="BLKD_DRAWAREA_MIN_W" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * 3) + ($BLKD_MOD_BUCKET_G * 2)))"/>
<xsl:variable name="BLKD_INNER_X" select="($BLKD_PRTCHAN_W + $BLKD_IORCHAN_W + $BLKD_INNER_GAP)"/>
<xsl:variable name="BLKD_INNER_Y" select="($BLKD_PRTCHAN_H + $BLKD_IORCHAN_H + $BLKD_INNER_GAP)"/>
<xsl:variable name="BLKD_INNER_GAP" select="ceiling($BLKD_MOD_W div 2)"/>
<xsl:variable name="BLKD_SBS2IP_GAP" select="$BLKD_MOD_H"/>
<xsl:variable name="BLKD_BRIDGE_GAP" select="($BLKD_BUS_LANE_W * 4)"/>
<xsl:variable name="BLKD_IP2UNK_GAP" select="$BLKD_MOD_H"/>
<xsl:variable name="BLKD_PROC2SBS_GAP" select="($BLKD_BIF_H * 2)"/>
<xsl:variable name="BLKD_IOR2PROC_GAP" select="$BLKD_BIF_W"/>
<xsl:variable name="BLKD_MPMC2PROC_GAP" select="($BLKD_BIF_H * 2)"/>
<xsl:variable name="BLKD_SPECS2KEY_GAP" select="$BLKD_BIF_W"/>
<xsl:variable name="BLKD_DRAWAREA2KEY_GAP" select="ceiling($BLKD_BIF_W div 3)"/>
<xsl:variable name="BLKD_KEY_H" select="250"/>
<xsl:variable name="BLKD_KEY_W" select="($BLKD_DRAWAREA_MIN_W + ceiling($BLKD_DRAWAREA_MIN_W div 2.5))"/>
<xsl:variable name="BLKD_SPECS_H" select="100"/>
<xsl:variable name="BLKD_SPECS_W" select="300"/>
<xsl:variable name="BLKD_BKT_MODS_PER_ROW" select="3"/>
<!--
<xsl:template name="Print_Dimensions">
<xsl:message>MOD_LABEL_W : <xsl:value-of select="$MOD_LABEL_W"/></xsl:message>
<xsl:message>MOD_LABEL_H : <xsl:value-of select="$MOD_LABEL_H"/></xsl:message>
<xsl:message>MOD_LANE_W : <xsl:value-of select="$MOD_LANE_W"/></xsl:message>
<xsl:message>MOD_LANE_H : <xsl:value-of select="$MOD_LANE_H"/></xsl:message>
<xsl:message>MOD_EDGE_W : <xsl:value-of select="$MOD_EDGE_W"/></xsl:message>
<xsl:message>MOD_SHAPES_G : <xsl:value-of select="$MOD_SHAPES_G"/></xsl:message>
<xsl:message>MOD_BKTLANE_W : <xsl:value-of select="$MOD_BKTLANE_W"/></xsl:message>
<xsl:message>MOD_BKTLANE_H : <xsl:value-of select="$MOD_BKTLANE_H"/></xsl:message>
<xsl:message>MOD_BUCKET_G : <xsl:value-of select="$MOD_BUCKET_G"/></xsl:message>
</xsl:template>
-->
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_IOPorts.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
doctype-public="-//W3C//DTD SVG 1.0//EN"
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
<!--
<xsl:param name="BLKD_IOP_H" select="16"/>
<xsl:param name="BLKD_IOP_W" select="16"/>
<xsl:param name="BLKD_IOP_SPC" select="12"/>
<xsl:param name="MOD_IO_GAP" select="8"/>
-->
<!-- ======================= DEF BLOCK =============================== -->
<xsl:template name="Define_IOPorts">
<xsl:variable name="key_col_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="'KEY'"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="key_lt_col_">
<xsl:call-template name="BusType2LightColor">
<xsl:with-param name="iBusType" select="'KEY'"/>
</xsl:call-template>
</xsl:variable>
<symbol id="G_IOPort">
<rect
x="0"
y="0"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="fill:{$COL_IORING_LT}; stroke:{$COL_IORING}; stroke-width:1"/>
<path class="ioport"
d="M 0,0
L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
L 0,{$BLKD_IOP_H}
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
</symbol>
<symbol id="G_BIPort">
<rect
x="0"
y="0"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="fill:{$COL_IORING_LT}; stroke:{$COL_IORING}; stroke-width:1"/>
<path class="btop"
d="M 0,{ceiling($BLKD_IOP_H div 2)}
{ceiling($BLKD_IOP_W div 2)},0
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
<path class="bbot"
d="M 0,{ceiling($BLKD_IOP_H div 2)}
{ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
</symbol>
<symbol id="KEY_IOPort">
<rect
x="0"
y="0"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
<path class="ioport"
d="M 0,0
L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
L 0,{$BLKD_IOP_H}
Z" style="stroke:none; fill:{$key_col_}"/>
</symbol>
<symbol id="KEY_BIPort">
<rect
x="0"
y="0"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
<path class="btop"
d="M 0,{ceiling($BLKD_IOP_H div 2)}
{ceiling($BLKD_IOP_W div 2)},0
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
Z" style="stroke:none; fill:{$key_col_}"/>
<path class="bbot"
d="M 0,{ceiling($BLKD_IOP_H div 2)}
{ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
{$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
Z" style="stroke:none; fill:{$key_col_}"/>
</symbol>
<symbol id="KEY_INPort">
<use x="0" y="0" xlink:href="#KEY_IOPort"/>
<rect
x="{$BLKD_IOP_W}"
y="0"
width= "{ceiling($BLKD_IOP_W div 2)}"
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
</symbol>
<symbol id="KEY_OUTPort">
<use x="0" y="0" xlink:href="#KEY_IOPort" transform="scale(-1,1) translate({$BLKD_IOP_W * -1},0)"/>
<rect
x="{$BLKD_IOP_W}"
y="0"
width= "{ceiling($BLKD_IOP_W div 2)}"
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
</symbol>
<symbol id="KEY_INOUTPort">
<use x="0" y="0" xlink:href="#KEY_BIPort"/>
<rect
x="{$BLKD_IOP_W}"
y="0"
width= "{ceiling($BLKD_IOP_W div 2)}"
height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
</symbol>
</xsl:template>
<!-- ======================= DRAW BLOCK =============================== -->
<xsl:template name="Draw_IOPorts">
<xsl:variable name="ports_count_" select="count(EXTERNALPORTS/PORT)"/>
<xsl:if test="($ports_count_ &gt; 30)">
<xsl:call-template name="Draw_IOPorts_4Sides"/>
</xsl:if>
<xsl:if test="($ports_count_ &lt;= 30)">
<xsl:call-template name="Draw_IOPorts_2Sides"/>
</xsl:if>
</xsl:template>
<xsl:template name="Draw_IOPorts_2Sides">
<xsl:variable name="ports_count_" select="count(EXTERNALPORTS/PORT)"/>
<xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 2)"/>
<xsl:variable name="h_ofs_">
<xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_total_drawarea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
</xsl:variable>
<xsl:variable name="v_ofs_">
<xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_total_drawarea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
</xsl:variable>
<xsl:for-each select="EXTERNALPORTS/PORT">
<xsl:sort data-type="number" select="@INDEX" order="ascending"/>
<xsl:variable name="poffset_" select="0"/>
<xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
<xsl:variable name="pdir_">
<xsl:choose>
<xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
<xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
<xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
<xsl:otherwise>I</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="pside_">
<xsl:choose>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 0) and ($pcount_ &lt; ($ports_per_side_ * 1)))">W</xsl:when>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 1) and ($pcount_ &lt; ($ports_per_side_ * 2)))">E</xsl:when>
<xsl:otherwise>D</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="pdec_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="px_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_total_drawarea_W)"/></xsl:when>
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="py_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_total_drawarea_H)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="prot_">
<xsl:choose>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="txo_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')">-10</xsl:when>
<xsl:when test="($pside_ = 'S')">6</xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
<xsl:when test="($pside_ = 'N')">6</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="tyo_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
<xsl:when test="($pside_ = 'N')">-2</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:if test="$pdir_ = 'B'">
<use x="{$px_}"
y="{$py_}"
id="{@NAME}"
xlink:href="#G_BIPort"
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
</xsl:if>
<xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
<rect
x="{$px_}"
y="{$py_}"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
</xsl:if>
<xsl:if test="not($pdir_ = 'B')">
<use x="{$px_}"
y="{$py_}"
id="{@NAME}"
xlink:href="#G_IOPort"
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
</xsl:if>
<text class="iopnumb"
x="{$px_ + $txo_}"
y="{$py_ + $tyo_}">
<xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
</text>
</xsl:for-each>
</xsl:template>
<xsl:template name="Draw_IOPorts_4Sides">
<xsl:variable name="ports_count_" select="count(EXTERNALPORTS/PORT)"/>
<xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 4)"/>
<xsl:variable name="h_ofs_">
<xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_total_drawarea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
</xsl:variable>
<xsl:variable name="v_ofs_">
<xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_total_drawarea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
</xsl:variable>
<xsl:for-each select="EXTERNALPORTS/PORT">
<xsl:sort data-type="number" select="@INDEX" order="ascending"/>
<xsl:variable name="poffset_" select="0"/>
<xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
<xsl:variable name="pdir_">
<xsl:choose>
<xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
<xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
<xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
<xsl:otherwise>I</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="pside_">
<xsl:choose>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 0) and ($pcount_ &lt; ($ports_per_side_ * 1)))">W</xsl:when>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 1) and ($pcount_ &lt; ($ports_per_side_ * 2)))">S</xsl:when>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 2) and ($pcount_ &lt; ($ports_per_side_ * 3)))">E</xsl:when>
<xsl:when test="($pcount_ &gt;= ($ports_per_side_ * 3) and ($pcount_ &lt; ($ports_per_side_ * 4)))">N</xsl:when>
<xsl:otherwise>D</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="pdec_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 2)"/></xsl:when>
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($ports_per_side_ * 3)"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="px_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_total_drawarea_W)"/></xsl:when>
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="py_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_total_drawarea_H)"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
<xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="prot_">
<xsl:choose>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
<xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="txo_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')">-14</xsl:when>
<xsl:when test="($pside_ = 'S')">8</xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
<xsl:when test="($pside_ = 'N')">8</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="tyo_">
<xsl:choose>
<xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
<xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
<xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
<xsl:when test="($pside_ = 'N')">-2</xsl:when>
<xsl:otherwise>0</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:if test="$pdir_ = 'B'">
<use x="{$px_}"
y="{$py_}"
id="{@NAME}"
xlink:href="#G_BIPort"
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
</xsl:if>
<xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
<rect
x="{$px_}"
y="{$py_}"
width= "{$BLKD_IOP_W}"
height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
</xsl:if>
<xsl:if test="not($pdir_ = 'B')">
<use x="{$px_}"
y="{$py_}"
id="{@NAME}"
xlink:href="#G_IOPort"
transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
</xsl:if>
<text class="iopnumb"
x="{$px_ + $txo_}"
y="{$py_ + $tyo_}"><xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
</text>
</xsl:for-each>
</xsl:template>
<xsl:template name="Define_ExtPortsTable">
<!--
<xsl:if test="$oriented_= 'WEST'"><xsl:value-of select="$proc2procX_ - (string-length(@BUSNAME) * 6)"/></xsl:if>
<xsl:variable name="max_name_" select="math:max(string-length(/EDKSYSTEM/EXTERNALPORTS/PORT/@NAME))"/>
<xsl:variable name="max_sgnm_" select="math:max(string-length(/EDKSYSTEM/EXTERNALPORTS/PORT/@SIGNAME))"/>
<xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
<xsl:message>MAX SIG <xsl:value-of select="$max_sgnm_"/></xsl:message>
-->
<xsl:variable name="ext_ports_">
<xsl:if test="not(/EDKSYSTEM/EXTERNALPORTS/PORT)">
<EXTPORT NAME="__none__" SIGNAME="__none_" NAMELEN="0" SIGLEN="0"/>
</xsl:if>
<xsl:if test="/EDKSYSTEM/EXTERNALPORTS/PORT">
<xsl:for-each select="/EDKSYSTEM/EXTERNALPORTS/PORT">
<EXTPORT NAME="{@NAME}" SIGNAME="{@SIGNAME}" NAMELEN="{string-length(@NAME)}" SIGLEN="{string-length(@SIGNAME)}"/>
</xsl:for-each>
</xsl:if>
</xsl:variable>
<xsl:variable name="max_name_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@NAMELEN)"/>
<xsl:variable name="max_sign_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@SIGLEN)"/>
<xsl:variable name="h_font_" select="12"/>
<xsl:variable name="w_font_" select="12"/>
<xsl:variable name="w_num_" select="($w_font_ * 5)"/>
<xsl:variable name="w_dir_" select="($w_font_ * 3)"/>
<xsl:variable name="w_lsbmsb_" select="($w_font_ * 9)"/>
<xsl:variable name="w_attr_" select="($w_font_ * 4)"/>
<xsl:variable name="w_name_" select="($w_font_ * $max_name_)"/>
<xsl:variable name="w_sign_" select="($w_font_ * $max_sign_)"/>
<xsl:variable name="w_table_" select="($w_num_ + $w_name_ + $w_dir_ + $w_sign_ + $w_attr_)"/>
<!--
<xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
<xsl:message>MAX SIG <xsl:value-of select="$max_sign_"/></xsl:message>
<xsl:message>W NUM <xsl:value-of select="$w_num_"/></xsl:message>
<xsl:message>W DIR <xsl:value-of select="$w_dir_"/></xsl:message>
<xsl:message>W NAM <xsl:value-of select="$w_name_"/></xsl:message>
<xsl:message>W SIG <xsl:value-of select="$w_sign_"/></xsl:message>
<xsl:message>W ATT <xsl:value-of select="$w_attr_"/></xsl:message>
<xsl:message>W TABLE <xsl:value-of select="$w_table_"/></xsl:message>
-->
<symbol id="BlkDiagram_ExtPortsTable">
<rect
x="0"
y="0"
width= "{$w_table_}"
height="{$h_font_}" style="fill:{$COL_RED}; stroke:none; stroke-width:1"/>
</symbol>
</xsl:template>
<!-- ======================= END MAIN BLOCK =========================== -->
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_Main.xsl
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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtSvgBLKD_Processors.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:svg="http://www.w3.org/2000/svg"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:math="http://exslt.org/math"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink"
extension-element-prefixes="math">
<xsl:output method="xml"
version="1.0"
encoding="UTF-8"
indent="yes"
doctype-public="-//W3C//DTD SVG 1.0//EN"
doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
<!-- ======================= DEF BLOCK =================================== -->
<xsl:template name="Define_AllStacks">
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/BCLANESPACES/BCLANESPACE[(@EAST &lt; /EDKSYSTEM/BLKDSHAPES/@STACK_HORIZ_WIDTH)]">
<xsl:call-template name="Define_Stack">
<xsl:with-param name="iStackIdx" select="@EAST"/>
</xsl:call-template>
</xsl:for-each>
</xsl:template>
<xsl:template name="Define_Stack">
<xsl:param name="iStackIdx" select="100"/>
<!-- Define the stack's peripheral shapes-->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and not(@MODCLASS = 'MEMORY_UNIT'))]">
<xsl:for-each select="MODULE">
<xsl:variable name="modInst_" select="@INSTANCE"/>
<xsl:variable name="modType_" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$modInst_)]/@MODTYPE"/>
<xsl:call-template name="Define_Peripheral">
<xsl:with-param name="iModInst" select="$modInst_"/>
<xsl:with-param name="iModType" select="$modType_"/>
<xsl:with-param name="iShapeId" select="../@SHAPE_ID"/>
<xsl:with-param name="iHorizIdx" select="../@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="../@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:for-each>
</xsl:for-each>
<!-- Define the stack's memory shapes-->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@MODCLASS='MEMORY_UNIT'))]">
<xsl:call-template name="Define_MemoryUnit">
<xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
</xsl:call-template>
</xsl:for-each>
<!-- Define the stack's processors-->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/PROCSHAPES/MODULE[@INSTANCE and @BIFS_W and @BIFS_H and (@STACK_HORIZ_INDEX = $iStackIdx)]">
<xsl:call-template name="Define_Processor"/>
</xsl:for-each>
<!-- Make an inventory of all the things in this processor's stack -->
<xsl:variable name="pstackW_">
<xsl:call-template name="_calc_Stack_Width">
<xsl:with-param name="iStackIdx" select="$iStackIdx"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="pstackH_">
<xsl:call-template name="_calc_Stack_Height">
<xsl:with-param name="iStackIdx" select="$iStackIdx"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="procW_" select="$BLKD_MOD_W"/>
<xsl:variable name="procX_" select="(ceiling($pstackW_ div 2) - ceiling($procW_ div 2))"/>
<xsl:variable name="sbsGap_" select="($BLKD_PROC2SBS_GAP + $G_total_SharedBus_H)"/>
<xsl:variable name="stack_name_">
<xsl:call-template name="_gen_Stack_Name">
<xsl:with-param name="iHorizIdx" select="$iStackIdx"/>
</xsl:call-template>
</xsl:variable>
<!--
<xsl:message>Horiz index<xsl:value-of select="$stackIdx"/></xsl:message>
<xsl:message>Drawing stack <xsl:value-of select="$stack_name_"/></xsl:message>
-->
<!-- Now use all this stuff to draw the stack-->
<symbol id="{$stack_name_}">
<rect x="0"
y="0"
rx="6"
ry="6"
width = "{$pstackW_}"
height= "{$pstackH_}"
style="fill:{$COL_BG}; stroke:none;"/>
<!-- First draw the the processor's peripherals-->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/CMPLXSHAPES/CMPLXSHAPE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
<xsl:sort select="@STACK_VERTI_INDEX" data-type="number"/>
<xsl:variable name="shapeW_" select="(@MODS_W * $BLKD_MOD_W)"/>
<xsl:variable name="shapeX_" select="(ceiling($pstackW_ div 2) - ceiling($shapeW_ div 2))"/>
<xsl:variable name="stack_SymName_">
<xsl:call-template name="_gen_Stack_SymbolName">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<!--
<xsl:message>Drawing stack peripheral <xsl:value-of select="$stack_SymName_"/></xsl:message>
-->
<xsl:variable name="shapeY_">
<xsl:call-template name="_calc_Stack_Shape_Y">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<use x="{$shapeX_}" y="{$shapeY_}" xlink:href="#{$stack_SymName_}"/>
</xsl:for-each>
<!-- Then draw the slave buckets for the shared busses that this processor is master to -->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
<xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
<xsl:variable name="bucketW_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
<xsl:variable name="bucketX_" select="(ceiling($pstackW_ div 2) - ceiling($bucketW_ div 2))"/>
<xsl:variable name="bucketY_">
<xsl:call-template name="_calc_Stack_Shape_Y">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<!--
<xsl:message>SBS Bucket Y <xsl:value-of select="$bucketY_"/></xsl:message>
-->
<use x="{$bucketX_}" y="{$bucketY_}" xlink:href="#sbsbucket_{@BUSNAME}"/>
<text class="ipclass"
x="{$bucketX_}"
y="{$bucketY_ - 4}">SLAVES OF <xsl:value-of select="@BUSNAME"/></text>
</xsl:for-each>
<!-- Then draw the the processor itself -->
<xsl:for-each select="/EDKSYSTEM/BLKDSHAPES/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
<xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
<xsl:variable name="procY_">
<xsl:call-template name="_calc_Stack_Shape_Y">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="stack_SymName_">
<xsl:call-template name="_gen_Stack_SymbolName">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<use x="{$procX_}" y="{$procY_}" xlink:href="#{$stack_SymName_}"/>
<xsl:if test = "not(@IS_LIKEPROC)">
<text class="ipclass"
x="{$procX_}"
y="{$procY_ - 4}">PROCESSOR</text>
</xsl:if>
<xsl:if test = "@IS_LIKEPROC = 'TRUE'">
<text class="ipclass"
x="{$procX_}"
y="{$procY_ - 4}">USER MODULE</text>
</xsl:if>
</xsl:for-each>
</symbol>
</xsl:template>
<xsl:template name="Define_Processor">
<xsl:param name="iProcInst" select="@INSTANCE"/>
<xsl:param name="iModType" select="/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$iProcInst]/@MODTYPE"/>
<!--
<xsl:param name="procType" select="/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$procInst]/@PROCTYPE"/>
-->
<xsl:variable name="label_y_">
<xsl:value-of select="$BLKD_MOD_LANE_H"/>
</xsl:variable>
<!--
<xsl:message>The proctype is <xsl:value-of select="$procType"/></xsl:message>
-->
<xsl:variable name="procH_" select="(($BLKD_MOD_LANE_H * 2) + (($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIFS_H) + ($BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
<xsl:variable name="procW_" select="(($BLKD_MOD_LANE_W * 2) + (($BLKD_BIF_W * @BIFS_W) + $BLKD_MOD_BIF_GAP_H))"/>
<xsl:variable name="procColor_">
<xsl:choose>
<xsl:when test="contains($iModType,'microblaze')"><xsl:value-of select="$COL_PROC_BG_MB"/></xsl:when>
<xsl:when test="contains($iModType,'ppc')"><xsl:value-of select="$COL_PROC_BG_PP"/></xsl:when>
<xsl:otherwise>
<xsl:value-of select="$COL_PROC_BG_USR"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<!--
<xsl:message>The proc color is <xsl:value-of select="$procColor"/></xsl:message>
-->
<xsl:variable name="procName_">
<xsl:call-template name="_gen_Stack_SymbolName">
<xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
<xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
</xsl:call-template>
</xsl:variable>
<!--
<xsl:message>The proc name is <xsl:value-of select="$procName_"/></xsl:message>
-->
<symbol id="{$procName_}">
<rect x="0"
y="0"
rx="6"
ry="6"
width = "{$procW_}"
height= "{$procH_}"
style="fill:{$procColor_}; stroke:{$COL_WHITE}; stroke-width:2"/>
<rect x="{ceiling($procW_ div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
y="{$BLKD_MOD_LANE_H}"
rx="3"
ry="3"
width= "{$BLKD_MOD_LABEL_W}"
height="{$BLKD_MOD_LABEL_H}"
style="fill:{$COL_WHITE}; stroke:none;"/>
<text class="bciptype"
x="{ceiling($procW_ div 2)}"
y="{$BLKD_MOD_LANE_H + 8}">
<xsl:value-of select="$iModType"/>
</text>
<text class="bciplabel"
x="{ceiling($procW_ div 2)}"
y="{$BLKD_MOD_LANE_H + 16}">
<xsl:value-of select="$iProcInst"/>
</text>
<xsl:if test="/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$iProcInst]/@GROUP">
<rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
rx="3"
ry="3"
width= "{$BLKD_MOD_LABEL_W}"
height="{$BLKD_BIF_H}"
style="fill:{$COL_IORING_LT}; stroke:none;"/>
<text class="ioplblgrp" x="{ceiling($BLKD_MOD_W div 2)}" y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BIF_H div 3) + 12}">
<xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[@INSTANCE = $iProcInst]/@GROUP"/>
</text>
</xsl:if>
<xsl:for-each select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/BUSINTERFACE[(@BIF_X and @BIF_Y)]">
<xsl:variable name="bif_busstd_">
<xsl:choose>
<xsl:when test="@BUSSTD">
<xsl:value-of select="@BUSSTD"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="'TRS'"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="bif_buscol_">
<xsl:call-template name="BusType2Color">
<xsl:with-param name="iBusType" select="$bif_busstd_"/>
</xsl:call-template>
</xsl:variable>
<xsl:variable name="bif_name_">
<xsl:choose>
<xsl:when test="string-length(@NAME) &lt;= 5">
<xsl:value-of select="@NAME"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="substring(@NAME,0,5)"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="bif_x_" select="(( $BLKD_BIF_W * @BIF_X) + ($BLKD_MOD_BIF_GAP_H * @BIF_X) + ($BLKD_MOD_LANE_W * 1))"/>
<xsl:variable name="bif_y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
<xsl:variable name="horz_line_y_" select="($bif_y_ + ceiling($BLKD_BIFC_H div 2))"/>
<xsl:variable name="horz_line_x1_">
<xsl:choose>
<xsl:when test="@BIF_X = '0'">0</xsl:when>
<xsl:otherwise><xsl:value-of select="($BLKD_MOD_W - $BLKD_MOD_LANE_W)"/></xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="horz_line_x2_">
<xsl:choose>
<xsl:when test="@BIF_X = '0'"><xsl:value-of select="$BLKD_MOD_LANE_W"/></xsl:when>
<xsl:otherwise><xsl:value-of select="$BLKD_MOD_W + 1"/></xsl:otherwise>
</xsl:choose>
</xsl:variable>
<line x1="{$horz_line_x1_}"
y1="{$horz_line_y_ - 2}"
x2="{$horz_line_x2_}"
y2="{$horz_line_y_ - 2}"
style="stroke:{$bif_buscol_};stroke-width:1"/>
<use x="{$bif_x_}" y="{$bif_y_}" xlink:href="#{$bif_busstd_}_Bif"/>
<text class="biflabel"
x="{$bif_x_ + ceiling($BIF_W div 2)}"
y="{$bif_y_ + ceiling($BIF_H div 2) + 3}">
<xsl:value-of select="$bif_name_"/>
</text>
</xsl:for-each>
<xsl:variable name="interrupt_cntlr_">
<xsl:choose>
<xsl:when test="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iProcInst)]/@INTERRUPT_CNTLR">
<xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iProcInst)]/@INTERRUPT_CNTLR"/>
</xsl:when>
<xsl:otherwise>"_no_interrupt_cntlr_"</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<!--
<xsl:message> The intc index should <xsl:value-of select="$interrupt_cntlr_"/></xsl:message>
<xsl:message> The intc index is <xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTCINDEX"/></xsl:message>
-->
<xsl:if test="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTCINDEX">
<xsl:variable name="intr_col_">
<xsl:call-template name="intcIdx2Color">
<xsl:with-param name="iIntcIdx" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTCINDEX"/>
</xsl:call-template>
</xsl:variable>
<xsl:call-template name="_draw_InterruptedProc">
<xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
<xsl:with-param name="iIntr_Y" select="3"/>
<xsl:with-param name="iIntr_COL" select="$intr_col_"/>
<xsl:with-param name="iIntr_IDX" select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTCINDEX"/>
</xsl:call-template>
</xsl:if>
</symbol>
</xsl:template>
</xsl:stylesheet>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtXdsGen_HTMLDatasheet.css
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text.busintlabel {
fill: #810017;
stroke: none;
font-size: 7pt;
font-style: italic;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.buslabel {
fill: #CC3333;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.iplabel {
fill: #000000;
stroke: none;
font-size: 7pt;
font-style: italic;
font-weight: 900;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
}
text.iptype {
fill: #AA0017;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.portlabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmMHeader {
fill: #FFFFFF;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmSHeader {
fill: #810017;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.proclabel {
fill: #810017;
stroke: none;
font-size: 14pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.opblabel {
fill: #339900;
stroke: none;
font-size: 11pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
}
text.lmblabel {
fill: #9999FF;
stroke: none;
font-size: 11pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
}
text.dbglabel {
fill: #555555;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Times Arial Helvetica sans-serif;
}
text.iopnumb {
fill: #555555;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}

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611
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtXdsGen_HTMLIPSection.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="html"/>
<!--
<xsl:param name="DS_COL_OPB" select="'#339900'"/>
<xsl:param name="DS_COL_WHITE" select="'#FFFFFF'"/>
<xsl:param name="DS_COL_INFO" select="'#2233FF'"/>
<xsl:param name="DS_COL_BLACK" select="'#000000'"/>
<xsl:param name="DS_COL_GREY" select="'#CCCCCC'"/>
<xsl:param name="DS_COL_XPRP" select="'#810017'"/>
<xsl:param name="DS_COL_DOCLNK" select="'#FF9900'"/>
-->
<!-- ======================= MAIN PERIPHERAL SECTION =============================== -->
<xsl:template name="Layout_IPSection">
<TABLE BGCOLOR="{$DS_COL_WHITE}" WIDTH="{$DS_WIDTH}" COLS="4" cellspacing="0" cellpadding="0" border="0">
<TD COLSPAN="4" width="5%" align="LEFT" valign="BOTTOM">
<A name="_{@INSTANCE}"/>
<xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if>
<SPAN style="color:{$DS_COL_XPRP}; font: bold italic 14px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@INSTANCE"/></SPAN>
<xsl:if test="DESCRIPTION[(@TYPE = 'SHORT')]">
<SPAN style="color:{$DS_COL_XPRP}; font: normal italic 12px Verdana,Arial,Helvetica,sans-serif">
&#160;&#160;<xsl:value-of select="DESCRIPTION[(@TYPE = 'SHORT')]"/>
</SPAN>
</xsl:if>
<BR></BR>
<xsl:if test="DESCRIPTION[(@TYPE = 'LONG')]">
<SPAN style="color:{$DS_COL_BLACK}; font: normal italic 12px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="DESCRIPTION[(@TYPE = 'LONG')]" disable-output-escaping="yes"/>
</SPAN>
</xsl:if>
<BR></BR>
<BR></BR>
<BR></BR>
</TD>
<TR></TR>
<!-- Layout the Module information table-->
<TD COLSPAN="2" width="40%" align="LEFT" valign="TOP">
<IMG SRC="imgs/{@INSTANCE}.jpg" alt="{@INSTANCE} IP Image" border="0" vspace="0" hspace="0"/>
</TD>
<TD COLSPAN="2" width="60%" align="MIDDLE" valign="TOP">
<xsl:call-template name="Peri_PortListTable"/>
<BR></BR>
<BR></BR>
</TD>
<TR></TR>
<TD COLSPAN="4" width="100%" align="LEFT" valign="BOTTOM">
<xsl:call-template name="Peri_InfoTable"/>
</TD>
<!--
<TD COLSPAN="1" width="5%" align="LEFT" valign="BOTTOM">
<SPAN style="color:{$DS_COL_XPRP}; font: bold normal 16px Verdana,Arial,Helvetica,sans-serif">&#8970;</SPAN>
</TD>
<TD COLSPAN="2" width="90%" align="MIDDLE" valign="BOTTOM">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">&#160;</SPAN>
</TD>
<TD COLSPAN="1" width="5%" align="RIGHT" valign="BOTTOM">
<SPAN style="color:{$DS_COL_XPRP}; font: bold normal 16px Verdana,Arial,Helvetica,sans-serif">&#8971;</SPAN>
</TD>
-->
</TABLE>
<BR></BR>
<BR></BR>
</xsl:template>
<!-- ======================= PERIHERAL TABLE PARTS =============================== -->
<!-- Layout the Module's Information table -->
<xsl:template name="Peri_InfoTable">
<xsl:variable name="mhsParamCNT_" select="count(PARAMETER)"/>
<xsl:variable name="table_is_split_">
<xsl:if test="$mhsParamCNT_ &gt; 10">1</xsl:if>
<xsl:if test="not($mhsParamCNT_ &gt; 10)">0</xsl:if>
</xsl:variable>
<xsl:variable name="table_width_">
<xsl:if test="$mhsParamCNT_ &gt; 10"><xsl:value-of select="$DS_WIDTH"/></xsl:if>
<xsl:if test="$mhsParamCNT_ &lt;= 10"><xsl:value-of select="ceiling($DS_WIDTH div 2)"/></xsl:if>
</xsl:variable>
<xsl:variable name="left_extra_">
<xsl:if test="($mhsParamCNT_ mod 2) = 1">1</xsl:if>
<xsl:if test="not(($mhsParamCNT_ mod 2) = 1)">0</xsl:if>
</xsl:variable>
<xsl:variable name="num_left_" select="floor($mhsParamCNT_ div 2) + $left_extra_"/>
<xsl:variable name="num_rhgt_" select="floor($mhsParamCNT_ div 2)"/>
<xsl:variable name="mdr_main_col_">
<xsl:if test="$mhsParamCNT_ &gt; 10">4</xsl:if>
<xsl:if test="$mhsParamCNT_ &lt;= 10">2</xsl:if>
</xsl:variable>
<xsl:variable name="mdr_othr_col_">
<xsl:if test="$mhsParamCNT_ &gt; 10">2</xsl:if>
<xsl:if test="$mhsParamCNT_ &lt;= 10">1</xsl:if>
</xsl:variable>
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="{$table_width_}" COLS="5" cellspacing="1" cellpadding="1" border="1">
<TD COLSPAN="5" WIDTH="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">General</SPAN></TD>
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">IP Core</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}">
<xsl:if test="@DOC_IP">
<SPAN style="color:{$DS_COL_XPRP}; font: bold italic 10px Verdana,Arial,Helvetica,sans-serif">
<A HREF="{@DOC_IP}" style="text-decoration:none; color:{$DS_COL_XPRP}"><xsl:value-of select="@MODTYPE"/></A>
</SPAN>
</xsl:if>
<xsl:if test="not(@DOC_IP)">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="@MODTYPE"/>
</SPAN>
</xsl:if>
</TD>
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Version</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@HWVERSION"/></SPAN></TD>
<xsl:if test="@DOC_DRIVER">
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Driver</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_XPRP}; font: bold italic 10px Verdana,Arial,Helvetica,sans-serif">
<A HREF="{@DOC_DRIVER}" style="text-decoration:none; color:{$DS_COL_XPRP}">API</A>
</SPAN>
</TD>
</xsl:if>
<TR></TR>
<xsl:if test="LICENSEINFO">
<TD COLSPAN="5" WIDTH="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">License</SPAN></TD>
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">TYPE</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="LICENSEINFO/@TYPE"/></SPAN>
</TD>
<!--
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">CURRENT STATUS</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="LICENSEINFO/@STATE"/></SPAN>
</TD>
-->
<xsl:if test="LICENSEINFO/@EXPIRESON">
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">EXPIRES ON</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="LICENSEINFO/@EXPIRESON"/></SPAN>
</TD>
</xsl:if>
</xsl:if>
<xsl:if test="$mhsParamCNT_ &gt; 0">
<TR></TR>
<TD COLSPAN="5" WIDTH="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Parameters</SPAN></TD>
<TR></TR>
<TD COLSPAN="5" width="100%" align="left" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
These are parameters set for this module.
<xsl:if test="@DOC_IP">
Refer to the IP <A HREF="{@DOC_IP}" style="text-decoration:none; color:{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_XPRP}; font: bold italic 9px Verdana,Arial,Helvetica,sans-serif"> documentation </SPAN></A>for complete information about module parameters.
</xsl:if>
</SPAN>
<BR></BR>
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
Parameters marked with
</SPAN>
<SPAN style="color:#FFBB00; font: bold 9px Verdana,Arial,Helvetica,sans-serif">yellow</SPAN>
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
indicate parameters set by the user.
</SPAN>
<BR></BR>
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
Parameters marked with
</SPAN>
<SPAN style="color:{$DS_COL_MODSYSNW}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">blue</SPAN>
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
indicate parameters set by the system.
</SPAN>
</TD>
<xsl:if test="$mhsParamCNT_ &lt;= 10">
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Name</SPAN></TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Value</SPAN></TD>
<xsl:for-each select="PARAMETER">
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<xsl:when test="@CHANGEDBY='SYSTEM'">
<xsl:value-of select="$DS_COL_MODSYS"/>
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<xsl:when test="((position() - 1) mod 2) = 0">
<xsl:value-of select="$DS_COL_ASH1"/>
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<xsl:value-of select="$DS_COL_WHITE"/>
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</xsl:choose>
</xsl:variable>
<TR></TR>
<TD COLSPAN="2" WIDTH="40%" align="left" bgcolor="{$name_bg_col_}">
<SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="@NAME"/>
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<xsl:if test="DESCRIPTION">
<BR/>
<SPAN style="color:{$DS_COL_BLACK}; font: bold italic 9px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="DESCRIPTION"/>
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</TD>
<TD COLSPAN="3" WIDTH="60%" align="middle" bgcolor="{$value_bg_col_}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@VALUE"/></SPAN></TD>
</xsl:for-each>
</xsl:if>
<xsl:if test="$mhsParamCNT_ &gt; 10">
<TR></TR>
<TD COLSPAN="5" WIDTH="100%">
<TABLE BGCOLOR="{$DS_COL_GREY}" WIDTH="100%" COLS="5" cellspacing="0" cellpadding="0" border="0">
<TD COLSPAN="2" WIDTH="49%">
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="100%" COLS="2" cellspacing="1" cellpadding="0" border="0">
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Name</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Value</SPAN></TD>
<xsl:for-each select="PARAMETER">
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<xsl:if test="position() &lt;= $num_left_">
<xsl:variable name="name_bg_col_">
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<xsl:value-of select="$DS_COL_MODUSR"/>
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<xsl:when test="@CHANGEDBY='SYSTEM'">
<xsl:value-of select="$DS_COL_MODSYS"/>
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<xsl:when test="((position() - 1) mod 2) = 0">
<xsl:value-of select="$DS_COL_ASH1"/>
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<xsl:value-of select="$DS_COL_WHITE"/>
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<xsl:variable name="value_bg_col_">
<xsl:choose>
<xsl:when test="@CHANGEDBY='USER'">
<xsl:value-of select="$DS_COL_MODUSR"/>
</xsl:when>
<xsl:when test="@CHANGEDBY='SYSTEM'">
<xsl:value-of select="$DS_COL_MODSYS"/>
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<xsl:when test="((position() - 1) mod 2) = 0">
<xsl:value-of select="$DS_COL_ASH1"/>
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<xsl:otherwise>
<xsl:value-of select="$DS_COL_WHITE"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" align="left" bgcolor="{$name_bg_col_}">
<SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="@NAME"/>
</SPAN>
<xsl:if test="DESCRIPTION">
<BR/>
<SPAN style="color:{$DS_COL_BLACK}; font: bold italic 9px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="DESCRIPTION"/>
</SPAN>
</xsl:if>
</TD>
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$value_bg_col_}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@VALUE"/></SPAN></TD>
</xsl:if>
</xsl:for-each>
</TABLE>
</TD>
<TD COLSPAN="1" WIDTH="2%">
<TABLE BGCOLOR="{$DS_COL_GREY}" WIDTH="100%" COLS="1" cellspacing="0" cellpadding="0" border="0">
<TD COLSPAN="1" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_XPRP}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">&#160;</SPAN></TD>
</TABLE>
</TD>
<TD COLSPAN="2" WIDTH="49%">
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="100%" COLS="2" cellspacing="1" cellpadding="0" border="0">
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Name</SPAN></TD>
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Value</SPAN></TD>
<xsl:for-each select="PARAMETER">
<xsl:sort select="@INDEX" data-type="number"/>
<xsl:if test="position() &gt; $num_left_">
<xsl:variable name="name_bg_col_">
<xsl:choose>
<xsl:when test="@CHANGEDBY='USER'">
<xsl:value-of select="$DS_COL_MODUSR"/>
</xsl:when>
<xsl:when test="@CHANGEDBY='SYSTEM'">
<xsl:value-of select="$DS_COL_MODSYS"/>
</xsl:when>
<xsl:when test="((position() - $num_left_ - 1) mod 2) = 0">
<xsl:value-of select="$DS_COL_ASH1"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="$DS_COL_WHITE"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<xsl:variable name="value_bg_col_">
<xsl:choose>
<xsl:when test="@CHANGEDBY='USER'">
<xsl:value-of select="$DS_COL_MODUSR"/>
</xsl:when>
<xsl:when test="@CHANGEDBY='SYSTEM'">
<xsl:value-of select="$DS_COL_MODSYS"/>
</xsl:when>
<xsl:when test="((position() - $num_left_ - 1) mod 2) = 0">
<xsl:value-of select="$DS_COL_ASH1"/>
</xsl:when>
<xsl:otherwise>
<xsl:value-of select="$DS_COL_WHITE"/>
</xsl:otherwise>
</xsl:choose>
</xsl:variable>
<TR></TR>
<TD COLSPAN="1" WIDTH="50%" align="left" bgcolor="{$name_bg_col_}">
<SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="@NAME"/>
</SPAN>
<xsl:if test="DESCRIPTION">
<BR/>
<SPAN style="color:{$DS_COL_BLACK}; font: bold italic 9px Verdana,Arial,Helvetica,sans-serif">
<xsl:value-of select="DESCRIPTION"/>
</SPAN>
</xsl:if>
</TD>
<TD COLSPAN="1" WIDTH="50%" align="middle" bgcolor="{$value_bg_col_}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@VALUE"/></SPAN></TD>
</xsl:if>
</xsl:for-each>
<xsl:if test="$left_extra_ &gt; 0">
<TR></TR>
<TD COLSPAN="2" WIDTH="100%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">&#160;</SPAN></TD>
</xsl:if>
</TABLE>
</TD>
</TABLE>
</TD>
</xsl:if>
</xsl:if>
</TABLE>
<!--
<BR></BR>
-->
<xsl:if test="(@MODCLASS = 'PROCESSOR') and MEMORYMAP">
<!--
<xsl:message>Found a memory map</xsl:message>
-->
<xsl:call-template name="Layout_MemoryMap">
<xsl:with-param name="table_width" select="$table_width_"/>
</xsl:call-template>
</xsl:if>
<!--
<BR></BR>
-->
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="{$table_width_}" COLS="5" cellspacing="1" cellpadding="1" border="0">
<TD width="100%" COLSPAN="5" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">Post Synthesis Device Utilization</SPAN></TD>
<xsl:choose>
<xsl:when test="not(RESOURCES)">
<TR></TR>
<TD width="100%" COLSPAN="5" align="middle" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
Device utilization information is not available for this IP. Run platgen to generate synthesis information.
</SPAN>
</TD>
</xsl:when>
<xsl:otherwise>
<TR></TR>
<TD COLSPAN="2" width="55%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Resource Type</SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Used</SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Available</SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Percent</SPAN></TD>
<xsl:for-each select="RESOURCES/RESOURCE">
<TR></TR>
<TD COLSPAN="2" width="55%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@TYPE"/></SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@USED"/></SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@TOTAL"/></SPAN></TD>
<TD COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@PERCENT"/></SPAN></TD>
</xsl:for-each>
</xsl:otherwise>
</xsl:choose>
<!--
<BR></BR>
<TD COLSPAN="5" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 12px Verdana,Arial,Helvetica,sans-serif"></SPAN></TD>
-->
</TABLE>
</xsl:template>
<!-- Layout the Module's Port list table -->
<xsl:template name="Peri_PortListTable">
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="{ceiling($DS_WIDTH div 2)}" COLS="7" cellspacing="1" cellpadding="1" border="0">
<TH COLSPAN="7" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">PORT LIST</SPAN></TH>
<TR></TR>
<TH COLSPAN="7" width="100%" align="left" bgcolor="{$DS_COL_WHITE}">
<SPAN style="color:{$DS_COL_INFO}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
The ports listed here are only those connected in the MHS file.
<xsl:if test="@DOC_IP">
Refer to the IP <A HREF="{@DOC_IP}" style="text-decoration:none; color:{$DS_COL_XPRP}"> <SPAN style="color:{$DS_COL_XPRP}; font: bold italic 9px Verdana,Arial,Helvetica,sans-serif"> documentation </SPAN> </A>for complete information about module ports.
</xsl:if>
</SPAN>
</TH>
<TR></TR>
<TH COLSPAN="1" width="5%" align="left" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">#</SPAN></TH>
<TH COLSPAN="2" width="25%" align="left" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">NAME</SPAN></TH>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">DIR</SPAN></TH>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">[LSB:MSB]</SPAN></TH>
<TH COLSPAN="2" width="50%" align="left" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">SIGNAL</SPAN></TH>
<xsl:for-each select="PORT[(not(@SIGNAME = '__NOC__') and not(@SIGNAME = '__DEF__') and (@INMHS))]">
<xsl:sort data-type="number" select="@INDEX" order="ascending"/>
<TR></TR>
<TD COLSPAN="1" width="5%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@INDEX"/></SPAN></TD>
<TD COLSPAN="2" width="25%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@NAME"/></SPAN></TD>
<TD COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@DIR"/></SPAN></TD>
<xsl:if test="@MSB and @LSB">
<TD COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@LSB"/>:<xsl:value-of select="@MSB"/></SPAN></TD>
</xsl:if>
<xsl:if test="not(@MSB and @LSB)">
<TD COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
</xsl:if>
<TD COLSPAN="2" width="50%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@SIGNAME"/></SPAN></TD>
</xsl:for-each>
<xsl:if test="BUSINTERFACE">
<xsl:variable name="instance_"><xsl:value-of select="@INSTANCE"/></xsl:variable>
<TR></TR>
<TH COLSPAN="7" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}">
<SPAN style="color:{$DS_COL_WHITE}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">Bus Interfaces</SPAN>
</TH>
<TR></TR>
<TH COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">MASTERSHIP</SPAN></TH>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">NAME</SPAN></TH>
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">STD</SPAN></TH>
<TH COLSPAN="3" width="25%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">BUS</SPAN></TH>
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">P2P</SPAN></TH>
<xsl:for-each select="BUSINTERFACE[(not(@BUSNAME = '__NOC__') and not(@BUSNAME = '__DEF__'))]">
<xsl:sort select="@BIFRANK"/>
<xsl:variable name="busname_"><xsl:value-of select="@BUSNAME"/></xsl:variable>
<xsl:variable name="p2pname_">
<xsl:choose>
<xsl:when test="(@BUSSTD and not((@BUSSTD='PLB') or (@BUSSTD='OPB')) or (@BIFRANK='TRANSPARENT'))">
<xsl:value-of select="../../MODULE[not(@INSTANCE = $instance_) and BUSINTERFACE[(@BUSNAME = $busname_)]]/@INSTANCE"/>
</xsl:when>
<xsl:when test="not(@BUSSTD) or (@BUSSTD='OPB') or (@BUSSTD='PLB') or (@BIFRANK='TRANSPARENT')">NA</xsl:when>
</xsl:choose>
</xsl:variable>
<xsl:variable name="bus_std_">
<xsl:if test="@BUSSTD">
<xsl:value-of select="@BUSSTD"/>
</xsl:if>
<xsl:if test="not(@BUSSTD)">NA</xsl:if>
</xsl:variable>
<TR></TR>
<TH COLSPAN="1" width="15%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@BIFRANK"/></SPAN></TH>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@NAME"/></SPAN></TH>
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$bus_std_"/></SPAN></TH>
<xsl:if test="$bus_std_ = 'NA'">
<TH COLSPAN="3" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@BUSNAME"/></SPAN></TH>
</xsl:if>
<xsl:if test="not($bus_std_ = 'NA')">
<TH COLSPAN="3" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><A HREF="#_{@BUSNAME}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@BUSNAME"/></SPAN></A></TH>
</xsl:if>
<xsl:if test="$p2pname_ = 'NA'">
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$p2pname_"/></SPAN></TH>
</xsl:if>
<xsl:if test="not($p2pname_ = 'NA')">
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><A HREF="#_{$p2pname_}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$p2pname_"/></SPAN></A></TH>
</xsl:if>
</xsl:for-each>
</xsl:if>
<xsl:if test="@MODCLASS='BUS'">
<xsl:variable name="instance_"><xsl:value-of select="@INSTANCE"/></xsl:variable>
<TR></TR>
<TH COLSPAN="7" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}"><SPAN style="color:{$DS_COL_WHITE}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">Bus Connections</SPAN></TH>
<TR></TR>
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">TYPE</SPAN></TH>
<TH COLSPAN="5" width="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">NAME</SPAN></TH>
<TH COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">BIF</SPAN></TH>
<xsl:for-each select="../MODULE/BUSINTERFACE[(@BUSNAME = $instance_)]">
<xsl:sort select="@BIFRANK"/>
<xsl:variable name="buscName_"><xsl:value-of select="../@INSTANCE"/></xsl:variable>
<TR></TR>
<TD COLSPAN="1" width="25%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@BIFRANK"/></SPAN></TD>
<TD COLSPAN="5" width="50%" align="middle" bgcolor="{$DS_COL_WHITE}"><A HREF="#_{$buscName_}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$buscName_"/></SPAN></A></TD>
<TD COLSPAN="1" width="25%" align="left" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@NAME"/></SPAN></TD>
</xsl:for-each>
</xsl:if>
<xsl:if test="INTERRUPTSRCS">
<TR></TR>
<TH COLSPAN="7" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}">
<SPAN style="color:{$DS_COL_WHITE}; font: bold 9px Verdana,Arial,Helvetica,sans-serif">Interrupt Priorities</SPAN>
<TR></TR>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">Priority</SPAN></TH>
<TH COLSPAN="3" width="55%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">SIG</SPAN></TH>
<TH COLSPAN="3" width="35%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">MODULE</SPAN></TH>
<TR></TR>
<xsl:for-each select="INTERRUPTSRCS/INTRSRC">
<xsl:sort data-type="number" select="@PRIORITY" order="ascending"/>
<xsl:variable name="intrsrc_"><xsl:value-of select="@SIGNAME"/></xsl:variable>
<xsl:variable name="intrpri_"><xsl:value-of select="@PRIORITY"/></xsl:variable>
<xsl:for-each select="../../../MODULE[PORT[((@DIR='O') and (@SIGNAME = $intrsrc_))]]">
<TR></TR>
<TH COLSPAN="1" width="10%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$intrpri_"/></SPAN></TH>
<TH COLSPAN="3" width="55%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="$intrsrc_"/></SPAN></TH>
<TH COLSPAN="3" width="35%" align="middle" bgcolor="{$DS_COL_WHITE}"><A HREF="#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@INSTANCE"/></SPAN></A></TH>
</xsl:for-each>
</xsl:for-each>
</TH>
</xsl:if>
</TABLE>
</xsl:template>
</xsl:stylesheet>

86
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtXdsGen_HTMLMemoryMap.xsl
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<?xml version="1.0" standalone="no"?>
<!DOCTYPE stylesheet [
<!ENTITY HEXUPPER "ABCDEFxx0123456789">
<!ENTITY HEXLOWER "abcdefxX0123456789">
<!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
]>
<!--
-->
<xsl:stylesheet version="1.0"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:output method="html"/>
<!-- ======================= MAIN MEMORY MAP SECTION =============================== -->
<xsl:template name="Layout_MemoryMap">
<xsl:param name="table_width" select="600"/>
<xsl:variable name="procName" select="@INSTANCE"/>
<!--
<BR></BR>
<BR></BR>
-->
<xsl:if test="MEMORYMAP/MEMRANGE[(@INSTANCE)]">
<TABLE BGCOLOR="{$DS_COL_BLACK}" WIDTH="{$table_width}" COLS="5" cellspacing="1" cellpadding="2" border="0">
<TR></TR>
<TD COLSPAN="5" width="100%" align="middle" bgcolor="{$DS_COL_XPRP}">
<A name="_{@INSTANCE}_MemoryMap"/>
<SPAN style="color:{$DS_COL_WHITE}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">MEMORY MAP</SPAN>
</TD>
<TR></TR>
<TD COLSPAN="5" width="100%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_INFO}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">D=DATA ADDRESSABLE &#160;&#160; I=INSTRUCTION ADDRESSABLE</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">D</SPAN></TD>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 12px Verdana,Arial,Helvetica,sans-serif">I</SPAN></TD>
<TD COLSPAN="1" width="20%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">BASE</SPAN></TD>
<TD COLSPAN="1" width="20%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">HIGH</SPAN></TD>
<TD COLSPAN="1" width="50%" align="middle" bgcolor="{$DS_COL_GREY}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 10px Verdana,Arial,Helvetica,sans-serif">MODULE</SPAN></TD>
<TR></TR>
<xsl:for-each select="MEMORYMAP/MEMRANGE[(@INSTANCE)]">
<xsl:sort data-type="number" select="@BASEVALUE" order="ascending"/>
<TR></TR>
<xsl:variable name="isdata">
<xsl:if test="@IS_DATA='TRUE'">&#9632;</xsl:if>
<xsl:if test="not(@IS_DATA='TRUE')">&#160;</xsl:if>
</xsl:variable>
<xsl:variable name="isinst">
<xsl:if test="@IS_INSTRUCTION='TRUE'">
&#9632;
</xsl:if>
<xsl:if test="not(@IS_INSTRUCTION='TRUE')">
&#160;
</xsl:if>
</xsl:variable>
<xsl:variable name="bupper" select ="@BASE"/>
<xsl:variable name="hupper" select ="@HIGH"/>
<xsl:variable name="iname" select ="@INSTANCE"/>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 14px Verdana,Arial,sans-serif"><xsl:value-of select="$isdata"/></SPAN></TD>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: bold 14px Verdana,Arial,sans-serif"><xsl:value-of select="$isinst"/></SPAN></TD>
<TD COLSPAN="1" width="20%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="translate($bupper,&HEXU2L;)"/></SPAN></TD>
<TD COLSPAN="1" width="20%" align="middle" bgcolor="{$DS_COL_WHITE}"><SPAN style="color:{$DS_COL_BLACK}; font: normal 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="translate($hupper,&HEXU2L;)"/></SPAN></TD>
<TD COLSPAN="1" width="50%" align="right" bgcolor="{$DS_COL_WHITE}">
<A HREF="#_{$iname}" style="text-decoration:none">
<SPAN style="color:{$DS_COL_BLACK}; vertical-align:sub; font: normal 8px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@BASENAME"/>:<xsl:value-of select="@HIGHNAME"/></SPAN><SPAN style="color:{$DS_COL_XPRP}; font: bold 12px Verdana,Arial,Helvetica,sans-serif"><xsl:value-of select="@INSTANCE"/></SPAN>
</A>
</TD>
</xsl:for-each>
</TABLE>
</xsl:if>
</xsl:template>
<xsl:template name="FindCorrectLocation">
<xsl:param name="ranges"/>
<xsl:param name="location"/>
<xsl:param name="instname"/>
</xsl:template>
</xsl:stylesheet>

235
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/MdtXdsGen_HTMLTOCTree.xsl
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<?xml version="1.0" standalone="no"?>
<xsl:stylesheet version="1.0"
xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
xmlns:exsl="http://exslt.org/common"
xmlns:xlink="http://www.w3.org/1999/xlink">
<xsl:template name="Write_TOCTree">
<HTML>
<HEAD>
<TITLE>Table of Contents</TITLE>
<BASE target="{$DS_FRAME_MAIN}"></BASE>
<!--specify a css for the TOC -->
<link rel="stylesheet" href="ds_Report.css" type="text/css"></link>
<!--specify the javascript for the TOC-->
<script src="ds_Report.js" type="text/javascript"></script>
</HEAD>
<!--Layout Table of contents -->
<BODY class="main_body">
<xsl:call-template name="Layout_TOCTree"/>
</BODY>
</HTML>
</xsl:template>
<!-- ======================= LAYOUT TABLE OF CONTENTS ====================================== -->
<xsl:template name="Layout_TOCTree">
<xsl:variable name="toc_col_">
<xsl:if test="$DS_TYPE='NOFRAMES'">
<xsl:value-of select="$DS_COL_LGRY"/>
</xsl:if>
<xsl:if test="$DS_TYPE='FRAMES'">
<xsl:value-of select="$DS_COL_WHITE"/>
</xsl:if>
</xsl:variable>
<xsl:variable name="toc_width_">
<xsl:if test="$DS_TYPE='NOFRAMES'">
<xsl:value-of select="$DS_WIDTH"/>
</xsl:if>
<xsl:if test="$DS_TYPE='FRAMES'">
<xsl:value-of select="$DS_TOC_WIDTH"/>
</xsl:if>
</xsl:variable>
<xsl:variable name="toc_target_">
<xsl:if test="$DS_TYPE='NOFRAMES'">
<xsl:value-of select="$DS_FRAME_SELF"/>
</xsl:if>
<xsl:if test="$DS_TYPE='FRAMES'">
<xsl:value-of select="$DS_FRAME_MAIN"/>
</xsl:if>
</xsl:variable>
<xsl:variable name="trg_html_">
<xsl:if test="$DS_TYPE='NOFRAMES'">
<xsl:value-of select="''"/>
</xsl:if>
<xsl:if test="$DS_TYPE='FRAMES'">
<xsl:value-of select="$DS_HTML_MAIN"/>
</xsl:if>
</xsl:variable>
<A name="_TOC"/>
<TABLE BGCOLOR="{$toc_col_}" WIDTH="{$toc_width_}" COLS="2" cellspacing="0" cellpadding="3" border="0">
<xsl:if test="$DS_TYPE='NOFRAMES'">
<TH COLSPAN="2" width="100%" align="middle"><SPAN style="color:{$DS_COL_XPRP}; font: bold 20px Arial,Helvetica,sans-serif">TABLE OF CONTENTS</SPAN></TH>
</xsl:if>
<TR></TR>
<TD COLSPAN="1" width="40%" align="left">
<BR></BR>
<A HREF="{$trg_html_}#_Overview" style="text-decoration:none"><SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Overview</SPAN></A>
<BR></BR>
<A HREF="{$trg_html_}#_BlockDiagram" style="text-decoration:none"><SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Block Diagram</SPAN></A>
<BR></BR>
<A HREF="{$trg_html_}#_ExternalPorts" style="text-decoration:none"><SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">External Ports</SPAN></A>
<BR></BR>
<xsl:variable name="proc_CNT" select="count(MODULES/MODULE[(@MODCLASS = 'PROCESSOR')])"/>
<xsl:if test="MODULES/MODULE[(@MODCLASS='PROCESSOR')]">
<DIV class="trigger" onClick="showBranch('Processors'); swapBranchImg('BranchImg_Processors');">
<xsl:if test="$proc_CNT &gt; 1">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Processors&#160;</SPAN>
</xsl:if>
<xsl:if test="not($proc_CNT &gt; 1)">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Processor&#160;</SPAN>
</xsl:if>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Processors"></IMG>
</DIV>
<SPAN class="branch" id="Processors">
<xsl:for-each select="MODULES/MODULE[(@MODCLASS='PROCESSOR')]">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><BR></BR>
<xsl:if test="MEMORYMAP/MEMRANGE[(@INSTANCE)]">
<A HREF="{$trg_html_}#_{@INSTANCE}_MemoryMap" style="text-decoration:none"><SPAN style="color:{$DS_COL_BLACK}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;&#160;memory map</SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:if>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[(@MODCLASS='DEBUG')]">
<DIV class="trigger" onClick="showBranch('Debuggers'); swapBranchImg('BranchImg_Debugger');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Debuggers&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Debugger"></IMG>
</DIV>
<SPAN class="branch" id="Debuggers">
<xsl:for-each select="MODULES/MODULE[(@MODCLASS='DEBUG')]">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[(@MODCLASS='INTERRUPT_CNTLR')]">
<DIV class="trigger" onClick="showBranch('Interrupts'); swapBranchImg('BranchImg_Interrupts');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Interrupt Controllers&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Interrupts"></IMG>
</DIV>
<SPAN class="branch" id="Interrupts">
<xsl:for-each select="MODULES/MODULE[(@MODCLASS='INTERRUPT_CNTLR')]">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='BUS' or @MODCLASS='BUS_ARBITER']">
<DIV class="trigger" onClick="showBranch('Busses'); swapBranchImg('BranchImg_Busses');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Busses&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Busses"></IMG>
</DIV>
<SPAN class="branch" id="Busses">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='BUS' or @MODCLASS='BUS_ARBITER']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='BUS_BRIDGE']">
<DIV class="trigger" onClick="showBranch('Bridges'); swapBranchImg('BranchImg_Bridges');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Bridges&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Bridges"></IMG>
</DIV>
<SPAN class="branch" id="Bridges">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='BUS_BRIDGE']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='MEMORY']">
<DIV class="trigger" onClick="showBranch('Memory'); swapBranchImg('BranchImg_Memory');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Memory&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Memory"></IMG>
</DIV>
<SPAN class="branch" id="Memory">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='MEMORY']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='MEMORY_CNTLR']">
<DIV class="trigger" onClick="showBranch('MemoryCntlr'); swapBranchImg('BranchImg_MemoryCntlr');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Memory Controllers&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_MemoryCntlr"></IMG>
</DIV>
<SPAN class="branch" id="MemoryCntlr">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='MEMORY_CNTLR']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='PERIPHERAL']">
<DIV class="trigger" onClick="showBranch('Peripheral'); swapBranchImg('BranchImg_Peripheral');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Peripherals&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_Peripheral"></IMG>
</DIV>
<SPAN class="branch" id="Peripheral">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='PERIPHERAL']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Courier Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<xsl:if test="MODULES/MODULE[@MODCLASS='IP']">
<DIV class="trigger" onClick="showBranch('IP'); swapBranchImg('BranchImg_IP');">
<SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">IP&#160;</SPAN>
<IMG src="imgs/IMG_openBranch.gif" border="0" id="BranchImg_IP"></IMG>
</DIV>
<SPAN class="branch" id="IP">
<xsl:for-each select="MODULES/MODULE[@MODCLASS='IP']">
<xsl:sort select="@INSTANCE"/>
<A HREF="{$trg_html_}#_{@INSTANCE}" style="text-decoration:none"><SPAN style="color:{$DS_COL_XPRP}; font: italic 14px Courier Verdana Arial,Helvetica,sans-serif">&#160;&#160;&#160;<xsl:value-of select="@INSTANCE"/></SPAN></A><xsl:if test="LICENSEINFO"><IMG SRC="imgs/IMG_LicensedCore.bmp" border="0" vspace="0" hspace="0"/></xsl:if><BR></BR>
</xsl:for-each>
</SPAN>
</xsl:if>
<A HREF="{$trg_html_}#_TimingInfo" style="text-decoration:none"><SPAN style="color:{$DS_COL_BLACK}; font: bold 16px Verdana Arial,Helvetica,sans-serif">Timing Information</SPAN></A><BR></BR>
<!--
-->
</TD>
</TABLE>
</xsl:template>
</xsl:stylesheet>
<!-- ======================= END LAYOUT TABLE OF CONTENT TREE =================================== -->

1704
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/svg10.dtd
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1643
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/.dswkshop/system_shapes.xml
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1
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/bitinit.opt
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@ -0,0 +1 @@
-pe ppc405_0 $(PPC405_0_BOOTLOOP)

1
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/libgen.opt
Unescape Escape View File

@ -0,0 +1 @@
-p virtex4

2
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/platgen.opt
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-p xc4vfx12ff668-10 -lang vhdl

20
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt
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ppc405_0
RTOSDEMO_SOURCES = RTOSDemo/../../Common/Minimal/BlockQ.c RTOSDemo/../../Common/Minimal/blocktim.c RTOSDemo/../../Common/Minimal/comtest.c RTOSDemo/../../Common/Minimal/countsem.c RTOSDemo/../../Common/Minimal/death.c RTOSDemo/../../Common/Minimal/dynamic.c RTOSDemo/../../Common/Minimal/flash.c RTOSDemo/../../Common/Minimal/GenQTest.c RTOSDemo/../../Common/Minimal/integer.c RTOSDemo/../../Common/Minimal/QPeek.c RTOSDemo/../../Common/Minimal/recmutex.c RTOSDemo/../../Common/Minimal/semtest.c RTOSDemo/../../../Source/tasks.c RTOSDemo/../../../Source/list.c RTOSDemo/../../../Source/queue.c RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/port.c RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/portasm.S RTOSDemo/../../../Source/portable/MemMang/heap_2.c RTOSDemo/flop/flop.c RTOSDemo/flop/flop-reg-test.c
RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h
RTOSDEMO_CC = powerpc-eabi-gcc
RTOSDEMO_CC_SIZE = powerpc-eabi-size
RTOSDEMO_CC_OPT = -O0
RTOSDEMO_CFLAGS = -I./RTOSDemo/flop -I../../Source/portable/GCC/PPC405_Xilinx -I./ppc405_0/include/ -IRTOSDemo/ -I. -I./RTOSDemo/ -I../Common/include/ -I../../Source/include/ -I./ppc405_0/include/ -I./ppc405_0/include -D GCC_PPC405 -mregnames -Wextra
RTOSDEMO_CC_SEARCH = # -B
RTOSDEMO_LIBPATH = -L./ppc405_0/lib/ # -L
RTOSDEMO_INCLUDES = -I./ppc405_0/include/ -IRTOSDemo/ # -I
RTOSDEMO_LFLAGS = # -l
RTOSDEMO_LINKER_SCRIPT = RTOSDemo/RTOSDemo_linker_script.ld
RTOSDEMO_CC_DEBUG_FLAG = -g
RTOSDEMO_CC_PROFILE_FLAG = # -pg
RTOSDEMO_CC_GLOBPTR_FLAG= # -msdata=eabi
RTOSDEMO_CC_INFERRED_FLAGS=
RTOSDEMO_CC_START_ADDR_FLAG= # # -Wl,-defsym -Wl,_START_ADDR=
RTOSDEMO_CC_STACK_SIZE_FLAG= # # -Wl,-defsym -Wl,_STACK_SIZE=
RTOSDEMO_CC_HEAP_SIZE_FLAG= # # -Wl,-defsym -Wl,_HEAP_SIZE=
$(RTOSDEMO_CC_INFERRED_FLAGS) \

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/simgen.opt
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-p virtex4 -lang vhdl -pe ppc405_0 $(PPC405_0_BOOTLOOP) -s mti -X C:/E/temp/rc/3/V5.0.2/FreeRTOS/Demo/PPC405_Xilinx_Virtex4_GCC/ -E C:/E/temp/rc/3/V5.0.2/FreeRTOS/Demo/PPC405_Xilinx_Virtex4_GCC/

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system.gui
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<PRO_GUISETTING VIEWSTATUS="BIFS_TREE">
<GUISETTING HSCROLL="0" ID="BIFS_TREE" SPSIZE1="114" SPSIZE2="978" VSCROLL="0">
<COLHDR INDEX="0" NAME="Name" VISIBLE="TRUE" WIDTH="151"/>
<COLHDR INDEX="4" NAME="Bus Connection" VISIBLE="TRUE" WIDTH="156"/>
<COLHDR INDEX="6" NAME="Bus Standard" VISIBLE="FALSE" WIDTH="0"/>
<COLHDR INDEX="1" NAME="IP Type" VISIBLE="TRUE" WIDTH="93"/>
<COLHDR INDEX="2" NAME="IP Version" VISIBLE="TRUE" WIDTH="104"/>
<COLHDR INDEX="5" NAME="Mastership" VISIBLE="FALSE" WIDTH="0"/>
<COLHDR INDEX="3" NAME="IP CLASSIFICATION" VISIBLE="FALSE" WIDTH="0"/>
<EXPANDED/>
</GUISETTING>
<GUISETTING HSCROLL="0" ID="PORTS_TREE" VSCROLL="0">
<COLHDR INDEX="0" NAME="Name" VISIBLE="TRUE" WIDTH="200"/>
<COLHDR INDEX="1" NAME="Net" VISIBLE="TRUE" WIDTH="200"/>
<COLHDR INDEX="2" NAME="Direction" VISIBLE="TRUE" WIDTH="98"/>
<COLHDR INDEX="4" NAME="Range" VISIBLE="TRUE" WIDTH="200"/>
<COLHDR INDEX="3" NAME="Class" VISIBLE="TRUE" WIDTH="81"/>
<COLHDR INDEX="5" NAME="Frequency" VISIBLE="TRUE" WIDTH="106"/>
<COLHDR INDEX="6" NAME="Reset Polarity" VISIBLE="TRUE" WIDTH="121"/>
<COLHDR INDEX="9" NAME="Sensitivity" VISIBLE="TRUE" WIDTH="103"/>
<COLHDR INDEX="7" NAME="IP Type" VISIBLE="TRUE" WIDTH="93"/>
<COLHDR INDEX="8" NAME="IP Version" VISIBLE="FALSE" WIDTH="0"/>
<EXPANDED/>
</GUISETTING>
<GUISETTING HSCROLL="0" ID="ADDRESSES_TREE" VSCROLL="0">
<COLHDR INDEX="0" NAME="Name" VISIBLE="TRUE" WIDTH="153"/>
<COLHDR INDEX="3" NAME="Base Address" VISIBLE="TRUE" WIDTH="121"/>
<COLHDR INDEX="4" NAME="High Address" VISIBLE="TRUE" WIDTH="119"/>
<COLHDR INDEX="5" NAME="Size" VISIBLE="TRUE" WIDTH="76"/>
<COLHDR INDEX="7" NAME="Bus Interface(s)" VISIBLE="TRUE" WIDTH="130"/>
<COLHDR INDEX="10" NAME="Bus Connection" VISIBLE="TRUE" WIDTH="131"/>
<COLHDR INDEX="6" NAME="Lock" VISIBLE="TRUE" WIDTH="80"/>
<COLHDR INDEX="9" NAME="ICache" VISIBLE="TRUE" WIDTH="90"/>
<COLHDR INDEX="8" NAME="DCache" VISIBLE="TRUE" WIDTH="95"/>
<COLHDR INDEX="1" NAME="IP Type" VISIBLE="TRUE" WIDTH="93"/>
<COLHDR INDEX="2" NAME="IP Version" VISIBLE="TRUE" WIDTH="104"/>
<EXPANDED/>
</GUISETTING>
<GUISETTING COLSORT="0" HSCROLL="0" ID="ADDRESSES_FLAT" SORTORE="1" VSCROLL="0">
<COLHDR INDEX="11" NAME="Instance" VISIBLE="TRUE" WIDTH="115"/>
<COLHDR INDEX="0" NAME="Name" VISIBLE="TRUE" WIDTH="153"/>
<COLHDR INDEX="3" NAME="Base Address" VISIBLE="TRUE" WIDTH="121"/>
<COLHDR INDEX="4" NAME="High Address" VISIBLE="TRUE" WIDTH="119"/>
<COLHDR INDEX="5" NAME="Size" VISIBLE="TRUE" WIDTH="76"/>
<COLHDR INDEX="7" NAME="Bus Interface(s)" VISIBLE="TRUE" WIDTH="130"/>
<COLHDR INDEX="10" NAME="Bus Connection" VISIBLE="TRUE" WIDTH="131"/>
<COLHDR INDEX="6" NAME="Lock" VISIBLE="TRUE" WIDTH="80"/>
<COLHDR INDEX="9" NAME="ICache" VISIBLE="TRUE" WIDTH="90"/>
<COLHDR INDEX="8" NAME="DCache" VISIBLE="TRUE" WIDTH="95"/>
<COLHDR INDEX="1" NAME="IP Type" VISIBLE="TRUE" WIDTH="93"/>
<COLHDR INDEX="2" NAME="IP Version" VISIBLE="TRUE" WIDTH="104"/>
</GUISETTING></PRO_GUISETTING>

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/system_routed
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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/testapp_peripheral_compiler.opt
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ppc405_0
TESTAPP_PERIPHERAL_SOURCES = /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/TestApp_Peripheral.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/xintc_tapp_example.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/xuartlite_selftest_example.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/xuartlite_intr_tapp_example.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/xgpio_tapp_example.c /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/xsysace_selftest_example.c
TESTAPP_PERIPHERAL_HEADERS = /cygdrive/c//E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/intc_header.h /cygdrive/c//E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/uartlite_header.h /cygdrive/c//E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/uartlite_intr_header.h /cygdrive/c//E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/gpio_header.h /cygdrive/c//E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/sysace_header.h
TESTAPP_PERIPHERAL_CC = powerpc-eabi-gcc
TESTAPP_PERIPHERAL_CC_SIZE = powerpc-eabi-size
TESTAPP_PERIPHERAL_CC_OPT = -O0
TESTAPP_PERIPHERAL_CFLAGS =
TESTAPP_PERIPHERAL_CC_SEARCH = # -B
TESTAPP_PERIPHERAL_LIBPATH = -L./ppc405_0/lib/ # -L
TESTAPP_PERIPHERAL_INCLUDES = -I./ppc405_0/include/ -ITestApp_Peripheral/src/ # -I
TESTAPP_PERIPHERAL_LFLAGS = # -l
TESTAPP_PERIPHERAL_LINKER_SCRIPT = /cygdrive/c/E/Dev/FreeRTOS/WorkingCopy2/Demo/PPC405_FPU_Xilinx_Virtex4_GCC/TestApp_Peripheral/src/TestApp_Peripheral_LinkScr.ld
TESTAPP_PERIPHERAL_CC_DEBUG_FLAG = -g
TESTAPP_PERIPHERAL_CC_PROFILE_FLAG = # -pg
TESTAPP_PERIPHERAL_CC_GLOBPTR_FLAG= # -msdata=eabi
TESTAPP_PERIPHERAL_CC_INFERRED_FLAGS= -mfpu=sp_full
TESTAPP_PERIPHERAL_CC_START_ADDR_FLAG= # # -Wl,-defsym -Wl,_START_ADDR=
TESTAPP_PERIPHERAL_CC_STACK_SIZE_FLAG= # # -Wl,-defsym -Wl,_STACK_SIZE=
TESTAPP_PERIPHERAL_CC_HEAP_SIZE_FLAG= # # -Wl,-defsym -Wl,_HEAP_SIZE=
$(TESTAPP_PERIPHERAL_CC_INFERRED_FLAGS) \

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/vpgen.opt
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-p xc4vfx12ff668-10

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Demo/PPC405_Xilinx_Virtex4_GCC/__xps/xplorer.opt
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-device xc4vfx12ff668-10data/system.ucf7 0

1
Demo/PPC405_Xilinx_Virtex4_GCC/__xps/xpsxflow.opt
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-device xc4vfx12ff668-10data/system.ucf 0

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Demo/PPC405_Xilinx_Virtex4_GCC/blkdiagram/svg10.dtd
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Demo/PPC405_Xilinx_Virtex4_GCC/blkdiagram/system.css
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text.busintlabel {
fill: #810017;
stroke: none;
font-size: 7pt;
font-style: italic;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mpmctitle {
fill: #FFFFFF;
stroke: none;
font-size: 16pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Verdana Helvetica sans-serif;
}
text.mpmcbiflabel {
fill: #FFFFFF;
stroke: none;
font-size: 6pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.buslabel {
fill: #CC3333;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.iplabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: 800;
text-anchor: middle;
font-family: Courier Arial Helvetica sans-serif;
}
text.iptype {
fill: #AA0017;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ipclass {
fill: #000000;
stroke: none;
font-size: 7pt;
font-style: normal;
font-weight: bold;
text-anchor: start;
font-family: Times Arial Helvetica sans-serif;
}
text.procclass {
fill: #000000;
stroke: none;
font-size: 7pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Times Arial Helvetica sans-serif;
}
text.portlabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ipdbiflbl {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: bold;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmMHeader {
fill: #FFFFFF;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mmSHeader {
fill: #810017;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.dbglabel {
fill: #555555;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Times Arial Helvetica sans-serif;
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text.iopnumb {
fill: #555555;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.ioplblgrp {
fill: #000088;
stroke: none;
font-size: 10pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
tspan.iopgrp {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
baseline-shift:super;
font-family: Arial Courier san-serif;
}
text.biflabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: normal;
font-weight: 900;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
}
text.p2pbuslabel {
fill: #000000;
stroke: none;
font-size: 10pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
writing-mode: tb;
font-family: Verdana Arial Helvetica sans-serif;
}
text.mpbuslabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
writing-mode: tb;
font-family: Verdana Arial Helvetica sans-serif;
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text.sharedbuslabel {
fill: #000000;
stroke: none;
font-size: 10pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
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text.bciplabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Courier Arial Helvetica sans-serif;
}
text.bciptype {
fill: #AA0017;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: middle;
font-family: Verdana Arial Helvetica sans-serif;
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text.splitbustxt {
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font-size: 6pt;
font-style: normal;
font-weight: bold;
text-anchor: middle;
font-family: sans-serif;
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text.horizp2pbuslabel {
fill: #000000;
stroke: none;
font-size: 6pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
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text.keytitle {
fill: #AA0017;
stroke: none;
font-size: 12pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
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fill: #000000;
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font-size: 10pt;
font-weight: bold;
text-anchor: middle;
font-family: Arial Helvetica sans-serif;
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text.keylabel {
fill: #000000;
stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
font-family: Verdana Arial Helvetica sans-serif;
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text.keylblul {
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stroke: none;
font-size: 8pt;
font-style: italic;
font-weight: bold;
text-anchor: start;
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Demo/PPC405_Xilinx_Virtex4_GCC/blkdiagram/system.html
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<HTML xmlns:exsl="http://exslt.org/common" xmlns:xlink="http://www.w3.org/1999/xlink">
<HEAD>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<TITLE>Block Diagram</TITLE>
</HEAD>
<BODY class="main_body">
<EMBED src="system.svg" width="992" height="1413" type="image/svg+xml"></EMBED><BR><BR><TABLE BGCOLOR="#000000" WIDTH="850" COLS="8" cellspacing="1" cellpadding="1" border="0">
<TD COLSPAN="8" ALIGN="middle" BGCOLOR="#810017"><SPAN style="color:#FFFFFF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">EXTERNAL PORTS</SPAN></TD>
<TR></TR>
<TD COLSPAN="8" ALIGN="middle" bgcolor="#FFFFFF"><SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">
These are the external ports defined in the MHS file.
</SPAN></TD>
<TR></TR>
<TD COLSPAN="8" ALIGN="left" bgcolor="#FFFFFF">
<SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">Attributes Key</SPAN><BR><SPAN style="color:#000000; font: italic 9px Verdana,Arial,Helvetica,sans-serif">The attributes are obtained from the SIGIS and IOB_STATE parameters set on the PORT in the MHS file </SPAN><BR><SPAN style="color:#55FF55; font: bold 12px Verdana,Arial,Helvetica,sans-serif">CLK</SPAN><SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">  indicates Clock ports, (SIGIS = CLK) </SPAN><BR><SPAN style="color:#5555FF; font: bold 12px Verdana,Arial,Helvetica,sans-serif">INTR</SPAN><SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">  indicates Interrupt ports,(SIGIS = INTR) </SPAN><BR><SPAN style="color:#FFCC00; font: bold 12px Verdana,Arial,Helvetica,sans-serif">RESET</SPAN><SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">  indicates Reset ports, (SIGIS = RST) </SPAN><BR><SPAN style="color:#FF5555; font: bold 12px Verdana,Arial,Helvetica,sans-serif">BUF or REG</SPAN><SPAN style="color:#2233FF; font: bold 9px Verdana,Arial,Helvetica,sans-serif">  Indicates ports that instantiate or infer IOB primitives, (IOB_STATE = BUF or REG) </SPAN>
</TD>
<TR></TR>
<TD COLSPAN="3" WIDTH="49%"><TABLE BGCOLOR="#000000" WIDTH="100%" COLS="9" cellspacing="1" cellpadding="0" border="0">
<TD COLSPAN="1" width="5" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">#</SPAN></TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">NAME</SPAN></TD>
<TD COLSPAN="1" width="5%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">DIR</SPAN></TD>
<TD COLSPAN="1" width="5%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">[LSB:MSB]</SPAN></TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">SIG</SPAN></TD>
<TD COLSPAN="2" width="25%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">ATTRIBUTES</SPAN></TD>
<TR></TR>
<TD COLSPAN="1" width="5%" align="left" bgcolor="#FFFFFF">
<SPAN style="color:#000000; font: bold 14px Verdana,Arial,Helvetica,sans-serif"></SPAN><SPAN style="color:#000000; vertical-align: super; font: bold 10px Arial,Helvetica,sans-serif"></SPAN>
</TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">fpga_0_RS232_Uart_RX_pin</SPAN></TD>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: bold 10px Verdana,Arial,Helvetica,sans-serif">I</SPAN></TD>
<TD COLSPAN="1" width="5%" align="middle" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: bold 10px Verdana,Arial,Helvetica,sans-serif">1</SPAN></TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">fpga_0_RS232_Uart_RX</SPAN></TD>
<TD COLSPAN="2" width="25%" align="left" bgcolor="#FFFFFF"></TD>
<TR></TR>
<TD COLSPAN="1" width="5%" align="left" bgcolor="#FFFFFF">
<SPAN style="color:#000000; font: bold 14px Verdana,Arial,Helvetica,sans-serif"></SPAN><SPAN style="color:#000000; vertical-align: super; font: bold 10px Arial,Helvetica,sans-serif"></SPAN>
</TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: normal 12px Verdana,Arial,Helvetica,sans-serif">fpga_0_RS232_Uart_TX_pin</SPAN></TD>
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<TD COLSPAN="1" WIDTH="2%" BGCOLOR="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif"> </SPAN></TD>
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<TD COLSPAN="1" width="5%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">#</SPAN></TD>
<TD COLSPAN="2" width="30%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">NAME</SPAN></TD>
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<TD COLSPAN="1" width="5%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">[LSB:MSB]</SPAN></TD>
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<TD COLSPAN="2" width="25%" align="left" bgcolor="#BBBBBB"><SPAN style="color:#810017; font: bold 10px Verdana,Arial,Helvetica,sans-serif">ATTRIBUTES</SPAN></TD>
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<TD COLSPAN="1" width="5%" align="middle" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: bold 10px Verdana,Arial,Helvetica,sans-serif">9:29</SPAN></TD>
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<TD COLSPAN="1" width="5%" align="middle" bgcolor="#FFFFFF"><SPAN style="color:#000000; font: bold 10px Verdana,Arial,Helvetica,sans-serif">0:3</SPAN></TD>
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Demo/PPC405_Xilinx_Virtex4_GCC/data/system.ucf
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############################################################################
## This system.ucf file is generated by Base System Builder based on the
## settings in the selected Xilinx Board Definition file. Please add other
## user constraints to this file based on customer design specifications.
############################################################################
Net sys_clk_pin LOC=AE14;
Net sys_clk_pin IOSTANDARD = LVCMOS33;
Net sys_rst_pin LOC=D6;
Net sys_rst_pin PULLUP;
## System level constraints
Net sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 10000 ps;
Net sys_rst_pin TIG;
NET "ppc_reset_bus_Chip_Reset_Req" TPTHRU = "RST_GRP";
NET "ppc_reset_bus_Core_Reset_Req" TPTHRU = "RST_GRP";
NET "ppc_reset_bus_System_Reset_Req" TPTHRU = "RST_GRP";
TIMESPEC "TS_RST1" = FROM CPUS THRU RST_GRP TO FFS TIG;
Net fpga_0_SRAM_CLOCK LOC=AF7;
Net fpga_0_SRAM_CLOCK SLEW = FAST;
Net fpga_0_SRAM_CLOCK IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_CLOCK DRIVE = 16;
## IO Devices constraints
#### Module RS232_Uart constraints
Net fpga_0_RS232_Uart_RX_pin LOC=W2;
Net fpga_0_RS232_Uart_RX_pin IOSTANDARD = LVCMOS33;
Net fpga_0_RS232_Uart_TX_pin LOC=W1;
Net fpga_0_RS232_Uart_TX_pin IOSTANDARD = LVCMOS33;
#### Module LEDs_4Bit constraints
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> LOC=G5;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> PULLUP;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> DRIVE = 2;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> TIG;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> LOC=G6;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> PULLUP;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> DRIVE = 2;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> TIG;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> LOC=A11;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> PULLUP;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> DRIVE = 2;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> TIG;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> LOC=A12;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> PULLUP;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> DRIVE = 2;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> TIG;
#### Module LEDs_Positions constraints
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> LOC=C6;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> PULLUP;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> SLEW = SLOW;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> DRIVE = 2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<0> TIG;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> LOC=F9;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> PULLUP;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> SLEW = SLOW;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> DRIVE = 2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<1> TIG;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> LOC=A5;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> PULLUP;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> SLEW = SLOW;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> DRIVE = 2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<2> TIG;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> LOC=E10;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> PULLUP;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> SLEW = SLOW;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> DRIVE = 2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<3> TIG;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> LOC=E2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> PULLUP;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> SLEW = SLOW;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> DRIVE = 2;
Net fpga_0_LEDs_Positions_GPIO_IO_pin<4> TIG;
#### Module SysACE_CompactFlash constraints
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin LOC=AF11;
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin PERIOD = 30000 ps;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> LOC=Y10;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> LOC=AA10;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> LOC=AC7;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> LOC=Y7;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> LOC=AA9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> LOC=Y9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> LOC=AB7;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> LOC=AC9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> LOC=AB9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> LOC=AE6;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> LOC=AD6;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> LOC=AF9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> LOC=AE9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> LOC=AD8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> LOC=AC8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> LOC=AF4;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> LOC=AE4;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> LOC=AD3;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> LOC=AC3;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> LOC=AF6;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> LOC=AF5;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> LOC=AA7;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin LOC=AD5;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin LOC=AA8;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin LOC=Y8;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin LOC=AD4;
Net fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin TIG;
#### Module SRAM constraints
Net fpga_0_SRAM_Mem_A_pin<29> LOC=Y1;
Net fpga_0_SRAM_Mem_A_pin<29> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<29> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<29> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<28> LOC=Y2;
Net fpga_0_SRAM_Mem_A_pin<28> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<28> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<28> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<27> LOC=AA1;
Net fpga_0_SRAM_Mem_A_pin<27> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<27> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<27> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<26> LOC=AB1;
Net fpga_0_SRAM_Mem_A_pin<26> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<26> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<26> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<25> LOC=AB2;
Net fpga_0_SRAM_Mem_A_pin<25> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<25> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<25> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<24> LOC=AC1;
Net fpga_0_SRAM_Mem_A_pin<24> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<24> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<24> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<23> LOC=AC2;
Net fpga_0_SRAM_Mem_A_pin<23> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<23> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<23> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<22> LOC=AD1;
Net fpga_0_SRAM_Mem_A_pin<22> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<22> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<22> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<21> LOC=AD2;
Net fpga_0_SRAM_Mem_A_pin<21> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<21> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<21> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<20> LOC=AE3;
Net fpga_0_SRAM_Mem_A_pin<20> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<20> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<20> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<19> LOC=AF3;
Net fpga_0_SRAM_Mem_A_pin<19> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<19> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<19> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<18> LOC=W3;
Net fpga_0_SRAM_Mem_A_pin<18> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<18> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<18> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<17> LOC=W6;
Net fpga_0_SRAM_Mem_A_pin<17> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<17> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<17> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<16> LOC=W5;
Net fpga_0_SRAM_Mem_A_pin<16> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<16> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<16> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<15> LOC=AA3;
Net fpga_0_SRAM_Mem_A_pin<15> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<15> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<15> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<14> LOC=AA4;
Net fpga_0_SRAM_Mem_A_pin<14> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<14> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<14> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<13> LOC=AB3;
Net fpga_0_SRAM_Mem_A_pin<13> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<13> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<13> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<12> LOC=AB4;
Net fpga_0_SRAM_Mem_A_pin<12> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<12> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<12> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<11> LOC=AC4;
Net fpga_0_SRAM_Mem_A_pin<11> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<11> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<11> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<10> LOC=AB5;
Net fpga_0_SRAM_Mem_A_pin<10> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<10> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<10> DRIVE = 8;
Net fpga_0_SRAM_Mem_A_pin<9> LOC=AC5;
Net fpga_0_SRAM_Mem_A_pin<9> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_A_pin<9> SLEW = FAST;
Net fpga_0_SRAM_Mem_A_pin<9> DRIVE = 8;
Net fpga_0_SRAM_Mem_BEN_pin<3> LOC=Y6;
Net fpga_0_SRAM_Mem_BEN_pin<3> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_BEN_pin<3> SLEW = FAST;
Net fpga_0_SRAM_Mem_BEN_pin<3> DRIVE = 8;
Net fpga_0_SRAM_Mem_BEN_pin<2> LOC=Y5;
Net fpga_0_SRAM_Mem_BEN_pin<2> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_BEN_pin<2> SLEW = FAST;
Net fpga_0_SRAM_Mem_BEN_pin<2> DRIVE = 8;
Net fpga_0_SRAM_Mem_BEN_pin<1> LOC=Y4;
Net fpga_0_SRAM_Mem_BEN_pin<1> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_BEN_pin<1> SLEW = FAST;
Net fpga_0_SRAM_Mem_BEN_pin<1> DRIVE = 8;
Net fpga_0_SRAM_Mem_BEN_pin<0> LOC=Y3;
Net fpga_0_SRAM_Mem_BEN_pin<0> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_BEN_pin<0> SLEW = FAST;
Net fpga_0_SRAM_Mem_BEN_pin<0> DRIVE = 8;
Net fpga_0_SRAM_Mem_WEN_pin LOC=AB6;
Net fpga_0_SRAM_Mem_WEN_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_WEN_pin SLEW = FAST;
Net fpga_0_SRAM_Mem_WEN_pin DRIVE = 8;
Net fpga_0_SRAM_Mem_DQ_pin<31> LOC=AD13;
Net fpga_0_SRAM_Mem_DQ_pin<31> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<31> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<31> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<30> LOC=AC13;
Net fpga_0_SRAM_Mem_DQ_pin<30> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<30> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<30> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<29> LOC=AC15;
Net fpga_0_SRAM_Mem_DQ_pin<29> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<29> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<29> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<28> LOC=AC16;
Net fpga_0_SRAM_Mem_DQ_pin<28> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<28> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<28> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<27> LOC=AA11;
Net fpga_0_SRAM_Mem_DQ_pin<27> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<27> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<27> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<26> LOC=AA12;
Net fpga_0_SRAM_Mem_DQ_pin<26> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<26> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<26> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<25> LOC=AD14;
Net fpga_0_SRAM_Mem_DQ_pin<25> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<25> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<25> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<24> LOC=AC14;
Net fpga_0_SRAM_Mem_DQ_pin<24> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<24> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<24> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<23> LOC=AA13;
Net fpga_0_SRAM_Mem_DQ_pin<23> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<23> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<23> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<22> LOC=AB13;
Net fpga_0_SRAM_Mem_DQ_pin<22> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<22> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<22> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<21> LOC=AA15;
Net fpga_0_SRAM_Mem_DQ_pin<21> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<21> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<21> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<20> LOC=AA16;
Net fpga_0_SRAM_Mem_DQ_pin<20> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<20> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<20> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<19> LOC=AC11;
Net fpga_0_SRAM_Mem_DQ_pin<19> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<19> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<19> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<18> LOC=AC12;
Net fpga_0_SRAM_Mem_DQ_pin<18> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<18> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<18> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<17> LOC=AB14;
Net fpga_0_SRAM_Mem_DQ_pin<17> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<17> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<17> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<16> LOC=AA14;
Net fpga_0_SRAM_Mem_DQ_pin<16> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<16> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<16> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<15> LOC=D12;
Net fpga_0_SRAM_Mem_DQ_pin<15> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<15> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<15> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<14> LOC=E13;
Net fpga_0_SRAM_Mem_DQ_pin<14> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<14> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<14> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<13> LOC=C16;
Net fpga_0_SRAM_Mem_DQ_pin<13> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<13> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<13> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<12> LOC=D16;
Net fpga_0_SRAM_Mem_DQ_pin<12> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<12> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<12> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<11> LOC=D11;
Net fpga_0_SRAM_Mem_DQ_pin<11> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<11> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<11> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<10> LOC=C11;
Net fpga_0_SRAM_Mem_DQ_pin<10> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<10> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<10> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<9> LOC=E14;
Net fpga_0_SRAM_Mem_DQ_pin<9> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<9> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<9> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<8> LOC=D15;
Net fpga_0_SRAM_Mem_DQ_pin<8> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<8> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<8> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<7> LOC=D13;
Net fpga_0_SRAM_Mem_DQ_pin<7> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<7> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<7> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<6> LOC=D14;
Net fpga_0_SRAM_Mem_DQ_pin<6> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<6> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<6> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<5> LOC=F15;
Net fpga_0_SRAM_Mem_DQ_pin<5> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<5> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<5> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<4> LOC=F16;
Net fpga_0_SRAM_Mem_DQ_pin<4> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<4> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<4> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<3> LOC=F11;
Net fpga_0_SRAM_Mem_DQ_pin<3> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<3> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<3> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<2> LOC=F12;
Net fpga_0_SRAM_Mem_DQ_pin<2> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<2> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<2> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<1> LOC=F13;
Net fpga_0_SRAM_Mem_DQ_pin<1> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<1> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<1> DRIVE = 12;
Net fpga_0_SRAM_Mem_DQ_pin<0> LOC=F14;
Net fpga_0_SRAM_Mem_DQ_pin<0> SLEW = FAST;
Net fpga_0_SRAM_Mem_DQ_pin<0> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_DQ_pin<0> DRIVE = 12;
Net fpga_0_SRAM_Mem_OEN_pin<0> LOC=AC6;
Net fpga_0_SRAM_Mem_OEN_pin<0> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_OEN_pin<0> SLEW = FAST;
Net fpga_0_SRAM_Mem_OEN_pin<0> DRIVE = 8;
Net fpga_0_SRAM_Mem_CEN_pin<0> LOC=V7;
Net fpga_0_SRAM_Mem_CEN_pin<0> IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_CEN_pin<0> SLEW = FAST;
Net fpga_0_SRAM_Mem_CEN_pin<0> DRIVE = 8;
Net fpga_0_SRAM_Mem_ADV_LDN_pin LOC=W4;
Net fpga_0_SRAM_Mem_ADV_LDN_pin IOSTANDARD = LVCMOS33;
Net fpga_0_SRAM_Mem_ADV_LDN_pin SLEW = FAST;
Net fpga_0_SRAM_Mem_ADV_LDN_pin DRIVE = 8;

20
Demo/PPC405_Xilinx_Virtex4_GCC/etc/bitgen.ut
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-g CclkPin:PULLUP
-g TdoPin:PULLNONE
-g M1Pin:PULLDOWN
-g DonePin:PULLUP
-g DriveDone:No
-g StartUpClk:JTAGCLK
-g DONE_cycle:4
-g GTS_cycle:5
-g M0Pin:PULLUP
-g M2Pin:PULLUP
-g ProgPin:PULLUP
-g TckPin:PULLUP
-g TdiPin:PULLUP
-g TmsPin:PULLUP
-g DonePipe:No
-g GWE_cycle:6
-g LCK_cycle:NoWait
-g Security:NONE
#-m
-g Persist:No

6
Demo/PPC405_Xilinx_Virtex4_GCC/etc/download.cmd
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setMode -bscan
setCable -p auto
identify
assignfile -p 3 -file implementation/download.bit
program -p 3
quit

82
Demo/PPC405_Xilinx_Virtex4_GCC/etc/fast_runtime.opt
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FLOWTYPE = FPGA;
###############################################################
## Filename: fast_runtime.opt
##
## Option File For Xilinx FPGA Implementation Flow for Fast
## Runtime.
##
## Version: 4.1.1
###############################################################
#
# Options for Translator
#
# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
#
Program ngdbuild
-p <partname>; # Partname to use - picked from xflow commandline
-nt timestamp; # NGO File generation. Regenerate only when
# source netlist is newer than existing
# NGO file (default)
-bm <design>.bmm # Block RAM memory map file
<userdesign>; # User design - pick from xflow command line
-uc <design>.ucf; # ucf constraints
<design>.ngd; # Name of NGD file. Filebase same as design filebase
End Program ngdbuild
#
# Options for Mapper
#
# Type "map -h <arch>" for a detailed list of map command line options
#
Program map
-o <design>_map.ncd; # Output Mapped ncd file
-pr b; # Pack internal FF/latches into IOBs
#-fp <design>.mfp; # Floorplan file
-ol high;
-timing;
<inputdir><design>.ngd; # Input NGD file
<inputdir><design>.pcf; # Physical constraints file
END Program map
#
# Options for Post Map Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_map_trce
-e 3; # Produce error report limited to 3 items per constraint
#-o <design>_map.twr; # Output trace report file
-xml <design>_map.twx; # Output XML version of the timing report
#-tsi <design>_map.tsi; # Produce Timing Specification Interaction report
<inputdir><design>_map.ncd; # Input mapped ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_map_trce
#
# Options for Place and Route
#
# Type "par -h" for a detailed list of par command line options
#
Program par
-w; # Overwrite existing placed and routed ncd
-ol high; # Overall effort level
<inputdir><design>_map.ncd; # Input mapped NCD file
<design>.ncd; # Output placed and routed NCD
<inputdir><design>.pcf; # Input physical constraints file
END Program par
#
# Options for Post Par Trace
#
# Type "trce -h" for a detailed list of trce command line options
#
Program post_par_trce
-e 3; # Produce error report limited to 3 items per constraint
#-o <design>.twr; # Output trace report file
-xml <design>.twx; # Output XML version of the timing report
#-tsi <design>.tsi; # Produce Timing Specification Interaction report
<inputdir><design>.ncd; # Input placed and routed ncd
<inputdir><design>.pcf; # Physical constraints file
END Program post_par_trce

1
Demo/PPC405_Xilinx_Virtex4_GCC/etc/xmd_ppc405_0.opt
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connect ppc hw -cable type xilinx_parallel port LPT1 frequency 5000000 -debugdevice cpunr 1

5
Demo/PPC405_Xilinx_Virtex4_GCC/platgen.opt
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-p
xc4vfx12ff668-10
-lang
vhdl
system.mhs

1
Demo/PPC405_Xilinx_Virtex4_GCC/system.bsb
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Demo/PPC405_Xilinx_Virtex4_GCC/system.make
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#################################################################
# Makefile generated by Xilinx Platform Studio
# Project:C:\E\temp\rc\3\V5.0.2\FreeRTOS\Demo\PPC405_Xilinx_Virtex4_GCC\system.xmp
#
# WARNING : This file will be re-generated every time a command
# to run a make target is invoked. So, any changes made to this
# file manually, will be lost when make is invoked next.
#################################################################
# Name of the Microprocessor system
# The hardware specification of the system is in file :
# C:\E\temp\rc\3\V5.0.2\FreeRTOS\Demo\PPC405_Xilinx_Virtex4_GCC\system.mhs
# The software specification of the system is in file :
# C:\E\temp\rc\3\V5.0.2\FreeRTOS\Demo\PPC405_Xilinx_Virtex4_GCC\system.mss
include system_incl.make
#################################################################
# PHONY TARGETS
#################################################################
.PHONY: dummy
.PHONY: netlistclean
.PHONY: bitsclean
.PHONY: simclean
.PHONY: vpclean
#################################################################
# EXTERNAL TARGETS
#################################################################
all:
@echo "Makefile to build a Microprocessor system :"
@echo "Run make with any of the following targets"
@echo " "
@echo " netlist : Generates the netlist for the given MHS "
@echo " bits : Runs Implementation tools to generate the bitstream"
@echo " "
@echo " libs : Configures the sw libraries for this system"
@echo " program : Compiles the program sources for all the processor instances"
@echo " "
@echo " init_bram: Initializes bitstream with BRAM data"
@echo " ace : Generate ace file from bitstream and elf"
@echo " download : Downloads the bitstream onto the board"
@echo " "
@echo " sim : Generates HDL simulation models and runs simulator for chosen simulation mode"
@echo " simmodel : Generates HDL simulation models for chosen simulation mode"
@echo " behavioral_model : Generates behavioral HDL models with BRAM initialization"
@echo " structural_model : Generates structural simulation HDL models with BRAM initialization"
@echo " timing : Generates timing simulation HDL models with BRAM initialization"
@echo " vp : Generates virtual platform model"
@echo " "
@echo " netlistclean: Deletes netlist"
@echo " bitsclean: Deletes bit, ncd, bmm files"
@echo " hwclean : Deletes implementation dir"
@echo " libsclean: Deletes sw libraries"
@echo " programclean: Deletes compiled ELF files"
@echo " swclean : Deletes sw libraries and ELF files"
@echo " simclean : Deletes simulation dir"
@echo " vpclean : Deletes virtualplatform dir"
@echo " clean : Deletes all generated files/directories"
@echo " "
@echo " make <target> : (Default)"
@echo " Creates a Microprocessor system using default initializations"
@echo " specified for each processor in MSS file"
bits: $(SYSTEM_BIT)
ace: $(SYSTEM_ACE)
netlist: $(POSTSYN_NETLIST)
libs: $(LIBRARIES)
program: $(ALL_USER_ELF_FILES)
download: $(DOWNLOAD_BIT) dummy
@echo "*********************************************"
@echo "Downloading Bitstream onto the target board"
@echo "*********************************************"
impact -batch etc/download.cmd
init_bram: $(DOWNLOAD_BIT)
sim: $(DEFAULT_SIM_SCRIPT)
cd simulation/behavioral; \
$(SIM_CMD) &
simmodel: $(DEFAULT_SIM_SCRIPT)
behavioral_model: $(BEHAVIORAL_SIM_SCRIPT)
structural_model: $(STRUCTURAL_SIM_SCRIPT)
vp: $(VPEXEC)
clean: hwclean libsclean programclean simclean vpclean
rm -f _impact.cmd
rm -f *.log
hwclean: netlistclean bitsclean
rm -rf implementation synthesis xst hdl
rm -rf xst.srp $(SYSTEM).srp
netlistclean:
rm -f $(POSTSYN_NETLIST)
rm -f platgen.log
rm -f $(BMM_FILE)
bitsclean:
rm -f $(SYSTEM_BIT)
rm -f implementation/$(SYSTEM).ncd
rm -f implementation/$(SYSTEM)_bd.bmm
rm -f implementation/$(SYSTEM)_map.ncd
simclean:
rm -rf simulation/behavioral
rm -f simgen.log
swclean: libsclean programclean
@echo ""
libsclean: $(LIBSCLEAN_TARGETS)
rm -f libgen.log
programclean: $(PROGRAMCLEAN_TARGETS)
vpclean:
rm -rf virtualplatform
rm -f vpgen.log
#################################################################
# SOFTWARE PLATFORM FLOW
#################################################################
$(LIBRARIES): $(MHSFILE) $(MSSFILE) __xps/libgen.opt
@echo "*********************************************"
@echo "Creating software libraries..."
@echo "*********************************************"
libgen $(LIBGEN_OPTIONS) $(MSSFILE)
ppc405_0_libsclean:
rm -rf ppc405_0/
#################################################################
# SOFTWARE APPLICATION RTOSDEMO
#################################################################
RTOSDemo_program: $(RTOSDEMO_OUTPUT)
$(RTOSDEMO_OUTPUT) : $(RTOSDEMO_SOURCES) $(RTOSDEMO_HEADERS) $(RTOSDEMO_LINKER_SCRIPT) \
$(LIBRARIES) __xps/rtosdemo_compiler.opt
@mkdir -p $(RTOSDEMO_OUTPUT_DIR)
$(RTOSDEMO_CC) $(RTOSDEMO_CC_OPT) $(RTOSDEMO_SOURCES) -o $(RTOSDEMO_OUTPUT) \
$(RTOSDEMO_OTHER_CC_FLAGS) $(RTOSDEMO_INCLUDES) $(RTOSDEMO_LIBPATH) \
$(RTOSDEMO_CFLAGS) $(RTOSDEMO_LFLAGS)
$(RTOSDEMO_CC_SIZE) $(RTOSDEMO_OUTPUT)
@echo ""
RTOSDemo_programclean:
rm -f $(RTOSDEMO_OUTPUT)
#################################################################
# BOOTLOOP ELF FILES
#################################################################
$(PPC405_0_BOOTLOOP): $(PPC405_BOOTLOOP)
@mkdir -p $(BOOTLOOP_DIR)
cp -f $(PPC405_BOOTLOOP) $(PPC405_0_BOOTLOOP)
#################################################################
# HARDWARE IMPLEMENTATION FLOW
#################################################################
$(BMM_FILE) \
$(WRAPPER_NGC_FILES): $(MHSFILE) __xps/platgen.opt \
$(CORE_STATE_DEVELOPMENT_FILES)
@echo "****************************************************"
@echo "Creating system netlist for hardware specification.."
@echo "****************************************************"
platgen $(PLATGEN_OPTIONS) $(MHSFILE)
$(POSTSYN_NETLIST): $(WRAPPER_NGC_FILES)
@echo "Running synthesis..."
bash -c "cd synthesis; ./synthesis.sh"
__xps/$(SYSTEM)_routed: $(FPGA_IMP_DEPENDENCY)
@echo "*********************************************"
@echo "Running Xilinx Implementation tools.."
@echo "*********************************************"
@cp -f $(UCF_FILE) implementation/$(SYSTEM).ucf
xilperl $(NON_CYG_XILINX_EDK_DIR)/data/fpga_impl/manage_fastruntime_opt.pl $(MANAGE_FASTRT_OPTIONS)
xflow -wd implementation -p $(DEVICE) -implement xflow.opt $(SYSTEM).ngc
touch __xps/$(SYSTEM)_routed
$(SYSTEM_BIT): __xps/$(SYSTEM)_routed
xilperl $(NON_CYG_XILINX_EDK_DIR)/data/fpga_impl/observe_par.pl $(OBSERVE_PAR_OPTIONS) implementation/$(SYSTEM).par
@echo "*********************************************"
@echo "Running Bitgen.."
@echo "*********************************************"
@cp -f $(BITGEN_UT_FILE) implementation/bitgen.ut
cd implementation; bitgen -w -f bitgen.ut $(SYSTEM)
$(DOWNLOAD_BIT): $(SYSTEM_BIT) $(BRAMINIT_ELF_FILES) __xps/bitinit.opt
# @cp -f implementation/$(SYSTEM)_bd.bmm .
@echo "*********************************************"
@echo "Initializing BRAM contents of the bitstream"
@echo "*********************************************"
bitinit $(MHSFILE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) \
-bt $(SYSTEM_BIT) -o $(DOWNLOAD_BIT)
@rm -f $(SYSTEM)_bd.bmm
$(SYSTEM_ACE): $(DOWNLOAD_BIT) $(RTOSDEMO_OUTPUT)
@echo "*********************************************"
@echo "Creating system ace file"
@echo "*********************************************"
xmd -tcl genace.tcl -jprog -hw $(DOWNLOAD_BIT) -elf $(RTOSDEMO_OUTPUT) -target ppc_hw -ace $(SYSTEM_ACE)
#################################################################
# SIMULATION FLOW
#################################################################
################## BEHAVIORAL SIMULATION ##################
$(BEHAVIORAL_SIM_SCRIPT): $(MHSFILE) __xps/simgen.opt \
$(BRAMINIT_ELF_FILES)
@echo "*********************************************"
@echo "Creating behavioral simulation models..."
@echo "*********************************************"
simgen $(SIMGEN_OPTIONS) -m behavioral $(MHSFILE)
################## STRUCTURAL SIMULATION ##################
$(STRUCTURAL_SIM_SCRIPT): $(WRAPPER_NGC_FILES) __xps/simgen.opt \
$(BRAMINIT_ELF_FILES)
@echo "*********************************************"
@echo "Creating structural simulation models..."
@echo "*********************************************"
simgen $(SIMGEN_OPTIONS) -sd implementation -m structural $(MHSFILE)
################## TIMING SIMULATION ##################
$(TIMING_SIM_SCRIPT): $(SYSTEM_BIT) __xps/simgen.opt \
$(BRAMINIT_ELF_FILES)
@echo "*********************************************"
@echo "Creating timing simulation models..."
@echo "*********************************************"
simgen $(SIMGEN_OPTIONS) -sd implementation -m timing $(MHSFILE)
#################################################################
# VIRTUAL PLATFORM FLOW
#################################################################
$(VPEXEC): $(MHSFILE) __xps/vpgen.opt
@echo "****************************************************"
@echo "Creating virtual platform for hardware specification.."
@echo "****************************************************"
vpgen $(VPGEN_OPTIONS) $(MHSFILE)
dummy:
@echo ""

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Demo/PPC405_Xilinx_Virtex4_GCC/system.mhs
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# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 10.1.01 Build EDK_K_SP1.3
# Fri May 09 11:01:33 2008
# Target Board: Xilinx Virtex 4 ML403 Evaluation Platform Rev 1
# Family: virtex4
# Device: xc4vfx12
# Package: ff668
# Speed Grade: -10
# Processor: ppc405_0
# Processor clock frequency: 200.00 MHz
# Bus clock frequency: 100.00 MHz
# Total Off Chip Memory : 1 MB
# - SRAM = 1 MB
# ##############################################################################
PARAMETER VERSION = 2.1.0
PORT fpga_0_RS232_Uart_RX_pin = fpga_0_RS232_Uart_RX, DIR = I
PORT fpga_0_RS232_Uart_TX_pin = fpga_0_RS232_Uart_TX, DIR = O
PORT fpga_0_LEDs_4Bit_GPIO_IO_pin = fpga_0_LEDs_4Bit_GPIO_IO, DIR = IO, VEC = [0:3]
PORT fpga_0_LEDs_Positions_GPIO_IO_pin = fpga_0_LEDs_Positions_GPIO_IO, DIR = IO, VEC = [0:4]
PORT fpga_0_SysACE_CompactFlash_SysACE_CLK_pin = fpga_0_SysACE_CompactFlash_SysACE_CLK, DIR = I
PORT fpga_0_SysACE_CompactFlash_SysACE_MPA_pin = fpga_0_SysACE_CompactFlash_SysACE_MPA, DIR = O, VEC = [6:1]
PORT fpga_0_SysACE_CompactFlash_SysACE_MPD_pin = fpga_0_SysACE_CompactFlash_SysACE_MPD, DIR = IO, VEC = [15:0]
PORT fpga_0_SysACE_CompactFlash_SysACE_CEN_pin = fpga_0_SysACE_CompactFlash_SysACE_CEN, DIR = O
PORT fpga_0_SysACE_CompactFlash_SysACE_OEN_pin = fpga_0_SysACE_CompactFlash_SysACE_OEN, DIR = O
PORT fpga_0_SysACE_CompactFlash_SysACE_WEN_pin = fpga_0_SysACE_CompactFlash_SysACE_WEN, DIR = O
PORT fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin = fpga_0_SysACE_CompactFlash_SysACE_MPIRQ, DIR = I
PORT fpga_0_SRAM_Mem_A_pin = fpga_0_SRAM_Mem_A, DIR = O, VEC = [9:29]
PORT fpga_0_SRAM_Mem_BEN_pin = fpga_0_SRAM_Mem_BEN, DIR = O, VEC = [0:3]
PORT fpga_0_SRAM_Mem_WEN_pin = fpga_0_SRAM_Mem_WEN, DIR = O
PORT fpga_0_SRAM_Mem_DQ_pin = fpga_0_SRAM_Mem_DQ, DIR = IO, VEC = [0:31]
PORT fpga_0_SRAM_Mem_OEN_pin = fpga_0_SRAM_Mem_OEN, DIR = O, VEC = [0:0]
PORT fpga_0_SRAM_Mem_CEN_pin = fpga_0_SRAM_Mem_CEN, DIR = O, VEC = [0:0]
PORT fpga_0_SRAM_Mem_ADV_LDN_pin = fpga_0_SRAM_Mem_ADV_LDN, DIR = O
PORT fpga_0_SRAM_CLOCK = sys_clk_s, DIR = O
PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000
PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 0, SIGIS = RST
BEGIN ppc405_virtex4
PARAMETER INSTANCE = ppc405_0
PARAMETER HW_VER = 2.01.a
PARAMETER C_FASTEST_PLB_CLOCK = DPLB0
PARAMETER C_APU_CONTROL = 0b0000000000000001
PARAMETER C_IDCR_BASEADDR = 0b0100000000
PARAMETER C_IDCR_HIGHADDR = 0b0111111111
BUS_INTERFACE JTAGPPC = jtagppc_0_0
BUS_INTERFACE IPLB0 = plb
BUS_INTERFACE DPLB0 = plb
BUS_INTERFACE RESETPPC = ppc_reset_bus
PORT CPMC405CLOCK = proc_clk_s
PORT EICC405EXTINPUTIRQ = EICC405EXTINPUTIRQ
END
BEGIN jtagppc_cntlr
PARAMETER INSTANCE = jtagppc_0
PARAMETER HW_VER = 2.01.a
BUS_INTERFACE JTAGPPC0 = jtagppc_0_0
END
BEGIN plb_v46
PARAMETER INSTANCE = plb
PARAMETER C_DCR_INTFCE = 0
PARAMETER C_NUM_CLK_PLB2OPB_REARB = 100
PARAMETER HW_VER = 1.02.a
PORT PLB_Clk = sys_clk_s
PORT SYS_Rst = sys_bus_reset
END
BEGIN xps_uartlite
PARAMETER INSTANCE = RS232_Uart
PARAMETER HW_VER = 1.00.a
PARAMETER C_BAUDRATE = 9600
PARAMETER C_DATA_BITS = 8
PARAMETER C_ODD_PARITY = 0
PARAMETER C_USE_PARITY = 0
PARAMETER C_SPLB_CLK_FREQ_HZ = 100000000
PARAMETER C_BASEADDR = 0x84000000
PARAMETER C_HIGHADDR = 0x8400ffff
BUS_INTERFACE SPLB = plb
PORT RX = fpga_0_RS232_Uart_RX
PORT TX = fpga_0_RS232_Uart_TX
PORT Interrupt = RS232_Uart_Interrupt
END
BEGIN xps_gpio
PARAMETER INSTANCE = LEDs_4Bit
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 4
PARAMETER C_IS_DUAL = 0
PARAMETER C_IS_BIDIR = 1
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0x81400000
PARAMETER C_HIGHADDR = 0x8140ffff
BUS_INTERFACE SPLB = plb
PORT GPIO_IO = fpga_0_LEDs_4Bit_GPIO_IO
END
BEGIN xps_gpio
PARAMETER INSTANCE = LEDs_Positions
PARAMETER HW_VER = 1.00.a
PARAMETER C_GPIO_WIDTH = 5
PARAMETER C_IS_DUAL = 0
PARAMETER C_IS_BIDIR = 1
PARAMETER C_ALL_INPUTS = 0
PARAMETER C_BASEADDR = 0x81420000
PARAMETER C_HIGHADDR = 0x8142ffff
BUS_INTERFACE SPLB = plb
PORT GPIO_IO = fpga_0_LEDs_Positions_GPIO_IO
END
BEGIN xps_sysace
PARAMETER INSTANCE = SysACE_CompactFlash
PARAMETER HW_VER = 1.00.a
PARAMETER C_MEM_WIDTH = 16
PARAMETER C_BASEADDR = 0x83600000
PARAMETER C_HIGHADDR = 0x8360ffff
BUS_INTERFACE SPLB = plb
PORT SysACE_CLK = fpga_0_SysACE_CompactFlash_SysACE_CLK
PORT SysACE_MPA = fpga_0_SysACE_CompactFlash_SysACE_MPA & SysACE_CompactFlash_SysACE_MPA
PORT SysACE_MPD = fpga_0_SysACE_CompactFlash_SysACE_MPD
PORT SysACE_CEN = fpga_0_SysACE_CompactFlash_SysACE_CEN
PORT SysACE_OEN = fpga_0_SysACE_CompactFlash_SysACE_OEN
PORT SysACE_WEN = fpga_0_SysACE_CompactFlash_SysACE_WEN
PORT SysACE_MPIRQ = fpga_0_SysACE_CompactFlash_SysACE_MPIRQ
END
BEGIN xps_mch_emc
PARAMETER INSTANCE = SRAM
PARAMETER HW_VER = 1.01.a
PARAMETER C_MCH_PLB_CLK_PERIOD_PS = 10000
PARAMETER C_NUM_BANKS_MEM = 1
PARAMETER C_MAX_MEM_WIDTH = 32
PARAMETER C_INCLUDE_NEGEDGE_IOREGS = 1
PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
PARAMETER C_MEM0_WIDTH = 32
PARAMETER C_SYNCH_MEM_0 = 1
PARAMETER C_TCEDV_PS_MEM_0 = 0
PARAMETER C_TWC_PS_MEM_0 = 0
PARAMETER C_TAVDV_PS_MEM_0 = 0
PARAMETER C_TWP_PS_MEM_0 = 0
PARAMETER C_THZCE_PS_MEM_0 = 0
PARAMETER C_TLZWE_PS_MEM_0 = 0
PARAMETER C_MEM0_BASEADDR = 0xfff00000
PARAMETER C_MEM0_HIGHADDR = 0xffffffff
BUS_INTERFACE SPLB = plb
PORT Mem_A = fpga_0_SRAM_Mem_A_split
PORT Mem_BEN = fpga_0_SRAM_Mem_BEN
PORT Mem_WEN = fpga_0_SRAM_Mem_WEN
PORT Mem_DQ = fpga_0_SRAM_Mem_DQ
PORT Mem_OEN = fpga_0_SRAM_Mem_OEN
PORT Mem_CEN = fpga_0_SRAM_Mem_CEN
PORT Mem_ADV_LDN = fpga_0_SRAM_Mem_ADV_LDN
PORT RdClk = sys_clk_s
END
BEGIN util_bus_split
PARAMETER INSTANCE = SRAM_util_bus_split_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_SIZE_IN = 32
PARAMETER C_LEFT_POS = 9
PARAMETER C_SPLIT = 30
PORT Sig = fpga_0_SRAM_Mem_A_split
PORT Out1 = fpga_0_SRAM_Mem_A
END
BEGIN clock_generator
PARAMETER INSTANCE = clock_generator_0
PARAMETER HW_VER = 2.01.a
PARAMETER C_EXT_RESET_HIGH = 1
PARAMETER C_CLKIN_FREQ = 100000000
PARAMETER C_CLKOUT0_FREQ = 200000000
PARAMETER C_CLKOUT0_BUF = TRUE
PARAMETER C_CLKOUT0_PHASE = 0
PARAMETER C_CLKOUT0_GROUP = NONE
PARAMETER C_CLKOUT1_FREQ = 100000000
PARAMETER C_CLKOUT1_BUF = TRUE
PARAMETER C_CLKOUT1_PHASE = 0
PARAMETER C_CLKOUT1_GROUP = NONE
PORT CLKOUT0 = proc_clk_s
PORT CLKOUT1 = sys_clk_s
PORT CLKIN = dcm_clk_s
PORT LOCKED = Dcm_all_locked
PORT RST = net_gnd
END
BEGIN proc_sys_reset
PARAMETER INSTANCE = proc_sys_reset_0
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 0
BUS_INTERFACE RESETPPC0 = ppc_reset_bus
PORT Slowest_sync_clk = sys_clk_s
PORT Dcm_locked = Dcm_all_locked
PORT Ext_Reset_In = sys_rst_s
PORT Bus_Struct_Reset = sys_bus_reset
PORT Peripheral_Reset = sys_periph_reset
END
BEGIN xps_intc
PARAMETER INSTANCE = xps_intc_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x81800000
PARAMETER C_HIGHADDR = 0x8180ffff
BUS_INTERFACE SPLB = plb
PORT Irq = EICC405EXTINPUTIRQ
PORT Intr = RS232_Uart_Interrupt
END

82
Demo/PPC405_Xilinx_Virtex4_GCC/system.mss
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PARAMETER VERSION = 2.2.0
BEGIN OS
PARAMETER OS_NAME = standalone
PARAMETER OS_VER = 2.00.a
PARAMETER PROC_INSTANCE = ppc405_0
END
BEGIN PROCESSOR
PARAMETER DRIVER_NAME = cpu_ppc405
PARAMETER DRIVER_VER = 1.10.a
PARAMETER HW_INSTANCE = ppc405_0
PARAMETER COMPILER = powerpc-eabi-gcc
PARAMETER ARCHIVER = powerpc-eabi-ar
PARAMETER CORE_CLOCK_FREQ_HZ = 200000000
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = jtagppc_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = uartlite
PARAMETER DRIVER_VER = 1.13.a
PARAMETER HW_INSTANCE = RS232_Uart
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 2.12.a
PARAMETER HW_INSTANCE = LEDs_4Bit
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = gpio
PARAMETER DRIVER_VER = 2.12.a
PARAMETER HW_INSTANCE = LEDs_Positions
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = sysace
PARAMETER DRIVER_VER = 1.11.a
PARAMETER HW_INSTANCE = SysACE_CompactFlash
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = emc
PARAMETER DRIVER_VER = 2.00.a
PARAMETER HW_INSTANCE = SRAM
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = SRAM_util_bus_split_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = clock_generator_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = generic
PARAMETER DRIVER_VER = 1.00.a
PARAMETER HW_INSTANCE = proc_sys_reset_0
END
BEGIN DRIVER
PARAMETER DRIVER_NAME = intc
PARAMETER DRIVER_VER = 1.11.a
PARAMETER HW_INSTANCE = xps_intc_0
END

74
Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp
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#Please do not modify this file by hand
XmpVersion: 10.1.01
VerMgmt: 10.1.01
IntStyle: default
MHS File: system.mhs
MSS File: system.mss
NPL File: projnav/system.ise
Architecture: virtex4
Device: xc4vfx12
Package: ff668
SpeedGrade: -10
UserCmd1:
UserCmd1Type: 0
UserCmd2:
UserCmd2Type: 0
TopInst: system_i
GenSimTB: 0
InsertNoPads: 0
WarnForEAArch: 1
HdlLang: VHDL
Simulator: mti
SimModel: BEHAVIORAL
MixLangSim: 1
UcfFile: data/system.ucf
FpgaImpMode: 0
EnableParTimingError: 1
EnableResetOptimization: 0
ShowLicenseDialog: 1
ICacheAddr: SRAM,
DCacheAddr: SRAM,
Processor: ppc405_0
BootLoop: 1
XmdStub: 0
SwProj: RTOSDemo
Processor: ppc405_0
Executable: RTOSDemo/executable.elf
Source: RTOSDemo/../../Common/Minimal/BlockQ.c
Source: RTOSDemo/../../Common/Minimal/blocktim.c
Source: RTOSDemo/../../Common/Minimal/comtest.c
Source: RTOSDemo/../../Common/Minimal/countsem.c
Source: RTOSDemo/../../Common/Minimal/death.c
Source: RTOSDemo/../../Common/Minimal/dynamic.c
Source: RTOSDemo/../../Common/Minimal/flash.c
Source: RTOSDemo/../../Common/Minimal/GenQTest.c
Source: RTOSDemo/../../Common/Minimal/integer.c
Source: RTOSDemo/../../Common/Minimal/QPeek.c
Source: RTOSDemo/../../Common/Minimal/recmutex.c
Source: RTOSDemo/../../Common/Minimal/semtest.c
Source: RTOSDemo/../../../Source/tasks.c
Source: RTOSDemo/../../../Source/list.c
Source: RTOSDemo/../../../Source/queue.c
Source: RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/port.c
Source: RTOSDemo/main.c
Source: RTOSDemo/serial/serial.c
Source: RTOSDemo/partest/partest.c
Source: RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/portasm.S
Source: RTOSDemo/../../../Source/portable/MemMang/heap_2.c
Source: RTOSDemo/flop/flop.c
Source: RTOSDemo/flop/flop-reg-test.c
Header: RTOSDemo/FreeRTOSConfig.h
DefaultInit: EXECUTABLE
InitBram: 0
Active: 1
CompilerOptLevel: 0
GlobPtrOpt: 0
DebugSym: 1
ProfileFlag: 0
ProgStart:
StackSize:
HeapSize:
LinkerScript: RTOSDemo/RTOSDemo_linker_script.ld
ProgCCFlags: -I./RTOSDemo/flop -I../../Source/portable/GCC/PPC405_Xilinx -I./ppc405_0/include/ -IRTOSDemo/ -I. -I./RTOSDemo/ -I../Common/include/ -I../../Source/include/ -I./ppc405_0/include/ -I./ppc405_0/include -D GCC_PPC405 -mregnames
CompileInXps: 1
NonXpsApp: 0

142
Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make
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#################################################################
# Makefile generated by Xilinx Platform Studio
# Project:C:\E\temp\rc\3\V5.0.2\FreeRTOS\Demo\PPC405_Xilinx_Virtex4_GCC\system.xmp
#
# WARNING : This file will be re-generated every time a command
# to run a make target is invoked. So, any changes made to this
# file manually, will be lost when make is invoked next.
#################################################################
XILINX_EDK_DIR = /cygdrive/c/devtools/Xilinx/10.1/EDK
NON_CYG_XILINX_EDK_DIR = C:/devtools/Xilinx/10.1/EDK
SYSTEM = system
MHSFILE = system.mhs
MSSFILE = system.mss
FPGA_ARCH = virtex4
DEVICE = xc4vfx12ff668-10
LANGUAGE = vhdl
SEARCHPATHOPT =
SUBMODULE_OPT =
PLATGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(SUBMODULE_OPT)
LIBGEN_OPTIONS = -mhs $(MHSFILE) -p $(DEVICE) $(SEARCHPATHOPT)
VPGEN_OPTIONS = -p $(DEVICE) $(SEARCHPATHOPT)
MANAGE_FASTRT_OPTIONS = -reduce_fanout no
OBSERVE_PAR_OPTIONS = -error yes
RTOSDEMO_OUTPUT_DIR = RTOSDemo
RTOSDEMO_OUTPUT = $(RTOSDEMO_OUTPUT_DIR)/executable.elf
MICROBLAZE_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop.elf
PPC405_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc405/ppc_bootloop.elf
PPC440_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc440/ppc440_bootloop.elf
BOOTLOOP_DIR = bootloops
PPC405_0_BOOTLOOP = $(BOOTLOOP_DIR)/ppc405_0.elf
BRAMINIT_ELF_FILES =
BRAMINIT_ELF_FILE_ARGS =
ALL_USER_ELF_FILES = $(RTOSDEMO_OUTPUT)
SIM_CMD = vsim
BEHAVIORAL_SIM_SCRIPT = simulation/behavioral/$(SYSTEM)_setup.do
STRUCTURAL_SIM_SCRIPT = simulation/structural/$(SYSTEM)_setup.do
TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.do
DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)
MIX_LANG_SIM_OPT = -mixed yes
SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) $(MIX_LANG_SIM_OPT) -s mti -X C:/E/temp/rc/3/V5.0.2/FreeRTOS/Demo/PPC405_Xilinx_Virtex4_GCC/ -E C:/E/temp/rc/3/V5.0.2/FreeRTOS/Demo/PPC405_Xilinx_Virtex4_GCC/
LIBRARIES = \
ppc405_0/lib/libxil.a
VPEXEC = virtualplatform/vpexec.exe
LIBSCLEAN_TARGETS = ppc405_0_libsclean
PROGRAMCLEAN_TARGETS = RTOSDemo_programclean
CORE_STATE_DEVELOPMENT_FILES =
WRAPPER_NGC_FILES = implementation/ppc405_0_wrapper.ngc \
implementation/jtagppc_0_wrapper.ngc \
implementation/plb_wrapper.ngc \
implementation/rs232_uart_wrapper.ngc \
implementation/leds_4bit_wrapper.ngc \
implementation/leds_positions_wrapper.ngc \
implementation/sysace_compactflash_wrapper.ngc \
implementation/sram_wrapper.ngc \
implementation/sram_util_bus_split_0_wrapper.ngc \
implementation/clock_generator_0_wrapper.ngc \
implementation/proc_sys_reset_0_wrapper.ngc \
implementation/xps_intc_0_wrapper.ngc
POSTSYN_NETLIST = implementation/$(SYSTEM).ngc
SYSTEM_BIT = implementation/$(SYSTEM).bit
DOWNLOAD_BIT = implementation/download.bit
SYSTEM_ACE = implementation/$(SYSTEM).ace
UCF_FILE = data/system.ucf
BMM_FILE = implementation/$(SYSTEM).bmm
BITGEN_UT_FILE = etc/bitgen.ut
XFLOW_OPT_FILE = etc/fast_runtime.opt
XFLOW_DEPENDENCY = __xps/xpsxflow.opt $(XFLOW_OPT_FILE)
XPLORER_DEPENDENCY = __xps/xplorer.opt
XPLORER_OPTIONS = -p $(DEVICE) -uc $(SYSTEM).ucf -bm $(SYSTEM).bmm -max_runs 7
FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(BITGEN_UT_FILE) $(XFLOW_DEPENDENCY)
#################################################################
# SOFTWARE APPLICATION RTOSDEMO
#################################################################
RTOSDEMO_SOURCES = RTOSDemo/../../Common/Minimal/BlockQ.c RTOSDemo/../../Common/Minimal/blocktim.c RTOSDemo/../../Common/Minimal/comtest.c RTOSDemo/../../Common/Minimal/countsem.c RTOSDemo/../../Common/Minimal/death.c RTOSDemo/../../Common/Minimal/dynamic.c RTOSDemo/../../Common/Minimal/flash.c RTOSDemo/../../Common/Minimal/GenQTest.c RTOSDemo/../../Common/Minimal/integer.c RTOSDemo/../../Common/Minimal/QPeek.c RTOSDemo/../../Common/Minimal/recmutex.c RTOSDemo/../../Common/Minimal/semtest.c RTOSDemo/../../../Source/tasks.c RTOSDemo/../../../Source/list.c RTOSDemo/../../../Source/queue.c RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/port.c RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/partest.c RTOSDemo/../../../Source/portable/GCC/PPC405_Xilinx/portasm.S RTOSDemo/../../../Source/portable/MemMang/heap_2.c RTOSDemo/flop/flop.c RTOSDemo/flop/flop-reg-test.c
RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h
RTOSDEMO_CC = powerpc-eabi-gcc
RTOSDEMO_CC_SIZE = powerpc-eabi-size
RTOSDEMO_CC_OPT = -O0
RTOSDEMO_CFLAGS = -I./RTOSDemo/flop -I../../Source/portable/GCC/PPC405_Xilinx -I./ppc405_0/include/ -IRTOSDemo/ -I. -I./RTOSDemo/ -I../Common/include/ -I../../Source/include/ -I./ppc405_0/include/ -I./ppc405_0/include -D GCC_PPC405 -mregnames
RTOSDEMO_CC_SEARCH = # -B
RTOSDEMO_LIBPATH = -L./ppc405_0/lib/ # -L
RTOSDEMO_INCLUDES = -I./ppc405_0/include/ -IRTOSDemo/ # -I
RTOSDEMO_LFLAGS = # -l
RTOSDEMO_LINKER_SCRIPT = RTOSDemo/RTOSDemo_linker_script.ld
RTOSDEMO_LINKER_SCRIPT_FLAG = -Wl,-T -Wl,$(RTOSDEMO_LINKER_SCRIPT)
RTOSDEMO_CC_DEBUG_FLAG = -g
RTOSDEMO_CC_PROFILE_FLAG = # -pg
RTOSDEMO_CC_GLOBPTR_FLAG= # -msdata=eabi
RTOSDEMO_CC_INFERRED_FLAGS=
RTOSDEMO_CC_START_ADDR_FLAG= # # -Wl,-defsym -Wl,_START_ADDR=
RTOSDEMO_CC_STACK_SIZE_FLAG= # # -Wl,-defsym -Wl,_STACK_SIZE=
RTOSDEMO_CC_HEAP_SIZE_FLAG= # # -Wl,-defsym -Wl,_HEAP_SIZE=
RTOSDEMO_OTHER_CC_FLAGS= $(RTOSDEMO_CC_GLOBPTR_FLAG) \
$(RTOSDEMO_CC_START_ADDR_FLAG) $(RTOSDEMO_CC_STACK_SIZE_FLAG) $(RTOSDEMO_CC_HEAP_SIZE_FLAG) \
$(RTOSDEMO_CC_INFERRED_FLAGS) \
$(RTOSDEMO_LINKER_SCRIPT_FLAG) $(RTOSDEMO_CC_DEBUG_FLAG) $(RTOSDEMO_CC_PROFILE_FLAG)

3
Demo/PPC405_Xilinx_Virtex4_GCC/wizlog
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WARNING:MDT - ppc405_virtex4 (ppc405_0) -
C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\PPC405_FPU_Xilinx_Virtex4_GCC\dump.mhs
line 28 - ADDRESS specified by PARAMETER C_IDCR_BASEADDR is ignored
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