Fix: Demo/RX200_RX231-RSK_GCC_e2studio_IAR RTOS demo project IAR build error (#239)

Co-authored-by: Ming Yue <mingyue86010@gmail.com>
pull/282/head^2
NoMaY (a user of Japan.RenesasRulz.com) 4 years ago committed by GitHub
parent fb7881cfeb
commit 4ca66b336a
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GPG Key ID: 4AEE18F83AFDEB23

@ -627,7 +627,7 @@
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>0</state>
<state>1</state>
</option>
</data>
</settings>
@ -734,11 +734,11 @@
</option>
<option>
<name>IlinkIcfOverride</name>
<state>1</state>
<state>0</state>
</option>
<option>
<name>IlinkIcfFile</name>
<state>$PROJ_DIR$\src\IAR_Support\lnkr5f52318.icf</state>
<state></state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
@ -2033,18 +2033,6 @@
<name>$PROJ_DIR$\src\Full_Demo\RegTest_IAR.s</name>
</file>
</group>
<group>
<name>System</name>
<file>
<name>$PROJ_DIR$\src\IAR_Support\defaults.s</name>
</file>
<file>
<name>$PROJ_DIR$\src\IAR_Support\exceptvect_rxv2.s</name>
</file>
<file>
<name>$PROJ_DIR$\src\IAR_Support\option_rom_rxv2.s</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\src\main.c</name>
</file>

@ -1,116 +0,0 @@
/*---------------------------------------------------------------------------*/
/* - defaults.s - */
/* */
/* This module contains default values for the following symbols */
/* */
/* For RxV1 core: */
/* __MDES @ 0xFFFFFF80 to 0xFFFFFF83 */
/* __OFS1 @ 0xFFFFFF88 to 0xFFFFFF8B */
/* __OFS0 @ 0xFFFFFF8C to 0xFFFFFF8F */
/* __ROM_CODE @ 0xFFFFFF9C */
/* __ID_BYTES_1_4 @ 0xFFFFFFA0 to 0xFFFFFFA3 */
/* __ID_BYTES_5_8 @ 0xFFFFFFA4 to 0xFFFFFFA7 */
/* __ID_BYTES_9_12 @ 0xFFFFFFA8 to 0xFFFFFFAB */
/* __ID_BYTES_13_16 @ 0xFFFFFFAC to 0xFFFFFFAF */
/* */
/* For RxV1 core: */
/* __MDES @ 0xFFFFFF80 to 0xFFFFFF83 */
/* __OFS1 @ 0xFFFFFF88 to 0xFFFFFF8B */
/* __OFS0 @ 0xFFFFFF8C to 0xFFFFFF8F */
/* __ROM_CODE @ 0xFFFFFF9C to 0xFFFFFF9F */
/* __OSIS_1 @ 0xFFFFFFA0 to 0xFFFFFFA3 */
/* __OSIS_2 @ 0xFFFFFFA4 to 0xFFFFFFA7 */
/* __OSIS_3 @ 0xFFFFFFA8 to 0xFFFFFFAB */
/* __OSIS_4 @ 0xFFFFFFAC to 0xFFFFFFAF */
/* */
/* For RxV2 core (RX64M): */
/* __SPCC @ 0x00120040 to 0x00120043 */
/* __TMEF @ 0x00120048 to 0x0012004B */
/* __OSIS_1 @ 0x00120050 to 0x00120053 */
/* __OSIS_2 @ 0x00120054 to 0x00120057 */
/* __OSIS_3 @ 0x00120058 to 0x0012005D */
/* __OSIS_4 @ 0x0012005C to 0x0012005F */
/* __TMINF @ 0x00120060 to 0x00120063 */
/* __MDE @ 0x00120064 to 0x00120067 */
/* __OFS0 @ 0x00120068 to 0x0012006B */
/* __OFS1 @ 0x0012006C to 0x0012006F */
/* */
/* To override default values in library add this file to your */
/* project and change the values. */
/* */
/* Copyright 2014 IAR Systems AB. */
/* */
/* $Revision: 6046 $ */
/* */
/*---------------------------------------------------------------------------*/
MODULE DEFAULTS
SECTION .text:CONST:NOROOT
#if __CORE__ == __CORE_V1__
PUBWEAK __MDES
PUBWEAK __OFS1
PUBWEAK __OFS0
PUBWEAK __ROM_CODE
PUBWEAK __ID_BYTES_1_4
PUBWEAK __ID_BYTES_5_8
PUBWEAK __ID_BYTES_9_12
PUBWEAK __ID_BYTES_13_16
#if __LITTLE_ENDIAN__
__MDES equ 0xffffffff
#else
__MDES equ 0xfffffff8
#endif
__OFS0 equ 0xffffffff
__OFS1 equ 0xffffffff
__ROM_CODE equ 0xffffffff
__ID_BYTES_1_4 equ 0xffffffff
__ID_BYTES_5_8 equ 0xffffffff
__ID_BYTES_9_12 equ 0xffffffff
__ID_BYTES_13_16 equ 0xffffffff
#else /* __CORE__ == __CORE_V2__ */
PUBWEAK __ROM_CODE
PUBWEAK __MDE
PUBWEAK __OFS1
PUBWEAK __OFS0
PUBWEAK __OSIS_1
PUBWEAK __OSIS_2
PUBWEAK __OSIS_3
PUBWEAK __OSIS_4
PUBWEAK __SPCC
PUBWEAK __TMEF
PUBWEAK __TMINF
__ROM_CODE equ 0xffffffff
// 0x00120040 SPCC register
__SPCC equ 0xffffffff
// 0x00120048 TMEF register
__TMEF equ 0xffffffff
// 0x00120050 OSIC register (ID codes)
__OSIS_1 equ 0xffffffff
__OSIS_2 equ 0xffffffff
__OSIS_3 equ 0xffffffff
__OSIS_4 equ 0xffffffff
// 0x00120060 TMINF register
__TMINF equ 0xffffffff
// 0x00120064 MDE register (Single Chip Mode)
#if __LITTLE_ENDIAN__
__MDE equ 0xffffffff // little
#else
__MDE equ 0xfffffff8 // big
#endif
// 0x00120068 OFS0 register
__OFS0 equ 0xffffffff
// 0x0012006c OFS1 register
__OFS1 equ 0xffffffff
#endif
END

@ -1,56 +0,0 @@
;-----------------------------------------------------------------------------
; Exception vector table. We install all fixed interrupts in
; a section called EXCEPTVECT. All fixed interrupts have a
; hard coded name that is default handled in this file.
; See fixedint.c for information how to replace them with handlers written in C.
;
; $Revision: 6884 $
;
// This segment part is marked as ROOT, since it must
// be preserved by the linker.
MODULE EXCEPTVECT
SECTION .exceptvect:CONST:ROOT
#if __CORE__ == __CORE_V2__
EXTERN ___excep_access_inst
EXTERN ___privileged_handler
EXTERN ___undefined_handler
EXTERN ___undefined_interrupt_source_handler
EXTERN ___NMI_handler
EXTERN __float_placeholder
EXTERN __MDE
EXTERN __OFS1
EXTERN __OFS0
EXTERN __ROM_CODE
EXTERN __OSIS_1
EXTERN __OSIS_2
EXTERN __OSIS_3
EXTERN __OSIS_4
PUBLIC __exceptvect
DATA
__exceptvect:
DC32 __MDE // 0xFFFFFF80 MDE register (Single Chip Mode)
DS32 1
DC32 __OFS1 // 0xFFFFFF88 OFS1 register
DC32 __OFS0 // 0xFFFFFF8C OFS0 register
DS32 3
DC32 __ROM_CODE // 0xFFFFFF8C ROM code protection
DC32 __OSIS_1 // 0xFFFFFFA0 OSIC register (ID codes)
DC32 __OSIS_2 // 0xFFFFFFA4 OSIC register (ID codes)
DC32 __OSIS_3 // 0xFFFFFFA8 OSIC register (ID codes)
DC32 __OSIS_4 // 0xFFFFFFAC OSIC register (ID codes)
DS32 8
DC32 ___privileged_handler // Exception(Supervisor Instruction)
DC32 ___excep_access_inst // Exception(Access Instruction)
DC32 ___undefined_interrupt_source_handler
DC32 ___undefined_handler // Exception(Undefined Instruction)
DC32 ___undefined_interrupt_source_handler
DC32 __float_placeholder // Exception(Floating Point)
DC32 ___undefined_interrupt_source_handler
DC32 ___undefined_interrupt_source_handler
DC32 ___undefined_interrupt_source_handler
DC32 ___undefined_interrupt_source_handler
DC32 ___NMI_handler // NMI
#endif
END

@ -1,47 +0,0 @@
//-----------------------------------------------------------------------------
// ILINK command file template for the Renesas RX microcontroller R5F52318
//-----------------------------------------------------------------------------
define memory mem with size = 4G;
define region ROM_region16 = mem:[from 0xFFFF8000 to 0xFFFFFFFF];
define region RAM_region16 = mem:[from 0x00000004 to 0x00007FFF];
define region ROM_region24 = mem:[from 0xFFF80000 to 0xFFFFFFFF];
define region RAM_region24 = mem:[from 0x00000004 to 0x0000FFFF];
define region ROM_region32 = mem:[from 0xFFF80000 to 0xFFFFFFFF];
define region RAM_region32 = mem:[from 0x00000004 to 0x0000FFFF];
define region DATA_FLASH_region = mem:[from 0x00100000 to 0x00101FFF];
initialize by copy { rw, ro section D, ro section D_1, ro section D_2 };
initialize by copy with packing = none { section __DLIB_PERTHREAD };
do not initialize { section .*.noinit };
define block HEAP with alignment = 4, size = _HEAP_SIZE { };
define block USTACK with alignment = 4, size = _USTACK_SIZE { };
define block ISTACK with alignment = 4, size = _ISTACK_SIZE { };
define block STACKS with fixed order { block ISTACK,
block USTACK };
place at address mem:0x00120040 { ro section .option_rom };
place at address mem:0xFFFFFF80 { ro section .exceptvect };
place at address mem:0xFFFFFFFC { ro section .resetvect };
"ROM16":place in ROM_region16 { ro section .code16*,
ro section .data16* };
"RAM16":place in RAM_region16 { rw section .data16*,
rw section __DLIB_PERTHREAD };
"ROM24":place in ROM_region24 { ro section .code24*,
ro section .data24* };
"RAM24":place in RAM_region24 { rw section .data24* };
"ROM32":place in ROM_region32 { ro };
"RAM32":place in RAM_region32 { rw,
ro section D,
ro section D_1,
ro section D_2,
block HEAP,
block STACKS };
"DATAFLASH":place in DATA_FLASH_region
{ ro section .dataflash* };

@ -1,40 +0,0 @@
// This segment part is marked as ROOT, since it must
// be preserved by the linker.
MODULE OPTION_ROM
SECTION .option_rom:CONST:ROOT
#if __CORE__ == __CORE_V2__
EXTERN __MDE
EXTERN __OFS1
EXTERN __OFS0
EXTERN __SPCC
EXTERN __TMEF
EXTERN __TMINF
EXTERN __OSIS_1
EXTERN __OSIS_2
EXTERN __OSIS_3
EXTERN __OSIS_4
PUBLIC __option_rom
// Special configuration registers for 64M
DATA
__option_rom:
#if 0
DC32 __SPCC // 0x00120040 SPCC register
DS32 1 // 0x00120044 reserved
DC32 __TMEF // 0x00120048 TMEF register
DS32 1 // 0x0012004C reserved
; DC32 __OSIS_1 // 0x00120050 OSIC register (ID codes)
; DC32 __OSIS_2 // 0x00120054 OSIC register (ID codes)
; DC32 __OSIS_3 // 0x00120058 OSIC register (ID codes)
; DC32 __OSIS_4 // 0x0012005C OSIC register (ID codes)
DC32 __TMINF // 0x00120060 TMINF register
; DC32 __MDE // 0x00120064 MDE register (Single Chip Mode)
; DC32 __OFS0 // 0x00120068 OFS0 register
; DC32 __OFS1 // 0x0012006C OFS1 register
#endif
#endif
END

@ -38,6 +38,7 @@ Includes
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
/* Start user code for include. Do not edit comment generated here */
#include "rskrx231def.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
@ -45,6 +46,9 @@ Includes
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
#if defined(RSK_RX231)
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
@ -137,4 +141,59 @@ void R_CGC_Create(void)
}
/* Start user code for adding. Do not edit comment generated here */
#elif defined(TB_RX231)
void R_CGC_Create(void)
{
uint32_t sckcr_dummy;
volatile uint32_t memorywaitcycle;
/* Set system clock */
sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00000000_CGC_PCLKA_DIV_1 |
_00010000_CGC_BCLK_DIV_2 | _00000000_CGC_ICLK_DIV_1 | _10000000_CGC_FCLK_DIV_2;
SYSTEM.SCKCR.LONG = sckcr_dummy;
while (SYSTEM.SCKCR.LONG != sckcr_dummy);
/* Disable sub-clock */
SYSTEM.SOSCCR.BIT.SOSTP = 1U;
/* Wait for the register modification to complete */
while (1U != SYSTEM.SOSCCR.BIT.SOSTP);
/* Disable sub-clock */
RTC.RCR3.BIT.RTCEN = 0U;
/* Wait for the register modification to complete */
while (0U != RTC.RCR3.BIT.RTCEN);
/* Set HOCO */
SYSTEM.HOCOCR.BIT.HCSTP = 1U;
SYSTEM.HOCOCR2.BYTE = _03_CGC_HOCO_CLK_54;
SYSTEM.HOCOCR.BIT.HCSTP = 0U;
/* Wait for HOCO wait counter overflow */
while (1U != SYSTEM.OSCOVFSR.BIT.HCOVF);
/* Set BCLK */
SYSTEM.SCKCR.BIT.PSTOP1 = 1U;
/* Set memory wait cycle setting register */
SYSTEM.MEMWAIT.BIT.MEMWAIT = 1U;
memorywaitcycle = SYSTEM.MEMWAIT.BYTE;
memorywaitcycle++;
/* Set clock source */
SYSTEM.SCKCR3.WORD = _0100_CGC_CLOCKSOURCE_HOCO;
while (SYSTEM.SCKCR3.WORD != _0100_CGC_CLOCKSOURCE_HOCO);
/* Set LOCO */
SYSTEM.LOCOCR.BIT.LCSTP = 1U;
}
#endif
/* End user code. Do not edit comment generated here */

@ -38,6 +38,7 @@ Includes
#include "r_cg_macrodriver.h"
#include "r_cg_port.h"
/* Start user code for include. Do not edit comment generated here */
#include "rskrx231def.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
@ -45,6 +46,9 @@ Includes
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
#if defined(RSK_RX231)
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
@ -66,4 +70,15 @@ void R_PORT_Create(void)
}
/* Start user code for adding. Do not edit comment generated here */
#elif defined(TB_RX231)
void R_PORT_Create(void)
{
PORTD.PODR.BYTE = _40_Pm6_OUTPUT_1 | _80_Pm7_OUTPUT_1;
PORTD.PDR.BYTE = _40_Pm6_MODE_OUTPUT | _80_Pm7_MODE_OUTPUT;
}
#endif
/* End user code. Do not edit comment generated here */

@ -35,6 +35,9 @@ Macro definitions
#ifndef RSKRX231_H
#define RSKRX231_H
#if !defined(RSK_RX231) && !defined(TB_RX231)
#define RSK_RX231
#endif
/* General Values */
#define LED_ON (0)
@ -45,15 +48,24 @@ Macro definitions
#define SET_BYTE_LOW (0x00)
/* Switches */
#if defined(RSK_RX231)
#define SW1 (PORT3.PIDR.BIT.B1)
#define SW2 (PORT3.PIDR.BIT.B4)
#define SW3 (PORT0.PIDR.BIT.B7)
#elif defined(TB_RX231)
#define SW1 (PORTB.PIDR.BIT.B1)
#endif
/* LED port settings */
#if defined(RSK_RX231)
#define LED0 (PORT1.PODR.BIT.B7)
#define LED1 (PORT5.PODR.BIT.B0)
#define LED2 (PORT5.PODR.BIT.B1)
#define LED3 (PORT5.PODR.BIT.B2)
#elif defined(TB_RX231)
#define LED0 (PORTD.PODR.BIT.B6)
#define LED1 (PORTD.PODR.BIT.B7)
#endif
/***********************************************************************************************************************
Typedef definitions

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