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Update SiFive FreedomStudio project (#785)

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SiFive FreedomStudio project changes needed for refactored code

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
pull/794/head
Gaurav-Aggarwal-AWS 3 years ago committed by GitHub
parent 673d3d7eea
commit 4255ac5c28
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 144 additions and 7 deletions
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2
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject
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@ -57,7 +57,7 @@
<tool id="cdt.managedbuild.tool.gnu.cross.cpp.linker.2105463183" name="Cross G++ Linker" superClass="cdt.managedbuild.tool.gnu.cross.cpp.linker"/>
<tool id="cdt.managedbuild.tool.gnu.cross.archiver.424513814" name="Cross GCC Archiver" superClass="cdt.managedbuild.tool.gnu.cross.archiver"/>
<tool command="riscv64-unknown-elf-gcc" id="cdt.managedbuild.tool.gnu.cross.assembler.825438707" name="Cross GCC Assembler" superClass="cdt.managedbuild.tool.gnu.cross.assembler">
<option id="gnu.both.asm.option.flags.1946908814" name="Assembler flags" superClass="gnu.both.asm.option.flags" useByScannerDiscovery="false" value="-march=rv32imac -mabi=ilp32 -mcmodel=medlow -c -DportasmHANDLE_INTERRUPT=handle_trap -g3" valueType="string"/>
<option id="gnu.both.asm.option.flags.1946908814" name="Assembler flags" superClass="gnu.both.asm.option.flags" useByScannerDiscovery="false" value="-march=rv32imac -mabi=ilp32 -mcmodel=medlow -c -g3" valueType="string"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.1448234506" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" useByScannerDiscovery="false" valueType="includePath">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions}&quot;"/>
</option>

2
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml
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@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="644150116465149599" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1654240179677726431" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

6
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h
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@ -20,7 +20,7 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://aws.amazon.com/freertos
* https://github.com/FreeRTOS
*
*/
@ -47,8 +47,8 @@
#define configCPU_CLOCK_HZ ( 32768 )
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 120 ) /* Only needs to be this high as some demo tasks also use this constant. In production only the idle task would use this. */
#define configTOTAL_HEAP_SIZE ( ( size_t ) 10900 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 10 * 1024 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0

43
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/main.c
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@ -20,7 +20,7 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://aws.amazon.com/freertos
* https://github.com/FreeRTOS
*
*/
@ -59,6 +59,17 @@
or 0 to run the more comprehensive test and demo application. */
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
/* Set to 1 to use direct mode and set to 0 to use vectored mode.
VECTOR MODE=Direct --> all traps into machine mode cause the pc to be set to the
vector base address (BASE) in the mtvec register.
VECTOR MODE=Vectored --> all synchronous exceptions into machine mode cause the
pc to be set to the BASE, whereas interrupts cause the pc to be set to the
address BASE plus four times the interrupt cause number.
*/
#define mainVECTOR_MODE_DIRECT 0
/* Index to first HART (there is only one). */
#define mainHART_0 0
@ -70,6 +81,9 @@ or 0 to run the more comprehensive test and demo application. */
/*-----------------------------------------------------------*/
extern void freertos_risc_v_trap_handler( void );
extern void freertos_vector_table( void );
/*
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
@ -118,7 +132,6 @@ int main( void )
#endif
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
struct metal_cpu *pxCPU;
@ -137,6 +150,16 @@ struct metal_interrupt *pxInterruptController;
configASSERT( pxInterruptController );
metal_interrupt_init( pxInterruptController );
#if( mainVECTOR_MODE_DIRECT == 1 )
{
__asm__ volatile( "csrw mtvec, %0" :: "r"( freertos_risc_v_trap_handler ) );
}
#else
{
__asm__ volatile( "csrw mtvec, %0" :: "r"( ( uintptr_t )freertos_vector_table | 0x1 ) );
}
#endif
/* Set all interrupt enable bits to 0. */
mainPLIC_ENABLE_0 = 0UL;
mainPLIC_ENABLE_1 = 0UL;
@ -248,6 +271,22 @@ volatile uint32_t ulMEPC = 0UL, ulMCAUSE = 0UL, ulPLICPending0Register = 0UL, ul
}
/*-----------------------------------------------------------*/
void freertos_risc_v_application_interrupt_handler( uint32_t ulMcause )
{
( void )ulMcause;
handle_trap();
}
/*-----------------------------------------------------------*/
void freertos_risc_v_application_exception_handler( uint32_t ulMcause )
{
( void )ulMcause;
handle_trap();
}
/*-----------------------------------------------------------*/
void vToggleLED( void )
{
metal_led_toggle( pxBlueLED );

98
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/vector_table.S
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@ -0,0 +1,98 @@
/*
* FreeRTOS V202112.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
.extern freertos_risc_v_exception_handler
.extern freertos_risc_v_interrupt_handler
.extern freertos_risc_v_mtimer_interrupt_handler
.balign 128, 0
.option norvc
.global freertos_vector_table
freertos_vector_table:
IRQ_0:
j freertos_risc_v_exception_handler
IRQ_1:
j freertos_risc_v_interrupt_handler
IRQ_2:
j freertos_risc_v_interrupt_handler
IRQ_3:
j freertos_risc_v_interrupt_handler
IRQ_4:
j freertos_risc_v_interrupt_handler
IRQ_5:
j freertos_risc_v_interrupt_handler
IRQ_6:
j freertos_risc_v_interrupt_handler
IRQ_7:
j freertos_risc_v_mtimer_interrupt_handler
IRQ_8:
j freertos_risc_v_interrupt_handler
IRQ_9:
j freertos_risc_v_interrupt_handler
IRQ_10:
j freertos_risc_v_interrupt_handler
IRQ_11:
j freertos_risc_v_interrupt_handler
IRQ_12:
j freertos_risc_v_interrupt_handler
IRQ_13:
j freertos_risc_v_interrupt_handler
IRQ_14:
j freertos_risc_v_interrupt_handler
IRQ_15:
j freertos_risc_v_interrupt_handler
IRQ_LC0:
j freertos_risc_v_interrupt_handler
IRQ_LC1:
j freertos_risc_v_interrupt_handler
IRQ_LC2:
j freertos_risc_v_interrupt_handler
IRQ_LC3:
j freertos_risc_v_interrupt_handler
IRQ_LC4:
j freertos_risc_v_interrupt_handler
IRQ_LC5:
j freertos_risc_v_interrupt_handler
IRQ_LC6:
j freertos_risc_v_interrupt_handler
IRQ_LC7:
j freertos_risc_v_interrupt_handler
IRQ_LC8:
j freertos_risc_v_interrupt_handler
IRQ_LC9:
j freertos_risc_v_interrupt_handler
IRQ_LC10:
j freertos_risc_v_interrupt_handler
IRQ_LC11:
j freertos_risc_v_interrupt_handler
IRQ_LC12:
j freertos_risc_v_interrupt_handler
IRQ_LC13:
j freertos_risc_v_interrupt_handler
IRQ_LC14:
j freertos_risc_v_interrupt_handler
IRQ_LC15:
j freertos_risc_v_interrupt_handler
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