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Richard Barry 6844bef74f Replace the pdf RISC-V documentation with links to the documentation web pages.		6 years ago
..
.settings	Fix bug in core_cm3.c atomic macros.	6 years ago
Microsemi_Code	Re-org of RISC-V file structure and naming step 2.	6 years ago
blinky_demo	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	6 years ago
full_demo	Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().	6 years ago
.cproject	Fix bug in core_cm3.c atomic macros.	6 years ago
.project	Fix bug in core_cm3.c atomic macros.	6 years ago
Demo Documentation.url	Replace the pdf RISC-V documentation with links to the documentation web pages.	6 years ago
FreeRTOSConfig.h	Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.	6 years ago
RTOSDemo Debug Renode.launch	Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.	6 years ago
RTOSDemo-start-renode-emulator-and-attach.launch	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	6 years ago
hw_platform.h	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	6 years ago
main.c	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	6 years ago
microsemi-riscv-renode.ld	Retarget Softconsole RISC-V demo from IGLOO2 to Renode as it can have more RAM and therefore have more test tasks running.	6 years ago