Richard Barry
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ba686260ca
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Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
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12 years ago |
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Richard Barry
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f5c52bdb1d
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Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
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12 years ago |
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Richard Barry
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f06a945444
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Prepare for V7.3.0 release.
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12 years ago |
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Richard Barry
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e03ab659f3
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Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
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12 years ago |
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Richard Barry
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87f663a461
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Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ).
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13 years ago |
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Richard Barry
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92f1699055
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Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
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13 years ago |
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Richard Barry
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0c7af1c2d3
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Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
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13 years ago |
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Richard Barry
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e0bab5981a
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Prepare for V7.2.0 release.
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13 years ago |
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Richard Barry
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f508a5f653
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Add FreeRTOS-Plus directory.
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13 years ago |