Commit Graph

52 Commits (cfb82232329e85108c3486169b83f03f9822a7fd)

Author SHA1 Message Date
Richard Barry 693d0520bc Update version number ready for V8.2.1 release. 10 years ago
Richard Barry 501a531d46 Update version number in preparation for official V8.2.0 release. 10 years ago
Richard Barry 6741592026 Update version numbers in preparation for V8.2.0 release candidate 1. 10 years ago
Richard Barry f407b70dcc + Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
+ Fix a few compiler warnings.
+ Add TickType_t specific critical sections so critical sections are not used when accessing the tick count in cases where the access is atomic (32-bit tick count, 32-bit architecture).
10 years ago
Richard Barry 85fb1cc024 + New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros.
+ Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h.
+ Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked.
+ Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos.
+ Update trace recorder code, and some demos to use the new version (more to do).
+ Introduce uxTaskPriorityGetFromISR().
+ Minor typo corrections.
+ Update MingW simulator demo to match the MSVC simulator demo.
10 years ago
Richard Barry d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 11 years ago
Richard Barry a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 11 years ago
Richard Barry d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
11 years ago
Richard Barry 113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 11 years ago
Richard Barry 0bb794301a Update version number ready for release. 11 years ago
Richard Barry e101e7e437 Update version number to V8.0.0 (without the release candidate number). 11 years ago
Richard Barry 1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 11 years ago
Richard Barry a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
11 years ago
Richard Barry a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 11 years ago
Richard Barry 2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
11 years ago
Richard Barry e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 11 years ago
Richard Barry 3e20aa7d60 Replace standard types with stdint.h types.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
11 years ago
Richard Barry 4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 11 years ago
Richard Barry 0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
11 years ago
Richard Barry 00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 11 years ago
Richard Barry 0cd79ad81d Change version numbers in preparation for V7.6.0 release. 11 years ago
Richard Barry b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 11 years ago
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
12 years ago
Richard Barry 3cbe0a724d Update version number. 12 years ago
Richard Barry 679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 12 years ago
Richard Barry 7d6758ee1a Minor updates and change version number for V7.5.0 release. 12 years ago
Richard Barry 65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
Richard Barry c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 12 years ago
Richard Barry 0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 12 years ago
Richard Barry 686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
Move DSB instructions to before WFI instructions in line with ARM recommendations.
12 years ago
Richard Barry a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler.
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
12 years ago
Richard Barry 96ceae8edd Update version number ready to release the FAT file system demo. 12 years ago
Richard Barry f9918345e1 Update version numbers to V7.4.1. 12 years ago
Richard Barry 0527099b51 Add barrier instructions to the GCC CM3 ports. 12 years ago
Richard Barry 6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 12 years ago
Richard Barry a5d0e3f0c1 Prepare for V7.4.0 release. 12 years ago
Richard Barry 902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions.
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
12 years ago
Richard Barry ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default.
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
12 years ago
Richard Barry ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 12 years ago
Richard Barry f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 12 years ago
Richard Barry f06a945444 Prepare for V7.3.0 release. 12 years ago
Richard Barry e03ab659f3 Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
12 years ago
Richard Barry c403e974ee Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION.
Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
13 years ago
Richard Barry 87f663a461 Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ). 13 years ago
Richard Barry 92f1699055 Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
13 years ago
Richard Barry 0c7af1c2d3 Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR. 13 years ago
Richard Barry e0bab5981a Prepare for V7.2.0 release. 13 years ago