Commit Graph

315 Commits (ca22607d142000751590377dff7698cb6df85090)

Author SHA1 Message Date
Richard Barry ca22607d14 Core kernel code:
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.

Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.

SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
10 years ago
Richard Barry e3263bb9b3 Demo projects only:
+ Remove some #warnings messages from the Cycle 5 - which were left in the code as reminders of tests that were not yet completed but are now.
10 years ago
Richard Barry 9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
10 years ago
Richard Barry ee541a347d MSP430 Demo projects only:
Update project format to new IAR version.
10 years ago
Richard Barry e0d9a274e2 Demo project only:
Added comprehensive demo including FreeRTOS+CLI to the Cyclone V SoC project.
11 years ago
Richard Barry d269f2027a Demo project only: Cyclone V SoC now running from external RAM. 11 years ago
Richard Barry e2f2cfa816 Added project for Altera Cyclone V SoC, currently running from internal RAM. 11 years ago
Richard Barry 3b0854bf96 Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.

Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo.  It was already on in the RZ ARM demo.
11 years ago
Richard Barry b3c040fc27 SAM4L tickless implementation: Bug fix and update the demo project to exercise the fix. 11 years ago
Richard Barry 4f03f7d1bb Demo project only:
Add the new IntSem test/demo code into the MSVC demo project.
11 years ago
Richard Barry b6e4854f26 Demo tasks only, with the aim of improving test coverage:
+ Split out the code that uses a mutex from an interrupt from GenQTest.c and add to new common demo task IntSemTest.c.
11 years ago
Richard Barry d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 11 years ago
Richard Barry 33cc3a292b Demo code only:
Add the IntQ standard test to the SAM4S project.
11 years ago
Richard Barry a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 11 years ago
Richard Barry ff5d3512b3 Core kernel code:
- Re-introduce the ability to give a mutex from an ISR.

Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
11 years ago
Richard Barry 6507701fdf Lower the minimum stack size used by the ATSAMA5 demo. 11 years ago
Richard Barry 7d49c2190c Minor edits prior to tagging V8.1.0. 11 years ago
Richard Barry d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
11 years ago
Richard Barry 52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
11 years ago
Richard Barry 60538c7480 Common demo tasks:
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.

SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
11 years ago
Richard Barry e9b5deb34a Carry on working on SAMA5D3 demo:
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
11 years ago
Richard Barry 146b46df87 SAMA5D3 demo: Add CDC driver code and use CDC to create a simple command console. 11 years ago
Richard Barry 5fcd270398 Re-test Zynq demo now it is using the latest tools. 11 years ago
Richard Barry bd9d37924d Add back Zynq demo - this time using SDK V14.2. 11 years ago
Richard Barry 96ceb9f537 Remove Zynq demo project ready to recreate the project using the 14.2 version of Xilinx's SDK. 11 years ago
Richard Barry 5b96cf6eea Add 'full' demo to the SAMA5 Xplained demo - but so far without interrupt nesting tests or CLI. 11 years ago
Richard Barry 29336e35b5 SAMA5D3 Xplained demo blinky running. 11 years ago
Richard Barry 5b96c12e92 Start of SAMA5D3 XPlained demo. 11 years ago
Richard Barry 4fe2abc792 Update the MSVC simulator demo to demonstrate heap_5 allocator and pdTICKS_TO_MS macro being used. 11 years ago
Richard Barry 4ce4de750a Update timer demo in PIC32MZ demo to remove multiple extern definition created by adding in the macro that checks non ISR safe functions are not called from ISRs. 11 years ago
Richard Barry d45f18cc8d Add additional comments to the Zynq lwIP demo. 11 years ago
Richard Barry de7df3cfda Zynq demo: Fix Xilinx network driver by deferring the function that allocated memory from the interrupt into a task. Add DHCP option. 11 years ago
Richard Barry f1a0534a56 Remove some of the lwip asserts to allow use with 64-bit alignment. 11 years ago
Richard Barry 7fa64efeeb Switch to using the private watchdog as the run time stats timer in the Zynq demo. 11 years ago
Richard Barry 2f6cb8a86c Reorganise Zynq project after spitting lwIP example into a separate configuration. 11 years ago
Richard Barry e92795bcc8 Move the Zynq's lwIP example from the Full demo into its own configuration as having the lwIP tasks at a high priority made the self checking test tasks report failures, while having the lwIP tasks at a low priority slugged the throughput. 11 years ago
Richard Barry be8b0ed21d Update lwIP byte alignment to make Zynq pings more reliable. 11 years ago
Richard Barry 16ff69e873 Update RL78 GCC demo application after testing with fixed compiler. 11 years ago
Richard Barry 5cbab67186 Complete RX64M GCC demo. 11 years ago
Richard Barry 5cd0b1e5ef Add -nomessage command line option to RX64M demo to suppress warning about the yield function being defined when it is not called directly. 11 years ago
Richard Barry f46070dc79 Ensure demo app files are using FreeRTOS V8 names - a few were missed previously. 11 years ago
Richard Barry ef254df85f A few additional casts to keep the Renesas RX compiler happy. 11 years ago
Richard Barry 74ffdb0b89 Add lwIP driver into Zynq demo - not yet fully functional. 11 years ago
Richard Barry 09a89763ee Add brackets in lwIP assert statement to prevent compiler warnings. 11 years ago
Richard Barry b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 11 years ago
Richard Barry 0bb794301a Update version number ready for release. 11 years ago
Richard Barry fa7222ab4a Update demos that use FreeRTOS+FAT SL to have correct version numbers after the update of FreeRTOS+FAT SL itself. 11 years ago
Richard Barry 03c95b5950 Update IAR XMC4200 project to fix link error that resulted from updating the IAR version to 7.x. 11 years ago
Richard Barry 82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself.
Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task.
11 years ago
Richard Barry ef7f3c5320 Add the pcTimerGetTimerName() API function. 11 years ago