4b2f9dad42
Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock.
11 years ago
0d1e12522b
Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
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Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
11 years ago
00ad1a0200
Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review.
11 years ago
0cd79ad81d
Change version numbers in preparation for V7.6.0 release.
11 years ago
b181a3af99
Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
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Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
dcd261bb8b
Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.
11 years ago
a12ea2d212
Update FreeRTOS version number to V7.5.3
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Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
0c56f5018d
Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete.
11 years ago
aedf7824cb
Introduce the prvTaskExitError() function for all ARM_CMn ports.
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Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
eaacbb099a
Clear up a few compiler warnings.
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Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt. Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
73606369c4
Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
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Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
c40370e96a
Fix a few typos and remove the "register" keyword.
12 years ago
2f754d9b0c
Add additional critical section to the default tickless implementations.
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Update version number for maintenance release.
12 years ago
3cbe0a724d
Update version number.
12 years ago
679a3c670c
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
12 years ago
7d6758ee1a
Minor updates and change version number for V7.5.0 release.
12 years ago
7d1292ced2
Linting and MISRA checking
12 years ago
e5d9640863
Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined.
12 years ago
ad8fa53043
Kernel optimisations.
12 years ago
5d902f2b9c
Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports.
12 years ago
65704174c9
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
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Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
0f6b0d3a59
Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
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Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
12 years ago
c4eef61d39
Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports.
12 years ago
0c0b54c175
Refine the default tickless idle implementation in the Cortex-M3 port layers.
12 years ago
a7c47131fa
Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose.
12 years ago
04dafed839
IAR ARM Cortex-A port layer.
12 years ago
2fd431e971
Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
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Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
12 years ago
62c0ae0926
Update port layers to make better use of the xTaskIncrementTick() return value.
12 years ago
c04b074707
Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick().
12 years ago
f904d26957
Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
12 years ago
15ec6c87f7
Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
12 years ago
686d190798
Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
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Move DSB instructions to before WFI instructions in line with ARM recommendations.
12 years ago
a03b171992
Fix compiler warning in psp_test.c when compiled with ARM compiler.
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Add portYIELD_FROM_ISR() macros to Cortex-M ports. The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
12 years ago
fb9662009a
Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio.
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Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
12 years ago
96ceae8edd
Update version number ready to release the FAT file system demo.
12 years ago
f9918345e1
Update version numbers to V7.4.1.
12 years ago
0013028c7a
Update yield code in RX600/IAR compiler port.
12 years ago
74290b4425
Add RX100 IAR port layer.
12 years ago
895ee2bb3e
Add barrier instructions to IAR CM3 ports.
12 years ago
3762630f27
RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT().
12 years ago
caf1fbc899
Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers.
12 years ago
8c66fdbb8c
Updated IAR RL78 port layer.
12 years ago
17bba16fa6
Added YRDKRL78G14 build configuration to the IAR RL78 demo.
12 years ago
a5d0e3f0c1
Prepare for V7.4.0 release.
12 years ago
902f9e1a58
Update PIC32 demo application to remove reliance on PLIB functions.
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Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
12 years ago
ac78adae4b
Added INCLUDE_xSemaphoreGetMutexHolder() default.
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Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
12 years ago
96f93690ce
Add warning suppression to IAR header.
12 years ago
ba686260ca
Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
12 years ago
f5c52bdb1d
Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
12 years ago
f06a945444
Prepare for V7.3.0 release.
12 years ago
e03ab659f3
Add tickless idle support in Cortex-M ports.
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Change CCS R4 directory name.
12 years ago
87f663a461
Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ).
13 years ago
92f1699055
Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
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Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
13 years ago
0c7af1c2d3
Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
13 years ago
e0bab5981a
Prepare for V7.2.0 release.
13 years ago
73ad4387e2
Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace).
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Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting. Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
13 years ago
f508a5f653
Add FreeRTOS-Plus directory.
13 years ago
Richard Barry