Richard Barry
96ceae8edd
Update version number ready to release the FAT file system demo.
12 years ago
Richard Barry
f9918345e1
Update version numbers to V7.4.1.
12 years ago
Richard Barry
2b41be4cb9
Update yield code in RX200/Renesas compiler port.
12 years ago
Richard Barry
0013028c7a
Update yield code in RX600/IAR compiler port.
12 years ago
Richard Barry
4f5f527c73
Update yield code in RX600/Renesas compiler port.
12 years ago
Richard Barry
b7487b8dc2
Update yield code in RX600/GCC port.
12 years ago
Richard Barry
a69933782d
Add RX100 Renesas compiler port layer.
12 years ago
Richard Barry
74290b4425
Add RX100 IAR port layer.
12 years ago
Richard Barry
a0056e8fd3
Add RX100 GCC port layer.
12 years ago
Richard Barry
9a15f50b00
Add memory barrier instructions to Tasking CM4F port.
12 years ago
Richard Barry
7132e88685
Add memory barrier instructions to the RVDS CM3 ports.
12 years ago
Richard Barry
895ee2bb3e
Add barrier instructions to IAR CM3 ports.
12 years ago
Richard Barry
d135e45676
Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570).
12 years ago
Richard Barry
0527099b51
Add barrier instructions to the GCC CM3 ports.
12 years ago
Richard Barry
6d20e2b5cd
Add barrier instructions to GCC CM3/4 code.
12 years ago
Richard Barry
3762630f27
RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT().
12 years ago
Richard Barry
a9b8f0ca69
Minor mods common files to fix warnings generated by Renesas compiler.
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Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
12 years ago
Richard Barry
caf1fbc899
Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers.
12 years ago
Richard Barry
8c66fdbb8c
Updated IAR RL78 port layer.
12 years ago
Richard Barry
17bba16fa6
Added YRDKRL78G14 build configuration to the IAR RL78 demo.
12 years ago
Richard Barry
a5d0e3f0c1
Prepare for V7.4.0 release.
12 years ago
Richard Barry
902f9e1a58
Update PIC32 demo application to remove reliance on PLIB functions.
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Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
12 years ago
Richard Barry
a7eae6bed3
Added more files to the Rowley and IAR LM3S demos to test building the newer files and queue sets.
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Made queue function prototypes consistent so xQueueHandle parameters are always xQueue, and xQUEUE * parameters pxQueue.
Likewise make the task API using px for pointers to TCBs, and just x for task handles.
Heap_x functions now automatically align the start of the heap without using the portDOUBLE union member.
Queue.c now includes queue.h.
12 years ago
Richard Barry
b671bf368a
Improve QueueSet.c test coverage by reading the queue set from an ISR to force paths through the queue locking and unlocking.
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Add the FreeRTOS+Trace recorder into the Win32 MSVC demo.
Added more functions, including the queue set functions, to the MPU port.
12 years ago
Richard Barry
b5b518571e
remove the additional line added to the MPU port.c as the original code was correct. Instead remove the alignment assert by adding #define portALIGNMENT_ASSERT_pxCurrentTCB ( void )
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to the portmacor.h file.
12 years ago
Richard Barry
ac78adae4b
Added INCLUDE_xSemaphoreGetMutexHolder() default.
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Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
12 years ago
Richard Barry
4e7b460eaf
Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer.
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Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
12 years ago
Richard Barry
96f93690ce
Add warning suppression to IAR header.
12 years ago
Richard Barry
ba686260ca
Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
12 years ago
Richard Barry
9fe5156b53
Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS.
12 years ago
Richard Barry
f5c52bdb1d
Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
12 years ago
Richard Barry
f06a945444
Prepare for V7.3.0 release.
12 years ago
Richard Barry
f446f77fd4
Make the timer used for the PIC32 port layer user configurable.
12 years ago
Richard Barry
e03ab659f3
Add tickless idle support in Cortex-M ports.
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Change CCS R4 directory name.
12 years ago
Richard Barry
c403e974ee
Update PIC32 port to make use of configUSE_PORT_OPTIMISED_TASK_SELECTION.
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Make small modification in GCC CM3 port when configUSE_PORT_OPTIMISED_TASK_SELECTION is set to 1 to remove compiler warning.
13 years ago
Richard Barry
87f663a461
Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ).
13 years ago
Richard Barry
92f1699055
Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
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Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
13 years ago
Richard Barry
670d172cfc
Introduced configUSE_PORT_OPTIMISED_TASK_SELECTION, and updated the MSVC simulator port as the first implementation.
13 years ago
Richard Barry
8ef7f03536
Add eTaskStateGet() to FreeRTOS-MPU.
13 years ago
Richard Barry
0c7af1c2d3
Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
13 years ago
Richard Barry
e0bab5981a
Prepare for V7.2.0 release.
13 years ago
Richard Barry
73ad4387e2
Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace).
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Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting. Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
13 years ago
Richard Barry
f508a5f653
Add FreeRTOS-Plus directory.
13 years ago