Commit Graph

324 Commits (979e41c9da8536c067286b0c2785b5f1d5779188)

Author SHA1 Message Date
Richard Barry 9e66637bec Core kernel files:
+ Change how queues are allocated and deleted so only one pvPortMalloc() or vPortFree() is required in place of the previous 2.
+ Where the TCB is allocated in relation to the stack is now dependent on the stack growth direction.  The stack will not grow into the TCB.
+ Introduce the configAPPLICATION_ALLOCATED_HEAP constant to allow the application to provide the array used by heap_4.c as its heap.  This allows the application writer to use qualifiers on the array to, for example, force the memory into faster RAM.

Demo application:
+ Add demo for SAMA5D4 using IAR.
10 years ago
Richard Barry 3b0854bf96 Core kernel code:
+ Introduce xSemaphoreGenericGiveFromISR() as an optimisation when giving semaphores and mutexes from an interrupt.

Demo applications:
+ Update IntSemTest.c to provide more code coverage in xSemaphoreGenericGiveFromISR().
+ Ensure the MMU is turned on in the RZ IAR demo.  It was already on in the RZ ARM demo.
11 years ago
Richard Barry d55e7e77a2 Update version number to 8.1.2 after moving the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into individual port layers so it does not affect ports that do not support the definition. 11 years ago
Richard Barry 99229b597b Correct potential compiler warning when configUSE_MUTEXES is set to 0.
Add comments.
11 years ago
Richard Barry a60ce58731 Update version number to 8.1.1 for patch release that re-enables mutexes to be given from an interrupt. 11 years ago
Richard Barry ff5d3512b3 Core kernel code:
- Re-introduce the ability to give a mutex from an ISR.

Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
11 years ago
Richard Barry 7d49c2190c Minor edits prior to tagging V8.1.0. 11 years ago
Richard Barry d33a14b5fb ***IMMINENT RELEASE NOTICE***
Update version numbers ready for FreeRTOS V8.1.0 release in about 10 days.
11 years ago
Richard Barry 52e687086c Demo application related:
+ Update the RZ IAR project so it targets the RZ RSK rather than custom hardware.
+ Update the RZ ARM/DS-5 project so it targets the RZ RSK rather than custom hardware.
+ Updated RX64M demos to use the new iodefine.h naming.

Cortex-A9 port related:
+ Update IAR, ARM and GCC Cortex-A9 port layers to include a 'task exit error' function which is called if a task attempts to incorrectly exit its implementing function.
+ Moved the instruction which switches into system mode out of the restore context macro, as it is only needed when starting the first task.

Core kernel files related:
+ Ensure there are no references to the mutexes held count when mutexes are excluded from the build.
11 years ago
Richard Barry 162448f06b General maintenance - changing comments and correcting spellings only. 11 years ago
Richard Barry 47f895cb34 Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.
11 years ago
Richard Barry b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
11 years ago
Richard Barry 3a3d061cc5 Continue working on the GIC-less Cortex-A5 port for IAR:
- Add in the assert when a task attempts to exit its implementing function without deleting itself.
- Remove obsolete code from the context switch asm code (obsoleted by the fact that there is no mask register).
- Attempt to make code more generic by using definitions for additional register addresses.
11 years ago
Richard Barry 8ad9b75810 Rename ARM_CAx_No_GIC ARM_CA5_No_GIC and add FreeRTOSConfig setting to specify the number of registers in the FPU unit. 11 years ago
Richard Barry f4a1a7d577 Add new port layer for Cortex-A devices without the means to mask interrupt priorities. 11 years ago
Richard Barry 8aa5fa3459 Make the parameters to vPortDefineHeapRegions() const.
Add additional asserts to the Keil CM3 and CM4F ports (other CM3/4 ports already updated).
Add the additional yield necessitated by the mutex held count to the case when configUSE_QUEUE_SETS is 0.
11 years ago
Richard Barry d96dc2adb0 Simply some of the alignment calculations in heap_4.c to match those used in heap_5.c.
Remove some apparently obsolete code from xTaskPriorityDisinherit() (a task cannot be both blocked and giving bac a mutex at the same time].
Update the new "mutex held count" increment and decrement functions to allow mutexes to be created before the scheduler is started.
11 years ago
Richard Barry b0ba273489 Check in the portable.h version required to use heap_5.c. 11 years ago
Richard Barry 4b26dc0614 Check in the new memory allocator that allows the heap to span multiple blocks. 11 years ago
Richard Barry 42b1688a30 Implementation of mutex held counting in tasks.c - needs optimisation before release. 11 years ago
Richard Barry 583b144bc3 Default the definition of portASSERT_IF_IN_ISR() to nothing if it is not defined.
Helper updates to allow a count of the number of mutexes held to be added.
Updates to the CCS Cortex-R4 implementation necessitated by a change in compiler semantics.
Update PIC32MX and MZ ports to assert if a non ISR safe function is called from an ISR.
11 years ago
Richard Barry b4659d8872 Add code to assert() if non ISR safe API function is called from ISR in Tasking CM4F ports - plus fix bug where the max syscall interrupt priority was used incorrectly in the Tasking CM4F port. 11 years ago
Richard Barry 113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 11 years ago
Richard Barry 4723209074 Simplify the assert that checks if a non-ISR safe function is called from an ISR in the GCC Cortex-A9 port. 11 years ago
Richard Barry 8426eba8e7 Added portASSERT_IF_IN_INTERRUPT() macro to the GCC Cortex A9 port layer. 11 years ago
Richard Barry 9efb5c8b2f Check in RL78 GCC port layer now it has been verified with the fixed compiler. 11 years ago
Richard Barry 1130a53ec8 Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.
Update RXv2 GCC port to match RXv2 Renesas port.
11 years ago
Richard Barry b215310e63 Add some missing volatiles to __asm statements in the CA9 GCC port. 11 years ago
Richard Barry 0bb794301a Update version number ready for release. 11 years ago
Richard Barry 911e82a909 Add xQueueGetMutexHolder() to MPU functions. 11 years ago
Richard Barry f25503977e Event Groups: Convert the 'clear bits from ISR' function into a pended function to fix reentrancy issue.
Event Groups: Ensure the 'wait bits' and 'sync' functions don't return values that still contain some internal control bits.
11 years ago
Richard Barry 6af9b013eb Ensure xNewLib_reent is reclaimed when a task is deleted. 11 years ago
Richard Barry 82207ebffa Add test and correct code for the unusual case of a task using an event group to synchronise only with itself.
Add critical sections around call to prvResetNextTaskUnblockTime() that can occur from within a task.
11 years ago
Richard Barry ef7f3c5320 Add the pcTimerGetTimerName() API function. 11 years ago
Richard Barry 29a08b5e24 Update Cortex-A port layers to ensure the ICCRPR and ICCPMR registers are always accessed as 32-bit values. 11 years ago
Richard Barry 05a0e4379e First pass at RXv2 port layer. 11 years ago
Richard Barry 9bd5e5cf03 Cast away a few unused return types to ensure lint/compilers don't generate warnings when the warning level is high. 11 years ago
Richard Barry c8953a68cd Add extra #error message as a configuration sanity check. 11 years ago
Richard Barry ba6d285ea8 Minor updates to ensure all kernel aware debuggers are happy with V8. 11 years ago
Richard Barry e101e7e437 Update version number to V8.0.0 (without the release candidate number). 11 years ago
Richard Barry 38ae9b76bc Add logic to determine the tick timer source and vector installation into the PIC32MZ port assembly file to allow more efficient interrupt entry. 11 years ago
Richard Barry 0f6b699eef Linting. 11 years ago
Richard Barry e4dbc6b770 Make xEventGroupSetBitsFromISR() a function when configUSE_TRACE_FACILITY is enabled to allow the inclusion of a trace macro. 11 years ago
Richard Barry 84f4ae9aa0 Make xTaskIsTaskSuspended() a private function as it should only be called from within critical sections.
Fix issue in and simplify the xTaskRemoveFromUnorderedEventList() function.  The function is new to the V8 release candidates so does not effect official released code.
11 years ago
Richard Barry d12ec14160 Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports.
Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
11 years ago
Richard Barry f843888e60 Complete GCC/Cortex-A9 port. 11 years ago
Richard Barry 51ea2639a9 vQueueAddToRegistry() now takes a const char * instead of a char *.
tmrCOMMAND_CHANGE_PERIOD_FROM_ISR constant added for the "FromISR" version of the software timer change period API function.
11 years ago
Richard Barry 6130fec60e Introduce xTimerPendFunctionCall().
Change INCLUDE_xTimerPendFunctionCallFromISR to INCLUDE_xTimerPendFunctionCall
Update event group trace macros to match the new trace recorder code.
Ensure parameter name consistency by renaming any occurrences of xBlockTime and xBlockTimeTicks to xTicksToWait.
Continue work on GCC/RL78 port - still a work in progress.
Adjust how the critical section was used in xQueueAddToSet.
11 years ago
Richard Barry b352be2e23 Tidy up GCC Cortex-A port layer - still a work in progress. 11 years ago
Richard Barry 14f895478d Continue work on GCC/Cortex-A port layer. 11 years ago
Richard Barry 1e26b1875f Remove #error that attempted to catch stdint.h not being included.
Split the previously overloaded trmCOMMAND_nnn definitions into individual definitions to enable better logging.
11 years ago
Richard Barry d0323e67ae Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up. 11 years ago
Richard Barry 3e430b3801 Carry on working on the Cortex-A/GCC port layer - still a work in progress. 11 years ago
Richard Barry 86023aa5a6 Beginnings of GCC Cortex-A port - not yet completely converted from IAR version. 11 years ago
Richard Barry d8c135e2dc Add extern 'C' to FreeRTOS.h.
Remove obsolete extern declaration of vTaskSwitchContext() from the MPX430X IAR portmacro.h (other older portmacro.h header files contain the same declaration).
11 years ago
Richard Barry a1b8079df1 Introduce configENABLE_BACKWARD_COMPATIBILITY to allow the #defines that provide backward compatibility with FreeRTOS version prior to V8 to be optionally omitted. 11 years ago
Richard Barry f01bf9fdc3 Add additional NOP after EINT instruction in MSP430 ports. 11 years ago
Richard Barry 1aaa80fba6 Map portTICK_RATE_MS to portTICK_PERIOD_MS. 11 years ago
Richard Barry a56d4b998c Minor tidy ups that don't effect code generation, plus:
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
11 years ago
Richard Barry 723682f1dd Minor comment corrections prior to tagging. 11 years ago
Richard Barry a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 11 years ago
Richard Barry 2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions.
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
11 years ago
Richard Barry e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 11 years ago
Richard Barry 2b6eb1c5ab Revert some library files back to using standard types as they are not FreeRTOS files. 11 years ago
Richard Barry 3e20aa7d60 Replace standard types with stdint.h types.
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
11 years ago
Richard Barry b4116a7c7d Change the type used for strings and single characters from signed char to just char. 11 years ago
Richard Barry b3aa1e90ad Add additional const qualifiers. 11 years ago
Richard Barry 6179690dc9 Don't free xQueue->ucHead if it is NULL. 11 years ago
Richard Barry c861e3883d Add coverage test markers. 11 years ago
Richard Barry 64ad1c00b5 In process of module testing event_groups.c.
Introduce xPortRunning variable into Win32 simulator port layer.
Add port optimised task selection macro for the GCC Win32 port layer (the MSVC version has had one for a while).
Ensure the event list item value does not get modified by code in tasks.c (priority inheritance, or priority change) when it is in use by the event group implementation.
11 years ago
Richard Barry 4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 11 years ago
Richard Barry a320d6dffd Update the ucQueueNumber member of the queue structure (used with FreeRTOS+Trace to be an unsigned portBASE_TYPE instead of an unsigned char. 11 years ago
Richard Barry c17c65fc09 Introduce prvResetNextTaskUnblockTime() to encapsulate functionality from various places in the code into a single function. 11 years ago
Richard Barry acad916453 Change the way one thread deletes another in the Windows simulator port (the way one thread deleted itself was already changed in a previous check-in).
Reset the expected block time variable when a task is suspended or deleted in case the value held in the variables was associated with the task just suspended or deleted.
11 years ago
Richard Barry 0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ).
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
11 years ago
Richard Barry 6b3393b4b6 Add trace macros into the event groups implementation.
Add a task pre-delete hook to allow the insertion of any port specific clean up when a task is deleted.
Increase use of 'const' qualifiers.
Add vPortCloseRunningThread() into the Win32 port layer to attempt to allow Windows threads to be closed more gracefully when a task deletes itself.
11 years ago
Richard Barry 00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 11 years ago
Richard Barry 2e42d7690a Continue work on new event groups functionality - fixups required by test results. 11 years ago
Richard Barry d2c2e3ca68 Add additional asserts() to ensure certain operations are not performed when the scheduler is suspended.
Change the xBlockTime variables in event_groups.c/h to xTicksToWait to match the naming in other core FreeRTOS files.
11 years ago
Richard Barry 9dc39ee2a7 Add additional event group tests - and update implementation as required by test results. 11 years ago
Richard Barry f54f21b8f6 Add event_groups.c and associated functions in other core files.
Added xTimerPendCallbackFromISR() to provide a centralised deferred interrupt handling mechanism.
Add xPortGetLowestEverFreeHeapSize() to heap_4.c.
11 years ago
Richard Barry 417c3d1054 Change backslashes to forward slashes for all PIC projects. 11 years ago
Richard Barry fa002f7fdd Final tidy up before V7.6.0 zip file creation. 11 years ago
Richard Barry a2cfaa7cd9 Correct build of helper function for ports where the stack grows up. 11 years ago
Richard Barry 0cd79ad81d Change version numbers in preparation for V7.6.0 release. 11 years ago
Richard Barry b1b4b15353 Add configASSERT()s to ensure counting semaphores are not created with a max count of zero or an initial count greater than the max count. 11 years ago
Richard Barry b181a3af99 Ensure the definition of prvTaskExitError()does not result in a compiler warning in ports where its use can be overridden (GCC Cortex-M ports).
Remove duplicate save/restore of r14 in Cortex-M4F ports.
11 years ago
Richard Barry 20eb03ed7d Change behaviour when configUSE_PREEMPTION is 0 (preemption is turned off). See the change history in the next release for details.
Remove an erroneous const in the prototype of queue receive/peek functions.
11 years ago
Richard Barry 30bc6c01a9 Add ehb instructions back into PIC32 port layer (upon advice).
Add configCLEAR_TICK_TIMER_INTERRUPT into PIC32 port layer to allow the timer configuration to be changed without any edits to the port layer being required.
Add prvTaskExitError() into the PIC32 port layer to trap tasks that attempt to exit from their implementing function.
Provide the ability to trap interrupt stack overflows in the PIC32 port.
Radically improve the timing in the Win32 simulator port layer.
11 years ago
Richard Barry dcf261a3e6 Add xSemaphoreCreateBinary() so vSemaphoreCreate() can be deprecated. 11 years ago
Richard Barry dcd261bb8b Update the Keil and IAR CM0 port layers to match the changes made to the GCC version. 11 years ago
Richard Barry 41fe693968 Improve how the scheduler is started in the GCC Cortex-M0 port. 11 years ago
Richard Barry 25bab250b6 Added a little intelligence to eTaskGetState() so it can distinguish between a suspended task and a task that is indefinitely blocked on an event. 11 years ago
Richard Barry a12ea2d212 Update FreeRTOS version number to V7.5.3
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
11 years ago
Richard Barry 94607d83f9 Add workaround to XMC4000 silicon bug to Tasking Cortex-M4F port layer. 11 years ago
Richard Barry 0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 11 years ago
Richard Barry aedf7824cb Introduce the prvTaskExitError() function for all ARM_CMn ports.
Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
11 years ago
Richard Barry eaacbb099a Clear up a few compiler warnings.
Correct header comments in the UARTCommandConsole.c file used in the SmartFusion2 demo.
Exercise the new xQueueSpacesAvailable() function in the MSVC demo.
Add defaults for the new traceMALLOC and traceFREE trace macros.
Catch tasks trying to exit their functions in the Cortex-M0 ports.
Add additional comments to timers.c in response to a support forum question.
Initialise _impure_ptr prior to the first task being started.
Prior to V7.5.0 a yield pended in the tick hook would have occurred during the same tick interrupt.  Return pdTRUE from xTaskIncrementTick() if a yield is pending to revert to that behaviour.
11 years ago
Richard Barry 7ec4773131 Add traceMALLOC() and traceFREE() macros. 11 years ago
Richard Barry 1902d2b64a Add the uxQueueSpacesAvailable() API function.
Move a configASSERT() call in timers.c to prevent a "condition is always true" compiler warning.
12 years ago
Richard Barry 73606369c4 Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
12 years ago
Richard Barry 574f5044a6 Starting point for Keil Cortex-M0 port. 12 years ago
Richard Barry c40370e96a Fix a few typos and remove the "register" keyword. 12 years ago
Richard Barry 63e8044d33 Allow compilation when portALT_GET_RUN_TIME_COUNTER_VALUE() is defined. 12 years ago
Richard Barry 2f754d9b0c Add additional critical section to the default tickless implementations.
Update version number for maintenance release.
12 years ago
Richard Barry 3cbe0a724d Update version number. 12 years ago
Richard Barry 8ceb665994 Void a few unused return values and make casting more C++ friendly. 12 years ago
Richard Barry bb2093cf5d Update the header file included in the PIC32 port_asm.S file to use the header for the latest compiler version. 12 years ago
Richard Barry 679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 12 years ago
Richard Barry 9054485f1a Tidy up pre-processor as final act before tagging as V7.5.0 12 years ago
Richard Barry 08057fa77f Changes to comments only. 12 years ago
Richard Barry 203ae64600 Rename xTaskGetSystemState() uxTaskGetSystemState(). 12 years ago
Richard Barry 92fae7d262 For consistency change the name of configINCLUDE_STATS_FORMATTING_FUNCTIONS to configUSE_STATS_FORMATTING_FUNCTIONS. 12 years ago
Richard Barry 7d6758ee1a Minor updates and change version number for V7.5.0 release. 12 years ago
Richard Barry 7d1292ced2 Linting and MISRA checking 12 years ago
Richard Barry e83b93f5fc Tidy up comments only. 12 years ago
Richard Barry ce9c3b7413 Variable name change in the PIC32 port layer only. 12 years ago
Richard Barry 1e17924fa8 Update doxygen comments. 12 years ago
Richard Barry da0fff63c9 Update Cortex-M MPU version to include new API functions. 12 years ago
Richard Barry e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 12 years ago
Richard Barry 4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 12 years ago
Richard Barry ad8fa53043 Kernel optimisations. 12 years ago
Richard Barry c9d9bddc3c Add comments to the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() calls in the core queue.c and tasks.c files. 12 years ago
Richard Barry 5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 12 years ago
Richard Barry 65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler.
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
12 years ago
Richard Barry 0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed.
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
12 years ago
Richard Barry c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 12 years ago
Richard Barry b521d70e7e Remove compiler warnings. 12 years ago
Richard Barry c1b4fc58d2 Add new xTaskGetSystemState() API function to return raw data on each task in the system.
Relegate the vTaskList() and vTaskGetRunTimeStats() functions to "sample" functions demonstrating how to use xTaskGetSystemState() to generate human readable status information.
Introduce and default configINCLUDE_STATS_FORMATTING_FUNCTIONS which must now be defined to use vTaskList() and vTaskGetRunTimeStats().
12 years ago
Richard Barry 877ce218a4 Add additional comment only. 12 years ago
Richard Barry 0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 12 years ago
Richard Barry b8a219b30c Update QueueOverwrite.c to include a call to xQueuePeekFromISR().
Default new QueuePeekFromISR() trace macros.
12 years ago
Richard Barry 3b02b4c8f8 Add xQueueOverwriteFromISR() and update the QueueOverwrite.c to demonstrate its use. 12 years ago
Richard Barry 671949ad78 Add xQueueOverwrite() and a common demo task to demonstrate its use.
Update MSVC Win32 demo to include the xQueueOverwrite() common demo tasks.
12 years ago
Richard Barry 59f75a12f6 Add Newlib reent support. 12 years ago
Richard Barry 4444b4ee68 Improve efficiency and behaviour of vListInsertEnd(). 12 years ago
Richard Barry f11635ed91 Remove reliance on strncpy() function. 12 years ago
Richard Barry a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 12 years ago
Richard Barry 6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 12 years ago
Richard Barry fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 12 years ago
Richard Barry 87049ac37c Re-implement the LPC18xx and SmartFusion2 run time stats implementation to use the free running Cortex-M cycle counter in place of the systick.
Correct the run-time stats counter implementation in the RZ demo.
Guard against run time counters going backwards in tasks.c.
12 years ago
Richard Barry cdae14a8cb Replace the #define that maps the uxRecursiveCallCount to the pcReadFrom pointer with a union - although this is against the coding standard it seemed the best way of ensuring complete adherence to the C standard and allow correct builds with LLVM when the optimiser is on. 12 years ago
Richard Barry e6903dac61 Add extra debug comment into list.c. 12 years ago
Richard Barry 3a507bdc0c Add missing function prototype. 12 years ago
Richard Barry c3f9e3c5ff Update RVDS port layer to match IAR port layer. 12 years ago
Richard Barry 5013baa2cd RVDS ARM Cortex-A port layer. 12 years ago
Richard Barry 04dafed839 IAR ARM Cortex-A port layer. 12 years ago
Richard Barry 2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value.
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
12 years ago
Richard Barry 62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 12 years ago
Richard Barry c75c01ffdf Check in implementation of xTaskIncrementTick (replaced vTaskIncrementTick()). 12 years ago