a5d0e3f0c1
Prepare for V7.4.0 release.
12 years ago
902f9e1a58
Update PIC32 demo application to remove reliance on PLIB functions.
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Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
12 years ago
ac78adae4b
Added INCLUDE_xSemaphoreGetMutexHolder() default.
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Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
12 years ago
ba686260ca
Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
12 years ago
f5c52bdb1d
Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
12 years ago
f06a945444
Prepare for V7.3.0 release.
12 years ago
e03ab659f3
Add tickless idle support in Cortex-M ports.
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Change CCS R4 directory name.
12 years ago
87f663a461
Correct #if( configMAX_PRIORITIES >= 32 ) check performed when configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 to instead be #if( configMAX_PRIORITIES > 32 ).
13 years ago
92f1699055
Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
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Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
13 years ago
0c7af1c2d3
Put comments in the code that give a reference to people who think that setting BASE_PRI to zero is the wrong thing to to in an ISR.
13 years ago
e0bab5981a
Prepare for V7.2.0 release.
13 years ago
f508a5f653
Add FreeRTOS-Plus directory.
13 years ago
Richard Barry