Commit Graph

3110 Commits (01987eb1c55e93578501e660d1ee34f27a89ec92)
 

Author SHA1 Message Date
Gaurav-Aggarwal-AWS becbb89181
Add a cap to the queue locks (#435)
Add a cap to the queue locks

cRxLock and cTxLock members of the queue data structure count the
number items received and sent to the queue while the queue was locked.
These are later used to unblock tasks waiting on the queue when the
queue is unlocked. The data type of these members is int8_t and this can
trigger overflow check assert if an ISR continuously reads/writes to the
queue in a loop as reported in this issue: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/419. 

Note due to the length of the operation is it not recommended to write to
the queue that many times from an ISR - stream buffers are a better option,
or alternatively, defer the operation to a task by just having the ISR send a
direct to task notification to unblock the task.

This PR caps the values of the cRxLock and cTxLock to the number of tasks in
the system because we cannot unblocks more tasks than there are in the system. 
Note that the same assert could still be triggered is the application creates more
than 127 tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav-Aggarwal-AWS 8e2dd5b861
Add a Known Issues file in the Third Party folder (#434)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Amit Tomar c13719d2d0
fix alignment exception for ullPortInterruptNesting. (#317)
* fix alignment exception for ullPortInterruptNesting.

While loading (LDR X5, ullPortInterruptNestingConst) the ullPortInterruptNesting
variable, the program control seems to be stuck and there is no abort or stack
trace observed (as there is no exception handler is installed to catch unaligned
access exception).

Program control moves forward, if one just declares this varible to be 2 bytes
aligned but then varible is not updated properly.

One of my colleague, pointed out that issue is due to the fact that
ullPortInterruptNesting must be at 8 bytes aligned address but since
"vApplicationIRQHandler" (that has 4 bytes of address) is sitting between
two 8 bytes aligned addresses that forces ullPortInterruptNesting to be at
4 byte aligned address, causing all sort of mess.

It works on QEMU (on ARM64) as it is, since there is no such check for
unaligned access but on real hardware it is prohibited.

Workaround to this problem is, either we skip 4 byets (using .align 4) after
vApplicationIRQHandler declaration or declare it the end of all declarations.
This commit does the latter one.

Signed-off-by: Amit Singh Tomar <atomar25opensource@gmail.com>

* Update portASM.S

Remove 1 tab = 4 spaces

Co-authored-by: Amit Singh Tomar <atomar25opensource@gmail.com>
Co-authored-by: alfred gedeon <28123637+alfred2g@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
3 years ago
clemenskresser 7b95420ad9
fixed deadlock in event groups when a mutex is used for memory allocation (#284)
Co-authored-by: Clemens Kresser <clemens.kresser@gmail.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
3 years ago
Joseph Julicher f5df2c140c
Documentation update for xEventGroupClearBitsFromISR (#432)
* Documented the correct use of xEventGroupClearBitsFromISR

* removed typo
3 years ago
Fabian 481c722ef3
RISC-V: No #error on RV64 regarding byte alignment (#367)
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years ago
leona 81d15dc550
Fix: Interrut Handler Register Function and Exception Process (#41)
Signed-off-by: shiode <shiode@aptpod.co.jp>

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
Co-authored-by: David Chalco <59750547+dachalco@users.noreply.github.com>
Co-authored-by: Joseph Julicher <jjulicher@mac.com>
3 years ago
Joseph Julicher 455df7a07a
uxAutoReload replaced with xAutoReload to improve MISRA compliance (#429)
* Created xTimerGetReloadMode and uxTimerGetReloadMode.

* Changed the use of uxAutoReload to xAutoReload

* updated history.txt

* Update History.txt

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Update timers.c

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>

* Added xTimerGetReloadMode to lexicon.txt

* uncrustified timers.c

* Fix formatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav-Aggarwal-AWS 53b9a80b8e
Update third party ports readme (#428)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Graham Sanderson debbd254b6
RP2040 fixes (#424)
* RP2040: malloc needs to be thread safe for FreeRTOS whether both cores are used or not

* RP2040: CMake file had broken left over test code

* RP2040: portIS_FREE_RTOS_CORE() returned an incorrect value prior to scheduler init when the application was compiled without multicore support

* RP2040: Bad initialization code was causing IRQs to get disabled before main() was called when using non static allocation
3 years ago
Pramith K V 4c4089b154
Remove tickless idle mode dependency with include v task suspend (#422)
* Fix Remove tickless idle feature dependency with INCLUDE_vTaskSuspend
* fix unused variable warning
* Fix CI fomatting check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Authored-by: pramithkv <pramit@lifesignals.com>
3 years ago
R. Dunbar Poor 052e364686
Fix #415: Compiling tasks.c with configSUPPORT_DYNAMIC_ALLOCATION = 0 (#416)
* Fix #415: Compiling tasks.c with configSUPPORT_DYNAMIC_ALLOCATION = 0
3 years ago
RichardBarry 271bdfb880
Simplify prvInitialiseNewTask() (#417)
Memset newly allocated TCB structures to zero, and remove code
that set individual structure members to zero.
3 years ago
RichardBarry e13f990385
Fix keil compilation error (#418)
* Fix compilation error when using the Keil tools with the Keil compiler.
3 years ago
Gaurav Aggarwal 6ac9aaec95 Fix formatting error
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav-Aggarwal-AWS 78da9cb261
Fix code example in timers.h (#412)
The example was trying to create a timer with period 0 which is not a
valid period.

This was reported here - https://forums.freertos.org/t/multiple-timers/13884

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Laukik Hase 683811bd8c
bugfix: Initialize uxTaskNumber at task initialization (#374)
* bugfix: Initialize uxTaskNumber at task initialization
3 years ago
Tobias Nießen 4896d6b1a1 Mention portMAX_DELAY in xEventGroupWaitBits docs (#411)
The public function xEventGroupWaitBits passes xTicksToWait to the
function vTaskPlaceOnUnorderedEventList, which passes the number of
ticks to prvAddCurrentTaskToDelayedList and sets xCanBlockIndefinitely
to pdTRUE, causing the latter to block indefinitely if
xTicksToWait == portMAX_DELAY and INCLUDE_vTaskSuspend == 1.
3 years ago
Kevin Thibedeau cd0b7fc271
Build with -Wmissing-prototypes flags vPortYieldFromISR() in the Posix port. (#409)
There's already a portYIELD_FROM_ISR() macro that calls vPortYield() which wraps the FromISR code.
It doesn't appear that vPortYieldFromISR() is intended to be publicly accessible in this port so
I've marked it as private to silence the warning.

event_create() also got flagged due to missing void in prototype.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years ago
Gaurav-Aggarwal-AWS 1ec7e50722
Change hyphen to ASCII character (#410)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav-Aggarwal-AWS 5a2a1d0702
Change taskYIELD_FROM_ISR to portYIELD_FROM_ISR in docs (#408) 3 years ago
prplz a40d52dc05
Fix documentation mistake (#407)
ulTaskNotification -> ulTaskNotify
3 years ago
andrewtjs a432a688ca
bugfix: Initialise stack correctly on dsPIC port (#405)
* Use compiler predefined constants.

Use of MPLAB_DSPIC_PORT is deprecated.
3 years ago
Archit Gupta d649a77128
Fix prvWriteMessageToBuffer on big endian (#391)
prvWriteMessageToBuffer wrote the first sbBYTES_TO_STORE_MESSAGE_LENGTH
bytes of the size_t-typed length to the buffer as the data length. While
this functions on little endian, it copies the wrong bytes on big
endian. This fix converts the length to configMESSAGE_BUFFER_LENGTH_TYPE
first, and then copies the exact amount, thus fixing the issue.
Additionally it adds an assert to verify the size is not greater than
the max value of configMESSAGE_BUFFER_LENGTH_TYPE; previously this would
truncate silently.

Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years ago
Gaurav-Aggarwal-AWS 06fb777e43
Update comments for the ARM_CA53_64_BIT_SRE port (#403)
Mention that FreeRTOS_IRQ_Handler should not be used for FIQs and the
reason for assuming Group 1 for Interrupt Acknowledge and End Of
Interrupt registers.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Stephane Viau 68ddb32b55
Handle interrupt acknowledge register in Cortex-A53 SRE port (#392)
Let the FreeRTOS IRQ handler properly store and restore the ICCIAR
register value around the vApplicationIRQHandler() call.

Signed-off-by: Stephane Viau <stephane.viau@oss.nxp.com>

Co-authored-by: Stephane Viau <stephane.viau@oss.nxp.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years ago
swaldhoer a030d0a02b
fix typo (#399) 3 years ago
Qikai 1fb4e847ed
Fix the defect that Heap_1.c may waste first portBYTE_ALIGNMENT bytes of ucHeap[] (#238)
* Fix the defect that Heap_1.c may waste first 8 bytes of ucHeap[]

* Fix the same byte waste issue in heap_2
3 years ago
Andres O. Vela 5f290e4559
Fix typo in comment (#398) 3 years ago
Shubham Kulkarni 741185f1d0
Xtensa_ESP32: Add definition for portMEMORY_BARRIER (#395)
This fixes crash observed in Amazon FreeRTOS when optimisations are enabled
3 years ago
Gaurav-Aggarwal-AWS 1b86b39940
Remove AVR ports from main repo (#394)
These ports now exist in the
https://github.com/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports repo.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 384ffc5b91 Fix spell-check failure
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 68889fdd79 Update History.txt
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 99a5a5fe82 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 06ea7275b3 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal 61f7560243 Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Gaurav Aggarwal ccaa0f4d6e Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Zim Kalinowski f8ada39d85
Replace <pre> with @code - remaining files (#388)
Co-authored-by: Paul Bartell <pbartell@amazon.com>
Co-authored-by: Ming Yue <mingyue86010@gmail.com>
3 years ago
Gaurav-Aggarwal-AWS fa0f5c436c
Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports (#385)
* Add freertos_risc_v_chip_specific_extensions.h for 64-bit ports

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
3 years ago
Zim Kalinowski bb02cf647d
minor fix in stream buffer doc (#387)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
3 years ago
Zim Kalinowski ae73f0de41
Replace <pre> with @code{c} (#386)
* replace <pre> with @code{c}

* endcode must pass spellcheck
3 years ago
sherryzhang c290780e34
Update the README to align with TF-Mv1.4.0 in TF-M integration (#384)
Change-Id: I41fc8e18657086e86eacd38ed70f474555739a3c
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
3 years ago
Zim Kalinowski 0b1e9d79c8
fixes in queue documentation (#382)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
4 years ago
Shubham Kulkarni 6ba8aa63c1
Xtensa_ESP32: Fix build issues when external SPIRAM is enabled (#381)
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
4 years ago
Paul Adelsbach d858d1ff36
fix example usage of xMessageBufferCreateStatic and xStreamBufferCrea… (#380)
Example usage is actually correct, so remove the -1. but update
the incorrect parameter description for pucStreamBufferStorageArea
and pucMessageBufferStorageArea.
4 years ago
Jack Lam d01801807d
Tidy up the 8051 sdcc port (#376)
* Tidy up the 8051 sdcc port

* Replace tabs with spaces in SDCC Cygnal port.c file.

Co-authored-by: John Lin <shaojun.lin@delonghigroup.com>
Co-authored-by: Paul Bartell <pbartell@amazon.com>
4 years ago
Zim Kalinowski 1b38078939
fixed parameter names documentation (#378) 4 years ago
RichardBarry b97bb48e06
Indent contents of a taskENTER_CRITICAL/taskEXIT_CRITICAL block. (#348)
* Indent contents of a taskENTER_CRITICAL/taskEXIT_CRITICAL block.
Move a few configASSERT() statements out of a path where they would always be triggered to prevent "condition is always true" compiler warnings.

* Replace configASSERT() positions due to unintended semantic change from the version where asserts were at the top of the file.

Co-authored-by: RichardBarry <richardbarry.c@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
4 years ago