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@ -27,18 +27,18 @@
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*/
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/*
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* Changes from V3.2.1
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Changes from V3.2.1
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+ CallReturn Depth increased from 8 to 10 levels to accommodate wizC/fedC V12.
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+
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+ Changes from V3.2.0
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Changes from V3.2.0
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+ TBLPTRU is now initialised to zero during the initial stack creation of a new task. This solves
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+ an error on devices with more than 64kB ROM.
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+
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+ Changes from V3.0.0
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an error on devices with more than 64kB ROM.
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Changes from V3.0.0
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+ ucCriticalNesting is now initialised to 0x7F to prevent interrupts from being
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+ handled before the scheduler is started.
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+
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+ Changes from V3.0.1
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handled before the scheduler is started.
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Changes from V3.0.1
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*/
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/* Scheduler include files. */
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@ -106,20 +106,16 @@ register uint8_t ucCriticalNesting = 0x7F;
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* Initialise the stack of a new task.
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* See portSAVE_CONTEXT macro for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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uint8_t ucScratch;
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/*
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* Get the size of the RAMarea in page 0 used by the compiler
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* We do this here already to avoid W-register conflicts.
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*/
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_Pragma("asm")
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movlw OVERHEADPAGE0-LOCOPTSIZE+MAXLOCOPTSIZE
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movwf PRODL, ACCESS;
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PRODL is used as temp register
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movwf PRODL,ACCESS ; PRODL is used as temp register
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_Pragma("asmend")
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ucScratch = PRODL;
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@ -127,9 +123,9 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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* Place a few bytes of known values on the bottom of the stack.
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* This is just useful for debugging.
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*/
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/* *pxTopOfStack-- = 0x11; */
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/* *pxTopOfStack-- = 0x22; */
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/* *pxTopOfStack-- = 0x33; */
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// *pxTopOfStack-- = 0x11;
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// *pxTopOfStack-- = 0x22;
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// *pxTopOfStack-- = 0x33;
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/*
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* Simulate how the stack would look after a call to vPortYield()
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