Add demo for the Keil RVDS compiler.

pull/4/head
Richard Barry 17 years ago
parent 6ae55f3d6d
commit c59af80374

@ -0,0 +1,97 @@
/*
FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <lpc21xx.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 60000000 ) /* =12.0MHz xtal multiplied by 5 using the PLL. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) 13 * 1024 )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

@ -0,0 +1,114 @@
/*
FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#include "FreeRTOS.h"
#include "portable.h"
#include "partest.h"
#define partstFIRST_IO ( ( unsigned portLONG ) 0x10000 )
#define partstNUM_LEDS ( 8 )
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* This is performed from main() as the io bits are shared with other setup
functions. */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned portLONG ulLED = partstFIRST_IO;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P16 to P23 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* Set or clear the output. */
if( xValue )
{
IOSET1 = ulLED;
}
else
{
IOCLR1 = ulLED;
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned portLONG ulLED = partstFIRST_IO, ulCurrentState;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned portLONG ) uxLED;
/* If this bit is already set, clear it, and visa versa. */
ulCurrentState = IOPIN1;
if( ulCurrentState & ulLED )
{
IOCLR1 = ulLED;
}
else
{
IOSET1 = ulLED;
}
}
}

@ -0,0 +1,54 @@
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm { 0,0,0,0,0,0,0,0 }
Target (RTOSDemo), 0x0004 // Tools: 'ARM-ADS'
GRPOPT 1,(Other),1,0,0
GRPOPT 2,(FreeRTOS),0,0,0
GRPOPT 3,(Stadard Demo),0,0,0
OPTFFF 1,1,2,0,0,0,0,0,<.\Startup.s><Startup.s>
OPTFFF 1,2,1,0,0,0,0,0,<.\ParTest\ParTest.c><ParTest.c>
OPTFFF 1,3,1,2,0,160,164,0,<.\main.c><main.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,154,0,0,0,161,0,0,0,23,5,0,0,111,2,0,0 }
OPTFFF 1,4,1,234881024,0,0,0,0,<.\serial\serial.c><serial.c>
OPTFFF 1,5,2,486539264,0,0,0,0,<.\serial\serialISR.s><serialISR.s>
OPTFFF 2,6,1,0,0,0,0,0,<..\..\Source\tasks.c><tasks.c>
OPTFFF 2,7,1,0,0,0,0,0,<..\..\Source\list.c><list.c>
OPTFFF 2,8,1,0,0,0,0,0,<..\..\Source\queue.c><queue.c>
OPTFFF 2,9,1,0,0,0,0,0,<..\..\Source\portable\RVDS\ARM7_LPC21xx\port.c><port.c>
OPTFFF 2,10,1,0,0,0,0,0,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c>
OPTFFF 2,11,2,0,0,0,0,0,<..\..\Source\portable\RVDS\ARM7_LPC21xx\portASM.s><portASM.s>
OPTFFF 3,12,1,0,0,0,0,0,<..\Common\Minimal\flash.c><flash.c>
OPTFFF 3,13,1,0,0,0,0,0,<..\Common\Minimal\integer.c><integer.c>
OPTFFF 3,14,1,0,0,0,0,0,<..\Common\Minimal\comtest.c><comtest.c>
TARGOPT 1, (RTOSDemo)
ADSCLK=12000000
OPTTT 1,1,1,0
OPTHX 1,65535,0,0,0
OPTLX 79,66,8,<.\>
OPTOX 16
OPTLT 1,1,1,0,1,1,0,1,0,0,0,0
OPTXL 1,1,1,1,1,1,1,0,0
OPTFL 1,0,1
OPTAX 8
OPTBL 0,(Data Sheet)<DATASHTS\PHILIPS\LPC2119_2129.PDF>
OPTBL 1,(User Manual)<DATASHTS\PHILIPS\user_manual_LPC2119_2129_2194_2292_2294.PDF>
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC21x9)(SARM.DLL)()(TARMP.DLL)(-pLPC21x9)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
OPTKEY 0,(DLGDARM)((134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(136=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(118=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(119=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0))
OPTKEY 0,(ARMDBGFLAGS)(-T5F)
OPTDF 0x86
OPTLE <>
OPTLC <>
EndOpt

@ -0,0 +1,115 @@
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RTOSDemo), 0x0004 // Tools: 'ARM-ADS'
Group (Other)
Group (FreeRTOS)
Group (Stadard Demo)
File 1,2,<.\Startup.s><Startup.s>
File 1,1,<.\ParTest\ParTest.c><ParTest.c>
File 1,1,<.\main.c><main.c>
File 1,1,<.\serial\serial.c><serial.c>
File 1,2,<.\serial\serialISR.s><serialISR.s>
File 2,1,<..\..\Source\tasks.c><tasks.c>
File 2,1,<..\..\Source\list.c><list.c>
File 2,1,<..\..\Source\queue.c><queue.c>
File 2,1,<..\..\Source\portable\RVDS\ARM7_LPC21xx\port.c><port.c>
File 2,1,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c>
File 2,2,<..\..\Source\portable\RVDS\ARM7_LPC21xx\portASM.s><portASM.s>
File 3,1,<..\Common\Minimal\flash.c><flash.c>
File 3,1,<..\Common\Minimal\integer.c><integer.c>
File 3,1,<..\Common\Minimal\comtest.c><comtest.c>
Options 1,0,0 // Target 'RTOSDemo'
Device (LPC2129)
Vendor (NXP (founded by Philips))
Cpu (IRAM(0x40000000-0x40003FFF) IROM(0-0x3FFFF) CLOCK(12000000) CPUTYPE(ARM7TDMI))
FlashUt (LPC210x_ISP.EXE ("#H" ^X $D COM1: 9600 1))
StupF ("STARTUP\Philips\Startup.s" ("Philips LPC2100 Startup Code"))
FlashDR (UL2ARM(-U40296420 -O7 -C0 -FO7 -FD40000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL03E000))
DevID (3648)
Rgf (LPC21xx.H)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ÿPhilips\)
OrgReg (ÿPhilips\)
TgStat=16
OutDir (.\)
OutName (RTOSDemo)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP (ARM7TDMI)
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,64,0,64,0,0 }
OCMADSIROM { 1,0,0,0,0,0,0,4,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,64,0,64,0,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (ARM7_LPC21xx_KEIL_RVDS)
ADSCUDEF ()
ADSCINCD (.;..\..\Source\portable\RVDS\ARM7_LPC21xx;..\Common\include;..\..\Source\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD (..\..\Source\portable\RVDS\ARM7_LPC21xx)
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x00000000)
ADSLDDA (0x40000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDIF ()
ADSLDDW ()
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC21x9)(SARM.DLL)()(TARMP.DLL)(-pLPC21x9)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
FLASH1 { 2,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0,0,0,0,0 }
FLASH2 ()
FLASH3 (LPC210x_ISP.EXE ("#H" ^X $D COM1: 9600 1))
FLASH4 ()
EndOpt

@ -0,0 +1,11 @@
<html>
<body>
<pre>
<h1>µVision3 Build Log</h1>
<h2>Project:</h2>
C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\ARM7_LPC2129_Keil_RVDS\RTOSDemo.uv2
Project File Date: 10/23/2008
<h2>Output:</h2>
Clean started: Project: 'RTOSDemo'
deleting intermediate output files for target 'RTOSDemo'

@ -0,0 +1,15 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x40000000 0x00004000 { ; RW data
.ANY (+RW +ZI)
}
}

@ -0,0 +1,32 @@
*** Creating Trace Output File 'RTOSDemo.tra' Ok.
### Preparing for ADS-LD.
### Creating ADS-LD Command Line
### List of Objects: adding '"startup.o"'
### List of Objects: adding '"partest.o"'
### List of Objects: adding '"main.o"'
### List of Objects: adding '"serial.o"'
### List of Objects: adding '"serialisr.o"'
### List of Objects: adding '"tasks.o"'
### List of Objects: adding '"list.o"'
### List of Objects: adding '"queue.o"'
### List of Objects: adding '"port.o"'
### List of Objects: adding '"heap_2.o"'
### List of Objects: adding '".\portasm.o"'
### List of Objects: adding '"flash.o"'
### List of Objects: adding '"integer.o"'
### List of Objects: adding '"comtest.o"'
### ADS-LD Command completed:
"startup.o" "partest.o" "main.o" "serial.o" "serialisr.o" "tasks.o" "list.o" "queue.o" "port.o" "heap_2.o" ".\portasm.o" "flash.o" "integer.o" "comtest.o" --device DARMP --strict --scatter "RTOSDemo.sct"
--autoat --summary_stderr --info summarysizes --map --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list ".\RTOSDemo.map" -o "RTOSDemo.axf"### Preparing Environment (PrepEnvAds)
### ADS-LD Output File: 'RTOSDemo.axf'
### ADS-LD Command File: 'RTOSDemo.lnp'
### Checking for dirty Components...
### Creating CmdFile 'RTOSDemo.lnp', Handle=0x0000044C
### Writing '.lnp' file
### ADS-LD Command file 'RTOSDemo.lnp' is ready.
### ADS-LD: About to start ADS-LD Thread.
### ADS-LD: executed with 0 errors
### Updating obj list
### LDADS_file() completed.

@ -0,0 +1,40 @@
[Signal 1]
DispName=Port1
PlotType=1
Color=16711935
MinDec=0
MinVal=0.
MaxDec=0
MaxVal=-1.
Mask=65536
Offset=16
[Signal 2]
DispName=Port1
PlotType=1
Color=255
MinDec=0
MinVal=0.
MaxDec=0
MaxVal=-1.
Mask=131072
Offset=17
[Signal 3]
DispName=Port1
PlotType=1
Color=32768
MinDec=0
MinVal=0.
MaxDec=0
MaxVal=-1.
Mask=262144
Offset=18
[Signal 4]
DispName=Port1
PlotType=1
Color=16711680
MinDec=0
MinVal=0.
MaxDec=0
MaxVal=-1.
Mask=524288
Offset=19

@ -0,0 +1,56 @@
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm { 0,0,0,0,0,0,0,0 }
Target (RTOSDemo), 0x0004 // Tools: 'ARM-ADS'
GRPOPT 1,(Other),0,0,0
GRPOPT 2,(FreeRTOS),0,0,0
GRPOPT 3,(Stadard Demo),0,0,0
OPTFFF 1,1,2,0,0,1,1,0,<.\Startup.s><Startup.s> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,232,255,255,255,132,0,0,0,138,0,0,0,237,3,0,0,92,2,0,0 }
OPTFFF 1,2,1,0,0,1,1,0,<.\ParTest\ParTest.c><ParTest.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,232,255,255,255,154,0,0,0,161,0,0,0,3,4,0,0,115,2,0,0 }
OPTFFF 1,3,1,0,0,1,1,0,<.\main.c><main.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,232,255,255,255,133,0,0,0,3,0,0,0,24,5,0,0,214,2,0,0 }
OPTFFF 1,4,1,0,0,1,1,0,<.\serial\serial.c><serial.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,232,255,255,255,88,0,0,0,92,0,0,0,189,3,0,0,42,2,0,0 }
OPTFFF 2,5,1,0,0,0,0,0,<..\..\Source\tasks.c><tasks.c>
OPTFFF 2,6,1,0,0,0,0,0,<..\..\Source\list.c><list.c>
OPTFFF 2,7,1,0,0,0,0,0,<..\..\Source\queue.c><queue.c>
OPTFFF 2,8,1,0,0,34,51,0,<..\..\Source\portable\RVDS\ARM7_LPC21xx\port.c><port.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,232,255,255,255,88,0,0,0,92,0,0,0,171,3,0,0,107,2,0,0 }
OPTFFF 2,9,1,0,0,1,1,0,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0,101,3,0,0,206,1,0,0 }
OPTFFF 2,10,2,50331650,0,24,48,0,<.\serial\serialISRE.s><serialISRE.s> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,22,0,0,0,23,0,0,0,123,3,0,0,229,1,0,0 }
OPTFFF 2,11,2,0,0,1,1,0,<..\..\Source\portable\RVDS\ARM7_LPC21xx\portASM.s><portASM.s> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,44,0,0,0,46,0,0,0,145,3,0,0,252,1,0,0 }
OPTFFF 3,12,1,0,0,0,0,0,<..\Common\Minimal\flash.c><flash.c>
OPTFFF 3,13,1,0,0,0,0,0,<..\Common\Minimal\integer.c><integer.c>
OPTFFF 3,14,1,0,0,0,0,0,<..\Common\Minimal\comtest.c><comtest.c>
ExtF <C:\E\Dev\FreeRTOS\WorkingCopy2\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h> 28,49,0,{ 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,66,0,0,0,69,0,0,0,167,3,0,0,19,2,0,0 }
TARGOPT 1, (RTOSDemo)
ADSCLK=12000000
OPTTT 1,1,1,0
OPTHX 1,65535,0,0,0
OPTLX 79,66,8,<.\>
OPTOX 16
OPTLT 1,1,1,0,1,1,0,1,0,0,0,0
OPTXL 1,1,1,1,1,1,1,0,0
OPTFL 1,0,1
OPTAX 8
OPTBL 0,(Data Sheet)<DATASHTS\PHILIPS\LPC2119_2129.PDF>
OPTBL 1,(User Manual)<DATASHTS\PHILIPS\user_manual_LPC2119_2129_2194_2292_2294.PDF>
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC21x9)(SARM.DLL)()(TARMP.DLL)(-pLPC21x9)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
OPTKEY 0,(DLGDARM)((134=-1,-1,-1,-1,0)(135=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)(108=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(80=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(112=-1,-1,-1,-1,0)(136=-1,-1,-1,-1,0)(117=-1,-1,-1,-1,0)(118=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(114=-1,-1,-1,-1,0)(119=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(115=-1,-1,-1,-1,0)(116=-1,-1,-1,-1,0))
OPTKEY 0,(ARMDBGFLAGS)(-T5F)
OPTBB 0,0,203,1,8560,0,0,0,0,1,<port.c>()()
OPTDF 0x86
OPTLE <>
OPTLC <>
EndOpt

@ -0,0 +1,2 @@
Dependencies for Project 'RTOSDemo', Target 'Target 1': (DO NOT MODIFY !)
F (.\Startup.s)(0x47F4A5D0)(--device DARMP -g --apcs=interwork -I "C:\Devtools\Keil305_2\ARM\INC\Philips" --list "Startup.lst" --xref -o "Startup.o")

@ -0,0 +1,115 @@
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RTOSDemo), 0x0004 // Tools: 'ARM-ADS'
Group (Other)
Group (FreeRTOS)
Group (Stadard Demo)
File 1,2,<.\Startup.s><Startup.s>
File 1,1,<.\ParTest\ParTest.c><ParTest.c>
File 1,1,<.\main.c><main.c>
File 1,1,<.\serial\serial.c><serial.c>
File 2,1,<..\..\Source\tasks.c><tasks.c>
File 2,1,<..\..\Source\list.c><list.c>
File 2,1,<..\..\Source\queue.c><queue.c>
File 2,1,<..\..\Source\portable\RVDS\ARM7_LPC21xx\port.c><port.c>
File 2,1,<..\..\Source\portable\MemMang\heap_2.c><heap_2.c>
File 2,2,<.\serial\serialISRE.s><serialISRE.s>
File 2,2,<..\..\Source\portable\RVDS\ARM7_LPC21xx\portASM.s><portASM.s>
File 3,1,<..\Common\Minimal\flash.c><flash.c>
File 3,1,<..\Common\Minimal\integer.c><integer.c>
File 3,1,<..\Common\Minimal\comtest.c><comtest.c>
Options 1,0,0 // Target 'RTOSDemo'
Device (LPC2129)
Vendor (NXP (founded by Philips))
Cpu (IRAM(0x40000000-0x40003FFF) IROM(0-0x3FFFF) CLOCK(12000000) CPUTYPE(ARM7TDMI))
FlashUt (LPC210x_ISP.EXE ("#H" ^X $D COM1: 9600 1))
StupF ("STARTUP\Philips\Startup.s" ("Philips LPC2100 Startup Code"))
FlashDR (UL2ARM(-U40296420 -O7 -C0 -FO7 -FD40000000 -FC800 -FN1 -FF0LPC_IAP_256 -FS00 -FL03E000))
DevID (3648)
Rgf (LPC21xx.H)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ÿPhilips\)
OrgReg (ÿPhilips\)
TgStat=16
OutDir (.\)
OutName (RTOSDemo)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP (ARM7TDMI)
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,64,0,64,0,0 }
OCMADSIROM { 1,0,0,0,0,0,0,4,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,64,0,64,0,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (ARM7_LPC21xx_KEIL_RVDS)
ADSCUDEF ()
ADSCINCD (.;..\..\Source\portable\RVDS\ARM7_LPC21xx;..\Common\include;..\..\Source\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD (..\..\Source\portable\RVDS\ARM7_LPC21xx)
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x00000000)
ADSLDDA (0x40000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDIF ()
ADSLDDW ()
OPTDL (SARM.DLL)(-cLPC2100)(DARMP.DLL)(-pLPC21x9)(SARM.DLL)()(TARMP.DLL)(-pLPC21x9)
OPTDBG 48125,0,()()()()()()()()()() (BIN\UL2ARM.DLL)()()()
FLASH1 { 2,0,0,0,0,0,0,0,255,255,255,255,0,0,0,0,0,0,0,0 }
FLASH2 ()
FLASH3 (LPC210x_ISP.EXE ("#H" ^X $D COM1: 9600 1))
FLASH4 ()
EndOpt

@ -0,0 +1,429 @@
;/*****************************************************************************/
;/* STARTUP.S: Startup file for Philips LPC2000 */
;/*****************************************************************************/
;/* <<< Use Configuration Wizard in Context Menu >>> */
;/*****************************************************************************/
;/* This file is part of the uVision/ARM development tools. */
;/* Copyright (c) 2005-2007 Keil Software. All rights reserved. */
;/* This software may only be used under the terms of a valid, current, */
;/* end user licence from KEIL for a compatible version of KEIL software */
;/* development tools. Nothing else gives you the right to use this software. */
;/*****************************************************************************/
;/*
; * The STARTUP.S code is executed after CPU Reset. This file may be
; * translated with the following SET symbols. In uVision these SET
; * symbols are entered under Options - ASM - Define.
; *
; * REMAP: when set the startup code initializes the register MEMMAP
; * which overwrites the settings of the CPU configuration pins. The
; * startup and interrupt vectors are remapped from:
; * 0x00000000 default setting (not remapped)
; * 0x80000000 when EXTMEM_MODE is used
; * 0x40000000 when RAM_MODE is used
; *
; * EXTMEM_MODE: when set the device is configured for code execution
; * from external memory starting at address 0x80000000.
; *
; * RAM_MODE: when set the device is configured for code execution
; * from on-chip RAM starting at address 0x40000000.
; *
; * EXTERNAL_MODE: when set the PIN2SEL values are written that enable
; * the external BUS at startup.
; */
; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
Mode_USR EQU 0x10
Mode_FIQ EQU 0x11
Mode_IRQ EQU 0x12
Mode_SVC EQU 0x13
Mode_ABT EQU 0x17
Mode_UND EQU 0x1B
Mode_SYS EQU 0x1F
I_Bit EQU 0x80 ; when I bit is set, IRQ is disabled
F_Bit EQU 0x40 ; when F bit is set, FIQ is disabled
;// <h> Stack Configuration (Stack Sizes in Bytes)
;// <o0> Undefined Mode <0x0-0xFFFFFFFF:8>
;// <o1> Supervisor Mode <0x0-0xFFFFFFFF:8>
;// <o2> Abort Mode <0x0-0xFFFFFFFF:8>
;// <o3> Fast Interrupt Mode <0x0-0xFFFFFFFF:8>
;// <o4> Interrupt Mode <0x0-0xFFFFFFFF:8>
;// <o5> User/System Mode <0x0-0xFFFFFFFF:8>
;// </h>
UND_Stack_Size EQU 0x00000008
SVC_Stack_Size EQU 0x00000400
ABT_Stack_Size EQU 0x00000008
FIQ_Stack_Size EQU 0x00000008
IRQ_Stack_Size EQU 0x00000400
USR_Stack_Size EQU 0x00000008
ISR_Stack_Size EQU (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
FIQ_Stack_Size + IRQ_Stack_Size)
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE USR_Stack_Size
__initial_sp SPACE ISR_Stack_Size
Stack_Top
;// <h> Heap Configuration
;// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF>
;// </h>
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
; VPBDIV definitions
VPBDIV EQU 0xE01FC100 ; VPBDIV Address
;// <e> VPBDIV Setup
;// <i> Peripheral Bus Clock Rate
;// <o1.0..1> VPBDIV: VPB Clock
;// <0=> VPB Clock = CPU Clock / 4
;// <1=> VPB Clock = CPU Clock
;// <2=> VPB Clock = CPU Clock / 2
;// <o1.4..5> XCLKDIV: XCLK Pin
;// <0=> XCLK Pin = CPU Clock / 4
;// <1=> XCLK Pin = CPU Clock
;// <2=> XCLK Pin = CPU Clock / 2
;// </e>
VPBDIV_SETUP EQU 0
VPBDIV_Val EQU 0x00000000
; Phase Locked Loop (PLL) definitions
PLL_BASE EQU 0xE01FC080 ; PLL Base Address
PLLCON_OFS EQU 0x00 ; PLL Control Offset
PLLCFG_OFS EQU 0x04 ; PLL Configuration Offset
PLLSTAT_OFS EQU 0x08 ; PLL Status Offset
PLLFEED_OFS EQU 0x0C ; PLL Feed Offset
PLLCON_PLLE EQU (1<<0) ; PLL Enable
PLLCON_PLLC EQU (1<<1) ; PLL Connect
PLLCFG_MSEL EQU (0x1F<<0) ; PLL Multiplier
PLLCFG_PSEL EQU (0x03<<5) ; PLL Divider
PLLSTAT_PLOCK EQU (1<<10) ; PLL Lock Status
;// <e> PLL Setup
;// <o1.0..4> MSEL: PLL Multiplier Selection
;// <1-32><#-1>
;// <i> M Value
;// <o1.5..6> PSEL: PLL Divider Selection
;// <0=> 1 <1=> 2 <2=> 4 <3=> 8
;// <i> P Value
;// </e>
PLL_SETUP EQU 1
PLLCFG_Val EQU 0x00000024
; Memory Accelerator Module (MAM) definitions
MAM_BASE EQU 0xE01FC000 ; MAM Base Address
MAMCR_OFS EQU 0x00 ; MAM Control Offset
MAMTIM_OFS EQU 0x04 ; MAM Timing Offset
;// <e> MAM Setup
;// <o1.0..1> MAM Control
;// <0=> Disabled
;// <1=> Partially Enabled
;// <2=> Fully Enabled
;// <i> Mode
;// <o2.0..2> MAM Timing
;// <0=> Reserved <1=> 1 <2=> 2 <3=> 3
;// <4=> 4 <5=> 5 <6=> 6 <7=> 7
;// <i> Fetch Cycles
;// </e>
MAM_SETUP EQU 1
MAMCR_Val EQU 0x00000002
MAMTIM_Val EQU 0x00000004
; External Memory Controller (EMC) definitions
EMC_BASE EQU 0xFFE00000 ; EMC Base Address
BCFG0_OFS EQU 0x00 ; BCFG0 Offset
BCFG1_OFS EQU 0x04 ; BCFG1 Offset
BCFG2_OFS EQU 0x08 ; BCFG2 Offset
BCFG3_OFS EQU 0x0C ; BCFG3 Offset
;// <e> External Memory Controller (EMC)
EMC_SETUP EQU 0
;// <e> Bank Configuration 0 (BCFG0)
;// <o1.0..3> IDCY: Idle Cycles <0-15>
;// <o1.5..9> WST1: Wait States 1 <0-31>
;// <o1.11..15> WST2: Wait States 2 <0-31>
;// <o1.10> RBLE: Read Byte Lane Enable
;// <o1.26> WP: Write Protect
;// <o1.27> BM: Burst ROM
;// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
;// <2=> 32-bit <3=> Reserved
;// </e>
BCFG0_SETUP EQU 0
BCFG0_Val EQU 0x0000FBEF
;// <e> Bank Configuration 1 (BCFG1)
;// <o1.0..3> IDCY: Idle Cycles <0-15>
;// <o1.5..9> WST1: Wait States 1 <0-31>
;// <o1.11..15> WST2: Wait States 2 <0-31>
;// <o1.10> RBLE: Read Byte Lane Enable
;// <o1.26> WP: Write Protect
;// <o1.27> BM: Burst ROM
;// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
;// <2=> 32-bit <3=> Reserved
;// </e>
BCFG1_SETUP EQU 0
BCFG1_Val EQU 0x0000FBEF
;// <e> Bank Configuration 2 (BCFG2)
;// <o1.0..3> IDCY: Idle Cycles <0-15>
;// <o1.5..9> WST1: Wait States 1 <0-31>
;// <o1.11..15> WST2: Wait States 2 <0-31>
;// <o1.10> RBLE: Read Byte Lane Enable
;// <o1.26> WP: Write Protect
;// <o1.27> BM: Burst ROM
;// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
;// <2=> 32-bit <3=> Reserved
;// </e>
BCFG2_SETUP EQU 0
BCFG2_Val EQU 0x0000FBEF
;// <e> Bank Configuration 3 (BCFG3)
;// <o1.0..3> IDCY: Idle Cycles <0-15>
;// <o1.5..9> WST1: Wait States 1 <0-31>
;// <o1.11..15> WST2: Wait States 2 <0-31>
;// <o1.10> RBLE: Read Byte Lane Enable
;// <o1.26> WP: Write Protect
;// <o1.27> BM: Burst ROM
;// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit
;// <2=> 32-bit <3=> Reserved
;// </e>
BCFG3_SETUP EQU 0
BCFG3_Val EQU 0x0000FBEF
;// </e> End of EMC
; External Memory Pins definitions
PINSEL2 EQU 0xE002C014 ; PINSEL2 Address
PINSEL2_Val EQU 0x0E6149E4 ; CS0..3, OE, WE, BLS0..3,
; D0..31, A2..23, JTAG Pins
PRESERVE8
; Area Definition and Entry Point
; Startup Code must be linked first at Address at which it expects to run.
AREA RESET, CODE, READONLY
ARM
; Exception Vectors
; Mapped to Address 0.
; Absolute addressing mode must be used.
; Dummy Handlers are implemented as infinite loops which can be modified.
IMPORT vPortYieldProcessor
Vectors LDR PC, Reset_Addr
LDR PC, Undef_Addr
LDR PC, SWI_Addr
LDR PC, PAbt_Addr
LDR PC, DAbt_Addr
NOP ; Reserved Vector
; LDR PC, IRQ_Addr
LDR PC, [PC, #-0x0FF0] ; Vector from VicVectAddr
LDR PC, FIQ_Addr
Reset_Addr DCD Reset_Handler
Undef_Addr DCD Undef_Handler
SWI_Addr DCD vPortYieldProcessor
PAbt_Addr DCD PAbt_Handler
DAbt_Addr DCD DAbt_Handler
DCD 0 ; Reserved Address
IRQ_Addr DCD IRQ_Handler
FIQ_Addr DCD FIQ_Handler
Undef_Handler B Undef_Handler
SWI_Handler B SWI_Handler
PAbt_Handler B PAbt_Handler
DAbt_Handler B DAbt_Handler
IRQ_Handler B IRQ_Handler
FIQ_Handler B FIQ_Handler
; Reset Handler
EXPORT Reset_Handler
Reset_Handler
; Setup External Memory Pins
IF :DEF:EXTERNAL_MODE
LDR R0, =PINSEL2
LDR R1, =PINSEL2_Val
STR R1, [R0]
ENDIF
; Setup External Memory Controller
IF EMC_SETUP <> 0
LDR R0, =EMC_BASE
IF BCFG0_SETUP <> 0
LDR R1, =BCFG0_Val
STR R1, [R0, #BCFG0_OFS]
ENDIF
IF BCFG1_SETUP <> 0
LDR R1, =BCFG1_Val
STR R1, [R0, #BCFG1_OFS]
ENDIF
IF BCFG2_SETUP <> 0
LDR R1, =BCFG2_Val
STR R1, [R0, #BCFG2_OFS]
ENDIF
IF BCFG3_SETUP <> 0
LDR R1, =BCFG3_Val
STR R1, [R0, #BCFG3_OFS]
ENDIF
ENDIF ; EMC_SETUP
; Setup VPBDIV
IF VPBDIV_SETUP <> 0
LDR R0, =VPBDIV
LDR R1, =VPBDIV_Val
STR R1, [R0]
ENDIF
; Setup PLL
IF PLL_SETUP <> 0
LDR R0, =PLL_BASE
MOV R1, #0xAA
MOV R2, #0x55
; Configure and Enable PLL
MOV R3, #PLLCFG_Val
STR R3, [R0, #PLLCFG_OFS]
MOV R3, #PLLCON_PLLE
STR R3, [R0, #PLLCON_OFS]
STR R1, [R0, #PLLFEED_OFS]
STR R2, [R0, #PLLFEED_OFS]
; Wait until PLL Locked
PLL_Loop LDR R3, [R0, #PLLSTAT_OFS]
ANDS R3, R3, #PLLSTAT_PLOCK
BEQ PLL_Loop
; Switch to PLL Clock
MOV R3, #(PLLCON_PLLE:OR:PLLCON_PLLC)
STR R3, [R0, #PLLCON_OFS]
STR R1, [R0, #PLLFEED_OFS]
STR R2, [R0, #PLLFEED_OFS]
ENDIF ; PLL_SETUP
; Setup MAM
IF MAM_SETUP <> 0
LDR R0, =MAM_BASE
MOV R1, #MAMTIM_Val
STR R1, [R0, #MAMTIM_OFS]
MOV R1, #MAMCR_Val
STR R1, [R0, #MAMCR_OFS]
ENDIF ; MAM_SETUP
; Memory Mapping (when Interrupt Vectors are in RAM)
MEMMAP EQU 0xE01FC040 ; Memory Mapping Control
IF :DEF:REMAP
LDR R0, =MEMMAP
IF :DEF:EXTMEM_MODE
MOV R1, #3
ELIF :DEF:RAM_MODE
MOV R1, #2
ELSE
MOV R1, #1
ENDIF
STR R1, [R0]
ENDIF
; Initialise Interrupt System
; ...
; Setup Stack for each mode
LDR R0, =Stack_Top
; Enter Undefined Instruction Mode and set its Stack Pointer
MSR CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
MOV SP, R0
SUB R0, R0, #UND_Stack_Size
; Enter Abort Mode and set its Stack Pointer
MSR CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit
MOV SP, R0
SUB R0, R0, #ABT_Stack_Size
; Enter FIQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
MOV SP, R0
SUB R0, R0, #FIQ_Stack_Size
; Enter IRQ Mode and set its Stack Pointer
MSR CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
MOV SP, R0
SUB R0, R0, #IRQ_Stack_Size
; Enter Supervisor Mode and set its Stack Pointer
MSR CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
MOV SP, R0
SUB R0, R0, #SVC_Stack_Size
; Enter the C code
IMPORT __main
LDR R0, =__main
BX R0
IF :DEF:__MICROLIB
EXPORT __heap_base
EXPORT __heap_limit
ELSE
; User Initial Stack & Heap
AREA |.text|, CODE, READONLY
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + USR_Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDIF
END

@ -0,0 +1,301 @@
/*
FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "partest.h"
#include "flash.h"
#include "integer.h"
#include "comtest2.h"
#include "serial.h"
#ifdef KEIL_THUMB_INTERWORK
/*
THUMB mode allows more tasks to be created without the executable
binary exceeding the limits allowed by the evaluation version of
uVision3.
*/
#include "PollQ.h"
#include "BlockQ.h"
#include "semtest.h"
#include "dynamic.h"
#endif /* KEIL_THUMB_INTERWORK */
/*-----------------------------------------------------------*/
/* Constants to setup I/O and processor. */
#define mainTX_ENABLE ( ( unsigned portLONG ) 0x0001 )
#define mainRX_ENABLE ( ( unsigned portLONG ) 0x0004 )
#define mainBUS_CLK_FULL ( ( unsigned portCHAR ) 0x01 )
#define mainLED_TO_OUTPUT ( ( unsigned portLONG ) 0xff0000 )
/* Constants for the ComTest demo application tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 115200 )
#define mainCOM_TEST_LED ( 3 )
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
/* Constants used by the "check" task. As described at the head of this file
the check task toggles an LED. The rate at which the LED flashes is used to
indicate whether an error has been detected or not. If the LED toggles every
3 seconds then no errors have been detected. If the rate increases to 500ms
then an error has been detected in at least one of the demo application tasks. */
#define mainCHECK_LED ( 7 )
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
/*-----------------------------------------------------------*/
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static portLONG prvCheckOtherTasksAreStillRunning( void );
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Configure the processor for use with the Keil demo board. This is very
* minimal as most of the setup is managed by the settings in the project
* file.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/*
* Application entry point:
* Starts all the other tasks, then starts the scheduler.
*/
int main( void )
{
/* Setup the hardware for use with the Keil demo board. */
prvSetupHardware();
/* Start the demo/test application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
#ifdef KEIL_THUMB_INTERWORK
/* When using THUMB mode we can start more tasks without the executable
exceeding the size limit imposed by the evaluation version of uVision3. */
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
#endif
/* Start the check task - which is defined in this file. This is the task
that periodically checks to see that all the other tasks are executing
without error. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Now all the tasks have been started - start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* Should never reach here! If you do then there was not enough heap
available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
/* Parameters are not used. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase.
This task runs at the highest priority. */
for( ;; )
{
/* The period of the delay depends on whether an error has been
detected or not. If an error has been detected then the period
is reduced to increase the LED flash rate. */
vTaskDelay( xDelayPeriod );
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* Toggle the LED before going back to wait for the next cycle. */
vParTestToggleLED( mainCHECK_LED );
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* Perform the hardware setup required. This is minimal as most of the
setup is managed by the settings in the project file. */
/* Configure the RS2332 pins. All other pins remain at their default of 0. */
PINSEL0 |= mainTX_ENABLE;
PINSEL0 |= mainRX_ENABLE;
/* LED pins need to be output. */
IODIR1 = mainLED_TO_OUTPUT;
/* Setup the peripheral bus to be the same as the PLL output. */
VPBDIV = mainBUS_CLK_FULL;
}
/*-----------------------------------------------------------*/
static portLONG prvCheckOtherTasksAreStillRunning( void )
{
portLONG lReturn = pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdPASS )
{
lReturn = pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdPASS )
{
lReturn = pdFAIL;
}
#ifdef KEIL_THUMB_INTERWORK
/* When using THUMB mode we can start more tasks without the executable
exceeding the size limit imposed by the evaluation version of uVision3. */
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = pdFAIL;
}
#endif
return lReturn;
}
/*-----------------------------------------------------------*/

@ -0,0 +1,324 @@
/*
FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
Note this driver is used to test the FreeRTOS port. It is NOT intended to
be an example of an efficient implementation!
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define serDLAB ( ( unsigned portCHAR ) 0x80 )
#define serENABLE_INTERRUPTS ( ( unsigned portCHAR ) 0x03 )
#define serNO_PARITY ( ( unsigned portCHAR ) 0x00 )
#define ser1_STOP_BIT ( ( unsigned portCHAR ) 0x00 )
#define ser8_BIT_CHARS ( ( unsigned portCHAR ) 0x03 )
#define serFIFO_ON ( ( unsigned portCHAR ) 0x01 )
#define serCLEAR_FIFO ( ( unsigned portCHAR ) 0x06 )
#define serWANTED_CLOCK_SCALING ( ( unsigned portLONG ) 16 )
/* Constants to setup and access the VIC. */
#define serU0VIC_CHANNEL ( ( unsigned portLONG ) 0x0006 )
#define serU0VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0040 )
#define serU0VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
/* Misc. */
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/* Constant to access the VIC. */
#define serCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned portCHAR ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned portCHAR ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned portCHAR ) 0x06 )
#define serSOURCE_RX ( ( unsigned portCHAR ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned portCHAR ) 0x0f )
/*-----------------------------------------------------------*/
/*
* The asm wrapper for the interrupt service routine.
*/
extern void vUART_ISREntry(void);
/*
* The C function called from the asm wrapper.
*/
void vUART_ISRHandler( void );
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/* Communication flag between the interrupt service routine and serial API. */
static volatile portLONG lTHREEmpty;
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned portLONG ulDivisor, ulWantedClock;
xComPortHandle xReturn = serHANDLE;
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
/* Initialise the THRE empty flag. */
lTHREEmpty = pdTRUE;
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned portLONG ) 0 )
)
{
portENTER_CRITICAL()
{
/* Setup the baud rate: Calculate the divisor value. */
ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
/* Set the DLAB bit so we can access the divisor. */
U0LCR |= serDLAB;
/* Setup the divisor. */
U0DLL = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
ulDivisor >>= 8;
U0DLM = ( unsigned portCHAR ) ( ulDivisor & ( unsigned portLONG ) 0xff );
/* Turn on the FIFO's and clear the buffers. */
U0FCR = ( serFIFO_ON | serCLEAR_FIFO );
/* Setup transmission format. */
U0LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
/* Setup the VIC for the UART. */
VICIntSelect &= ~( serU0VIC_CHANNEL_BIT );
VICIntEnable |= serU0VIC_CHANNEL_BIT;
VICVectAddr1 = ( unsigned portLONG ) vUART_ISREntry;
VICVectCntl1 = serU0VIC_CHANNEL | serU0VIC_ENABLE;
/* Enable UART0 interrupts. */
U0IER |= serENABLE_INTERRUPTS;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
( void ) usStringLength;
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
signed portBASE_TYPE xReturn;
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
portENTER_CRITICAL();
{
/* Is there space to write directly to the UART? */
if( lTHREEmpty == ( portLONG ) pdTRUE )
{
/* We wrote the character directly to the UART, so was
successful. */
lTHREEmpty = pdFALSE;
U0THR = cOutChar;
xReturn = pdPASS;
}
else
{
/* We cannot write directly to the UART, so queue the character.
Block for a maximum of xBlockTime if there is no space in the
queue. It is ok to block within a critical section as each
task has it's own critical section management. */
xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
/* Depending on queue sizing and task prioritisation: While we
were blocked waiting to post interrupts were not disabled. It is
possible that the serial ISR has emptied the Tx queue, in which
case we need to start the Tx off again. */
if( lTHREEmpty == ( portLONG ) pdTRUE )
{
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
lTHREEmpty = pdFALSE;
U0THR = cOutChar;
}
}
}
portEXIT_CRITICAL();
return xReturn;
}
/*-----------------------------------------------------------*/
void vUART_ISRHandler( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByRx, xTaskWokenByTx;
xTaskWokenByTx = pdFALSE;
xTaskWokenByRx = pdFALSE;
/* What caused the interrupt? */
switch( U0IIR & serINTERRUPT_SOURCE_MASK )
{
case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
cChar = U0LSR;
break;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
{
U0THR = cChar;
}
else
{
/* There are no further characters
queued to send so we can indicate
that the THRE is available. */
lTHREEmpty = pdTRUE;
}
break;
case serSOURCE_RX_TIMEOUT :
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = U0RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
break;
default : /* There is nothing to do, leave the ISR. */
break;
}
/* Clear the ISR in the VIC. */
VICVectAddr = serCLEAR_VIC_INTERRUPT;
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
}
/*-----------------------------------------------------------*/

@ -0,0 +1,85 @@
;/*
; FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
;
; This file is part of the FreeRTOS.org distribution.
;
; FreeRTOS.org is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; (at your option) any later version.
;
; FreeRTOS.org is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with FreeRTOS.org; if not, write to the Free Software
; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
;
; A special exception to the GPL can be applied should you wish to distribute
; a combined work that includes FreeRTOS.org, without being obliged to provide
; the source code for any proprietary components. See the licensing section
; of http://www.FreeRTOS.org for full details of how and when the exception
; can be applied.
;
; ***************************************************************************
; ***************************************************************************
; * *
; * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
; * and even write all or part of your application on your behalf. *
; * See http://www.OpenRTOS.com for details of the services we provide to *
; * expedite your project. *
; * *
; ***************************************************************************
; ***************************************************************************
;
; Please ensure to read the configuration and relevant port sections of the
; online documentation.
;
; http://www.FreeRTOS.org - Documentation, latest information, license and
; contact details.
;
; http://www.SafeRTOS.com - A version that is certified for use in safety
; critical systems.
;
; http://www.OpenRTOS.com - Commercial support, development, porting,
; licensing and training services.
;*/
INCLUDE portmacro.inc
;The UART interrupt entry point is defined within an assembly wrapper
;within this file. This takes care of the task context saving before it
;calls the main handler (vUART_ISRHandler()) which is written in C within
;serial.c. The execution of the handler can unblock tasks that were blocked
;waiting for UART events. Once the handler completes the asm wrapper
;finishes off by restoring the context of whichever task is now selected to
;enter the RUNNING state (which might now be a different task to that which
;was originally interrupted.
IMPORT vUART_ISRHandler
EXPORT vUART_ISREntry
;/* Interrupt entry must always be in ARM mode. */
AREA |.text|, CODE, READONLY
ARM
PRESERVE8
vUART_ISREntry
; Save the context of the interrupted task.
portSAVE_CONTEXT
; Call the C handler function - defined within serial.c.
LDR R0, =vUART_ISRHandler
MOV LR, PC
BX R0
; Finish off by restoring the context of the task that has been chosen to
; run next - which might be a different task to that which was originally
; interrupted.
portRESTORE_CONTEXT
END
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