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@ -59,12 +59,11 @@
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.extern pxCurrentTCB
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.extern uxCriticalNesting
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.extern vTaskSwitchContext
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.extern vTaskIncrementTick
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.extern vApplicationGeneralExceptionHandler
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.extern vPortIncrementTick
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.extern xISRStackTop
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.global vPortStartFirstTask
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.global _general_exception_context
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.global vPortYieldISR
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.global vT1InterruptHandler
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@ -79,21 +78,9 @@ vT1InterruptHandler:
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portSAVE_CONTEXT
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jal vTaskIncrementTick
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jal vPortIncrementTick
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nop
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/* If we are using the preemptive scheduler then we might want to select
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a different task to execute. */
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#if configUSE_PREEMPTION == 1
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jal vTaskSwitchContext
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nop
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#endif /* configUSE_PREEMPTION */
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/* Clear timer 0 interrupt. */
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la s1, IFS0CLR
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addiu s0,zero,_IFS0_T1IF_MASK
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sw s0, 0(s1)
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portRESTORE_CONTEXT
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.end vT1InterruptHandler
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@ -113,58 +100,214 @@ vPortStartFirstTask:
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.end xPortStartScheduler
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/*******************************************************************/
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.section .FreeRTOS, "ax", @progbits
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.set noreorder
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.set noat
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.ent _general_exception_context
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.ent vPortYieldISR
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vPortYieldISR:
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/* Make room for the context. First save the current status so we can
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manipulate it, and the cause and EPC registers so we capture their
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original values in case of interrupt nesting. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so we can use them during this interrupt. Any
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nesting interrupts should maintain the values of these registers
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accross the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Enable interrupts above the current priority. */
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srl k0, k0, 0xa
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ins k1, k0, 10, 6
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ins k1, zero, 1, 4
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* Swap to the system stack. This is not conditional on the nesting
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count as this interrupt is always the lowest priority and therefore
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the nesting is always 0. */
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la sp, xISRStackTop
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lw sp, (sp)
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/* Increment and save the nesting count in case this gets preempted. */
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la k0, uxInterruptNesting
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lw s6, (k0)
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addiu s6, s6, 1
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sw s6, 0(k0)
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/* s6 holds the EPC value, this is saved with the rest of the context
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after interrupts are enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. */
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sw ra, 120(s5)
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sw s8, 116(s5)
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sw t9, 112(s5)
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sw t8, 108(s5)
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sw t7, 104(s5)
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sw t6, 100(s5)
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sw t5, 96(s5)
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sw t4, 92(s5)
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sw t3, 88(s5)
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sw t2, 84(s5)
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sw t1, 80(s5)
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sw t0, 76(s5)
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sw a3, 72(s5)
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sw a2, 68(s5)
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sw a1, 64(s5)
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sw a0, 60(s5)
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sw v1, 56(s5)
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sw v0, 52(s5)
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sw s7, 48(s5)
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sw s6, portEPC_STACK_LOCATION(s5)
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/* s5 and s6 has already been saved. */
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sw s4, 36(s5)
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sw s3, 32(s5)
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sw s2, 28(s5)
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sw s1, 24(s5)
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sw s0, 20(s5)
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sw $1, 16(s5)
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/* s7 is used as a scratch register as this should always be saved across
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nesting interrupts. */
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mfhi s7
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sw s7, 12(s5)
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mflo s7
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sw s7, 8(s5)
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/* Each task maintains its own nesting count. */
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la s7, uxCriticalNesting
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lw s7, (s7)
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sw s7, 4(s5)
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/* Save the stack pointer to the task. */
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la s7, pxCurrentTCB
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lw s7, (s7)
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sw s5, (s7)
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/* Set the interrupt mask to the max priority that can use the API. */
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di
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mfc0 s7, _CP0_STATUS
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ori s7, s7, 1
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ori s6, s7, configMAX_SYSCALL_INTERRUPT_PRIORITY << 10
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_general_exception_context:
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/* This mtc0 re-enables interrupts, but only above
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configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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mtc0 s6, _CP0_STATUS
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/* Save the context of the current task. */
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portSAVE_CONTEXT
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/* Clear the software interrupt in the core. */
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mfc0 s6, _CP0_CAUSE
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addiu s4,zero,-257
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and s6, s6, s4
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mtc0 s6, _CP0_CAUSE
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/* Was this handler caused by a syscall? The original Cause
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value was saved to the stack as it could change as interrupts
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nest. Use of k registers must be protected from use by nesting
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interrupts. */
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lw s7, portCAUSE_STACK_LOCATION(s5)
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andi s7, s7, portEXC_CODE_MASK
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addi s7, s7, -( _EXCCODE_SYS << 2 )
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/* Clear the interrupt in the interrupt controller. */
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la s6, IFS0CLR
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addiu s4, zero, 2
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sw s4, (s6)
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/* Yes - call the SYSCALL handler to select a new task to execute. */
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beq s7, zero, SyscallHandler
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jal vTaskSwitchContext
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nop
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/* No - call the application handler to handle all other types of
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exception. Pass the status and cause to the application provided
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handler. Interrupts are disabled during the execution of the user
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defined handler. */
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/* Clear the interrupt mask again. The saved status value is still in s7. */
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mtc0 s7, _CP0_STATUS
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/* Restore the stack pointer from the TCB. */
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la s0, pxCurrentTCB
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lw s0, (s0)
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lw s5, (s0)
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/* Restore the rest of the context. */
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lw s0, 8(s5)
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mtlo s0
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lw s0, 12(s5)
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mthi s0
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lw $1, 16(s5)
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lw s0, 20(s5)
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lw s1, 24(s5)
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lw s2, 28(s5)
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lw s3, 32(s5)
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lw s4, 36(s5)
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/* s5 is loaded later. */
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lw s6, 44(s5)
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lw s7, 48(s5)
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lw v0, 52(s5)
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lw v1, 56(s5)
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lw a0, 60(s5)
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lw a1, 64(s5)
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lw a2, 68(s5)
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lw a3, 72(s5)
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lw t0, 76(s5)
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lw t1, 80(s5)
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lw t2, 84(s5)
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lw t3, 88(s5)
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lw t4, 92(s5)
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lw t5, 96(s5)
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lw t6, 100(s5)
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lw t7, 104(s5)
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lw t8, 108(s5)
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lw t9, 112(s5)
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lw s8, 116(s5)
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lw ra, 120(s5)
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/* Protect access to the k registers, and others. */
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di
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lw a1, portSTATUS_STACK_LOCATION(s5)
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lw a0, portCAUSE_STACK_LOCATION(s5)
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jal vApplicationGeneralExceptionHandler
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/* Decrement the nesting count. */
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la k0, uxInterruptNesting
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lw k1, (k0)
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addiu k1, k1, -1
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sw k1, 0(k0)
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/* Switch back to use the real stack pointer. */
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add sp, zero, s5
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/* Restore the critical nesting depth. */
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la s5, uxCriticalNesting
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lw k0, 4(sp)
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sw k0, (s5)
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/* If the critical nesting is not zero and a yield is not pended
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then set status as if within a critical section. */
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lw s5, portSTATUS_STACK_LOCATION(sp)
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beq k0, zero, .+28
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nop
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ei
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beq zero, zero, FinishExceptionHandler
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mfc0 k1, _CP0_CAUSE
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andi k1, k1, 256
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bne k1, zero, .+12
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nop
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or s5, s5, (configMAX_SYSCALL_INTERRUPT_PRIORITY<<10)
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SyscallHandler:
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lw k0, portEPC_STACK_LOCATION(sp)
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/* Adjust the return that was placed onto the stack to be the
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address of the instruction following the syscall. s6 already
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contains the EPC value. */
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addi s6, 4
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sw s6, portEPC_STACK_LOCATION(s5)
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mtc0 s5, _CP0_STATUS
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ehb
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jal vTaskSwitchContext
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nop
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/* Restore the real s5 value. */
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lw s5, 40(sp)
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FinishExceptionHandler:
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portRESTORE_CONTEXT
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/* Remove stack frame. */
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k0, _CP0_EPC
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eret
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nop
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.end _general_exception_context
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.end vPortYieldISR
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Richard Barry
17 years ago