Add RX100 Renesas compiler port layer.
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74290b4425
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a69933782d
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/*
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FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS tutorial books are available in pdf and paperback. *
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* Complete, revised, and edited pdf reference manuals are also *
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* available. *
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* *
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* Purchasing FreeRTOS documentation will not only help you, by *
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* ensuring you get running as quickly as possible and with an *
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* in-depth knowledge of how to use FreeRTOS, it will also help *
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* the FreeRTOS project to continue with its mission of providing *
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* professional grade, cross platform, de facto standard solutions *
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* for microcontrollers - completely free of charge! *
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* *
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* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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* *
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* Thank you for using FreeRTOS, and thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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distribute a combined work that includes FreeRTOS without being obliged to
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provide the source code for proprietary components outside of the FreeRTOS
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kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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details. You should have received a copy of the GNU General Public License
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and the FreeRTOS license exception along with FreeRTOS; if not itcan be
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viewed here: http://www.freertos.org/a00114.html and also obtained by
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writing to Real Time Engineers Ltd., contact details for whom are available
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on the FreeRTOS WEB site.
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, and our new
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fully thread aware and reentrant UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems, who sell the code with commercial support,
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indemnification and middleware, under the OpenRTOS brand.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the RX100 port.
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*----------------------------------------------------------*/
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/* Standard C includes. */
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#include "limits.h"
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Library includes. */
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#include "string.h"
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/* Hardware specifics. */
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#include "iodefine.h"
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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/* The peripheral clock is divided by this value before being supplying the
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CMT. */
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#if ( configUSE_TICKLESS_IDLE == 0 )
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/* If tickless idle is not used then the divisor can be fixed. */
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#define portCLOCK_DIVISOR 8UL
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#elif ( configPERIPHERAL_CLOCK_HZ >= 12000000 )
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#define portCLOCK_DIVISOR 512UL
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#elif ( configPERIPHERAL_CLOCK_HZ >= 6000000 )
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#define portCLOCK_DIVISOR 128UL
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#elif ( configPERIPHERAL_CLOCK_HZ >= 1000000 )
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#define portCLOCK_DIVISOR 32UL
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#else
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#define portCLOCK_DIVISOR 8UL
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#endif
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/* Keys required to lock and unlock access to certain system registers
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respectively. */
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#define portUNLOCK_KEY 0xA50B
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#define portLOCK_KEY 0xA500
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/*-----------------------------------------------------------*/
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/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
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and therefore installed in the vector table, when the FreeRTOS code is built
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as a library. */
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extern portBASE_TYPE vSoftwareInterruptEntry;
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const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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/*-----------------------------------------------------------*/
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/*
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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static void prvStartFirstTask( void );
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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* restoring of registers). Written in asm code as direct register access is
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* required.
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*/
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static void prvYieldHandler( void );
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/*
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* The entry point for the software interrupt handler. This is the function
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* that calls the inline asm function prvYieldHandler(). It is installed in
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* the vector table, but the code that installs it is in prvYieldHandler rather
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* than using a #pragma.
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*/
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void vSoftwareInterruptISR( void );
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/*
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* Sets up the periodic ISR used for the RTOS tick using the CMT.
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* The application writer can define configSETUP_TICK_INTERRUPT() (in
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* FreeRTOSConfig.h) such that their own tick interrupt configuration is used
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* in place of prvSetupTimerInterrupt().
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*/
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static void prvSetupTimerInterrupt( void );
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#ifndef configSETUP_TICK_INTERRUPT
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/* The user has not provided their own tick interrupt configuration so use
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the definition in this file (which uses the interval timer). */
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#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
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#endif /* configSETUP_TICK_INTERRUPT */
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/*
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* Called after the sleep mode registers have been configured, prvSleep()
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* executes the pre and post sleep macros, and actually calls the wait
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* instruction.
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*/
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#if configUSE_TICKLESS_IDLE == 1
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static void prvSleep( portTickType xExpectedIdleTime );
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#endif /* configUSE_TICKLESS_IDLE */
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/*-----------------------------------------------------------*/
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/* These is accessed by the inline assembler functions. */
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extern void *pxCurrentTCB;
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extern void vTaskSwitchContext( void );
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/*-----------------------------------------------------------*/
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/* Calculate how many clock increments make up a single tick period. */
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static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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#if configUSE_TICKLESS_IDLE == 1
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/* Holds the maximum number of ticks that can be suppressed - which is
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basically how far into the future an interrupt can be generated. Set
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during initialisation. This is the maximum possible value that the
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compare match register can hold divided by ulMatchValueForOneTick. */
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static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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/* Flag set from the tick interrupt to allow the sleep processing to know if
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sleep mode was exited because of a tick interrupt, or an interrupt
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generated by something else. */
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static volatile uint32_t ulTickFlag = pdFALSE;
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/* The CMT counter is stopped temporarily each time it is re-programmed.
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The following constant offsets the CMT counter match value by the number of
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CMT counts that would typically be missed while the counter was stopped to
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compensate for the lost time. The large difference between the divided CMT
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clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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equal zero - and be optimised away. */
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static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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#endif
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* Offset to end up on 8 byte boundary. */
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pxTopOfStack--;
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/* R0 is not included as it is the stack pointer. */
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*pxTopOfStack = 0x00;
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pxTopOfStack--;
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*pxTopOfStack = 0x00;
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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value. Otherwise code space can be saved by just setting the registers
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that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* r15. */
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaabbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xdddddddd;
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pxTopOfStack--;
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*pxTopOfStack = 0xcccccccc;
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pxTopOfStack--;
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*pxTopOfStack = 0xbbbbbbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaaaaaa;
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pxTopOfStack--;
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*pxTopOfStack = 0x99999999;
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pxTopOfStack--;
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*pxTopOfStack = 0x88888888;
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pxTopOfStack--;
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*pxTopOfStack = 0x77777777;
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666;
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555;
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444;
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333;
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else
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{
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/* Leave space for the registers that will get popped from the stack
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when the task first starts executing. */
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pxTopOfStack -= 15;
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}
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#endif
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* Accumulator. */
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pxTopOfStack--;
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*pxTopOfStack = 0x87654321; /* Accumulator. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate
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the tick interrupt. This way the application can decide which
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peripheral to use. If tickless mode is used then the default
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implementation defined in this file (which uses CMT0) should not be
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overridden. */
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configSETUP_TICK_INTERRUPT();
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/* Enable the software interrupt. */
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_IEN( _ICU_SWINT ) = 1;
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/* Ensure the software interrupt is clear. */
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_IR( _ICU_SWINT ) = 0;
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Execution should not reach here as the tasks are now running!
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prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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a warning about a statically declared function not being referenced in the
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case that the application writer has provided their own tick interrupt
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configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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their own routine will be called in place of prvSetupTimerInterrupt()). */
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prvSetupTimerInterrupt();
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/* Just to make sure the function is not optimised away. */
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( void ) vSoftwareInterruptISR();
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/* Should not get here. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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#pragma inline_asm prvStartFirstTask
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static void prvStartFirstTask( void )
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{
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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SETPSW U
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [R15], R15
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MOV.L [R15], R0
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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POP R15
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MVTACLO R15 /* Accumulator low 32 bits. */
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POP R15
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MVTACHI R15 /* Accumulator high 32 bits. */
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POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
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RTE /* This pops the remaining registers. */
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NOP
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NOP
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}
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/*-----------------------------------------------------------*/
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#pragma interrupt ( prvTickISR( vect = configTICK_VECTOR, enable ) )
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void prvTickISR( void )
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{
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/* Increment the tick, and perform any processing the new tick value
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necessitates. */
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set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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{
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vTaskIncrementTick();
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}
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set_ipl( configKERNEL_INTERRUPT_PRIORITY );
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/* Only select a new task if the preemptive scheduler is being used. */
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#if( configUSE_PREEMPTION == 1 )
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{
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taskYIELD();
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}
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#endif
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#if configUSE_TICKLESS_IDLE == 1
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{
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/* The CPU woke because of a tick. */
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ulTickFlag = pdTRUE;
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/* If this is the first tick since exiting tickless mode then the CMT
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compare match value needs resetting. */
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CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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}
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#endif
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}
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/*-----------------------------------------------------------*/
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void vSoftwareInterruptISR( void )
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{
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prvYieldHandler();
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}
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/*-----------------------------------------------------------*/
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#pragma inline_asm prvYieldHandler
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static void prvYieldHandler( void )
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{
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/* Re-enable interrupts. */
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SETPSW I
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/* Move the data that was automatically pushed onto the interrupt stack
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when the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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PUSH.L R15
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/* Read the user stack pointer. */
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MVFC USP, R15
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/* Move the address down to the data being moved. */
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SUB #12, R15
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MVTC R15, USP
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/* Copy the data across. */
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MOV.L [ R0 ], [ R15 ] ; R15
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MOV.L 4[ R0 ], 4[ R15 ] ; PC
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MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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/* Move the interrupt stack pointer to its new correct position. */
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ADD #12, R0
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/* All the rest of the registers are saved directly to the user stack. */
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SETPSW U
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/* Save the rest of the general registers (R15 has been saved already). */
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PUSHM R1-R14
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/* Save the accumulator. */
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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/* Ensure the interrupt mask is set to the syscall priority while the
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kernel structures are being accessed. */
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MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask as no more data structure access is
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required. */
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MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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/* Load the stack pointer of the task that is now selected as the Running
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state task from its TCB. */
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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/* Restore the context of the new task. The PSW (Program Status Word) and
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PC will be popped by the RTE instruction. */
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POPM R1-R15
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RTE
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NOP
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NOP
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented as there is nothing to return to. */
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/* The following line is just to prevent the symbol getting optimised away. */
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( void ) vTaskSwitchContext();
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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/* Unlock. */
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SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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/* Enable CMT0. */
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MSTP( CMT0 ) = 0;
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/* Lock again. */
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SYSTEM.PRCR.WORD = portLOCK_KEY;
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/* Interrupt on compare match. */
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CMT0.CMCR.BIT.CMIE = 1;
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/* Set the compare match value. */
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CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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/* Divide the PCLK. */
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#if portCLOCK_DIVISOR == 512
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{
|
||||
CMT0.CMCR.BIT.CKS = 3;
|
||||
}
|
||||
#elif portCLOCK_DIVISOR == 128
|
||||
{
|
||||
CMT0.CMCR.BIT.CKS = 2;
|
||||
}
|
||||
#elif portCLOCK_DIVISOR == 32
|
||||
{
|
||||
CMT0.CMCR.BIT.CKS = 1;
|
||||
}
|
||||
#elif portCLOCK_DIVISOR == 8
|
||||
{
|
||||
CMT0.CMCR.BIT.CKS = 0;
|
||||
}
|
||||
#else
|
||||
{
|
||||
#error Invalid portCLOCK_DIVISOR setting
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* Enable the interrupt... */
|
||||
_IEN( _CMT0_CMI0 ) = 1;
|
||||
|
||||
/* ...and set its priority to the application defined kernel priority. */
|
||||
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
|
||||
|
||||
/* Start the timer. */
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
|
||||
static void prvSleep( portTickType xExpectedIdleTime )
|
||||
{
|
||||
/* Allow the application to define some pre-sleep processing. */
|
||||
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
|
||||
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
|
||||
means the application defined code has already executed the WAIT
|
||||
instruction. */
|
||||
if( xExpectedIdleTime > 0 )
|
||||
{
|
||||
wait();
|
||||
}
|
||||
|
||||
/* Allow the application to define some post sleep processing. */
|
||||
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
||||
}
|
||||
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
|
||||
void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
|
||||
{
|
||||
unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
|
||||
eSleepModeStatus eSleepAction;
|
||||
|
||||
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
|
||||
|
||||
/* Make sure the CMT reload value does not overflow the counter. */
|
||||
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
|
||||
{
|
||||
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
||||
}
|
||||
|
||||
/* Calculate the reload value required to wait xExpectedIdleTime tick
|
||||
periods. -1 is used because this code will execute part way through
|
||||
one of the tick periods, and the fraction of a tick period is accounted
|
||||
for later. */
|
||||
ulMatchValue = ( ulMatchValueForOneTick * ( xExpectedIdleTime - 1UL ) );
|
||||
if( ulMatchValue > ulStoppedTimerCompensation )
|
||||
{
|
||||
/* Compensate for the fact that the CMT is going to be stopped
|
||||
momentarily. */
|
||||
ulMatchValue -= ulStoppedTimerCompensation;
|
||||
}
|
||||
|
||||
/* Stop the CMT momentarily. The time the CMT is stopped for is
|
||||
accounted for as best it can be, but using the tickless mode will
|
||||
inevitably result in some tiny drift of the time maintained by the
|
||||
kernel with respect to calendar time. */
|
||||
CMT.CMSTR0.BIT.STR0 = 0;
|
||||
while( CMT.CMSTR0.BIT.STR0 == 1 )
|
||||
{
|
||||
/* Nothing to do here. */
|
||||
}
|
||||
|
||||
/* Critical section using the global interrupt bit as the i bit is
|
||||
automatically reset by the WAIT instruction. */
|
||||
clrpsw_i();
|
||||
|
||||
/* The tick flag is set to false before sleeping. If it is true when
|
||||
sleep mode is exited then sleep mode was probably exited because the
|
||||
tick was suppressed for the entire xExpectedIdleTime period. */
|
||||
ulTickFlag = pdFALSE;
|
||||
|
||||
/* If a context switch is pending then abandon the low power entry as
|
||||
the context switch might have been pended by an external interrupt that
|
||||
requires processing. */
|
||||
eSleepAction = eTaskConfirmSleepModeStatus();
|
||||
if( eSleepAction == eAbortSleep )
|
||||
{
|
||||
/* Restart tick. */
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
setpsw_i();
|
||||
}
|
||||
else if( eSleepAction == eNoTasksWaitingTimeout )
|
||||
{
|
||||
/* Protection off. */
|
||||
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
|
||||
|
||||
/* Ready for software standby with all clocks stopped. */
|
||||
SYSTEM.SBYCR.BIT.SSBY = 1;
|
||||
|
||||
/* Protection on. */
|
||||
SYSTEM.PRCR.WORD = portLOCK_KEY;
|
||||
|
||||
/* Sleep until something happens. Calling prvSleep() will
|
||||
automatically reset the i bit in the PSW. */
|
||||
prvSleep( xExpectedIdleTime );
|
||||
|
||||
/* Restart the CMT. */
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Protection off. */
|
||||
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
|
||||
|
||||
/* Ready for deep sleep mode. */
|
||||
SYSTEM.MSTPCRC.BIT.DSLPE = 1;
|
||||
SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
|
||||
SYSTEM.SBYCR.BIT.SSBY = 0;
|
||||
|
||||
/* Protection on. */
|
||||
SYSTEM.PRCR.WORD = portLOCK_KEY;
|
||||
|
||||
/* Adjust the match value to take into account that the current
|
||||
time slice is already partially complete. */
|
||||
ulMatchValue -= ( unsigned long ) CMT0.CMCNT;
|
||||
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
|
||||
|
||||
/* Restart the CMT to count up to the new match value. */
|
||||
CMT0.CMCNT = 0;
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
|
||||
/* Sleep until something happens. Calling prvSleep() will
|
||||
automatically reset the i bit in the PSW. */
|
||||
prvSleep( xExpectedIdleTime );
|
||||
|
||||
/* Stop CMT. Again, the time the SysTick is stopped for is
|
||||
accounted for as best it can be, but using the tickless mode will
|
||||
inevitably result in some tiny drift of the time maintained by the
|
||||
kernel with respect to calendar time. */
|
||||
CMT.CMSTR0.BIT.STR0 = 0;
|
||||
while( CMT.CMSTR0.BIT.STR0 == 1 )
|
||||
{
|
||||
/* Nothing to do here. */
|
||||
}
|
||||
|
||||
ulCurrentCount = ( unsigned long ) CMT0.CMCNT;
|
||||
|
||||
if( ulTickFlag != pdFALSE )
|
||||
{
|
||||
/* The tick interrupt has already executed, although because
|
||||
this function is called with the scheduler suspended the actual
|
||||
tick processing will not occur until after this function has
|
||||
exited. Reset the match value with whatever remains of this
|
||||
tick period. */
|
||||
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
|
||||
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
|
||||
|
||||
/* The tick interrupt handler will already have pended the tick
|
||||
processing in the kernel. As the pending tick will be
|
||||
processed as soon as this function exits, the tick value
|
||||
maintained by the tick is stepped forward by one less than the
|
||||
time spent sleeping. The actual stepping of the tick appears
|
||||
later in this function. */
|
||||
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Something other than the tick interrupt ended the sleep.
|
||||
How many complete tick periods passed while the processor was
|
||||
sleeping? */
|
||||
ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
|
||||
|
||||
/* The match value is set to whatever fraction of a single tick
|
||||
period remains. */
|
||||
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
|
||||
CMT0.CMCOR = ( unsigned short ) ulMatchValue;
|
||||
}
|
||||
|
||||
/* Restart the CMT so it runs up to the match value. The match value
|
||||
will get set to the value required to generate exactly one tick period
|
||||
the next time the CMT interrupt executes. */
|
||||
CMT0.CMCNT = 0;
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
|
||||
/* Wind the tick forward by the number of tick periods that the CPU
|
||||
remained in a low power state. */
|
||||
vTaskStepTick( ulCompleteTickPeriods );
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* configUSE_TICKLESS_IDLE */
|
||||
|
@ -0,0 +1,67 @@
|
||||
;/*
|
||||
; FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
;
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * *
|
||||
; * FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
; * Complete, revised, and edited pdf reference manuals are also *
|
||||
; * available. *
|
||||
; * *
|
||||
; * Purchasing FreeRTOS documentation will not only help you, by *
|
||||
; * ensuring you get running as quickly as possible and with an *
|
||||
; * in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
; * the FreeRTOS project to continue with its mission of providing *
|
||||
; * professional grade, cross platform, de facto standard solutions *
|
||||
; * for microcontrollers - completely free of charge! *
|
||||
; * *
|
||||
; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
; * *
|
||||
; * Thank you for using FreeRTOS, and thank you for your support! *
|
||||
; * *
|
||||
; ***************************************************************************
|
||||
;
|
||||
;
|
||||
; This file is part of the FreeRTOS distribution.
|
||||
;
|
||||
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
; the terms of the GNU General Public License (version 2) as published by the
|
||||
; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
; >>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
; distribute a combined work that includes FreeRTOS without being obliged to
|
||||
; provide the source code for proprietary components outside of the FreeRTOS
|
||||
; kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
; more details. You should have received a copy of the GNU General Public
|
||||
; License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
; can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
; by writing to Richard Barry, contact details for whom are available on the
|
||||
; FreeRTOS WEB site.
|
||||
;
|
||||
; 1 tab == 4 spaces!
|
||||
;
|
||||
; http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
; contact details.
|
||||
;
|
||||
; http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
; critical systems.
|
||||
;
|
||||
; http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
; licensing and training services.
|
||||
;*/
|
||||
.GLB _vSoftwareInterruptISR
|
||||
.GLB _vSoftwareInterruptEntry
|
||||
|
||||
.SECTION P,CODE
|
||||
|
||||
_vSoftwareInterruptEntry:
|
||||
|
||||
BRA _vSoftwareInterruptISR
|
||||
|
||||
.RVECTOR 27, _vSoftwareInterruptEntry
|
||||
|
||||
.END
|
||||
|
||||
|
||||
|
@ -0,0 +1,183 @@
|
||||
/*
|
||||
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
|
||||
|
||||
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
||||
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
|
||||
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel.
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
||||
details. You should have received a copy of the GNU General Public License
|
||||
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
|
||||
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
||||
writing to Real Time Engineers Ltd., contact details for whom are available
|
||||
on the FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
||||
fully thread aware and reentrant UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems, who sell the code with commercial support,
|
||||
indemnification and middleware, under the OpenRTOS brand.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Hardware specifics. */
|
||||
#include "machine.h"
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other
|
||||
than portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE unsigned portLONG
|
||||
#define portBASE_TYPE long
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef unsigned portSHORT portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffff
|
||||
#else
|
||||
typedef unsigned portLONG portTickType;
|
||||
#define portMAX_DELAY ( portTickType ) 0xffffffff
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() nop()
|
||||
|
||||
#pragma inline_asm vPortYield
|
||||
static void vPortYield( void )
|
||||
{
|
||||
/* Save clobbered register - may not actually be necessary if inline asm
|
||||
functions are considered to use the same rules as function calls by the
|
||||
compiler. */
|
||||
PUSH.L R5
|
||||
/* Set ITU SWINTR. */
|
||||
MOV.L #872E0H, R5
|
||||
MOV.B #1, [R5]
|
||||
/* Read back to ensure the value is taken before proceeding. */
|
||||
MOV.L [R5], R5
|
||||
/* Restore clobbered register to its previous value. */
|
||||
POP R5
|
||||
}
|
||||
#define portYIELD() vPortYield()
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }
|
||||
|
||||
/*
|
||||
* These macros should be called directly, but through the taskENTER_CRITICAL()
|
||||
* and taskEXIT_CRITICAL() macros.
|
||||
*/
|
||||
#define portENABLE_INTERRUPTS() set_ipl( 0 )
|
||||
#define portDISABLE_INTERRUPTS() set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
|
||||
/* Critical nesting counts are stored in the TCB. */
|
||||
#define portCRITICAL_NESTING_IN_TCB ( 1 )
|
||||
|
||||
/* The critical nesting functions defined within tasks.c. */
|
||||
extern void vTaskEnterCritical( void );
|
||||
extern void vTaskExitCritical( void );
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
/* As this port allows interrupt nesting... */
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tickless idle/low power functionality. */
|
||||
#if configUSE_TICKLESS_IDLE == 1
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* This macro is not appropriate for this port so is defined away. */
|
||||
#define portALIGNMENT_ASSERT_pxCurrentTCB( x )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
Loading…
Reference in New Issue