Add missing file.
Richard Barry
17 years ago
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/*
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FreeRTOS.org V5.0.4 - Copyright (C) 2003-2008 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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***************************************************************************
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* *
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* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
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* and even write all or part of your application on your behalf. *
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* See http://www.OpenRTOS.com for details of the services we provide to *
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* expedite your project. *
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* *
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***************************************************************************
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***************************************************************************
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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NOTE: This driver is primarily to test the scheduler functionality. It does
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not effectively use the buffers or DMA and is therefore not intended to be
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an example of an efficient driver. */
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/* Standard include file. */
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#include <stdlib.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo app include files. */
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#include "serial.h"
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/* Hardware definitions. */
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#define serNO_PARITY ( ( unsigned portCHAR ) 0x02 << 3 )
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#define ser8DATA_BITS ( ( unsigned portCHAR ) 0x03 )
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#define ser1STOP_BIT ( ( unsigned portCHAR ) 0x07 )
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#define serSYSTEM_CLOCK ( ( unsigned portCHAR ) 0xdd )
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#define serTX_ENABLE ( ( unsigned portCHAR ) 0x04 )
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#define serRX_ENABLE ( ( unsigned portCHAR ) 0x01 )
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#define serTX_INT ( ( unsigned portCHAR ) 0x01 )
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#define serRX_INT ( ( unsigned portCHAR ) 0x02 )
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/* The queues used to communicate between tasks and ISR's. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/* Flag used to indicate the tx status. */
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static portBASE_TYPE xTxHasEnded = pdTRUE;
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );
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/* Create the queues used by the com test task. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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xTxHasEnded = pdTRUE;
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/* Set the pins to UART mode. */
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MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_UTXD0_UTXD0;
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MCF_GPIO_PUAPAR |= MCF_GPIO_PUAPAR_URXD0_URXD0;
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/* Reset the peripheral. */
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MCF_UART0_UCR = MCF_UART_UCR_RESET_RX;
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MCF_UART0_UCR = MCF_UART_UCR_RESET_TX;
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MCF_UART0_UCR = MCF_UART_UCR_RESET_ERROR;
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MCF_UART0_UCR = MCF_UART_UCR_RESET_BKCHGINT;
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MCF_UART0_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;
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/* Configure the UART. */
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MCF_UART0_UMR1 = serNO_PARITY | ser8DATA_BITS;
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MCF_UART0_UMR2 = ser1STOP_BIT;
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MCF_UART0_UCSR = serSYSTEM_CLOCK;
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MCF_UART0_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );
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MCF_UART0_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );
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/* Turn it on. */
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MCF_UART0_UCR = serTX_ENABLE | serRX_ENABLE;
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/* Configure the interrupt controller. Run the UARTs above the kernel
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interrupt priority for demo purposes. */
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MCF_INTC0_ICR13 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );
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MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK13 | 0x01 );
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/* The Tx interrupt is not enabled until there is data to send. */
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MCF_UART0_UIMR = serRX_INT;
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/* Only a single port is implemented so we don't need to return anything. */
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return NULL;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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/* Only one port is supported. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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/* Only one port is supported. */
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( void ) pxPort;
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/* Return false if after the block time there is no room on the Tx queue. */
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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{
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return pdFAIL;
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}
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/* A critical section should not be required as xTxHasEnded will not be
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written to by the ISR if it is already 0 (is this correct?). */
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if( xTxHasEnded != pdFALSE )
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{
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xTxHasEnded = pdFALSE;
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MCF_UART0_UIMR = serRX_INT | serTX_INT;
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}
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return pdPASS;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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( void ) xPort;
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}
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/*-----------------------------------------------------------*/
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__declspec(interrupt:0) void vUART0InterruptHandler( void )
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{
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unsigned portCHAR ucChar;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;
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while( xDoneSomething != pdFALSE )
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{
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xDoneSomething = pdFALSE;
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/* Does the tx buffer contain space? */
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if( ( MCF_UART0_USR & MCF_UART_USR_TXRDY ) != 0x00 )
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{
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/* Are there any characters queued to be sent? */
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if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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/* Send the next char. */
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MCF_UART0_UTB = ucChar;
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xDoneSomething = pdTRUE;
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}
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else
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{
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/* Turn off the Tx interrupt until such time as another character
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is being transmitted. */
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MCF_UART0_UIMR = serRX_INT;
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xTxHasEnded = pdTRUE;
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}
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}
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if( MCF_UART0_USR & MCF_UART_USR_RXRDY )
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{
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ucChar = MCF_UART0_URB;
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xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
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xDoneSomething = pdTRUE;
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}
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}
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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}
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