Update EFM32 demos to include an option to use the RTC as the clock source when using low power tickless mode.
Richard Barry
9 years ago
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c4dd17eeb5
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556de14a1d
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/*
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FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/* FreeRTOS includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* SiLabs library includes. */
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#include "em_cmu.h"
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#include "em_rtc.h"
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#include "em_rmu.h"
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#include "em_int.h"
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#include "sleep.h"
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/* SEE THE COMMENTS ABOVE THE DEFINITION OF configCREATE_LOW_POWER_DEMO IN
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FreeRTOSConfig.h
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This file contains functions that will override the default implementations
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in the RTOS port layer. Therefore only build this file if the low power demo
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is being built. */
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#if( configCREATE_LOW_POWER_DEMO == 2 )
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#define mainTIMER_FREQUENCY_HZ ( 4096UL ) /* 32768 clock divided by 8. */
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/*
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* The low power demo does not use the SysTick, so override the
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* vPortSetupTickInterrupt() function with an implementation that configures
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* a low power clock source. NOTE: This function name must not be changed as
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* it is called from the RTOS portable layer.
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*/
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void vPortSetupTimerInterrupt( void );
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/*
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* Override the default definition of vPortSuppressTicksAndSleep() that is
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* weakly defined in the FreeRTOS Cortex-M port layer with a version that
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* manages the RTC clock, as the tick is generated from the low power RTC
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* and not the SysTick as would normally be the case on a Cortex-M.
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*/
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void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
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/*-----------------------------------------------------------*/
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/* Calculate how many clock increments make up a single tick period. */
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static const uint32_t ulReloadValueForOneTick = ( mainTIMER_FREQUENCY_HZ / configTICK_RATE_HZ );
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/* Will hold the maximum number of ticks that can be suppressed. */
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static uint32_t xMaximumPossibleSuppressedTicks = 0;
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/* Flag set from the tick interrupt to allow the sleep processing to know if
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sleep mode was exited because of a timer interrupt or a different interrupt. */
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static volatile uint32_t ulTickFlag = pdFALSE;
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/* As the clock is only 32KHz, it is likely a value of 1 will be enough. */
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static const uint32_t ulStoppedTimerCompensation = 0UL;
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/*-----------------------------------------------------------*/
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void vPortSetupTimerInterrupt( void )
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{
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RTC_Init_TypeDef xRTCInitStruct;
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const uint32_t ulMAX24BitValue = 0xffffffUL;
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xMaximumPossibleSuppressedTicks = ulMAX24BitValue / ulReloadValueForOneTick;
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/* Configure the RTC to generate the RTOS tick interrupt. */
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/* LXFO setup. For rev D use 70% boost */
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CMU->CTRL = ( CMU->CTRL & ~_CMU_CTRL_LFXOBOOST_MASK ) | CMU_CTRL_LFXOBOOST_70PCENT;
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#if defined( EMU_AUXCTRL_REDLFXOBOOST )
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EMU->AUXCTRL = (EMU->AUXCTRL & ~_EMU_AUXCTRL_REDLFXOBOOST_MASK) | EMU_AUXCTRL_REDLFXOBOOST;
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#endif
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/* Ensure LE modules are accessible. */
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CMU_ClockEnable( cmuClock_CORELE, true );
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/* Use LFXO. */
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CMU_ClockSelectSet( cmuClock_LFA, cmuSelect_LFXO );
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/* Use 8x divider to reduce energy. */
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CMU_ClockDivSet( cmuClock_RTC, cmuClkDiv_8 );
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/* Enable clock to the RTC module. */
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CMU_ClockEnable( cmuClock_RTC, true );
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xRTCInitStruct.enable = false;
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xRTCInitStruct.debugRun = false;
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xRTCInitStruct.comp0Top = true;
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RTC_Init( &xRTCInitStruct );
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/* Disable RTC0 interrupt. */
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RTC_IntDisable( RTC_IFC_COMP0 );
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/* The tick interrupt must be set to the lowest priority possible. */
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NVIC_SetPriority( RTC_IRQn, configKERNEL_INTERRUPT_PRIORITY );
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NVIC_ClearPendingIRQ( RTC_IRQn );
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NVIC_EnableIRQ( RTC_IRQn );
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RTC_CompareSet( 0, ulReloadValueForOneTick );
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RTC_IntClear( RTC_IFC_COMP0 );
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RTC_IntEnable( RTC_IF_COMP0 );
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RTC_Enable( true );
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}
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/*-----------------------------------------------------------*/
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void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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{
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uint32_t ulReloadValue, ulCompleteTickPeriods, ulCurrentCount;
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eSleepModeStatus eSleepAction;
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TickType_t xModifiableIdleTime;
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/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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/* Make sure the RTC reload value does not overflow the counter. */
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if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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{
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xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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}
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/* Calculate the reload value required to wait xExpectedIdleTime tick
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periods. */
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ulReloadValue = ulReloadValueForOneTick * xExpectedIdleTime;
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if( ulReloadValue > ulStoppedTimerCompensation )
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{
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/* Compensate for the fact that the RTC is going to be stopped
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momentarily. */
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ulReloadValue -= ulStoppedTimerCompensation;
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}
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/* Stop the RTC momentarily. The time the RTC is stopped for is accounted
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for as best it can be, but using the tickless mode will inevitably result
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in some tiny drift of the time maintained by the kernel with respect to
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calendar time. The count is latched before stopping the timer as stopping
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the timer appears to clear the count. */
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ulCurrentCount = RTC_CounterGet();
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RTC_Enable( false );
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/* Enter a critical section but don't use the taskENTER_CRITICAL() method as
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that will mask interrupts that should exit sleep mode. */
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INT_Disable();
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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/* The tick flag is set to false before sleeping. If it is true when sleep
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mode is exited then sleep mode was probably exited because the tick was
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suppressed for the entire xExpectedIdleTime period. */
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ulTickFlag = pdFALSE;
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/* If a context switch is pending then abandon the low power entry as the
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context switch might have been pended by an external interrupt that requires
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processing. */
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eSleepAction = eTaskConfirmSleepModeStatus();
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if( eSleepAction == eAbortSleep )
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{
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/* Restart tick and count up to whatever was left of the current time
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slice. */
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RTC_CompareSet( 0, ulReloadValueForOneTick - ulCurrentCount );
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RTC_Enable( true );
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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INT_Enable();
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}
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else
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{
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/* Adjust the reload value to take into account that the current time
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slice is already partially complete. */
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ulReloadValue -= ulCurrentCount;
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RTC_CompareSet( 0, ulReloadValue );
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/* Restart the RTC. */
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RTC_Enable( true );
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/* Allow the application to define some pre-sleep processing. */
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xModifiableIdleTime = xExpectedIdleTime;
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configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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means the application defined code has already executed the WAIT
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instruction. */
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if( xModifiableIdleTime > 0 )
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{
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__asm volatile( "dsb" );
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SLEEP_Sleep();
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__asm volatile( "isb" );
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}
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/* Allow the application to define some post sleep processing. */
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configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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/* Stop RTC. Again, the time the SysTick is stopped for is accounted
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for as best it can be, but using the tickless mode will inevitably
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result in some tiny drift of the time maintained by the kernel with
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respect to calendar time. The count value is latched before stopping
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the timer as stopping the timer appears to clear the count. */
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ulCurrentCount = RTC_CounterGet();
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RTC_Enable( false );
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/* Re-enable interrupts - see comments above the cpsid instruction()
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above. */
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INT_Enable();
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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if( ulTickFlag != pdFALSE )
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{
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/* The tick interrupt has already executed, although because this
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function is called with the scheduler suspended the actual tick
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processing will not occur until after this function has exited.
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Reset the reload value with whatever remains of this tick period. */
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ulReloadValue = ulReloadValueForOneTick - ulCurrentCount;
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RTC_CompareSet( 0, ulReloadValue );
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/* The tick interrupt handler will already have pended the tick
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processing in the kernel. As the pending tick will be processed as
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soon as this function exits, the tick value maintained by the tick
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is stepped forward by one less than the time spent sleeping. The
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actual stepping of the tick appears later in this function. */
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ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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}
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else
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{
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/* Something other than the tick interrupt ended the sleep. How
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many complete tick periods passed while the processor was
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sleeping? */
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ulCompleteTickPeriods = ulCurrentCount / ulReloadValueForOneTick;
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/* The reload value is set to whatever fraction of a single tick
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period remains. */
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ulReloadValue = ulCurrentCount - ( ulCompleteTickPeriods * ulReloadValueForOneTick );
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if( ulReloadValue == 0 )
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{
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/* There is no fraction remaining. */
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ulReloadValue = ulReloadValueForOneTick;
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ulCompleteTickPeriods++;
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}
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RTC_CompareSet( 0, ulReloadValue );
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}
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/* Restart the RTC so it runs up to the alarm value. The alarm value
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will get set to the value required to generate exactly one tick period
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the next time the RTC interrupt executes. */
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RTC_Enable( true );
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/* Wind the tick forward by the number of tick periods that the CPU
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remained in a low power state. */
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vTaskStepTick( ulCompleteTickPeriods );
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}
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}
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/*-----------------------------------------------------------*/
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void RTC_IRQHandler( void )
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{
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if( ulTickFlag == pdFALSE )
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{
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/* Set RTC interrupt to one RTOS tick period. */
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RTC_Enable( false );
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RTC_CompareSet( 0, ulReloadValueForOneTick );
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ulTickFlag = pdTRUE;
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RTC_Enable( true );
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}
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RTC_IntClear( _RTC_IFC_MASK );
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/* Critical section which protect incrementing the tick*/
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( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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{
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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}
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#endif /* ( configCREATE_LOW_POWER_DEMO == 1 ) */
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