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@ -102,13 +102,23 @@ sleep mode by an interrupt other than the tick interrupt, and therefore
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allowing an additional paths through the code to be tested. */
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#define lpINCLUDE_TEST_TIMER 0
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/* Some registers are accessed directly as the library is not compatible with
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all the compilers used. */
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/* Registers and bits required to use the htimer in aggregated mode. */
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#define lpHTIMER_PRELOAD_REGISTER ( * ( volatile uint16_t * ) 0x40009800 )
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#define lpHTIMER_CONTROL_REGISTER ( * ( volatile uint16_t * ) 0x40009804 )
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#define lpHTIMER_COUNT_REGISTER ( * ( volatile uint16_t * ) 0x40009808 )
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#define lpEC_GIRQ17_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C0B8 )
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#define lpHTIMER_INTERRUPT_CONTROL_BIT ( 1UL << 20UL )
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#define lpEC_GIRQ17_SOURCE ( * ( volatile uint32_t * ) 0x4000C0B4 )
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#define lpEC_GIRQ17_ENABLE_CLEAR ( * ( volatile uint32_t * ) 0x4000C0C0 )
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#define lpBLOCK_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000c200 )
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#define lpGIRQ17_BIT_HTIMER ( 1UL << 20UL )
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#define lpHTIMER_GIRQ_BLOCK ( 1Ul << 17UL )
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/* Registers and bits required to use btimer 0 in aggregated mode. */
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#define lpGIRQ23_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C130 )
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#define lpEC_GIRQ23_SOURCE ( * ( volatile uint32_t * ) 0x4000C12C )
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#define lpEC_GIRQ23_ENABLE_CLEAR ( * ( volatile uint32_t * ) 0x4000C138 )
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#define lpGIRQ23_BIT_TIMER0 ( 1UL << 0UL )
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#define lpBTIMER_GIRQ_BLOCK ( 1UL << 23UL )
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/*
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* The low power demo does not use the SysTick, so override the
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@ -152,9 +162,17 @@ static volatile uint32_t ulTickFlag = pdFALSE;
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/*-----------------------------------------------------------*/
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void NVIC_Handler_HIB_TMR( void )
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void NVIC_Handler_GIRQ17( void )
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{
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lpHTIMER_PRELOAD_REGISTER = ulHighResolutionReloadValue;
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/* The low power demo is using aggregated interrupts, so although in the
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demo the htimer is the only peripheral that will generate interrupts on
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this vector, in a real application it would be necessary to first check the
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interrupt source. */
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if( ( lpEC_GIRQ17_SOURCE & lpGIRQ17_BIT_HTIMER ) != 0 )
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{
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/* The htimer interrupted. Clear the interrupt. */
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lpEC_GIRQ17_SOURCE = lpGIRQ17_BIT_HTIMER;
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lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulHighResolutionReloadValue;
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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@ -166,20 +184,28 @@ void NVIC_Handler_HIB_TMR( void )
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/* The CPU woke because of a tick. */
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ulTickFlag = pdTRUE;
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}
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else
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{
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/* Don't expect any other interrupts to use this vector in this
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demo. Force an assert. */
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configASSERT( lpEC_GIRQ17_SOURCE == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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#if( lpINCLUDE_TEST_TIMER == 1 )
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#define lpGIRQ23_ENABLE_SET ( * ( uint32_t * ) 0x4000C130 )
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#define tmrGIRQ23_BIT_TIMER0 ( 1UL << 0UL )
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static void prvSetupBasicTimer( void )
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{
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const uint8_t ucTimerChannel = 0;
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const uint32_t ulTimer0Count = configCPU_CLOCK_HZ / 10;
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lpGIRQ23_ENABLE_SET = tmrGIRQ23_BIT_TIMER0;
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/* Enable btimer 0 interrupt in the aggregated GIRQ23 block. */
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lpEC_GIRQ23_SOURCE = lpGIRQ23_BIT_TIMER0;
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lpEC_GIRQ23_ENABLE_CLEAR = lpGIRQ23_BIT_TIMER0;
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lpBLOCK_ENABLE_SET = lpBTIMER_GIRQ_BLOCK;
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lpGIRQ23_ENABLE_SET = lpGIRQ23_BIT_TIMER0;
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/* To fully test the low power tick processing it is necessary to sometimes
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bring the MCU out of its sleep state by a method other than the tick
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@ -187,9 +213,9 @@ void NVIC_Handler_HIB_TMR( void )
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purpose. */
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btimer_init( ucTimerChannel, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer0Count, ulTimer0Count );
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btimer_interrupt_status_get_clr( ucTimerChannel );
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NVIC_SetPriority( TIMER0_IRQn, ucTimerChannel );
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NVIC_ClearPendingIRQ( TIMER0_IRQn );
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NVIC_EnableIRQ( TIMER0_IRQn );
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NVIC_SetPriority( GIRQ23_IRQn, ucTimerChannel );
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NVIC_ClearPendingIRQ( GIRQ23_IRQn );
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NVIC_EnableIRQ( GIRQ23_IRQn );
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btimer_start( ucTimerChannel );
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}
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@ -198,22 +224,25 @@ void NVIC_Handler_HIB_TMR( void )
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void vPortSetupTimerInterrupt( void )
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{
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ulMaximumPossibleSuppressedHighResolutionTicks = ( ( uint32_t ) USHRT_MAX ) / ulReloadValueForOneHighResolutionTick;
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ulMaximumPossibleSuppressedHighResolutionTicks = ( ( uint32_t ) USHRT_MAX ) / ulReloadValueForOneHighResolutionTick;
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/* Set up the hibernation timer to start at the value required by the
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tick interrupt. */
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lpHTIMER_PRELOAD_REGISTER = ulHighResolutionReloadValue;
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lpHTIMER_CONTROL_REGISTER = mainHTIMER_HIGH_RESOLUTION;
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/* Enable the HTIMER interrupt. Equivalent to enable_htimer0_irq(); */
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lpEC_GIRQ17_ENABLE_SET |= lpHTIMER_INTERRUPT_CONTROL_BIT;
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/* Enable the HTIMER interrupt in the aggregated GIR17 block. */
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lpEC_GIRQ17_SOURCE = lpGIRQ17_BIT_HTIMER;
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lpEC_GIRQ17_ENABLE_CLEAR = lpGIRQ17_BIT_HTIMER;
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lpBLOCK_ENABLE_SET = lpHTIMER_GIRQ_BLOCK;
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lpEC_GIRQ17_ENABLE_SET = lpGIRQ17_BIT_HTIMER;
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/* The hibernation timer is not an auto-reload timer, so gets reset
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from within the ISR itself. For that reason it's interrupt is set
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to the highest possible priority to ensure clock slippage is minimised. */
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NVIC_SetPriority( HTIMER_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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NVIC_ClearPendingIRQ( HTIMER_IRQn );
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NVIC_EnableIRQ( HTIMER_IRQn );
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NVIC_SetPriority( GIRQ17_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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NVIC_ClearPendingIRQ( GIRQ17_IRQn );
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NVIC_EnableIRQ( GIRQ17_IRQn );
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/* A basic timer is also started, purely for test purposes. Its only
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purpose is to bring the CPU out of its sleep mode by an interrupt other
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@ -327,7 +356,7 @@ TickType_t xModifiableIdleTime;
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/* Allow the application to define some post sleep processing. */
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configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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/* Stop the hibernation timer. Again, the time the tiemr is stopped
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/* Stop the hibernation timer. Again, the time the timer is stopped
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for is accounted for as best it can be, but using the tickless mode
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will inevitably result in some tiny drift of the time maintained by the
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kernel with respect to calendar time. Take the count value first as
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@ -402,14 +431,31 @@ TickType_t xModifiableIdleTime;
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}
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/*-----------------------------------------------------------*/
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void NVIC_Handler_TMR0( void )
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void NVIC_Handler_GIRQ23( void )
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{
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static volatile uint32_t ulTimerCounts = 0;
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/* The low power demo is using aggregated interrupts, so although in the
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demo btimer 0 is the only peripheral that will generate interrupts on
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this vector, in a real application it would be necessary to first check the
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interrupt source. */
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if( ( lpEC_GIRQ23_SOURCE & lpGIRQ23_BIT_TIMER0 ) != 0 )
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{
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/* Btimer0 interrupted. Clear the interrupt. */
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lpEC_GIRQ23_SOURCE = lpGIRQ23_BIT_TIMER0;
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/* This timer is used for test purposes. Its only function is to
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generate interrupts while the MCU is sleeping, so the MCU is sometimes
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brought out of sleep by a means other than the tick interrupt. */
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ulTimerCounts++;
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}
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else
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{
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/* Don't expect any other interrupts to use this vector in this
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demo. Force an assert. */
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configASSERT( lpEC_GIRQ23_SOURCE == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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#endif /* configCREATE_LOW_POWER_DEMO */
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#endif /* configCREATE_LOW_POWER_DEMO == 1 */
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Richard Barry
9 years ago