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@ -110,6 +110,9 @@
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#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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#define portPRIGROUP_SHIFT ( 8UL )
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#define portPRIGROUP_SHIFT ( 8UL )
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/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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#define portVECTACTIVE_MASK ( 0x1FUL )
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/* Constants required to manipulate the VFP. */
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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@ -280,6 +283,7 @@ static void prvPortStartFirstTask( void )
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" ldr r0, [r0] \n"
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" ldr r0, [r0] \n"
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" cpsie i \n" /* Globally enable interrupts. */
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" cpsie i \n" /* Globally enable interrupts. */
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" cpsie f \n"
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" dsb \n"
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" dsb \n"
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" isb \n"
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" isb \n"
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" svc 0 \n" /* System call to start first task. */
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" svc 0 \n" /* System call to start first task. */
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@ -398,6 +402,16 @@ void vPortEnterCritical( void )
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uxCriticalNesting++;
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uxCriticalNesting++;
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__asm volatile( "dsb" );
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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__asm volatile( "isb" );
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/* This is not the interrupt safe version of the enter critical function so
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assert() if it is being called from an interrupt context. Only API
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functions that end in "FromISR" can be used in an interrupt. Only assert if
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the critical nesting count is 1 to protect against recursive calls if the
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assert function also uses a critical section. */
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if( uxCriticalNesting == 1 )
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{
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configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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}
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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