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/*******************************************************************************
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* (c) Copyright 2009 Actel Corporation. All rights reserved.
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*
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* SmartFusion microcontroller subsystem (MSS) timer driver API.
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*
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* SVN $Revision: 2661 $
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* SVN $Date: 2010-04-19 17:14:26 +0100 (Mon, 19 Apr 2010) $
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*/
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/*=========================================================================*//**
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@mainpage SmartFusion MSS Timer Bare Metal Driver.
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@section intro_sec Introduction
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The SmartFusion Microcontroller Subsystem (MSS) includes a timer hardware
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block which can be used as two independent 32-bits timers or as a single
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64-bits timer in periodic or one-shot mode.
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This driver provides a set of functions for controlling the MSS timer as part
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of a bare metal system where no operating system is available. These drivers
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can be adapted for use as part of an operating system but the implementation
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of the adaptation layer between this driver and the operating system's driver
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model is outside the scope of this driver.
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@section theory_op Theory of Operation
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The MSS Timer driver uses the SmartFusion "Cortex Microcontroler Software
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Interface Standard - Peripheral Access Layer" (CMSIS-PAL) to access hadware
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registers. You must ensure that the SmartFusion CMSIS-PAL is either included
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in the software toolchain used to build your project or is included in your
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project. The most up-to-date SmartFusion CMSIS-PAL files can be obtained using
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the Actel Firmware Catalog.
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The SmartFusion MSS Timer can be used in one of two mutually exclusive modes;
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either as a single 64-bits timer or as two independent 32-bits timers. The MSS
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Timer can be used in either periodic mode or one-shot mode. A timer configured
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for periodic mode operations will generate an interrupt and reload its
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down-counter when it reaches 0. The timer will then continue decrementing from
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its reload value without waiting for the interrupt to be cleared. A timer
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configured for one-shot mode will only generate an interrupt once when its
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down-counter reaches 0. It must be explitcitly reloaded to start decrementing
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again.
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The MSS Timer driver functions are grouped into the following categories:
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- Initialization and Configuration
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- Timer control
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- Interrupt control
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The MSS Timer driver provides three initialization functions:
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- MSS_TIM1_init()
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- MSS_TIM2_init()
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- MSS_TIM64_init()
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The MSS Timer driver is initialized through calls to these functions and at
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least one of them must be called before any other MSS Timer driver functions
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can be called.
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You should only use the MSS_TIM1_init() and MSS_TIM2_init() functions if you
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intend to use the timer in 32-bits mode. Use the MSS_TIM64_init() function is
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you intend to use the MSS Timer as a single 64-bits timer. The initialization
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functions take a single parameter specifying the operating mode of the timer
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being initialized.
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Once initialized a timer can be controlled using the following functions:
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- MSS_TIM1_load_immediate()
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- MSS_TIM1_load_background()
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- MSS_TIM1_get_current_value()
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- MSS_TIM1_start()
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- MSS_TIM1_stop()
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- MSS_TIM2_load_immediate()
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- MSS_TIM2_load_background()
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- MSS_TIM2_get_current_value()
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- MSS_TIM2_start()
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- MSS_TIM2_stop()
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- MSS_TIM64_load_immediate()
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- MSS_TIM64_load_background()
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- MSS_TIM64_get_current_value()
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- MSS_TIM64_start()
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- MSS_TIM64_stop()
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Timer interrupts are controlled using the following functions:
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- MSS_TIM1_enable_irq()
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- MSS_TIM1_disable_irq()
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- MSS_TIM1_clear_irq()
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- MSS_TIM2_enable_irq()
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- MSS_TIM2_disable_irq()
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- MSS_TIM2_clear_irq()
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- MSS_TIM64_enable_irq()
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- MSS_TIM64_disable_irq()
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- MSS_TIM64_clear_irq()
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The function prototypes for the timer interrupt handlers are:
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- void Timer1_IRQHandler( void )
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- void Timer2_IRQHandler( void )
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Entries for these interrupt handlers are provided in the SmartFusion CMSIS-PAL
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vector table. To add a Timer 1 interrupt handler, you must implement a
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Timer1_IRQHandler( ) function as part of your application code. To add a
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Timer 2 interrupt handler, you must implement a Timer2_IRQHandler( ) function
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as part of your application code. When using the MSS Timer as a 64-bit timer,
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you must implement a Timer1_IRQHandler( ) function as part of your
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application code. The Timer 2 interrupt is not used when the MSS Timer is
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configured as a 64-bit timer.
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*//*=========================================================================*/
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#ifndef MSS_TIMER_H_
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#define MSS_TIMER_H_
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#include "../../CMSIS/a2fxxxm3.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-------------------------------------------------------------------------*//**
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* Timer mode selection. This enumeration is used to select between the two
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* possible timer modes of operation: periodic and one-shot mode. It is used as
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* an argument to the MSS_TIM1_init(), MSS_TIM2_init() and MSS_TIM64_init()
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* functions.
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* MSS_TIMER_PERIODIC_MODE:
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* In periodic mode the timer generates interrupts at constant intervals. On
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* reaching zero, the timer's counter is reloaded with a value held in a
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* register and begins counting down again.
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* MSS_TIMER_ONE_SHOT_MODE:
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* The timer generates a single interrupt in this mode. On reaching zero, the
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* timer's counter halts until reprogrammed by the user.
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*/
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typedef enum __mss_timer_mode_t
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{
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MSS_TIMER_PERIODIC_MODE = 0,
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MSS_TIMER_ONE_SHOT_MODE = 1
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} mss_timer_mode_t;
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_init() function initializes the SmartFusion MSS Timer block for
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use as a 32-bit timer and selects the operating mode for Timer 1. This function
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takes the MSS Timer block out of reset in case this hasn’t been done already,
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stops Timer 1, disables its interrupt and sets the Timer 1 operating mode.
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Please note that the SmartFusion MSS Timer block cannot be used both as a
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64-bit and 32-bit timer. Calling MSS_TIM1_init() will overwrite any previous
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configuration of the MSS Timer as a 64-bit timer.
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@param mode
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The mode parameter specifies whether the timer will operate in periodic or
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one-shot mode. Allowed values for this parameter are:
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- MSS_TIMER_PERIODIC_MODE
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- MSS_TIMER_ONE_SHOT_MODE
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*/
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static __INLINE void MSS_TIM1_init( mss_timer_mode_t mode )
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{
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NVIC_DisableIRQ( Timer1_IRQn ); /* Disable timer 1 irq in the Cortex-M3 NVIC */
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SYSREG->SOFT_RST_CR &= ~SYSREG_TIMER_SOFTRESET_MASK; /* Take timer block out of reset */
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TIMER->TIM64_MODE = 0U; /* switch to 32 bits mode */
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TIMER_BITBAND->TIM1ENABLE = 0U; /* disable timer */
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TIMER_BITBAND->TIM1INTEN = 0U; /* disable interrupt */
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TIMER_BITBAND->TIM1MODE = (uint32_t)mode; /* set mode (continuous/one-shot) */
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TIMER->TIM1_RIS = 1U; /* clear timer 1 interrupt */
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NVIC_ClearPendingIRQ( Timer1_IRQn ); /* clear timer 1 interrupt within NVIC */
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_start() function enables Timer 1 and starts its down-counter
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decrementing from the load_value specified in previous calls to the
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MSS_TIM1_load_immediate() or MSS_TIM1_load_background() functions.
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*/
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static __INLINE void MSS_TIM1_start( void )
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{
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TIMER_BITBAND->TIM1ENABLE = 1U; /* enable timer */
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_stop() function disables Timer 1 and stops its down-counter
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decrementing.
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*/
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static __INLINE void MSS_TIM1_stop( void )
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{
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TIMER_BITBAND->TIM1ENABLE = 0U; /* disable timer */
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_get_current_value() returns the current value of the Timer 1
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down-counter.
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@return
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This function returns the 32-bits current value of the Timer 1 down-counter.
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*/
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static __INLINE uint32_t MSS_TIM1_get_current_value( void )
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{
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return TIMER->TIM1_VAL;
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_load_immediate() function loads the value passed by the
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load_value parameter into the Timer 1 down-counter. The counter will decrement
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immediately from this value once Timer 1 is enabled. The MSS Timer will
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generate an interrupt when the counter reaches zero if Timer 1 interrupts are
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enabled. This function is intended to be used when Timer 1 is configured for
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one-shot mode to time a single delay.
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@param load_value
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The load_value parameter specifies the value from which the Timer 1 down-counter
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will start decrementing from.
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*/
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static __INLINE void MSS_TIM1_load_immediate( uint32_t load_value )
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{
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TIMER->TIM1_LOADVAL = load_value;
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_load_background() function is used to specify the value that will
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be reloaded into the Timer 1 down-counter the next time the counter reaches
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zero. This function is typically used when Timer 1 is configured for periodic
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mode operation to select or change the delay period between the interrupts
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generated by Timer 1.
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@param load_value
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The load_value parameter specifies the value that will be loaded into the
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Timer 1 down-counter the next time the down-counter reaches zero. The Timer
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1 down-counter will start decrementing from this value after the current
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count expires.
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*/
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static __INLINE void MSS_TIM1_load_background( uint32_t load_value )
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{
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TIMER->TIM1_BGLOADVAL = load_value;
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM1_enable_irq() function is used to enable interrupt generation for
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Timer 1. This function also enables the interrupt in the Cortex-M3 interrupt
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|
|
|
|
controller. The Timer1_IRQHandler() function will be called when a Timer 1
|
|
|
|
|
|
|
|
interrupt occurs.
|
|
|
|
|
|
|
|
Note: Note: A Timer1_IRQHandler() default implementation is defined, with
|
|
|
|
|
|
|
|
weak linkage, in the SmartFusion CMSIS-PAL. You must provide your own
|
|
|
|
|
|
|
|
implementation of the Timer1_IRQHandler() function, that will override the
|
|
|
|
|
|
|
|
default implementation, to suit your application.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM1_enable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM1INTEN = 1U;
|
|
|
|
|
|
|
|
NVIC_EnableIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM1_disable_irq() function is used to disable interrupt generation
|
|
|
|
|
|
|
|
for Timer 1. This function also disables the interrupt in the Cortex-M3
|
|
|
|
|
|
|
|
interrupt controller.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM1_disable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM1INTEN = 0U;
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM1_clear_irq() function is used to clear a pending interrupt from
|
|
|
|
|
|
|
|
Timer 1. This function also clears the interrupt in the Cortex-M3 interrupt
|
|
|
|
|
|
|
|
controller.
|
|
|
|
|
|
|
|
Note: You must call the MSS_TIM1_clear_irq() function as part of your
|
|
|
|
|
|
|
|
implementation of the Timer1_IRQHandler() Timer 1 interrupt service routine
|
|
|
|
|
|
|
|
(ISR) in order to prevent the same interrupt event retriggering a call to the
|
|
|
|
|
|
|
|
ISR.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM1_clear_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM1_RIS = 1U;
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_init() function initializes the SmartFusion MSS Timer block for
|
|
|
|
|
|
|
|
use as a 32-bit timer and selects the operating mode for Timer 2. This function
|
|
|
|
|
|
|
|
takes the MSS Timer block out of reset in case this hasn’t been done already,
|
|
|
|
|
|
|
|
stops Timer 2, disables its interrupt and sets the Timer 2 operating mode.
|
|
|
|
|
|
|
|
Note: Please note that the SmartFusion MSS Timer block cannot be used both as
|
|
|
|
|
|
|
|
a 64-bit and 32-bit timer. Calling MSS_TIM2_init() will overwrite any previous
|
|
|
|
|
|
|
|
configuration of the MSS Timer as a 64-bit timer.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param mode
|
|
|
|
|
|
|
|
The mode parameter specifies whether the timer will operate in periodic or
|
|
|
|
|
|
|
|
one-shot mode. Allowed values for this parameter are:
|
|
|
|
|
|
|
|
- MSS_TIMER_PERIODIC_MODE
|
|
|
|
|
|
|
|
- MSS_TIMER_ONE_SHOT_MODE
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_init( mss_timer_mode_t mode )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer2_IRQn ); /* Disable timer 2 irq in the Cortex-M3 NVIC */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYSREG->SOFT_RST_CR &= ~SYSREG_TIMER_SOFTRESET_MASK; /* Take timer block out of reset */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER->TIM64_MODE = 0U; /* switch to 32 bits mode */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2ENABLE = 0U; /* disable timer */
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2INTEN = 0U; /* disable interrupt */
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2MODE = (uint32_t)mode; /* set mode (continuous/one-shot) */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER->TIM2_RIS = 1U; /* clear timer 2 interrupt */
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer2_IRQn ); /* clear timer 2 interrupt within NVIC */
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_start() function enables Timer 2 and starts its down-counter
|
|
|
|
|
|
|
|
decrementing from the load_value specified in previous calls to the
|
|
|
|
|
|
|
|
MSS_TIM2_load_immediate() or MSS_TIM2_load_background() functions.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_start( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2ENABLE = 1U; /* enable timer */
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_stop() function disables Timer 2 and stops its down-counter
|
|
|
|
|
|
|
|
decrementing.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_stop( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2ENABLE = 0U; /* disable timer */
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_get_current_value() returns the current value of the Timer 2
|
|
|
|
|
|
|
|
down-counter.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE uint32_t MSS_TIM2_get_current_value( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
return TIMER->TIM2_VAL;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_load_immediate() function loads the value passed by the
|
|
|
|
|
|
|
|
load_value parameter into the Timer 2 down-counter. The counter will decrement
|
|
|
|
|
|
|
|
immediately from this value once Timer 2 is enabled. The MSS Timer will
|
|
|
|
|
|
|
|
generate an interrupt when the counter reaches zero if Timer 2 interrupts are
|
|
|
|
|
|
|
|
enabled. This function is intended to be used when Timer 2 is configured for
|
|
|
|
|
|
|
|
one-shot mode to time a single delay.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param load_value
|
|
|
|
|
|
|
|
The load_value parameter specifies the value from which the Timer 2
|
|
|
|
|
|
|
|
down-counter will start decrementing.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_load_immediate( uint32_t load_value )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM2_LOADVAL = load_value;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_load_background() function is used to specify the value that will
|
|
|
|
|
|
|
|
be reloaded into the Timer 2 down-counter the next time the counter reaches
|
|
|
|
|
|
|
|
zero. This function is typically used when Timer 2 is configured for periodic
|
|
|
|
|
|
|
|
mode operation to select or change the delay period between the interrupts
|
|
|
|
|
|
|
|
generated by Timer 2.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param load_value
|
|
|
|
|
|
|
|
The load_value parameter specifies the value that will be loaded into the
|
|
|
|
|
|
|
|
Timer 2 down-counter the next time the down-counter reaches zero. The Timer
|
|
|
|
|
|
|
|
2 down-counter will start decrementing from this value after the current
|
|
|
|
|
|
|
|
count expires.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_load_background( uint32_t load_value )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM2_BGLOADVAL = load_value;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_enable_irq() function is used to enable interrupt generation for
|
|
|
|
|
|
|
|
Timer 2. This function also enables the interrupt in the Cortex-M3 interrupt
|
|
|
|
|
|
|
|
controller. The Timer2_IRQHandler() function will be called when a Timer 2
|
|
|
|
|
|
|
|
interrupt occurs.
|
|
|
|
|
|
|
|
Note: A Timer2_IRQHandler() default implementation is defined, with weak
|
|
|
|
|
|
|
|
linkage, in the SmartFusion CMSIS-PAL. You must provide your own implementation
|
|
|
|
|
|
|
|
of the Timer2_IRQHandler() function, that will override the default
|
|
|
|
|
|
|
|
implementation, to suit your application.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_enable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2INTEN = 1U;
|
|
|
|
|
|
|
|
NVIC_EnableIRQ( Timer2_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_disable_irq() function is used to disable interrupt generation
|
|
|
|
|
|
|
|
for Timer 2. This function also disables the interrupt in the Cortex-M3
|
|
|
|
|
|
|
|
interrupt controller.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_disable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM2INTEN = 0U;
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer2_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM2_clear_irq() function is used to clear a pending interrupt from
|
|
|
|
|
|
|
|
Timer 2. This function also clears the interrupt in the Cortex-M3 interrupt
|
|
|
|
|
|
|
|
controller.
|
|
|
|
|
|
|
|
Note: You must call the MSS_TIM2_clear_irq() function as part of your
|
|
|
|
|
|
|
|
implementation of the Timer2_IRQHandler() Timer 2 interrupt service routine
|
|
|
|
|
|
|
|
(ISR) in order to prevent the same interrupt event retriggering a call to the
|
|
|
|
|
|
|
|
ISR.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM2_clear_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM2_RIS = 1U;
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer2_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_init() function initializes the SmartFusion MSS Timer block for
|
|
|
|
|
|
|
|
use as a single 64-bit timer and selects the operating mode of the timer. This
|
|
|
|
|
|
|
|
function takes the MSS Timer block out of reset in case this hasn’t been done
|
|
|
|
|
|
|
|
already, stops the timer, disables its interrupts and sets the timer's
|
|
|
|
|
|
|
|
operating mode.
|
|
|
|
|
|
|
|
Note: Please note that the SmartFusion MSS Timer block cannot be used both as
|
|
|
|
|
|
|
|
a 64-bit and 32-bit timer. Calling MSS_TIM64_init() will overwrite any previous
|
|
|
|
|
|
|
|
configuration of the MSS Timer as a 32-bit timer.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param mode
|
|
|
|
|
|
|
|
The mode parameter specifies whether the timer will operate in periodic or
|
|
|
|
|
|
|
|
one-shot mode. Allowed values for this parameter are:
|
|
|
|
|
|
|
|
- MSS_TIMER_PERIODIC_MODE
|
|
|
|
|
|
|
|
- MSS_TIMER_ONE_SHOT_MODE
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_init( mss_timer_mode_t mode )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer1_IRQn ); /* disable timer 1 interrupt within NVIC */
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer2_IRQn ); /* disable timer 2 interrupt within NVIC */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYSREG->SOFT_RST_CR &= ~SYSREG_TIMER_SOFTRESET_MASK; /* Take timer block out of reset */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER->TIM64_MODE = 1U; /* switch to 64 bits mode */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64ENABLE = 0U; /* disable timer */
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64INTEN = 0U; /* disable interrupt */
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64MODE = (uint32_t)mode; /* set mode (continuous/one-shot) */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TIMER->TIM1_RIS = 1U; /* clear timer 1 interrupt */
|
|
|
|
|
|
|
|
TIMER->TIM2_RIS = 1U; /* clear timer 2 interrupt */
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer1_IRQn ); /* clear timer 1 interrupt within NVIC */
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer2_IRQn ); /* clear timer 2 interrupt within NVIC */
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_start() function enables the 64-bit timer and starts its
|
|
|
|
|
|
|
|
down-counter decrementing from the load_value specified in previous calls to
|
|
|
|
|
|
|
|
the MSS_TIM64_load_immediate() or MSS_TIM64_load_background() functions.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_start( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64ENABLE = 1U; /* enable timer */
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_stop() function disables the 64-bit timer and stops its
|
|
|
|
|
|
|
|
down-counter decrementing.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_stop( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64ENABLE = 0U; /* disable timer */
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM64_get_current_value() is used to read the current value of the
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64-bit timer down-counter.
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@param load_value_u
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The load_value_u parameter is a pointer to a 32-bit variable where the upper
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32 bits of the current value of the 64-bit timer down-counter will be copied.
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@param load_value_l
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The load_value_l parameter is a pointer to a 32-bit variable where the lower
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32 bits of the current value of the 64-bit timer down-counter will be copied.
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Example:
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@code
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uint32_t current_value_u = 0;
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uint32_t current_value_l = 0;
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MSS_TIM64_get_current_value( ¤t_value_u, ¤t_value_l );
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@endcode
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*/
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static __INLINE void MSS_TIM64_get_current_value
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(
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uint32_t * load_value_u,
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uint32_t * load_value_l
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)
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{
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*load_value_l = TIMER->TIM64_VAL_L;
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*load_value_u = TIMER->TIM64_VAL_U;
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}
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/*-------------------------------------------------------------------------*//**
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The MSS_TIM64_load_immediate() function loads the values passed by the
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load_value_u and load_value_l parameters into the 64-bit timer down-counter.
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The counter will decrement immediately from the concatenated 64-bit value once
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the 64-bit timer is enabled. The MSS Timer will generate an interrupt when the
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counter reaches zero if 64-bit timer interrupts are enabled. This function is
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intended to be used when the 64-bit timer is configured for one-shot mode to
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time a single delay.
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@param load_value_u
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The load_value_u parameter specifies the upper 32 bits of the 64-bit timer
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load value from which the 64-bit timer down-counter will start decrementing.
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@param load_value_l
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The load_value_l parameter specifies the lower 32 bits of the 64-bit timer
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load value from which the 64-bit timer down-counter will start decrementing.
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*/
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|
static __INLINE void MSS_TIM64_load_immediate
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(
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|
uint32_t load_value_u,
|
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|
uint32_t load_value_l
|
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|
)
|
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|
{
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|
TIMER->TIM64_LOADVAL_U = load_value_u;
|
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|
TIMER->TIM64_LOADVAL_L = load_value_l;
|
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|
}
|
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|
/*-------------------------------------------------------------------------*//**
|
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|
The MSS_TIM64_load_background() function is used to specify the 64-bit value
|
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|
|
that will be reloaded into the 64-bit timer down-counter the next time the
|
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|
counter reaches zero. This function is typically used when the 64-bit timer is
|
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|
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|
|
configured for periodic mode operation to select or change the delay period
|
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|
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|
|
between the interrupts generated by the 64-bit timer.
|
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|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param load_value_u
|
|
|
|
|
|
|
|
The load_value_u parameter specifies the upper 32 bits of the 64-bit timer
|
|
|
|
|
|
|
|
load value. The concatenated 64-bit value formed from load_value_u and
|
|
|
|
|
|
|
|
load_value_l will be loaded into the 64-bit timer down-counter the next
|
|
|
|
|
|
|
|
time the down-counter reaches zero. The 64-bit timer down-counter will start
|
|
|
|
|
|
|
|
decrementing from the concatenated 64-bit value after the current count
|
|
|
|
|
|
|
|
expires.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
@param load_value_l
|
|
|
|
|
|
|
|
The load_value_l parameter specifies the lower 32 bits of the 64-bit timer
|
|
|
|
|
|
|
|
load value. The concatenated 64-bit value formed from load_value_u and
|
|
|
|
|
|
|
|
load_value_l will be loaded into the 64-bit timer down-counter the next time
|
|
|
|
|
|
|
|
the down-counter reaches zero. The 64-bit timer down-counter will start
|
|
|
|
|
|
|
|
decrementing from the concatenated 64-bit value after the current count
|
|
|
|
|
|
|
|
expires.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_load_background
|
|
|
|
|
|
|
|
(
|
|
|
|
|
|
|
|
uint32_t load_value_u,
|
|
|
|
|
|
|
|
uint32_t load_value_l
|
|
|
|
|
|
|
|
)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM64_BGLOADVAL_U = load_value_u;
|
|
|
|
|
|
|
|
TIMER->TIM64_BGLOADVAL_L = load_value_l;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_enable_irq() function is used to enable interrupt generation for
|
|
|
|
|
|
|
|
the 64-bit timer. This function also enables the interrupt in the Cortex-M3
|
|
|
|
|
|
|
|
interrupt controller. The Timer1_IRQHandler() function will be called when a
|
|
|
|
|
|
|
|
64-bit timer interrupt occurs.
|
|
|
|
|
|
|
|
Note: A Timer1_IRQHandler() default implementation is defined, with weak
|
|
|
|
|
|
|
|
linkage, in the SmartFusion CMSIS-PAL. You must provide your own
|
|
|
|
|
|
|
|
implementation of the Timer1_IRQHandler() function, that will override the
|
|
|
|
|
|
|
|
default implementation, to suit your application.
|
|
|
|
|
|
|
|
Note: The MSS_TIM64_enable_irq() function enables and uses Timer 1 interrupts
|
|
|
|
|
|
|
|
for the 64-bit timer. Timer 2 interrupts remain disabled.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_enable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64INTEN = 1U;
|
|
|
|
|
|
|
|
NVIC_EnableIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_disable_irq() function is used to disable interrupt generation
|
|
|
|
|
|
|
|
for the 64-bit timer. This function also disables the interrupt in the
|
|
|
|
|
|
|
|
Cortex-M3 interrupt controller.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_disable_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER_BITBAND->TIM64INTEN = 0U;
|
|
|
|
|
|
|
|
NVIC_DisableIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*-------------------------------------------------------------------------*//**
|
|
|
|
|
|
|
|
The MSS_TIM64_clear_irq() function is used to clear a pending interrupt from
|
|
|
|
|
|
|
|
the 64-bit timer. This function also clears the interrupt in the Cortex-M3
|
|
|
|
|
|
|
|
interrupt controller.
|
|
|
|
|
|
|
|
Note: You must call the MSS_TIM64_clear_irq() function as part of your
|
|
|
|
|
|
|
|
implementation of the Timer1_IRQHandler() 64-bit timer interrupt service
|
|
|
|
|
|
|
|
routine (ISR) in order to prevent the same interrupt event retriggering a
|
|
|
|
|
|
|
|
call to the ISR.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
static __INLINE void MSS_TIM64_clear_irq( void )
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
TIMER->TIM64_RIS = 1U;
|
|
|
|
|
|
|
|
NVIC_ClearPendingIRQ( Timer1_IRQn );
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#endif /*MSS_TIMER_H_*/
|