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200 lines
7.0 KiB
C
200 lines
7.0 KiB
C
/*
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FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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Also see http://www.SafeRTOS.com a version that has been certified for use
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in safety critical systems, plus commercial licensing, development and
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support options.
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***************************************************************************
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo application includes. */
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#include "serial.h"
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/* Microblaze driver includes. */
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#include "xuartlite_l.h"
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#include "xintc_l.h"
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/*-----------------------------------------------------------*/
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/* Queues used to hold received characters, and characters waiting to be
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transmitted. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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unsigned portLONG ulControlReg, ulMask;
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/* NOTE: The baud rate used by this driver is determined by the hardware
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parameterization of the UART Lite peripheral, and the baud value passed to
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this function has no effect. */
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/* Create the queues used to hold Rx and Tx characters. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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if( ( xRxedChars ) && ( xCharsForTx ) )
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{
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/* Disable the interrupt. */
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XUartLite_mDisableIntr( XPAR_RS232_UART_BASEADDR );
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/* Flush the fifos. */
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ulControlReg = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
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XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_CONTROL_REG_OFFSET, ulControlReg | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET );
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/* Enable the interrupt again. The interrupt controller has not yet been
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initialised so there is no chance of receiving an interrupt until the
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scheduler has been started. */
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XUartLite_mEnableIntr( XPAR_RS232_UART_BASEADDR );
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/* Enable the interrupt in the interrupt controller while maintaining
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all the other bit settings. */
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ulMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) );
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ulMask |= XPAR_RS232_UART_INTERRUPT_MASK;
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XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( ulMask ) );
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XIntc_mAckIntr( XPAR_INTC_SINGLE_BASEADDR, 2 );
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}
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return ( xComPortHandle ) 0;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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/* The port handle is not required as this driver only supports one UART. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available, or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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portBASE_TYPE xReturn = pdTRUE;
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portENTER_CRITICAL();
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{
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/* If the UART FIFO is full we can block posting the new data on the
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Tx queue. */
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if( XUartLite_mIsTransmitFull( XPAR_RS232_UART_BASEADDR ) )
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{
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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{
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xReturn = pdFAIL;
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}
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}
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/* Otherwise, if there is data already in the queue we should add the
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new data to the back of the queue to ensure the sequencing is
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maintained. */
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else if( uxQueueMessagesWaiting( xCharsForTx ) )
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{
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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{
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xReturn = pdFAIL;
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}
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}
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/* If the UART FIFO is not full and there is no data already in the
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queue we can write directly to the FIFO without disrupting the
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sequence. */
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else
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{
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XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cOutChar );
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}
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}
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portEXIT_CRITICAL();
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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/* Not supported as not required by the demo application. */
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( void ) xPort;
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}
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/*-----------------------------------------------------------*/
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void vSerialISR( void *pvBaseAddress )
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{
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unsigned portLONG ulISRStatus;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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portCHAR cChar;
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/* Determine the cause of the interrupt. */
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ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
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if( ( ulISRStatus & ( XUL_SR_RX_FIFO_FULL | XUL_SR_RX_FIFO_VALID_DATA ) ) != 0 )
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{
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/* A character is available - place it in the queue of received
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characters. This might wake a task that was blocked waiting for
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data. */
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cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
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xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
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}
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if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
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{
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/* There is space in the FIFO - if there are any characters queue for
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transmission they can be send to the UART now. This might unblock a
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task that was waiting for space to become available on the Tx queue. */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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{
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XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
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}
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}
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/* If we woke any tasks we may require a context switch. */
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if( xTaskWokenByTx || xTaskWokenByRx )
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{
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portYIELD_FROM_ISR();
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}
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}
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