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150 lines
5.3 KiB
C
150 lines
5.3 KiB
C
//*---------------------------------------------------------------------------
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//* ATMEL Microcontroller Software Support - ROUSSET -
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//*---------------------------------------------------------------------------
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//* The software is delivered "AS IS" without warranty or condition of any
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//* kind, either express, implied or statutory. This includes without
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//* limitation any warranty or condition with respect to merchantability or
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//* fitness for any particular purpose, or against the infringements of
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//* intellectual property rights of others.
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//*-----------------------------------------------------------------------------
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//* File Name : pio.h
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//* Object : Parallel I/O Definition File
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//* Translator : ARM Software Development Toolkit V2.11a
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//*
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//* 1.0 20/10/97 JCZ : Creation
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//* 2.0 21/10/98 JCZ : Clean up
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//*---------------------------------------------------------------------------
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#ifndef pio_h
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#define pio_h
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/*---------------------------------------------*/
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/* Parallel I/O Interface Structure Definition */
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/*---------------------------------------------*/
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typedef struct
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{
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at91_reg PIO_PER ; /* PIO Enable Register */
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at91_reg PIO_PDR ; /* PIO Disable Register */
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at91_reg PIO_PSR ; /* PIO Status Register */
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at91_reg Reserved0 ;
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at91_reg PIO_OER ; /* Output Enable Register */
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at91_reg PIO_ODR ; /* Output Disable Register */
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at91_reg PIO_OSR ; /* Output Status Register */
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at91_reg Reserved1 ;
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at91_reg PIO_IFER ; /* Input Filter Enable Register */
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at91_reg PIO_IFDR ; /* Input Filter Disable Register */
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at91_reg PIO_IFSR ; /* Input Filter Status Register */
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at91_reg Reserved2 ;
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at91_reg PIO_SODR ; /* Set Output Data Register */
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at91_reg PIO_CODR ; /* Clear Output Data Register */
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at91_reg PIO_ODSR ; /* Output Data Status Register */
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at91_reg PIO_PDSR ; /* Pin Data Status Register */
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at91_reg PIO_IER ; /* Interrupt Enable Register */
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at91_reg PIO_IDR ; /* Interrupt Disable Register */
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at91_reg PIO_IMR ; /* Interrupt Mask Register */
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at91_reg PIO_ISR ; /* Interrupt Status Register */
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} StructPIO ;
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/*-----------------------------*/
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/* PIO Handler type definition */
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/*-----------------------------*/
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//typedef void (*TypePIOHandler) ( StructPIO *pio_pt, u_int pio_mask ) ;
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/*--------------------------------*/
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/* Device Dependancies Definition */
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/*--------------------------------*/
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/* Number of PIO Controller */
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#define NB_PIO_CTRL 1
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/* Base Address */
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#define PIO_BASE ((StructPIO *) 0xFFFF0000 )
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/* Number of PIO Lines */
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#define NB_PIO 32
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/* Parallel I/O Bits Definition */
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#define P0 (1<<0)
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#define P1 (1<<1)
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#define P2 (1<<2)
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#define P3 (1<<3)
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#define P4 (1<<4)
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#define P5 (1<<5)
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#define P6 (1<<6)
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#define P7 (1<<7)
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#define P8 (1<<8)
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#define P9 (1<<9)
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#define P10 (1<<10)
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#define P11 (1<<11)
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#define P12 (1<<12)
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#define P13 (1<<13)
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#define P14 (1<<14)
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#define P15 (1<<15)
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#define P16 (1<<16)
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#define P17 (1<<17)
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#define P18 (1<<18)
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#define P19 (1<<19)
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#define P20 (1<<20)
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#define P21 (1<<21)
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#define P22 (1<<22)
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#define P23 (1<<23)
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#define P24 (1<<24)
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#define P25 (1<<25)
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#define P26 (1<<26)
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#define P27 (1<<27)
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#define P28 (1<<28)
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#define P29 (1<<29)
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#define P30 (1<<30)
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#define P31 (1<<31)
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/* PIO Multiplexing Definition */
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/* There is only one PIO Controller */
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#define PIO_CTRL 0
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#define PIO_TC0 PIO_CTRL
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#define TCLK0 P0
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#define TIOA0 P1
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#define TIOB0 P2
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#define PIN_TC0 (TIOA0|TIOB0|TCLK0)
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#define PIO_TC1 PIO_CTRL
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#define TCLK1 P3
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#define TIOA1 P4
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#define TIOB1 P5
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#define PIN_TC1 (TIOA1|TIOB1|TCLK1)
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#define PIO_TC2 PIO_CTRL
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#define TCLK2 P6
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#define TIOA2 P7
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#define TIOB2 P8
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#define PIN_TC2 (TIOA2|TIOB2|TCLK2)
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#define PIO_EXT_IRQ PIO_CTRL
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#define PIN_IRQ0 P9
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#define PIN_IRQ1 P10
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#define PIN_IRQ2 P11
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#define PIN_FIQ P12
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#define PIO_USART0 PIO_CTRL
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#define SCK0 P13
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#define TXD0 P14
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#define RXD0 P15
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#define PIN_USART0 (SCK0|TXD0|RXD0)
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#define PIO_USART1 PIO_CTRL
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#define SCK1 P20
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#define TXD1 P21
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#define RXD1 P22
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#define PIN_USART1 (SCK1|TXD1|RXD1)
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#define MCKO P25
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#define CS2 P26
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#define CS3 P27
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#define CS4 P31
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#define CS5 P30
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#define CS6 P29
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#define CS7 P28
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#endif /* pio_h */
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