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/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
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* File Name : 75x_pwm.c
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* Author : MCD Application Team
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* Date First Issued : 03/10/2006
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* Description : This file provides all the PWM software functions.
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********************************************************************************
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* History:
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* 07/17/2006 : V1.0
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* 03/10/2006 : V0.1
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "75x_pwm.h"
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#include "75x_mrcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* PWM interrupt masks */
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#define PWM_IT_Clear_Mask 0x7FFF
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#define PWM_IT_Enable_Mask 0xEFFF
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/* PWM_CR Masks bit */
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#define PWM_CounterMode_Mask 0xFF8F
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#define PWM_DBASE_Mask 0x077F
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#define PWM_MasterModeSelection_Mask 0xFC7F
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/* PWM Update flag selection Set/Reset value */
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#define PWM_UFS_Reset 0xFFFE
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#define PWM_UFS_Set 0x0001
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/* PWM Counter value */
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#define PWM_COUNTER_Reset 0x0002
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#define PWM_COUNTER_Start 0x0004
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#define PWM_COUNTER_Stop 0xFFFB
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/* PWM Debug Mode Set/Reset value */
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#define PWM_DBGC_Set 0x0400
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#define PWM_DBGC_Reset 0xFBFF
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/* PWM Output Compare Polarity Set/Reset value */
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#define PWM_OC1P_Set 0x0020
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#define PWM_OC1P_Reset 0xFFDF
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#define PWM_OC1NP_Set 0x0080
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#define PWM_OC1NP_Reset 0xFF7F
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#define PWM_OC2P_Set 0x2000
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#define PWM_OC2P_Reset 0xDFFF
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#define PWM_OC2NP_Set 0x8000
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#define PWM_OC2NP_Reset 0x7FFF
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#define PWM_OC3P_Set 0x0020
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#define PWM_OC3P_Reset 0xFFDF
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#define PWM_OC3NP_Set 0x0080
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#define PWM_OC3NP_Reset 0xFF7F
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/* PWM Output Compare control mode constant */
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#define PWM_OCControl_PWM 0x000C
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#define PWM_OCControl_OCToggle 0x0006
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#define PWM_OCControl_OCInactive 0x0004
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#define PWM_OCControl_OCActive 0x0002
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#define PWM_OCControl_OCTiming 0x0000
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/* PWM Output Compare mode Enable value */
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#define PWM_OC1_Enable 0x0010
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#define PWM_OC2_Enable 0x1000
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#define PWM_OC3_Enable 0x0010
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#define PWM_OC1_Disable 0xFFEF
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#define PWM_OC2_Disable 0xEFFF
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#define PWM_OC3_Disable 0xFFEF
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#define PWM_OC1N_Enable 0x0040
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#define PWM_OC2N_Enable 0x4000
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#define PWM_OC3N_Enable 0x0040
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#define PWM_OC1N_Disable 0xFFBF
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#define PWM_OC2N_Disable 0xBFFF
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#define PWM_OC3N_Disable 0xFFBF
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/* PWM Output Compare mode Mask value */
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#define PWM_OC1C_Mask 0xFFF1
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#define PWM_OC2C_Mask 0xF1FF
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#define PWM_OC3C_Mask 0xFFF1
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/* PWM Preload bit Set/Reset value */
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#define PWM_PLD1_Set 0x0001
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#define PWM_PLD2_Set 0x0100
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#define PWM_PLD3_Set 0x0001
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/* PWM OCRM Set/Reset value */
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#define PWM_OCMR_Set 0x0080
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#define PWM_OCMR_Reset 0xFF7F
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/* PWM_DTR bit Masks value */
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#define PWM_DTR_Mask 0xFC00
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#define PWM_LOCK_Mask 0xF3FF
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/* PWM MOE Set value */
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#define PWM_MOE_Set 0x8000
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#define PWM_MOE_Reset 0x7FFF
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/* PWM OSSR bit Set/Reset value */
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#define PWM_OSSR_Set 0x4000
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#define PWM_OSSR_Reset 0xBFFF
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/* Reset Register Masks */
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#define PWM_Prescaler_Reset_Mask 0x0000
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#define PWM_Pulse1_Reset_Mask 0x0000
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#define PWM_Pulse2_Reset_Mask 0x0000
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#define PWM_Pulse3_Reset_Mask 0x0000
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#define PWM_Period_Reset_Mask 0xFFFF
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#define PWM_RepetitionCounter_Reset_Mask 0x0000
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#define PWM_DeadTime_Reset_Mask 0x0000
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/* Private function prototypes -----------------------------------------------*/
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static void OCM_ModuleConfig(PWM_InitTypeDef* PWM_InitStruct);
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/* Private functions ---------------------------------------------------------*/
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/******************************************************************************
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* Function Name : PWM_DeInit
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* Description : Deinitializes PWM peripheral registers to their default reset
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* values.
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* Input : None
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_DeInit(void)
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{
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/* Enters and exits the PWM peripheral to and from reset */
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_PWM,ENABLE);
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MRCC_PeripheralSWResetConfig(MRCC_Peripheral_PWM,DISABLE);
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}
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/*******************************************************************************
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* Function Name : PWM_Init
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* Description : Initializes the PWM peripheral according to the specified
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* parameters in the PWM_InitStruct .
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* Input : PWM_InitStruct: pointer to a PWM_InitTypeDef structure that
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* contains the configuration information for the PWM peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_Init(PWM_InitTypeDef* PWM_InitStruct)
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{
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/* Sets the prescaler value */
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PWM->PSC = PWM_InitStruct->PWM_Prescaler;
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/* Selects the counter mode */
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PWM->CR &= PWM_CounterMode_Mask;
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PWM->CR |= PWM_InitStruct->PWM_CounterMode;
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/* Sets the period value */
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PWM->ARR = PWM_InitStruct->PWM_Period;
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/* Sets the repetition counter */
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PWM->RCR &= PWM_RepetitionCounter_Reset_Mask;
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PWM->RCR |= PWM_InitStruct->PWM_RepetitionCounter;
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/* Configures the PWM according to the PWM_InitTypeDef structure parameters */
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OCM_ModuleConfig(PWM_InitStruct);
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}
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/*******************************************************************************
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* Function Name : PWM_StructInit
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* Description : Fills each PWM_InitStruct member with its default value.
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* Input : PWM_InitStruct : pointer to a PWM_InitTypeDef structure which
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* will be initialized.
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* Output : None
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* Return : None.
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*******************************************************************************/
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void PWM_StructInit(PWM_InitTypeDef *PWM_InitStruct)
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{
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/* Sets the default configuration */
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PWM_InitStruct->PWM_Mode = PWM_Mode_OCTiming;
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PWM_InitStruct->PWM_Prescaler = PWM_Prescaler_Reset_Mask;
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PWM_InitStruct->PWM_CounterMode = PWM_CounterMode_Up;
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PWM_InitStruct->PWM_Period = PWM_Period_Reset_Mask;
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PWM_InitStruct->PWM_Complementary = PWM_Complementary_Disable;
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PWM_InitStruct->PWM_OCState = PWM_OCState_Disable;
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PWM_InitStruct->PWM_OCNState = PWM_OCNState_Disable;
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PWM_InitStruct->PWM_Channel = PWM_Channel_1;
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PWM_InitStruct->PWM_Pulse1 = PWM_Pulse1_Reset_Mask;
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PWM_InitStruct->PWM_Pulse2 = PWM_Pulse2_Reset_Mask;
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PWM_InitStruct->PWM_Pulse3 = PWM_Pulse3_Reset_Mask;
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PWM_InitStruct->PWM_Polarity1 = PWM_Polarity1_High;
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PWM_InitStruct->PWM_Polarity2 = PWM_Polarity2_High;
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PWM_InitStruct->PWM_Polarity3 = PWM_Polarity3_High;
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PWM_InitStruct->PWM_Polarity1N = PWM_Polarity1N_High;
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PWM_InitStruct->PWM_Polarity2N = PWM_Polarity2N_High;
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PWM_InitStruct->PWM_Polarity3N = PWM_Polarity3N_High;
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PWM_InitStruct->PWM_DTRAccess = PWM_DTRAccess_Disable;
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PWM_InitStruct->PWM_DeadTime = PWM_DeadTime_Reset_Mask;
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PWM_InitStruct->PWM_Emergency = PWM_Emergency_Disable;
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PWM_InitStruct->PWM_LOCKLevel = PWM_LOCKLevel_OFF;
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PWM_InitStruct->PWM_OSSIState = PWM_OSSIState_Disable;
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PWM_InitStruct->PWM_RepetitionCounter = PWM_RepetitionCounter_Reset_Mask;
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}
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/*******************************************************************************
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* Function Name : PWM_Cmd
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* Description : Enables or disables the PWM peripheral.
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* Input : Newstate: new state of the PWM peripheral.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_Cmd(FunctionalState Newstate)
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{
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if(Newstate == ENABLE)
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{
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PWM->CR |= PWM_COUNTER_Start;
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}
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else
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{
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PWM->CR &= PWM_COUNTER_Stop;
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}
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}
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/*******************************************************************************
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* Function Name : PWM_CtrlPWMOutputs
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* Description : Enables or disables PWM peripheral Main Outputs.
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* Input : Newstate: new state of the PWM peripheral Main Outputs.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_CtrlPWMOutputs(FunctionalState Newstate)
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{
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if(Newstate == ENABLE)
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{
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PWM->DTR |= PWM_MOE_Set;
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}
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else
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{
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PWM->DTR &= PWM_MOE_Reset;
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}
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}
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/*******************************************************************************
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* Function Name : PWM_ITConfig
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* Description : Enables or disables the PWM interrupts.
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* Input : - PWM_IT: specifies the PWM interrupts sources to be enabled
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* or disabled.
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* This parameter can be any combination of the following values:
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* - PWM_IT_OC1: PWM Output Compare 1 Interrupt source
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* - PWM_IT_OC2: PWM Output Compare 2 Interrupt source
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* - PWM_IT_OC3: PWM Output Compare 3 Interrupt source
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* - PWM_IT_Update: PWM update Interrupt source
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* - PWM_IT_Emergency: PWM Emergency interrupt source
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* - PWM_IT_GlobalUpdate: PWM global update Interrupt
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* source
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* - Newstate: new state of PWM interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_ITConfig(u16 PWM_IT, FunctionalState Newstate)
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{
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u16 PWM_IT_Enable = 0;
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PWM_IT_Enable = PWM_IT & PWM_IT_Enable_Mask;
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if(Newstate == ENABLE)
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{
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/* Update interrupt global source: overflow/undeflow, counter reset operation
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or slave mode controller in reset mode */
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if ((PWM_IT & PWM_IT_GlobalUpdate) == PWM_IT_GlobalUpdate)
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{
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PWM->CR &= PWM_UFS_Reset;
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}
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/* Update interrupt source: counter overflow/underflow */
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else if ((PWM_IT & PWM_IT_Update) == PWM_IT_Update)
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{
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PWM->CR |= PWM_UFS_Set;
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}
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/* Select and enable the interrupts requests */
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PWM->RSR |= PWM_IT_Enable;
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PWM->RER |= PWM_IT_Enable;
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}
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/* Disable the interrupts requests */
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else
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{
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PWM->RSR &= ~PWM_IT_Enable;
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PWM->RER &= ~PWM_IT_Enable;
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}
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}
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/*******************************************************************************
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* Function Name : PWM_DMAConfig
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* Description : Configures the PWM<57>s DMA interface.
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* Input : - PWM_DMASources: specifies the DMA Request sources.
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* This parameter can be any combination of the following values:
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* - PWM_DMASource_OC1: PWM Output Compare 1 DMA source
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* - PWM_DMASource_OC2: PWM Output Compare 2 DMA source
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* - PWM_DMASource_OC3: PWM Output Compare 3 DMA source
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* - PWM_DMASource_Update: PWM Update DMA source
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* - PWM_OCRMState: the state of output compare request mode.
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* This parameter can be one of the following values:
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* - PWM_OCRMState_Enable
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* - PWM_OCRMState_Disable
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* - PWM_DMABase:DMA Base address.
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* This parameter can be one of the following values:
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* PWM_DMABase_CR, PWM_DMABase_SCR, PWM_DMABase_OMR1,
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* PWM_DMABase_OMR2, PWM_DMABase_RSR, PWM_DMABase_RER,
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* PWM_DMABase_ISR, PWM_DMABase_CNT, PWM_DMABase_PSC,
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* PWM_DMABase_RCR, PWM_DMABase_ARR, PWM_DMABase_OCR1,
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* PWM_DMABase_OCR2, PWM_DMABase_OCR3 ,PWM_DMABase_DTR.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_DMAConfig(u16 PWM_DMASources, u16 PWM_OCRMState, u16 PWM_DMABase)
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{
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/* Select the DMA requests */
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PWM->RSR &= ~PWM_DMASources;
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/* Sets the OCRM state */
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if(PWM_OCRMState == PWM_OCRMState_Enable)
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{
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PWM->RSR |= PWM_OCMR_Set;
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}
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else
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{
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PWM->RSR &= PWM_OCMR_Reset;
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}
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/* Sets the DMA Base address */
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PWM->CR &= PWM_DBASE_Mask;
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PWM->CR |= PWM_DMABase;
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}
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/*******************************************************************************
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* Function Name : PWM_DMACmd
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* Description : Enables or disables the PWM<57>s DMA interface.
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* Input : - PWM_DMASources: specifies the DMA Request sources.
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* This parameter can be any combination of the following values:
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* - PWM_DMASource_OC1: PWM Output Compare 1 DMA source
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* - PWM_DMASource_OC2: PWM Output Compare 2 DMA source
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* - PWM_DMASource_OC3: PWM Output Compare 3 DMA source
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* - PWM_DMASource_Update: PWM Update DMA source
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* - Newstate: new state of the DMA Request sources.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_DMACmd(u16 PWM_DMASources, FunctionalState Newstate)
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{
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if(Newstate == ENABLE)
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{
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PWM->RER |= PWM_DMASources;
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}
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else
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{
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PWM->RER &= ~PWM_DMASources;
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}
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}
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/*******************************************************************************
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* Function Name : PWM_SetPrescaler
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* Description : Sets the PWM prescaler value.
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* Input : Prescaler: PWM prescaler new value.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_SetPrescaler(u16 Prescaler)
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{
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PWM->PSC = Prescaler;
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}
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/*******************************************************************************
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* Function Name : PWM_SetPeriod
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* Description : Sets the PWM period value.
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* Input : Period: PWM period new value.
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* Output : None
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* Return : None
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*******************************************************************************/
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void PWM_SetPeriod(u16 Period)
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{
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PWM->ARR = Period;
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}
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/*******************************************************************************
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* Function Name : PWM_SetPulse
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* Description : Sets the PWM pulse value.
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* Input : - PWM_Channel: specifies the PWM channel to be used.
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* This parameter can be one of the following values:
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* - PWM_Channel_1: PWM Channel 1 is used
|
|
|
* - PWM_Channel_2: PWM Channel 2 is used
|
|
|
* - PWM_Channel_3: PWM Channel 3 is used
|
|
|
* - PWM_Channel_ALL: PWM Channel 1, Channel 2 and 3 are used
|
|
|
* - Pulse: PWM pulse new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_SetPulse(u16 PWM_Channel, u16 Pulse)
|
|
|
{
|
|
|
/* Sets Channel 1 pulse value */
|
|
|
if(PWM_Channel == PWM_Channel_1)
|
|
|
{
|
|
|
PWM->OCR1 = Pulse;
|
|
|
}
|
|
|
/* Sets Channel 2 pulse value */
|
|
|
else if(PWM_Channel == PWM_Channel_2)
|
|
|
{
|
|
|
PWM->OCR2 = Pulse;
|
|
|
}
|
|
|
/* Sets Channel 3 pulse value */
|
|
|
else if(PWM_Channel == PWM_Channel_3)
|
|
|
{
|
|
|
PWM->OCR3 = Pulse;
|
|
|
}
|
|
|
/* Sets Channel 1, Channel 2 and Channel 3 pulse values */
|
|
|
else if(PWM_Channel == PWM_Channel_ALL)
|
|
|
{
|
|
|
PWM->OCR1 = Pulse;
|
|
|
PWM->OCR2 = Pulse;
|
|
|
PWM->OCR3 = Pulse;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_SetPulse1
|
|
|
* Description : Sets the PWM Channel 1 pulse value.
|
|
|
* Input : - Pulse: PWM Channel 1 pulse new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_SetPulse1(u16 Pulse)
|
|
|
{
|
|
|
PWM->OCR1 = Pulse;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_SetPulse2
|
|
|
* Description : Sets the PWM Channel 2 pulse value.
|
|
|
* Input : - Pulse: PWM Channel 2 pulse new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_SetPulse2(u16 Pulse)
|
|
|
{
|
|
|
PWM->OCR2 = Pulse;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_SetPulse3
|
|
|
* Description : Sets the PWM Channel 3 pulse value.
|
|
|
* Input : - Pulse: PWM Channel 3 pulse new value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_SetPulse3(u16 Pulse)
|
|
|
{
|
|
|
PWM->OCR3 = Pulse;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_DebugCmd
|
|
|
* Description : Enables or disables PWM peripheral Debug control.
|
|
|
* Input : Newstate: new state of the PWM Debug control.
|
|
|
* This parameter can be: ENABLE or DISABLE.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_DebugCmd(FunctionalState Newstate)
|
|
|
{
|
|
|
if(Newstate == ENABLE)
|
|
|
{
|
|
|
PWM->CR |= PWM_DBGC_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->CR &= PWM_DBGC_Reset;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_CounterModeConfig
|
|
|
* Description : Specifies the Counter Mode to be used.
|
|
|
* Input : PWM_CounterMode: specifies the Counter Mode to be used
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_CounterMode_Up: PWM Up Counting Mode
|
|
|
* - PWM_CounterMode_Down: PWM Down Counting Mode
|
|
|
* - PWM_CounterMode_CenterAligned1: PWM Center Aligned1 Mode
|
|
|
* - PWM_CounterMode_CenterAligned2: PWM Center Aligned2 Mode
|
|
|
* - PWM_CounterMode_CenterAligned3: PWM Center Aligned3 Mode
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_CounterModeConfig(u16 PWM_CounterMode)
|
|
|
{
|
|
|
/* Counter mode configuration */
|
|
|
PWM->CR &= PWM_CounterMode_Mask;
|
|
|
PWM->CR |= PWM_CounterMode;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_ForcedOCConfig
|
|
|
* Description : Forces the PWM output waveform to active or inactive level.
|
|
|
* Input : - PWM_Channel: specifies the PWM channel to be used.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_Channel_1: PWM Channel 1 is used
|
|
|
* - PWM_Channel_2: PWM Channel 2 is used
|
|
|
* - PWM_Channel_3: PWM Channel 3 is used
|
|
|
* - PWM_Channel_ALL: PWM Channel 1, Channel 2 and 3 are used
|
|
|
* - PWM_ForcedAction: specifies the forced Action to be set to the
|
|
|
* output waveform.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_ForcedAction_Active: Force active level on OCxREF
|
|
|
* - PWM_ForcedAction_InActive: Force inactive level on
|
|
|
* OCxREF
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_ForcedOCConfig(u16 PWM_Channel, u16 PWM_ForcedAction)
|
|
|
{
|
|
|
/* Channel 1 Forced Output Compare mode configuration */
|
|
|
if(PWM_Channel == PWM_Channel_1)
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1C_Mask;
|
|
|
PWM->OMR1 |= PWM_ForcedAction;
|
|
|
}
|
|
|
/* Channel 2 Forced Output Compare mode configuration */
|
|
|
else
|
|
|
{
|
|
|
if(PWM_Channel == PWM_Channel_2)
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2C_Mask;
|
|
|
PWM->OMR1 |= (PWM_ForcedAction<<8);
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
/* Channel 3 Forced Output Compare mode configuration */
|
|
|
if(PWM_Channel == PWM_Channel_3)
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3C_Mask;
|
|
|
PWM->OMR2 |= PWM_ForcedAction;
|
|
|
}
|
|
|
/* Channel 1, Channel 2 and Channel 3 Forced Output Compare mode
|
|
|
configuration */
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1C_Mask;
|
|
|
PWM->OMR1 |= PWM_ForcedAction;
|
|
|
|
|
|
PWM->OMR1 &= PWM_OC2C_Mask;
|
|
|
PWM->OMR1 |= (PWM_ForcedAction<<8);
|
|
|
|
|
|
PWM->OMR2 &= PWM_OC3C_Mask;
|
|
|
PWM->OMR2 |= PWM_ForcedAction;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_SetDeadTime
|
|
|
* Description : Inserts dead time between the OCx and OCNx.
|
|
|
* Input : DeadTime: PWM Dead Time value.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_SetDeadTime(u16 DeadTime)
|
|
|
{
|
|
|
/* Sets the dead time value */
|
|
|
PWM->DTR &= PWM_DTR_Mask;
|
|
|
PWM->DTR |= DeadTime;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_ResetCounter
|
|
|
* Description : Re-intializes the PWM counter and generates an update of the
|
|
|
* registers.
|
|
|
* Input : None
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_ResetCounter(void)
|
|
|
{
|
|
|
/* Resets the PWM counter */
|
|
|
PWM->CR |= PWM_COUNTER_Reset;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_TRGOSelection
|
|
|
* Description : Sets the PWM Master Mode selection bits.
|
|
|
* Input : PWM_TRGOMode: specifies the TRGO source.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_TRGOMode_Enable: The CNT_EN bit is used as TRGO
|
|
|
* - PWM_TRGOMode_Update: The Update event is used as TRGO
|
|
|
* - PWM_TRGOMode_Reset: The CNT_RST bit is used as TRGO
|
|
|
* - PWM_TRGOMode_OC: The OC1 signal is used as TRGO
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_TRGOSelection(u16 PWM_TRGOMode)
|
|
|
{
|
|
|
/* Sets the synchronization action */
|
|
|
PWM->CR &= PWM_MasterModeSelection_Mask;
|
|
|
PWM->CR |= PWM_TRGOMode;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_GetFlagStatus
|
|
|
* Description : Checks whether the specified PWM flag is set or not.
|
|
|
* Input : PWM_FLAG: specifies the flag to check.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_FLAG_OC1: Output Compare 1 Flag
|
|
|
* - PWM_FLAG_OC2: Output Compare 2 Flag
|
|
|
* - PWM_FLAG_OC3: Output Compare 3 Flag
|
|
|
* - PWM_FLAG_Update: PWM update Flag
|
|
|
* - PWM_FLAG_Emergency: PWM Emergency Flag
|
|
|
* Output : None
|
|
|
* Return : The new state of the PWM_FLAG(SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
FlagStatus PWM_GetFlagStatus(u16 PWM_FLAG)
|
|
|
{
|
|
|
if((PWM->ISR & PWM_FLAG) != RESET )
|
|
|
{
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_ClearFlag
|
|
|
* Description : Clears the PWM<57>s pending flags.
|
|
|
* Input : PWM_FLAG: specifies the flag to clear.
|
|
|
* This parameter can be any combination of the following values:
|
|
|
* - PWM_FLAG_OC1: Output Compare 1 flag
|
|
|
* - PWM_FLAG_OC2: Output Compare 2 flag
|
|
|
* - PWM_FLAG_OC3: Output Compare 3 flag
|
|
|
* - PWM_FLAG_Update: PWM update flag
|
|
|
* - PWM_FLAG_Emergency: PWM Emergency flag
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_ClearFlag(u16 PWM_FLAG)
|
|
|
{
|
|
|
/* Clears the flags */
|
|
|
PWM->ISR &= ~PWM_FLAG;
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_GetITStatus
|
|
|
* Description : Checks whether the PWM interrupt has occurred or not.
|
|
|
* Input : PWM_IT: specifies the PWM interrupt source to check.
|
|
|
* This parameter can be one of the following values:
|
|
|
* - PWM_IT_OC1: PWM Output Compare 1 Interrupt source
|
|
|
* - PWM_IT_OC2: PWM Output Compare 2 Interrupt source
|
|
|
* - PWM_IT_OC3: PWM Output Compare 3 Interrupt source
|
|
|
* - PWM_IT_Update: PWM update Interrupt source
|
|
|
* - PWM_IT_Emergency: PWM Emergency interrupt source
|
|
|
* - PWM_IT_GlobalUpdate: PWM global update Interrupt
|
|
|
* source
|
|
|
* Output : None
|
|
|
* Return : The new state of the PWM_IT(SET or RESET).
|
|
|
*******************************************************************************/
|
|
|
ITStatus PWM_GetITStatus(u16 PWM_IT)
|
|
|
{
|
|
|
u16 PWM_IT_Check = 0;
|
|
|
|
|
|
/* Calculates the pending bits to be checked */
|
|
|
PWM_IT_Check = PWM_IT & PWM_IT_Clear_Mask;
|
|
|
|
|
|
if((PWM->ISR & PWM_IT_Check) != RESET )
|
|
|
{
|
|
|
return SET;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
return RESET;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : PWM_ClearITPendingBit
|
|
|
* Description : Clears the PWM's interrupt pending bits.
|
|
|
* Input : PWM_IT: specifies the pending bit to clear.
|
|
|
* This parameter can be any combination of the following values:
|
|
|
* - PWM_IT_OC1: PWM Output Compare 1 Interrupt source
|
|
|
* - PWM_IT_OC2: PWM Output Compare 2 Interrupt source
|
|
|
* - PWM_IT_OC3: PWM Output Compare 3 Interrupt source
|
|
|
* - PWM_IT_Update: PWM update Interrupt source
|
|
|
* - PWM_IT_Emergency: PWM Emergency interrupt source
|
|
|
* - PWM_IT_GlobalUpdate: PWM global update Interrupt
|
|
|
* source
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
void PWM_ClearITPendingBit(u16 PWM_IT)
|
|
|
{
|
|
|
u16 PWM_IT_Clear = 0;
|
|
|
|
|
|
/* Calculates the pending bits to be cleared */
|
|
|
PWM_IT_Clear = PWM_IT & PWM_IT_Clear_Mask;
|
|
|
|
|
|
/* Clears the pending bits */
|
|
|
PWM->ISR &= ~PWM_IT_Clear;
|
|
|
|
|
|
}
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* Function Name : OCM_ModuleConfig
|
|
|
* Description : Output Compare Module configuration.
|
|
|
* Input : PWM_InitStruct: pointer to a PWM_InitTypeDef structure that
|
|
|
* contains the configuration information for the PWM peripheral.
|
|
|
* Output : None
|
|
|
* Return : None
|
|
|
*******************************************************************************/
|
|
|
static void OCM_ModuleConfig(PWM_InitTypeDef* PWM_InitStruct)
|
|
|
{
|
|
|
u16 PWM_OCControl = 0x0000;
|
|
|
u16 DTR_REG = 0x0000;
|
|
|
|
|
|
if(PWM_InitStruct->PWM_Mode == PWM_Mode_OCTiming)
|
|
|
{
|
|
|
PWM_OCControl = PWM_OCControl_OCTiming;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(PWM_InitStruct->PWM_Mode == PWM_Mode_OCActive)
|
|
|
{
|
|
|
PWM_OCControl = PWM_OCControl_OCActive;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(PWM_InitStruct->PWM_Mode == PWM_Mode_OCInactive)
|
|
|
{
|
|
|
PWM_OCControl = PWM_OCControl_OCInactive;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if(PWM_InitStruct->PWM_Mode == PWM_Mode_OCToggle)
|
|
|
{
|
|
|
PWM_OCControl = PWM_OCControl_OCToggle;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM_OCControl = PWM_OCControl_PWM;
|
|
|
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/* Read DTR register */
|
|
|
DTR_REG = PWM->DTR & 0x8000;
|
|
|
|
|
|
/*Channel 1 Configuration-----------------------------------------------------*/
|
|
|
if(PWM_InitStruct->PWM_Channel == PWM_Channel_1)
|
|
|
{
|
|
|
/* PWM Output Complementary Configuration */
|
|
|
if(PWM_InitStruct->PWM_Complementary == PWM_Complementary_Enable)
|
|
|
{
|
|
|
/* Configures Channel 1 on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC1C_Mask;
|
|
|
PWM->OMR1 |= PWM_OCControl|PWM_OC1_Enable|PWM_OC1N_Enable|PWM_PLD1_Set;
|
|
|
PWM->OCR1 = PWM_InitStruct->PWM_Pulse1;
|
|
|
|
|
|
/* Sets the OC1 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity1 == PWM_Polarity1_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Sets the OC1N wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity1N == PWM_Polarity1N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1NP_Reset;
|
|
|
}
|
|
|
}/* End complementary case */
|
|
|
/* Single PWM Output configuratuion */
|
|
|
else
|
|
|
{
|
|
|
switch(PWM_InitStruct->PWM_OCState)
|
|
|
{
|
|
|
case PWM_OCState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 1 on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC1C_Mask;
|
|
|
PWM->OMR1 |= PWM_OCControl|PWM_OC1_Enable;
|
|
|
PWM->OMR1 |= PWM_PLD1_Set;
|
|
|
PWM->OCR1 = PWM_InitStruct->PWM_Pulse1;
|
|
|
|
|
|
/* Sets the OC1 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity1 == PWM_Polarity1_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_Disable:
|
|
|
{
|
|
|
/* OC1E = 0 and OSSR = 0 sets the polarity */
|
|
|
PWM->OMR1 &= PWM_OC1_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_OffState:
|
|
|
{
|
|
|
/* OC1E = 0 and OSSR = 1 and sets the polarity */
|
|
|
PWM->OMR1 &= PWM_OC1_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
/* Sets the OC1 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity1 == PWM_Polarity1_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
switch(PWM_InitStruct->PWM_OCNState)
|
|
|
{
|
|
|
case PWM_OCNState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 1N on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC1C_Mask;
|
|
|
PWM->OMR1 |= PWM_OCControl |PWM_OC1N_Enable |PWM_PLD1_Set;
|
|
|
PWM->OCR1 = PWM_InitStruct->PWM_Pulse1;
|
|
|
|
|
|
/* Sets the OC1N wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity1N == PWM_Polarity1N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_Disable:
|
|
|
{
|
|
|
/* OC1N = 0 OSSR = 0 */
|
|
|
PWM->OMR1 &= PWM_OC1N_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_OffState:
|
|
|
{
|
|
|
/* OC1N = 0 OSSR = 1 and sets the polarity */
|
|
|
PWM->OMR1 &= PWM_OC1N_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
if(PWM_InitStruct->PWM_Polarity1N == PWM_Polarity1N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC1NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC1NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
} /* End not complementary case */
|
|
|
}/* end channel 1 */
|
|
|
|
|
|
/*Channel 2 Configuration-----------------------------------------------------*/
|
|
|
if(PWM_InitStruct->PWM_Channel == PWM_Channel_2)
|
|
|
{
|
|
|
/* PWM Output Complementary Configuration */
|
|
|
if(PWM_InitStruct->PWM_Complementary == PWM_Complementary_Enable)
|
|
|
{
|
|
|
/* Configures Channel 2 on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC2C_Mask;
|
|
|
PWM->OMR1 |= (PWM_OCControl<<8)|PWM_OC2_Enable|PWM_OC2N_Enable|PWM_PLD2_Set;
|
|
|
PWM->OCR2 = PWM_InitStruct->PWM_Pulse2;
|
|
|
|
|
|
/* Set the OC2 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity2 == PWM_Polarity2_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Sets the OC2N wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity2N == PWM_Polarity2N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2NP_Reset;
|
|
|
}
|
|
|
|
|
|
}/* End complentary case */
|
|
|
else
|
|
|
/* Single PWM Output configuratuion */
|
|
|
{
|
|
|
switch(PWM_InitStruct->PWM_OCState)
|
|
|
{
|
|
|
case PWM_OCState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 2 on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC2C_Mask;
|
|
|
PWM->OMR1 |= (PWM_OCControl<<8)|PWM_OC2_Enable|PWM_PLD2_Set;
|
|
|
PWM->OCR2 = PWM_InitStruct->PWM_Pulse2;
|
|
|
|
|
|
/* Sets the OC2 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity2 == PWM_Polarity2_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_Disable:
|
|
|
{
|
|
|
/* OC2E = 0 and OSSR = 0 */
|
|
|
PWM->OMR1 &= PWM_OC2_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_OffState:
|
|
|
{
|
|
|
/* OC2E = 0 and OSSR = 1 sets the polarity */
|
|
|
PWM->OMR1 &= PWM_OC2_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
/* Sets the OC2 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity2 == PWM_Polarity2_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
switch(PWM_InitStruct->PWM_OCNState)
|
|
|
{
|
|
|
case PWM_OCNState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 2N on Output Compare mode */
|
|
|
PWM->OMR1 &= PWM_OC2C_Mask;
|
|
|
PWM->OMR1 |= (PWM_OCControl<<8)|PWM_OC2N_Enable|PWM_PLD2_Set;
|
|
|
PWM->OCR2 = PWM_InitStruct->PWM_Pulse2;
|
|
|
|
|
|
/* Sets the OC2 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity2N == PWM_Polarity2N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_Disable:
|
|
|
{
|
|
|
/* OC2N = 0 OSSR = 0 */
|
|
|
PWM->OMR1 &= PWM_OC2N_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_OffState:
|
|
|
{
|
|
|
/* OC2N = 0 OSSR = 1 and sets the polarity */
|
|
|
PWM->OMR1 &= PWM_OC2N_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
if(PWM_InitStruct->PWM_Polarity2N == PWM_Polarity2N_Low)
|
|
|
{
|
|
|
PWM->OMR1 |= PWM_OC2NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR1 &= PWM_OC2NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
} /* End not complementary case */
|
|
|
}/* end channel 2 */
|
|
|
|
|
|
/*Channel 3 Configuration-----------------------------------------------------*/
|
|
|
if(PWM_InitStruct->PWM_Channel == PWM_Channel_3)
|
|
|
{
|
|
|
/* PWM Output Complementary Configuration */
|
|
|
if(PWM_InitStruct->PWM_Complementary == PWM_Complementary_Enable)
|
|
|
{
|
|
|
/* Configures Channel 3 on Output Compare mode */
|
|
|
PWM->OMR2 &= PWM_OC3C_Mask;
|
|
|
PWM->OMR2 |= PWM_OCControl|PWM_OC3_Enable|PWM_OC3N_Enable|PWM_PLD3_Set;
|
|
|
PWM->OCR3 = PWM_InitStruct->PWM_Pulse3;
|
|
|
|
|
|
/* Sets the OC3 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity3 == PWM_Polarity3_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3P_Reset;
|
|
|
}
|
|
|
|
|
|
/* Sets the OC3N wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity3N == PWM_Polarity3N_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3NP_Reset;
|
|
|
}
|
|
|
}/* End complementary case */
|
|
|
else
|
|
|
/* Single PWM Output configuratuion */
|
|
|
{
|
|
|
switch(PWM_InitStruct->PWM_OCState)
|
|
|
{
|
|
|
case PWM_OCState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 3 on Output Compare mode */
|
|
|
PWM->OMR2 &= PWM_OC3C_Mask;
|
|
|
PWM->OMR2 |= PWM_OCControl|PWM_OC3_Enable|PWM_PLD3_Set;
|
|
|
PWM->OCR3 = PWM_InitStruct->PWM_Pulse3;
|
|
|
|
|
|
/* Sets the OCC wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity3 == PWM_Polarity3_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_Disable:
|
|
|
{
|
|
|
/* OC3E = 0 and OSSR = 0 */
|
|
|
PWM->OMR2 &= PWM_OC3_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCState_OffState:
|
|
|
{
|
|
|
/* OC3E = 0 and OSSR = 1 sets the polarity */
|
|
|
PWM->OMR2 &= PWM_OC3_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
if(PWM_InitStruct->PWM_Polarity3 == PWM_Polarity3_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3P_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3P_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
switch(PWM_InitStruct->PWM_OCNState)
|
|
|
{
|
|
|
case PWM_OCNState_Enable:
|
|
|
{
|
|
|
/* Configures Channel 3N on Output Compare mode */
|
|
|
PWM->OMR2 &= PWM_OC3C_Mask;
|
|
|
PWM->OMR2 |= PWM_OCControl |PWM_OC3N_Enable|PWM_PLD3_Set;
|
|
|
PWM->OCR3 = PWM_InitStruct->PWM_Pulse3;
|
|
|
|
|
|
/* Sets the OC3 wave polarity */
|
|
|
if(PWM_InitStruct->PWM_Polarity3N == PWM_Polarity3N_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_Disable:
|
|
|
{
|
|
|
/* OC3N = 0 OSSR = 0 */
|
|
|
PWM->OMR2 &= PWM_OC3N_Disable;
|
|
|
DTR_REG &= PWM_OSSR_Reset;
|
|
|
}
|
|
|
break;
|
|
|
case PWM_OCNState_OffState:
|
|
|
{
|
|
|
/* OC3N = 0 OSSR = 1 and sets the polarity */
|
|
|
PWM->OMR2 &= PWM_OC3N_Disable;
|
|
|
DTR_REG |= PWM_OSSR_Set;
|
|
|
|
|
|
if(PWM_InitStruct->PWM_Polarity3N == PWM_Polarity3N_Low)
|
|
|
{
|
|
|
PWM->OMR2 |= PWM_OC3NP_Set;
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
PWM->OMR2 &= PWM_OC3NP_Reset;
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
} /* End not complementary case */
|
|
|
}/* end channel 3 */
|
|
|
|
|
|
if(PWM_InitStruct->PWM_DTRAccess == PWM_DTRAccess_Enable)
|
|
|
{
|
|
|
DTR_REG |= PWM_InitStruct->PWM_LOCKLevel | PWM_InitStruct->PWM_Emergency |
|
|
|
PWM_InitStruct->PWM_DeadTime | PWM_InitStruct->PWM_OSSIState;
|
|
|
PWM->DTR = DTR_REG;
|
|
|
}
|
|
|
}
|
|
|
/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|