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236 lines
7.3 KiB
C
236 lines
7.3 KiB
C
/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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with commercial development and support options.
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***************************************************************************
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*/
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/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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NOTE: This driver is primarily to test the scheduler functionality. It does
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not effectively use the buffers or DMA and is therefore not intended to be
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an example of an efficient driver. */
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/* Standard include file. */
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#include <stdlib.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo app include files. */
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#include "serial.h"
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/* Hardware setup. */
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#define serOUTPUT 0
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#define serINPUT 1
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#define serLOW_SPEED 0
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#define serONE_STOP_BIT 0
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#define serEIGHT_DATA_BITS_NO_PARITY 0
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#define serNORMAL_IDLE_STATE 0
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#define serAUTO_BAUD_OFF 0
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#define serLOOPBACK_OFF 0
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#define serWAKE_UP_DISABLE 0
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#define serNO_HARDWARE_FLOW_CONTROL 0
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#define serSTANDARD_IO 0
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#define serNO_IRDA 0
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#define serCONTINUE_IN_IDLE_MODE 0
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#define serUART_ENABLED 1
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#define serINTERRUPT_ON_SINGLE_CHAR 0
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#define serTX_ENABLE 1
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#define serINTERRUPT_ENABLE 1
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#define serINTERRUPT_DISABLE 0
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#define serCLEAR_FLAG 0
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#define serSET_FLAG 1
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/* The queues used to communicate between tasks and ISR's. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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static portBASE_TYPE xTxHasEnded;
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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portCHAR cChar;
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/* Create the queues used by the com test task. */
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xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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/* Setup the UART. */
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U2MODEbits.BRGH = serLOW_SPEED;
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U2MODEbits.STSEL = serONE_STOP_BIT;
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U2MODEbits.PDSEL = serEIGHT_DATA_BITS_NO_PARITY;
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U2MODEbits.RXINV = serNORMAL_IDLE_STATE;
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U2MODEbits.ABAUD = serAUTO_BAUD_OFF;
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U2MODEbits.LPBACK = serLOOPBACK_OFF;
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U2MODEbits.WAKE = serWAKE_UP_DISABLE;
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U2MODEbits.UEN = serNO_HARDWARE_FLOW_CONTROL;
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U2MODEbits.IREN = serNO_IRDA;
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U2MODEbits.USIDL = serCONTINUE_IN_IDLE_MODE;
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U2MODEbits.UARTEN = serUART_ENABLED;
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U2BRG = (unsigned portSHORT)(( (float)configCPU_CLOCK_HZ / ( (float)16 * (float)ulWantedBaud ) ) - (float)0.5);
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U2STAbits.URXISEL = serINTERRUPT_ON_SINGLE_CHAR;
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U2STAbits.UTXEN = serTX_ENABLE;
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U2STAbits.UTXINV = serNORMAL_IDLE_STATE;
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U2STAbits.UTXISEL0 = serINTERRUPT_ON_SINGLE_CHAR;
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U2STAbits.UTXISEL1 = serINTERRUPT_ON_SINGLE_CHAR;
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/* It is assumed that this function is called prior to the scheduler being
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started. Therefore interrupts must not be allowed to occur yet as they
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may attempt to perform a context switch. */
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portDISABLE_INTERRUPTS();
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IFS1bits.U2RXIF = serCLEAR_FLAG;
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IFS1bits.U2TXIF = serCLEAR_FLAG;
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IPC7bits.U2RXIP = configKERNEL_INTERRUPT_PRIORITY;
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IPC7bits.U2TXIP = configKERNEL_INTERRUPT_PRIORITY;
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IEC1bits.U2TXIE = serINTERRUPT_ENABLE;
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IEC1bits.U2RXIE = serINTERRUPT_ENABLE;
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/* Clear the Rx buffer. */
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while( U2STAbits.URXDA == serSET_FLAG )
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{
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cChar = U2RXREG;
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}
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xTxHasEnded = pdTRUE;
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return NULL;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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/* Only one port is supported. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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/* Only one port is supported. */
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( void ) pxPort;
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/* Return false if after the block time there is no room on the Tx queue. */
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if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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{
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return pdFAIL;
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}
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/* A critical section should not be required as xTxHasEnded will not be
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written to by the ISR if it is already 0 (is this correct?). */
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if( xTxHasEnded )
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{
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xTxHasEnded = pdFALSE;
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IFS1bits.U2TXIF = serSET_FLAG;
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}
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return pdPASS;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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}
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/*-----------------------------------------------------------*/
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void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
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{
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portCHAR cChar;
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portBASE_TYPE xYieldRequired = pdFALSE;
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/* Get the character and post it on the queue of Rxed characters.
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If the post causes a task to wake force a context switch as the woken task
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may have a higher priority than the task we have interrupted. */
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IFS1bits.U2RXIF = serCLEAR_FLAG;
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while( U2STAbits.URXDA )
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{
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cChar = U2RXREG;
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xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
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}
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if( xYieldRequired != pdFALSE )
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{
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taskYIELD();
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}
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}
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/*-----------------------------------------------------------*/
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void __attribute__((__interrupt__, auto_psv)) _U2TXInterrupt( void )
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{
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signed portCHAR cChar;
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portBASE_TYPE xTaskWoken = pdFALSE;
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/* If the transmit buffer is full we cannot get the next character.
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Another interrupt will occur the next time there is space so this does
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not matter. */
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IFS1bits.U2TXIF = serCLEAR_FLAG;
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while( !( U2STAbits.UTXBF ) )
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{
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
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{
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/* Send the next character queued for Tx. */
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U2TXREG = cChar;
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}
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else
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{
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/* Queue empty, nothing to send. */
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xTxHasEnded = pdTRUE;
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break;
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}
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}
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if( xTaskWoken != pdFALSE )
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{
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taskYIELD();
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}
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}
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