Update RISC-V Qemu Virt GCC Readme + Makefile (#873)
Update Readme instructions and add troubleshooting tips for issues seen on Ubuntu and include a description of where to find various crosstools-ng flags.pull/875/head
Kody Stribrny
2 years ago
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# Emulating generic RISC-V 32bit machine on QEMU
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There is an updated version of this original submission from Katsuhiro Suzuki
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in the FreeRTOS/Demo/RISC-V_RV32_QEMU_VIRT_GCC directory.
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# Emulating generic RISC-V 32bit machine on QEMU
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## Demo Summary
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This demo prints Tx/Rx message of queue to serial port, using no
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other hardware and usinh only the primary core (currently hart 0).
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Other cores are simply going to wfi state and execute nothing else.
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## Requirements
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1. GNU RISC-V toolchains (tested on Crosstool-NG)
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1. GNU RISC-V toolchains (tested on [SiFive](https://www.sifive.com/software) + [Crosstool-NG](https://github.com/crosstool-ng/crosstool-ng) toolchains)
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1. qemu-riscv32-system (tested on Debian 10 package)
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1. Linux OS (tested on Debian 10)
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1. Linux OS (tested on Debian 10/Ubuntu)
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## How to build toolchain
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## Prerequisites
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### QEMU installation
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This is OS specific. For Debian, some general instructions can be found [here](https://wiki.debian.org/RISC-V/32).
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Clone the Crosstool-NG and build.
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### RISC-V Toolchain Setup
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You can download a RISC-V toolchain from SiFive at [this url](https://www.sifive.com/software). You'll need to extract this somewhere you'll remember as you need to add it to your PATH.
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You can add the toolchain to you path with the following command
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```
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$ git clone https://github.com/crosstool-ng/crosstool-ng
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$ ./configure --enable-local
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$ make
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$ ./ct-ng menuconfig
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export PATH=<your-toolchain-path>/<your-toolchain>/bin:$PATH
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```
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Change the following configs:
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For example, if you install the SiFive v2020.12.8 toolchain on an Ubuntu machine in your user home directory, it would be something like
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```
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_ARCH_64=y
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CT_ARCH_ARCH=rv32ima
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CT_ARCH_ABI=ilp32
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CT_MULTILIB=y
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CT_DEBUG_GDB=y
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export PATH=~/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin:$PATH
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```
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Build the GNU toolchain for RISC-V.
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___________
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## Building and Running the Demo
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The demo is built using a makefile, so the command to build the demo is simply...
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```
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$ ./ct-ng build
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make
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```
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This file can become important if you want to change your RISC-V microarchitecture or Application Binary Interface (ABI).
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A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory.
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## How to build
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To run the demo in Qemu...
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```
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qemu-system-riscv32 -nographic -machine virt -net none \
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-chardev stdio,id=con,mux=on -serial chardev:con \
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-mon chardev=con,mode=readline -bios none \
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-smp 4 -kernel ./build/RTOSDemo.axf
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```
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Add path of toolchain that is described above section.
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This command is quite lengthy but essentially spins up an emulated 32-bit RISC-V procressor without any display running the demo you just built as the kernel on 4 simulated cores. Textual output of this simulation will be directed to standard I/O.
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## Building and Debugging the Demo
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The debuggable demo is also built using a makefile, so the command to build the demo is simply...
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```
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$ export PATH=~/x-tools/riscv64-unknown-elf:$PATH
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make DEBUG=1
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```
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Notice the addition of the `DEBUG=1` parameter. This is what tells the makefile to include debugging information when building the demo.
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For release build:
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To run the demo in Qemu...
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```
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$ make
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qemu-system-riscv32 -nographic -machine virt -net none \
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-chardev stdio,id=con,mux=on -serial chardev:con \
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-mon chardev=con,mode=readline -bios none \
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-smp 4 -kernel ./build/RTOSDemo.axf \
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-s -S
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```
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This command is nearly identical to the one above with the exception of the `-s` and `-S` flags. The `-s` flag attaches Qemu to port 1234 for GDB to connect to. The `-S` flag starts the simulation halted and waits for GDB to connect.
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For debug build:
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At this point you'll need to attach GDB before the demo runs. To do so you'll need to run a RISC-V compatible GDB. This should be provided in the toolchain you've downloaded. The command to start GDB will be...
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```
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$ make DEBUG=1
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riscv64-unknown-elf-gdb build/RTOSDemo.axf
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```
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Note - You'll need to run this command from the same directory as this readme.
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If success to build, executable file RTOSDemo.axf in ./build directory.
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From here, there are three GDB commands you'll want to run
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```
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target remote localhost:1234
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## How to run
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break main
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```
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$ qemu-system-riscv32 -nographic -machine virt -net none \
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-chardev stdio,id=con,mux=on -serial chardev:con \
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-mon chardev=con,mode=readline -bios none \
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-smp 4 -kernel ./build/RTOSDemo.axf
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continue
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```
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The first attaches GDB to the port Qemu is running against. The second sets a breakpoint at the main function. The third runs the program until the breakpoint. You can run `continue` or `c` again to continue the program after the breakpoint.
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## How to debug with gdb
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## Building Your Own Toolchain
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This section should be viewed as experimental. Take these steps as more of a starting off point than a dead set way to build a toolchain for your demo.
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Append -s and -S options to the previous qemu command.
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### CrossTools-NG
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- -s: enable to attach gdb to QEMU at port 1234
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- -S: start and halted CPU (wait for attach from gdb)
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Clone the Crosstool-NG and build.
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This is just recommend to use 'debug build' for more efficient debugging.
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Run these commands after starting the QEMU with above options:
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```
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$ git clone https://github.com/crosstool-ng/crosstool-ng
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$ ./bootstrap
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$ ./configure --enable-local
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$ make
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$ ./ct-ng menuconfig
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```
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$ riscv64-unknown-elf-gdb build/RTOSDemo.axf
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(gdb) target remote localhost:1234
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(gdb) break main
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Breakpoint 1 at 0x80000110
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The following configuration values need to be set:
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```
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_ARCH_64=y
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CT_ARCH_ARCH=rv32ima
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CT_ARCH_ABI=ilp32
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CT_MULTILIB=y
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CT_DEBUG=y
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```
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These configurations can be found through the menuconfig though they are not immediately obvious. You will need to read the help page for each option to see what `CT_XXX` flag it corresponds to. For the flags above, the settings to edit are...
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* CT_EXPIREMENTAL
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* Paths and misc options -> Try features marked as EXPERIMENTAL
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* CT_ARCH_RISCV
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* Target options -> Target Architecture
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* CT_ARCH_64
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* Target options -> Bitness
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* CT_ARCH_ARCH
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* Target options -> Architecture level -> Enter "rv32ima"
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* CT_ARCH_ABI
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* Target options -> Generate code for the specific ABI -> Enter "ilp32"
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* CT_MULTILIB
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* Target options -> Build a multilib toolchain
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* CT_DEBUG
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* Debug facilities -> gdb
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(gdb) c
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Continuing.
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Breakpoint 1, 0x80000110 in main ()
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Build the GNU toolchain for RISC-V.
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```
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$ ./ct-ng build
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```
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A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory. You can now follow the 'Building and Running/Debugging" steps above
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## Description
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## Troubleshooting
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### Your own toolchain Builds
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### ZICSR Failures
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If you receive the following while building
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```
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main.c: Assembler messages:
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main.c:70: Error: unrecognized opcode `csrc mstatus,8', extension `zicsr' required
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```
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You'll need to swap the `-march` flag from `-march=rv32ima` to `-march=rv32ima_zicsr`
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This demo just prints Tx/Rx message of queue to serial port, use no
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other hardware and use only primary core (currently hart 0).
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Other cores are simply going to wfi state and execute nothing else.
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### -pie not supported
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If you receive this error while linking, add the `-no-pie` flag to your linker flags.
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See https://man.archlinux.org/man/community/riscv64-elf-binutils/riscv64-elf-ld.1.en#no~24 for more.
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