From bfdbfce22f4eb29e621e80d399aa63494e1568c7 Mon Sep 17 00:00:00 2001
From: Richard Barry <ribarry@amazon.com>
Date: Sun, 10 Aug 2008 21:19:57 +0000
Subject: [PATCH] Add in interrupt nesting and chache support.
---
.../RTOSDemo/FreeRTOSConfig.h | 4 +-
.../RTOSDemo/FreeRTOS_Tick_Setup.c | 10 +-
.../RTOSDemo/IntQueueTimer.c | 91 +++++++++++++++++++
.../RTOSDemo/IntQueueTimer.h | 58 ++++++++++++
.../RTOSDemo/MCF5282/MCF5282.h | 22 +++++
.../RTOSDemo/serial/serial.c | 2 +-
6 files changed, 181 insertions(+), 6 deletions(-)
create mode 100644 Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.c
create mode 100644 Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.h
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
index 3d49b02995..b8fece0caa 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -67,8 +67,8 @@
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 64000000 )
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
-#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 90 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 24000 ) )
+#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 100 )
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 30000 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
index 73e57857ce..f9ba068032 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
@@ -60,10 +60,10 @@ void vApplicationSetupInterrupts( void )
const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );
/* Configure interrupt priority and level and unmask interrupt. */
- MCF_INTC0_ICR55 = ( configKERNEL_INTERRUPT_PRIORITY | ( 1 << 3 ) );
+ MCF_INTC0_ICR55 = ( 2 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );
- MCF_INTC0_ICR63 = ( configKERNEL_INTERRUPT_PRIORITY | ( 1 << 3 ) );
+ MCF_INTC0_ICR63 = ( 1 | configKERNEL_INTERRUPT_PRIORITY << 3 );
MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK63 );
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
@@ -74,8 +74,12 @@ const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRES
void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )
{
+unsigned portLONG ulSavedInterruptMask;
+
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
- vTaskIncrementTick();
+ ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
+ vTaskIncrementTick();
+ portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
#if configUSE_PREEMPTION == 1
{
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.c b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.c
new file mode 100644
index 0000000000..c45d2855c7
--- /dev/null
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.c
@@ -0,0 +1,91 @@
+/*
+ FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.
+
+ This file is part of the FreeRTOS.org distribution.
+
+ FreeRTOS.org is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ FreeRTOS.org is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with FreeRTOS.org; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+ A special exception to the GPL can be applied should you wish to distribute
+ a combined work that includes FreeRTOS.org, without being obliged to provide
+ the source code for any proprietary components. See the licensing section
+ of http://www.FreeRTOS.org for full details of how and when the exception
+ can be applied.
+
+ ***************************************************************************
+ ***************************************************************************
+ * *
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
+ * and even write all or part of your application on your behalf. *
+ * See http://www.OpenRTOS.com for details of the services we provide to *
+ * expedite your project. *
+ * *
+ ***************************************************************************
+ ***************************************************************************
+
+ Please ensure to read the configuration and relevant port sections of the
+ online documentation.
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+#include "FreeRTOS.h"
+#include "IntQueueTimer.h"
+#include "IntQueue.h"
+
+#define timerINTERRUPT1_FREQUENCY ( 2000UL )
+#define timerINTERRUPT2_FREQUENCY ( 2001UL )
+#define timerPRESCALE_VALUE ( 2 )
+
+void vInitialiseTimerForIntQueueTest( void )
+{
+const unsigned portSHORT usCompareMatchValue1 = ( unsigned portSHORT ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT1_FREQUENCY );
+const unsigned portSHORT usCompareMatchValue2 = ( unsigned portSHORT ) ( ( configCPU_CLOCK_HZ / timerPRESCALE_VALUE ) / timerINTERRUPT2_FREQUENCY );
+
+ /* Configure interrupt priority and level and unmask interrupt. */
+ MCF_INTC0_ICR56 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 1 ) << 3 );
+ MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK56 );
+
+ MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;
+ MCF_PIT1_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );
+ MCF_PIT1_PMR = usCompareMatchValue1;
+
+ MCF_INTC0_ICR57 = ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 3 );
+ MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK57 );
+
+ MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;
+ MCF_PIT2_PCSR = ( MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );
+ MCF_PIT2_PMR = usCompareMatchValue2;
+}
+/*-----------------------------------------------------------*/
+
+void __attribute__ ((interrupt)) __cs3_isr_interrupt_120( void )
+{
+ MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;
+ portEND_SWITCHING_ISR( xFirstTimerHandler() );
+}
+/*-----------------------------------------------------------*/
+
+void __attribute__ ((interrupt)) __cs3_isr_interrupt_121( void )
+{
+ MCF_PIT2_PCSR |= MCF_PIT_PCSR_PIF;
+ portEND_SWITCHING_ISR( xSecondTimerHandler() );
+}
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.h b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.h
new file mode 100644
index 0000000000..fed828c107
--- /dev/null
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/IntQueueTimer.h
@@ -0,0 +1,58 @@
+/*
+ FreeRTOS.org V5.0.3 - Copyright (C) 2003-2008 Richard Barry.
+
+ This file is part of the FreeRTOS.org distribution.
+
+ FreeRTOS.org is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ FreeRTOS.org is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with FreeRTOS.org; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+ A special exception to the GPL can be applied should you wish to distribute
+ a combined work that includes FreeRTOS.org, without being obliged to provide
+ the source code for any proprietary components. See the licensing section
+ of http://www.FreeRTOS.org for full details of how and when the exception
+ can be applied.
+
+ ***************************************************************************
+ ***************************************************************************
+ * *
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
+ * and even write all or part of your application on your behalf. *
+ * See http://www.OpenRTOS.com for details of the services we provide to *
+ * expedite your project. *
+ * *
+ ***************************************************************************
+ ***************************************************************************
+
+ Please ensure to read the configuration and relevant port sections of the
+ online documentation.
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+#ifndef INT_QUEUE_TIMER_H
+#define INT_QUEUE_TIMER_H
+
+void vInitialiseTimerForIntQueueTest( void );
+portBASE_TYPE xTimer0Handler( void );
+portBASE_TYPE xTimer1Handler( void );
+
+#endif
+
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282.h b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282.h
index 4cf0c82ecf..66b874cb45 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282.h
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282.h
@@ -85,5 +85,27 @@ extern __declspec(system) uint8 __RAMBAR_SIZE[];
}
#endif
+#define MCF5XXX_CACR_CENB (0x80000000)
+#define MCF5XXX_CACR_CPDI (0x10000000)
+#define MCF5XXX_CACR_CPD (0x10000000)
+#define MCF5XXX_CACR_CFRZ (0x08000000)
+#define MCF5XXX_CACR_CINV (0x01000000)
+#define MCF5XXX_CACR_DIDI (0x00800000)
+#define MCF5XXX_CACR_DISD (0x00400000)
+#define MCF5XXX_CACR_INVI (0x00200000)
+#define MCF5XXX_CACR_INVD (0x00100000)
+#define MCF5XXX_CACR_CEIB (0x00000400)
+#define MCF5XXX_CACR_DCM_WR (0x00000000)
+#define MCF5XXX_CACR_DCM_CB (0x00000100)
+#define MCF5XXX_CACR_DCM_IP (0x00000200)
+#define MCF5XXX_CACR_DCM (0x00000200)
+#define MCF5XXX_CACR_DCM_II (0x00000300)
+#define MCF5XXX_CACR_DBWE (0x00000100)
+#define MCF5XXX_CACR_DWP (0x00000020)
+#define MCF5XXX_CACR_EUST (0x00000010)
+#define MCF5XXX_CACR_CLNF_00 (0x00000000)
+#define MCF5XXX_CACR_CLNF_01 (0x00000002)
+#define MCF5XXX_CACR_CLNF_10 (0x00000004)
+#define MCF5XXX_CACR_CLNF_11 (0x00000006)
#endif /* __MCF5282_H__ */
diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/serial/serial.c b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/serial/serial.c
index 7506fe7cf8..cbf5560c5b 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/serial/serial.c
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/serial/serial.c
@@ -125,7 +125,7 @@ const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWa
/* Configure the interrupt controller. Run the UARTs above the kernel
interrupt priority for demo purposes. */
- MCF_INTC0_ICR14 = ( ( configKERNEL_INTERRUPT_PRIORITY + 1 ) | ( 1 << 3 ) );
+ MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 ) << 3 );
MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );
/* The Tx interrupt is not enabled until there is data to send. */