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Update Keil XMC1000 to later version.

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pull/1/head
Richard Barry 12 years ago
parent 0e28ee90b6
commit ae402434f8
6 changed files with 160 additions and 67 deletions
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55
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1100.c
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@ -2,8 +2,8 @@
* @file system_XMC1100.c
* @brief Device specific initialization for the XMC1100-Series according
* to CMSIS
* @version V1.2
* @date 13 Dec 2012
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
@ -28,6 +28,8 @@
/*
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.3, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "system_XMC1100.h"
@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock)*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
@ -80,20 +92,39 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, CLKCR;
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLOCK -> CLKCR;
IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
SystemCoreClock = DCO_DCLK / (2 * IDIV );
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed */
SystemCoreClock = DCO_DCLK;
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

57
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1200.c
Unescape Escape View File

@ -2,8 +2,8 @@
* @file system_XMC1200.c
* @brief Device specific initialization for the XMC1200-Series according
* to CMSIS
* @version V1.2
* @date 13 Dec 2012
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
@ -28,9 +28,11 @@
/*
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.4, 01 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "System_XMC1200.h"
#include "system_XMC1200.h"
#include <XMC1200.h>
/*---------------------------------------------------------------------------
@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock)*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
@ -80,20 +92,39 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, CLKCR;
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLOCK -> CLKCR;
IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
SystemCoreClock = DCO_DCLK / (2 * IDIV );
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed */
SystemCoreClock = DCO_DCLK;
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

59
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/system_XMC1300.c
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@ -2,8 +2,8 @@
* @file system_XMC1300.c
* @brief Device specific initialization for the XMC1300-Series according
* to CMSIS
* @version V1.2
* @date 13 Dec 2012
* @version V1.4
* @date 01 Feb 2013
*
* @note
* Copyright (C) 2012-2013 Infineon Technologies AG. All rights reserved.
@ -26,8 +26,10 @@
*
******************************************************************************/
/*
* ************************** Change history *********************************
* V1.2, 13 Dec 2012, PKB, Created this table, Changed System_ to system_
* *************************** Change history ********************************
* V1.2, 13 Dec 2012, PKB : Created change history table
* V1.3, 20 Dec 2012, PKB : Fixed SystemCoreClock computation
* V1.4, 02 Feb 2013, PKB : SCU_CLOCK -> SCU_CLK
*/
#include "system_XMC1300.h"
@ -41,14 +43,23 @@ extern uint32_t AllowClkInitByStartup(void);
/*----------------------------------------------------------------------------
Clock Global defines
*----------------------------------------------------------------------------*/
#define DCO_DCLK 64000000UL
#define DCO_DCLK 64000000UL
#define DCO_DCLK_MULTIPLIER 16384000UL
#define DCO_DCLK_DIVIDER 9UL
#define MCLK_MHZ 32000000UL
#define KHZ_MULTIPLIER 1000UL
#define FRACBITS 8UL
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/*!< System Clock Frequency (Core Clock)*/
/*!< System Clock Frequency (Core Clock) (MCLK on TIMM1) */
uint32_t SystemCoreClock;
/*----------------------------------------------------------------------------
Fixed point math definitions
*----------------------------------------------------------------------------*/
typedef int32_t Q_24_8;
typedef int32_t Q_15_0;
/**
* @brief Setup the microcontroller system.
@ -57,6 +68,7 @@ uint32_t SystemCoreClock;
*/
void SystemInit(void)
{
/*
* Clock tree setup by CMSIS routines is allowed only in the absence of DAVE
* Clock app.
@ -80,20 +92,39 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t IDIV, CLKCR;
uint32_t IDIV, FDIV, CLKCR, Clock;
CLKCR = SCU_CLOCK -> CLKCR;
IDIV = (CLKCR & SCU_CLOCK_CLKCR_IDIV_Msk) >> SCU_CLOCK_CLKCR_IDIV_Pos;
CLKCR = SCU_CLK -> CLKCR;
IDIV = (CLKCR & SCU_CLK_CLKCR_IDIV_Msk) >> SCU_CLK_CLKCR_IDIV_Pos;
FDIV = (CLKCR & SCU_CLK_CLKCR_FDIV_Msk) >> SCU_CLK_CLKCR_FDIV_Pos;
if(IDIV)
{
SystemCoreClock = DCO_DCLK / (2 * IDIV );
/* Divider is enabled and used */
if(0 == FDIV)
{
/* No fractional divider, so MCLK = DCO_Clk / (2 * IDIV) */
Clock = MCLK_MHZ / IDIV;
}
else
{
/* Both integer and fractional divider must be considered */
/* 1. IDIV + FDIV/256 */
Q_24_8 FDiv_IDiv_Sum = (IDIV << FRACBITS) + FDIV;
/* 2. Fixed point division Q24.8 / Q9.8 = Q15.0 */
Q_15_0 ClockVal = (DCO_DCLK_MULTIPLIER << FRACBITS)/ FDiv_IDiv_Sum;
Clock = ((uint32_t)ClockVal) * KHZ_MULTIPLIER;
Clock = Clock >> DCO_DCLK_DIVIDER;
}
}
else
{
/* Divider bypassed */
SystemCoreClock = DCO_DCLK;
/* Divider bypassed. Simply divide DCO_DCLK by 2 */
Clock = MCLK_MHZ;
}
/* Finally with the math class over, update SystemCoreClock */
SystemCoreClock = Clock;
}

46
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/RTOSDemo.uvopt
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@ -73,7 +73,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
<IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<Books>
@ -150,7 +150,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -345,7 +345,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>/</Name>
<Name></Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -497,7 +497,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<Books>
@ -574,7 +574,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name></Name>
<Name>/</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
@ -703,8 +703,8 @@
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<TopLine>1</TopLine>
<CurrentLine>1</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.\Keil_Specific\system_XMC1300.c</PathWithFileName>
<FilenameWithoutPath>system_XMC1300.c</FilenameWithoutPath>
@ -789,10 +789,10 @@
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>26</ColumnNumber>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<TopLine>1028</TopLine>
<CurrentLine>1036</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\Source\queue.c</PathWithFileName>
<FilenameWithoutPath>queue.c</FilenameWithoutPath>
@ -807,8 +807,8 @@
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>2152</TopLine>
<CurrentLine>2153</CurrentLine>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\Source\tasks.c</PathWithFileName>
<FilenameWithoutPath>tasks.c</FilenameWithoutPath>
@ -823,8 +823,8 @@
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<TopLine>253</TopLine>
<CurrentLine>261</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\..\Source\portable\RVDS\ARM_CM0\port.c</PathWithFileName>
<FilenameWithoutPath>port.c</FilenameWithoutPath>
@ -861,10 +861,10 @@
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<ColumnNumber>45</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>57</TopLine>
<CurrentLine>122</CurrentLine>
<TopLine>63</TopLine>
<CurrentLine>96</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.\main.c</PathWithFileName>
<FilenameWithoutPath>main.c</FilenameWithoutPath>
@ -959,8 +959,8 @@
<Focus>0</Focus>
<ColumnNumber>15</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>38</TopLine>
<CurrentLine>74</CurrentLine>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.\ParTest_XMC1100.c</PathWithFileName>
<FilenameWithoutPath>ParTest_XMC1100.c</FilenameWithoutPath>
@ -975,8 +975,8 @@
<Focus>0</Focus>
<ColumnNumber>15</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>44</TopLine>
<CurrentLine>74</CurrentLine>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>.\ParTest_XMC1300.c</PathWithFileName>
<FilenameWithoutPath>ParTest_XMC1300.c</FilenameWithoutPath>
@ -999,8 +999,8 @@
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<TopLine>411</TopLine>
<CurrentLine>419</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>..\Common\Minimal\dynamic.c</PathWithFileName>
<FilenameWithoutPath>dynamic.c</FilenameWithoutPath>

2
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
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@ -93,7 +93,7 @@
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
or 0 to run the more comprehensive test and demo application. */
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
/*-----------------------------------------------------------*/

8
FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/settings/RTOSDemo.wsdt
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@ -25,7 +25,7 @@
<Windows>
<Wnd2>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-23707-15152</Identity>
@ -37,7 +37,7 @@
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd2><Wnd3>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-19002-15240</Identity>
@ -47,7 +47,7 @@
</Tab>
<Tab><Identity>TabID-13685-21727</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs>
<SelectedTab>0</SelectedTab></Wnd3></Windows>
<SelectedTab>0</SelectedTab></Wnd1></Windows>
<Editor>
@ -60,7 +60,7 @@
<Top><Row0><Sizes><Toolbar-01348f68><key>iaridepm.enu1</key></Toolbar-01348f68></Sizes></Row0></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>435</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>260119</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
<Top><Row0><Sizes><Toolbar-01348f68><key>iaridepm.enu1</key></Toolbar-01348f68></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>435</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>260119</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

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