diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
index 9ed6aff664..991986e18c 100644
--- a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
index b5c2a62495..679ade92cf 100644
--- a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
index 1ef998082d..cc95fab390 100644
--- a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
index 46e9c64ea0..625313f341 100644
--- a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
index 9ed6aff664..991986e18c 100644
--- a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
index a8d60448ec..277445c585 100644
--- a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_GCC/init/startup.c b/Demo/CORTEX_LM3S102_GCC/init/startup.c
index c68821e323..7958960198 100644
--- a/Demo/CORTEX_LM3S102_GCC/init/startup.c
+++ b/Demo/CORTEX_LM3S102_GCC/init/startup.c
@@ -1,174 +1,174 @@
-//*****************************************************************************
-//
-// startup.c - Boot code for Stellaris.
-//
-// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
-//
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's Stellaris Family of microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws.  All rights are reserved.  Any use in violation
-// of the foregoing restrictions may subject the user to criminal sanctions
-// under applicable laws, as well as to civil liability for the breach of the
-// terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-//*****************************************************************************
-
-//*****************************************************************************
-//
-// Forward declaration of the default fault handlers.
-//
-//*****************************************************************************
-void ResetISR(void);
-static void NmiSR(void);
-void FaultISR(void);
-extern void xPortPendSVHandler(void);
-extern void xPortSysTickHandler(void);
-extern void vUART_ISR( void );
-
-//*****************************************************************************
-//
-// The entry point for the application.
-//
-//*****************************************************************************
-extern void entry(void);
-
-//*****************************************************************************
-//
-// Reserve space for the system stack.
-//
-//*****************************************************************************
-#ifndef STACK_SIZE
-#define STACK_SIZE                              51
-#endif
-static unsigned long pulMainStack[STACK_SIZE];
-
-//*****************************************************************************
-//
-// The minimal vector table for a Cortex M3.  Note that the proper constructs
-// must be placed on this to ensure that it ends up at physical address
-// 0x0000.0000.
-//
-//*****************************************************************************
-__attribute__ ((section("vectors")))
-void (* const g_pfnVectors[])(void) =
-{
-    (void (*)(void))((unsigned long)pulMainStack + sizeof(pulMainStack)),
-    ResetISR,
-    NmiSR,
-    FaultISR,								//FAULT
-    0,                                      // The MPU fault handler
-    0,                                      // The bus fault handler
-    0,                                      // The usage fault handler
-    0,                                      // Reserved
-    0,                                      // Reserved
-    0,                                      // Reserved
-    0,                                      // Reserved
-    0,                     					// SVCall handler
-    0,                                      // Debug monitor handler
-    0,                                      // Reserved
-    xPortPendSVHandler,                     // The PendSV handler
-    xPortSysTickHandler,                    // The SysTick handler
-    0,                      // GPIO Port A
-    0,                      // GPIO Port B
-    0,                      // GPIO Port C
-    0,                      // GPIO Port D
-    0,                      // GPIO Port E
-    vUART_ISR                      // UART0 Rx and Tx
-};
-
-//*****************************************************************************
-//
-// The following are constructs created by the linker, indicating where the
-// the "data" and "bss" segments reside in memory.  The initializers for the
-// for the "data" segment resides immediately following the "text" segment.
-//
-//*****************************************************************************
-extern unsigned long _etext;
-extern unsigned long _data;
-extern unsigned long _edata;
-extern unsigned long _bss;
-extern unsigned long _ebss;
-
-//*****************************************************************************
-//
-// This is the code that gets called when the processor first starts execution
-// following a reset event.  Only the absolutely necessary set is performed,
-// after which the application supplied entry() routine is called.  Any fancy
-// actions (such as making decisions based on the reset cause register, and
-// resetting the bits in that register) are left solely in the hands of the
-// application.
-//
-//*****************************************************************************
-void
-ResetISR(void)
-{
-    unsigned long *pulSrc, *pulDest;
-
-    //
-    // Copy the data segment initializers from flash to SRAM.
-    //
-    pulSrc = &_etext;
-    for(pulDest = &_data; pulDest < &_edata; )
-    {
-        *pulDest++ = *pulSrc++;
-    }
-
-    //
-    // Zero fill the bss segment.
-    //
-    for(pulDest = &_bss; pulDest < &_ebss; )
-    {
-        *pulDest++ = 0;
-    }
-
-    //
-    // Call the application's entry point.
-    //
-    Main();
-}
-
-//*****************************************************************************
-//
-// This is the code that gets called when the processor receives a NMI.  This
-// simply enters an infinite loop, preserving the system state for examination
-// by a debugger.
-//
-//*****************************************************************************
-static void
-NmiSR(void)
-{
-    //
-    // Enter an infinite loop.
-    //
-    while(1)
-    {
-    }
-}
-
-//*****************************************************************************
-//
-// This is the code that gets called when the processor receives a fault
-// interrupt.  This simply enters an infinite loop, preserving the system state
-// for examination by a debugger.
-//
-//*****************************************************************************
-void
-FaultISR(void)
-{
-    //
-    // Enter an infinite loop.
-    //
-    while(1)
-    {
-    }
-}
+//*****************************************************************************
+//
+// startup.c - Boot code for Stellaris.
+//
+// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's Stellaris Family of microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+// Forward declaration of the default fault handlers.
+//
+//*****************************************************************************
+void ResetISR(void);
+static void NmiSR(void);
+void FaultISR(void);
+extern void xPortPendSVHandler(void);
+extern void xPortSysTickHandler(void);
+extern void vUART_ISR( void );
+
+//*****************************************************************************
+//
+// The entry point for the application.
+//
+//*****************************************************************************
+extern void entry(void);
+
+//*****************************************************************************
+//
+// Reserve space for the system stack.
+//
+//*****************************************************************************
+#ifndef STACK_SIZE
+#define STACK_SIZE                              51
+#endif
+static unsigned long pulMainStack[STACK_SIZE];
+
+//*****************************************************************************
+//
+// The minimal vector table for a Cortex M3.  Note that the proper constructs
+// must be placed on this to ensure that it ends up at physical address
+// 0x0000.0000.
+//
+//*****************************************************************************
+__attribute__ ((section("vectors")))
+void (* const g_pfnVectors[])(void) =
+{
+    (void (*)(void))((unsigned long)pulMainStack + sizeof(pulMainStack)),
+    ResetISR,
+    NmiSR,
+    FaultISR,								//FAULT
+    0,                                      // The MPU fault handler
+    0,                                      // The bus fault handler
+    0,                                      // The usage fault handler
+    0,                                      // Reserved
+    0,                                      // Reserved
+    0,                                      // Reserved
+    0,                                      // Reserved
+    0,                     					// SVCall handler
+    0,                                      // Debug monitor handler
+    0,                                      // Reserved
+    xPortPendSVHandler,                     // The PendSV handler
+    xPortSysTickHandler,                    // The SysTick handler
+    0,                      // GPIO Port A
+    0,                      // GPIO Port B
+    0,                      // GPIO Port C
+    0,                      // GPIO Port D
+    0,                      // GPIO Port E
+    vUART_ISR                      // UART0 Rx and Tx
+};
+
+//*****************************************************************************
+//
+// The following are constructs created by the linker, indicating where the
+// the "data" and "bss" segments reside in memory.  The initializers for the
+// for the "data" segment resides immediately following the "text" segment.
+//
+//*****************************************************************************
+extern unsigned long _etext;
+extern unsigned long _data;
+extern unsigned long _edata;
+extern unsigned long _bss;
+extern unsigned long _ebss;
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor first starts execution
+// following a reset event.  Only the absolutely necessary set is performed,
+// after which the application supplied entry() routine is called.  Any fancy
+// actions (such as making decisions based on the reset cause register, and
+// resetting the bits in that register) are left solely in the hands of the
+// application.
+//
+//*****************************************************************************
+void
+ResetISR(void)
+{
+    unsigned long *pulSrc, *pulDest;
+
+    //
+    // Copy the data segment initializers from flash to SRAM.
+    //
+    pulSrc = &_etext;
+    for(pulDest = &_data; pulDest < &_edata; )
+    {
+        *pulDest++ = *pulSrc++;
+    }
+
+    //
+    // Zero fill the bss segment.
+    //
+    for(pulDest = &_bss; pulDest < &_ebss; )
+    {
+        *pulDest++ = 0;
+    }
+
+    //
+    // Call the application's entry point.
+    //
+    Main();
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a NMI.  This
+// simply enters an infinite loop, preserving the system state for examination
+// by a debugger.
+//
+//*****************************************************************************
+static void
+NmiSR(void)
+{
+    //
+    // Enter an infinite loop.
+    //
+    while(1)
+    {
+    }
+}
+
+//*****************************************************************************
+//
+// This is the code that gets called when the processor receives a fault
+// interrupt.  This simply enters an infinite loop, preserving the system state
+// for examination by a debugger.
+//
+//*****************************************************************************
+void
+FaultISR(void)
+{
+    //
+    // Enter an infinite loop.
+    //
+    while(1)
+    {
+    }
+}
diff --git a/Demo/CORTEX_LM3S102_GCC/main.c b/Demo/CORTEX_LM3S102_GCC/main.c
index b5c2a62495..679ade92cf 100644
--- a/Demo/CORTEX_LM3S102_GCC/main.c
+++ b/Demo/CORTEX_LM3S102_GCC/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
index 9ed6aff664..991986e18c 100644
--- a/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c b/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
index beb47d23e5..1fd87078b7 100644
--- a/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo1/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
index 1ef998082d..cc95fab390 100644
--- a/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c b/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
index 31222be1c4..5508cf0303 100644
--- a/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/Demo2/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
index 9ed6aff664..991986e18c 100644
--- a/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_KEIL/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c b/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
index a8d60448ec..277445c585 100644
--- a/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S102_KEIL/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_KEIL/include/pdc.c b/Demo/CORTEX_LM3S102_KEIL/include/pdc.c
index 9e40fc9254..d1c544408d 100644
--- a/Demo/CORTEX_LM3S102_KEIL/include/pdc.c
+++ b/Demo/CORTEX_LM3S102_KEIL/include/pdc.c
@@ -1,118 +1,118 @@
-//*****************************************************************************
-//
-// pdc.c - Driver for the Peripheral Device Controller (PDC) on the Stellaris
-//         development board.
-//
-// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
-//
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's Stellaris Family of microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws.  All rights are reserved.  Any use in violation
-// of the foregoing restrictions may subject the user to criminal sanctions
-// under applicable laws, as well as to civil liability for the breach of the
-// terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-//*****************************************************************************
-
-#include "LM3Sxxx.h"
-#include "pdc.h"
-
-//*****************************************************************************
-//
-//! Initializes the connection to the PDC.
-//!
-//! This function will enable clocking to the SSI and GPIO A modules, configure
-//! the GPIO pins to be used for an SSI interface, and it will configure the
-//! SSI as a 1Mb master device, operating in MOTO mode.  It will also enable
-//! the SSI module, and will enable the chip select for the PDC on the
-//! Stellaris development board.
-//!
-//! This function is contained in <tt>utils/pdc.c</tt>, with
-//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-PDCInit(void)
-{
-    //
-    // Enable the peripherals used to drive the PDC.
-    //
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI);
-    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
-
-    //
-    // Configure the appropriate pins to be SSI instead of GPIO.
-    //
-    GPIODirModeSet(GPIO_PORTA_BASE, SSI_CLK | SSI_TX | SSI_RX,
-                   GPIO_DIR_MODE_HW);
-    GPIODirModeSet(GPIO_PORTA_BASE, SSI_CS, GPIO_DIR_MODE_OUT);
-    GPIOPadConfigSet(GPIO_PORTA_BASE, SSI_CLK, GPIO_STRENGTH_4MA,
-                     GPIO_PIN_TYPE_STD_WPU);
-
-    //
-    // Configure the SSI port.
-    //
-    SSIConfig(SSI_BASE, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
-    SSIEnable(SSI_BASE);
-
-    //
-    // Reset the PDC SSI state machine.  The chip select needs to be held low
-    // for 100ns; the procedure call overhead more than accounts for this time.
-    //
-    GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, 0);
-    GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, PDC_CS);
-}
-
-//*****************************************************************************
-//
-//! Write a PDC register.
-//!
-//! \param ucAddr specifies the PDC register to write.
-//! \param ucData specifies the data to write.
-//!
-//! This function will perform the SSI transfers required to write a register
-//! in the PDC on the Stellaris development board.
-//!
-//! This function is contained in <tt>utils/pdc.c</tt>, with
-//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
-//!
-//! \return None.
-//
-//*****************************************************************************
-void
-PDCWrite(unsigned char ucAddr, unsigned char ucData)
-{
-    unsigned long ulTemp;
-
-    //
-    // Send address and write command.
-    //
-    SSIDataPut(SSI_BASE, (ucAddr & 0x0F) | PDC_WR);
-
-    //
-    // Write the data.
-    //
-    SSIDataPut(SSI_BASE, ucData);
-
-    //
-    // Flush data read during address write.
-    //
-    SSIDataGet(SSI_BASE, &ulTemp);
-
-    //
-    // Flush data read during data write.
-    //
-    SSIDataGet(SSI_BASE, &ulTemp);
+//*****************************************************************************
+//
+// pdc.c - Driver for the Peripheral Device Controller (PDC) on the Stellaris
+//         development board.
+//
+// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's Stellaris Family of microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+#include "LM3Sxxx.h"
+#include "pdc.h"
+
+//*****************************************************************************
+//
+//! Initializes the connection to the PDC.
+//!
+//! This function will enable clocking to the SSI and GPIO A modules, configure
+//! the GPIO pins to be used for an SSI interface, and it will configure the
+//! SSI as a 1Mb master device, operating in MOTO mode.  It will also enable
+//! the SSI module, and will enable the chip select for the PDC on the
+//! Stellaris development board.
+//!
+//! This function is contained in <tt>utils/pdc.c</tt>, with
+//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+PDCInit(void)
+{
+    //
+    // Enable the peripherals used to drive the PDC.
+    //
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
+
+    //
+    // Configure the appropriate pins to be SSI instead of GPIO.
+    //
+    GPIODirModeSet(GPIO_PORTA_BASE, SSI_CLK | SSI_TX | SSI_RX,
+                   GPIO_DIR_MODE_HW);
+    GPIODirModeSet(GPIO_PORTA_BASE, SSI_CS, GPIO_DIR_MODE_OUT);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, SSI_CLK, GPIO_STRENGTH_4MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+
+    //
+    // Configure the SSI port.
+    //
+    SSIConfig(SSI_BASE, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
+    SSIEnable(SSI_BASE);
+
+    //
+    // Reset the PDC SSI state machine.  The chip select needs to be held low
+    // for 100ns; the procedure call overhead more than accounts for this time.
+    //
+    GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, 0);
+    GPIOPinWrite(GPIO_PORTA_BASE, PDC_CS, PDC_CS);
+}
+
+//*****************************************************************************
+//
+//! Write a PDC register.
+//!
+//! \param ucAddr specifies the PDC register to write.
+//! \param ucData specifies the data to write.
+//!
+//! This function will perform the SSI transfers required to write a register
+//! in the PDC on the Stellaris development board.
+//!
+//! This function is contained in <tt>utils/pdc.c</tt>, with
+//! <tt>utils/pdc.h</tt> containing the API definition for use by applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+PDCWrite(unsigned char ucAddr, unsigned char ucData)
+{
+    unsigned long ulTemp;
+
+    //
+    // Send address and write command.
+    //
+    SSIDataPut(SSI_BASE, (ucAddr & 0x0F) | PDC_WR);
+
+    //
+    // Write the data.
+    //
+    SSIDataPut(SSI_BASE, ucData);
+
+    //
+    // Flush data read during address write.
+    //
+    SSIDataGet(SSI_BASE, &ulTemp);
+
+    //
+    // Flush data read during data write.
+    //
+    SSIDataGet(SSI_BASE, &ulTemp);
 }
diff --git a/Demo/CORTEX_LM3S102_KEIL/include/pdc.h b/Demo/CORTEX_LM3S102_KEIL/include/pdc.h
index e787cf9376..6380806518 100644
--- a/Demo/CORTEX_LM3S102_KEIL/include/pdc.h
+++ b/Demo/CORTEX_LM3S102_KEIL/include/pdc.h
@@ -1,122 +1,122 @@
-//*****************************************************************************
-//
-// pdc.h - Stellaris development board Peripheral Device Controller definitions
-//         and prototypes.
-//
-// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
-//
-// Software License Agreement
-//
-// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
-// exclusively on LMI's Stellaris Family of microcontroller products.
-//
-// The software is owned by LMI and/or its suppliers, and is protected under
-// applicable copyright laws.  All rights are reserved.  Any use in violation
-// of the foregoing restrictions may subject the user to criminal sanctions
-// under applicable laws, as well as to civil liability for the breach of the
-// terms and conditions of this license.
-//
-// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-//
-//*****************************************************************************
-
-#ifndef __PDC_H__
-#define __PDC_H__
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-//*****************************************************************************
-//
-// The registers within the peripheral device controller.
-//
-//*****************************************************************************
-#define PDC_VER                 0x0         // Version register
-#define PDC_CSR                 0x1         // Command/Status register
-#define PDC_DSW                 0x4         // DIP Switch register
-#define PDC_LED                 0x5         // LED register
-#define PDC_LCD_CSR             0x6         // LCD Command/Status register
-#define PDC_LCD_RAM             0x7         // LCD RAM register
-#define PDC_GPXDAT              0x8         // GPIO X Data register
-#define PDC_GPXDIR              0x9         // GPIO X Direction register
-#define PDC_GPYDAT              0xA         // GPIO Y Data register
-#define PDC_GPYDIR              0xB         // GPIO Y Direction register
-#define PDC_GPZDAT              0xC         // GPIO Z Data register
-#define PDC_GPZDIR              0xD         // GPIO Z Direction register
-
-//*****************************************************************************
-//
-// Flags indicating a read or write to the peripheral device controller.
-//
-//*****************************************************************************
-#define PDC_RD                  0x80        // PDC read command
-#define PDC_WR                  0x00        // PDC write command
-
-//*****************************************************************************
-//
-// LCD panel (Crystalfontz CFAH1602B) commands, RS = 0
-//
-//*****************************************************************************
-#define LCD_CLEAR               0x01        // Clear display (0 fill DDRAM).
-#define LCD_HOME                0x02        // Cursor home.
-#define LCD_MODE                0x04        // Set entry mode (cursor dir)
-#define LCD_ON                  0x08        // Set display, cursor, blinking
-                                            // on/off
-#define LCD_CUR                 0x10        // Cursor, display shift
-#define LCD_IF                  0x20        // Set interface data length,
-                                            // lines, font
-#define LCD_CGADDR              0x40        // Set CGRAM AC address
-#define LCD_DDADDR              0x80        // Set DDRAM AC address
-
-//*****************************************************************************
-//
-// LCD Status bit
-//
-//*****************************************************************************
-#define LCD_B_BUSY              0x80        // Busy flag.
-
-//*****************************************************************************
-//
-// The GPIO port A pin numbers for the various SSI signals.
-//
-//*****************************************************************************
-#define SSI_CS                  GPIO_PIN_3
-#define PDC_CS                  GPIO_PIN_3
-#define SSI_CLK                 GPIO_PIN_2
-#define SSI_TX                  GPIO_PIN_5
-#define SSI_RX                  GPIO_PIN_4
-
-//*****************************************************************************
-//
-// Function Prototypes
-//
-//*****************************************************************************
-extern void PDCInit(void);
-extern unsigned char PDCRead(unsigned char ucAddr);
-extern void PDCWrite(unsigned char ucAddr, unsigned char ucData);
-extern unsigned char PDCDIPRead(void);
-extern void PDCLEDWrite(unsigned char ucLED);
-extern unsigned char PDCLEDRead(void);
-extern void PDCLCDInit(void);
-extern void PDCLCDBacklightOn(void);
-extern void PDCLCDBacklightOff(void);
-extern void PDCLCDClear(void);
-extern void PDCLCDCreateChar(unsigned char ucChar, unsigned char *pucData);
-extern void PDCLCDSetPos(unsigned char ucX, unsigned char ucY);
-extern void PDCLCDWrite(const char *pcStr, unsigned long ulCount);
-extern unsigned char PDCGPIODirRead(unsigned char ucIdx);
-extern void PDCGPIODirWrite(unsigned char ucIdx, unsigned char ucValue);
-extern unsigned char PDCGPIORead(unsigned char ucIdx);
-extern void PDCGPIOWrite(unsigned char ucIdx, unsigned char ucValue);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __PDC_H__
+//*****************************************************************************
+//
+// pdc.h - Stellaris development board Peripheral Device Controller definitions
+//         and prototypes.
+//
+// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
+//
+// Software License Agreement
+//
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's Stellaris Family of microcontroller products.
+//
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+//
+//*****************************************************************************
+
+#ifndef __PDC_H__
+#define __PDC_H__
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+//*****************************************************************************
+//
+// The registers within the peripheral device controller.
+//
+//*****************************************************************************
+#define PDC_VER                 0x0         // Version register
+#define PDC_CSR                 0x1         // Command/Status register
+#define PDC_DSW                 0x4         // DIP Switch register
+#define PDC_LED                 0x5         // LED register
+#define PDC_LCD_CSR             0x6         // LCD Command/Status register
+#define PDC_LCD_RAM             0x7         // LCD RAM register
+#define PDC_GPXDAT              0x8         // GPIO X Data register
+#define PDC_GPXDIR              0x9         // GPIO X Direction register
+#define PDC_GPYDAT              0xA         // GPIO Y Data register
+#define PDC_GPYDIR              0xB         // GPIO Y Direction register
+#define PDC_GPZDAT              0xC         // GPIO Z Data register
+#define PDC_GPZDIR              0xD         // GPIO Z Direction register
+
+//*****************************************************************************
+//
+// Flags indicating a read or write to the peripheral device controller.
+//
+//*****************************************************************************
+#define PDC_RD                  0x80        // PDC read command
+#define PDC_WR                  0x00        // PDC write command
+
+//*****************************************************************************
+//
+// LCD panel (Crystalfontz CFAH1602B) commands, RS = 0
+//
+//*****************************************************************************
+#define LCD_CLEAR               0x01        // Clear display (0 fill DDRAM).
+#define LCD_HOME                0x02        // Cursor home.
+#define LCD_MODE                0x04        // Set entry mode (cursor dir)
+#define LCD_ON                  0x08        // Set display, cursor, blinking
+                                            // on/off
+#define LCD_CUR                 0x10        // Cursor, display shift
+#define LCD_IF                  0x20        // Set interface data length,
+                                            // lines, font
+#define LCD_CGADDR              0x40        // Set CGRAM AC address
+#define LCD_DDADDR              0x80        // Set DDRAM AC address
+
+//*****************************************************************************
+//
+// LCD Status bit
+//
+//*****************************************************************************
+#define LCD_B_BUSY              0x80        // Busy flag.
+
+//*****************************************************************************
+//
+// The GPIO port A pin numbers for the various SSI signals.
+//
+//*****************************************************************************
+#define SSI_CS                  GPIO_PIN_3
+#define PDC_CS                  GPIO_PIN_3
+#define SSI_CLK                 GPIO_PIN_2
+#define SSI_TX                  GPIO_PIN_5
+#define SSI_RX                  GPIO_PIN_4
+
+//*****************************************************************************
+//
+// Function Prototypes
+//
+//*****************************************************************************
+extern void PDCInit(void);
+extern unsigned char PDCRead(unsigned char ucAddr);
+extern void PDCWrite(unsigned char ucAddr, unsigned char ucData);
+extern unsigned char PDCDIPRead(void);
+extern void PDCLEDWrite(unsigned char ucLED);
+extern unsigned char PDCLEDRead(void);
+extern void PDCLCDInit(void);
+extern void PDCLCDBacklightOn(void);
+extern void PDCLCDBacklightOff(void);
+extern void PDCLCDClear(void);
+extern void PDCLCDCreateChar(unsigned char ucChar, unsigned char *pucData);
+extern void PDCLCDSetPos(unsigned char ucX, unsigned char ucY);
+extern void PDCLCDWrite(const char *pcStr, unsigned long ulCount);
+extern unsigned char PDCGPIODirRead(unsigned char ucIdx);
+extern void PDCGPIODirWrite(unsigned char ucIdx, unsigned char ucValue);
+extern unsigned char PDCGPIORead(unsigned char ucIdx);
+extern void PDCGPIOWrite(unsigned char ucIdx, unsigned char ucValue);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __PDC_H__
diff --git a/Demo/CORTEX_LM3S102_KEIL/main.c b/Demo/CORTEX_LM3S102_KEIL/main.c
index beb47d23e5..1fd87078b7 100644
--- a/Demo/CORTEX_LM3S102_KEIL/main.c
+++ b/Demo/CORTEX_LM3S102_KEIL/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
index 9ed6aff664..991986e18c 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
index a8d60448ec..277445c585 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
index a40fa47934..fab374ab7e 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
index 1ef998082d..cc95fab390 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
index a8d60448ec..277445c585 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
index 2bbc0e2c93..c1030309bd 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
index eed22fd401..5fa9d7dbf6 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
index bc8a8d08e0..0ece4651cb 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
index 1f41793728..64712377c7 100644
--- a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
+++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
index bd61e07f9a..67e0427eab 100644
--- a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
index a8d60448ec..277445c585 100644
--- a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
+++ b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.c b/Demo/CORTEX_LM3S316_IAR/commstest.c
index 1b1048b3cc..8615a26a30 100644
--- a/Demo/CORTEX_LM3S316_IAR/commstest.c
+++ b/Demo/CORTEX_LM3S316_IAR/commstest.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.h b/Demo/CORTEX_LM3S316_IAR/commstest.h
index 8da5109970..556f8e521c 100644
--- a/Demo/CORTEX_LM3S316_IAR/commstest.h
+++ b/Demo/CORTEX_LM3S316_IAR/commstest.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S316_IAR/main.c b/Demo/CORTEX_LM3S316_IAR/main.c
index b341f6242e..1d057f7768 100644
--- a/Demo/CORTEX_LM3S316_IAR/main.c
+++ b/Demo/CORTEX_LM3S316_IAR/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
index 856bf6c3f1..0211c3da03 100644
--- a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_GCC/main.c b/Demo/CORTEX_LM3S811_GCC/main.c
index cb876cbd48..03cc5edba1 100644
--- a/Demo/CORTEX_LM3S811_GCC/main.c
+++ b/Demo/CORTEX_LM3S811_GCC/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
index 0e3357b82b..872ac0a6e2 100644
--- a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_IAR/main.c b/Demo/CORTEX_LM3S811_IAR/main.c
index 6742ea7916..09dbd3267b 100644
--- a/Demo/CORTEX_LM3S811_IAR/main.c
+++ b/Demo/CORTEX_LM3S811_IAR/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
index 83d0a809a8..221a084118 100644
--- a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
+++ b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
index c6f8d06e0c..4611258a9e 100644
--- a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
+++ b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.
 
diff --git a/Demo/CORTEX_LM3S811_KEIL/main.c b/Demo/CORTEX_LM3S811_KEIL/main.c
index 970bf822f6..cdf1cc69f4 100644
--- a/Demo/CORTEX_LM3S811_KEIL/main.c
+++ b/Demo/CORTEX_LM3S811_KEIL/main.c
@@ -1,5 +1,5 @@
 /*
-	FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
+	FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.
 
 	This file is part of the FreeRTOS.org distribution.