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Zynq ZC702 demo application: Update the memcpy, memset and memcmp implementations so they don't err with -O3 optimisation. Update to use the 2015.2 version of the SDK.pull/1/head
Richard Barry
10 years ago
parent
4c3722bd76
commit
95eed0c8f3
@ -0,0 +1,5 @@
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[{000214A0-0000-0000-C000-000000000046}]
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Prop3=19,2
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[InternetShortcut]
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URL=http://www.freertos.org/RTOS-Xilinx-Zynq.html
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IDList=
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@ -1,3 +1,4 @@
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THIRPARTY=false
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HW_PROJECT_REFERENCE=ZC702_hw_platform
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PROCESSOR=ps7_cortexa9_0
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MSS_FILE=system.mss
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@ -1,98 +1,89 @@
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/******************************************************************************
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*
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* (c) Copyright 2010-13 Xilinx, Inc. All rights reserved.
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*
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* This file contains confidential and proprietary information of Xilinx, Inc.
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* and is protected under U.S. and international copyright and other
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* intellectual property laws.
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*
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* DISCLAIMER
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* This disclaimer is not a license and does not grant any rights to the
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* materials distributed herewith. Except as otherwise provided in a valid
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* license issued to you by Xilinx, and to the maximum extent permitted by
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* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
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* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
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* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
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* and (2) Xilinx shall not be liable (whether in contract or tort, including
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* negligence, or under any other theory of liability) for any loss or damage
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* of any kind or nature related to, arising under or in connection with these
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* materials, including for any direct, or any indirect, special, incidental,
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* or consequential loss or damage (including loss of data, profits, goodwill,
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* or any type of loss or damage suffered as a result of any action brought by
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* a third party) even if such damage or loss was reasonably foreseeable or
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* Xilinx had been advised of the possibility of the same.
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*
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* CRITICAL APPLICATIONS
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* Xilinx products are not designed or intended to be fail-safe, or for use in
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* any application requiring fail-safe performance, such as life-support or
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* safety devices or systems, Class III medical devices, nuclear facilities,
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* applications related to the deployment of airbags, or any other applications
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* that could lead to death, personal injury, or severe property or
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* environmental damage (individually and collectively, "Critical
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* Applications"). Customer assumes the sole risk and liability of any use of
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* Xilinx products in Critical Applications, subject only to applicable laws
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* and regulations governing limitations on product liability.
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*
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* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
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* AT ALL TIMES.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xcanps_hw.c
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*
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* This file contains the implementation of the canps interface reset sequence
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.02a adk 08/08/13 First release
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "xcanps_hw.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/**
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*
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* This function resets the CAN device. Calling this function resets the device
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* immediately, and any pending transmission or reception is terminated at once.
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* Both Object Layer and Transfer Layer are reset. This function does not reset
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* the Physical Layer. All registers are reset to the default values, and no
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* previous status will be restored. TX FIFO, RX FIFO and TX High Priority
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* Buffer are also reset.
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*
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* The CAN device will be in Configuration Mode immediately after this function
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* returns.
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*
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* @param BaseAddr is the baseaddress of the interface.
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*
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* @return None.
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*
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* @note None.
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*
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******************************************************************************/
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void XCanPs_ResetHw(u32 BaseAddr)
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{
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XCanPs_WriteReg(BaseAddr, XCANPS_SRR_OFFSET, \
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XCANPS_SRR_SRST_MASK);
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/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
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*
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||||
* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xcanps_hw.c
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*
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* This file contains the implementation of the canps interface reset sequence
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.02a adk 08/08/13 First release
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "xcanps_hw.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/**
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*
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* This function resets the CAN device. Calling this function resets the device
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* immediately, and any pending transmission or reception is terminated at once.
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* Both Object Layer and Transfer Layer are reset. This function does not reset
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* the Physical Layer. All registers are reset to the default values, and no
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* previous status will be restored. TX FIFO, RX FIFO and TX High Priority
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* Buffer are also reset.
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*
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* The CAN device will be in Configuration Mode immediately after this function
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* returns.
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*
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* @param BaseAddr is the baseaddress of the interface.
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*
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* @return None.
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*
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* @note None.
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*
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******************************************************************************/
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void XCanPs_ResetHw(u32 BaseAddr)
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{
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XCanPs_WriteReg(BaseAddr, XCANPS_SRR_OFFSET, \
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XCANPS_SRR_SRST_MASK);
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}
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