Add support for statically allocated memory protected tasks - previously only dynamically allocated tasks could be memory protected.
Richard Barry
9 years ago
parent
5c75e5a38a
commit
7cce089e40
@ -0,0 +1,220 @@
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/*
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FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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/* The MPU version of port.c includes and excludes functions depending on the
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settings within this file. Therefore, to ensure all the functions in port.c
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build, this configuration file has all options turned on. */
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#define configUSE_PREEMPTION 1
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#define configTICK_RATE_HZ ( 1000 )
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#define configUSE_QUEUE_SETS 1
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#define configUSE_IDLE_HOOK 1
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#define configUSE_TICK_HOOK 1
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#define configCPU_CLOCK_HZ 48000000
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 120 )
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#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 16 * 1024 ) )
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#define configMAX_TASK_NAME_LEN ( 10 )
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#define configUSE_TRACE_FACILITY 1
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configQUEUE_REGISTRY_SIZE 5
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_MALLOC_FAILED_HOOK 1
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#define configUSE_APPLICATION_TASK_TAG 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configUSE_TICKLESS_IDLE 0
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#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 2
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/* This demo shows the MPU being used without any dynamic memory allocation. */
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 0
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/* Run time stats gathering definitions. */
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#define configGENERATE_RUN_TIME_STATS 1
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#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
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#define portGET_RUN_TIME_COUNTER_VALUE() 0
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/* This demo makes use of one or more example stats formatting functions. These
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format the raw data provided by the uxTaskGetSystemState() function in to human
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readable ASCII form. See the notes in the implementation of vTaskList() within
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FreeRTOS/Source/tasks.c for limitations. */
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Software timer definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY ( 2 )
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#define configTIMER_QUEUE_LENGTH 5
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#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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#define INCLUDE_vTaskCleanUpResources 1
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#define INCLUDE_vTaskSuspend 1
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_eTaskGetState 1
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xSemaphoreGetMutexHolder 1
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#define INCLUDE_xTaskGetHandle 1
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#define INCLUDE_xTaskGetCurrentTaskHandle 1
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#define INCLUDE_xTaskGetIdleTaskHandle 1
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#define INCLUDE_xTaskAbortDelay 1
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#define INCLUDE_xTaskGetSchedulerState 1
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#define INCLUDE_xTaskGetIdleTaskHandle 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 1
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/* Cortex-M specific definitions. */
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#ifdef __NVIC_PRIO_BITS
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/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#else
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#define configPRIO_BITS 4 /* 15 priority levels */
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#endif
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
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standard names. */
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#define xPortPendSVHandler PendSV_Handler
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#define vPortSVCHandler SVC_Handler
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#define xPortSysTickHandler SysTick_Handler
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/* Normal assert() semantics without relying on the provision of an assert.h
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header file. */
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#define configASSERT( x ) if( ( x ) == 0UL ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
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/* LED not used at present, so just increment a variable to keep a count of the
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number of times the LED would otherwise have been toggled. */
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#define configTOGGLE_LED() ulLED++
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/* Definitions for the messages that can be sent to the check task. */
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#define configREG_TEST_1_STILL_EXECUTING ( 0 )
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#define configREG_TEST_2_STILL_EXECUTING ( 1 )
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#define configTIMER_STILL_EXECUTING ( 2 )
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#define configPRINT_SYSTEM_STATUS ( 3 )
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/* Parameters that are passed into the third and fourth register check tasks
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solely for the purpose of ensuring parameters are passed into tasks correctly. */
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#define configREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x11112222 )
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#define configREG_TEST_TASK_3_PARAMETER ( ( void * ) 0x12345678 )
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#define configREG_TEST_TASK_4_PARAMETER ( ( void * ) 0x87654321 )
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#ifdef __cplusplus
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}
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#endif
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#endif /* FREERTOS_CONFIG_H */
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@ -0,0 +1,369 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<SchemaVersion>1.0</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Extensions>
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<cExt>*.c;*.S</cExt>
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<aExt></aExt>
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<oExt>*.obj</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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<nMigrate>0</nMigrate>
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</Extensions>
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<DaveTm>
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<dwLowDateTime>0</dwLowDateTime>
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<dwHighDateTime>0</dwHighDateTime>
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</DaveTm>
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<Target>
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<TargetName>RTOSDemo_GCC_MPU</TargetName>
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<ToolsetNumber>0x3</ToolsetNumber>
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<ToolsetName>ARM-GNU</ToolsetName>
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<TargetOption>
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<CLKARM>12000000</CLKARM>
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<OPTTT>
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<gFlags>1</gFlags>
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<BeepAtEnd>1</BeepAtEnd>
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<RunSim>0</RunSim>
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<RunTarget>1</RunTarget>
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<RunAbUc>0</RunAbUc>
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</OPTTT>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<FlashByte>65535</FlashByte>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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<OPTLEX>
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<PageWidth>120</PageWidth>
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<PageLength>65</PageLength>
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<TabStop>8</TabStop>
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<ListingPath>.\Listings\</ListingPath>
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<CreateCListing>1</CreateCListing>
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<CCond>1</CCond>
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<CCode>0</CCode>
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<OPTXL>
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<LMap>1</LMap>
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<LComments>1</LComments>
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<LGenerateSymbols>1</LGenerateSymbols>
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<LLibSym>1</LLibSym>
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<LExpSel>0</LExpSel>
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</OPTXL>
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<OPTFL>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<IsCurrentTarget>1</IsCurrentTarget>
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</OPTFL>
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<CpuCode>7</CpuCode>
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<DebugOpt>
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<uSim>1</uSim>
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<uTrg>0</uTrg>
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<sLdApp>1</sLdApp>
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<sGomain>1</sGomain>
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<sRbreak>1</sRbreak>
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<sRwatch>1</sRwatch>
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<sRmem>1</sRmem>
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<sRfunc>1</sRfunc>
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<sRbox>1</sRbox>
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<tLdApp>1</tLdApp>
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<tGomain>1</tGomain>
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<tRbreak>1</tRbreak>
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<tRwatch>1</tRwatch>
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<tRmem>1</tRmem>
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<tRfunc>0</tRfunc>
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<tRbox>1</tRbox>
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<tRtrace>1</tRtrace>
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<sRSysVw>1</sRSysVw>
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<tRSysVw>1</tRSysVw>
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<sRunDeb>0</sRunDeb>
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<sLrtime>0</sLrtime>
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<nTsel>0</nTsel>
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<sDll></sDll>
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<sDllPa></sDllPa>
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<sDlgDll></sDlgDll>
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<sDlgPa></sDlgPa>
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<sIfile></sIfile>
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<tDll></tDll>
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<tDllPa></tDllPa>
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<tDlgDll></tDlgDll>
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<tDlgPa></tDlgPa>
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<tIfile></tIfile>
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<pMon>BIN\UL2CM3.DLL</pMon>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>DLGDARM</Key>
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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=1215,201,1680,501,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ARMRTXEVENTFLAGS</Key>
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<Name>-L70 -Z18 -C0 -M0 -T1</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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||||
<Key>DLGTARM</Key>
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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=120,149,354,683,0)(1012=-1,-1,-1,-1,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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||||
<Number>0</Number>
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||||
<Key>ARMDBGFLAGS</Key>
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||||
<Name>-T0</Name>
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||||
</SetRegEntry>
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<SetRegEntry>
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||||
<Number>0</Number>
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||||
<Key>DLGUARM</Key>
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||||
<Name>(105=-1,-1,-1,-1,0)</Name>
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||||
</SetRegEntry>
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||||
<SetRegEntry>
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||||
<Number>0</Number>
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||||
<Key>UL2CM3</Key>
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||||
<Name>-UV1115SAE -O2983 -S0 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FN1 -FC1000 -FD20000000 -FF0NEW_DEVICE -FL080000 -FS00 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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<WatchWindow1>
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<Ww>
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<count>0</count>
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<WinNumber>1</WinNumber>
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<ItemText>xTickCount</ItemText>
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</Ww>
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<Ww>
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||||
<count>1</count>
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||||
<WinNumber>1</WinNumber>
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||||
<ItemText>ulCycleCount</ItemText>
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</Ww>
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||||
</WatchWindow1>
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<MemoryWindow1>
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<Mm>
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||||
<WinNumber>1</WinNumber>
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<SubType>2</SubType>
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<ItemText>0x100000</ItemText>
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<AccSizeX>4</AccSizeX>
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</Mm>
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</MemoryWindow1>
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<Tracepoint>
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<THDelay>0</THDelay>
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</Tracepoint>
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<DebugFlag>
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||||
<trace>0</trace>
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||||
<periodic>1</periodic>
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||||
<aLwin>1</aLwin>
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<aCover>0</aCover>
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<aSer1>0</aSer1>
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||||
<aSer2>0</aSer2>
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||||
<aPa>0</aPa>
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||||
<viewmode>1</viewmode>
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||||
<vrSel>0</vrSel>
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<aSym>0</aSym>
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<aTbox>0</aTbox>
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<AscS1>0</AscS1>
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<AscS2>0</AscS2>
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<AscS3>0</AscS3>
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<aSer3>0</aSer3>
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<eProf>0</eProf>
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<aLa>0</aLa>
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<aPa1>0</aPa1>
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<AscS4>0</AscS4>
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<aSer4>0</aSer4>
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||||
<StkLoc>0</StkLoc>
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||||
<TrcWin>0</TrcWin>
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||||
<newCpu>0</newCpu>
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||||
<uProt>0</uProt>
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||||
</DebugFlag>
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||||
<LintExecutable></LintExecutable>
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@ -0,0 +1,348 @@
|
||||
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|
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|
||||
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|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
||||
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|
||||
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|
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|
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|
||||
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..;..\..\..\Source\include;..\..\..\Source\portable\GCC\ARM_CM4_MPU;..\..\Common\include;..\peripheral_library;..\CMSIS;..\main_full;..\peripheral_library\interrupt</IncludePath>
|
||||
</VariousControls>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aarm>
|
||||
<LDarm>
|
||||
<umfTarg>1</umfTarg>
|
||||
<enaGarb>0</enaGarb>
|
||||
<noStart>1</noStart>
|
||||
<noStLib>0</noStLib>
|
||||
<uMathLib>1</uMathLib>
|
||||
<TextAddressRange></TextAddressRange>
|
||||
<DataAddressRange></DataAddressRange>
|
||||
<BSSAddressRange></BSSAddressRange>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeDir></IncludeDir>
|
||||
<Misc>-Xlinker --gc-sections</Misc>
|
||||
<ScatterFile>.\sections.ld</ScatterFile>
|
||||
</LDarm>
|
||||
</TargetArm>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>System</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_ARMCM4.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\startup_ARMCM4.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>application_and_config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>FreeRTOSConfig.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\FreeRTOSConfig.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>RegTest.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\RegTest.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>FreeRTOS_Source</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>event_groups.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\event_groups.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>list.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\list.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tasks.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\tasks.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timers.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\timers.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mpu_wrappers.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\portable\Common\mpu_wrappers.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\portable\GCC\ARM_CM4_MPU\port.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
@ -0,0 +1,692 @@
|
||||
/*
|
||||
FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
|
||||
/*
|
||||
* "Reg test" tasks - These fill the registers with known values, then check
|
||||
* that each register maintains its expected value for the lifetime of the
|
||||
* task. Each task uses a different set of values. The reg test tasks execute
|
||||
* with a very low priority, so get preempted very frequently. A register
|
||||
* containing an unexpected value is indicative of an error in the context
|
||||
* switching mechanism.
|
||||
*/
|
||||
|
||||
void vRegTest1Implementation( void *pvParameters );
|
||||
void vRegTest2Implementation( void *pvParameters );
|
||||
void vRegTest3Implementation( void ) __attribute__ ((naked));
|
||||
void vRegTest4Implementation( void ) __attribute__ ((naked));
|
||||
|
||||
/*
|
||||
* Used as an easy way of deleting a task from inline assembly.
|
||||
*/
|
||||
extern void vMainDeleteMe( void ) __attribute__((noinline));
|
||||
|
||||
/*
|
||||
* Used by the first two reg test tasks and a software timer callback function
|
||||
* to send messages to the check task. The message just lets the check task
|
||||
* know that the tasks and timer are still functioning correctly. If a reg test
|
||||
* task detects an error it will delete itself, and in so doing prevent itself
|
||||
* from sending any more 'I'm Alive' messages to the check task.
|
||||
*/
|
||||
extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );
|
||||
|
||||
/* The queue used to send a message to the check task. */
|
||||
extern QueueHandle_t xGlobalScopeCheckQueue;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest1Implementation( void *pvParameters )
|
||||
{
|
||||
/* This task is created in privileged mode so can access the file scope
|
||||
queue variable. Take a stack copy of this before the task is set into user
|
||||
mode. Once this task is in user mode the file scope queue variable will no
|
||||
longer be accessible but the stack copy will. */
|
||||
QueueHandle_t xQueue = xGlobalScopeCheckQueue;
|
||||
|
||||
/* Now the queue handle has been obtained the task can switch to user
|
||||
mode. This is just one method of passing a handle into a protected
|
||||
task, the other reg test task uses the task parameter instead. */
|
||||
portSWITCH_TO_USER_MODE();
|
||||
|
||||
/* First check that the parameter value is as expected. */
|
||||
if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )
|
||||
{
|
||||
/* Error detected. Delete the task so it stops communicating with
|
||||
the check task. */
|
||||
vMainDeleteMe();
|
||||
}
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* This task tests the kernel context switch mechanism by reading and
|
||||
writing directly to registers - which requires the test to be written
|
||||
in assembly code. */
|
||||
__asm volatile
|
||||
(
|
||||
" MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
|
||||
" MOV R5, #105 \n"
|
||||
" MOV R6, #106 \n"
|
||||
" MOV R8, #108 \n"
|
||||
" MOV R9, #109 \n"
|
||||
" MOV R10, #110 \n"
|
||||
" MOV R11, #111 \n"
|
||||
"reg1loop: \n"
|
||||
" MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
|
||||
" MOV R1, #101 \n"
|
||||
" MOV R2, #102 \n"
|
||||
" MOV R3, #103 \n"
|
||||
" MOV R12, #112 \n"
|
||||
" SVC #1 \n" /* Yield just to increase test coverage. */
|
||||
" CMP R0, #100 \n" /* Check all the registers still contain their expected values. */
|
||||
" BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */
|
||||
" CMP R1, #101 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R2, #102 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R3, #103 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R4, #104 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R5, #105 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R6, #106 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R8, #108 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R9, #109 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R10, #110 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R11, #111 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R12, #112 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
:::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
|
||||
);
|
||||
|
||||
/* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this
|
||||
task is still functioning. */
|
||||
vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );
|
||||
|
||||
/* Go back to check all the register values again. */
|
||||
__asm volatile( " B reg1loop " );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest2Implementation( void *pvParameters )
|
||||
{
|
||||
/* The queue handle is passed in as the task parameter. This is one method of
|
||||
passing data into a protected task, the other reg test task uses a different
|
||||
method. */
|
||||
QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* This task tests the kernel context switch mechanism by reading and
|
||||
writing directly to registers - which requires the test to be written
|
||||
in assembly code. */
|
||||
__asm volatile
|
||||
(
|
||||
" MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
|
||||
" MOV R5, #5 \n"
|
||||
" MOV R6, #6 \n"
|
||||
" MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */
|
||||
" MOV R9, #9 \n"
|
||||
" MOV R10, 10 \n"
|
||||
" MOV R11, #11 \n"
|
||||
"reg2loop: \n"
|
||||
" MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
|
||||
" MOV R1, #1 \n"
|
||||
" MOV R2, #2 \n"
|
||||
" MOV R3, #3 \n"
|
||||
" MOV R12, #12 \n"
|
||||
" CMP R0, #13 \n" /* Check all the registers still contain their expected values. */
|
||||
" BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */
|
||||
" CMP R1, #1 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R2, #2 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R3, #3 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R4, #4 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R5, #5 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R6, #6 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R8, #8 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R9, #9 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R10, #10 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R11, #11 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R12, #12 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
:::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
|
||||
);
|
||||
|
||||
/* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate that this
|
||||
task is still functioning. */
|
||||
vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );
|
||||
|
||||
/* Go back to check all the register values again. */
|
||||
__asm volatile( " B reg2loop " );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest3Implementation( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".extern pulRegTest3LoopCounter \n"
|
||||
"/* Fill the core registers with known values. */ \n"
|
||||
"mov r0, #100 \n"
|
||||
"mov r1, #101 \n"
|
||||
"mov r2, #102 \n"
|
||||
"mov r3, #103 \n"
|
||||
"mov r4, #104 \n"
|
||||
"mov r5, #105 \n"
|
||||
"mov r6, #106 \n"
|
||||
"mov r7, #107 \n"
|
||||
"mov r8, #108 \n"
|
||||
"mov r9, #109 \n"
|
||||
"mov r10, #110 \n"
|
||||
"mov r11, #111 \n"
|
||||
"mov r12, #112 \n"
|
||||
|
||||
"/* Fill the VFP registers with known values. */ \n"
|
||||
"vmov d0, r0, r1 \n"
|
||||
"vmov d1, r2, r3 \n"
|
||||
"vmov d2, r4, r5 \n"
|
||||
"vmov d3, r6, r7 \n"
|
||||
"vmov d4, r8, r9 \n"
|
||||
"vmov d5, r10, r11 \n"
|
||||
"vmov d6, r0, r1 \n"
|
||||
"vmov d7, r2, r3 \n"
|
||||
"vmov d8, r4, r5 \n"
|
||||
"vmov d9, r6, r7 \n"
|
||||
"vmov d10, r8, r9 \n"
|
||||
"vmov d11, r10, r11 \n"
|
||||
"vmov d12, r0, r1 \n"
|
||||
"vmov d13, r2, r3 \n"
|
||||
"vmov d14, r4, r5 \n"
|
||||
"vmov d15, r6, r7 \n"
|
||||
|
||||
"reg1_loop: \n"
|
||||
"/* Check all the VFP registers still contain the values set above. \n"
|
||||
"First save registers that are clobbered by the test. */ \n"
|
||||
"push { r0-r1 } \n"
|
||||
|
||||
"vmov r0, r1, d0 \n"
|
||||
"cmp r0, #100 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #101 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d1 \n"
|
||||
"cmp r0, #102 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #103 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d2 \n"
|
||||
"cmp r0, #104 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #105 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d3 \n"
|
||||
"cmp r0, #106 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #107 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d4 \n"
|
||||
"cmp r0, #108 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #109 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d5 \n"
|
||||
"cmp r0, #110 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #111 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d6 \n"
|
||||
"cmp r0, #100 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #101 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d7 \n"
|
||||
"cmp r0, #102 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #103 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d8 \n"
|
||||
"cmp r0, #104 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #105 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d9 \n"
|
||||
"cmp r0, #106 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #107 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d10 \n"
|
||||
"cmp r0, #108 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #109 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d11 \n"
|
||||
"cmp r0, #110 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #111 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d12 \n"
|
||||
"cmp r0, #100 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #101 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d13 \n"
|
||||
"cmp r0, #102 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #103 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d14 \n"
|
||||
"cmp r0, #104 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #105 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"vmov r0, r1, d15 \n"
|
||||
"cmp r0, #106 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
"cmp r1, #107 \n"
|
||||
"bne reg1_error_loopf \n"
|
||||
|
||||
"/* Restore the registers that were clobbered by the test. */ \n"
|
||||
"pop {r0-r1} \n"
|
||||
|
||||
"/* VFP register test passed. Jump to the core register test. */ \n"
|
||||
"b reg1_loopf_pass \n"
|
||||
|
||||
"reg1_error_loopf: \n"
|
||||
"/* If this line is hit then a VFP register value was found to be incorrect. */ \n"
|
||||
"b reg1_error_loopf \n"
|
||||
|
||||
"reg1_loopf_pass: \n"
|
||||
|
||||
"cmp r0, #100 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r1, #101 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r2, #102 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r3, #103 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r4, #104 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r5, #105 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r6, #106 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r7, #107 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r8, #108 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r9, #109 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r10, #110 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r11, #111 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
"cmp r12, #112 \n"
|
||||
"bne reg1_error_loop \n"
|
||||
|
||||
"/* Everything passed, increment the loop counter. */ \n"
|
||||
"push { r0-r1 } \n"
|
||||
"ldr r0, =pulRegTest3LoopCounter \n"
|
||||
"ldr r0, [r0] \n"
|
||||
"ldr r1, [r0] \n"
|
||||
"adds r1, r1, #1 \n"
|
||||
"str r1, [r0] \n"
|
||||
"pop { r0-r1 } \n"
|
||||
|
||||
"/* Start again. */ \n"
|
||||
"b reg1_loop \n"
|
||||
|
||||
"reg1_error_loop: \n"
|
||||
"/* If this line is hit then there was an error in a core register value. \n"
|
||||
"The loop ensures the loop counter stops incrementing. */ \n"
|
||||
"b reg1_error_loop \n"
|
||||
"nop "
|
||||
); /* __asm volatile. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest4Implementation( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
".extern pulRegTest4LoopCounter \n"
|
||||
"/* Set all the core registers to known values. */ \n"
|
||||
"mov r0, #-1 \n"
|
||||
"mov r1, #1 \n"
|
||||
"mov r2, #2 \n"
|
||||
"mov r3, #3 \n"
|
||||
"mov r4, #4 \n"
|
||||
"mov r5, #5 \n"
|
||||
"mov r6, #6 \n"
|
||||
"mov r7, #7 \n"
|
||||
"mov r8, #8 \n"
|
||||
"mov r9, #9 \n"
|
||||
"mov r10, #10 \n"
|
||||
"mov r11, #11 \n"
|
||||
"mov r12, #12 \n"
|
||||
|
||||
"/* Set all the VFP to known values. */ \n"
|
||||
"vmov d0, r0, r1 \n"
|
||||
"vmov d1, r2, r3 \n"
|
||||
"vmov d2, r4, r5 \n"
|
||||
"vmov d3, r6, r7 \n"
|
||||
"vmov d4, r8, r9 \n"
|
||||
"vmov d5, r10, r11 \n"
|
||||
"vmov d6, r0, r1 \n"
|
||||
"vmov d7, r2, r3 \n"
|
||||
"vmov d8, r4, r5 \n"
|
||||
"vmov d9, r6, r7 \n"
|
||||
"vmov d10, r8, r9 \n"
|
||||
"vmov d11, r10, r11 \n"
|
||||
"vmov d12, r0, r1 \n"
|
||||
"vmov d13, r2, r3 \n"
|
||||
"vmov d14, r4, r5 \n"
|
||||
"vmov d15, r6, r7 \n"
|
||||
|
||||
"reg2_loop: \n"
|
||||
|
||||
"/* Check all the VFP registers still contain the values set above. \n"
|
||||
"First save registers that are clobbered by the test. */ \n"
|
||||
"push { r0-r1 } \n"
|
||||
|
||||
"vmov r0, r1, d0 \n"
|
||||
"cmp r0, #-1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d1 \n"
|
||||
"cmp r0, #2 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #3 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d2 \n"
|
||||
"cmp r0, #4 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #5 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d3 \n"
|
||||
"cmp r0, #6 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #7 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d4 \n"
|
||||
"cmp r0, #8 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #9 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d5 \n"
|
||||
"cmp r0, #10 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #11 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d6 \n"
|
||||
"cmp r0, #-1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d7 \n"
|
||||
"cmp r0, #2 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #3 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d8 \n"
|
||||
"cmp r0, #4 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #5 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d9 \n"
|
||||
"cmp r0, #6 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #7 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d10 \n"
|
||||
"cmp r0, #8 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #9 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d11 \n"
|
||||
"cmp r0, #10 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #11 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d12 \n"
|
||||
"cmp r0, #-1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #1 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d13 \n"
|
||||
"cmp r0, #2 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #3 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d14 \n"
|
||||
"cmp r0, #4 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #5 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"vmov r0, r1, d15 \n"
|
||||
"cmp r0, #6 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
"cmp r1, #7 \n"
|
||||
"bne reg2_error_loopf \n"
|
||||
|
||||
"/* Restore the registers that were clobbered by the test. */ \n"
|
||||
"pop {r0-r1} \n"
|
||||
|
||||
"/* VFP register test passed. Jump to the core register test. */ \n"
|
||||
"b reg2_loopf_pass \n"
|
||||
|
||||
"reg2_error_loopf: \n"
|
||||
"/* If this line is hit then a VFP register value was found to be \n"
|
||||
"incorrect. */ \n"
|
||||
"b reg2_error_loopf \n"
|
||||
|
||||
"reg2_loopf_pass: \n"
|
||||
|
||||
"cmp r0, #-1 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r1, #1 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r2, #2 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r3, #3 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r4, #4 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r5, #5 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r6, #6 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r7, #7 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r8, #8 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r9, #9 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r10, #10 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r11, #11 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
"cmp r12, #12 \n"
|
||||
"bne reg2_error_loop \n"
|
||||
|
||||
"/* Increment the loop counter so the check task knows this task is \n"
|
||||
"still running. */ \n"
|
||||
"push { r0-r1 } \n"
|
||||
"ldr r0, =pulRegTest4LoopCounter \n"
|
||||
"ldr r0, [r0] \n"
|
||||
"ldr r1, [r0] \n"
|
||||
"adds r1, r1, #1 \n"
|
||||
"str r1, [r0] \n"
|
||||
"pop { r0-r1 } \n"
|
||||
|
||||
"/* Yield to increase test coverage. */ \n"
|
||||
"SVC #1 \n"
|
||||
|
||||
"/* Start again. */ \n"
|
||||
"b reg2_loop \n"
|
||||
|
||||
"reg2_error_loop: \n"
|
||||
"/* If this line is hit then there was an error in a core register value. \n"
|
||||
"This loop ensures the loop counter variable stops incrementing. */ \n"
|
||||
"b reg2_error_loop \n"
|
||||
); /* __asm volatile */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Fault handlers are here for convenience as they use compiler specific syntax
|
||||
and this file is specific to the GCC compiler. */
|
||||
void hard_fault_handler( uint32_t * hardfault_args )
|
||||
{
|
||||
volatile uint32_t stacked_r0;
|
||||
volatile uint32_t stacked_r1;
|
||||
volatile uint32_t stacked_r2;
|
||||
volatile uint32_t stacked_r3;
|
||||
volatile uint32_t stacked_r12;
|
||||
volatile uint32_t stacked_lr;
|
||||
volatile uint32_t stacked_pc;
|
||||
volatile uint32_t stacked_psr;
|
||||
|
||||
stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);
|
||||
stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);
|
||||
stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);
|
||||
stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);
|
||||
|
||||
stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);
|
||||
stacked_lr = ((uint32_t) hardfault_args[ 5 ]);
|
||||
stacked_pc = ((uint32_t) hardfault_args[ 6 ]);
|
||||
stacked_psr = ((uint32_t) hardfault_args[ 7 ]);
|
||||
|
||||
/* Inspect stacked_pc to locate the offending instruction. */
|
||||
for( ;; );
|
||||
|
||||
( void ) stacked_psr;
|
||||
( void ) stacked_pc;
|
||||
( void ) stacked_lr;
|
||||
( void ) stacked_r12;
|
||||
( void ) stacked_r0;
|
||||
( void ) stacked_r1;
|
||||
( void ) stacked_r2;
|
||||
( void ) stacked_r3;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler( void ) __attribute__((naked));
|
||||
void HardFault_Handler( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, [r0, #24] \n"
|
||||
" ldr r2, handler_address_const \n"
|
||||
" bx r2 \n"
|
||||
" handler_address_const: .word hard_fault_handler \n"
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void MemManage_Handler( void ) __attribute__((naked));
|
||||
void MemManage_Handler( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
" tst lr, #4 \n"
|
||||
" ite eq \n"
|
||||
" mrseq r0, msp \n"
|
||||
" mrsne r0, psp \n"
|
||||
" ldr r1, [r0, #24] \n"
|
||||
" ldr r2, handler2_address_const \n"
|
||||
" bx r2 \n"
|
||||
" handler2_address_const: .word hard_fault_handler \n"
|
||||
);
|
||||
}/*-----------------------------------------------------------*/
|
||||
|
||||
@ -0,0 +1,356 @@
|
||||
/* Default memory layout. */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x00, LENGTH = 0x80000
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 0x8000
|
||||
}
|
||||
|
||||
/* Variables used by FreeRTOS-MPU. */
|
||||
_Privileged_Functions_Region_Size = 32K;
|
||||
_Privileged_Data_Region_Size = 2048;
|
||||
|
||||
__FLASH_segment_start__ = ORIGIN( ROM );
|
||||
__FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( ROM );
|
||||
|
||||
__privileged_functions_start__ = ORIGIN( ROM );
|
||||
__privileged_functions_end__ = __privileged_functions_start__ + _Privileged_Functions_Region_Size;
|
||||
|
||||
__SRAM_segment_start__ = ORIGIN( RAM );
|
||||
__SRAM_segment_end__ = __SRAM_segment_start__ + LENGTH( RAM );
|
||||
|
||||
__privileged_data_start__ = ORIGIN( RAM );
|
||||
__privileged_data_end__ = ORIGIN( RAM ) + _Privileged_Data_Region_Size;
|
||||
|
||||
|
||||
/*
|
||||
* The '__stack' definition is required by crt0, do not remove it.
|
||||
*/
|
||||
__stack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __stack;
|
||||
|
||||
/*
|
||||
* Default stack sizes.
|
||||
* These are used by the startup in order to allocate stacks
|
||||
* for the different modes.
|
||||
*/
|
||||
|
||||
__Main_Stack_Size = 2048 ;
|
||||
|
||||
PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;
|
||||
|
||||
__Main_Stack_Limit = __stack - __Main_Stack_Size ;
|
||||
|
||||
/*"PROVIDE" allows to easily override these values from an object file or the command line. */
|
||||
PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;
|
||||
|
||||
/*
|
||||
* There will be a link error if there is not this amount of
|
||||
* RAM free at the end.
|
||||
*/
|
||||
_Minimum_Stack_Size = 1024 ;
|
||||
|
||||
/*
|
||||
* Default heap definitions.
|
||||
* The heap start immediately after the last statically allocated
|
||||
* .sbss/.noinit section, and extends up to the main stack limit.
|
||||
*/
|
||||
PROVIDE ( _Heap_Begin = _end_noinit ) ;
|
||||
PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;
|
||||
|
||||
/*
|
||||
* The entry point is informative, for debuggers and simulators,
|
||||
* since the Cortex-M vector points to it anyway.
|
||||
*/
|
||||
ENTRY(_start)
|
||||
|
||||
/* Sections Definitions */
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/*
|
||||
* For Cortex-M devices, the beginning of the startup code is stored in
|
||||
* the .isr_vector section, which goes to ROM
|
||||
*/
|
||||
privileged_functions :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_isr_vector = .;
|
||||
KEEP(*(.isr_vector))
|
||||
*(privileged_functions)
|
||||
. = ALIGN(4);
|
||||
|
||||
/* Non privileged code is after _Privileged_Functions_Region_Size. */
|
||||
__privileged_functions_actual_end__ = .;
|
||||
. = _Privileged_Functions_Region_Size;
|
||||
} > ROM
|
||||
|
||||
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
|
||||
|
||||
/*
|
||||
* This section is here for convenience, to store the
|
||||
* startup code at the beginning of the flash area, hoping that
|
||||
* this will increase the readability of the listing.
|
||||
*/
|
||||
KEEP(*(.after_vectors .after_vectors.*)) /* Startup code and ISR */
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
/*
|
||||
* These are the old initialisation sections, intended to contain
|
||||
* naked code, with the prologue/epilogue added by crti.o/crtn.o
|
||||
* when linking with startup files. The standalone startup code
|
||||
* currently does not run these, better use the init arrays below.
|
||||
*/
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
/*
|
||||
* The preinit code, i.e. an array of pointers to initialisation
|
||||
* functions to be performed before constructors.
|
||||
*/
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
|
||||
/*
|
||||
* Used to run the SystemInit() before anything else.
|
||||
*/
|
||||
KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))
|
||||
|
||||
/*
|
||||
* Used for other platform inits.
|
||||
*/
|
||||
KEEP(*(.preinit_array_platform .preinit_array_platform.*))
|
||||
|
||||
/*
|
||||
* The application inits. If you need to enforce some order in
|
||||
* execution, create new sections, as before.
|
||||
*/
|
||||
KEEP(*(.preinit_array .preinit_array.*))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
/*
|
||||
* The init code, i.e. an array of pointers to static constructors.
|
||||
*/
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
/*
|
||||
* The fini code, i.e. an array of pointers to static destructors.
|
||||
*/
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
*(.text*) /* all remaining code */
|
||||
|
||||
*(vtable) /* C++ virtual tables */
|
||||
|
||||
} >ROM
|
||||
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata*) /* read-only data (constants) */
|
||||
} >ROM
|
||||
|
||||
.glue :
|
||||
{
|
||||
KEEP(*(.eh_frame*))
|
||||
|
||||
/*
|
||||
* Stub sections generated by the linker, to glue together
|
||||
* ARM and Thumb code. .glue_7 is used for ARM code calling
|
||||
* Thumb code, and .glue_7t is used for Thumb code calling
|
||||
* ARM code. Apparently always generated by the linker, for some
|
||||
* architectures, so better leave them here.
|
||||
*/
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
} >ROM
|
||||
|
||||
/* ARM magic sections */
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > ROM
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
__etext = .;
|
||||
|
||||
/*
|
||||
* This address is used by the startup code to
|
||||
* initialise the .data section.
|
||||
*/
|
||||
_sidata = _etext;
|
||||
|
||||
/* MEMORY_ARRAY */
|
||||
/*
|
||||
.ROarraySection :
|
||||
{
|
||||
*(.ROarraySection .ROarraySection.*)
|
||||
} >MEMORY_ARRAY
|
||||
*/
|
||||
|
||||
|
||||
privileged_data :
|
||||
{
|
||||
*(privileged_data)
|
||||
/* Non kernel data is kept out of the first _Privileged_Data_Region_Size
|
||||
bytes of SRAM. */
|
||||
__privileged_data_actual_end__ = .;
|
||||
. = _Privileged_Data_Region_Size;
|
||||
} > RAM
|
||||
|
||||
/*
|
||||
* The initialised data section.
|
||||
* The program executes knowing that the data is in the RAM
|
||||
* but the loader puts the initial values in the ROM (inidata).
|
||||
* It is one task of the startup to copy the initial values from
|
||||
* ROM to RAM.
|
||||
*/
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
. = ALIGN(4);
|
||||
|
||||
/* This is used by the startup code to initialise the .data section */
|
||||
_sdata = . ; /* STM specific definition */
|
||||
__data_start__ = . ;
|
||||
*(.data_begin .data_begin.*)
|
||||
|
||||
*(.data .data.*)
|
||||
|
||||
*(.data_end .data_end.*)
|
||||
. = ALIGN(4);
|
||||
|
||||
/* This is used by the startup code to initialise the .data section */
|
||||
_edata = . ; /* STM specific definition */
|
||||
__data_end__ = . ;
|
||||
|
||||
} >RAM
|
||||
|
||||
|
||||
/*
|
||||
* The uninitialised data section. NOLOAD is used to avoid
|
||||
* the "section `.bss' type changed to PROGBITS" warning
|
||||
*/
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .; /* standard newlib definition */
|
||||
_sbss = .; /* STM specific definition */
|
||||
*(.bss_begin .bss_begin.*)
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
|
||||
*(.bss_end .bss_end.*)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .; /* standard newlib definition */
|
||||
_ebss = . ; /* STM specific definition */
|
||||
} >RAM
|
||||
|
||||
.noinit (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_noinit = .;
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RAM
|
||||
|
||||
/* Mandatory to be word aligned, _sbrk assumes this */
|
||||
PROVIDE ( end = _end_noinit ); /* was _ebss */
|
||||
PROVIDE ( _end = _end_noinit );
|
||||
PROVIDE ( __end = _end_noinit );
|
||||
PROVIDE ( __end__ = _end_noinit );
|
||||
PROVIDE ( ROM_DATA_START = __data_start__ );
|
||||
|
||||
/*
|
||||
* Used for validation only, do not allocate anything here!
|
||||
*
|
||||
* This is just to check that there is enough RAM left for the Main
|
||||
* stack. It should generate an error if it's full.
|
||||
*/
|
||||
._check_stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
|
||||
. = . + _Minimum_Stack_Size ;
|
||||
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
/* After that there are only debugging sections. */
|
||||
|
||||
/* This can remove the debugging information from the standard libraries */
|
||||
/*
|
||||
DISCARD :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
*/
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/*
|
||||
* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0.
|
||||
*/
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@ -0,0 +1,217 @@
|
||||
/* File: startup_ARMCM4.S
|
||||
* Purpose: startup file for Cortex-M4 devices. Should use with
|
||||
* GCC for ARM Embedded Processors
|
||||
* Version: V2.0
|
||||
* Date: 16 August 2013
|
||||
*
|
||||
/* Copyright (c) 2011 - 2013 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
*
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------*/
|
||||
.syntax unified
|
||||
.arch armv7e-m
|
||||
|
||||
.extern __SRAM_segment_end__
|
||||
|
||||
.section .isr_vector
|
||||
.align 4
|
||||
.globl __isr_vector
|
||||
__isr_vector:
|
||||
.long __SRAM_segment_end__ - 4 /* Top of Stack at top of RAM*/
|
||||
.long Reset_Handler /* Reset Handler */
|
||||
.long NMI_Handler /* NMI Handler */
|
||||
.long HardFault_Handler /* Hard Fault Handler */
|
||||
.long MemManage_Handler /* MPU Fault Handler */
|
||||
.long BusFault_Handler /* Bus Fault Handler */
|
||||
.long UsageFault_Handler /* Usage Fault Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long SVC_Handler /* SVCall Handler */
|
||||
.long DebugMon_Handler /* Debug Monitor Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long PendSV_Handler /* PendSV Handler */
|
||||
.long SysTick_Handler /* SysTick Handler */
|
||||
|
||||
/* External interrupts */
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
.long DummyHandler
|
||||
|
||||
|
||||
.text
|
||||
.thumb
|
||||
.thumb_func
|
||||
.align 2
|
||||
.globl _start
|
||||
.extern main
|
||||
.globl Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
_start:
|
||||
Reset_Handler:
|
||||
/* Firstly it copies data from read only memory to RAM. There are two schemes
|
||||
* to copy. One can copy more than one sections. Another can only copy
|
||||
* one section. The former scheme needs more instructions and read-only
|
||||
* data to implement than the latter.
|
||||
* Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
|
||||
|
||||
/* Single section scheme.
|
||||
*
|
||||
* The ranges of copy from/to are specified by following symbols
|
||||
* __etext: LMA of start of the section to copy from. Usually end of text
|
||||
* __data_start__: VMA of start of the section to copy to
|
||||
* __data_end__: VMA of end of the section to copy to
|
||||
*
|
||||
* All addresses must be aligned to 4 bytes boundary.
|
||||
*/
|
||||
ldr r1, =__etext
|
||||
ldr r2, =__data_start__
|
||||
ldr r3, =__data_end__
|
||||
|
||||
.L_loop1:
|
||||
cmp r2, r3
|
||||
ittt lt
|
||||
ldrlt r0, [r1], #4
|
||||
strlt r0, [r2], #4
|
||||
blt .L_loop1
|
||||
|
||||
/* This part of work usually is done in C library startup code. Otherwise,
|
||||
* define this macro to enable it in this startup.
|
||||
*
|
||||
* There are two schemes too. One can clear multiple BSS sections. Another
|
||||
* can only clear one section. The former is more size expensive than the
|
||||
* latter.
|
||||
*
|
||||
* Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
|
||||
* Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
|
||||
*/
|
||||
|
||||
/* Single BSS section scheme.
|
||||
*
|
||||
* The BSS section is specified by following symbols
|
||||
* __bss_start__: start of the BSS section.
|
||||
* __bss_end__: end of the BSS section.
|
||||
*
|
||||
* Both addresses must be aligned to 4 bytes boundary.
|
||||
*/
|
||||
ldr r1, =__bss_start__
|
||||
ldr r2, =__bss_end__
|
||||
|
||||
movs r0, 0
|
||||
.L_loop3:
|
||||
cmp r1, r2
|
||||
itt lt
|
||||
strlt r0, [r1], #4
|
||||
blt .L_loop3
|
||||
|
||||
#ifndef __NO_SYSTEM_INIT
|
||||
/* bl SystemInit */
|
||||
#endif
|
||||
|
||||
bl main
|
||||
|
||||
.pool
|
||||
.size Reset_Handler, . - Reset_Handler
|
||||
|
||||
.align 1
|
||||
.thumb_func
|
||||
.weak Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
b .
|
||||
.size Default_Handler, . - Default_Handler
|
||||
|
||||
/* Macro to define default handlers. Default handler
|
||||
* will be weak symbol and just dead loops. They can be
|
||||
* overwritten by other handlers */
|
||||
.macro def_irq_handler handler_name
|
||||
.weak \handler_name
|
||||
.set \handler_name, Default_Handler
|
||||
.endm
|
||||
|
||||
def_irq_handler NMI_Handler
|
||||
def_irq_handler HardFault_Handler
|
||||
def_irq_handler MemManage_Handler
|
||||
def_irq_handler BusFault_Handler
|
||||
def_irq_handler UsageFault_Handler
|
||||
def_irq_handler SVC_Handler
|
||||
def_irq_handler DebugMon_Handler
|
||||
def_irq_handler PendSV_Handler
|
||||
def_irq_handler SysTick_Handler
|
||||
def_irq_handler DEF_IRQHandler
|
||||
def_irq_handler DummyHandler
|
||||
|
||||
|
||||
.end
|
||||
@ -0,0 +1,23 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
|
||||
LR_IROM1 0x00000000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
*( privileged_functions )
|
||||
}
|
||||
ER_IROM2 0x8000 FIXED {
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 { ; RW data
|
||||
*( privileged_data )
|
||||
}
|
||||
RW_IRAM2 0x20000800 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -0,0 +1,358 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>RTOSDemo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>48000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>7</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>1</uSim>
|
||||
<uTrg>0</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>0</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGDARM</Key>
|
||||
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGUARM</Key>
|
||||
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMRTXEVENTFLAGS</Key>
|
||||
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>DLGTARM</Key>
|
||||
<Name>(1010=1231,224,1641,767,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=1199,245,1664,545,0)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name>-T0</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>-UV1115SAE -O3047 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC48000000 -TP21 -TDS8028 -TDT0 -TDC1F -TIE1 -TIP8 -FO11 -FD118000 -FC8000 -FN1 -FF0NEW_DEVICE.FLM -FS0E0000 -FL038000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<WatchWindow1>
|
||||
<Ww>
|
||||
<count>0</count>
|
||||
<WinNumber>1</WinNumber>
|
||||
<ItemText>ulCycleCount</ItemText>
|
||||
</Ww>
|
||||
</WatchWindow1>
|
||||
<MemoryWindow1>
|
||||
<Mm>
|
||||
<WinNumber>1</WinNumber>
|
||||
<SubType>2</SubType>
|
||||
<ItemText>0xe000e284</ItemText>
|
||||
<AccSizeX>4</AccSizeX>
|
||||
</Mm>
|
||||
</MemoryWindow1>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>1</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>1</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<Lin2Executable></Lin2Executable>
|
||||
<Lin2ConfigFile></Lin2ConfigFile>
|
||||
<bLin2Auto>0</bLin2Auto>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>System</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\startup_MPS_CM4.S</PathWithFileName>
|
||||
<FilenameWithoutPath>startup_MPS_CM4.S</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>main_and_config</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\main.c</PathWithFileName>
|
||||
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>5</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\FreeRTOSConfig.h</PathWithFileName>
|
||||
<FilenameWithoutPath>FreeRTOSConfig.h</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>2</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\RegTest.c</PathWithFileName>
|
||||
<FilenameWithoutPath>RegTest.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>FreeRTOS_Source</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>5</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\event_groups.c</PathWithFileName>
|
||||
<FilenameWithoutPath>event_groups.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>6</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\list.c</PathWithFileName>
|
||||
<FilenameWithoutPath>list.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>7</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\queue.c</PathWithFileName>
|
||||
<FilenameWithoutPath>queue.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>8</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\tasks.c</PathWithFileName>
|
||||
<FilenameWithoutPath>tasks.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>9</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\timers.c</PathWithFileName>
|
||||
<FilenameWithoutPath>timers.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>10</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\portable\RVDS\ARM_CM4_MPU\port.c</PathWithFileName>
|
||||
<FilenameWithoutPath>port.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>3</GroupNumber>
|
||||
<FileNumber>11</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>..\..\..\Source\portable\Common\mpu_wrappers.c</PathWithFileName>
|
||||
<FilenameWithoutPath>mpu_wrappers.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
@ -0,0 +1,451 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>RTOSDemo</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060183::V5.06 update 2 (build 183)::ARMCC</pCCUsed>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>ARMCM4_FP</Device>
|
||||
<Vendor>ARM</Vendor>
|
||||
<PackID>ARM.CMSIS.5.0.0-Beta4</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||
<OutputName>RTOSDemo</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>1</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>1</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>0</v6Lang>
|
||||
<v6LangP>0</v6LangP>
|
||||
<vShortEn>0</vShortEn>
|
||||
<vShortWch>0</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..;..\..\..\Source\include;..\..\..\Source\portable\RVDS\ARM_CM4_MPU;..\..\Common\include;..\CMSIS;..\main_full</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>RTOSDemo.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>System</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_MPS_CM4.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\startup_MPS_CM4.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>main_and_config</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>FreeRTOSConfig.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\FreeRTOSConfig.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>RegTest.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\RegTest.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>FreeRTOS_Source</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>event_groups.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\event_groups.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>list.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\list.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tasks.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\tasks.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timers.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\timers.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\portable\RVDS\ARM_CM4_MPU\port.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mpu_wrappers.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\..\Source\portable\Common\mpu_wrappers.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
@ -0,0 +1,703 @@
|
||||
/*
|
||||
FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/* FreeRTOS includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "task.h"
|
||||
|
||||
/*
|
||||
* "Reg test" tasks - These fill the registers with known values, then check
|
||||
* that each register maintains its expected value for the lifetime of the
|
||||
* task. Each task uses a different set of values. The reg test tasks execute
|
||||
* with a very low priority, so get preempted very frequently. A register
|
||||
* containing an unexpected value is indicative of an error in the context
|
||||
* switching mechanism.
|
||||
*/
|
||||
|
||||
void vRegTest1Implementation( void *pvParameters );
|
||||
void vRegTest2Implementation( void *pvParameters );
|
||||
void vRegTest3Implementation( void );
|
||||
void vRegTest4Implementation( void );
|
||||
|
||||
/*
|
||||
* Used as an easy way of deleting a task from inline assembly.
|
||||
*/
|
||||
extern void vMainDeleteMe( void ) __attribute__((noinline));
|
||||
|
||||
/*
|
||||
* Used by the first two reg test tasks and a software timer callback function
|
||||
* to send messages to the check task. The message just lets the check task
|
||||
* know that the tasks and timer are still functioning correctly. If a reg test
|
||||
* task detects an error it will delete itself, and in so doing prevent itself
|
||||
* from sending any more 'I'm Alive' messages to the check task.
|
||||
*/
|
||||
extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );
|
||||
|
||||
/* The queue used to send a message to the check task. */
|
||||
extern QueueHandle_t xGlobalScopeCheckQueue;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest1Implementation( void *pvParameters )
|
||||
{
|
||||
/* This task is created in privileged mode so can access the file scope
|
||||
queue variable. Take a stack copy of this before the task is set into user
|
||||
mode. Once this task is in user mode the file scope queue variable will no
|
||||
longer be accessible but the stack copy will. */
|
||||
QueueHandle_t xQueue = xGlobalScopeCheckQueue;
|
||||
const TickType_t xDelayTime = pdMS_TO_TICKS( 100UL );
|
||||
|
||||
/* Now the queue handle has been obtained the task can switch to user
|
||||
mode. This is just one method of passing a handle into a protected
|
||||
task, the other reg test task uses the task parameter instead. */
|
||||
portSWITCH_TO_USER_MODE();
|
||||
|
||||
/* First check that the parameter value is as expected. */
|
||||
if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )
|
||||
{
|
||||
/* Error detected. Delete the task so it stops communicating with
|
||||
the check task. */
|
||||
vMainDeleteMe();
|
||||
}
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
#if defined ( __GNUC__ )
|
||||
{
|
||||
/* This task tests the kernel context switch mechanism by reading and
|
||||
writing directly to registers - which requires the test to be written
|
||||
in assembly code. */
|
||||
__asm volatile
|
||||
(
|
||||
" MOV R4, #104 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
|
||||
" MOV R5, #105 \n"
|
||||
" MOV R6, #106 \n"
|
||||
" MOV R8, #108 \n"
|
||||
" MOV R9, #109 \n"
|
||||
" MOV R10, #110 \n"
|
||||
" MOV R11, #111 \n"
|
||||
"reg1loop: \n"
|
||||
" MOV R0, #100 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
|
||||
" MOV R1, #101 \n"
|
||||
" MOV R2, #102 \n"
|
||||
" MOV R3, #103 \n"
|
||||
" MOV R12, #112 \n"
|
||||
" SVC #1 \n" /* Yield just to increase test coverage. */
|
||||
" CMP R0, #100 \n" /* Check all the registers still contain their expected values. */
|
||||
" BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */
|
||||
" CMP R1, #101 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R2, #102 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R3, #103 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R4, #104 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R5, #105 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R6, #106 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R8, #108 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R9, #109 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R10, #110 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R11, #111 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R12, #112 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
:::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
|
||||
);
|
||||
}
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this
|
||||
task is still functioning. */
|
||||
vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );
|
||||
vTaskDelay( xDelayTime );
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
{
|
||||
/* Go back to check all the register values again. */
|
||||
__asm volatile( " B reg1loop " );
|
||||
}
|
||||
#endif /* __GNUC__ */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vRegTest2Implementation( void *pvParameters )
|
||||
{
|
||||
/* The queue handle is passed in as the task parameter. This is one method of
|
||||
passing data into a protected task, the other reg test task uses a different
|
||||
method. */
|
||||
QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;
|
||||
const TickType_t xDelayTime = pdMS_TO_TICKS( 100UL );
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
#if defined ( __GNUC__ )
|
||||
{
|
||||
/* This task tests the kernel context switch mechanism by reading and
|
||||
writing directly to registers - which requires the test to be written
|
||||
in assembly code. */
|
||||
__asm volatile
|
||||
(
|
||||
" MOV R4, #4 \n" /* Set registers to a known value. R0 to R1 are done in the loop below. */
|
||||
" MOV R5, #5 \n"
|
||||
" MOV R6, #6 \n"
|
||||
" MOV R8, #8 \n" /* Frame pointer is omitted as it must not be changed. */
|
||||
" MOV R9, #9 \n"
|
||||
" MOV R10, 10 \n"
|
||||
" MOV R11, #11 \n"
|
||||
"reg2loop: \n"
|
||||
" MOV R0, #13 \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */
|
||||
" MOV R1, #1 \n"
|
||||
" MOV R2, #2 \n"
|
||||
" MOV R3, #3 \n"
|
||||
" MOV R12, #12 \n"
|
||||
" CMP R0, #13 \n" /* Check all the registers still contain their expected values. */
|
||||
" BNE vMainDeleteMe \n" /* Value was not as expected, delete the task so it stops communicating with the check task */
|
||||
" CMP R1, #1 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R2, #2 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R3, #3 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R4, #4 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R5, #5 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R6, #6 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R8, #8 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R9, #9 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R10, #10 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R11, #11 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
" CMP R12, #12 \n"
|
||||
" BNE vMainDeleteMe \n"
|
||||
:::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"
|
||||
);
|
||||
}
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate
|
||||
that this task is still functioning. */
|
||||
vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );
|
||||
vTaskDelay( xDelayTime );
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
{
|
||||
/* Go back to check all the register values again. */
|
||||
__asm volatile( " B reg2loop " );
|
||||
}
|
||||
#endif /* __GNUC__ */
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void vRegTest3Implementation( void )
|
||||
{
|
||||
extern pulRegTest3LoopCounter
|
||||
|
||||
PRESERVE8
|
||||
|
||||
/* Fill the core registers with known values. */
|
||||
mov r0, #100
|
||||
mov r1, #101
|
||||
mov r2, #102
|
||||
mov r3, #103
|
||||
mov r4, #104
|
||||
mov r5, #105
|
||||
mov r6, #106
|
||||
mov r7, #107
|
||||
mov r8, #108
|
||||
mov r9, #109
|
||||
mov r10, #110
|
||||
mov r11, #111
|
||||
mov r12, #112
|
||||
|
||||
/* Fill the VFP registers with known values. */
|
||||
vmov d0, r0, r1
|
||||
vmov d1, r2, r3
|
||||
vmov d2, r4, r5
|
||||
vmov d3, r6, r7
|
||||
vmov d4, r8, r9
|
||||
vmov d5, r10, r11
|
||||
vmov d6, r0, r1
|
||||
vmov d7, r2, r3
|
||||
vmov d8, r4, r5
|
||||
vmov d9, r6, r7
|
||||
vmov d10, r8, r9
|
||||
vmov d11, r10, r11
|
||||
vmov d12, r0, r1
|
||||
vmov d13, r2, r3
|
||||
vmov d14, r4, r5
|
||||
vmov d15, r6, r7
|
||||
|
||||
reg1_loop
|
||||
|
||||
/* Check all the VFP registers still contain the values set above.
|
||||
First save registers that are clobbered by the test. */
|
||||
push { r0-r1 }
|
||||
|
||||
vmov r0, r1, d0
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d1
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d2
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d3
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d4
|
||||
cmp r0, #108
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #109
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d5
|
||||
cmp r0, #110
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #111
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d6
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d7
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d8
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d9
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d10
|
||||
cmp r0, #108
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #109
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d11
|
||||
cmp r0, #110
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #111
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d12
|
||||
cmp r0, #100
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #101
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d13
|
||||
cmp r0, #102
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #103
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d14
|
||||
cmp r0, #104
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #105
|
||||
bne reg1_error_loopf
|
||||
vmov r0, r1, d15
|
||||
cmp r0, #106
|
||||
bne reg1_error_loopf
|
||||
cmp r1, #107
|
||||
bne reg1_error_loopf
|
||||
|
||||
/* Restore the registers that were clobbered by the test. */
|
||||
pop {r0-r1}
|
||||
|
||||
/* VFP register test passed. Jump to the core register test. */
|
||||
b reg1_loopf_pass
|
||||
|
||||
reg1_error_loopf
|
||||
/* If this line is hit then a VFP register value was found to be incorrect. */
|
||||
b reg1_error_loopf
|
||||
|
||||
reg1_loopf_pass
|
||||
|
||||
cmp r0, #100
|
||||
bne reg1_error_loop
|
||||
cmp r1, #101
|
||||
bne reg1_error_loop
|
||||
cmp r2, #102
|
||||
bne reg1_error_loop
|
||||
cmp r3, #103
|
||||
bne reg1_error_loop
|
||||
cmp r4, #104
|
||||
bne reg1_error_loop
|
||||
cmp r5, #105
|
||||
bne reg1_error_loop
|
||||
cmp r6, #106
|
||||
bne reg1_error_loop
|
||||
cmp r7, #107
|
||||
bne reg1_error_loop
|
||||
cmp r8, #108
|
||||
bne reg1_error_loop
|
||||
cmp r9, #109
|
||||
bne reg1_error_loop
|
||||
cmp r10, #110
|
||||
bne reg1_error_loop
|
||||
cmp r11, #111
|
||||
bne reg1_error_loop
|
||||
cmp r12, #112
|
||||
bne reg1_error_loop
|
||||
|
||||
/* Everything passed, increment the loop counter. */
|
||||
push { r0-r1 }
|
||||
ldr r0, =pulRegTest3LoopCounter
|
||||
ldr r0, [r0]
|
||||
ldr r1, [r0]
|
||||
adds r1, r1, #1
|
||||
str r1, [r0]
|
||||
pop { r0-r1 }
|
||||
|
||||
/* Start again. */
|
||||
b reg1_loop
|
||||
|
||||
reg1_error_loop
|
||||
/* If this line is hit then there was an error in a core register value.
|
||||
The loop ensures the loop counter stops incrementing. */
|
||||
b reg1_error_loop
|
||||
nop
|
||||
nop
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
__asm void vRegTest4Implementation( void )
|
||||
{
|
||||
extern pulRegTest4LoopCounter;
|
||||
|
||||
PRESERVE8
|
||||
|
||||
/* Set all the core registers to known values. */
|
||||
mov r0, #-1
|
||||
mov r1, #1
|
||||
mov r2, #2
|
||||
mov r3, #3
|
||||
mov r4, #4
|
||||
mov r5, #5
|
||||
mov r6, #6
|
||||
mov r7, #7
|
||||
mov r8, #8
|
||||
mov r9, #9
|
||||
mov r10, #10
|
||||
mov r11, #11
|
||||
mov r12, #12
|
||||
|
||||
/* Set all the VFP to known values. */
|
||||
vmov d0, r0, r1
|
||||
vmov d1, r2, r3
|
||||
vmov d2, r4, r5
|
||||
vmov d3, r6, r7
|
||||
vmov d4, r8, r9
|
||||
vmov d5, r10, r11
|
||||
vmov d6, r0, r1
|
||||
vmov d7, r2, r3
|
||||
vmov d8, r4, r5
|
||||
vmov d9, r6, r7
|
||||
vmov d10, r8, r9
|
||||
vmov d11, r10, r11
|
||||
vmov d12, r0, r1
|
||||
vmov d13, r2, r3
|
||||
vmov d14, r4, r5
|
||||
vmov d15, r6, r7
|
||||
|
||||
reg2_loop
|
||||
|
||||
/* Check all the VFP registers still contain the values set above.
|
||||
First save registers that are clobbered by the test. */
|
||||
push { r0-r1 }
|
||||
|
||||
vmov r0, r1, d0
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d1
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d2
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d3
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d4
|
||||
cmp r0, #8
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #9
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d5
|
||||
cmp r0, #10
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #11
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d6
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d7
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d8
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d9
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d10
|
||||
cmp r0, #8
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #9
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d11
|
||||
cmp r0, #10
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #11
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d12
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #1
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d13
|
||||
cmp r0, #2
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #3
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d14
|
||||
cmp r0, #4
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #5
|
||||
bne reg2_error_loopf
|
||||
vmov r0, r1, d15
|
||||
cmp r0, #6
|
||||
bne reg2_error_loopf
|
||||
cmp r1, #7
|
||||
bne reg2_error_loopf
|
||||
|
||||
/* Restore the registers that were clobbered by the test. */
|
||||
pop {r0-r1}
|
||||
|
||||
/* VFP register test passed. Jump to the core register test. */
|
||||
b reg2_loopf_pass
|
||||
|
||||
reg2_error_loopf
|
||||
/* If this line is hit then a VFP register value was found to be
|
||||
incorrect. */
|
||||
b reg2_error_loopf
|
||||
|
||||
reg2_loopf_pass
|
||||
|
||||
cmp r0, #-1
|
||||
bne reg2_error_loop
|
||||
cmp r1, #1
|
||||
bne reg2_error_loop
|
||||
cmp r2, #2
|
||||
bne reg2_error_loop
|
||||
cmp r3, #3
|
||||
bne reg2_error_loop
|
||||
cmp r4, #4
|
||||
bne reg2_error_loop
|
||||
cmp r5, #5
|
||||
bne reg2_error_loop
|
||||
cmp r6, #6
|
||||
bne reg2_error_loop
|
||||
cmp r7, #7
|
||||
bne reg2_error_loop
|
||||
cmp r8, #8
|
||||
bne reg2_error_loop
|
||||
cmp r9, #9
|
||||
bne reg2_error_loop
|
||||
cmp r10, #10
|
||||
bne reg2_error_loop
|
||||
cmp r11, #11
|
||||
bne reg2_error_loop
|
||||
cmp r12, #12
|
||||
bne reg2_error_loop
|
||||
|
||||
/* Increment the loop counter so the check task knows this task is
|
||||
still running. */
|
||||
push { r0-r1 }
|
||||
ldr r0, =pulRegTest4LoopCounter
|
||||
ldr r0, [r0]
|
||||
ldr r1, [r0]
|
||||
adds r1, r1, #1
|
||||
str r1, [r0]
|
||||
pop { r0-r1 }
|
||||
|
||||
/* Yield to increase test coverage. */
|
||||
SVC #1
|
||||
|
||||
/* Start again. */
|
||||
b reg2_loop
|
||||
|
||||
reg2_error_loop
|
||||
/* If this line is hit then there was an error in a core register value.
|
||||
This loop ensures the loop counter variable stops incrementing. */
|
||||
b reg2_error_loop
|
||||
nop
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Fault handlers are here for convenience as they use compiler specific syntax
|
||||
and this file is specific to the Keil compiler. */
|
||||
void hard_fault_handler( uint32_t * hardfault_args )
|
||||
{
|
||||
volatile uint32_t stacked_r0;
|
||||
volatile uint32_t stacked_r1;
|
||||
volatile uint32_t stacked_r2;
|
||||
volatile uint32_t stacked_r3;
|
||||
volatile uint32_t stacked_r12;
|
||||
volatile uint32_t stacked_lr;
|
||||
volatile uint32_t stacked_pc;
|
||||
volatile uint32_t stacked_psr;
|
||||
|
||||
stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);
|
||||
stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);
|
||||
stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);
|
||||
stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);
|
||||
|
||||
stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);
|
||||
stacked_lr = ((uint32_t) hardfault_args[ 5 ]);
|
||||
stacked_pc = ((uint32_t) hardfault_args[ 6 ]);
|
||||
stacked_psr = ((uint32_t) hardfault_args[ 7 ]);
|
||||
|
||||
/* Inspect stacked_pc to locate the offending instruction. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void HardFault_Handler( void );
|
||||
__asm void HardFault_Handler( void )
|
||||
{
|
||||
extern hard_fault_handler
|
||||
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
ldr r1, [r0, #24]
|
||||
ldr r2, hard_fault_handler
|
||||
bx r2
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void MemManage_Handler( void );
|
||||
__asm void MemManage_Handler( void )
|
||||
{
|
||||
extern hard_fault_handler
|
||||
|
||||
tst lr, #4
|
||||
ite eq
|
||||
mrseq r0, msp
|
||||
mrsne r0, psp
|
||||
ldr r1, [r0, #24]
|
||||
ldr r2, hard_fault_handler
|
||||
bx r2
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
@ -0,0 +1,172 @@
|
||||
;/*****************************************************************************
|
||||
; * @file: startup_MPS_CM4.s
|
||||
; * @purpose: CMSIS Cortex-M4 Core Device Startup File
|
||||
; * for the ARM 'Microcontroller Prototyping System'
|
||||
; * @version: V1.00
|
||||
; * @date: 1. Jun. 2010
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
; *
|
||||
; * Copyright (C) 2008-2010 ARM Limited. All rights reserved.
|
||||
; * ARM Limited (ARM) is supplying this software for use with Cortex-M4
|
||||
; * processor based microcontrollers. This file can be freely distributed
|
||||
; * within development tools that are supporting such ARM based processors.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; ****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
Stack_Size EQU 0x00000800
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
; AREA RESET, CODE, READONLY
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
; Remap vector table
|
||||
LDR R0, =__Vectors
|
||||
LDR R1, =0xE000ED08
|
||||
STR R0, [r1]
|
||||
NOP
|
||||
|
||||
IF {CPU} = "Cortex-M4.fp"
|
||||
LDR R0, =0xE000ED88 ; Enable CP10,CP11
|
||||
LDR R1,[R0]
|
||||
ORR R1,R1,#(0xF << 20)
|
||||
STR R1,[R0]
|
||||
ENDIF
|
||||
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
|
||||
END
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue