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Kernel changes:

Browse Source 
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.

New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.

New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
pull/1/head
Richard Barry 10 years ago
parent 2bf93bf925
commit 63b3c773d5
557 changed files with 284426 additions and 16 deletions
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236
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Blinky_Demo/main_blinky.c
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/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
* NOTE 1: This project provides two demo applications. A simple blinky
* style project, and a more comprehensive test and demo application. The
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
* in main.c. This file implements the simply blinky style version.
*
* NOTE 2: This file only contains the source code that is specific to the
* basic demo. Generic functions, such FreeRTOS hook functions, and functions
* required to configure the hardware are defined in main.c.
******************************************************************************
*
* main_blinky() creates one queue, and two tasks. It then starts the
* scheduler.
*
* The Queue Send Task:
* The queue send task is implemented by the prvQueueSendTask() function in
* this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
* block for 200 milliseconds, before sending the value 100 to the queue that
* was created within main_blinky(). Once the value is sent, the task loops
* back around to block for another 200 milliseconds...and so on.
*
* The Queue Receive Task:
* The queue receive task is implemented by the prvQueueReceiveTask() function
* in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
* blocks on attempts to read data from the queue that was created within
* main_blinky(). When data is received, the task checks the value of the
* data, and if the value equals the expected 100, toggles an LED. The 'block
* time' parameter passed to the queue receive function specifies that the
* task should be held in the Blocked state indefinitely to wait for data to
* be available on the queue. The queue receive task will only leave the
* Blocked state when the queue send task writes to the queue. As the queue
* send task writes to the queue every 200 milliseconds, the queue receive
* task leaves the Blocked state every 200 milliseconds, and therefore toggles
* the LED every 200 milliseconds.
*/
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* Library includes. */
#include "board.h"
/* Priorities at which the tasks are created. */
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* The rate at which data is sent to the queue. The 200ms value is converted
to ticks using the portTICK_PERIOD_MS constant. */
#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_PERIOD_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added, meaning the send task should always find
the queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/* The LED toggled by the Rx task. */
#define mainTASK_LED ( 0 )
/*-----------------------------------------------------------*/
/*
* Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in
* main.c.
*/
void main_blinky( void );
/*
* The tasks as described in the comments at the top of this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/*-----------------------------------------------------------*/
/* The queue used by both tasks. */
static QueueHandle_t xQueue = NULL;
/*-----------------------------------------------------------*/
void main_blinky( void )
{
/* Create the queue. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
if( xQueue != NULL )
{
/* Start the two tasks as described in the comments at the top of this
file. */
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
NULL, /* The parameter passed to the task - not used in this case. */
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
NULL ); /* The task handle is not required, so NULL is passed. */
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
/* Start the tasks and timer running. */
vTaskStartScheduler();
}
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was either insufficient FreeRTOS heap memory available for the idle
and/or timer tasks to be created, or vTaskStartScheduler() was called from
User mode. See the memory management section on the FreeRTOS web site for
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
mode from which main() is called is set in the C start up code and must be
a privileged mode (not user mode). */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
TickType_t xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Remove compiler warning about unused parameter. */
( void ) pvParameters;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
/* Send to the queue - causing the queue receive task to unblock and
toggle the LED. 0 is used as the block time so the sending operation
will not block - it shouldn't need to block as the queue should always
be empty at this point in the code. */
xQueueSend( xQueue, &ulValueToSend, 0U );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
const unsigned long ulExpectedValue = 100UL;
/* Remove compiler warning about unused parameter. */
( void ) pvParameters;
for( ;; )
{
/* Wait until something arrives in the queue - this task will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have been received from the queue, but
is it the expected value? If it is, toggle the LED. */
if( ulReceivedValue == ulExpectedValue )
{
LED_Toggle( mainTASK_LED );
ulReceivedValue = 0U;
}
}
}
/*-----------------------------------------------------------*/

187
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/FreeRTOSConfig.h
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/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/* For definition of BOARD_MCK. */
#ifndef __IAR_SYSTEMS_ASM__
/* Prevent chip.h being included when this file is included from the IAR
port layer assembly file. */
#include "board.h"
#endif
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#define configUSE_QUEUE_SETS 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 1
#define configCPU_CLOCK_HZ ( BOARD_MCK << 1UL )
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 130 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 46 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 10 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
/* The full demo always has tasks to run so the tick will never be turned off.
The blinky demo will use the default tickless idle implementation to turn the
tick off. */
#define configUSE_TICKLESS_IDLE 0
/* Run time stats gathering definitions. */
#define configGENERATE_RUN_TIME_STATS 0
/* This demo makes use of one or more example stats formatting functions. These
format the raw data provided by the uxTaskGetSystemState() function in to human
readable ASCII form. See the notes in the implementation of vTaskList() within
FreeRTOS/Source/tasks.c for limitations. */
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 1
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_eTaskGetState 1
#define INCLUDE_xTimerPendFunctionCall 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 3 /* 7 priority levels */
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x07
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 4
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define xPortPendSVHandler PendSV_Handler
#define vPortSVCHandler SVC_Handler
#define xPortSysTickHandler SysTick_Handler
#endif /* FREERTOS_CONFIG_H */

200
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Full_Demo/IntQueueTimer.c
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/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* This file initialises three timers as follows:
*
* TC0 channels 0 and 1 provide the interrupts that are used with the IntQ
* standard demo tasks, which test interrupt nesting and using queues from
* interrupts. As the interrupt is shared the nesting achieved is not as deep
* as normal when this test is executed, but still worth while.
*
* TC2 channel 0 provides a much higher frequency timer that tests the nesting
* of interrupts that don't use the FreeRTOS API. For convenience, the high
* frequency timer also keeps a count of the number of time it executes, and the
* count is used as the time base for the run time stats (which can be viewed
* through the CLI).
*
* All the timers can nest with the tick interrupt - creating a maximum
* interrupt nesting depth of 3 (normally 4, if the first two timers used
* separate interrupts).
*
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Demo includes. */
#include "IntQueueTimer.h"
#include "IntQueue.h"
/* Library includes. */
#include "board.h"
/* The frequencies at which the first two timers expire are slightly offset to
ensure they don't remain synchronised. The frequency of the highest priority
interrupt is 20 times faster so really hammers the interrupt entry and exit
code. */
#define tmrTIMER_0_FREQUENCY ( 2000UL )
#define tmrTIMER_1_FREQUENCY ( 2003UL )
#define tmrTIMER_2_FREQUENCY ( 20000UL )
/* The channels used in TC0 for generating the three interrupts. */
#define tmrTC0_CHANNEL_0 0 /* At tmrTIMER_0_FREQUENCY */
#define tmrTC0_CHANNEL_1 1 /* At tmrTIMER_1_FREQUENCY */
#define tmrTC1_CHANNEL_0 0 /* At tmrTIMER_2_FREQUENCY */
/* The bit within the RC_SR register that indicates an RC compare. */
#define tmrRC_COMPARE ( 1UL << 4UL )
/* The high frequency interrupt given a priority above the maximum at which
interrupt safe FreeRTOS calls can be made. The priority of the lower frequency
timers must still be above the tick interrupt priority. */
#define tmrLOWER_PRIORITY configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
#define tmrHIGHER_PRIORITY configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1
/*-----------------------------------------------------------*/
/* For convenience the high frequency timer increments a variable that is then
used as the time base for the run time stats. */
volatile uint32_t ulHighFrequencyTimerCounts = 0;
/*-----------------------------------------------------------*/
void vInitialiseTimerForIntQueueTest( void )
{
const uint32_t ulDivider = 128UL, ulTCCLKS = 3UL;
/* Enable the TC clocks. */
PMC_EnablePeripheral( ID_TC0 );
PMC_EnablePeripheral( ID_TC1 );
/* Configure TC0 channel 0 for a tmrTIMER_0_FREQUENCY frequency and trigger
on RC compare. This is part of the IntQTimer test. */
TC_Configure( TC0, tmrTC0_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC = ( configCPU_CLOCK_HZ / 2 ) / ( tmrTIMER_0_FREQUENCY * ulDivider );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_IER = TC_IER_CPCS;
/* Configure TC0 channel 1 for a tmrTIMER_1_FREQUENCY frequency and trigger
on RC compare. This is part of the IntQTimer test. */
TC_Configure( TC0, tmrTC0_CHANNEL_1, ulTCCLKS | TC_CMR_CPCTRG );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_RC = ( configCPU_CLOCK_HZ / 2 ) / ( tmrTIMER_1_FREQUENCY * ulDivider );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_IER = TC_IER_CPCS;
/* Configure and enable TC0 interrupt on RC compare. */
NVIC_SetPriority( TC0_IRQn, tmrLOWER_PRIORITY );
NVIC_ClearPendingIRQ( TC0_IRQn );
NVIC_EnableIRQ( TC0_IRQn );
/* Configure TC1 channel 0 tmrTIMER_2_FREQUENCY frequency and trigger on
RC compare. This is the very high frequency timer. */
TC_Configure( TC1, tmrTC1_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_RC = ( configCPU_CLOCK_HZ / 2 ) / ( tmrTIMER_2_FREQUENCY * ulDivider );
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_IER = TC_IER_CPCS;
/* Configure and enable TC1 interrupt on RC compare */
// NVIC_SetPriority( TC1_IRQn, tmrHIGHER_PRIORITY );
// NVIC_ClearPendingIRQ( TC1_IRQn );
// NVIC_EnableIRQ( TC1_IRQn );
TC_Start( TC0, tmrTC0_CHANNEL_0 );
TC_Start( TC0, tmrTC0_CHANNEL_1 );
// TC_Start( TC1, tmrTC1_CHANNEL_0 );
}
/*-----------------------------------------------------------*/
void TC0_Handler( void )
{
/* Read will clear the status bit. */
if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_SR & tmrRC_COMPARE ) != 0 )
{
/* Call the IntQ test function for this channel. */
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
if( ( TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_SR & tmrRC_COMPARE ) != 0 )
{
/* Call the IntQ test function for this channel. */
portYIELD_FROM_ISR( xSecondTimerHandler() );
}
}
/*-----------------------------------------------------------*/
void TC1_Handler( void )
{
volatile uint32_t ulDummy;
/* Dummy read to clear status bit. */
ulDummy = TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_SR;
NVIC_ClearPendingIRQ( TC1_IRQn );
/* Keep a count of the number of interrupts to use as a time base for the
run-time stats. */
ulHighFrequencyTimerCounts++;
}

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Full_Demo/IntQueueTimer.h
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/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef INT_QUEUE_TIMER_H
#define INT_QUEUE_TIMER_H
void vInitialiseTimerForIntQueueTest( void );
BaseType_t xTimer0Handler( void );
BaseType_t xTimer1Handler( void );
#endif

444
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Full_Demo/RegTest.c
Unescape Escape View File

@ -0,0 +1,444 @@
/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
__asm void vRegTest1Implementation( void )
{
PRESERVE8
IMPORT ulRegTest1LoopCounter
/* Fill the core registers with known values. */
mov r0, #100
mov r1, #101
mov r2, #102
mov r3, #103
mov r4, #104
mov r5, #105
mov r6, #106
mov r7, #107
mov r8, #108
mov r9, #109
mov r10, #110
mov r11, #111
mov r12, #112
/* Fill the VFP registers with known values. */
vmov d0, r0, r1
vmov d1, r2, r3
vmov d2, r4, r5
vmov d3, r6, r7
vmov d4, r8, r9
vmov d5, r10, r11
vmov d6, r0, r1
vmov d7, r2, r3
vmov d8, r4, r5
vmov d9, r6, r7
vmov d10, r8, r9
vmov d11, r10, r11
vmov d12, r0, r1
vmov d13, r2, r3
vmov d14, r4, r5
vmov d15, r6, r7
reg1_loop
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d1
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d2
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d3
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
vmov r0, r1, d4
cmp r0, #108
bne reg1_error_loopf
cmp r1, #109
bne reg1_error_loopf
vmov r0, r1, d5
cmp r0, #110
bne reg1_error_loopf
cmp r1, #111
bne reg1_error_loopf
vmov r0, r1, d6
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d7
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d8
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d9
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
vmov r0, r1, d10
cmp r0, #108
bne reg1_error_loopf
cmp r1, #109
bne reg1_error_loopf
vmov r0, r1, d11
cmp r0, #110
bne reg1_error_loopf
cmp r1, #111
bne reg1_error_loopf
vmov r0, r1, d12
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d13
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d14
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d15
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg1_loopf_pass
reg1_error_loopf
/* If this line is hit then a VFP register value was found to be
incorrect. */
b reg1_error_loopf
reg1_loopf_pass
cmp r0, #100
bne reg1_error_loop
cmp r1, #101
bne reg1_error_loop
cmp r2, #102
bne reg1_error_loop
cmp r3, #103
bne reg1_error_loop
cmp r4, #104
bne reg1_error_loop
cmp r5, #105
bne reg1_error_loop
cmp r6, #106
bne reg1_error_loop
cmp r7, #107
bne reg1_error_loop
cmp r8, #108
bne reg1_error_loop
cmp r9, #109
bne reg1_error_loop
cmp r10, #110
bne reg1_error_loop
cmp r11, #111
bne reg1_error_loop
cmp r12, #112
bne reg1_error_loop
/* Everything passed, increment the loop counter. */
push { r0-r1 }
ldr r0, =ulRegTest1LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
pop { r0-r1 }
/* Start again. */
b reg1_loop
reg1_error_loop
/* If this line is hit then there was an error in a core register value.
The loop ensures the loop counter stops incrementing. */
b reg1_error_loop
nop
}
/*-----------------------------------------------------------*/
__asm void vRegTest2Implementation( void )
{
PRESERVE8
IMPORT ulRegTest2LoopCounter
/* Set all the core registers to known values. */
mov r0, #-1
mov r1, #1
mov r2, #2
mov r3, #3
mov r4, #4
mov r5, #5
mov r6, #6
mov r7, #7
mov r8, #8
mov r9, #9
mov r10, #10
mov r11, #11
mov r12, #12
/* Set all the VFP to known values. */
vmov d0, r0, r1
vmov d1, r2, r3
vmov d2, r4, r5
vmov d3, r6, r7
vmov d4, r8, r9
vmov d5, r10, r11
vmov d6, r0, r1
vmov d7, r2, r3
vmov d8, r4, r5
vmov d9, r6, r7
vmov d10, r8, r9
vmov d11, r10, r11
vmov d12, r0, r1
vmov d13, r2, r3
vmov d14, r4, r5
vmov d15, r6, r7
reg2_loop
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d1
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d2
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d3
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
vmov r0, r1, d4
cmp r0, #8
bne reg2_error_loopf
cmp r1, #9
bne reg2_error_loopf
vmov r0, r1, d5
cmp r0, #10
bne reg2_error_loopf
cmp r1, #11
bne reg2_error_loopf
vmov r0, r1, d6
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d7
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d8
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d9
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
vmov r0, r1, d10
cmp r0, #8
bne reg2_error_loopf
cmp r1, #9
bne reg2_error_loopf
vmov r0, r1, d11
cmp r0, #10
bne reg2_error_loopf
cmp r1, #11
bne reg2_error_loopf
vmov r0, r1, d12
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d13
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d14
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d15
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg2_loopf_pass
reg2_error_loopf
/* If this line is hit then a VFP register value was found to be
incorrect. */
b reg2_error_loopf
reg2_loopf_pass
cmp r0, #-1
bne reg2_error_loop
cmp r1, #1
bne reg2_error_loop
cmp r2, #2
bne reg2_error_loop
cmp r3, #3
bne reg2_error_loop
cmp r4, #4
bne reg2_error_loop
cmp r5, #5
bne reg2_error_loop
cmp r6, #6
bne reg2_error_loop
cmp r7, #7
bne reg2_error_loop
cmp r8, #8
bne reg2_error_loop
cmp r9, #9
bne reg2_error_loop
cmp r10, #10
bne reg2_error_loop
cmp r11, #11
bne reg2_error_loop
cmp r12, #12
bne reg2_error_loop
/* Increment the loop counter to indicate this test is still functioning
correctly. */
push { r0-r1 }
ldr r0, =ulRegTest2LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
/* Yield to increase test coverage. */
movs r0, #0x01
ldr r1, =0xe000ed04 /*NVIC_INT_CTRL */
lsl r0, r0, #28 /* Shift to PendSV bit */
str r0, [r1]
dsb
pop { r0-r1 }
/* Start again. */
b reg2_loop
reg2_error_loop
/* If this line is hit then there was an error in a core register value.
This loop ensures the loop counter variable stops incrementing. */
b reg2_error_loop
}
/*-----------------------------------------------------------*/

526
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Full_Demo/RegTest.s
Unescape Escape View File

@ -0,0 +1,526 @@
/*
FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#include <FreeRTOSConfig.h>
RSEG CODE:CODE(2)
thumb
EXTERN ulRegTest1LoopCounter
EXTERN ulRegTest2LoopCounter
PUBLIC vRegTest1Implementation
PUBLIC vRegTest2Implementation
PUBLIC vRegTestClearFlopRegistersToParameterValue
PUBLIC ulRegTestCheckFlopRegistersContainParameterValue
/*-----------------------------------------------------------*/
vRegTest1Implementation
/* Fill the core registers with known values. */
mov r0, #100
mov r1, #101
mov r2, #102
mov r3, #103
mov r4, #104
mov r5, #105
mov r6, #106
mov r7, #107
mov r8, #108
mov r9, #109
mov r10, #110
mov r11, #111
mov r12, #112
/* Fill the VFP registers with known values. */
vmov d0, r0, r1
vmov d1, r2, r3
vmov d2, r4, r5
vmov d3, r6, r7
vmov d4, r8, r9
vmov d5, r10, r11
vmov d6, r0, r1
vmov d7, r2, r3
vmov d8, r4, r5
vmov d9, r6, r7
vmov d10, r8, r9
vmov d11, r10, r11
vmov d12, r0, r1
vmov d13, r2, r3
vmov d14, r4, r5
vmov d15, r6, r7
reg1_loop:
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d1
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d2
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d3
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
vmov r0, r1, d4
cmp r0, #108
bne reg1_error_loopf
cmp r1, #109
bne reg1_error_loopf
vmov r0, r1, d5
cmp r0, #110
bne reg1_error_loopf
cmp r1, #111
bne reg1_error_loopf
vmov r0, r1, d6
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d7
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d8
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d9
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
vmov r0, r1, d10
cmp r0, #108
bne reg1_error_loopf
cmp r1, #109
bne reg1_error_loopf
vmov r0, r1, d11
cmp r0, #110
bne reg1_error_loopf
cmp r1, #111
bne reg1_error_loopf
vmov r0, r1, d12
cmp r0, #100
bne reg1_error_loopf
cmp r1, #101
bne reg1_error_loopf
vmov r0, r1, d13
cmp r0, #102
bne reg1_error_loopf
cmp r1, #103
bne reg1_error_loopf
vmov r0, r1, d14
cmp r0, #104
bne reg1_error_loopf
cmp r1, #105
bne reg1_error_loopf
vmov r0, r1, d15
cmp r0, #106
bne reg1_error_loopf
cmp r1, #107
bne reg1_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg1_loopf_pass
reg1_error_loopf
/* If this line is hit then a VFP register value was found to be
incorrect. */
b reg1_error_loopf
reg1_loopf_pass
cmp r0, #100
bne reg1_error_loop
cmp r1, #101
bne reg1_error_loop
cmp r2, #102
bne reg1_error_loop
cmp r3, #103
bne reg1_error_loop
cmp r4, #104
bne reg1_error_loop
cmp r5, #105
bne reg1_error_loop
cmp r6, #106
bne reg1_error_loop
cmp r7, #107
bne reg1_error_loop
cmp r8, #108
bne reg1_error_loop
cmp r9, #109
bne reg1_error_loop
cmp r10, #110
bne reg1_error_loop
cmp r11, #111
bne reg1_error_loop
cmp r12, #112
bne reg1_error_loop
/* Everything passed, increment the loop counter. */
push { r0-r1 }
ldr r0, =ulRegTest1LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
pop { r0-r1 }
/* Start again. */
b reg1_loop
reg1_error_loop:
/* If this line is hit then there was an error in a core register value.
The loop ensures the loop counter stops incrementing. */
b reg1_error_loop
/*-----------------------------------------------------------*/
vRegTest2Implementation
/* Set all the core registers to known values. */
mov r0, #-1
mov r1, #1
mov r2, #2
mov r3, #3
mov r4, #4
mov r5, #5
mov r6, #6
mov r7, #7
mov r8, #8
mov r9, #9
mov r10, #10
mov r11, #11
mov r12, #12
/* Set all the VFP to known values. */
vmov d0, r0, r1
vmov d1, r2, r3
vmov d2, r4, r5
vmov d3, r6, r7
vmov d4, r8, r9
vmov d5, r10, r11
vmov d6, r0, r1
vmov d7, r2, r3
vmov d8, r4, r5
vmov d9, r6, r7
vmov d10, r8, r9
vmov d11, r10, r11
vmov d12, r0, r1
vmov d13, r2, r3
vmov d14, r4, r5
vmov d15, r6, r7
reg2_loop:
/* Check all the VFP registers still contain the values set above.
First save registers that are clobbered by the test. */
push { r0-r1 }
vmov r0, r1, d0
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d1
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d2
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d3
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
vmov r0, r1, d4
cmp r0, #8
bne reg2_error_loopf
cmp r1, #9
bne reg2_error_loopf
vmov r0, r1, d5
cmp r0, #10
bne reg2_error_loopf
cmp r1, #11
bne reg2_error_loopf
vmov r0, r1, d6
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d7
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d8
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d9
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
vmov r0, r1, d10
cmp r0, #8
bne reg2_error_loopf
cmp r1, #9
bne reg2_error_loopf
vmov r0, r1, d11
cmp r0, #10
bne reg2_error_loopf
cmp r1, #11
bne reg2_error_loopf
vmov r0, r1, d12
cmp r0, #-1
bne reg2_error_loopf
cmp r1, #1
bne reg2_error_loopf
vmov r0, r1, d13
cmp r0, #2
bne reg2_error_loopf
cmp r1, #3
bne reg2_error_loopf
vmov r0, r1, d14
cmp r0, #4
bne reg2_error_loopf
cmp r1, #5
bne reg2_error_loopf
vmov r0, r1, d15
cmp r0, #6
bne reg2_error_loopf
cmp r1, #7
bne reg2_error_loopf
/* Restore the registers that were clobbered by the test. */
pop {r0-r1}
/* VFP register test passed. Jump to the core register test. */
b reg2_loopf_pass
reg2_error_loopf
/* If this line is hit then a VFP register value was found to be
incorrect. */
b reg2_error_loopf
reg2_loopf_pass
cmp r0, #-1
bne reg2_error_loop
cmp r1, #1
bne reg2_error_loop
cmp r2, #2
bne reg2_error_loop
cmp r3, #3
bne reg2_error_loop
cmp r4, #4
bne reg2_error_loop
cmp r5, #5
bne reg2_error_loop
cmp r6, #6
bne reg2_error_loop
cmp r7, #7
bne reg2_error_loop
cmp r8, #8
bne reg2_error_loop
cmp r9, #9
bne reg2_error_loop
cmp r10, #10
bne reg2_error_loop
cmp r11, #11
bne reg2_error_loop
cmp r12, #12
bne reg2_error_loop
/* Increment the loop counter to indicate this test is still functioning
correctly. */
push { r0-r1 }
ldr r0, =ulRegTest2LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
/* Yield to increase test coverage. */
movs r0, #0x01
ldr r1, =0xe000ed04 /*NVIC_INT_CTRL */
lsl r0, r0, #28 /* Shift to PendSV bit */
str r0, [r1]
dsb
pop { r0-r1 }
/* Start again. */
b reg2_loop
reg2_error_loop:
/* If this line is hit then there was an error in a core register value.
This loop ensures the loop counter variable stops incrementing. */
b reg2_error_loop
/*-----------------------------------------------------------*/
vRegTestClearFlopRegistersToParameterValue
/* Clobber the auto saved registers. */
vmov d0, r0, r0
vmov d1, r0, r0
vmov d2, r0, r0
vmov d3, r0, r0
vmov d4, r0, r0
vmov d5, r0, r0
vmov d6, r0, r0
vmov d7, r0, r0
bx lr
/*-----------------------------------------------------------*/
ulRegTestCheckFlopRegistersContainParameterValue
vmov r1, s0
cmp r0, r1
bne return_error
vmov r1, s1
cmp r0, r1
bne return_error
vmov r1, s2
cmp r0, r1
bne return_error
vmov r1, s3
cmp r0, r1
bne return_error
vmov r1, s4
cmp r0, r1
bne return_error
vmov r1, s5
cmp r0, r1
bne return_error
vmov r1, s6
cmp r0, r1
bne return_error
vmov r1, s7
cmp r0, r1
bne return_error
vmov r1, s8
cmp r0, r1
bne return_error
vmov r1, s9
cmp r0, r1
bne return_error
vmov r1, s10
cmp r0, r1
bne return_error
vmov r1, s11
cmp r0, r1
bne return_error
vmov r1, s12
cmp r0, r1
bne return_error
vmov r1, s13
cmp r0, r1
bne return_error
vmov r1, s14
cmp r0, r1
bne return_error
vmov r1, s15
cmp r0, r1
bne return_error
return_pass
mov r0, #1
bx lr
return_error
mov r0, #0
bx lr
END

432
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/Full_Demo/main_full.c
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/*
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
* NOTE 1: This project provides two demo applications. A simple blinky style
* project, and a more comprehensive test and demo application. The
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
* in main.c. This file implements the comprehensive test and demo version.
*
* NOTE 2: This file only contains the source code that is specific to the
* full demo. Generic functions, such FreeRTOS hook functions, and functions
* required to configure the hardware, are defined in main.c.
*
******************************************************************************
*
* main_full() creates all the demo application tasks and software timers, then
* starts the scheduler. The web documentation provides more details of the
* standard demo application tasks, which provide no particular functionality,
* but do provide a good example of how to use the FreeRTOS API.
*
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* "Reg test" tasks - These fill both the core and floating point registers with
* known values, then check that each register maintains its expected value for
* the lifetime of the task. Each task uses a different set of values. The reg
* test tasks execute with a very low priority, so get preempted very
* frequently. A register containing an unexpected value is indicative of an
* error in the context switching mechanism.
*
* "Check" task - The check task period is initially set to three seconds. The
* task checks that all the standard demo tasks, and the register check tasks,
* are not only still executing, but are executing without reporting any errors.
* If the check task discovers that a task has either stalled, or reported an
* error, then it changes its own execution period from the initial three
* seconds, to just 200ms. The check task also toggles an LED each time it is
* called. This provides a visual indication of the system status: If the LED
* toggles every three seconds, then no issues have been discovered. If the LED
* toggles every 200ms, then an issue has been discovered with at least one
* task.
*/
/* Standard includes. */
#include <stdio.h>
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "semphr.h"
/* Standard demo application includes. */
#include "flop.h"
#include "semtest.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "blocktim.h"
#include "countsem.h"
#include "GenQTest.h"
#include "recmutex.h"
#include "death.h"
#include "partest.h"
#include "comtest2.h"
#include "serial.h"
#include "TimerDemo.h"
#include "QueueOverwrite.h"
#include "IntQueue.h"
#include "EventGroupsDemo.h"
#include "IntSemTest.h"
#include "TaskNotify.h"
/* Priorities for the demo application tasks. */
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainCDC_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2UL )
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )
/* The initial priority used by the UART command console task. */
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
/* The LED used by the check timer. */
#define mainCHECK_LED ( 0 )
/* A block time of zero simply means "don't block". */
#define mainDONT_BLOCK ( 0UL )
/* The period after which the check timer will expire, in ms, provided no errors
have been reported by any of the standard demo tasks. ms are converted to the
equivalent in ticks using the portTICK_PERIOD_MS constant. */
#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )
/* The period at which the check timer will expire, in ms, if an error has been
reported in one of the standard demo tasks. ms are converted to the equivalent
in ticks using the portTICK_PERIOD_MS constant. */
#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )
/* Parameters that are passed into the register check tasks solely for the
purpose of ensuring parameters are passed into tasks correctly. */
#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )
#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )
/* The base period used by the timer test tasks. */
#define mainTIMER_TEST_PERIOD ( 50 )
/*-----------------------------------------------------------*/
/*
* Called by main() to run the full demo (as opposed to the blinky demo) when
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
*/
void main_full( void );
/*
* The check task, as described at the top of this file.
*/
static void prvCheckTask( void *pvParameters );
/*
* Register check tasks, and the tasks used to write over and check the contents
* of the FPU registers, as described at the top of this file. The nature of
* these files necessitates that they are written in an assembly file, but the
* entry points are kept in the C file for the convenience of checking the task
* parameter.
*/
static void prvRegTestTaskEntry1( void *pvParameters );
extern void vRegTest1Implementation( void );
static void prvRegTestTaskEntry2( void *pvParameters );
extern void vRegTest2Implementation( void );
/*-----------------------------------------------------------*/
/* The following two variables are used to communicate the status of the
register check tasks to the check task. If the variables keep incrementing,
then the register check tasks has not discovered any errors. If a variable
stops incrementing, then an error has been found. */
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
/*-----------------------------------------------------------*/
void main_full( void )
{
/* Start all the other standard demo/test tasks. They have not particular
functionality, but do demonstrate how to use the FreeRTOS API and test the
kernel port. */
vStartInterruptQueueTasks();
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vCreateBlockTimeTasks();
vStartCountingSemaphoreTasks();
vStartGenericQueueTasks( tskIDLE_PRIORITY );
vStartRecursiveMutexTasks();
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartMathTasks( mainFLOP_TASK_PRIORITY );
vStartTimerDemoTask( mainTIMER_TEST_PERIOD );
vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );
vStartEventGroupTasks();
vStartInterruptSemaphoreTasks();
vStartTaskNotifyTask();
/* Create the register check tasks, as described at the top of this file */
xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );
/* Create the task that performs the 'check' functionality, as described at
the top of this file. */
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* The set of tasks created by the following function call have to be
created last as they keep account of the number of tasks they expect to see
running. */
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
/* Start the scheduler. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was either insufficient FreeRTOS heap memory available for the idle
and/or timer tasks to be created, or vTaskStartScheduler() was called from
User mode. See the memory management section on the FreeRTOS web site for
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
mode from which main() is called is set in the C start up code and must be
a privileged mode (not user mode). */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void *pvParameters )
{
TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;
TickType_t xLastExecutionTime;
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
unsigned long ulErrorFound = pdFALSE;
/* Just to stop compiler warnings. */
( void ) pvParameters;
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
works correctly. */
xLastExecutionTime = xTaskGetTickCount();
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. The onboard LED is toggled on each iteration.
If an error is detected then the delay period is decreased from
mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the
effect of increasing the rate at which the onboard LED toggles, and in so
doing gives visual feedback of the system status. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none have detected an error. */
if( xAreIntQueueTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 0UL;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 1UL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 2UL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 3UL;
}
if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 4UL;
}
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 5UL;
}
if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 6UL;
}
if( xIsCreateTaskStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 7UL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 8UL;
}
if( xAreTimerDemoTasksStillRunning( ( TickType_t ) xDelayPeriod ) != pdPASS )
{
ulErrorFound = 1UL << 9UL;
}
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound = 1UL << 10UL;
}
if( xIsQueueOverwriteTaskStillRunning() != pdPASS )
{
ulErrorFound = 1UL << 11UL;
}
if( xAreEventGroupTasksStillRunning() != pdPASS )
{
ulErrorFound = 1UL << 12UL;
}
if( xAreInterruptSemaphoreTasksStillRunning() != pdPASS )
{
ulErrorFound = 1UL << 13UL;
}
if( xAreTaskNotificationTasksStillRunning() != pdPASS )
{
ulErrorFound = 1UL << 14UL;
}
/* Check that the register test 1 task is still running. */
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
{
ulErrorFound = 1UL << 15UL;
}
ulLastRegTest1Value = ulRegTest1LoopCounter;
/* Check that the register test 2 task is still running. */
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
{
ulErrorFound = 1UL << 16UL;
}
ulLastRegTest2Value = ulRegTest2LoopCounter;
/* Toggle the check LED to give an indication of the system status. If
the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then
everything is ok. A faster toggle indicates an error. */
LED_Toggle( mainCHECK_LED );
if( ulErrorFound != pdFALSE )
{
/* An error has been detected in one of the tasks - flash the LED
at a higher frequency to give visible feedback that something has
gone wrong (it might just be that the loop back connector required
by the comtest tasks has not been fitted). */
xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;
}
}
}
/*-----------------------------------------------------------*/
static void prvRegTestTaskEntry1( void *pvParameters )
{
/* Although the regtest task is written in assembler, its entry point is
written in C for convenience of checking the task parameter is being passed
in correctly. */
if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest1Implementation();
}
/* The following line will only execute if the task parameter is found to
be incorrect. The check timer will detect that the regtest loop counter is
not being incremented and flag an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/
static void prvRegTestTaskEntry2( void *pvParameters )
{
/* Although the regtest task is written in assembler, its entry point is
written in C for convenience of checking the task parameter is being passed
in correctly. */
if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )
{
/* Start the part of the test that is written in assembler. */
vRegTest2Implementation();
}
/* The following line will only execute if the task parameter is found to
be incorrect. The check timer will detect that the regtest loop counter is
not being incremented and flag an error. */
vTaskDelete( NULL );
}
/*-----------------------------------------------------------*/

34
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/JLinkSettings.ini
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[BREAKPOINTS]
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 1
Device="Unspecified"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF

14
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/RTE/RTE_Components.h
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/*
* Auto generated Run-Time-Environment Component Configuration File
* *** Do not modify ! ***
*
* Project: 'RTOSDemo'
* Target: 'SRAM'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
#endif /* RTE_COMPONENTS_H */

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/RTOSDemo.ewt
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<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>2</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>1</debug>
<settings>
<name>RuntimeChecking</name>
<archiveVersion>0</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>GenRtcDebugHeap</name>
<state>0</state>
</option>
<option>
<name>GenRtcEnableBoundsChecking</name>
<state>0</state>
</option>
<option>
<name>GenRtcCheckPtrsNonInstrMem</name>
<state>1</state>
</option>
<option>
<name>GenRtcTrackPointerBounds</name>
<state>1</state>
</option>
<option>
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<state>1</state>
</option>
<option>
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<state>0</state>
</option>
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<state>1000</state>
</option>
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<state>0</state>
</option>
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<name>GenRtcIncUnsigned</name>
<state>0</state>
</option>
<option>
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<state>0</state>
</option>
<option>
<name>GenRtcInclExplicit</name>
<state>0</state>
</option>
<option>
<name>GenRtcIntShiftOverflow</name>
<state>0</state>
</option>
<option>
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<state>0</state>
</option>
<option>
<name>GenRtcUnhandledCase</name>
<state>0</state>
</option>
<option>
<name>GenRtcDivByZero</name>
<state>0</state>
</option>
<option>
<name>GenRtcEnable</name>
<state>0</state>
</option>
<option>
<name>GenRtcCheckPtrsNonInstrFunc</name>
<state>1</state>
</option>
</data>
</settings>
</configuration>
<configuration>
<name>Release</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>0</debug>
<settings>
<name>RuntimeChecking</name>
<archiveVersion>0</archiveVersion>
<data>
<version>2</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>GenRtcDebugHeap</name>
<state>0</state>
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<state>0</state>
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<name>GenRtcCheckPtrsNonInstrMem</name>
<state>1</state>
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<state>1</state>
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<name>GenRtcCheckAccesses</name>
<state>1</state>
</option>
<option>
<name>GenRtcGenerateEntries</name>
<state>0</state>
</option>
<option>
<name>GenRtcNrTrackedPointers</name>
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<state>0</state>
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<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="3.40.0" condition="CMSIS Core">
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</Project>

698
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/board.h
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2014, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \page samv7_Xplained_ultra_board_desc SAMV7_Xplained_Ultra - Board Description
*
* \section Purpose
*
* This file is dedicated to describe the SAMV7_Xplained_Ultra board.
*
* \section Contents
*
* - For SAMV7_Xplained_Ultra information, see \subpage samv7_Xplained_ultra_board_info.
* - For operating frequency information, see \subpage samv7_Xplained_ultra_opfreq.
* - For using portable PIO definitions, see \subpage samv7_Xplained_ultra_piodef.
* - For on-board memories, see \subpage samv7_Xplained_ultra_mem.
* - Several USB definitions are included here, see \subpage samv7_Xplained_ultra_usb.
* - For External components, see \subpage samv7_Xplained_ultra_extcomp.
* - For Individual chip definition, see \subpage samv7_Xplained_ultra_chipdef.
*
* To get more software details and the full list of parameters related to the
* SAMV7_Xplained_Ultra board configuration, please have a look at the source file:
* \ref board.h\n
*
* \section Usage
*
* - The code for booting the board is provided by board_cstartup_xxx.c and
* board_lowlevel.c.
* - For using board PIOs, board characteristics (clock, etc.) and external
* components, see board.h.
* - For manipulating memories, see board_memories.h.
*
* This file can be used as a template and modified to fit a custom board, with
* specific PIOs usage or memory connections.
*/
/**
* \file board.h
*
* Definition of SAMV7_Xplained_Ultra characteristics, PIOs and
* external components interface.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "include/board_lowlevel.h"
#include "include/board_memories.h"
#include "include/omnivision.h"
#include "include/ov.h"
#include "include/led.h"
#include "include/gmii.h"
#include "include/gmacb_phy.h"
#include "include/dbg_console.h"
#include "include/bmp.h"
#include "include/hamming.h"
#include "include/lcdd.h"
#include "include/ili9488_reg.h"
#include "include/ili9488.h"
#include "include/frame_buffer.h"
#include "include/lcd_color.h"
#include "include/lcd_draw.h"
#include "include/lcd_font10x14.h"
#include "include/lcd_font.h"
#include "include/lcd_gimp_image.h"
#include "include/wav.h"
#include "include/wm8904.h"
#include "include/CS2100.h"
#include "include/s25fl1.h"
#include "include/omnivision.h"
#include "include/ovyuv.h"
//#include "include/s25fl1_qspi.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_board_info "SAMV7_Xplained_Ultra - Board informations"
* This page lists several definition related to the board description.
*
* \section Definitions
* - \ref BOARD_NAME
*/
/** Name of the board */
#define BOARD_NAME "SAMV7-EK"
#define NO_PUSHBUTTON
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_opfreq "SAMV7_Xplained_Ultra - Operating frequencies"
* This page lists several definition related to the board operating frequency
* (when using the initialization done by board_lowlevel.c).
*
* \section Definitions
* - \ref BOARD_MAINOSC
* - \ref BOARD_MCK
*/
/** Frequency of the board main oscillator */
#define BOARD_MAINOSC 12000000
/** Master clock frequency (when using board_lowlevel.c) */
#define BOARD_MCK 132000000
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_piodef "SAMV7_Xplained_Ultra - PIO definitions"
* This pages lists all the pio definitions contained in board.h. The constants
* are named using the following convention: PIN_* for a constant which defines
* a single Pin instance (but may include several PIOs sharing the same
* controller), and PINS_* for a list of Pin instances.
*
* UART
* - \ref PINS_UART
*
* EBI
* - \ref PIN_EBI_DATA_BUS
* - \ref PIN_EBI_NRD
* - \ref PIN_EBI_NWE
* - \ref PIN_EBI_NCS0
* - \ref PIN_EBI_PSRAM_ADDR_BUS
* - \ref PIN_EBI_PSRAM_NBS
* - \ref PIN_EBI_A1
* - \ref PIN_EBI_LCD_CS
* - \ref PIN_EBI_LCD_RS
*
* LEDs
* - \ref PIN_LED_0
* - \ref PIN_LED_1
* - \ref PIN_LED_2
* - \ref PIN_LED_3
* - \ref PINS_LEDS
*
* MCI
* - \ref PINS_MCI
*
* Push buttons
* - \ref PIN_PUSHBUTTON_0
* - \ref PIN_PUSHBUTTON_1
* - \ref PIN_PUSHBUTTON_2
* - \ref PIN_PUSHBUTTON_3
* - \ref PINS_PUSHBUTTONS
* - \ref PUSHBUTTON_BP0
* - \ref PUSHBUTTON_BP1
* - \ref PUSHBUTTON_BP2
* - \ref PUSHBUTTON_BP3
*
* PWMC
* - \ref PIN_PWMC_PWMH0
* - \ref PIN_PWMC_PWMH1
* - \ref PIN_PWM_LED0
* - \ref PIN_PWM_LED1
* - \ref CHANNEL_PWM_LED0
* - \ref CHANNEL_PWM_LED1
*
* SPI
* - \ref PIN_SPI_MISO
* - \ref PIN_SPI_MOSI
* - \ref PIN_SPI_SPCK
* - \ref PINS_SPI
* - \ref PIN_SPI_NPCS0_PA11
*
* PCK0
* - \ref PIN_PCK0
*
* PIO PARALLEL CAPTURE
* - \ref PIN_PIODCEN1
* - \ref PIN_PIODCEN2
*
* TWI
* - \ref TWI_V3XX
* - \ref PIN_TWI_TWD0
* - \ref PIN_TWI_TWCK0
* - \ref PINS_TWI0
*
* USART0
* - \ref PIN_USART0_RXD
* - \ref PIN_USART0_TXD
* - \ref PIN_USART0_CTS
* - \ref PIN_USART0_RTS
* - \ref PIN_USART0_SCK
*
* USB
* - \ref PIN_USB_VBUS
*
* NandFlash
* - \ref PIN_EBI_NANDOE
* - \ref PIN_EBI_NANDWE
* - \ref PIN_EBI_NANDCLE
* - \ref PIN_EBI_NANDALE
* - \ref PIN_EBI_NANDIO
* - \ref BOARD_NF_CE_PIN
* - \ref BOARD_NF_RB_PIN
* - \ref PINS_NANDFLASH
*/
/** SSC pin Transmitter Data (TD) */
#define PIN_SSC_TD {PIO_PD26B_TD, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SSC pin Transmitter Clock (TK) */
#define PIN_SSC_TK {PIO_PB1D_TK, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
/** SSC pin Transmitter FrameSync (TF) */
#define PIN_SSC_TF {PIO_PB0D_TF, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
/** SSC pin RD */
#define PIN_SSC_RD {PIO_PA10C_RD, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** SSC pin RK */
#define PIN_SSC_RK {PIO_PA22A_RK, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** SSC pin RF */
#define PIN_SSC_RF {PIO_PD24B_RF, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SSC pins definition for codec. */
#define PINS_SSC_CODEC {PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF, PIN_SSC_RD, PIN_SSC_RK, PIN_SSC_RF}
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
#define PINS_UART0 {PIO_PA9A_URXD0 | PIO_PA10A_UTXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** UART pins (UTXD4 and URXD4) definitions, PD19,18. */
#define PINS_UART4 {PIO_PD18C_URXD4 | PIO_PD19C_UTXD4, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
/** EBI Data Bus pins */
#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** EBI NRD pin */
#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** EBI NWE pin */
#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** EBI NCS0 pin */
#define PIN_EBI_NCS0 {1 << 14, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** EBI A1 pin */
#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/* LCD CS pin (NCS3) */
#define PIN_EBI_LCD_CS {1 << 18, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_PULLUP}
/* LCD RS pin (A1) */
#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define LED_YELLOW0 0
#define LED_YELLOW1 1
/** LED #0 pin definition (BLUE). */
#define PIN_LED_0 {PIO_PA23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
/** LED #0 pin definition (AMBER). */
#define PIN_LED_1 {PIO_PC9, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
/** List of all LEDs definitions. */
#define PINS_LEDS {PIN_LED_0, PIN_LED_1}
/** List of all SDRAM pin definitions. */
#define PIN_SDRAM_D0_7 {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_D8_13 {0x0000003F, PIOE, ID_PIOE, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_D14_15 {0x00018000, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_A0_9 {0x3FF00000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_SDA10 {0x00002000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
//#define PIN_SDRAM_A11 {0x80000000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_CAS {0x00020000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_RAS {0x00010000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDCKE {0x00004000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDCK {0x00800000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDSC {0x00008000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_NBS0 {0x00040000, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SDRAM_NBS1 {0x00008000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_SDWE {0x20000000, PIOD, ID_PIOD, PIO_PERIPH_C, PIO_DEFAULT}
#define PIN_SDRAM_BA0 {0x00100000, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
#define BOARD_SDRAM_PINS PIN_SDRAM_D0_7, PIN_SDRAM_D8_13 , PIN_SDRAM_D14_15,\
PIN_SDRAM_A0_9, PIN_SDRAM_SDA10, PIN_SDRAM_BA0, \
PIN_SDRAM_CAS, PIN_SDRAM_RAS, PIN_SDRAM_SDCKE,PIN_SDRAM_SDCK,\
PIN_SDRAM_SDSC,PIN_SDRAM_NBS0 ,PIN_SDRAM_NBS1,PIN_SDRAM_SDWE
/**
* Push button #0 definition.
* Attributes = pull-up + debounce + interrupt on rising edge.
*/
#define PIN_PUSHBUTTON_0 {PIO_PA19, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_FALL_EDGE}
/**
* Push button #1 definition.
* Attributes = pull-up + debounce + interrupt on rising edge.
*/
#define PIN_PUSHBUTTON_1 {PIO_PB12, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_FALL_EDGE}
/** List of all push button definitions. */
#define PINS_PUSHBUTTONS {PIN_PUSHBUTTON_0, PIN_PUSHBUTTON_1}
/** Push button #0 index. */
#define PUSHBUTTON_BP0 0
/** Push button #1 index. */
#define PUSHBUTTON_BP1 1
/** Push button #2 index. */
#define PUSHBUTTON_BP2 2
/** Push button #3 index. */
#define PUSHBUTTON_BP3 3
/** PWMC PWM0 pin definition: Output High. */
#define PIN_PWMC_PWMH0 {PIO_PD20A_PWMH0, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
/** PWMC PWM1 pin definition: Output High. */
#define PIN_PWMC_PWMH1 {PIO_PD21A_PWMH1, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
/** PWM pins definition for LED0 */
#define PIN_PWM_LED0 PIN_PWMC_PWMH0
/** PWM pins definition for LED1 */
#define PIN_PWM_LED1 PIN_PWMC_PWMH1
/** PWM channel for LED0 */
#define CHANNEL_PWM_LED0 0
/** PWM channel for LED1 */
#define CHANNEL_PWM_LED1 1
/** SPI MISO pin definition. */
#define PIN_SPI_MISO {PIO_PD20B_SPI0_MISO, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define PIN_SPI_MOSI {PIO_PD21B_SPI0_MOSI, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define PIN_SPI_SPCK {PIO_PD22B_SPI0_SPCK, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define PIN_SPI_NPCS0 {PIO_PB2D_SPI0_NPCS0, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
#define PIN_SPI_NPCS1 {PIO_PA31A_SPI0_NPCS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SPI_NPCS3 {PIO_PD27B_SPI0_NPCS3, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
/** PCK0 */
//#define PIN_PCK0 {PIO_PB12D_PCK0, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_DEFAULT}
#define PIN_PCK0 {PIO_PB13B_PCK0, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}
/** PCK1 */
#define PIN_PCK1 {PIO_PA17B_PCK1, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}
/** PCK2 */
#define PIN_PCK2 {PIO_PA18B_PCK2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
/** PIO PARALLEL CAPTURE */
/** Parallel Capture Mode Data Enable1 */
#define PIN_PIODCEN1 PIO_PA15
/** Parallel Capture Mode Data Enable2 */
#define PIN_PIODCEN2 PIO_PA16
/** TWI ver 3.xx */
#define TWI_V3XX
/** TWI0 data pin */
#define PIN_TWI_TWD0 {PIO_PA3A_TWD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI0 clock pin */
#define PIN_TWI_TWCK0 {PIO_PA4A_TWCK0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI0 pins */
#define PINS_TWI0 {PIN_TWI_TWD0, PIN_TWI_TWCK0}
/** TWI1 data pin */
#define PIN_TWI_TWD1 {PIO_PB4A_TWD1, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
/** TWI1 clock pin */
#define PIN_TWI_TWCK1 {PIO_PB5A_TWCK1, PIOB, ID_PIOB, PIO_PERIPH_A,PIO_DEFAULT}
/** TWI1 pins */
#define PINS_TWI1 {PIN_TWI_TWD1, PIN_TWI_TWCK1}
/** USART0 pin RX */
#define PIN_USART0_RXD {PIO_PB0C_RXD0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin TX */
#define PIN_USART0_TXD {PIO_PB1C_TXD0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin CTS */
#define PIN_USART0_CTS {PIO_PB2C_CTS0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin RTS */
#define PIN_USART0_RTS {PIO_PB3C_RTS0, PIOB, ID_PIOB, PIO_PERIPH_C, PIO_DEFAULT}
/** USART0 pin SCK */
#define PIN_USART0_SCK {PIO_PB13C_SCK0, PIOB, ID_PIOB, PIO_PERIPH_C,PIO_DEFAULT}
/** USART1 pin RX */
#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin TX */
#define PIN_USART1_TXD {1<<22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin CTS */
#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin RTS */
#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART1 pin ENABLE */
#define PIN_USART1_EN {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
/** USART1 pin SCK */
#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** USART2 pin RX */
#define PIN_USART2_RXD {PIO_PD15B_RXD2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin TX */
#define PIN_USART2_TXD {PIO_PD16B_TXD2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin CTS */
#define PIN_USART2_CTS {PIO_PD19B_CTS2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin RTS */
#define PIN_USART2_RTS {PIO_PD18B_RTS2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USART2 pin SCK */
#define PIN_USART2_SCK {PIO_PD17B_SCK2, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** USB VBus monitoring pin definition. */
#define PIN_USB_VBUS {PIO_PC16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/** NandFlash pins definition: OE. */
#define PIN_EBI_NANDOE {PIO_PC9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** NandFlash pins definition: WE. */
#define PIN_EBI_NANDWE {PIO_PC10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** NandFlash pins definition: CLE. */
#define PIN_EBI_NANDCLE {PIO_PC17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** NandFlash pins definition: ALE. */
#define PIN_EBI_NANDALE {PIO_PC16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** NandFlash pins definition: DATA. */
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/** Nandflash chip enable pin definition. */
#define BOARD_NF_CE_PIN {PIO_PC14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** Nandflash ready/busy pin definition. */
#define BOARD_NF_RB_PIN {0, 0, 0, 0, 0}
/** Nandflash controller peripheral pins definition. */
#define PINS_NANDFLASH {PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, \
PIN_EBI_NANDOE, PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE}
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_usb "SAMV7_Xplained_Ultra - GMAC"
*/
/** PHY address */
#define BOARD_GMAC_PHY_ADDR 1
/** PHY Component */
#define BOARD_GMAC_PHY_COMP_KSZ8061RNB 1
/** Board GMAC power control - ALWAYS ON */
#define BOARD_GMAC_POWER_ALWAYS_ON
/** Board GMAC work mode - RMII/MII ( 1 / 0 ) */
#define BOARD_GMAC_MODE_RMII 1
/** The PIN list of PIO for GMAC */
#define BOARD_GMAC_PINS { (PIO_PD0A_GTXCK | PIO_PD1A_GTXEN | PIO_PD2A_GTX0 | PIO_PD3A_GTX1 | PIO_PD4A_GRXDV | PIO_PD5A_GRX0 | PIO_PD6A_GRX1 | PIO_PD7A_GRXER | PIO_PD8A_GMDC | PIO_PD9A_GMDIO ), \
PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}, \
{PIO_PC30, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP},\
{PIO_PA29, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
/** The PIN list of PIO for GMAC */
#define BOARD_GMAC_RESET_PIN {PIO_PC10, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_PULLUP}
/** The runtime pin configure list for GMAC */
#define BOARD_GMAC_RUN_PINS BOARD_GMAC_PINS
#define PIN_ISI_D0 {PIO_PD22D_ISI_D0, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D1 {PIO_PD21D_ISI_D1, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D2 {PIO_PB3D_ISI_D2, PIOB, ID_PIOB, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D3 {PIO_PA9B_ISI_D3, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_PULLUP}
#define PIN_ISI_D4 {PIO_PA5B_ISI_D4, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_PULLUP}
#define PIN_ISI_D5 {PIO_PD11D_ISI_D5, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D6 {PIO_PD12D_ISI_D6, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D7 {PIO_PA27D_ISI_D7, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D8 {PIO_PD27D_ISI_D8, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define PIN_ISI_D9 {PIO_PD28D_ISI_D9, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_PULLUP}
#define BOARD_ISI_VSYNC {PIO_PD25D_ISI_VSYNC, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_HSYNC {PIO_PD24D_ISI_HSYNC, PIOD, ID_PIOD, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_PCK {PIO_PA24D_ISI_PCK, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_DEFAULT}
#define BOARD_ISI_PINS PIN_ISI_D0,PIN_ISI_D1,PIN_ISI_D2,PIN_ISI_D3,PIN_ISI_D4,\
PIN_ISI_D5,PIN_ISI_D6,PIN_ISI_D7,PIN_ISI_D8,PIN_ISI_D9,\
BOARD_ISI_VSYNC ,BOARD_ISI_HSYNC ,BOARD_ISI_PCK
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_usb "SAMV7_Xplained_Ultra - USB device"
*
* \section Definitions
* - \ref BOARD_USB_BMATTRIBUTES
* - \ref CHIP_USB_UDP
* - \ref CHIP_USB_PULLUP_INTERNAL
* - \ref CHIP_USB_NUMENDPOINTS
* - \ref CHIP_USB_ENDPOINTS_MAXPACKETSIZE
* - \ref CHIP_USB_ENDPOINTS_BANKS
*/
/**
* USB attributes configuration descriptor (bus or self powered,
* remote wakeup)
*/
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
/** Indicates chip has an UDP Full Speed. */
#define CHIP_USB_UDP
/** Indicates chip has an internal pull-up. */
#define CHIP_USB_PULLUP_INTERNAL
/** Number of USB endpoints */
#define CHIP_USB_NUMENDPOINTS 10
/** Endpoints max paxcket size */
#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) ((i == 0) ? 64 : 1024)
/** Endpoints Number of Bank */
#define CHIP_USB_ENDPOINTS_BANKS(i) \
((i == 0) ? 1 : \
((i == 1) ? 3 : \
((i == 2) ? 3 : 2)))
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_extcomp "SAMV7_Xplained_Ultra - External components"
* This page lists the definitions related to external on-board components
* located in the board.h file for the SAMV7_Xplained_Ultra.
*
* SD Card
* - \ref BOARD_SD_PINS
* - \ref BOARD_SD_PIN_CD
*
* LCD
* - \ref BOARD_LCD_ILI9325
* - \ref BOARD_LCD_PINS
* - \ref BOARD_BACKLIGHT_PIN
* - \ref BOARD_LCD_BASE
* - \ref BOARD_LCD_RS
* - \ref BOARD_LCD_WIDTH
* - \ref BOARD_LCD_HEIGHT
*
* TouchScreen
* - \ref BOARD_TSC_ADS7843
* - \ref PIN_TCS_IRQ
* - \ref PIN_TCS_BUSY
* - \ref BOARD_TSC_SPI_BASE
* - \ref BOARD_TSC_SPI_ID
* - \ref BOARD_TSC_SPI_PINS
* - \ref BOARD_TSC_NPCS
* - \ref BOARD_TSC_NPCS_PIN
*
* SmartCard
* - \ref SMARTCARD_CONNECT_PIN
* - \ref PIN_ISO7816_RSTMC
* - \ref PINS_ISO7816
*/
/** Indicates board has an ILI9325 external component to manage LCD. */
#define BOARD_LCD_ILI9488
/** SPI MISO pin definition. */
#define LCD_SPI_MISO {PIO_PD20B_SPI0_MISO, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define LCD_SPI_MOSI {PIO_PD21B_SPI0_MOSI, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define LCD_SPI_SPCK {PIO_PD22B_SPI0_SPCK, PIOD, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define LCD_SPI_NPCS {PIO_PD25B_SPI0_NPCS1, PIOD, ID_PIOD, PIO_PERIPH_B,PIO_DEFAULT}
/** LCD pins definition. */
#define BOARD_LCD_PINS {LCD_SPI_MISO, LCD_SPI_MOSI, LCD_SPI_SPCK, LCD_SPI_NPCS}
/** Backlight pin definition. */
#define BOARD_LCD_BACKLIGHT_PIN {PIO_PA0A_PWMC0_PWMH0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** PWMC PWM0 pin definition: Output Low. */
#define LCD_PIN_RESET {PIO_PD28, PIOD, ID_PIOD, PIO_OUTPUT_1, PIO_DEFAULT}
/** PWM channel for LED0 */
#define CHANNEL_PWM_LCD 0
/** Display width in pixels. */
#define BOARD_LCD_WIDTH 320
/** Display height in pixels. */
#define BOARD_LCD_HEIGHT 480
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_mem "SAMV7_Xplained_Ultra - Memories"
* This page lists definitions related to internal & external on-board memories.
*
* \section NandFlash
* - \ref BOARD_NF_COMMAND_ADDR
* - \ref BOARD_NF_ADDRESS_ADDR
* - \ref BOARD_NF_DATA_ADDR
*
* \section NorFlash
* - \ref BOARD_NORFLASH_ADDR
* - \ref BOARD_NORFLASH_DFT_BUS_SIZE
*/
/** Address for transferring command bytes to the nandflash. */
#define BOARD_NF_COMMAND_ADDR 0x60400000
/** Address for transferring address bytes to the nandflash. */
#define BOARD_NF_ADDRESS_ADDR 0x60200000
/** Address for transferring data bytes to the nandflash. */
#define BOARD_NF_DATA_ADDR 0x60000000
/** Address for transferring command bytes to the norflash. */
#define BOARD_NORFLASH_ADDR 0x60000000
/** Default NOR bus size after power up reset */
#define BOARD_NORFLASH_DFT_BUS_SIZE 8
/*----------------------------------------------------------------------------*/
/**
* \page samv7_Xplained_ultra_chipdef "SAMV7_Xplained_Ultra - Individual chip definition"
* This page lists the definitions related to different chip's definition
*
* \section USART
* - \ref BOARD_PIN_USART_RXD
* - \ref BOARD_PIN_USART_TXD
* - \ref BOARD_PIN_USART_CTS
* - \ref BOARD_PIN_USART_RTS
* - \ref BOARD_PIN_USART_EN
* - \ref BOARD_USART_BASE
* - \ref BOARD_ID_USART
*/
/** Rtc */
#define BOARD_RTC_ID ID_RTC
/** TWI ID for QTouch application to use */
#define BOARD_ID_TWI_AT42 ID_TWI0
/** TWI Base for QTouch application to use */
#define BOARD_BASE_TWI_AT42 TWI0
/** TWI pins for QTouch application to use */
#define BOARD_PINS_TWI_AT42 PINS_TWI0
/** USART RX pin for application */
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
/** USART TX pin for application */
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
/** USART CTS pin for application */
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
/** USART RTS pin for application */
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
/** USART ENABLE pin for application */
#define BOARD_PIN_USART_EN PIN_USART1_EN
/** USART Base for application */
#define BOARD_USART_BASE USART1
/** USART ID for application */
#define BOARD_ID_USART ID_USART1
/** MCI0 Card detect pin definition. (PE5) */
#define BOARD_MCI_PIN_CD {PIO_PD18, PIOD, ID_PIOD, PIO_INPUT, PIO_PULLUP}
/** MCI0 Clock . */
#define BOARD_MCI_PIN_CK {PIO_PA25D_MCCK, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_DEFAULT}
/** MCI0 Solt A IO pins definition. (PC4-PC13) */
#define BOARD_MCI_PINS_SLOTA {(PIO_PA30C_MCDA0 | PIO_PA31C_MCDA1 | PIO_PA26C_MCDA2 | PIO_PA27C_MCDA3 | PIO_PA28C_MCCDA),\
PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** MCI pins that shall be configured to access the SD card. */
#define BOARD_SD_PINS {BOARD_MCI_PINS_SLOTA, BOARD_MCI_PIN_CK}
/** MCI Card Detect pin. */
#define BOARD_SD_PIN_CD BOARD_MCI_PIN_CD
/** Total number of MCI interface */
#define BOARD_NUM_MCI 1
/** Total number of MCI interface */
#define BOARD_NUM_MCI 1
#define PINS_QSPI_IO { (PIO_PA11A_QCS | PIO_PA13A_QIO0 | PIO_PA12A_QIO1 | PIO_PA17A_QIO2 | PIO_PA14A_QSCK), \
PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_QSPI_IO3 { PIO_PD31A_QIO3, PIOD, ID_PIOD, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_QSPI {PINS_QSPI_IO, PINS_QSPI_IO3}
#endif /* #ifndef _BOARD_H_ */

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/include/CS2100.h
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation WM8904 driver.
*
*/
#ifndef CS2100_H
#define CS2100_H
#include "board.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define CS2100_SLAVE_ADDRESS 0x4E
/** ID and Rev register*/
#define CS2100_REG_ID 0x01
/** VMID control 0 register*/
#define CS2100_REG_CTRL 0x02
/** MIC Bias control 0 register*/
#define CS2100_REG_DEV_CFG1 0x03
/** Bias control 1 register*/
#define CS2100_REG_CFG 0x05
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_1 0x06
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_2 0x07
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_3 0x08
/** Power management control 0 register*/
#define CS2100_REG_32_BIT_RATIO_4 0x09
/** Power management control 2 register*/
#define CS2100_REG_FUNC_CFG1 0x16
/** Power management control 3 register*/
#define CS2100_REG_FUNC_CFG2 0x17
/** Power management control 3 register*/
#define CS2100_REG_FUNC_CFG3 0x1E
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint16_t CS2100_Read(Twid *pTwid, uint32_t device, uint32_t regAddr);
extern void CS2100_Write(Twid *pTwid, uint32_t device, uint32_t regAddr, uint16_t data);
extern uint8_t CS2100_Init(Twid *pTwid, uint32_t device, uint32_t PCK);
#endif // CS2100_H

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/include/at25_spi.h
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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for the AT25 SPI driver.
*
*/
#ifndef AT25_SPI_H
#define AT25_SPI_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <board.h>
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
#define AT25_Size(pAt25) ((pAt25)->pDesc->size)
#define AT25_PageSize(pAt25) ((pAt25)->pDesc->pageSize)
#define AT25_BlockSize(pAt25) ((pAt25)->pDesc->blockSize)
#define AT25_Name(pAt25) ((pAt25)->pDesc->name)
#define AT25_ManId(pAt25) (((pAt25)->pDesc->jedecId) & 0xFF)
#define AT25_PageNumber(pAt25) (AT25_Size(pAt25) / AT25_PageSize(pAt25))
#define AT25_BlockNumber(pAt25) (AT25_Size(pAt25) / AT25_BlockSize(pAt25))
#define AT25_PagePerBlock(pAt25) (AT25_BlockSize(pAt25) / AT25_PageSize(pAt25))
#define AT25_BlockEraseCmd(pAt25) ((pAt25)->pDesc->blockEraseCmd)
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/** Device is protected, operation cannot be carried out. */
#define AT25_ERROR_PROTECTED 1
/** Device is busy executing a command. */
#define AT25_ERROR_BUSY 2
/** There was a problem while trying to program page data. */
#define AT25_ERROR_PROGRAM 3
/** There was an SPI communication error. */
#define AT25_ERROR_SPI 4
/** Device ready/busy status bit. */
#define AT25_STATUS_RDYBSY (1 << 0)
/** Device is ready. */
#define AT25_STATUS_RDYBSY_READY (0 << 0)
/** Device is busy with internal operations. */
#define AT25_STATUS_RDYBSY_BUSY (1 << 0)
/** Write enable latch status bit. */
#define AT25_STATUS_WEL (1 << 1)
/** Device is not write enabled. */
#define AT25_STATUS_WEL_DISABLED (0 << 1)
/** Device is write enabled. */
#define AT25_STATUS_WEL_ENABLED (1 << 1)
/** Software protection status bitfield. */
#define AT25_STATUS_SWP (3 << 2)
/** All sectors are software protected. */
#define AT25_STATUS_SWP_PROTALL (3 << 2)
/** Some sectors are software protected. */
#define AT25_STATUS_SWP_PROTSOME (1 << 2)
/** No sector is software protected. */
#define AT25_STATUS_SWP_PROTNONE (0 << 2)
/** Write protect pin status bit. */
#define AT25_STATUS_WPP (1 << 4)
/** Write protect signal is not asserted. */
#define AT25_STATUS_WPP_NOTASSERTED (0 << 4)
/** Write protect signal is asserted. */
#define AT25_STATUS_WPP_ASSERTED (1 << 4)
/** Erase/program error bit. */
#define AT25_STATUS_EPE (1 << 5)
/** Erase or program operation was successful. */
#define AT25_STATUS_EPE_SUCCESS (0 << 5)
/** Erase or program error detected. */
#define AT25_STATUS_EPE_ERROR (1 << 5)
/** Sector protection registers locked bit. */
#define AT25_STATUS_SPRL (1 << 7)
/** Sector protection registers are unlocked. */
#define AT25_STATUS_SPRL_UNLOCKED (0 << 7)
/** Sector protection registers are locked. */
#define AT25_STATUS_SPRL_LOCKED (1 << 7)
/** Read array command code. */
#define AT25_READ_ARRAY 0x0B
/** Read array (low frequency) command code. */
#define AT25_READ_ARRAY_LF 0x03
/** Block erase command code (4K block). */
#define AT25_BLOCK_ERASE_4K 0x20
/** Block erase command code (32K block). */
#define AT25_BLOCK_ERASE_32K 0x52
/** Block erase command code (64K block). */
#define AT25_BLOCK_ERASE_64K 0xD8
/** Chip erase command code 1. */
#define AT25_CHIP_ERASE_1 0x60
/** Chip erase command code 2. */
#define AT25_CHIP_ERASE_2 0xC7
/** Byte/page program command code. */
#define AT25_BYTE_PAGE_PROGRAM 0x02
/** Sequential program mode command code 1. */
#define AT25_SEQUENTIAL_PROGRAM_1 0xAD
/** Sequential program mode command code 2. */
#define AT25_SEQUENTIAL_PROGRAM_2 0xAF
/** Write enable command code. */
#define AT25_WRITE_ENABLE 0x06
/** Write disable command code. */
#define AT25_WRITE_DISABLE 0x04
/** Protect sector command code. */
#define AT25_PROTECT_SECTOR 0x36
/** Unprotect sector command code. */
#define AT25_UNPROTECT_SECTOR 0x39
/** Read sector protection registers command code. */
#define AT25_READ_SECTOR_PROT 0x3C
/** Read status register command code. */
#define AT25_READ_STATUS 0x05
/** Write status register command code. */
#define AT25_WRITE_STATUS 0x01
/** Read manufacturer and device ID command code. */
#define AT25_READ_JEDEC_ID 0x9F
/** Deep power-down command code. */
#define AT25_DEEP_PDOWN 0xB9
/** Resume from deep power-down command code. */
#define AT25_RES_DEEP_PDOWN 0xAB
/** SPI Flash Manufacturer JEDEC ID */
#define ATMEL_SPI_FLASH 0x1F
#define ST_SPI_FLASH 0x20
#define WINBOND_SPI_FLASH 0xEF
#define MACRONIX_SPI_FLASH 0xC2
#define SST_SPI_FLASH 0xBF
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** Describes a serial firmware flash device parameters. */
typedef struct _At25Desc {
/** Device string name. */
const char *name;
/** JEDEC ID of device. */
unsigned int jedecId;
/** Size of device in bytes. */
unsigned int size;
/** Size of one page in bytes. */
unsigned int pageSize;
/** Block erase size in bytes. */
unsigned int blockSize;
/** Block erase command. */
unsigned int blockEraseCmd;
} At25Desc;
/**
* Serial flash driver structure. Holds the current state of the driver,
* including the current command and the descriptor for the underlying device.
*/
typedef struct _At25 {
/** Pointer to the underlying SPI driver. */
Spid *pSpid;
/** Current SPI command sent to the SPI driver. */
SpidCmd command;
/** Pointer to a descriptor for the serial firmware flash device. */
const At25Desc *pDesc;
/** Command buffer. */
unsigned int pCmdBuffer[2];
} At25;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void AT25_Configure(At25 *pAt25, Spid *pSpid, unsigned char cs);
extern unsigned char AT25_SendCommand(
At25 *pAt25,
unsigned char cmd,
unsigned char cmdSize,
unsigned char *pData,
unsigned int dataSize,
unsigned int address,
SpidCallback callback,
void *pArgument);
extern unsigned char AT25_IsBusy(At25 *pAt25);
extern const At25Desc * AT25_FindDevice(
At25 *pAt25,
unsigned int jedecId);
#endif /*#ifndef AT25_SPI_H */

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for the AT25 Serialflash driver.
*
*/
#ifndef AT25D_H
#define AT25D_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "at25_spi.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void AT25D_WaitReady(At25 *pAt25);
extern unsigned int AT25D_ReadJedecId(At25 *pAt25);
extern void AT25D_EnableWrite(At25 *pAt25);
extern void AT25D_DisableWrite(At25 *pAt25);
extern unsigned char AT25D_Unprotect(At25 *pAt25);
extern unsigned char AT25D_EraseChip(At25 *pAt25);
extern unsigned char AT25D_EraseBlock(At25 *pAt25, unsigned int address);
extern unsigned char AT25D_Erase64KBlock(At25 *pAt25, unsigned int address);
extern unsigned char AT25D_Write(
At25 *pAt25,
unsigned char *pData,
unsigned int size,
unsigned int address);
extern unsigned char AT25D_Read(
At25 *pAt25,
unsigned char *pData,
unsigned int size,
unsigned int address);
#endif // #ifndef AT25D_H

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
* \section Purpose
*
* Utility for BMP
*
*/
#ifndef BMP_H
#define BMP_H
/** BMP magic number ('BM'). */
#define BMP_TYPE 0x4D42
/** headerSize must be set to 40 */
#define BITMAPINFOHEADER 40
/*------------------------------------------------------------------------------
* Exported types
*------------------------------------------------------------------------------*/
#pragma pack( 1 )
/** BMP (Windows) Header Format */
typedef struct _BMPHeader
{
/* signature, must be 4D42 hex */
uint16_t type;
/* size of BMP file in bytes (unreliable) */
uint32_t fileSize;
/* reserved, must be zero */
uint16_t reserved1;
/* reserved, must be zero */
uint16_t reserved2;
/* offset to start of image data in bytes */
uint32_t offset;
/* size of BITMAPINFOHEADER structure, must be 40 */
uint32_t headerSize;
/* image width in pixels */
uint32_t width;
/* image height in pixels */
uint32_t height;
/* number of planes in the image, must be 1 */
uint16_t planes;
/* number of bits per pixel (1, 4, 8, 16, 24, 32) */
uint16_t bits;
/* compression type (0=none, 1=RLE-8, 2=RLE-4) */
uint32_t compression;
/* size of image data in bytes (including padding) */
uint32_t imageSize;
/* horizontal resolution in pixels per meter (unreliable) */
uint32_t xresolution;
/* vertical resolution in pixels per meter (unreliable) */
uint32_t yresolution;
/* number of colors in image, or zero */
uint32_t ncolours;
/* number of important colors, or zero */
uint32_t importantcolours;
} BMPHeader;
#pragma pack()
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern uint8_t BMP_IsValid(void *file);
extern uint32_t BMP_GetFileSize(void *file);
extern uint8_t BMP_Decode( void *file, uint8_t *buffer, uint32_t width, uint32_t height, uint8_t bpp );
extern void WriteBMPheader( uint32_t* pAddressHeader, uint32_t bmpHSize, uint32_t bmpVSize, uint8_t nbByte_Pixels );
extern void BMP_displayHeader(uint32_t* pAddressHeader);
extern void RGB565toBGR555( uint8_t *fileSource, uint8_t *fileDestination, uint32_t width, uint32_t height, uint8_t bpp );
#endif //#ifndef BMP_H

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for the low-level initialization function.
*
*/
#ifndef BOARD_LOWLEVEL_H
#define BOARD_LOWLEVEL_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LowLevelInit( void ) ;
extern void _SetupMemoryRegion( void );
#endif /* BOARD_LOWLEVEL_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for memories configuration on board.
*
*/
#ifndef BOARD_MEMORIES_H
#define BOARD_MEMORIES_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void BOARD_ConfigureNandFlash( Smc* pSmc ) ;
extern void BOARD_ConfigureNorFlash( Smc* pSmc ) ;
extern void BOARD_ConfigurePSRAM( Smc* pSmc ) ;
extern void BOARD_ConfigureSdram( void );
extern uint32_t ExtRAM_Validation(uint32_t baseAddr, uint32_t size);
#endif /* #ifndef BOARD_MEMORIES_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Include function prototype for the uart console.
*/
#ifndef _DBG_CONSOLE_
#define _DBG_CONSOLE_
#include <stdint.h>
extern void DBG_Configure( uint32_t dwBaudrate, uint32_t dwMasterClock ) ;
extern void DBG_PutChar( uint8_t uc ) ;
extern uint32_t DBG_GetChar( void ) ;
extern uint32_t DBG_IsRxReady( void ) ;
extern void DBG_DumpFrame( uint8_t* pucFrame, uint32_t dwSize ) ;
extern void DBG_DumpMemory( uint8_t* pucBuffer, uint32_t dwSize, uint32_t dwAddress ) ;
extern uint32_t DBG_GetInteger( int32_t* pdwValue ) ;
extern uint32_t DBG_GetIntegerMinMax( int32_t* pdwValue, int32_t dwMin, int32_t dwMax ) ;
extern uint32_t DBG_GetHexa32( uint32_t* pdwValue ) ;
#endif /* _DBG_CONSOLE_ */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface of frame buffer driver.
*
*/
#ifndef _FRAME_BUFFER_
#define _FRAME_BUFFER_
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void FB_SetFrameBuffer(LcdColor_t *pBuffer, uint8_t ucWidth, uint8_t ucHeight);
extern void FB_SetColor(uint32_t color);
extern uint32_t FB_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
extern uint32_t FB_DrawPixel( uint32_t x, uint32_t y );
extern uint32_t FB_DrawCircle( uint32_t x, uint32_t y, uint32_t r );
extern uint32_t FB_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius);
extern uint32_t FB_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
extern uint32_t FB_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 );
extern uint32_t FB_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const void *pBuffer );
#endif /* #ifndef _FRAME_BUFFER_ */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \file */
/** \addtogroup gmacb_module Ethernet GMACB Driver
*@{
* Implement GEMAC PHY driver, that initialize the PHY to prepare for
* ethernet transfer.
*
* \section Usage
* -# EMAC related pins and Driver should be initialized at first.
* -# Initialize GMACB Driver instance by invoking GMACB_Init().
* -# Initialize PHY connected via GMACB_InitPhy(), PHY address is
* automatically adjusted by attempt to read.
* -# Perform PHY auto negotiate through GMACB_AutoNegotiate(), so
* connection established.
*
*
* Related files:\n
* \ref gmacb.h\n
* \ref gmacb.c\n
* \ref gmii.h.\n
*
*/
/**@}*/
#ifndef _GMACB_PHY_H
#define _GMACB_PHY_H
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "board.h"
/*---------------------------------------------------------------------------
* Definitions
*---------------------------------------------------------------------------*/
/** The reset length setting for external reset configuration */
#define GMACB_RESET_LENGTH 0xD
/*---------------------------------------------------------------------------
* Types
*---------------------------------------------------------------------------*/
/** The DM9161 instance */
typedef struct _GMacb {
sGmacd *pGmacd; /**< Driver */
/** The retry & timeout settings */
uint32_t retryMax;
/** PHY address ( pre-defined by pins on reset ) */
uint8_t phyAddress;
} GMacb;
/*---------------------------------------------------------------------------
* Exported functions
*---------------------------------------------------------------------------*/
extern void GMACB_SetupTimeout(GMacb *pMacb, uint32_t toMax);
extern void GMACB_Init(GMacb *pMacb, sGmacd *pGmacd, uint8_t phyAddress);
extern uint8_t GMACB_InitPhy(GMacb *pMacb,
uint32_t mck,
const Pin *pResetPins,
uint32_t nbResetPins,
const Pin *pEmacPins,
uint32_t nbEmacPins);
extern uint8_t GMACB_AutoNegotiate(GMacb *pMacb);
extern uint8_t GMACB_GetLinkSpeed(GMacb *pMacb, uint8_t applySettings);
extern uint8_t GMACB_Send(GMacb *pMacb, void *pBuffer, uint32_t size);
extern uint32_t GMACB_Poll(GMacb *pMacb, uint8_t *pBuffer, uint32_t size);
extern void GMACB_DumpRegisters(GMacb *pMacb);
extern uint8_t GMACB_ResetPhy(GMacb *pMacb);
#endif // #ifndef _GMACB_H

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _GMII_DEFINE_H
#define _GMII_DEFINE_H
//-----------------------------------------------------------------------------
/// Definitions
//-----------------------------------------------------------------------------
//IEEE defined Registers
#define GMII_BMCR 0x0 // Basic Mode Control Register
#define GMII_BMSR 0x1 // Basic Mode Status Register
#define GMII_PHYID1R 0x2 // PHY Idendifier Register 1
#define GMII_PHYID2R 0x3 // PHY Idendifier Register 2
#define GMII_ANAR 0x4 // Auto_Negotiation Advertisement Register
#define GMII_ANLPAR 0x5 // Auto_negotiation Link Partner Ability Register
#define GMII_ANER 0x6 // Auto-negotiation Expansion Register
#define GMII_ANNPR 0x7 // Auto-negotiation Next Page Register
#define GMII_ANLPNPAR 0x8 // Auto_negotiation Link Partner Next Page Ability Register
#define GMII_AFEC0R 0x11 // AFE Control 0 Register
#define GMII_AFEC3R 0x14 // AFE Control 3 Register
#define GMII_RXERCR 0x15 // RXER Couter Register
#define GMII_OMSSR 0x17 // Operation Mode Strap Status Register
#define GMII_ECR 0x18 // Expanded Control Register
#define GMII_ICSR 0x1B // Interrupt Control/Status Register
#define GMII_FC 0x1C // Function Control
#define GMII_LCSR 0x1D // LinkMD® Control/Status Register
#define GMII_PC1R 0x1E // PHY Control 1 Register
#define GMII_PC2R 0x1F // PHY Control 2 Register
// PHY ID Identifier Register
#define GMII_LSB_MASK 0x0U
// definitions: MII_PHYID1
#define GMII_OUI_MSB 0x0022
// definitions: MII_PHYID2
#define GMII_OUI_LSB 0x1572 // KSZ8061 PHY Id2
// Basic Mode Control Register (BMCR)
// Bit definitions: MII_BMCR
#define GMII_RESET (1 << 15) // 1= Software Reset; 0=Normal Operation
#define GMII_LOOPBACK (1 << 14) // 1=loopback Enabled; 0=Normal Operation
#define GMII_SPEED_SELECT_LSB (1 << 13) // 1,0=1000Mbps 0,1=100Mbps; 0,0=10Mbps
#define GMII_AUTONEG (1 << 12) // Auto-negotiation Enable
#define GMII_POWER_DOWN (1 << 11) // 1=Power down 0=Normal operation
#define GMII_ISOLATE (1 << 10) // 1 = Isolates 0 = Normal operation
#define GMII_RESTART_AUTONEG (1 << 9) // 1 = Restart auto-negotiation 0 = Normal operation
#define GMII_DUPLEX_MODE (1 << 8) // 1 = Full duplex operation 0 = Normal operation
// Reserved 7 // Read as 0, ignore on write
#define GMII_SPEED_SELECT_MSB (1 << 6) //
// Reserved 5 to 0 // Read as 0, ignore on write
// Basic Mode Status Register (BMSR)
// Bit definitions: MII_BMSR
#define GMII_100BASE_T4 (1 << 15) // 100BASE-T4 Capable
#define GMII_100BASE_TX_FD (1 << 14) // 100BASE-TX Full Duplex Capable
#define GMII_100BASE_T4_HD (1 << 13) // 100BASE-TX Half Duplex Capable
#define GMII_10BASE_T_FD (1 << 12) // 10BASE-T Full Duplex Capable
#define GMII_10BASE_T_HD (1 << 11) // 10BASE-T Half Duplex Capable
// Reserved 10 to 9 // Read as 0, ignore on write
#define GMII_EXTEND_STATUS (1 << 8) // 1 = Extend Status Information In Reg 15
// Reserved 7
#define GMII_MF_PREAMB_SUPPR (1 << 6) // MII Frame Preamble Suppression
#define GMII_AUTONEG_COMP (1 << 5) // Auto-negotiation Complete
#define GMII_REMOTE_FAULT (1 << 4) // Remote Fault
#define GMII_AUTONEG_ABILITY (1 << 3) // Auto Configuration Ability
#define GMII_LINK_STATUS (1 << 2) // Link Status
#define GMII_JABBER_DETECT (1 << 1) // Jabber Detect
#define GMII_EXTEND_CAPAB (1 << 0) // Extended Capability
// Auto-negotiation Advertisement Register (ANAR)
// Auto-negotiation Link Partner Ability Register (ANLPAR)
// Bit definitions: MII_ANAR, MII_ANLPAR
#define GMII_NP (1 << 15) // Next page Indication
// Reserved 7
#define GMII_RF (1 << 13) // Remote Fault
// Reserved 12 // Write as 0, ignore on read
#define GMII_PAUSE_MASK (3 << 11) // 0,0 = No Pause 1,0 = Asymmetric Pause(link partner)
// 0,1 = Symmetric Pause 1,1 = Symmetric&Asymmetric Pause(local device)
#define GMII_T4 (1 << 9) // 100BASE-T4 Support
#define GMII_TX_FDX (1 << 8) // 100BASE-TX Full Duplex Support
#define GMII_TX_HDX (1 << 7) // 100BASE-TX Support
#define GMII_10_FDX (1 << 6) // 10BASE-T Full Duplex Support
#define GMII_10_HDX (1 << 5) // 10BASE-T Support
// Selector 4 to 0 // Protocol Selection Bits
#define GMII_AN_IEEE_802_3 0x00001
#endif // #ifndef _MII_DEFINE_H

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _HAMMING_
#define _HAMMING_
/*------------------------------------------------------------------------------
* Defines
*------------------------------------------------------------------------------*/
/**
* These are the possible errors when trying to verify a block of data encoded
* using a Hamming code:
*
* \section Errors
* - Hamming_ERROR_SINGLEBIT
* - Hamming_ERROR_ECC
* - Hamming_ERROR_MULTIPLEBITS
*/
/** A single bit was incorrect but has been recovered. */
#define Hamming_ERROR_SINGLEBIT 1
/** The original code has been corrupted. */
#define Hamming_ERROR_ECC 2
/** Multiple bits are incorrect in the data and they cannot be corrected. */
#define Hamming_ERROR_MULTIPLEBITS 3
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern void Hamming_Compute256x( const uint8_t* pucData, uint32_t dwSize, uint8_t* pucCode ) ;
extern uint8_t Hamming_Verify256x( uint8_t* pucData, uint32_t dwSize, const uint8_t* pucCode ) ;
#endif /* _HAMMING_ */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface of ILI9325 driver.
*
*/
#ifndef _ILI9488_H_
#define _ILI9488_H_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
typedef uint32_t LcdColor_t ;
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
//#define LCD_SPI_3
/* ILI9325 ID code */
#define ILI9488_DEVICE_CODE 0x9488
#define ILI9488_LCD_WIDTH 320
#define ILI9488_LCD_HEIGHT 480
#define ILI9488_SELF_TEST_OK 0xC0
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
typedef volatile uint8_t REG8;
/*----------------------------------------------------------------------------
* Marcos
*----------------------------------------------------------------------------*/
/** LCD index register address */
#define ILI9488_CMD(x) (uint16_t)(x & 0x00FF)
/** ILI9488 status register address */
#define ILI9488_PARAM(x) (uint16_t)(x | 0x100)
#define ILI9488_cs 1
/* Pixel cache used to speed up communication */
#define LCD_DATA_CACHE_SIZE BOARD_LCD_WIDTH
//extern LcdColor_t gLcdPixelCache[LCD_DATA_CACHE_SIZE];
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void ILI9488_WriteSingle( LcdColor_t data );
extern void ILI9488_WriteRAM_Prepare( void );
extern void ILI9488_WriteRAM( LcdColor_t dwColor );
extern void ILI9488_ReadRAM_Prepare( void );
extern void ILI9488_WriteRAMBuffer( const LcdColor_t *pBuf, uint32_t size);
extern void ILI9488_SetCursor(uint16_t x, uint16_t y);
extern uint32_t ILI9488_ReadRAM( void );
extern uint32_t ILI9488_Initialize( void );
extern void ILI9488_On( void );
extern void ILI9488_Off( void );
extern void ILI9488_PowerDown( void );
extern void ILI9488_SetWindow( uint16_t dwX, uint16_t dwY, uint16_t dwWidth, uint16_t dwHeight );
extern void ILI9488_SetDisplayLandscape( uint8_t dwRGB, uint8_t LandscaprMode );
extern void ILI9488_SetDisplayPortrait( uint8_t dwRGB );
extern void ILI9488_SetVerticalScrollWindow( uint16_t dwStartAdd, uint16_t dwHeight );
extern void ILI9488_VerticalScroll( uint16_t wY );
extern void ILI9488_SetPartialImage1( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd );
extern void ILI9488_SetPartialImage2( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd );
extern void ILI9488_TestPattern( void );
extern uint32_t ILI9488_SetColor( uint32_t dwRgb24Bits );
extern void ILI9488_ExitScrollMode(void );
extern void ILI9488_SetPartialWindow( uint16_t Start, uint16_t End);
#endif /* #ifndef ILI9488 */

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/**
* \file
*
* \brief IL9488 display controller register and bitfield definitions
*
* Copyright (c) 2014 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef ILI9488_REG_H_INCLUDED
#define ILI9488_REG_H_INCLUDED
/* Level 1 Commands (from the display Datasheet) */
#define ILI9488_CMD_NOP 0x00
#define ILI9488_CMD_SOFTWARE_RESET 0x01
#define ILI9488_CMD_READ_DISP_ID 0x04
#define ILI9488_CMD_READ_ERROR_DSI 0x05
#define ILI9488_CMD_READ_DISP_STATUS 0x09
#define ILI9488_CMD_READ_DISP_POWER_MODE 0x0A
#define ILI9488_CMD_READ_DISP_MADCTRL 0x0B
#define ILI9488_CMD_READ_DISP_PIXEL_FORMAT 0x0C
#define ILI9488_CMD_READ_DISP_IMAGE_MODE 0x0D
#define ILI9488_CMD_READ_DISP_SIGNAL_MODE 0x0E
#define ILI9488_CMD_READ_DISP_SELF_DIAGNOSTIC 0x0F
#define ILI9488_CMD_ENTER_SLEEP_MODE 0x10
#define ILI9488_CMD_SLEEP_OUT 0x11
#define ILI9488_CMD_PARTIAL_MODE_ON 0x12
#define ILI9488_CMD_NORMAL_DISP_MODE_ON 0x13
#define ILI9488_CMD_DISP_INVERSION_OFF 0x20
#define ILI9488_CMD_DISP_INVERSION_ON 0x21
#define ILI9488_CMD_PIXEL_OFF 0x22
#define ILI9488_CMD_PIXEL_ON 0x23
#define ILI9488_CMD_DISPLAY_OFF 0x28
#define ILI9488_CMD_DISPLAY_ON 0x29
#define ILI9488_CMD_COLUMN_ADDRESS_SET 0x2A
#define ILI9488_CMD_PAGE_ADDRESS_SET 0x2B
#define ILI9488_CMD_MEMORY_WRITE 0x2C
#define ILI9488_CMD_MEMORY_READ 0x2E
#define ILI9488_CMD_PARTIAL_AREA 0x30
#define ILI9488_CMD_VERT_SCROLL_DEFINITION 0x33
#define ILI9488_CMD_TEARING_EFFECT_LINE_OFF 0x34
#define ILI9488_CMD_TEARING_EFFECT_LINE_ON 0x35
#define ILI9488_CMD_MEMORY_ACCESS_CONTROL 0x36
#define ILI9488_CMD_VERT_SCROLL_START_ADDRESS 0x37
#define ILI9488_CMD_IDLE_MODE_OFF 0x38
#define ILI9488_CMD_IDLE_MODE_ON 0x39
#define ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET 0x3A
#define ILI9488_CMD_WRITE_MEMORY_CONTINUE 0x3C
#define ILI9488_CMD_READ_MEMORY_CONTINUE 0x3E
#define ILI9488_CMD_SET_TEAR_SCANLINE 0x44
#define ILI9488_CMD_GET_SCANLINE 0x45
#define ILI9488_CMD_WRITE_DISPLAY_BRIGHTNESS 0x51
#define ILI9488_CMD_READ_DISPLAY_BRIGHTNESS 0x52
#define ILI9488_CMD_WRITE_CTRL_DISPLAY 0x53
#define ILI9488_CMD_READ_CTRL_DISPLAY 0x54
#define ILI9488_CMD_WRITE_CONTENT_ADAPT_BRIGHTNESS 0x55
#define ILI9488_CMD_READ_CONTENT_ADAPT_BRIGHTNESS 0x56
#define ILI9488_CMD_WRITE_MIN_CAB_LEVEL 0x5E
#define ILI9488_CMD_READ_MIN_CAB_LEVEL 0x5F
#define ILI9488_CMD_READ_ABC_SELF_DIAG_RES 0x68
#define ILI9488_CMD_READ_ID1 0xDA
#define ILI9488_CMD_READ_ID2 0xDB
#define ILI9488_CMD_READ_ID3 0xDC
/* Level 2 Commands (from the display Datasheet) */
#define ILI9488_CMD_INTERFACE_MODE_CONTROL 0xB0
#define ILI9488_CMD_FRAME_RATE_CONTROL_NORMAL 0xB1
#define ILI9488_CMD_FRAME_RATE_CONTROL_IDLE_8COLOR 0xB2
#define ILI9488_CMD_FRAME_RATE_CONTROL_PARTIAL 0xB3
#define ILI9488_CMD_DISPLAY_INVERSION_CONTROL 0xB4
#define ILI9488_CMD_BLANKING_PORCH_CONTROL 0xB5
#define ILI9488_CMD_DISPLAY_FUNCTION_CONTROL 0xB6
#define ILI9488_CMD_ENTRY_MODE_SET 0xB7
#define ILI9488_CMD_BACKLIGHT_CONTROL_1 0xB9
#define ILI9488_CMD_BACKLIGHT_CONTROL_2 0xBA
#define ILI9488_CMD_HS_LANES_CONTROL 0xBE
#define ILI9488_CMD_POWER_CONTROL_1 0xC0
#define ILI9488_CMD_POWER_CONTROL_2 0xC1
#define ILI9488_CMD_POWER_CONTROL_NORMAL_3 0xC2
#define ILI9488_CMD_POWER_CONTROL_IDEL_4 0xC3
#define ILI9488_CMD_POWER_CONTROL_PARTIAL_5 0xC4
#define ILI9488_CMD_VCOM_CONTROL_1 0xC5
#define ILI9488_CMD_CABC_CONTROL_1 0xC6
#define ILI9488_CMD_CABC_CONTROL_2 0xC8
#define ILI9488_CMD_CABC_CONTROL_3 0xC9
#define ILI9488_CMD_CABC_CONTROL_4 0xCA
#define ILI9488_CMD_CABC_CONTROL_5 0xCB
#define ILI9488_CMD_CABC_CONTROL_6 0xCC
#define ILI9488_CMD_CABC_CONTROL_7 0xCD
#define ILI9488_CMD_CABC_CONTROL_8 0xCE
#define ILI9488_CMD_CABC_CONTROL_9 0xCF
#define ILI9488_CMD_NVMEM_WRITE 0xD0
#define ILI9488_CMD_NVMEM_PROTECTION_KEY 0xD1
#define ILI9488_CMD_NVMEM_STATUS_READ 0xD2
#define ILI9488_CMD_READ_ID4 0xD3
#define ILI9488_CMD_ADJUST_CONTROL_1 0xD7
#define ILI9488_CMD_READ_ID_VERSION 0xD8
#define ILI9488_CMD_POSITIVE_GAMMA_CORRECTION 0xE0
#define ILI9488_CMD_NEGATIVE_GAMMA_CORRECTION 0xE1
#define ILI9488_CMD_DIGITAL_GAMMA_CONTROL_1 0xE2
#define ILI9488_CMD_DIGITAL_GAMMA_CONTROL_2 0xE3
#define ILI9488_CMD_SET_IMAGE_FUNCTION 0xE9
#define ILI9488_CMD_ADJUST_CONTROL_2 0xF2
#define ILI9488_CMD_ADJUST_CONTROL_3 0xF7
#define ILI9488_CMD_ADJUST_CONTROL_4 0xF8
#define ILI9488_CMD_ADJUST_CONTROL_5 0xF9
#define ILI9488_CMD_SPI_READ_SETTINGS 0xFB
#define ILI9488_CMD_ADJUST_CONTROL_6 0xFC
#define ILI9488_CMD_ADJUST_CONTROL_7 0xFF
#endif /* ILI9488_REGS_H_INCLUDED */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef COLOR_H
#define COLOR_H
/**
* \file
*
* RGB 24-bits color table definition.
*
*/
/*
* RGB 24 Bpp
* RGB 888
* R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
*/
#define COLOR_BLACK 0x000000
#define COLOR_WHITE 0xFFFFFF
#define COLOR_BLUE 0x0000FF
#define COLOR_GREEN 0x00FF00
#define COLOR_RED 0xFF0000
#define COLOR_NAVY 0x000080
#define COLOR_DARKBLUE 0x00008B
#define COLOR_DARKGREEN 0x006400
#define COLOR_DARKCYAN 0x008B8B
#define COLOR_CYAN 0x00FFFF
#define COLOR_TURQUOISE 0x40E0D0
#define COLOR_INDIGO 0x4B0082
#define COLOR_DARKRED 0x800000
#define COLOR_OLIVE 0x808000
#define COLOR_GRAY 0x808080
#define COLOR_SKYBLUE 0x87CEEB
#define COLOR_BLUEVIOLET 0x8A2BE2
#define COLOR_LIGHTGREEN 0x90EE90
#define COLOR_DARKVIOLET 0x9400D3
#define COLOR_YELLOWGREEN 0x9ACD32
#define COLOR_BROWN 0xA52A2A
#define COLOR_DARKGRAY 0xA9A9A9
#define COLOR_SIENNA 0xA0522D
#define COLOR_LIGHTBLUE 0xADD8E6
#define COLOR_GREENYELLOW 0xADFF2F
#define COLOR_SILVER 0xC0C0C0
#define COLOR_LIGHTGREY 0xD3D3D3
#define COLOR_LIGHTCYAN 0xE0FFFF
#define COLOR_VIOLET 0xEE82EE
#define COLOR_AZUR 0xF0FFFF
#define COLOR_BEIGE 0xF5F5DC
#define COLOR_MAGENTA 0xFF00FF
#define COLOR_TOMATO 0xFF6347
#define COLOR_GOLD 0xFFD700
#define COLOR_ORANGE 0xFFA500
#define COLOR_SNOW 0xFFFAFA
#define COLOR_YELLOW 0xFFFF00
#define BLACK 0x0000
#define BLUE 0x001F
#define RED 0xF800
#define GREEN 0x07E0
#define WHITE 0xFFFF
#define BLUE_LEV( level) ( (level)&BLUE ) // level is in [0; 31]
#define GREEN_LEV(level) ( (((level)*2)<<5)&GREEN ) // level is in [0; 31]
#define RED_LEV( level) ( ((level)<<(5+6))&RED ) // level is in [0; 31]
#define GRAY_LEV( level) ( BLUE_LEV(level) | GREEN_LEV(level) | RED_LEV(level) ) // level is in [0; 31]
#define RGB_24_TO_18BIT(RGB) (((RGB >>18) << 18) | (((RGB & 0x00FF00) >>10) << 10) | (RGB & 0x0000FC))
#define RGB_16_TO_18BIT(RGB) (((((RGB >>11)*63)/31) << 18) | (RGB & 0x00FC00) | (((RGB & 0x00001F)*63)/31) )
#define BGR_TO_RGB_18BIT(RGB) ((RGB & 0xFF0000) | ((RGB & 0x00FF00) >> 8 ) | ( (RGB & 0x0000FC) >> 16 ))
#define BGR_16_TO_18BITRGB(RGB) BGR_TO_RGB_18BIT(RGB_16_TO_18BIT(RGB))
#endif /* #define COLOR_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for draw function on LCD.
*
*/
#ifndef DRAW_H
#define DRAW_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
#include "lcd_gimp_image.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** Horizontal direction line definition */
#define DIRECTION_HLINE 0
/** Vertical direction line definition */
#define DIRECTION_VLINE 1
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_Fill( uint32_t color ) ;
extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t c ) ;
extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y ) ;
extern void LCDD_DrawLine( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 , uint32_t color ) ;
extern uint32_t LCDD_DrawLineBresenham( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 , uint32_t color);
extern void LCDD_DrawRectangle( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
extern uint32_t LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color ) ;
extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius, uint32_t color);
extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color ) ;
extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor ) ;
extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight ) ;
extern void LCDD_DrawImage( uint32_t x, uint32_t y, const LcdColor_t *pImage, uint32_t width, uint32_t height ) ;
extern void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage );
extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ;
#endif /* #ifndef DRAW_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for draw font on LCD.
*
*/
/**
*
* \section Purpose
*
* The font.h files declares a font structure and a LCDD_DrawChar function
* that must be implemented by a font definition file to be used with the
* LCDD_DrawString method of draw.h.
*
* The font10x14.c implements the necessary variable and function for a 10x14
* font.
*
* \section Usage
*
* -# Declare a gFont global variable with the necessary Font information.
* -# Implement an LCDD_DrawChar function which displays the specified
* character on the LCD.
* -# Use the LCDD_DrawString method defined in draw.h to display a complete
* string.
*/
#ifndef _LCD_FONT_
#define _LCD_FONT_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** \brief Describes the font (width, height, supported characters, etc.) used by
* the LCD driver draw API.
*/
typedef struct _Font {
/* Font width in pixels. */
uint8_t width;
/* Font height in pixels. */
uint8_t height;
} Font;
/*----------------------------------------------------------------------------
* Variables
*----------------------------------------------------------------------------*/
/** Global variable describing the font being instancied. */
extern const Font gFont;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color ) ;
extern void LCD_DrawString( uint32_t dwX, uint32_t dwY, const uint8_t *pString, uint32_t color );
extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor ) ;
#endif /* #ifndef LCD_FONT_ */

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/include/lcd_font10x14.h
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Font 10x14 table definition.
*
*/
#ifndef _LCD_FONT_10x14_
#define _LCD_FONT_10x14_
#include <stdint.h>
/** Char set of font 10x14 */
extern const uint8_t pCharset10x14[] ;
#endif /* #ifdef _LCD_FONT_10x14_ */

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#ifndef _GIMP_IMAGE_
#define _GIMP_IMAGE_
#include <stdint.h>
typedef struct _SGIMPImage
{
uint32_t dwWidth;
uint32_t dwHeight;
uint32_t dwBytes_per_pixel; /* 3:RGB, 4:RGBA */
uint8_t* pucPixel_data ;
} SGIMPImage ;
#endif // _GIMP_IMAGE_

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for LCD driver.
*
*/
#ifndef LCDD_H
#define LCDD_H
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void LCDD_Initialize(void);
extern void LCDD_On(void);
extern void LCDD_Off(void);
extern void LCDD_SetBacklight (uint32_t step);
#endif /* #ifndef LCDD_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Small set of functions for simple and portable LED usage.
*
* \section Usage
*
* -# Configure one or more LEDs using LED_Configure and
* LED_ConfigureAll.
* -# Set, clear and toggle LEDs using LED_Set, LED_Clear and
* LED_Toggle.
*
* LEDs are numbered starting from 0; the number of LEDs depend on the
* board being used. All the functions defined here will compile properly
* regardless of whether the LED is defined or not; they will simply
* return 0 when a LED which does not exist is given as an argument.
* Also, these functions take into account how each LED is connected on to
* board; thus, \ref LED_Set might change the level on the corresponding pin
* to 0 or 1, but it will always light the LED on; same thing for the other
* methods.
*/
#ifndef _LED_
#define _LED_
#include <stdint.h>
//------------------------------------------------------------------------------
// Global Functions
//------------------------------------------------------------------------------
extern uint32_t LED_Configure( uint32_t dwLed ) ;
extern uint32_t LED_Set( uint32_t dwLed ) ;
extern uint32_t LED_Clear( uint32_t dwLed ) ;
extern uint32_t LED_Toggle( uint32_t dwLed ) ;
#endif /* #ifndef LED_H */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _MATH_
#define _MATH_
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern uint32_t min( uint32_t dwA, uint32_t dwB ) ;
extern uint32_t absv( int32_t lValue ) ;
extern uint32_t power( uint32_t dwX, uint32_t dwY ) ;
#endif /* #ifndef _MATH_ */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2013, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef OMNIVISION_H
#define OMNIVISION_H
/*---------------------------------------------------------------------------
* TYPE
*---------------------------------------------------------------------------*/
/** define a structure for ovxxxx register initialization values */
struct ov_reg
{
/* Register to be written */
uint16_t reg;
/* Value to be written in the register */
uint8_t val;
};
/*---------------------------------------------------------------------------
* DEFINITAION
*---------------------------------------------------------------------------*/
#define OV_2640 0x00
#define OV_2643 0x01
#define OV_5640 0x02
#define OV_7740 0x03
#define OV_9740 0x04
#define OV_UNKNOWN 0xFF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint8_t ov_init(Twid *pTwid);
extern void ov_DumpRegisters8(Twid *pTwid);
extern void ov_DumpRegisters16(Twid *pTwid);
extern uint32_t ov_write_regs8(Twid *pTwid, const struct ov_reg* pReglist);
extern uint32_t ov_write_regs16(Twid *pTwid, const struct ov_reg* pReglist);
extern uint8_t ov_read_reg8(Twid *pTwid, uint8_t reg, uint8_t *pData);
extern uint8_t ov_read_reg16(Twid *pTwid, uint16_t reg, uint8_t *pData);
extern uint8_t ov_write_reg8(Twid *pTwid, uint8_t reg, uint8_t val);
extern uint8_t ov_write_reg16(Twid *pTwid, uint16_t reg, uint8_t val);
extern void isOV5640_AF_InitDone(Twid *pTwid);
extern uint32_t ov_5640_AF_single(Twid *pTwid);
extern uint32_t ov_5640_AF_continue(Twid *pTwid);
extern uint32_t ov_5640_AFPause(Twid *pTwid);
extern uint32_t ov_5640_AFrelease(Twid *pTwid);
#endif

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2013, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef OV_H
#define OV_H
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** Captor capture size */
struct capture_size {
uint32_t width;
uint32_t height;
};
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void ov_configure(Twid *pTwid, uint8_t type, uint32_t width, uint32_t heigth);
extern void ov_5640Afc_Firmware(Twid *pTwid);
#endif

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2013, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _YUV_H_
#define _YUV_H_
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include <board.h>
/*---------------------------------------------------------------------------
* Exported variable
*---------------------------------------------------------------------------*/
extern const struct ov_reg ov2640_yuv_vga[];
extern const struct ov_reg ov2640_yuv_qvga[];
extern const struct ov_reg ov2643_yuv_vga[];
extern const struct ov_reg ov2643_yuv_swvga[];
extern const struct ov_reg ov2643_yuv_uxga[];
extern const struct ov_reg ov5640_yuv_vga[];
extern const struct ov_reg ov5640_yuv_sxga[];
extern const struct ov_reg ov5640_afc[];
extern const struct ov_reg ov7740_yuv_vga[];
extern const struct ov_reg ov9740_yuv_sxga[];
extern const struct ov_reg ov9740_yuv_vga[];
#endif // #ifndef _YUV_H_

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2013, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for the S25fl1 Serialflash driver.
*
*/
#ifndef S25FL1_H
#define S25FL1_H
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
#define Size(pAt25) ((pAt25)->pDesc->size)
#define PageSize(pAt25) ((pAt25)->pDesc->pageSize)
#define BlockSize(pAt25) ((pAt25)->pDesc->blockSize)
#define Name(pAt25) ((pAt25)->pDesc->name)
#define ManId(pAt25) (((pAt25)->pDesc->jedecId) & 0xFF)
#define PageNumber(pAt25) (Size(pAt25) / PageSize(pAt25))
#define BlockNumber(pAt25) (Size(pAt25) / BlockSize(pAt25))
#define PagePerBlock(pAt25) (BlockSize(pAt25) / PageSize(pAt25))
#define BlockEraseCmd(pAt25) ((pAt25)->pDesc->blockEraseCmd)
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/** Device is protected, operation cannot be carried out. */
#define ERROR_PROTECTED 1
/** Device is busy executing a command. */
#define ERROR_BUSY 2
/** There was a problem while trying to program page data. */
#define ERROR_PROGRAM 3
/** There was an SPI communication error. */
#define ERROR_SPI 4
/** Device ready/busy status bit. */
#define STATUS_RDYBSY (1 << 0)
/** Device is ready. */
#define STATUS_RDYBSY_READY (0 << 0)
/** Device is busy with internal operations. */
#define STATUS_RDYBSY_BUSY (1 << 0)
/** Write enable latch status bit. */
#define STATUS_WEL (1 << 1)
/** Device is not write enabled. */
#define STATUS_WEL_DISABLED (0 << 1)
/** Device is write enabled. */
#define STATUS_WEL_ENABLED (1 << 1)
/** Software protection status bitfield. */
#define STATUS_SWP (3 << 2)
/** All sectors are software protected. */
#define STATUS_SWP_PROTALL (3 << 2)
/** Some sectors are software protected. */
#define STATUS_SWP_PROTSOME (1 << 2)
/** No sector is software protected. */
#define STATUS_SWP_PROTNONE (0 << 2)
/** Write protect pin status bit. */
#define STATUS_WPP (1 << 4)
/** Write protect signal is not asserted. */
#define STATUS_WPP_NOTASSERTED (0 << 4)
/** Write protect signal is asserted. */
#define STATUS_WPP_ASSERTED (1 << 4)
/** Erase/program error bit. */
#define STATUS_EPE (1 << 5)
/** Erase or program operation was successful. */
#define STATUS_EPE_SUCCESS (0 << 5)
/** Erase or program error detected. */
#define STATUS_EPE_ERROR (1 << 5)
/** Sector protection registers locked bit. */
#define STATUS_SPRL (1 << 7)
/** Sector protection registers are unlocked. */
#define STATUS_SPRL_UNLOCKED (0 << 7)
/** Sector protection registers are locked. */
#define STATUS_SPRL_LOCKED (1 << 7)
/** Quad enable bit */
#define STATUS_QUAD_ENABLE (1 << 1)
/** Quad enable bit */
#define STATUS_WRAP_ENABLE (0 << 4)
#define STATUS_WRAP_BYTE (1 << 5)
/** Read array command code. */
#define READ_ARRAY 0x0B
/** Read array (low frequency) command code. */
#define READ_ARRAY_LF 0x03
/** Fast Read array command code. */
#define READ_ARRAY_DUAL 0x3B
/** Fast Read array command code. */
#define READ_ARRAY_QUAD 0x6B
/** Fast Read array command code. */
#define READ_ARRAY_DUAL_IO 0xBB
/** Fast Read array command code. */
#define READ_ARRAY_QUAD_IO 0xEB
/** Block erase command code (4K block). */
#define BLOCK_ERASE_4K 0x20
/** Block erase command code (32K block). */
#define BLOCK_ERASE_32K 0x52
/** Block erase command code (64K block). */
#define BLOCK_ERASE_64K 0xD8
/** Chip erase command code 1. */
#define CHIP_ERASE_1 0x60
/** Chip erase command code 2. */
#define CHIP_ERASE_2 0xC7
/** Byte/page program command code. */
#define BYTE_PAGE_PROGRAM 0x02
/** Sequential program mode command code 1. */
#define SEQUENTIAL_PROGRAM_1 0xAD
/** Sequential program mode command code 2. */
#define SEQUENTIAL_PROGRAM_2 0xAF
/** Write enable command code. */
#define WRITE_ENABLE 0x06
/** Write disable command code. */
#define WRITE_DISABLE 0x04
/** Protect sector command code. */
#define PROTECT_SECTOR 0x36
/** Unprotect sector command code. */
#define UNPROTECT_SECTOR 0x39
/** Read sector protection registers command code. */
#define READ_SECTOR_PROT 0x3C
/** Read status register command code. */
#define READ_STATUS 0x05
/** Write status register command code. */
#define WRITE_STATUS 0x01
/** Read manufacturer and device ID command code. */
#define READ_JEDEC_ID 0x9F
/** Deep power-down command code. */
#define DEEP_PDOWN 0xB9
/** Resume from deep power-down command code. */
#define RES_DEEP_PDOWN 0xAB
/** Resume from deep power-down command code. */
#define SOFT_RESET_ENABLE 0x66
/** Resume from deep power-down command code. */
#define SOFT_RESET 0x99
/** Resume from deep power-down command code. */
#define WRAP_ENABLE 0x77
/** SPI Flash Manufacturer JEDEC ID */
#define ATMEL_SPI_FLASH 0x1F
#define ST_SPI_FLASH 0x20
#define WINBOND_SPI_FLASH 0xEF
#define MACRONIX_SPI_FLASH 0xC2
#define SST_SPI_FLASH 0xBF
/**
*/
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern unsigned int S25FL1D_ReadJedecId(void);
extern void S25FL1D_InitFlashInterface(void);
extern void S25FL1D_SoftReset(void);
extern unsigned char S25FL1D_Unprotect(void);
extern unsigned char S25FL1D_Protect(uint32_t StartAddr, uint32_t Size);
extern void S25FL1D_EnableQuadMode(void);
extern void S25FL1D_EnableWrap(uint8_t ByetAlign);
extern unsigned char S25FL1D_EraseChip(void);
extern unsigned char S25FL1D_EraseSector( unsigned int address);
extern unsigned char S25FL1D_Erase64KBlock( unsigned int address);
extern unsigned char S25FL1D_Write(
uint8_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_Read(
uint8_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadDual(
uint8_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadQuad(
uint8_t *pData,
uint32_t size,
uint32_t address);
extern unsigned char S25FL1D_ReadQuadIO(
uint8_t *pData,
uint32_t size,
uint32_t address,
uint8_t ContMode);
#endif // #ifndef S25FL1_H

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for the S25fl1 SPI driver.
*
*/
#ifndef S25FL1_SPI_H
#define S25FL1_SPI_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <board.h>
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
#define S25FL1_Size(pS25fl1) ((pS25fl1)->pDesc->size)
#define S25FL1_PageSize(pS25fl1) ((pS25fl1)->pDesc->pageSize)
#define S25FL1_BlockSize(pS25fl1) ((pS25fl1)->pDesc->blockSize)
#define S25FL1_Name(pS25fl1) ((pS25fl1)->pDesc->name)
#define S25FL1_ManId(pS25fl1) (((pS25fl1)->pDesc->jedecId) & 0xFF)
#define S25FL1_PageNumber(pS25fl1) (S25FL1_Size(pS25FL1) / S25FL1_PageSize(pS25fl1))
#define S25FL1_BlockNumber(pS25fl1) (S25FL1_Size(pS25fl1) / S25FL1_BlockSize(pS25fl1))
#define S25FL1_PagePerBlock(pS25fl1) (S25FL1_BlockSize(pS25fl1) / S25FL1_PageSize(pS25fl1))
#define S25FL1_BlockEraseCmd(pS25fl1) ((pS25fl1)->pDesc->blockEraseCmd)
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/** Device is protected, operation cannot be carried out. */
#define S25FL1_ERROR_PROTECTED 1
/** Device is busy executing a command. */
#define S25FL1_ERROR_BUSY 2
/** There was a problem while trying to program page data. */
#define S25FL1_ERROR_PROGRAM 3
/** There was an SPI communication error. */
#define S25FL1_ERROR_SPI 4
/** Device ready/busy status bit. */
#define S25FL1_STATUS_RDYBSY (1 << 0)
/** Device is ready. */
#define S25FL1_STATUS_RDYBSY_READY (0 << 0)
/** Device is busy with internal operations. */
#define S25FL1_STATUS_RDYBSY_BUSY (1 << 0)
/** Write enable latch status bit. */
#define S25FL1_STATUS_WEL (1 << 1)
/** Device is not write enabled. */
#define S25FL1_STATUS_WEL_DISABLED (0 << 1)
/** Device is write enabled. */
#define S25FL1_STATUS_WEL_ENABLED (1 << 1)
/** Software protection status bitfield. */
#define S25FL1_STATUS_SWP (3 << 2)
/** All sectors are software protected. */
#define S25FL1_STATUS_SWP_PROTALL (3 << 2)
/** Some sectors are software protected. */
#define S25FL1_STATUS_SWP_PROTSOME (1 << 2)
/** No sector is software protected. */
#define S25FL1_STATUS_SWP_PROTNONE (0 << 2)
/** Write protect pin status bit. */
#define S25FL1_STATUS_WPP (1 << 4)
/** Write protect signal is not asserted. */
#define S25FL1_STATUS_WPP_NOTASSERTED (0 << 4)
/** Write protect signal is asserted. */
#define S25FL1_STATUS_WPP_ASSERTED (1 << 4)
/** Erase/program error bit. */
#define S25FL1_STATUS_EPE (1 << 5)
/** Erase or program operation was successful. */
#define S25FL1_STATUS_EPE_SUCCESS (0 << 5)
/** Erase or program error detected. */
#define S25FL1_STATUS_EPE_ERROR (1 << 5)
/** Sector protection registers locked bit. */
#define S25FL1_STATUS_SPRL (1 << 7)
/** Sector protection registers are unlocked. */
#define S25FL1_STATUS_SPRL_UNLOCKED (0 << 7)
/** Sector protection registers are locked. */
#define S25FL1_STATUS_SPRL_LOCKED (1 << 7)
/** Read array command code. */
#define S25FL1_READ_ARRAY 0x0B
/** Read array (low frequency) command code. */
#define S25FL1_READ_ARRAY_LF 0x03
/** Block erase command code (4K block). */
#define S25FL1_BLOCK_ERASE_4K 0x20
/** Block erase command code (32K block). */
#define S25FL1_BLOCK_ERASE_32K 0x52
/** Block erase command code (64K block). */
#define S25FL1_BLOCK_ERASE_64K 0xD8
/** Chip erase command code 1. */
#define S25FL1_CHIP_ERASE_1 0x60
/** Chip erase command code 2. */
#define S25FL1_CHIP_ERASE_2 0xC7
/** Byte/page program command code. */
#define S25FL1_BYTE_PAGE_PROGRAM 0x02
/** Sequential program mode command code 1. */
#define S25FL1_SEQUENTIAL_PROGRAM_1 0xAD
/** Sequential program mode command code 2. */
#define S25FL1_SEQUENTIAL_PROGRAM_2 0xAF
/** Write enable command code. */
#define S25FL1_WRITE_ENABLE 0x06
/** Write disable command code. */
#define S25FL1_WRITE_DISABLE 0x04
/** Protect sector command code. */
#define S25FL1_PROTECT_SECTOR 0x36
/** Unprotect sector command code. */
#define S25FL1_UNPROTECT_SECTOR 0x39
/** Read sector protection registers command code. */
#define S25FL1_READ_SECTOR_PROT 0x3C
/** Read status register command code. */
#define S25FL1_READ_STATUS 0x05
/** Write status register command code. */
#define S25FL1_WRITE_STATUS 0x01
/** Read manufacturer and device ID command code. */
#define S25FL1_READ_JEDEC_ID 0x9F
/** Deep power-down command code. */
#define S25FL1_DEEP_PDOWN 0xB9
/** Resume from deep power-down command code. */
#define S25FL1_RES_DEEP_PDOWN 0xAB
/* Enter 4-BYTE ADDRESS mode */
#define S25FL1_ENTER_4ADDR_MODE 0xB7
/* Exit 4-BYTE ADDRESS mode */
#define S25FL1_EXIT_4ADDR_MODE 0xE9
/** SPI Flash Manufacturer JEDEC ID */
#define ATMEL_SPI_FLASH 0x1F
#define ST_SPI_FLASH 0x20
#define WINBOND_SPI_FLASH 0xEF
#define MACRONIX_SPI_FLASH 0xC2
#define SST_SPI_FLASH 0xBF
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** Describes a serial firmware flash device parameters. */
typedef struct _S25fl1Desc {
/** Device string name. */
const char *name;
/** JEDEC ID of device. */
uint32_t jedecId;
/** Size of device in bytes. */
uint32_t size;
/** Size of one page in bytes. */
uint32_t pageSize;
/** Block erase size in bytes. */
uint32_t blockSize;
/** Block erase command. */
uint32_t blockEraseCmd;
} S25fl1Desc;
/**
* Serial flash driver structure. Holds the current state of the driver,
* including the current command and the descriptor for the underlying device.
*/
typedef struct _S25fl1 {
/** Pointer to the underlying QSPI driver. */
Qspid *pQspid;
/** Current command sent to the QSPI driver. */
QspidCmd command;
/** Pointer to a descriptor for the serial firmware flash device. */
const S25fl1Desc *pDesc;
/** Qspi Command buffer. */
qspiFrame CmdBuffer;
/** Polling mode */
uint32_t pollingMode;
/** Support for 4 byte address mode */
uint32_t fourbytemode;
} S25fl1;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void S25fl1_Configure(S25fl1 *pS25fl1,
Qspid *pQspid,
uint8_t cs,
uint8_t polling);
extern uint8_t S25fl1_SendCommand(
S25fl1 *pS25fl1,
uint8_t cmd,
uint8_t cmdSize,
uint8_t *pData,
uint32_t dataSize,
uint32_t address,
QspidCallback callback,
void *pArgument);
extern uint8_t S25fl1_IsBusy(S25fl1 *pS25fl1);
extern const S25fl1Desc * S25fl1_FindDevice(
S25fl1 *pS25fl1,
uint32_t jedecId);
#endif /*#ifndef S25FL1_SPI_H */

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file syscalls.h
*
* Implementation of newlib syscall.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdio.h>
#include <stdarg.h>
#include <sys/types.h>
#include <sys/stat.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern caddr_t _sbrk ( int incr ) ;
extern int link( char *old, char *new ) ;
extern int _close( int file ) ;
extern int _fstat( int file, struct stat *st ) ;
extern int _isatty( int file ) ;
extern int _lseek( int file, int ptr, int dir ) ;
extern int _read(int file, char *ptr, int len) ;
extern int _write( int file, char *ptr, int len ) ;

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Methods and definitions for Global time tick and wait functions.
*
* Defines a common and simpliest use of Time Tick, to increase tickCount
* every 1ms, the application can get this value through GetTickCount().
*
* \par Usage
*
* -# Configure the System Tick with TimeTick_Configure() when MCK changed
* \note
* Must be done before any invoke of GetTickCount(), Wait() or Sleep().
* -# Uses GetTickCount to get current tick value.
* -# Uses Wait to wait several ms.
* -# Uses Sleep to enter wait for interrupt mode to wait several ms.
*
*/
#ifndef _TIMETICK_
#define _TIMETICK_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
extern uint32_t TimeTick_Configure( uint32_t dwNew_MCK ) ;
extern void TimeTick_Increment( uint32_t dwInc ) ;
extern uint32_t GetDelayInTicks(uint32_t startTick,uint32_t endTick);
extern uint32_t GetTickCount( void ) ;
extern void Wait( volatile uint32_t dwMs ) ;
extern void Sleep( volatile uint32_t dwMs ) ;
#endif /* _TIMETICK_ */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef WAV_H
#define WAV_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
/* Standard WAV file header information. */
typedef struct _WavHeader
{
/* Contains the letters "RIFF" in ASCII form. */
unsigned int chunkID;
/* Size of the rest of the chunk following this number.*/
unsigned int chunkSize;
/* Contains the letters "WAVE".*/
unsigned int format;
/* Contains the letters "fmt ".*/
unsigned int subchunk1ID;
/* 16 for PCM. This is the size of the rest of the Subchunk which follows this number.*/
unsigned int subchunk1Size;
/* PCM = 1 (i.e. Linear quantization). Values other than 1 indicate some form of compression.*/
unsigned short audioFormat;
/* Mono = 1, Stereo = 2, etc.*/
unsigned short numChannels;
/* 8000, 44100, etc.*/
unsigned int sampleRate;
/* SampleRate * NumChannels * BitsPerSample/8*/
unsigned int byteRate;
/* NumChannels * BitsPerSample/8*/
unsigned short blockAlign;
/* 8 bits = 8, 16 bits = 16, etc.*/
unsigned short bitsPerSample;
/* Contains the letters "data".*/
unsigned int subchunk2ID;
/* Number of bytes in the data.*/
unsigned int subchunk2Size;
} WavHeader;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern unsigned char WAV_IsValid(const WavHeader *header);
extern void WAV_DisplayInfo(const WavHeader *header);
#endif //#ifndef WAV_H

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation WM8904 driver.
*
*/
#ifndef WM8904_H
#define WM8904_H
#include "board.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define WM8904_CSB_STATE (0x0 << 0)
/** Slave address */
#define WM8904_SLAVE_ADDRESS 0x1a | WM8904_CSB_STATE
#define CS2100_SLAVE_ADDRESS 0x4E
/** Reset register*/
#define WM8904_REG_RESET 0x00
/** Bias control 0 register*/
#define WM8904_REG_BIAS_CTRL0 0x04
/** VMID control 0 register*/
#define WM8904_REG_VMID_CTRL0 0x05
/** MIC Bias control 0 register*/
#define WM8904_REG_MICBIAS_CTRL0 0x06
/** Bias control 1 register*/
#define WM8904_REG_BIAS_CTRL1 0x07
/** Power management control 0 register*/
#define WM8904_REG_POWER_MANG0 0x0C
/** Power management control 2 register*/
#define WM8904_REG_POWER_MANG2 0x0E
/** Power management control 3 register*/
#define WM8904_REG_POWER_MANG3 0x0F
/** Power management control 6 register*/
#define WM8904_REG_POWER_MANG6 0x12
/** Clock rate0 register*/
#define WM8904_REG_CLOCK_RATE0 0x14
/** Clock rate1 register*/
#define WM8904_REG_CLOCK_RATE1 0x15
/** Clock rate2 register*/
#define WM8904_REG_CLOCK_RATE2 0x16
/** Audio interface0 register*/
#define WM8904_REG_AUD_INF0 0x18
/** Audio interface1 register*/
#define WM8904_REG_AUD_INF1 0x19
/** Audio interface2 register*/
#define WM8904_REG_AUD_INF2 0x1A
/** Audio interface3 register*/
#define WM8904_REG_AUD_INF3 0x1B
/** ADC digital 0 register*/
#define WM8904_REG_ADC_DIG0 0x20
/** ADC digital 1 register*/
#define WM8904_REG_ADC_DIG1 0x21
/** Analogue left input 0 register*/
#define WM8904_REG_ANALOGUE_LIN0 0x2C
/** Analogue right input 0 register*/
#define WM8904_REG_ANALOGUE_RIN0 0x2D
/** Analogue left input 1 register*/
#define WM8904_REG_ANALOGUE_LIN1 0x2E
/** Analogue right input 1 register*/
#define WM8904_REG_ANALOGUE_RIN1 0x2F
/** Analogue left output 1 register*/
#define WM8904_REG_ANALOGUE_LOUT1 0x39
/** Analogue right output 1 register*/
#define WM8904_REG_ANALOGUE_ROUT1 0x3A
/** Analogue left output 2 register*/
#define WM8904_REG_ANALOGUE_LOUT2 0x3B
/** Analogue right output 2 register*/
#define WM8904_REG_ANALOGUE_ROUT2 0x3C
/** Analogue output 12 ZC register*/
#define WM8904_REG_ANALOGUE_OUT12ZC 0x3D
/** DC servo 0 register*/
#define WM8904_REG_DC_SERVO0 0x43
/** Analogue HP 0 register*/
#define WM8904_REG_ANALOGUE_HP0 0x5A
/** Charge pump 0 register*/
#define WM8904_REG_CHARGE_PUMP0 0x62
/** Class W 0 register*/
#define WM8904_REG_CLASS0 0x68
/** FLL control 1 register*/
#define WM8904_REG_FLL_CRTL1 0x74
/** FLL control 2 register*/
#define WM8904_REG_FLL_CRTL2 0x75
/** FLL control 3 register*/
#define WM8904_REG_FLL_CRTL3 0x76
/** FLL control 4 register*/
#define WM8904_REG_FLL_CRTL4 0x77
/** FLL control 5 register*/
#define WM8904_REG_FLL_CRTL5 0x78
/** DUMMY register*/
#define WM8904_REG_END 0xFF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint16_t WM8904_Read(Twid *pTwid, uint32_t device, uint32_t regAddr);
extern void WM8904_Write(Twid *pTwid, uint32_t device, uint32_t regAddr, uint16_t data);
extern uint8_t WM8904_Init(Twid *pTwid, uint32_t device, uint32_t PCK);
extern uint8_t WM8904_VolumeSet(Twid *pTwid, uint32_t device, uint16_t value);
extern void WM8904_IN2R_IN1L(Twid *pTwid, uint32_t device);
#endif // WM8904_H

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/qspi_flash.icf
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x80000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20440000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x80000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x801FFFFF -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

41
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/samv7-ek-flash.mac
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// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// User setup file for CSPY debugger.
// ---------------------------------------------------------
/*********************************************************************
*
* execUserReset()
*/
execUserReset()
{
__message "------------------------------ execUserReset ---------------------------------";
__message "-------------------------------Set PC Reset ----------------------------------";
__hwReset(0);
// peripheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1400,"Memory");
}
/*********************************************************************
*
* execUserPreload()
*/
execUserPreload()
{
__message "------------------------------ execUserPreload ---------------------------------";
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset
// peripheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1400,"Memory");
}

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/samv7-ek-sram.mac
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// ---------------------------------------------------------
// ATMEL Microcontroller Software Support - ROUSSET -
// ---------------------------------------------------------
// The software is delivered "AS IS" without warranty or
// condition of any kind, either express, implied or
// statutory. This includes without limitation any warranty
// or condition with respect to merchantability or fitness
// for any particular purpose, or against the infringements of
// intellectual property rights of others.
// ---------------------------------------------------------
// User setup file for CSPY debugger.
// ---------------------------------------------------------
__var __mac_i;
/*********************************************************************
*
* execUserReset()
*/
execUserReset()
{
__message "------------------------------ execUserReset ---------------------------------";
__message "-------------------------------Set PC Reset ----------------------------------";
__hwReset(0);
// peripheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1400,"Memory");
}
execGPNVMBit()
{
__writeMemory32(0x400E0C04,((0x5Au << 24) | (((0xffffu << 8) & ((0x1) << 8))) | (((0xffu << 0) & ((0x0B) << 0))) ),"Memory");
}
/*********************************************************************
*
* execUserPreload()
*/
execUserPreload()
{
__message "------------------------------ execUserPreload ---------------------------------";
__hwReset(0); //* Hardware Reset: CPU is automatically halted after the reset
// peripheral reset RSTC_CR
__writeMemory32(0xA5000004,0x400e1400,"Memory");
//* Get the Chip ID
__mac_i=__readMemory32(0x400E0940,"Memory");
__message " ---------------------------------------- Chip ID 0x",__mac_i:%X;
}

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00500000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00500000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00500000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20440000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20480000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00500000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

54
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

57
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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00600000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_region_ITCM_start__ = 0x0;
define symbol __ICFEDIT_region_ITCM_end__ = 0x00400000-1;
define symbol __ICFEDIT_intvec_start__ = 0x20400000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_DTCM_start__ = 0x20000000;
define symbol __ICFEDIT_region_DTCM_end__ = 0x20400000-1;
define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20460000 -1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__ = 0x2000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy with packing=none { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in RAM_region { readonly };
place in RAM_region { readwrite, block CSTACK, block HEAP };

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#include "sam.h"
typedef void (*intfunc) (void);
typedef union { intfunc __fun; void * __ptr; } intvec_elem;
void __iar_program_start(void);
int __low_level_init(void);
/* Default empty handler */
void Dummy_Handler(void);
/* Cortex-M4 core handlers */
#pragma weak NMI_Handler=Dummy_Handler
#pragma weak HardFault_Handler=Dummy_Handler
#pragma weak MemManage_Handler=Dummy_Handler
#pragma weak BusFault_Handler=Dummy_Handler
#pragma weak UsageFault_Handler=Dummy_Handler
#pragma weak SVC_Handler=Dummy_Handler
#pragma weak DebugMon_Handler=Dummy_Handler
#pragma weak PendSV_Handler=Dummy_Handler
#pragma weak SysTick_Handler=Dummy_Handler
/* Peripherals handlers */
#pragma weak SUPC_Handler=Dummy_Handler
#pragma weak RSTC_Handler=Dummy_Handler
#pragma weak RTC_Handler=Dummy_Handler
#pragma weak RTT_Handler=Dummy_Handler
#pragma weak WDT0_Handler=Dummy_Handler
#pragma weak PMC_Handler=Dummy_Handler
#pragma weak EFC_Handler=Dummy_Handler
#pragma weak UART0_Handler=Dummy_Handler
#pragma weak UART1_Handler=Dummy_Handler
#pragma weak PIOA_Handler=Dummy_Handler
#pragma weak PIOB_Handler=Dummy_Handler
#ifdef _SAM_PIOC_INSTANCE_
#pragma weak PIOC_Handler=Dummy_Handler
#endif /* _SAM_PIOC_INSTANCE_ */
#pragma weak USART0_Handler=Dummy_Handler
#pragma weak USART1_Handler=Dummy_Handler
#pragma weak USART2_Handler=Dummy_Handler
#pragma weak PIOD_Handler=Dummy_Handler
#ifdef _SAM_PIOE_INSTANCE_
#pragma weak PIOE_Handler=Dummy_Handler
#endif /* _SAM_PIOE_INSTANCE_ */
#ifdef _SAM_HSMCI_INSTANCE_
#pragma weak HSMCI_Handler=Dummy_Handler
#endif /* _SAM_HSMCI_INSTANCE_ */
#pragma weak TWI0_Handler=Dummy_Handler
#pragma weak TWI1_Handler=Dummy_Handler
#pragma weak SPI0_Handler=Dummy_Handler
#pragma weak SSC_Handler=Dummy_Handler
#pragma weak TC0_Handler=Dummy_Handler
#pragma weak TC1_Handler=Dummy_Handler
#pragma weak TC2_Handler=Dummy_Handler
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC3_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC4_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC5_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#pragma weak AFEC0_Handler=Dummy_Handler
#ifdef _SAM_DACC_INSTANCE_
#pragma weak DACC_Handler=Dummy_Handler
#endif /* _SAM_DACC_INSTANCE_ */
#pragma weak PWM0_Handler=Dummy_Handler
#pragma weak ICM_Handler=Dummy_Handler
#pragma weak ACC_Handler=Dummy_Handler
#pragma weak USBHS_Handler=Dummy_Handler
#pragma weak CAN0_Handler=Dummy_Handler
#pragma weak CAN1_Handler=Dummy_Handler
#pragma weak GMAC_Handler=Dummy_Handler
#pragma weak GMACQ1_Handler=Dummy_Handler
#pragma weak GMACQ2_Handler=Dummy_Handler
#pragma weak AFEC1_Handler=Dummy_Handler
#ifdef _SAM_TWI2_INSTANCE_
#pragma weak TWI2_Handler=Dummy_Handler
#endif /* _SAM_TWI2_INSTANCE_ */
#pragma weak SPI1_Handler=Dummy_Handler
#pragma weak QSPI_Handler=Dummy_Handler
#pragma weak UART2_Handler=Dummy_Handler
#pragma weak UART3_Handler=Dummy_Handler
#pragma weak UART4_Handler=Dummy_Handler
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC6_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC7_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC8_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#pragma weak TC9_Handler=Dummy_Handler
#pragma weak TC10_Handler=Dummy_Handler
#pragma weak TC11_Handler=Dummy_Handler
#pragma weak MLB_Handler=Dummy_Handler
#pragma weak AES_Handler=Dummy_Handler
#pragma weak TRNG_Handler=Dummy_Handler
#pragma weak XDMAC_Handler=Dummy_Handler
#pragma weak ISI_Handler=Dummy_Handler
#pragma weak PWM1_Handler=Dummy_Handler
#pragma weak FPU_Handler=Dummy_Handler
#ifdef _SAM_SDRAMC_INSTANCE_
#pragma weak SDRAMC_Handler=Dummy_Handler
#endif /* _SAM_SDRAMC_INSTANCE_ */
#pragma weak WDT1_Handler=Dummy_Handler
#pragma weak CCF_Handler=Dummy_Handler
#pragma weak CCW_Handler=Dummy_Handler
/* Exception Table */
#pragma language = extended
#pragma segment = "CSTACK"
/* The name "__vector_table" has special meaning for C-SPY: */
/* it is where the SP start value is found, and the NVIC vector */
/* table register (VTOR) is initialized to this address if != 0 */
#pragma section = ".intvec"
#pragma location = ".intvec"
const intvec_elem __vector_table[] =
{
{ .__ptr = __sfe( "CSTACK" ) },
__iar_program_start,
NMI_Handler,
HardFault_Handler,
MemManage_Handler,
BusFault_Handler,
UsageFault_Handler,
(0UL), (0UL), (0UL), (0UL), /* Reserved */
SVC_Handler,
DebugMon_Handler,
(0UL), /* Reserved */
PendSV_Handler,
SysTick_Handler,
SUPC_Handler, /* 0 Supply Controller */
RSTC_Handler, /* 1 Reset Controller */
RTC_Handler, /* 2 Real Time Clock */
RTT_Handler, /* 3 Real Time Timer */
WDT0_Handler, /* 4 Watchdog Timer 0 */
PMC_Handler, /* 5 Power Management Controller */
EFC_Handler, /* 6 Enhanced Embedded Flash Controller */
UART0_Handler, /* 7 UART 0 */
UART1_Handler, /* 8 UART 1 */
(0UL), /* 9 Reserved */
PIOA_Handler, /* 10 Parallel I/O Controller A */
PIOB_Handler, /* 11 Parallel I/O Controller B */
PIOC_Handler, /* 12 Parallel I/O Controller C */
USART0_Handler, /* 13 USART 0 */
USART1_Handler, /* 14 USART 1 */
USART2_Handler, /* 15 USART 2 */
PIOD_Handler, /* 16 Parallel I/O Controller D */
PIOE_Handler, /* 17 Parallel I/O Controller E */
HSMCI_Handler, /* 18 Multimedia Card Interface */
TWI0_Handler, /* 19 Two Wire Interface 0 HS */
TWI1_Handler, /* 20 Two Wire Interface 1 HS */
SPI0_Handler, /* 21 Serial Peripheral Interface 0 */
SSC_Handler, /* 22 Synchronous Serial Controller */
TC0_Handler, /* 23 Timer/Counter 0 */
TC1_Handler, /* 24 Timer/Counter 1 */
TC2_Handler, /* 25 Timer/Counter 2 */
TC3_Handler, /* 26 Timer/Counter 3 */
TC4_Handler, /* 27 Timer/Counter 4 */
TC5_Handler, /* 28 Timer/Counter 5 */
AFEC0_Handler, /* 29 Analog Front End 0 */
DACC_Handler, /* 30 Digital To Analog Converter */
PWM0_Handler, /* 31 Pulse Width Modulation 0 */
ICM_Handler, /* 32 Integrity Check Monitor */
ACC_Handler, /* 33 Analog Comparator */
USBHS_Handler, /* 34 USB Host / Device Controller */
CAN0_Handler, /* 35 CAN Controller 0 */
(0UL), /* 36 Reserved */
CAN1_Handler, /* 37 CAN Controller 1 */
(0UL), /* 38 Reserved */
GMAC_Handler, /* 39 Ethernet MAC */
AFEC1_Handler, /* 40 Analog Front End 1 */
TWI2_Handler, /* 41 Two Wire Interface 2 HS */
SPI1_Handler, /* 42 Serial Peripheral Interface 1 */
QSPI_Handler, /* 43 Quad I/O Serial Peripheral Interface */
UART2_Handler, /* 44 UART 2 */
UART3_Handler, /* 45 UART 3 */
UART4_Handler, /* 46 UART 4 */
TC6_Handler, /* 47 Timer/Counter 6 */
TC7_Handler, /* 48 Timer/Counter 7 */
TC8_Handler, /* 49 Timer/Counter 8 */
TC9_Handler, /* 50 Timer/Counter 9 */
TC10_Handler, /* 51 Timer/Counter 10 */
TC11_Handler, /* 52 Timer/Counter 11 */
MLB_Handler, /* 53 MediaLB */
(0UL), /* 54 Reserved */
(0UL), /* 55 Reserved */
AES_Handler, /* 56 AES */
TRNG_Handler, /* 57 True Random Generator */
XDMAC_Handler, /* 58 DMA */
ISI_Handler, /* 59 Camera Interface */
PWM1_Handler, /* 60 Pulse Width Modulation 1 */
FPU_Handler, /* 61 Floating Point Unit */
SDRAMC_Handler, /* 62 SDRAM Controller */
WDT1_Handler, /* 63 Watchdog Timer 1 */
CCW_Handler, /* 64 ARM Cache ECC Warning */
CCF_Handler, /* 65 ARM Cache ECC Fault */
GMACQ1_Handler, /* 66 GMAC Queue 1 Handler */
GMACQ2_Handler /* 67 GMAC Queue 2 Handler */
};
void LowLevelInit(void);
#if 0
/** \brief TCM memory enable
The function enables TCM memories
*/
__STATIC_INLINE void TCM_Enable(void)
{
__DSB();
__ISB();
SCB->ITCMCR = (SCB_ITCMCR_EN_Msk | SCB_ITCMCR_RMW_Msk | SCB_ITCMCR_RETEN_Msk);
SCB->DTCMCR = ( SCB_DTCMCR_EN_Msk | SCB_DTCMCR_RMW_Msk | SCB_DTCMCR_RETEN_Msk);
__DSB();
__ISB();
}
#endif
/**------------------------------------------------------------------------------
* This is the code that gets called on processor reset. To initialize the
* device.
*------------------------------------------------------------------------------*/
int __low_level_init(void)
{
uint32_t *pSrc = __section_begin(".intvec");
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
#ifdef ENABLE_TCM
//TCM_Enable();
#endif
LowLevelInit();
return 1; /* if return 0, the data sections will not be initialized */
}
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
}
}

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; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2009, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; *------------------------------------------------------------------------------
; * Linker scatter for running in internal FLASH on the SAMV71
; *----------------------------------------------------------------------------*/
; /* vector is put at very begin adress of FLASH, the preserved size is 0x100 */
LR_IROM1 0x40000000 0x00200000 ; load region size_region
{
ER_IROM1 0x40000000 0x400 ;0x00200000 ; load address = execution address;
{
*.o (vectors, +FIRST)
}
ER_IROM2 +0
{
*.o
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20400000 0x0005E000 ; RW data
{
.ANY (+RW +ZI)
}
; Configure Stack and Heap
ARM_LIB_HEAP 0x2045E000 EMPTY 0x1000
{
}
ARM_LIB_STACK 0x20405FFC EMPTY -0x1000
{
}
}

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*
* This file Configures the target-dependent low level functions for character I/O.
*/
#include "board.h"
#include "dbg_console.h"
#include <stdio.h>
/* Disable semihosting */
#pragma import(__use_no_semihosting_swi)
struct __FILE { int handle;} ;
FILE __stdout;
FILE __stderr;
/*------------------------------------------------------------------------------
* Outputs a character.
*------------------------------------------------------------------------------*/
int fputc(int ch, FILE *f)
{
if ((f == stdout) || (f == stderr))
{
DBG_PutChar(ch) ;
return ch ;
}
else
{
return EOF ;
}
}
/*------------------------------------------------------------------------------
* Returns the error status accumulated during file I/O.
*------------------------------------------------------------------------------*/
int ferror( FILE *f )
{
return EOF ;
}
void _ttywrch( int ch )
{
DBG_PutChar( (uint8_t)ch ) ;
}
void _sys_exit(int return_code)
{
while ( 1 ) ; /* endless loop */
}
/*------------------------------------------------------------------------------
* Low level functions I/O for assert().
*------------------------------------------------------------------------------*/
void __assert_puts(const char *str)
{
printf("%s", str);
}

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// ----------------------------------------------------------------------------
// ATMEL Microcontroller Software Support
// ----------------------------------------------------------------------------
// Copyright (c) 2010, Atmel Corporation
//
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// - Redistributions of source code must retain the above copyright notice,
// this list of conditions and the disclaimer below.
//
// Atmel's name may not be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ----------------------------------------------------------------------------
//----------------------------------------------------------------------------
// File Name : samv7-sram.ini
// Object : Generic Macro File for KEIL
//----------------------------------------------------------------------------
SP = *((unsigned int *) 0x20400000);
PC = *((unsigned int *) 0x20400004);

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; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2009, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; *------------------------------------------------------------------------------
; * Linker scatter for running in internal SRAM on the SAM3S4
; *----------------------------------------------------------------------------*/
LR_IRAM1 0x20400000 0x00040000 ; load region size_region
{
Vector_region 0x20400000 0x0005E000
{
startup_sam.o (vectors, +First)
}
Code_region +0
{
.ANY (+RO, +RW, +ZI)
}
; Configure Stack and Heap
ARM_LIB_HEAP 0x2045E000 EMPTY 0x1000
{
}
ARM_LIB_STACK 0x20460000 EMPTY -0x1000
{
}
}

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#include "sam.h"
typedef void (*intfunc) (void);
typedef union { intfunc __fun; void * __ptr; } intvec_elem;
extern int Image$$ARM_LIB_STACK$$ZI$$Limit ;
extern int Image$$Vector_region$$Base ;
extern int Image$$Vector_region$$Limit ;
extern void __main( void ) ;
static void Reset_Handler( void ) ;
int __low_level_init(void);
/* Default empty handler */
void Dummy_Handler(void);
void NMI_Handler(void);
/* Cortex-M7 core handlers */
//#pragma weak NMI_Handler=Dummy_Handler
#pragma weak HardFault_Handler=Dummy_Handler
#pragma weak MemManage_Handler=Dummy_Handler
#pragma weak BusFault_Handler=Dummy_Handler
#pragma weak UsageFault_Handler=Dummy_Handler
#pragma weak SVC_Handler=Dummy_Handler
#pragma weak DebugMon_Handler=Dummy_Handler
#pragma weak PendSV_Handler=Dummy_Handler
#pragma weak SysTick_Handler=Dummy_Handler
/* Peripherals handlers */
#pragma weak SUPC_Handler=Dummy_Handler
#pragma weak RSTC_Handler=Dummy_Handler
#pragma weak RTC_Handler=Dummy_Handler
#pragma weak RTT_Handler=Dummy_Handler
#pragma weak WDT0_Handler=Dummy_Handler
#pragma weak PMC_Handler=Dummy_Handler
#pragma weak EFC_Handler=Dummy_Handler
#pragma weak UART0_Handler=Dummy_Handler
#pragma weak UART1_Handler=Dummy_Handler
#pragma weak PIOA_Handler=Dummy_Handler
#pragma weak PIOB_Handler=Dummy_Handler
#ifdef _SAM_PIOC_INSTANCE_
#pragma weak PIOC_Handler=Dummy_Handler
#endif /* _SAM_PIOC_INSTANCE_ */
#pragma weak USART0_Handler=Dummy_Handler
#pragma weak USART1_Handler=Dummy_Handler
#pragma weak USART2_Handler=Dummy_Handler
#pragma weak PIOD_Handler=Dummy_Handler
#ifdef _SAM_PIOE_INSTANCE_
#pragma weak PIOE_Handler=Dummy_Handler
#endif /* _SAM_PIOE_INSTANCE_ */
#ifdef _SAM_HSMCI_INSTANCE_
#pragma weak HSMCI_Handler=Dummy_Handler
#endif /* _SAM_HSMCI_INSTANCE_ */
#pragma weak TWI0_Handler=Dummy_Handler
#pragma weak TWI1_Handler=Dummy_Handler
#pragma weak SPI0_Handler=Dummy_Handler
#pragma weak SSC_Handler=Dummy_Handler
#pragma weak TC0_Handler=Dummy_Handler
#pragma weak TC1_Handler=Dummy_Handler
#pragma weak TC2_Handler=Dummy_Handler
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC3_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC4_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#ifdef _SAM_TC1_INSTANCE_
#pragma weak TC5_Handler=Dummy_Handler
#endif /* _SAM_TC1_INSTANCE_ */
#pragma weak AFEC0_Handler=Dummy_Handler
#ifdef _SAM_DACC_INSTANCE_
#pragma weak DACC_Handler=Dummy_Handler
#endif /* _SAM_DACC_INSTANCE_ */
#pragma weak PWM0_Handler=Dummy_Handler
#pragma weak ICM_Handler=Dummy_Handler
#pragma weak ACC_Handler=Dummy_Handler
#pragma weak USBHS_Handler=Dummy_Handler
#pragma weak CAN0_Handler=Dummy_Handler
#pragma weak CAN1_Handler=Dummy_Handler
#pragma weak GMAC_Handler=Dummy_Handler
#pragma weak GMACQ1_Handler=Dummy_Handler
#pragma weak GMACQ2_Handler=Dummy_Handler
#pragma weak AFEC1_Handler=Dummy_Handler
#ifdef _SAM_TWI2_INSTANCE_
#pragma weak TWI2_Handler=Dummy_Handler
#endif /* _SAM_TWI2_INSTANCE_ */
#pragma weak SPI1_Handler=Dummy_Handler
#pragma weak QSPI_Handler=Dummy_Handler
#pragma weak UART2_Handler=Dummy_Handler
#pragma weak UART3_Handler=Dummy_Handler
#pragma weak UART4_Handler=Dummy_Handler
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC6_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC7_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#ifdef _SAM_TC2_INSTANCE_
#pragma weak TC8_Handler=Dummy_Handler
#endif /* _SAM_TC2_INSTANCE_ */
#pragma weak TC9_Handler=Dummy_Handler
#pragma weak TC10_Handler=Dummy_Handler
#pragma weak TC11_Handler=Dummy_Handler
#pragma weak MLB_Handler=Dummy_Handler
#pragma weak AES_Handler=Dummy_Handler
#pragma weak TRNG_Handler=Dummy_Handler
#pragma weak XDMAC_Handler=Dummy_Handler
#pragma weak ISI_Handler=Dummy_Handler
#pragma weak PWM1_Handler=Dummy_Handler
#pragma weak FPU_Handler=Dummy_Handler
#ifdef _SAM_SDRAMC_INSTANCE_
#pragma weak SDRAMC_Handler=Dummy_Handler
#endif /* _SAM_SDRAMC_INSTANCE_ */
#pragma weak WDT1_Handler=Dummy_Handler
#pragma weak CCF_Handler=Dummy_Handler
#pragma weak CCW_Handler=Dummy_Handler
/* The name "__vector_table" has special meaning for C-SPY: */
/* it is where the SP start value is found, and the NVIC vector */
/* table register (VTOR) is initialized to this address if != 0 */
#pragma arm section rodata = "vectors"
const intvec_elem __vector_table[] =
{
(intfunc)&Image$$ARM_LIB_STACK$$ZI$$Limit,
Reset_Handler,
NMI_Handler,
HardFault_Handler,
MemManage_Handler,
BusFault_Handler,
UsageFault_Handler,
(0UL), (0UL), (0UL), (0UL), /* Reserved */
SVC_Handler,
DebugMon_Handler,
(0UL), /* Reserved */
PendSV_Handler,
SysTick_Handler,
SUPC_Handler, /* 0 Supply Controller */
RSTC_Handler, /* 1 Reset Controller */
RTC_Handler, /* 2 Real Time Clock */
RTT_Handler, /* 3 Real Time Timer */
WDT0_Handler, /* 4 Watchdog Timer 0 */
PMC_Handler, /* 5 Power Management Controller */
EFC_Handler, /* 6 Enhanced Embedded Flash Controller */
UART0_Handler, /* 7 UART 0 */
UART1_Handler, /* 8 UART 1 */
(0UL), /* 9 Reserved */
PIOA_Handler, /* 10 Parallel I/O Controller A */
PIOB_Handler, /* 11 Parallel I/O Controller B */
PIOC_Handler, /* 12 Parallel I/O Controller C */
USART0_Handler, /* 13 USART 0 */
USART1_Handler, /* 14 USART 1 */
USART2_Handler, /* 15 USART 2 */
PIOD_Handler, /* 16 Parallel I/O Controller D */
PIOE_Handler, /* 17 Parallel I/O Controller E */
HSMCI_Handler, /* 18 Multimedia Card Interface */
TWI0_Handler, /* 19 Two Wire Interface 0 HS */
TWI1_Handler, /* 20 Two Wire Interface 1 HS */
SPI0_Handler, /* 21 Serial Peripheral Interface 0 */
SSC_Handler, /* 22 Synchronous Serial Controller */
TC0_Handler, /* 23 Timer/Counter 0 */
TC1_Handler, /* 24 Timer/Counter 1 */
TC2_Handler, /* 25 Timer/Counter 2 */
TC3_Handler, /* 26 Timer/Counter 3 */
TC4_Handler, /* 27 Timer/Counter 4 */
TC5_Handler, /* 28 Timer/Counter 5 */
AFEC0_Handler, /* 29 Analog Front End 0 */
DACC_Handler, /* 30 Digital To Analog Converter */
PWM0_Handler, /* 31 Pulse Width Modulation 0 */
ICM_Handler, /* 32 Integrity Check Monitor */
ACC_Handler, /* 33 Analog Comparator */
USBHS_Handler, /* 34 USB Host / Device Controller */
CAN0_Handler, /* 35 CAN Controller 0 */
(0UL), /* 36 Reserved */
CAN1_Handler, /* 37 CAN Controller 1 */
(0UL), /* 38 Reserved */
GMAC_Handler, /* 39 Ethernet MAC */
AFEC1_Handler, /* 40 Analog Front End 1 */
TWI2_Handler, /* 41 Two Wire Interface 2 HS */
SPI1_Handler, /* 42 Serial Peripheral Interface 1 */
QSPI_Handler, /* 43 Quad I/O Serial Peripheral Interface */
UART2_Handler, /* 44 UART 2 */
UART3_Handler, /* 45 UART 3 */
UART4_Handler, /* 46 UART 4 */
TC6_Handler, /* 47 Timer/Counter 6 */
TC7_Handler, /* 48 Timer/Counter 7 */
TC8_Handler, /* 49 Timer/Counter 8 */
TC9_Handler, /* 50 Timer/Counter 9 */
TC10_Handler, /* 51 Timer/Counter 10 */
TC11_Handler, /* 52 Timer/Counter 11 */
MLB_Handler, /* 53 MediaLB */
(0UL), /* 54 Reserved */
(0UL), /* 55 Reserved */
AES_Handler, /* 56 AES */
TRNG_Handler, /* 57 True Random Generator */
XDMAC_Handler, /* 58 DMA */
ISI_Handler, /* 59 Camera Interface */
PWM1_Handler, /* 60 Pulse Width Modulation 1 */
FPU_Handler, /* 61 Floating Point Unit */
SDRAMC_Handler, /* 62 SDRAM Controller */
WDT1_Handler, /* 63 Watchdog Timer 1 */
CCW_Handler, /* 64 ARM Cache ECC Warning */
CCF_Handler, /* 65 ARM Cache ECC Fault */
GMACQ1_Handler, /* 66 GMAC Queue 1 Handler */
GMACQ2_Handler /* 67 GMAC Queue 2 Handler */
};
#pragma arm section
void LowLevelInit(void);
/**------------------------------------------------------------------------------
* This is the code that gets called on processor reset. To initialize the
* device.
*------------------------------------------------------------------------------*/
int __low_level_init(void)
{
// uint32_t *pSrc = __section_begin(".intvec");
LowLevelInit();
// SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
SCB_EnableICache();
SCB_EnableDCache();
return 1; /* if return 0, the data sections will not be initialized */
}
/** \brief TCM memory enable
The function enables TCM memories
*/
/* Correct errors in early version core_cm7.h */
#undef SCB_ITCMCR_RETEN_Msk
#undef SCB_ITCMCR_RMW_Msk
#undef SCB_ITCMCR_EN_Msk
#define SCB_ITCMCR_RETEN_Msk (0x1FFUL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */
#define SCB_ITCMCR_RMW_Msk (0x1FFUL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */
#define SCB_ITCMCR_EN_Msk (0x1FFUL << SCB_ITCMCR_EN_Pos) /*!< SCB ITCMCR: EN Mask */
__STATIC_INLINE void TCM_Enable(void)
{
__DSB();
__ISB();
SCB->ITCMCR = ( SCB_ITCMCR_EN_Msk | SCB_ITCMCR_RMW_Msk | SCB_ITCMCR_RETEN_Msk);
SCB->DTCMCR = ( SCB_DTCMCR_EN_Msk | SCB_DTCMCR_RMW_Msk | SCB_DTCMCR_RETEN_Msk);
__DSB();
__ISB();
}
/**------------------------------------------------------------------------------
* This is the code that gets called on processor reset. To initialize the
* device.
*------------------------------------------------------------------------------*/
void Reset_Handler(void)
{
uint32_t *pSrc = (uint32_t*)&Image$$Vector_region$$Base ;
/* Low level Initialize */
LowLevelInit() ;
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
SCB_EnableICache();
SCB_EnableDCache();
/* Branch to main function */
__main() ;
/* Will not execute, but removes warning about TCM_Enable() not being called. */
( void ) TCM_Enable;
/* Infinite loop */
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
}
}
void NMI_Handler(void)
{
while (1) {
}
}

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AREA WORKAROUND,CODE,READONLY
EXTERN __vector_table
LDR r0,=__vector_table
ALIGN
END

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/* ---------------------------------------------------------------------------- */
/* Atmel Microcontroller Software Support */
/* SAM Software Package License */
/* ---------------------------------------------------------------------------- */
/* Copyright (c) 2014, Atmel Corporation */
/* */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following condition is met: */
/* */
/* - Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the disclaimer below. */
/* */
/* Atmel's name may not be used to endorse or promote products derived from */
/* this software without specific prior written permission. */
/* */
/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ---------------------------------------------------------------------------- */
#include "sam.h"
/* @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/* @endcond */
/* Clock Settings (120MHz) */
#define SYS_BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8U))
#define SYS_BOARD_PLLAR (CKGR_PLLAR_ONE \
| CKGR_PLLAR_MULA(0x13U) \
| CKGR_PLLAR_PLLACOUNT(0x3fU) \
| CKGR_PLLAR_DIVA(0x1U))
#define SYS_BOARD_MCKR (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)
#define SYS_CKGR_MOR_KEY_VALUE CKGR_MOR_KEY_PASSWD /* Key to unlock MOR register */
uint32_t SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
/**
* \brief Setup the microcontroller system.
* Initialize the System and update the SystemFrequency variable.
*/
void SystemInit(void)
{
/* Set FWS according to SYS_BOARD_MCKR configuration */
EFC->EEFC_FMR = EEFC_FMR_FWS(5);
#if defined(ID_EFC1)
EFC1->EEFC_FMR = EEFC_FMR_FWS(5);
#endif
/* Initialize main oscillator */
if (!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)) {
PMC->CKGR_MOR = SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT |
CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN;
while (!(PMC->PMC_SR & PMC_SR_MOSCXTS)) {
}
}
/* Switch to 3-20MHz Xtal oscillator */
PMC->CKGR_MOR = SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT |
CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
while (!(PMC->PMC_SR & PMC_SR_MOSCSELS)) {
}
PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk) |
PMC_MCKR_CSS_MAIN_CLK;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
/* Initialize PLLA */
PMC->CKGR_PLLAR = SYS_BOARD_PLLAR;
while (!(PMC->PMC_SR & PMC_SR_LOCKA)) {
}
/* Switch to main clock */
PMC->PMC_MCKR = (SYS_BOARD_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
/* Switch to PLLA */
PMC->PMC_MCKR = SYS_BOARD_MCKR;
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
}
SystemCoreClock = CHIP_FREQ_CPU_MAX;
}
void SystemCoreClockUpdate(void)
{
/* Determine clock frequency according to clock register values */
switch (PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk) {
case PMC_MCKR_CSS_SLOW_CLK: /* Slow clock */
if (SUPC->SUPC_SR & SUPC_SR_OSCSEL) {
SystemCoreClock = CHIP_FREQ_XTAL_32K;
} else {
SystemCoreClock = CHIP_FREQ_SLCK_RC;
}
break;
case PMC_MCKR_CSS_MAIN_CLK: /* Main clock */
if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) {
SystemCoreClock = CHIP_FREQ_XTAL_12M;
} else {
SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
case CKGR_MOR_MOSCRCF_4_MHz:
break;
case CKGR_MOR_MOSCRCF_8_MHz:
SystemCoreClock *= 2U;
break;
case CKGR_MOR_MOSCRCF_12_MHz:
SystemCoreClock *= 3U;
break;
default:
break;
}
}
break;
case PMC_MCKR_CSS_PLLA_CLK: /* PLLA clock */
// case PMC_MCKR_CSS_PLLB_CLK: /* PLLB clock */
if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) {
SystemCoreClock = CHIP_FREQ_XTAL_12M;
} else {
SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
case CKGR_MOR_MOSCRCF_4_MHz:
break;
case CKGR_MOR_MOSCRCF_8_MHz:
SystemCoreClock *= 2U;
break;
case CKGR_MOR_MOSCRCF_12_MHz:
SystemCoreClock *= 3U;
break;
default:
break;
}
}
if ((uint32_t) (PMC->PMC_MCKR & (uint32_t) PMC_MCKR_CSS_Msk) == PMC_MCKR_CSS_PLLA_CLK) {
SystemCoreClock *= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_MULA_Msk) >>
CKGR_PLLAR_MULA_Pos) + 1U);
SystemCoreClock /= ((((PMC->CKGR_PLLAR) & CKGR_PLLAR_DIVA_Msk) >>
CKGR_PLLAR_DIVA_Pos));
} else {
// SystemCoreClock *= ((((PMC->CKGR_PLLBR) & CKGR_PLLBR_MULB_Msk) >>
// CKGR_PLLBR_MULB_Pos) + 1U);
// SystemCoreClock /= ((((PMC->CKGR_PLLBR) & CKGR_PLLBR_DIVB_Msk) >>
// CKGR_PLLBR_DIVB_Pos));
}
break;
default:
break;
}
if ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) == PMC_MCKR_PRES_CLK_3) {
SystemCoreClock /= 3U;
} else {
SystemCoreClock >>= ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) >> PMC_MCKR_PRES_Pos);
}
}
/**
* Initialize flash.
*/
void system_init_flash(uint32_t ul_clk)
{
/* Set FWS for embedded Flash access according to operating frequency */
#if !defined(ID_EFC1)
if (ul_clk < CHIP_FREQ_FWS_0) {
EFC->EEFC_FMR = EEFC_FMR_FWS(0);
} else if (ul_clk < CHIP_FREQ_FWS_1) {
EFC->EEFC_FMR = EEFC_FMR_FWS(1);
} else if (ul_clk < CHIP_FREQ_FWS_2) {
EFC->EEFC_FMR = EEFC_FMR_FWS(2);
} else if (ul_clk < CHIP_FREQ_FWS_3) {
EFC->EEFC_FMR = EEFC_FMR_FWS(3);
} else if (ul_clk < CHIP_FREQ_FWS_4) {
EFC->EEFC_FMR = EEFC_FMR_FWS(4);
} else {
EFC->EEFC_FMR = EEFC_FMR_FWS(5);
}
#else
if (ul_clk < CHIP_FREQ_FWS_0) {
EFC->EEFC_FMR = EEFC_FMR_FWS(0);
EFC1->EEFC_FMR = EEFC_FMR_FWS(0);
} else if (ul_clk < CHIP_FREQ_FWS_1) {
EFC->EEFC_FMR = EEFC_FMR_FWS(1);
EFC1->EEFC_FMR = EEFC_FMR_FWS(1);
} else if (ul_clk < CHIP_FREQ_FWS_2) {
EFC->EEFC_FMR = EEFC_FMR_FWS(2);
EFC1->EEFC_FMR = EEFC_FMR_FWS(2);
} else if (ul_clk < CHIP_FREQ_FWS_3) {
EFC->EEFC_FMR = EEFC_FMR_FWS(3);
EFC1->EEFC_FMR = EEFC_FMR_FWS(3);
} else if (ul_clk < CHIP_FREQ_FWS_4) {
EFC->EEFC_FMR = EEFC_FMR_FWS(4);
EFC1->EEFC_FMR = EEFC_FMR_FWS(4);
} else {
EFC->EEFC_FMR = EEFC_FMR_FWS(5);
EFC1->EEFC_FMR = EEFC_FMR_FWS(5);
}
#endif
}
/* @cond 0 */
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/* @endcond */

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2014, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation WM8904 driver.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*----------------------------------------------------------------------------
* Type
*----------------------------------------------------------------------------*/
typedef struct {
uint16_t value;
uint8_t address;
}CS2100_PARA;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Read data from CS2100 Register.
*
* \param pTwid Pointer to twi driver structure
* \param device Twi slave address.
* \param regAddr Register address to read.
* \return value in the given register.
*/
uint16_t CS2100_Read(Twid *pTwid,
uint32_t device,
uint32_t regAddr)
{
uint16_t bitsDataRegister;
uint8_t Tdata[2]={0,0};
TWID_Read(pTwid, device, regAddr, 1, Tdata, 2, 0);
bitsDataRegister = (Tdata[0] << 8) | Tdata[1];
return bitsDataRegister;
}
/**
* \brief Write data to WM8904 Register.
*
* \param pTwid Pointer to twi driver structure
* \param device Twi slave address.
* \param regAddr Register address to read.
* \param data Data to write
*/
void CS2100_Write(Twid *pTwid,
uint32_t device,
uint32_t regAddr,
uint16_t data)
{
uint8_t tmpData[2];
tmpData[0] = (data & 0xff00) >> 8;
tmpData[1] = data & 0xff;
TWID_Write(pTwid, device, regAddr, 1, tmpData, 2, 0);
}
uint8_t CS2100_Init(Twid *pTwid, uint32_t device, uint32_t PCK)
{
uint16_t data = 0;
// Reset (write Reg@0x0 to reset)
CS2100_Write(pTwid, device, 0, 0xFFFF);
for(data=0;data<1000;data++);
//wait ready
while(data!=0x8904)
data=CS2100_Read(pTwid, device, 0);
return 0;
}

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \addtogroup at25_spi_module AT25 SPI driver
* \ingroup at25d_module
*
* The AT25 serial firmware dataflash driver is based on top of the
* corresponding Spi driver. A Dataflash structure instance has to be
* initialized using the AT25_Configure() function. Then a command can be send
* to the serial flash using the SPI_SendCommand() function.
*
* \section Usage
* <ul>
* <li>Initializes an AT25 instance and configures SPI chip select pin
* using AT25_Configure(). </li>
* <li>Detect DF and returns DF description corresponding to the device
* connected using AT25D_ReadJedecId() and AT25_FindDevice().
* This function shall be called by the application before AT25_SendCommand().</li>
* <li> Sends a command to the DF through the SPI using AT25_SendCommand().
* The command is identified by its command code and the number of
* bytes to transfer.</li>
* <li> Example code for sending command to write a page to DF.</li>
* \code
* // Program page
* error = AT25_SendCommand(pAt25, AT25_BYTE_PAGE_PROGRAM, 4,
* pData, writeSize, address, 0, 0);
* \endcode
* <li> Example code for sending command to read a page from DF.
* If data needs to be received, then a data buffer must be
* provided.</li>
* \code
* // Start a read operation
* error = AT25_SendCommand(pAt25, AT25_READ_ARRAY_LF,
* 4, pData, size, address, 0, 0);
* \endcode
* <li> This function does not block; its optional callback will
* be invoked when the transfer completes.</li>
* <li> Check the AT25 driver is ready or not by polling AT25_IsBusy().</li>
* </ul>
*
* Related files :\n
* \ref at25_spi.c\n
* \ref at25_spi.h.\n
*/
/**
* \file
*
* Implementation for the AT25 SPI driver.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <board.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/** SPI clock frequency used in Hz. */
#define SPCK 1000000
/** SPI chip select configuration value. */
#define CSR (SPI_CSR_NCPHA | \
SPID_CSR_DLYBCT(BOARD_MCK, 100) | \
SPID_CSR_DLYBS(BOARD_MCK, 10) | \
SPID_CSR_SCBR(BOARD_MCK, SPCK))
/** Number of recognized dataflash. */
#define NUMDATAFLASH (sizeof(at25Devices) / sizeof(At25Desc))
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
/** Array of recognized serial firmware dataflash chips. */
static const At25Desc at25Devices[] = {
/* name, Jedec ID, size, page size, block size, block erase command */
{"AT25DF041A" , 0x0001441F, 512 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF161" , 0x0002461F, 2 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT26DF081A" , 0x0001451F, 1 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT26DF0161" , 0x0000461F, 2 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT26DF161A" , 0x0001461F, 2 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF321" , 0x0000471F, 4 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF321A" , 0x0001471F, 4 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF512B" , 0x0001651F, 64 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF512B" , 0x0000651F, 64 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT25DF021" , 0x0000431F, 256 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"AT26DF641" , 0x0000481F, 8 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
/* Manufacturer: ST */
{"M25P05" , 0x00102020, 64 * 1024, 256, 32 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P10" , 0x00112020, 128 * 1024, 256, 32 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P20" , 0x00122020, 256 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P40" , 0x00132020, 512 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P80" , 0x00142020, 1 * 1024 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P16" , 0x00152020, 2 * 1024 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P32" , 0x00162020, 4 * 1024 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"M25P64" , 0x00172020, 8 * 1024 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
/* Manufacturer: Windbond */
{"W25X10" , 0x001130EF, 128 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"W25X20" , 0x001230EF, 256 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"W25X40" , 0x001330EF, 512 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"W25X80" , 0x001430EF, 1 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
/* Manufacturer: Macronix */
{"MX25L512" , 0x001020C2, 64 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"MX25L3205" , 0x001620C2, 4 * 1024 * 1024, 256, 64 * 1024, AT25_BLOCK_ERASE_64K},
{"MX25L6405" , 0x001720C2, 8 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"MX25L8005" , 0x001420C2, 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
/* Other */
{"SST25VF040" , 0x008D25BF, 512 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"SST25VF080" , 0x008E25BF, 1 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"SST25VF032" , 0x004A25BF, 4 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K},
{"SST25VF064" , 0x004B25BF, 8 * 1024 * 1024, 256, 4 * 1024, AT25_BLOCK_ERASE_4K}
};
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes an AT25 driver instance with the given SPI driver and chip
* select value.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param pSpid Pointer to an SPI driver instance.
* \param cs Chip select value to communicate with the serial flash.
*/
void AT25_Configure(At25 *pAt25, Spid *pSpid, unsigned char cs)
{
SpidCmd *pCommand;
assert(pAt25);
assert(pSpid);
assert(cs < 4);
/* Configure the SPI chip select for the serial flash */
SPID_ConfigureCS(pSpid, cs, CSR);
/* Initialize the AT25 fields */
pAt25->pSpid = pSpid;
pAt25->pDesc = 0;
/* Initialize the command structure */
pCommand = &(pAt25->command);
pCommand->pCmd = (unsigned char *) pAt25->pCmdBuffer;
pCommand->callback = 0;
pCommand->pArgument = 0;
pCommand->spiCs = cs;
}
/**
* \brief Is serial flash driver busy.
*
* \param pAt25 Pointer to an At25 driver instance.
*
* \return 1 if the serial flash driver is currently busy executing a command;
* otherwise returns 0.
*/
unsigned char AT25_IsBusy(At25 *pAt25)
{
return SPID_IsBusy(pAt25->pSpid);
}
/**
* \brief Sends a command to the serial flash through the SPI. The command is made up
* of two parts: the first is used to transmit the command byte and optionally,
* address and dummy bytes. The second part is the data to send or receive.
* This function does not block: it returns as soon as the transfer has been
* started. An optional callback can be invoked to notify the end of transfer.
*
* \param pAt25 Pointer to an At25 driver instance.
* \param cmd Command byte.
* \param cmdSize Size of command (command byte + address bytes + dummy bytes).
* \param pData Data buffer.
* \param dataSize Number of bytes to send/receive.
* \param address Address to transmit.
* \param callback Optional user-provided callback to invoke at end of transfer.
* \param pArgument Optional argument to the callback function.
*
* \return 0 if successful; otherwise, returns AT25_ERROR_BUSY if the AT25
* driver is currently executing a command, or AT25_ERROR_SPI if the command
* cannot be sent because of a SPI error.
*/
unsigned char AT25_SendCommand(
At25 *pAt25,
unsigned char cmd,
unsigned char cmdSize,
unsigned char *pData,
unsigned int dataSize,
unsigned int address,
SpidCallback callback,
void *pArgument)
{
SpidCmd *pCommand;
assert(pAt25);
/* Check if the SPI driver is available */
if (AT25_IsBusy(pAt25)) {
return AT25_ERROR_BUSY;
}
/* Store command and address in command buffer */
pAt25->pCmdBuffer[0] = (cmd & 0x000000FF)
| ((address & 0x0000FF) << 24)
| ((address & 0x00FF00) << 8)
| ((address & 0xFF0000) >> 8);
/* Update the SPI transfer descriptor */
pCommand = &(pAt25->command);
pCommand->cmdSize = cmdSize;
pCommand->pData = pData;
pCommand->dataSize = dataSize;
pCommand->callback = callback;
pCommand->pArgument = pArgument;
/* Start the SPI transfer */
if (SPID_SendCommand(pAt25->pSpid, pCommand)) {
return AT25_ERROR_SPI;
}
return 0;
}
/**
* \brief Tries to detect a serial firmware flash device given its JEDEC identifier.
* The JEDEC id can be retrieved by sending the correct command to the device.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param jedecId JEDEC identifier of device.
*
* \return the corresponding AT25 descriptor if found; otherwise returns 0.
*/
const At25Desc * AT25_FindDevice(At25 *pAt25, unsigned int jedecId)
{
unsigned int i = 0;
assert(pAt25);
/* Search if device is recognized */
pAt25->pDesc = 0;
while ((i < NUMDATAFLASH) && !(pAt25->pDesc)) {
if ((jedecId & 0xFF00FFFF) == (at25Devices[i].jedecId & 0xFF00FFFF)) {
pAt25->pDesc = &(at25Devices[i]);
}
i++;
}
return pAt25->pDesc;
}

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/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \addtogroup external_component External Component
*
* \addtogroup at25d_module AT25 driver
* \ingroup external_component
* The AT25 serial dataflash driver is based on the corresponding AT25 SPI driver.
* A AT25 instance has to be initialized using the Dataflash levle function
* AT25_Configure(). AT25 Dataflash can be automatically detected using
* the AT25_FindDevice() function. Then AT25 dataflash operations such as
* read, write and erase DF can be launched using AT25_SendCommand function
* with corresponding AT25 command set.
*
* \section Usage
* <ul>
* <li> Reads a serial flash device ID using AT25D_ReadJedecId().</li>
* <li> Reads data from the At25 at the specified address using AT25D_Read().</li>
* <li> Writes data on the At25 at the specified address using AT25D_Write().</li>
* <li> Erases all chip using AT25D_EraseBlock().</li>
* <li> Erases a specified block using AT25D_EraseBlock().</li>
* <li> Poll until the At25 has completed of corresponding operations using
* AT25D_WaitReady().</li>
* <li> Retrieves and returns the At25 current using AT25D_ReadStatus().</li>
* </ul>
*
* Related files :\n
* \ref at25d.c\n
* \ref at25d.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation for the AT25 Serialflash driver.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <board.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Wait for transfer to finish calling the SPI driver ISR. (interrupts are disabled)
*
* \param pAt25 Pointer to an AT25 driver instance.
*/
static void AT25D_Wait(At25 *pAt25)
{
/* Wait for transfer to finish */
while (AT25_IsBusy(pAt25))
SPID_Handler(pAt25->pSpid);
}
/**
* \brief Reads and returns the status register of the serial flash.
*
* \param pAt25 Pointer to an AT25 driver instance.
*/
static unsigned char AT25D_ReadStatus(At25 *pAt25)
{
unsigned char error, status;
assert(pAt25);
/* Issue a status read command */
error = AT25_SendCommand(pAt25, AT25_READ_STATUS, 1, &status, 1, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
return status;
}
/**
* \brief Writes the given value in the status register of the serial flash device.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param status Status to write.
*/
static void AT25D_WriteStatus(At25 *pAt25, unsigned char status)
{
unsigned char error;
assert(pAt25);
/* Issue a write status command */
error = AT25_SendCommand(pAt25, AT25_WRITE_STATUS, 1, &status, 1, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
}
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
/**
* \brief Waits for the serial flash device to become ready to accept new commands.
*
* \param pAt25 Pointer to an AT25 driver instance.
*/
void AT25D_WaitReady(At25 *pAt25)
{
unsigned char ready = 0;
assert(pAt25);
/* Read status register and check busy bit */
while (!ready) {
ready = ((AT25D_ReadStatus(pAt25) & AT25_STATUS_RDYBSY) == AT25_STATUS_RDYBSY_READY);
}
}
/**
* \brief Reads and returns the serial flash device ID.
*
* \param pAt25 Pointer to an AT25 driver instance.
*/
unsigned int AT25D_ReadJedecId(At25 *pAt25)
{
unsigned char error;
unsigned int id = 0;
assert(pAt25);
/* Issue a read ID command */
error = AT25_SendCommand(pAt25, AT25_READ_JEDEC_ID, 1,
(unsigned char *) &id, 3, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
return id;
}
/**
* \brief Enables critical writes operation on a serial flash device, such as sector
* protection, status register, etc.
*
* \para pAt25 Pointer to an AT25 driver instance.
*/
void AT25D_EnableWrite(At25 *pAt25)
{
unsigned char error;
assert(pAt25);
/* Issue a write enable command */
error = AT25_SendCommand(pAt25, AT25_WRITE_ENABLE, 1, 0, 0, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
}
/**
* \brief Disables write operation on a serial flash device.
*
* \para pAt25 Pointer to an AT25 driver instance.
*/
void AT25D_DisableWrite(At25 *pAt25)
{
unsigned char error;
assert(pAt25);
/* Issue a write enable command */
error = AT25_SendCommand(pAt25, AT25_WRITE_DISABLE, 1, 0, 0, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
}
/**
* \brief Unprotects the contents of the serial flash device.
*
* \param pAt25 Pointer to an AT25 driver instance.
*
* \return 0 if the device has been unprotected; otherwise returns
* AT25_ERROR_PROTECTED.
*/
unsigned char AT25D_Unprotect(At25 *pAt25)
{
unsigned char status;
assert(pAt25);
/* Get the status register value to check the current protection */
status = AT25D_ReadStatus(pAt25);
if ((status & AT25_STATUS_SWP) == AT25_STATUS_SWP_PROTNONE) {
/* Protection already disabled */
return 0;
}
/* Check if sector protection registers are locked */
if ((status & AT25_STATUS_SPRL) == AT25_STATUS_SPRL_LOCKED) {
/* Unprotect sector protection registers by writing the status reg. */
AT25D_EnableWrite(pAt25);
AT25D_WriteStatus(pAt25, 0);
}
/* Perform a global unprotect command */
AT25D_EnableWrite(pAt25);
AT25D_WriteStatus(pAt25, 0);
/* Check the new status */
status = AT25D_ReadStatus(pAt25);
if ((status & (AT25_STATUS_SPRL | AT25_STATUS_SWP)) != 0) {
return AT25_ERROR_PROTECTED;
}
else {
return 0;
}
}
/**
* \brief Erases all the content of the memory chip.
*
* \param pAt25 Pointer to an AT25 driver instance.
*
* \return 0 if the device has been unprotected; otherwise returns
* AT25_ERROR_PROTECTED.
*/
unsigned char AT25D_EraseChip(At25 *pAt25)
{
unsigned char status;
unsigned char error;
assert(pAt25);
/* Check that the flash is unprotected */
status = AT25D_ReadStatus(pAt25);
if ((status & AT25_STATUS_SWP) != AT25_STATUS_SWP_PROTNONE) {
return AT25_ERROR_PROTECTED;
}
/* Enable critical write operation */
AT25D_EnableWrite(pAt25);
/* Erase the chip */
error = AT25_SendCommand(pAt25, AT25_CHIP_ERASE_2, 1, 0, 0, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
return 0;
}
/**
*\brief Erases the specified block of the serial firmware dataflash.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param address Address of the block to erase.
*
* \return 0 if successful; otherwise returns AT25_ERROR_PROTECTED if the
* device is protected or AT25_ERROR_BUSY if it is busy executing a command.
*/
unsigned char AT25D_EraseBlock(At25 *pAt25, unsigned int address)
{
unsigned char status;
unsigned char error;
assert(pAt25);
/* Check that the flash is ready and unprotected */
status = AT25D_ReadStatus(pAt25);
if ((status & AT25_STATUS_RDYBSY) != AT25_STATUS_RDYBSY_READY) {
TRACE_ERROR("AT25D_EraseBlock : Flash busy\n\r");
return AT25_ERROR_BUSY;
}
else if ((status & AT25_STATUS_SWP) != AT25_STATUS_SWP_PROTNONE) {
TRACE_ERROR("AT25D_EraseBlock : Flash protected\n\r");
return AT25_ERROR_PROTECTED;
}
/* Enable critical write operation */
AT25D_EnableWrite(pAt25);
/* Start the block erase command */
error = AT25_SendCommand(pAt25, AT25_BlockEraseCmd(pAt25), 4, 0, 0, address, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
return 0;
}
/**
*\brief Erases the specified 64KB block of the serial firmware dataflash.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param address Address of the block to erase.
*
* \return 0 if successful; otherwise returns AT25_ERROR_PROTECTED if the
* device is protected or AT25_ERROR_BUSY if it is busy executing a command.
*/
unsigned char AT25D_Erase64KBlock(At25 *pAt25, unsigned int address)
{
unsigned char status;
unsigned char error;
assert(pAt25);
/* Check that the flash is ready and unprotected */
status = AT25D_ReadStatus(pAt25);
if ((status & AT25_STATUS_RDYBSY) != AT25_STATUS_RDYBSY_READY) {
TRACE_ERROR("AT25D_EraseBlock : Flash busy\n\r");
return AT25_ERROR_BUSY;
}
else if ((status & AT25_STATUS_SWP) != AT25_STATUS_SWP_PROTNONE) {
TRACE_ERROR("AT25D_EraseBlock : Flash protected\n\r");
return AT25_ERROR_PROTECTED;
}
/* Enable critical write operation */
AT25D_EnableWrite(pAt25);
/* Start the block erase command */
error = AT25_SendCommand(pAt25, AT25_BLOCK_ERASE_64K, 4, 0, 0, address, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
return 0;
}
/**
* \brief Writes data at the specified address on the serial firmware dataflash. The
* page(s) to program must have been erased prior to writing. This function
* handles page boundary crossing automatically.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param pData Data buffer.
* \param size Number of bytes in buffer.
* \param address Write address.
*
* \return 0 if successful; otherwise, returns AT25_ERROR_PROGRAM is there has
* been an error during the data programming.
*/
unsigned char AT25D_Write(
At25 *pAt25,
unsigned char *pData,
unsigned int size,
unsigned int address)
{
unsigned int pageSize;
unsigned int writeSize;
unsigned char error;
unsigned char status;
unsigned int i = 0;
assert(pAt25);
assert(pData);
/* Retrieve device page size */
pageSize = AT25_PageSize(pAt25);
/* Program one page after the other */
while (size > 0) {
/* Compute number of bytes to program in page */
writeSize = min(size, pageSize - (address % pageSize));
/* Enable critical write operation */
AT25D_EnableWrite(pAt25);
/* Program page */
if (AT25_ManId(pAt25) == SST_SPI_FLASH) {
error = AT25_SendCommand(pAt25, AT25_SEQUENTIAL_PROGRAM_1, 4,
pData, 2, address, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
for (i = 2; i < pageSize; i += 2) {
error = AT25_SendCommand(pAt25, AT25_SEQUENTIAL_PROGRAM_1, 1,
pData + i, 2, 0, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
}
}
else {
error = AT25_SendCommand(pAt25, AT25_BYTE_PAGE_PROGRAM, 4,
pData, writeSize, address, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
/* Poll the Serial flash status register until the operation is achieved */
AT25D_WaitReady(pAt25);
}
/* Make sure that write was without error */
status = AT25D_ReadStatus(pAt25);
if ((status & AT25_STATUS_EPE) == AT25_STATUS_EPE_ERROR) {
return AT25_ERROR_PROGRAM;
}
pData += writeSize;
size -= writeSize;
address += writeSize;
}
/* Enable critical write operation */
AT25D_DisableWrite(pAt25);
return 0;
}
/**
* \brief Reads data from the specified address on the serial flash.
*
* \param pAt25 Pointer to an AT25 driver instance.
* \param pData Data buffer.
* \param size Number of bytes to read.
* \param address Read address.
*
* \return 0 if successful; otherwise, fail.
*/
unsigned char AT25D_Read(
At25 *pAt25,
unsigned char *pData,
unsigned int size,
unsigned int address)
{
unsigned char error;
/* Start a read operation */
error = AT25_SendCommand(pAt25, AT25_READ_ARRAY_LF, 4, pData, size, address, 0, 0);
assert(!error);
/* Wait for transfer to finish */
AT25D_Wait(pAt25);
return error;
}

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Provides the low-level initialization function that called on chip startup.
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/* Default memory map
Address range Memory region Memory type Shareability Cache policy
0x00000000- 0x1FFFFFFF Code Normal Non-shareable WT
0x20000000- 0x3FFFFFFF SRAM Normal Non-shareable WBWA
0x40000000- 0x5FFFFFFF Peripheral Device Non-shareable -
0x60000000- 0x7FFFFFFF External RAM Normal Non-shareable WBWA
0x80000000- 0x9FFFFFFF WTb
0xA0000000- 0xBFFFFFFF External device Devicea Shareable
0xC0000000- 0xDFFFFFFF Non-shareablea
0xE0000000- 0xE00FFFFF Private Peripheral Bus Strongly ordered Shareablea -
0xE0100000- 0xFFFFFFFF Vendor-specific device Device Non-shareablea -
*/
/**
* \brief Setup a memory region.
*/
void _SetupMemoryRegion( void )
{
return;
#ifdef BELOW_CODE_REMOVED_FOR_REASON_STATED_IN_WARNING_MESSAGE_ABOVE
uint32_t dwRegionBaseAddr;
uint32_t dwRegionAttr;
/* ITCM memory region --- Normal */
/* #define ITCM_START_ADDRESS 0x00000000UL
#define ITCM_END_ADDRESS 0x00400000UL
*/
dwRegionBaseAddr =
ITCM_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_ITCM_REGION;
dwRegionAttr =
MPU_AP_PRIVILEGED_READ_WRITE |
MPU_TEX_WRITE_THROUGH |
MPU_REGION_CACHEABLE |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(ITCM_END_ADDRESS - ITCM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* Internal flash privilege memory region --- Normal */
/* #define IFLASH_START_ADDRESS 0x00400000UL
#define IFLASH_END_ADDRESS 0x00600000UL
*/
dwRegionBaseAddr =
IFLASH_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_IFLASH_REGION; //2
dwRegionAttr =
MPU_AP_FULL_ACCESS |
MPU_REGION_CACHEABLE |
MPU_TEX_WRITE_THROUGH |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(IFLASH_END_ADDRESS - IFLASH_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* DTCM memory region */
dwRegionBaseAddr =
DTCM_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_DTCM_REGION; //3
dwRegionAttr =
MPU_AP_PRIVILEGED_READ_WRITE |
MPU_REGION_CACHEABLE |
MPU_REGION_BUFFERABLE |
MPU_TEX_WRITE_BACK_ALLOCATE |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(DTCM_END_ADDRESS - DTCM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* SRAM memory privilege region */
dwRegionBaseAddr =
SRAM_PRIVILEGE_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_PRAM_REGION; //4
dwRegionAttr =
MPU_AP_FULL_ACCESS |
MPU_REGION_CACHEABLE |
MPU_REGION_BUFFERABLE |
MPU_REGION_SHAREABLE |
MPU_TEX_WRITE_BACK_ALLOCATE|
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(SRAM_PRIVILEGE_END_ADDRESS - SRAM_PRIVILEGE_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* SRAM memory un-privilege region */
dwRegionBaseAddr =
SRAM_UNPRIVILEGE_START_ADDRESS |
MPU_REGION_VALID |
MPU_DEFAULT_UPRAM_REGION; //5
dwRegionAttr =
MPU_AP_PRIVILEGED_READ_WRITE |
MPU_REGION_CACHEABLE |
MPU_REGION_BUFFERABLE |
MPU_TEX_WRITE_BACK_ALLOCATE|
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(SRAM_UNPRIVILEGE_END_ADDRESS - SRAM_UNPRIVILEGE_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* Peripheral memory region ---- Device */
/* #define PERIPHERALS_START_ADDRESS 0x40000000UL
#define PERIPHERALS_END_ADDRESS 0x400E2000UL
*/
dwRegionBaseAddr =
PERIPHERALS_START_ADDRESS |
MPU_REGION_VALID |
MPU_PERIPHERALS_REGION; //6
dwRegionAttr = MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(PERIPHERALS_END_ADDRESS - PERIPHERALS_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* USBHS_ram memory region -External device */
/* #define USBHSRAM_START_ADDRESS 0xA0100000UL
#define USBHSRAM_END_ADDRESS 0xA0200000UL
*/
dwRegionBaseAddr =
USBHSRAM_START_ADDRESS |
MPU_REGION_VALID |
MPU_USBHSRAM_REGION; //7
dwRegionAttr =
MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
MPU_REGION_SHAREABLE |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(USBHSRAM_END_ADDRESS - USBHSRAM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
/* QSPI memory region -External RAM -- normal */
/* #define QSPI_START_ADDRESS 0x80000000UL
#define QSPI_END_ADDRESS 0x9FFFFFFFUL
*/
dwRegionBaseAddr =
QSPI_START_ADDRESS |
MPU_REGION_VALID |
MPU_QSPIMEM_REGION;
dwRegionAttr =
MPU_AP_FULL_ACCESS |
MPU_REGION_EXECUTE_NEVER |
MPU_REGION_CACHEABLE |
MPU_REGION_BUFFERABLE |
MPU_TEX_WRITE_BACK_ALLOCATE|
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(QSPI_END_ADDRESS - QSPI_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
#ifdef SDRAM_VALID
/* SDRAM memory region */
dwRegionBaseAddr =
SDRAM_START_ADDRESS |
MPU_REGION_VALID |
MPU_SDRAM_REGION;
dwRegionAttr =
MPU_REGION_READ_WRITE |
MPU_REGION_CACHEABLE |
MPU_REGION_BUFFERABLE |
MPU_RASR_SRD_Msk |
MPU_CalMPURegionSize(SDRAM_END_ADDRESS - SDRAM_START_ADDRESS) |
MPU_REGION_ENABLE;
MPU_SetRegion( dwRegionBaseAddr, dwRegionAttr);
#endif
/* Enable the memory management fault , Bus Fault, Usage Fault exception */
SCB->SHCSR |= (SCB_SHCSR_MEMFAULTENA_Msk | SCB_SHCSR_BUSFAULTENA_Msk | SCB_SHCSR_USGFAULTENA_Msk);
/* Enable the MPU region */
MPU_Enable( MPU_ENABLE | MPU_BGENABLE );
#endif /* BELOW_CODE_REMOVED_FOR_REASON_STATED_IN_WARNING_MESSAGE_ABOVE */
}
/**
* \brief Performs the low-level initialization of the chip.
* This includes EFC and master clock configuration.
* It also enable a low level on the pin NRST triggers a user reset.
*/
extern WEAK void LowLevelInit( void )
{
/* Set 6 FWS for Embedded Flash Access */
EFC->EEFC_FMR = EEFC_FMR_FWS(6);
if (!(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) ) /* Main Oscillator Selection */
{
SUPC_SelectExtCrystal32K();
PMC_DisableAllClocks();
PMC_SetMckSelection(PMC_MCKR_CSS_SLOW_CLK, PMC_MCKR_PRES_CLK_1);
/* Then, enable Main XTAL oscillator */
PMC_EnableExtOsc();
PMC_SelectExtOsc();
PMC_SetMckSelection(PMC_MCKR_CSS_MAIN_CLK, PMC_MCKR_PRES_CLK_1);
/* wait Main CLK Ready */
while(!(PMC->CKGR_MCFR & CKGR_MCFR_MAINFRDY));
/* Then, cofigure PLLA and switch clock */
PMC_ConfigureMckWithPlla(0x16, 0x1, PMC_MCKR_PRES_CLK_1);
PMC->PMC_MCKR |= 1 << 8;
while( !(PMC->PMC_SR & PMC_SR_MCKRDY) );
}
_SetupMemoryRegion();
}

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of memories configuration on board.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures the EBI for NandFlash access.
*/
extern void BOARD_ConfigureNandFlash( Smc* pSmc )
{
/* Enable peripheral clock */
PMC_EnablePeripheral( ID_SMC ) ;
/* NCS0 is assigned to a NAND Flash (NANDOE and NANWE used for NCS0) */
// MATRIX->MATRIX_SFR[5] = 1;
pSmc->SMC_CS_NUMBER[0].SMC_SETUP =
SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(0)
| SMC_SETUP_NCS_RD_SETUP(1);
pSmc->SMC_CS_NUMBER[0].SMC_PULSE =
SMC_PULSE_NWE_PULSE(2)
| SMC_PULSE_NCS_WR_PULSE(3)
| SMC_PULSE_NRD_PULSE(4)
| SMC_PULSE_NCS_RD_PULSE(4);
pSmc->SMC_CS_NUMBER[0].SMC_CYCLE =
SMC_CYCLE_NWE_CYCLE(4)
| SMC_CYCLE_NRD_CYCLE(7);
pSmc->SMC_CS_NUMBER[0].SMC_MODE =
SMC_MODE_READ_MODE
| SMC_MODE_WRITE_MODE;
}
/**
* \brief Configures the EBI for %NorFlash access.
*/
extern void BOARD_ConfigureNorFlash( Smc* pSmc )
{
/* Enable peripheral clock */
PMC_EnablePeripheral( ID_SMC ) ;
/* Configure SMC, NCS0 is assigned to a norflash */
pSmc->SMC_CS_NUMBER[0].SMC_SETUP =
SMC_SETUP_NWE_SETUP(2)
| SMC_SETUP_NCS_WR_SETUP(0)
| SMC_SETUP_NRD_SETUP(0)
| SMC_SETUP_NCS_RD_SETUP(0);
pSmc->SMC_CS_NUMBER[0].SMC_PULSE =
SMC_PULSE_NWE_PULSE(6)
| SMC_PULSE_NCS_WR_PULSE(0xA)
| SMC_PULSE_NRD_PULSE(0xA)
| SMC_PULSE_NCS_RD_PULSE(0xA);
pSmc->SMC_CS_NUMBER[0].SMC_CYCLE =
SMC_CYCLE_NWE_CYCLE(0xA)
| SMC_CYCLE_NRD_CYCLE(0xA);
pSmc->SMC_CS_NUMBER[0].SMC_MODE =
SMC_MODE_READ_MODE
| SMC_MODE_WRITE_MODE
| SMC_MODE_EXNW_MODE_DISABLED
| SMC_MODE_TDF_CYCLES(0x1);
}
/**
* \brief An accurate one-to-one comparison is necessary between PSRAM and SMC waveforms for
* a complete SMC configuration.
* \note The system is running at 48 MHz for the EBI Bus.
* Please refer to the "AC Characteristics" section of the customer product datasheet.
*/
extern void BOARD_ConfigurePSRAM( Smc* pSmc )
{
uint32_t dwTmp ;
/* Enable peripheral clock */
PMC_EnablePeripheral( ID_SMC ) ;
/* Configure SMC, NCS1 is assigned to a external PSRAM */
/**
* PSRAM IS66WV51216BLL
* 55 ns Access time
* tdoe = 25 ns max
* SMC1 (timing SAM3S read mode SMC) = 21 ns of setup
* 21 + 55 = 76 ns => at least 5 cycles at 64 MHz
* Write pulse width minimum = 45 ns (PSRAM)
*/
pSmc->SMC_CS_NUMBER[1].SMC_SETUP =
SMC_SETUP_NWE_SETUP( 1 )
| SMC_SETUP_NCS_WR_SETUP( 0 )
| SMC_SETUP_NRD_SETUP( 2 )
| SMC_SETUP_NCS_RD_SETUP( 0 ) ;
pSmc->SMC_CS_NUMBER[1].SMC_PULSE =
SMC_PULSE_NWE_PULSE( 3 )
| SMC_PULSE_NCS_WR_PULSE( 4 )
| SMC_PULSE_NRD_PULSE( 3 )
| SMC_PULSE_NCS_RD_PULSE( 5 ) ;
/* NWE_CYCLE: The total duration of the write cycle.
NWE_CYCLE = NWE_SETUP + NWE_PULSE + NWE_HOLD
= NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD
(tWC) Write Cycle Time min. 70ns
NRD_CYCLE: The total duration of the read cycle.
NRD_CYCLE = NRD_SETUP + NRD_PULSE + NRD_HOLD
= NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD
(tRC) Read Cycle Time min. 70ns. */
pSmc->SMC_CS_NUMBER[1].SMC_CYCLE =
SMC_CYCLE_NWE_CYCLE( 4 )
| SMC_CYCLE_NRD_CYCLE( 5 ) ;
dwTmp = SMC->SMC_CS_NUMBER[0].SMC_MODE;
pSmc->SMC_CS_NUMBER[1].SMC_MODE = dwTmp
| SMC_MODE_READ_MODE
| SMC_MODE_WRITE_MODE;
}
uint32_t ExtRAM_Validation(uint32_t baseAddr, uint32_t size)
{
uint32_t i;
uint32_t *ptr = (uint32_t *) baseAddr;
for (i = 0; i < size << 2; ++i) {
if (i & 1) {
ptr[i] = 0x55AA55AA | (1 << i);
}
else {
ptr[i] = 0xAA55AA55 | (1 << i);
}
}
for (i = 0; i < size << 2; ++i) {
if (i & 1) {
if (ptr[i] != (0x55AA55AA | (1 << i))) {
return 0;
}
}
else {
if (ptr[i] != (0xAA55AA55 | (1 << i))) {
return 0;
}
}
}
return 1;
}
#define SDRAM_BA0 (1 << 20)
#define SDRAM_BA1 (1 << 21)
/**
* \brief Configures the EBI for Sdram (IS42S16100E-7B) access.
*/
void BOARD_ConfigureSdram( void )
{
const Pin pinsSdram[] = {BOARD_SDRAM_PINS};
volatile uint32_t i;
volatile uint8_t *pSdram = (uint8_t *) SDRAM_CS_ADDR;
/* Configure PIO */
PIO_Configure(pinsSdram, PIO_LISTSIZE(pinsSdram));
PMC_EnablePeripheral(ID_SDRAMC);
*((uint32_t *)0x40088124) = 0x10;
/* 1. SDRAM features must be set in the configuration register: asynchronous timings (TRC, TRAS, etc.), number
of columns, rows, CAS latency, and the data bus width. */
SDRAMC->SDRAMC_CR =
SDRAMC_CR_NC_COL8 // 8 column bits
| SDRAMC_CR_NR_ROW11 // 12 row bits (4K)
| SDRAMC_CR_CAS_LATENCY3 // CAS Latency 2
| SDRAMC_CR_NB_BANK2 // 2 banks
| SDRAMC_CR_DBW // 16 bit
| SDRAMC_CR_TWR(2)
| SDRAMC_CR_TRC_TRFC(9) // 63ns min
| SDRAMC_CR_TRP(3) // Command period (PRE to ACT) 21 ns min
| SDRAMC_CR_TRCD(3) // Active Command to read/Write Command delay time 21ns min
| SDRAMC_CR_TRAS(6) // Command period (ACT to PRE) 42ns min
| SDRAMC_CR_TXSR(10U); //Exit self-refresh to active time 70ns Min
/* 2. For mobile SDRAM, temperature-compensated self refresh (TCSR), drive strength (DS) and partial array
self refresh (PASR) must be set in the Low Power Register. */
/* 3. The SDRAM memory type must be set in the Memory Device Register.*/
SDRAMC->SDRAMC_MDR = SDRAMC_MDR_MD_SDRAM;
/* 4. A minimum pause of 200 ¦Ìs is provided to precede any signal toggle.*/
for (i = 0; i < 100000; i++);
/* 5. (1)A NOP command is issued to the SDRAM devices. The application must set Mode to 1 in the Mode
Register and perform a write access to any SDRAM address.*/
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NOP;
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 6. An All Banks Precharge command is issued to the SDRAM devices. The application must set Mode to 2 in
the Mode Register and perform a write access to any SDRAM address. */
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_ALLBANKS_PRECHARGE;
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 7. Eight auto-refresh (CBR) cycles are provided. The application must set the Mode to 4 in the Mode Register
and perform a write access to any SDRAM location eight times.*/
for (i = 0 ; i< 8; i++) {
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_AUTO_REFRESH;
*pSdram = 0;
}
for (i = 0; i < 100000; i++);
/*8. A Mode Register set (MRS) cycle is issued to program the parameters of the SDRAM devices, in particular
CAS latency and burst length. The application must set Mode to 3 in the Mode Register and perform a write
access to the SDRAM. The write address must be chosen so that BA[1:0] are set to 0. For example, with a
16-bit 128 MB SDRAM (12 rows, 9 columns, 4 banks) bank address, the SDRAM write access should be
done at the address 0x70000000.*/
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_LOAD_MODEREG;
*pSdram = 0;
for (i = 0; i < 100000; i++);
/*9. For mobile SDRAM initialization, an Extended Mode Register set (EMRS) cycle is issued to program the
SDRAM parameters (TCSR, PASR, DS). The application must set Mode to 5 in the Mode Register and
perform a write access to the SDRAM. The write address must be chosen so that BA[1] or BA[0] are set to 1.
For example, with a 16-bit 128 MB SDRAM, (12 rows, 9 columns, 4 banks) bank address the SDRAM write
access should be done at the address 0x70800000 or 0x70400000. */
//SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_EXT_LOAD_MODEREG;
// *((uint8_t *)(pSdram + SDRAM_BA0)) = 0;
/* 10. The application must go into Normal Mode, setting Mode to 0 in the Mode Register and performing a write
access at any location in the SDRAM. */
SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NORMAL;
*pSdram = 0;
for (i = 0; i < 100000; i++);
/* 11. Write the refresh rate into the count field in the SDRAMC Refresh Timer register. (Refresh rate = delay
between refresh cycles). The SDRAM device requires a refresh every 15.625 ¦Ìs or 7.81 ¦Ìs. With a 100 MHz
frequency, the Refresh Timer Counter Register must be set with the value 1562(15.625 ¦Ìs x 100 MHz) or
781(7.81 ¦Ìs x 100 MHz). */
// For IS42S16100E, 2048 refresh cycle every 32ms, every 15.625 ¦Ìs
SDRAMC->SDRAMC_TR = 2011; //1562;
SDRAMC->SDRAMC_CR1 |= 1<<8;
/* After initialization, the SDRAM devices are fully functional. */
}

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implements UART console.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdio.h>
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** Console baudrate always using 115200. */
#define CONSOLE_BAUDRATE 115200
#ifdef SSC_AUDIO
/** Usart Hw interface used by the console (UART4). */
#warning Please use UART4 pins for debug consol as UART0 pins are used in SSC audio for SAMv7 Xplained ultra board
#define CONSOLE_UART UART4
/** Pins description corresponding to Rxd,Txd, (UART pins) */
#define CONSOLE_PINS {PINS_UART4}
#define CONSOLE_ID ID_UART4
#else
/** Usart Hw interface used by the console (UART0). */
#define CONSOLE_UART UART0
/** Pins description corresponding to Rxd,Txd, (UART pins) */
#define CONSOLE_PINS {PINS_UART0}
#define CONSOLE_ID ID_UART0
#endif
/*----------------------------------------------------------------------------
* Variables
*----------------------------------------------------------------------------*/
/** Is Console Initialized. */
static uint8_t _ucIsConsoleInitialized=0 ;
/**
* \brief Configures an USART peripheral with the specified parameters.
*
* \param baudrate Baudrate at which the USART should operate (in Hz).
* \param masterClock Frequency of the system master clock (in Hz).
*/
extern void DBG_Configure( uint32_t baudrate, uint32_t masterClock)
{
const Pin pPins[] = CONSOLE_PINS ;
Uart *pUart = CONSOLE_UART ;
unsigned int mode;
/* Configure PIO */
PIO_Configure( pPins, PIO_LISTSIZE( pPins ) ) ;
PMC_EnablePeripheral(CONSOLE_ID);
mode = UART_MR_CHMODE_NORMAL | UART_MR_PAR_NO;
// Reset & disable receiver and transmitter, disable interrupts
pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RSTSTA;
pUart->UART_IDR = 0xFFFFFFFF;
pUart->UART_BRGR = (masterClock / baudrate) / 16 ;
// Configure mode register
pUart->UART_MR = (mode );
// Enable receiver and transmitter
pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
_ucIsConsoleInitialized = 1 ;
/* Disable buffering for printf(). */
#if ( defined (__GNUC__) && !defined (__SAMBA__) )
setvbuf(stdout, (char *)NULL, _IONBF, 0);
#endif
}
/**
* \brief Outputs a character on the UART line.
*
* \note This function is synchronous (i.e. uses polling).
* \param c Character to send.
*/
extern void DBG_PutChar( uint8_t c )
{
Uart *pUart=CONSOLE_UART ;
if ( !_ucIsConsoleInitialized )
{
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
}
// Wait for the transmitter to be ready
while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0);
// Send character
pUart->UART_THR = c;
// Wait for the transfer to complete
while ((pUart->UART_SR & UART_SR_TXEMPTY) == 0);
}
/**
* \brief Input a character from the UART line.
*
* \note This function is synchronous
* \return character received.
*/
extern uint32_t DBG_GetChar( void )
{
Uart *pUart= CONSOLE_UART ;
if ( !_ucIsConsoleInitialized )
{
DBG_Configure(CONSOLE_BAUDRATE, BOARD_MCK);
}
while ((pUart->UART_SR & UART_SR_RXRDY) == 0);
return pUart->UART_RHR;
}
/**
* \brief Check if there is Input from UART line.
*
* \return true if there is Input.
*/
extern uint32_t DBG_IsRxReady( void )
{
Uart *pUart=CONSOLE_UART ;
if ( !_ucIsConsoleInitialized )
{
DBG_Configure( CONSOLE_BAUDRATE, BOARD_MCK ) ;
}
return (pUart->UART_SR & UART_SR_RXRDY);
}
/**
* Displays the content of the given frame on the UART0.
*
* \param pucFrame Pointer to the frame to dump.
* \param dwSize Buffer size in bytes.
*/
extern void DBG_DumpFrame( uint8_t* pucFrame, uint32_t dwSize )
{
uint32_t dw ;
for ( dw=0 ; dw < dwSize ; dw++ )
{
printf( "%02X ", pucFrame[dw] ) ;
}
printf( "\n\r" ) ;
}
/**
* Displays the content of the given buffer on the UART0.
*
* \param pucBuffer Pointer to the buffer to dump.
* \param dwSize Buffer size in bytes.
* \param dwAddress Start address to display
*/
extern void DBG_DumpMemory( uint8_t* pucBuffer, uint32_t dwSize, uint32_t dwAddress )
{
uint32_t i ;
uint32_t j ;
uint32_t dwLastLineStart ;
uint8_t* pucTmp ;
for ( i=0 ; i < (dwSize / 16) ; i++ )
{
printf( "0x%08X: ", (unsigned int)(dwAddress + (i*16)) ) ;
pucTmp = (uint8_t*)&pucBuffer[i*16] ;
for ( j=0 ; j < 4 ; j++ )
{
printf( "%02X%02X%02X%02X ", pucTmp[0], pucTmp[1], pucTmp[2], pucTmp[3] ) ;
pucTmp += 4 ;
}
pucTmp=(uint8_t*)&pucBuffer[i*16] ;
for ( j=0 ; j < 16 ; j++ )
{
DBG_PutChar( *pucTmp++ ) ;
}
printf( "\n\r" ) ;
}
if ( (dwSize%16) != 0 )
{
dwLastLineStart=dwSize - (dwSize%16) ;
printf( "0x%08X: ", (unsigned int)(dwAddress + dwLastLineStart) ) ;
for ( j=dwLastLineStart ; j < dwLastLineStart+16 ; j++ )
{
if ( (j!=dwLastLineStart) && (j%4 == 0) )
{
printf( " " ) ;
}
if ( j < dwSize )
{
printf( "%02X", pucBuffer[j] ) ;
}
else
{
printf(" ") ;
}
}
printf( " " ) ;
for ( j=dwLastLineStart ; j < dwSize ; j++ )
{
DBG_PutChar( pucBuffer[j] ) ;
}
printf( "\n\r" ) ;
}
}
/**
* Reads an integer
*
* \param pdwValue Pointer to a integer variable to contain the input value.
*
* \return success(1) or failure(0)
*/
extern uint32_t DBG_GetInteger( int32_t* pdwValue )
{
uint8_t ucKey ;
uint8_t ucNum = 0 ;
int32_t dwValue = 0 ;
int32_t sign = 1 ;
while ( 1 )
{
ucKey=DBG_GetChar() ;
DBG_PutChar( ucKey ) ;
if ( ((ucKey == '-') || (ucKey == '+')) && (ucNum == 0) )
{
if (ucKey == '-')
{
sign = -1;
}
else
{
sign = 1;
}
ucNum++;
}
else
{
if ( ucKey >= '0' && ucKey <= '9' )
{
dwValue = (dwValue * 10) + (ucKey - '0');
ucNum++;
}
else
{
if ( ucKey == 0x0D || ucKey == ' ' )
{
if ( ucNum == 0 )
{
printf( "\n\rWrite a number and press ENTER or SPACE!\n\r" ) ;
return 0 ;
}
else
{
printf( "\n\r" ) ;
*pdwValue = dwValue * sign;
return 1 ;
}
}
else
{
printf( "\n\r'%c' not a number or sign(+/-)!\n\r", ucKey ) ;
return 0 ;
}
}
}
}
}
/**
* Reads an integer and check the value
*
* \param pdwValue Pointer to a integer variable to contain the input value.
* \param dwMin Minimum value
* \param dwMax Maximum value
*
* \return success(1) or failure(0)
*/
extern uint32_t DBG_GetIntegerMinMax( int32_t* pdwValue, int32_t dwMin, int32_t dwMax )
{
int32_t dwValue = 0 ;
if ( DBG_GetInteger( &dwValue ) == 0 )
{
return 0 ;
}
if ( dwValue < dwMin || dwValue > dwMax )
{
printf( "\n\rThe number have to be between %d and %d\n\r", (int)dwMin, (int)dwMax ) ;
return 0 ;
}
printf( "\n\r" ) ;
*pdwValue = dwValue ;
return 1 ;
}
/**
* Reads an hexadecimal number
*
* \param pdwValue Pointer to the uint32_t variable to contain the input value.
*/
extern uint32_t DBG_GetHexa32( uint32_t* pdwValue )
{
uint8_t ucKey ;
uint32_t dw = 0 ;
uint32_t dwValue = 0 ;
for ( dw=0 ; dw < 8 ; dw++ )
{
ucKey = DBG_GetChar() ;
DBG_PutChar( ucKey ) ;
if ( ucKey >= '0' && ucKey <= '9' )
{
dwValue = (dwValue * 16) + (ucKey - '0') ;
}
else
{
if ( ucKey >= 'A' && ucKey <= 'F' )
{
dwValue = (dwValue * 16) + (ucKey - 'A' + 10) ;
}
else
{
if ( ucKey >= 'a' && ucKey <= 'f' )
{
dwValue = (dwValue * 16) + (ucKey - 'a' + 10) ;
}
else
{
printf( "\n\rIt is not a hexa character!\n\r" ) ;
return 0 ;
}
}
}
}
printf("\n\r" ) ;
*pdwValue = dwValue ;
return 1 ;
}
#if defined __ICCARM__ /* IAR Ewarm 5.41+ */
/**
* \brief Outputs a character on the UART.
*
* \param c Character to output.
*
* \return The character that was output.
*/
extern WEAK signed int putchar( signed int c )
{
DBG_PutChar( c ) ;
return c ;
}
extern WEAK int puts(const char *ptr )
{
for ( ; *ptr != 0 ; ptr++ )
{
DBG_PutChar( *ptr ) ;
}
return 0;
}
#endif // defined __ICCARM__

528
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/source/gmacb_phy.c
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2013, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \file */
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "board.h"
/*---------------------------------------------------------------------------
* Definitions
*---------------------------------------------------------------------------*/
/** Default max retry count */
#define GMACB_RETRY_MAX 300000
/** Default max retry count */
#define GACB_RETRY_MAX 1000000
/*---------------------------------------------------------------------------
* Local functions
*---------------------------------------------------------------------------*/
/**
* Wait PHY operation complete.
* Return 1 if the operation completed successfully.
* May be need to re-implemented to reduce CPU load.
* \param retry: the retry times, 0 to wait forever until complete.
*/
static uint8_t GMACB_WaitPhy( Gmac *pHw, uint32_t retry )
{
volatile uint32_t retry_count = 0;
while (!GMAC_IsIdle(pHw))
{
if(retry == 0) continue;
retry_count ++;
if (retry_count >= retry)
{
return 0;
}
}
return 1;
}
/**
* Read PHY register.
* Return 1 if successfully, 0 if timeout.
* \param pHw HW controller address
* \param PhyAddress PHY Address
* \param Address Register Address
* \param pValue Pointer to a 32 bit location to store read data
* \param retry The retry times, 0 to wait forever until complete.
*/
static uint8_t GMACB_ReadPhy(Gmac *pHw,
uint8_t PhyAddress,
uint8_t Address,
uint32_t *pValue,
uint32_t retry)
{
GMAC_PHYMaintain(pHw, PhyAddress, Address, 1, 0);
if ( GMACB_WaitPhy(pHw, retry) == 0 )
{
TRACE_ERROR("TimeOut GMACB_ReadPhy\n\r");
return 0;
}
*pValue = GMAC_PHYData(pHw);
return 1;
}
/**
* Write PHY register
* Return 1 if successfully, 0 if timeout.
* \param pHw HW controller address
* \param PhyAddress PHY Address
* \param Address Register Address
* \param Value Data to write ( Actually 16 bit data )
* \param retry The retry times, 0 to wait forever until complete.
*/
static uint8_t GMACB_WritePhy(Gmac *pHw,
uint8_t PhyAddress,
uint8_t Address,
uint32_t Value,
uint32_t retry)
{
GMAC_PHYMaintain(pHw, PhyAddress, Address, 0, Value);
if ( GMACB_WaitPhy(pHw, retry) == 0 )
{
TRACE_ERROR("TimeOut GMACB_WritePhy\n\r");
return 0;
}
return 1;
}
/*---------------------------------------------------------------------------
* Exported functions
*---------------------------------------------------------------------------*/
/**
* \brief Find a valid PHY Address ( from 0 to 31 ).
* \param pMacb Pointer to the MACB instance
* \return 0xFF when no valid PHY Address found.
*/
static uint8_t GMACB_FindValidPhy(GMacb *pMacb)
{
sGmacd *pDrv = pMacb->pGmacd;
Gmac *pHw = pDrv->pHw;
uint32_t retryMax;
uint32_t value=0;
uint8_t rc;
uint8_t phyAddress;
uint8_t cnt;
TRACE_DEBUG("GMACB_FindValidPhy\n\r");
GMAC_EnableMdio(pHw);
phyAddress = pMacb->phyAddress;
retryMax = pMacb->retryMax;
/* Check current phyAddress */
rc = phyAddress;
if( GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1R, &value, retryMax) == 0 ) {
TRACE_ERROR("GMACB PROBLEM\n\r");
}
TRACE_DEBUG("_PHYID1 : 0x%X, addr: %d\n\r", value, phyAddress);
/* Find another one */
if (value != GMII_OUI_MSB) {
rc = 0xFF;
for(cnt = 0; cnt < 32; cnt ++) {
phyAddress = (phyAddress + 1) & 0x1F;
if( GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1R, &value, retryMax) == 0 ) {
TRACE_ERROR("MACB PROBLEM\n\r");
}
TRACE_DEBUG("_PHYID1 : 0x%X, addr: %d\n\r", value, phyAddress);
if (value == GMII_OUI_MSB) {
rc = phyAddress;
break;
}
}
}
if (rc != 0xFF) {
TRACE_INFO("** Valid PHY Found: %d\n\r", rc);
GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1R, &value, retryMax);
TRACE_DEBUG("_PHYID1R : 0x%X, addr: %d\n\r", value, phyAddress);
GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID2R, &value, retryMax);
TRACE_DEBUG("_EMSR : 0x%X, addr: %d\n\r", value, phyAddress);
}
GMAC_DisableMdio(pHw);
return rc;
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Dump all the useful registers.
* \param pMacb Pointer to the MACB instance
*/
void GMACB_DumpRegisters(GMacb *pMacb)
{
sGmacd *pDrv = pMacb->pGmacd;
Gmac *pHw = pDrv->pHw;
uint8_t phyAddress;
uint32_t retryMax;
uint32_t value;
TRACE_INFO("GMACB_DumpRegisters\n\r");
GMAC_EnableMdio(pHw);
phyAddress = pMacb->phyAddress;
retryMax = pMacb->retryMax;
TRACE_INFO("GMII MACB @ %d) Registers:\n\r", phyAddress);
GMACB_ReadPhy(pHw, phyAddress, GMII_BMCR, &value, retryMax);
TRACE_INFO(" _BMCR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_BMSR, &value, retryMax);
TRACE_INFO(" _BMSR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1R, &value, retryMax);
TRACE_INFO(" _PHYID1 : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID2R, &value, retryMax);
TRACE_INFO(" _PHYID2 : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ANAR, &value, retryMax);
TRACE_INFO(" _ANAR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ANLPAR, &value, retryMax);
TRACE_INFO(" _ANLPAR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ANER, &value, retryMax);
TRACE_INFO(" _ANER : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ANNPR, &value, retryMax);
TRACE_INFO(" _ANNPR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ANLPNPAR, &value, retryMax);
TRACE_INFO(" _ANLPNPAR : 0x%X\n\r", value);
TRACE_INFO(" \n\r");
GMACB_ReadPhy(pHw, phyAddress, GMII_RXERCR, &value, retryMax);
TRACE_INFO(" _RXERCR : 0x%X\n\r", value);
GMACB_ReadPhy(pHw, phyAddress, GMII_ICSR, &value, retryMax);
TRACE_INFO(" _ICSR : 0x%X\n\r", value);
TRACE_INFO(" \n\r");
GMAC_DisableMdio(pHw);
}
/**
* \brief Setup the maximum timeout count of the driver.
* \param pMacb Pointer to the MACB instance
* \param toMax Timeout maxmum count.
*/
void GMACB_SetupTimeout(GMacb *pMacb, uint32_t toMax)
{
pMacb->retryMax = toMax;
}
/**
* \brief Initialize the MACB instance.
* \param pMacb Pointer to the MACB instance
* \param phyAddress The PHY address used to access the PHY
*/
void GMACB_Init(GMacb *pMacb, sGmacd *pGmacd, uint8_t phyAddress)
{
pMacb->pGmacd = pGmacd;
pMacb->phyAddress = phyAddress;
/* Initialize timeout by default */
pMacb->retryMax = GMACB_RETRY_MAX;
}
/**
* \brief Issue a SW reset to reset all registers of the PHY.
* \param pMacb Pointer to the MACB instance
* \return 1 if successfully, 0 if timeout.
*/
uint8_t GMACB_ResetPhy(GMacb *pMacb)
{
sGmacd *pDrv = pMacb->pGmacd;
Gmac *pHw = pDrv->pHw;
uint32_t retryMax;
uint32_t bmcr = GMII_RESET;
uint8_t phyAddress;
uint32_t timeout = 10;
uint8_t ret = 1;
TRACE_INFO(" GMACB_ResetPhy\n\r");
phyAddress = pMacb->phyAddress;
retryMax = pMacb->retryMax;
GMAC_EnableMdio(pHw);
bmcr = GMII_RESET;
GMACB_WritePhy(pHw, phyAddress, GMII_BMCR, bmcr, retryMax);
do {
GMACB_ReadPhy(pHw, phyAddress, GMII_BMCR, &bmcr, retryMax);
timeout--;
} while ((bmcr & GMII_RESET) && timeout);
GMAC_DisableMdio(pHw);
if (!timeout) {
ret = 0;
}
return( ret );
}
/**
* \brief Do a HW initialize to the PHY ( via RSTC ) and setup clocks & PIOs
* This should be called only once to initialize the PHY pre-settings.
* The PHY address is reset status of CRS,RXD[3:0] (the emacPins' pullups).
* The COL pin is used to select MII mode on reset (pulled up for Reduced MII)
* The RXDV pin is used to select test mode on reset (pulled up for test mode)
* The above pins should be predefined for corresponding settings in resetPins
* The GMAC peripheral pins are configured after the reset done.
* \param pMacb Pointer to the MACB instance
* \param mck Main clock setting to initialize clock
* \param resetPins Pointer to list of PIOs to configure before HW RESET
* (for PHY power on reset configuration latch)
* \param nbResetPins Number of PIO items that should be configured
* \param emacPins Pointer to list of PIOs for the EMAC interface
* \param nbEmacPins Number of PIO items that should be configured
* \return 1 if RESET OK, 0 if timeout.
*/
uint8_t GMACB_InitPhy(GMacb *pMacb,
uint32_t mck,
const Pin *pResetPins,
uint32_t nbResetPins,
const Pin *pGmacPins,
uint32_t nbGmacPins)
{
sGmacd *pDrv = pMacb->pGmacd;
Gmac *pHw = pDrv->pHw;
uint8_t rc = 1;
uint8_t phy;
/* Perform RESET */
TRACE_DEBUG("RESET PHY\n\r");
if (pResetPins) {
/* Configure PINS */
PIO_Configure(pResetPins, nbResetPins);
TRACE_INFO(" Hard Reset of GMACD Phy\n\r");
PIO_Clear(pResetPins);
Wait(100);
PIO_Set(pResetPins);
}
/* Configure GMAC runtime pins */
if (rc) {
PIO_Configure(pGmacPins, nbGmacPins);
rc = GMAC_SetMdcClock(pHw, mck );
if (!rc) {
TRACE_ERROR("No Valid MDC clock\n\r");
return 0;
}
/* Check PHY Address */
phy = GMACB_FindValidPhy(pMacb);
if (phy == 0xFF) {
TRACE_ERROR("PHY Access fail\n\r");
return 0;
}
if(phy != pMacb->phyAddress) {
pMacb->phyAddress = phy;
GMACB_ResetPhy(pMacb);
}
}
else {
TRACE_ERROR("PHY Reset Timeout\n\r");
}
return rc;
}
/**
* \brief Issue a Auto Negotiation of the PHY
* \param pMacb Pointer to the MACB instance
* \return 1 if successfully, 0 if timeout.
*/
uint8_t GMACB_AutoNegotiate(GMacb *pMacb)
{
sGmacd *pDrv = pMacb->pGmacd;
Gmac *pHw = pDrv->pHw;
uint32_t retryMax;
uint32_t value;
uint32_t phyAnar;
uint32_t phyAnalpar;
uint32_t retryCount= 0;
uint8_t phyAddress;
uint8_t rc = 1;
uint32_t duplex, speed;
phyAddress = pMacb->phyAddress;
retryMax = pMacb->retryMax;
GMAC_EnableMdio(pHw);
if (!GMACB_ReadPhy(pHw,phyAddress, GMII_PHYID1R, &value, retryMax))
{
TRACE_ERROR("Pb GEMAC_ReadPhy Id1\n\r");
rc = 0;
goto AutoNegotiateExit;
}
TRACE_DEBUG("ReadPhy Id1 0x%X, addresse: %d\n\r", value, phyAddress);
if (!GMACB_ReadPhy(pHw,phyAddress, GMII_PHYID2R, &phyAnar, retryMax))
{
TRACE_ERROR("Pb GMACB_ReadPhy Id2\n\r");
rc = 0;
goto AutoNegotiateExit;
}
TRACE_DEBUG("ReadPhy Id2 0x%X\n\r", phyAnar);
if( ( value == GMII_OUI_MSB )
&& ( ((phyAnar)&(~GMII_LSB_MASK)) == GMII_OUI_LSB ) )
{
TRACE_DEBUG("Vendor Number Model = 0x%X\n\r", ((phyAnar>>4)&0x3F));
TRACE_DEBUG("Model Revision Number = 0x%X\n\r", (phyAnar&0xF));
}
else
{
TRACE_ERROR("Problem OUI value\n\r");
}
/* Set the Auto_negotiation Advertisement Register, MII advertising for Next page
100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
rc = GMACB_ReadPhy(pHw, phyAddress, GMII_ANAR, &phyAnar, retryMax);
if (rc == 0)
{
goto AutoNegotiateExit;
}
phyAnar = GMII_TX_FDX | GMII_TX_HDX |
GMII_10_FDX | GMII_10_HDX | GMII_AN_IEEE_802_3;
rc = GMACB_WritePhy(pHw,phyAddress, GMII_ANAR, phyAnar, retryMax);
if (rc == 0)
{
goto AutoNegotiateExit;
}
/* Read & modify control register */
rc = GMACB_ReadPhy(pHw, phyAddress, GMII_BMCR, &value, retryMax);
if (rc == 0)
{
goto AutoNegotiateExit;
}
/* Check AutoNegotiate complete */
value |= GMII_AUTONEG | GMII_RESTART_AUTONEG;
rc = GMACB_WritePhy(pHw, phyAddress, GMII_BMCR, value, retryMax);
if (rc == 0)
{
goto AutoNegotiateExit;
}
TRACE_DEBUG(" _BMCR: 0x%X\n\r", value);
// Check AutoNegotiate complete
while (1)
{
rc = GMACB_ReadPhy(pHw, phyAddress, GMII_BMSR, &value, retryMax);
if (rc == 0)
{
TRACE_ERROR("rc==0\n\r");
goto AutoNegotiateExit;
}
/* Done successfully */
if (value & GMII_AUTONEG_COMP)
{
printf("AutoNegotiate complete\n\r");
break;
}
/* Timeout check */
if (retryMax)
{
if (++ retryCount >= retryMax)
{
GMACB_DumpRegisters(pMacb);
TRACE_ERROR("TimeOut\n\r");
rc = 0;
goto AutoNegotiateExit;
}
}
}
/*Set local link mode */
while(1)
{
rc = GMACB_ReadPhy(pHw, phyAddress, GMII_ANLPAR, &phyAnalpar, retryMax);
if (rc == 0)
{
goto AutoNegotiateExit;
}
/* Setup the GMAC link speed */
if ((phyAnar & phyAnalpar) & GMII_TX_FDX)
{
/* set RGMII for 1000BaseTX and Full Duplex */
duplex = GMAC_DUPLEX_FULL;
speed = GMAC_SPEED_100M;
break;
}
else if ((phyAnar & phyAnalpar) & GMII_10_FDX)
{
/* set RGMII for 1000BaseT and Half Duplex*/
duplex = GMAC_DUPLEX_FULL;
speed = GMAC_SPEED_10M;
break;
}
else if ((phyAnar & phyAnalpar) & GMII_TX_HDX)
{
/* set RGMII for 100BaseTX and half Duplex */
duplex = GMAC_DUPLEX_HALF;
speed = GMAC_SPEED_100M;
break;
}
else if ((phyAnar & phyAnalpar) & GMII_10_HDX)
{
// set RGMII for 10BaseT and half Duplex
duplex = GMAC_DUPLEX_HALF;
speed = GMAC_SPEED_10M;
break;
}
}
TRACE_INFO("GMAC_EnableRGMII duplex %u, speed %u\n\r",duplex,speed);
GMACB_ReadPhy(pHw,phyAddress, GMII_PC1R, &value, retryMax);
GMACB_ReadPhy(pHw,phyAddress, GMII_PC2R, &value, retryMax);
GMACB_ReadPhy(pHw,phyAddress, GMII_ICSR, &value, retryMax);
/* Setup GMAC mode */
GMAC_EnableRGMII(pHw, duplex, speed);
AutoNegotiateExit:
GMAC_DisableMdio(pHw);
return rc;
}

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/source/hamming.c
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/*----------------------------------------------------------------------------
* Internal function
*----------------------------------------------------------------------------*/
/**
* Counts and return the number of bits set to '1' in the given byte.
* \param byte Byte to count.
*/
static uint8_t CountBitsInByte(uint8_t byte)
{
uint8_t count = 0;
while (byte > 0)
{
if (byte & 1)
{
count++;
}
byte >>= 1;
}
return count;
}
/**
* Counts and return the number of bits set to '1' in the given hamming code.
* \param code Hamming code.
*/
static uint8_t CountBitsInCode256(uint8_t *code)
{
return CountBitsInByte(code[0]) + CountBitsInByte(code[1]) + CountBitsInByte(code[2]);
}
/**
* Calculates the 22-bit hamming code for a 256-bytes block of data.
* \param data Data buffer to calculate code for.
* \param code Pointer to a buffer where the code should be stored.
*/
static void Compute256(const uint8_t *data, uint8_t *code)
{
uint32_t i;
uint8_t columnSum = 0;
uint8_t evenLineCode = 0;
uint8_t oddLineCode = 0;
uint8_t evenColumnCode = 0;
uint8_t oddColumnCode = 0;
// Xor all bytes together to get the column sum;
// At the same time, calculate the even and odd line codes
for (i=0; i < 256; i++)
{
columnSum ^= data[i];
// If the xor sum of the byte is 0, then this byte has no incidence on
// the computed code; so check if the sum is 1.
if ((CountBitsInByte(data[i]) & 1) == 1)
{
// Parity groups are formed by forcing a particular index bit to 0
// (even) or 1 (odd).
// Example on one byte:
//
// bits (dec) 7 6 5 4 3 2 1 0
// (bin) 111 110 101 100 011 010 001 000
// '---'---'---'----------.
// |
// groups P4' ooooooooooooooo eeeeeeeeeeeeeee P4 |
// P2' ooooooo eeeeeee ooooooo eeeeeee P2 |
// P1' ooo eee ooo eee ooo eee ooo eee P1 |
// |
// We can see that: |
// - P4 -> bit 2 of index is 0 --------------------'
// - P4' -> bit 2 of index is 1.
// - P2 -> bit 1 of index if 0.
// - etc...
// We deduce that a bit position has an impact on all even Px if
// the log2(x)nth bit of its index is 0
// ex: log2(4) = 2, bit2 of the index must be 0 (-> 0 1 2 3)
// and on all odd Px' if the log2(x)nth bit of its index is 1
// ex: log2(2) = 1, bit1 of the index must be 1 (-> 0 1 4 5)
//
// As such, we calculate all the possible Px and Px' values at the
// same time in two variables, evenLineCode and oddLineCode, such as
// evenLineCode bits: P128 P64 P32 P16 P8 P4 P2 P1
// oddLineCode bits: P128' P64' P32' P16' P8' P4' P2' P1'
//
evenLineCode ^= (255 - i);
oddLineCode ^= i;
}
}
// At this point, we have the line parities, and the column sum. First, We
// must caculate the parity group values on the column sum.
for (i=0; i < 8; i++)
{
if (columnSum & 1)
{
evenColumnCode ^= (7 - i);
oddColumnCode ^= i;
}
columnSum >>= 1;
}
// Now, we must interleave the parity values, to obtain the following layout:
// Code[0] = Line1
// Code[1] = Line2
// Code[2] = Column
// Line = Px' Px P(x-1)- P(x-1) ...
// Column = P4' P4 P2' P2 P1' P1 PadBit PadBit
code[0] = 0;
code[1] = 0;
code[2] = 0;
for (i=0; i < 4; i++)
{
code[0] <<= 2;
code[1] <<= 2;
code[2] <<= 2;
// Line 1
if ((oddLineCode & 0x80) != 0)
{
code[0] |= 2;
}
if ((evenLineCode & 0x80) != 0)
{
code[0] |= 1;
}
// Line 2
if ((oddLineCode & 0x08) != 0)
{
code[1] |= 2;
}
if ((evenLineCode & 0x08) != 0)
{
code[1] |= 1;
}
// Column
if ((oddColumnCode & 0x04) != 0)
{
code[2] |= 2;
}
if ((evenColumnCode & 0x04) != 0)
{
code[2] |= 1;
}
oddLineCode <<= 1;
evenLineCode <<= 1;
oddColumnCode <<= 1;
evenColumnCode <<= 1;
}
// Invert codes (linux compatibility)
code[0] = (~(uint32_t)code[0]);
code[1] = (~(uint32_t)code[1]);
code[2] = (~(uint32_t)code[2]);
TRACE_DEBUG("Computed code = %02X %02X %02X\n\r",
code[0], code[1], code[2]);
}
/**
* Verifies and corrects a 256-bytes block of data using the given 22-bits
* hamming code.
*
* \param data Data buffer to check.
* \param originalCode Hamming code to use for verifying the data.
*
* \return 0 if there is no error, otherwise returns a HAMMING_ERROR code.
*/
static uint8_t Verify256( uint8_t* pucData, const uint8_t* pucOriginalCode )
{
/* Calculate new code */
uint8_t computedCode[3] ;
uint8_t correctionCode[3] ;
Compute256( pucData, computedCode ) ;
/* Xor both codes together */
correctionCode[0] = computedCode[0] ^ pucOriginalCode[0] ;
correctionCode[1] = computedCode[1] ^ pucOriginalCode[1] ;
correctionCode[2] = computedCode[2] ^ pucOriginalCode[2] ;
TRACE_DEBUG( "Correction code = %02X %02X %02X\n\r", correctionCode[0], correctionCode[1], correctionCode[2] ) ;
// If all bytes are 0, there is no error
if ( (correctionCode[0] == 0) && (correctionCode[1] == 0) && (correctionCode[2] == 0) )
{
return 0 ;
}
/* If there is a single bit error, there are 11 bits set to 1 */
if ( CountBitsInCode256( correctionCode ) == 11 )
{
// Get byte and bit indexes
uint8_t byte ;
uint8_t bit ;
byte = correctionCode[0] & 0x80;
byte |= (correctionCode[0] << 1) & 0x40;
byte |= (correctionCode[0] << 2) & 0x20;
byte |= (correctionCode[0] << 3) & 0x10;
byte |= (correctionCode[1] >> 4) & 0x08;
byte |= (correctionCode[1] >> 3) & 0x04;
byte |= (correctionCode[1] >> 2) & 0x02;
byte |= (correctionCode[1] >> 1) & 0x01;
bit = (correctionCode[2] >> 5) & 0x04;
bit |= (correctionCode[2] >> 4) & 0x02;
bit |= (correctionCode[2] >> 3) & 0x01;
/* Correct bit */
TRACE_DEBUG("Correcting byte #%d at bit %d\n\r", byte, bit ) ;
pucData[byte] ^= (1 << bit) ;
return Hamming_ERROR_SINGLEBIT ;
}
/* Check if ECC has been corrupted */
if ( CountBitsInCode256( correctionCode ) == 1 )
{
return Hamming_ERROR_ECC ;
}
/* Otherwise, this is a multi-bit error */
else
{
return Hamming_ERROR_MULTIPLEBITS ;
}
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* Computes 3-bytes hamming codes for a data block whose size is multiple of
* 256 bytes. Each 256 bytes block gets its own code.
* \param data Data to compute code for.
* \param size Data size in bytes.
* \param code Codes buffer.
*/
void Hamming_Compute256x( const uint8_t *pucData, uint32_t dwSize, uint8_t* puCode )
{
TRACE_DEBUG("Hamming_Compute256x()\n\r");
while ( dwSize > 0 )
{
Compute256( pucData, puCode ) ;
pucData += 256;
puCode += 3;
dwSize -= 256;
}
}
/**
* Verifies 3-bytes hamming codes for a data block whose size is multiple of
* 256 bytes. Each 256-bytes block is verified with its own code.
*
* \return 0 if the data is correct, Hamming_ERROR_SINGLEBIT if one or more
* block(s) have had a single bit corrected, or either Hamming_ERROR_ECC
* or Hamming_ERROR_MULTIPLEBITS.
*
* \param data Data buffer to verify.
* \param size Size of the data in bytes.
* \param code Original codes.
*/
uint8_t Hamming_Verify256x( uint8_t* pucData, uint32_t dwSize, const uint8_t* pucCode )
{
uint8_t error ;
uint8_t result = 0 ;
TRACE_DEBUG( "Hamming_Verify256x()\n\r" ) ;
while ( dwSize > 0 )
{
error = Verify256( pucData, pucCode ) ;
if ( error == Hamming_ERROR_SINGLEBIT )
{
result = Hamming_ERROR_SINGLEBIT ;
}
else
{
if ( error )
{
return error ;
}
}
pucData += 256;
pucCode += 3;
dwSize -= 256;
}
return result ;
}

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FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/source/ili9488.c
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2014, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of ILI9488 driver.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <string.h>
#include <stdio.h>
#ifdef BOARD_LCD_ILI9488
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
#define ILI9488 SPI0
#define ILI9488_ID ID_SPI0
/** Pio pins to configure. */
static const Pin ILI9488_Reset[] = LCD_PIN_RESET;
static const Pin ILI9488_Pwm[] = BOARD_LCD_BACKLIGHT_PIN;
/** Pins to configure for the application. */
static const Pin spi_pins[] = BOARD_LCD_PINS;
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
static void ILI9488_InitInterface(void)
{
PIO_Configure(ILI9488_Reset, PIO_LISTSIZE(ILI9488_Reset));
PIO_Configure(spi_pins, PIO_LISTSIZE(spi_pins));
PIO_Configure(ILI9488_Pwm, PIO_LISTSIZE(ILI9488_Pwm));
/* Enable PWM peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
/* Set clock A and clock B */
// set for 14.11 KHz for CABC control
// mode = PWM_CLK_PREB(0x0A) | (PWM_CLK_DIVB(110)) |
// PWM_CLK_PREA(0x0A) | (PWM_CLK_DIVA(110));
PWMC_ConfigureClocks(PWM0, 14200, 0, BOARD_MCK);
/* Configure PWM channel 1 for LED0 */
PWMC_DisableChannel(PWM0, CHANNEL_PWM_LCD);
PWMC_ConfigureChannel(PWM0, CHANNEL_PWM_LCD, PWM_CMR_CPRE_CLKA,0,PWM_CMR_CPOL);
PWMC_SetPeriod(PWM0, CHANNEL_PWM_LCD, 16);
PWMC_SetDutyCycle(PWM0, CHANNEL_PWM_LCD, 8);
PWMC_EnableChannel(PWM0, CHANNEL_PWM_LCD);
SPI_Configure(ILI9488, ILI9488_ID, (SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS( ILI9488_cs )));
SPI_ConfigureNPCS( ILI9488, ILI9488_cs,
SPI_CSR_CPOL | SPI_CSR_BITS_9_BIT |
SPI_DLYBS(100, BOARD_MCK) | SPI_DLYBCT(100, BOARD_MCK) |
SPI_SCBR( 35000000, BOARD_MCK) ) ;
SPI_Enable(ILI9488);
}
/**
* \brief Send Command to ILI9488.
*
* \param reg Command Register address.
*
*/
static void ILI9488_SendCmd( uint8_t reg )
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_CMD(reg));
}
/**
* \brief Write Parameter to ILI9488 Register.
*
* \param data Data to be written.
*/
static void ILI9488_WriteReg( uint8_t data )
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data));
}
/**
* \brief Write 16 bit Parameter to ILI9488 Register.
*
* \param data Data to be written.
*/
static void ILI9488_WriteReg16( uint16_t data )
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(((data & 0xFF00) >> 0x08)));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM((data & 0xFF)));
}
/**
* \brief Write 24 bit Parameter to ILI9488 Register.
*
* \param data Data to be written.
*/
static void ILI9488_WriteReg24( uint32_t data )
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(((data & 0xFF0000) >> 0x10)));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(((data & 0xFF00) >> 0x08)));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM((data & 0xFF)));
}
/**
* \brief Write 32 bit Parameter to ILI9488 Register.
*
* \param data Data to be written.
*/
static void ILI9488_WriteReg32( uint32_t data )
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM((data >> 0x18) & 0xFF));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(((data >> 0x10) & 0x00FF)));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(((data >> 0x08) & 0x0000FF)));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM((data & 0x000000FF)));
}
/**
* \brief Read data from ILI9488 Register.
*
* \param reg Register address.
*
* \return Readed data.
*/
static uint8_t ILI9488_ReadReg( uint8_t reg)
{
uint8_t value;
SPI_Write(ILI9488, ILI9488_cs, ILI9488_CMD(reg));
while(SPI_IsFinished(ILI9488) !=1);
SPI_Read(ILI9488);
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(0xFF));
while(SPI_IsFinished(ILI9488) !=1);
value = (uint8_t)SPI_Read(ILI9488);
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(0);
return value;
}
/**
* \brief Read data from ILI9488 Register.
*
* \param reg Register address.
*
* \return Readed data.
*/
static uint16_t ILI9488_ReadReg16( uint8_t reg)
{
uint16_t value;
uint8_t SPI_CNT = 0x81;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value = (ILI9488_ReadReg(reg) << 0x08);
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= ILI9488_ReadReg(reg);
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(0);
return value;
}
/**
* \brief Read data from ILI9488 Register.
*
* \param reg Register address.
*
* \return Readed data.
*/
static uint32_t ILI9488_ReadReg24( uint8_t reg)
{
uint32_t value=0;
uint8_t SPI_CNT = 0x81;
//Set ILI9488 count to 0
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
// Send Command
value = (ILI9488_ReadReg(reg) << 0x10);
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= (ILI9488_ReadReg(reg) << 0x08);
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= ILI9488_ReadReg(reg);
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(0);
return value;
}
/**
* \brief Read data from ILI9488 Register.
*
* \param reg Register address.
*
* \return Readed data.
*/
static uint32_t ILI9488_ReadReg32( uint8_t reg)
{
uint32_t value;
uint8_t SPI_CNT = 0x81;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value = ILI9488_ReadReg(reg) ;
value <<= 24;
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= (ILI9488_ReadReg(reg) << 16);
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= (ILI9488_ReadReg(reg) << 8);
SPI_CNT++;
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(SPI_CNT);
value |= ILI9488_ReadReg(reg);
ILI9488_SendCmd(ILI9488_CMD_SPI_READ_SETTINGS);
ILI9488_WriteReg(0);
return value;
}
static void ILI9488_NOP(void)
{
ILI9488_SendCmd(ILI9488_CMD_NOP);
}
/**
* \brief Write data to ILI9488 Register.
*
* \param reg Register address.
* \param data Data to be written.
*/
void ILI9488_WriteSingle( LcdColor_t data )
{
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
ILI9488_WriteReg24(data);
}
/**
* \brief Prpare to write data to ILI9488 Register.
*
*/
void ILI9488_WriteRAM_Prepare(void)
{
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
}
/**
* \brief Prpare to write data to ILI9488 Register.
*
*/
void ILI9488_ReadRAM_Prepare(void)
{
ILI9488_SendCmd(ILI9488_CMD_MEMORY_READ);
}
/**
* \brief Write data to ILI9488 Register.
*
* \param reg Register address.
* \param data Data to be written.
*/
void ILI9488_WriteRAM( LcdColor_t data )
{
ILI9488_WriteReg24(data);
}
/**
* \brief Write data to ILI9488 Register.
*
* \param reg Register address.
* \param data Data to be written.
*/
void ILI9488_WriteRAMBuffer( const LcdColor_t *pBuf, uint32_t size)
{
uint32_t addr ;
for ( addr = 0 ; addr < size ; addr++ )
{
ILI9488_WriteRAM(pBuf[addr]);
}
}
void ILI9488_SetCursor(uint16_t x, uint16_t y)
{
/* Set Horizontal Address Start Position */
ILI9488_SendCmd(ILI9488_CMD_COLUMN_ADDRESS_SET);
ILI9488_WriteReg16(x);
ILI9488_WriteReg16(x+1);
ILI9488_NOP();
/* Set Horizontal Address End Position */
ILI9488_SendCmd(ILI9488_CMD_PAGE_ADDRESS_SET);
ILI9488_WriteReg16(y);
ILI9488_WriteReg16(y+1);
ILI9488_NOP();
}
/**
* \brief Initialize the ILI9488 controller.
*/
extern uint32_t ILI9488_Initialize( void )
{
uint32_t chipid;
ILI9488_InitInterface();
ILI9488_SendCmd(ILI9488_CMD_SOFTWARE_RESET);
Wait(200);
ILI9488_SendCmd(ILI9488_CMD_SLEEP_OUT);
Wait(200);
// make it tRGB and reverse the column order
ILI9488_SendCmd(ILI9488_CMD_MEMORY_ACCESS_CONTROL);
ILI9488_WriteReg(0x48);
Wait(100);
ILI9488_SendCmd(ILI9488_CMD_CABC_CONTROL_9); // set PWm to 14.11 KHz
ILI9488_WriteReg(0x04);
// ILI9488_SendCmd(ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET); // set 16bit/pixel
// ILI9488_WriteReg(0x05);
/* Check ILI9488 chipid */
chipid = ILI9488_ReadReg24(ILI9488_CMD_READ_ID4); /* Driver Code Read */
if ( chipid != ILI9488_DEVICE_CODE )
{
printf( "Read ILI9488 chip ID (0x%04x) error, skip initialization.\r\n", chipid ) ;
assert(0);
return 1 ;
}
ILI9488_SendCmd(ILI9488_CMD_NORMAL_DISP_MODE_ON);
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_ON);
return 0 ;
}
/**
* \brief Turn on the ILI9488.
*/
extern void ILI9488_On( void )
{
ILI9488_SendCmd(ILI9488_CMD_PIXEL_OFF);
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_ON);
ILI9488_SendCmd(ILI9488_CMD_NORMAL_DISP_MODE_ON);
}
/**
* \brief Turn off the ILI9488.
*/
extern void ILI9488_Off( void )
{
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_OFF);
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_OFF);
}
/**
* \brief Power down the ILI9488.
*/
extern void ILI9488_PowerDown( void )
{
}
/**
* \brief Set a partial display window
*
* Initialize a partial window on ILI9488
* \param Start Starting address of window.
* \param End End address of window.
* \return 0 for successfull operation.
*/
extern void ILI9488_SetPartialWindow( uint16_t Start, uint16_t End)
{
ILI9488_SendCmd(ILI9488_CMD_POWER_CONTROL_PARTIAL_5);
ILI9488_WriteReg(0x44 ) ;
ILI9488_SendCmd(ILI9488_CMD_PARTIAL_AREA);
ILI9488_WriteReg16(Start ) ;
ILI9488_WriteReg16(End) ;
ILI9488_SendCmd(ILI9488_CMD_PARTIAL_MODE_ON);
Wait(10);
}
extern void ILI9488_SetWindow( uint16_t dwX, uint16_t dwY, uint16_t dwWidth, uint16_t dwHeight )
{
uint16_t ColStart, ColEnd, RowStart, RowEnd;
ColStart = dwX ;
ColEnd = dwWidth;
RowStart = dwY ;
RowEnd = dwHeight;
if ( ( ColEnd > (ILI9488_LCD_WIDTH)) || ( RowEnd > (ILI9488_LCD_HEIGHT)))
{
printf("\n\rWindow too large\n\r");
assert(1);
}
if ( ( ColEnd < ColStart) || ( RowEnd < RowStart) )
{
printf("\n\rWindow's hight or width is not large enough\n\r");
assert(1);
}
/* Set Horizontal Address Start Position */
ILI9488_SendCmd(ILI9488_CMD_COLUMN_ADDRESS_SET);
ILI9488_WriteReg16(ColStart);
ILI9488_WriteReg16(ColEnd);
ILI9488_NOP();
/* Set Horizontal Address End Position */
ILI9488_SendCmd(ILI9488_CMD_PAGE_ADDRESS_SET);
ILI9488_WriteReg16(RowStart);
ILI9488_WriteReg16(RowEnd);
ILI9488_NOP();
}
extern void ILI9488_SetDisplayLandscape( uint8_t dwRGB, uint8_t LandscaprMode )
{
uint8_t Value;
if(LandscaprMode)
{
if(dwRGB)
{
Value = 0xA8;
}
else
{
Value = 0xA0;
}
}
else
{
if(dwRGB)
{
Value = 0xE8;
}
else
{
Value = 0xE0;
}
}
// make it tRGB and reverse the column order
ILI9488_SendCmd(ILI9488_CMD_MEMORY_ACCESS_CONTROL);
ILI9488_WriteReg(Value);
Wait(50);
ILI9488_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
}
extern void ILI9488_SetDisplayPortrait( uint8_t dwRGB )
{
uint8_t Value;
if(dwRGB)
{
Value = 0x48;
}
else
{
Value = 0x40;
}
// make it tRGB and reverse the column order
ILI9488_SendCmd(ILI9488_CMD_MEMORY_ACCESS_CONTROL);
ILI9488_WriteReg(Value);
Wait(50);
ILI9488_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT) ;
}
extern void ILI9488_SetVerticalScrollWindow( uint16_t dwStartAdd, uint16_t dwHeight )
{
ILI9488_SendCmd(ILI9488_CMD_VERT_SCROLL_DEFINITION);
ILI9488_WriteReg16(dwStartAdd-1);
ILI9488_WriteReg16(dwStartAdd);
ILI9488_WriteReg16((dwStartAdd + dwHeight + 1));
}
extern void ILI9488_VerticalScroll( uint16_t wY )
{
ILI9488_SendCmd(ILI9488_CMD_VERT_SCROLL_START_ADDRESS);
ILI9488_WriteReg16(wY);
}
extern void ILI9488_ExitScrollMode(void )
{
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_OFF);
ILI9488_SendCmd(ILI9488_CMD_NORMAL_DISP_MODE_ON);
ILI9488_SendCmd(ILI9488_CMD_DISPLAY_ON);
}
extern void ILI9488_TestPattern(void)
{
uint32_t i, data;
ILI9488_SetWindow( 0, 0, 319, 479 ) ;
data = COLOR_WHITE;
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
for(i = 0; i< (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++)
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 16));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 8));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data & 0xFF));
}
ILI9488_SetWindow( 50, 50, 300, 300 ) ;
data = COLOR_BLUE;
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
for(i = 0; i< (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++)
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 16));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 8));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data & 0xFF));
}
ILI9488_SetWindow( 150, 150, 300, 300 ) ;
data = COLOR_GREEN;
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
for(i = 0; i< (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++)
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 16));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 8));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data & 0xFF));
}
ILI9488_SetWindow(200, 200, 300, 300 ) ;
data = COLOR_RED;
ILI9488_SendCmd(ILI9488_CMD_MEMORY_WRITE);
for(i = 0; i< (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++)
{
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 16));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data >> 8));
SPI_Write(ILI9488, ILI9488_cs, ILI9488_PARAM(data & 0xFF));
}
}
#endif

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of draw function on LCD, Include draw text, image
* and basic shapes (line, rectangle, circle).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
#include <string.h>
#include <assert.h>
static LcdColor_t gLcdPixelCache[LCD_DATA_CACHE_SIZE];
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Convert 24 bit RGB color into 5-6-5 rgb color space.
*
* Initialize the LcdColor_t cache with the color pattern.
* \param x 24-bits RGB color.
* \return 0 for successfull operation.
*/
static uint32_t LCD_SetColor( uint32_t dwRgb24Bits )
{
uint32_t i ;
/* Fill the cache with selected color */
for ( i = 0 ; i < LCD_DATA_CACHE_SIZE ; ++i )
{
gLcdPixelCache[i] = dwRgb24Bits ;
}
return 0;
}
/**
* \brief Check Box coordinates. Return upper left and bottom right coordinates.
*
* \param pX1 X-coordinate of upper-left corner on LCD.
* \param pY1 Y-coordinate of upper-left corner on LCD.
* \param pX2 X-coordinate of lower-right corner on LCD.
* \param pY2 Y-coordinate of lower-right corner on LCD.
*/
static void CheckBoxCoordinates( uint32_t *pX1, uint32_t *pY1, uint32_t *pX2, uint32_t *pY2 )
{
uint32_t dw;
if ( *pX1 >= BOARD_LCD_WIDTH )
{
*pX1 = BOARD_LCD_WIDTH-1 ;
}
if ( *pX2 >= BOARD_LCD_WIDTH )
{
*pX2 = BOARD_LCD_WIDTH-1 ;
}
if ( *pY1 >= BOARD_LCD_HEIGHT )
{
*pY1 = BOARD_LCD_HEIGHT-1 ;
}
if ( *pY2 >= BOARD_LCD_HEIGHT )
{
*pY2 = BOARD_LCD_HEIGHT-1 ;
}
if (*pX1 > *pX2)
{
dw = *pX1;
*pX1 = *pX2;
*pX2 = dw;
}
if (*pY1 > *pY2)
{
dw = *pY1;
*pY1 = *pY2;
*pY2 = dw;
}
}
/**
* \brief Fills the given LCD buffer with a particular color.
*
* \param color Fill color.
*/
void LCDD_Fill( uint32_t dwColor )
{
uint32_t dw ;
// LCD_SetCursor( 0, 0 ) ;
ILI9488_WriteRAM_Prepare() ;
for ( dw = BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT; dw > 0; dw-- )
{
ILI9488_WriteRAM( dwColor ) ;
}
}
/**
* \brief Draw a pixel on LCD of given color.
*
* \param x X-coordinate of pixel.
* \param y Y-coordinate of pixel.
* \param color Pixel color.
*/
extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t color )
{
ILI9488_SetCursor( x, y ) ;
ILI9488_WriteRAM_Prepare() ;
ILI9488_WriteRAM( color ) ;
}
/**
* \brief Read a pixel from LCD.
*
* \param x X-coordinate of pixel.
* \param y Y-coordinate of pixel.
*
* \return color Readed pixel color.
*/
extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y )
{
uint32_t color;
ILI9488_SetCursor(x, y);
ILI9488_ReadRAM_Prepare();
color = ILI9488_ReadRAM();
return color;
}
/*
* \brief Draw a line on LCD, horizontal and vertical line are supported.
*
* \param x X-coordinate of line start.
* \param y Y-coordinate of line start.
* \param length line length.
* \param direction line direction: 0 - horizontal, 1 - vertical.
* \param color Pixel color.
*/
extern void LCDD_DrawLine( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 , uint32_t color )
{
if (( dwY1 == dwY2 ) || (dwX1 == dwX2))
{
LCDD_DrawRectangleWithFill( dwX1, dwY1, dwX2, dwY2, color );
}
else
{
LCDD_DrawLineBresenham( dwX1, dwY1, dwX2, dwY2 , color) ;
}
}
/*
* \brief Draw a line on LCD, which is not horizontal or vertical.
*
* \param x X-coordinate of line start.
* \param y Y-coordinate of line start.
* \param length line length.
* \param direction line direction: 0 - horizontal, 1 - vertical.
* \param color LcdColor_t color.
*/
extern uint32_t LCDD_DrawLineBresenham( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 , uint32_t color)
{
int dx, dy ;
int i ;
int xinc, yinc, cumul ;
int x, y ;
x = dwX1 ;
y = dwY1 ;
dx = dwX2 - dwX1 ;
dy = dwY2 - dwY1 ;
xinc = ( dx > 0 ) ? 1 : -1 ;
yinc = ( dy > 0 ) ? 1 : -1 ;
dx = ( dx > 0 ) ? dx : -dx ;
dy = ( dy > 0 ) ? dy : -dy ;
LCDD_DrawPixel(x , y , color);
if ( dx > dy )
{
cumul = dx / 2 ;
for ( i = 1 ; i <= dx ; i++ )
{
x += xinc ;
cumul += dy ;
if ( cumul >= dx )
{
cumul -= dx ;
y += yinc ;
}
LCDD_DrawPixel(x , y , color);
}
}
else
{
cumul = dy / 2 ;
for ( i = 1 ; i <= dy ; i++ )
{
y += yinc ;
cumul += dx ;
if ( cumul >= dy )
{
cumul -= dy ;
x += xinc ;
}
LCDD_DrawPixel(x , y , color);
}
}
return 0 ;
}
/*
* \brief Draws a rectangle on LCD, at the given coordinates.
*
* \param x X-coordinate of upper-left rectangle corner.
* \param y Y-coordinate of upper-left rectangle corner.
* \param width Rectangle width in pixels.
* \param height Rectangle height in pixels.
* \param color Rectangle color.
*/
extern void LCDD_DrawRectangle( uint32_t x, uint32_t y, uint32_t width, uint32_t height, uint32_t color )
{
LCDD_DrawRectangleWithFill(x, y, width, y, color);
LCDD_DrawRectangleWithFill(x, height, width, height, color);
LCDD_DrawRectangleWithFill(x, y, x, height, color);
LCDD_DrawRectangleWithFill(width, y, width, height, color);
}
/*
* \brief Draws a rectangle with fill inside on LCD, at the given coordinates.
*
* \param x X-coordinate of upper-left rectangle corner.
* \param y Y-coordinate of upper-left rectangle corner.
* \param width Rectangle width in pixels.
* \param height Rectangle height in pixels.
* \param color Rectangle color.
*/
extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor )
{
uint32_t size, blocks;
CheckBoxCoordinates(&dwX, &dwY, &dwWidth, &dwHeight);
LCD_SetColor(dwColor);
ILI9488_SetWindow( dwX, dwY, dwWidth, dwHeight ) ;
size = (dwWidth - dwX + 1) * (dwHeight - dwY + 1);
/* Send pixels blocks => one LCD IT / block */
blocks = size / LCD_DATA_CACHE_SIZE;
ILI9488_WriteRAM_Prepare() ;
while (blocks--)
{
ILI9488_WriteRAMBuffer(gLcdPixelCache, LCD_DATA_CACHE_SIZE);
}
/* Send remaining pixels */
ILI9488_WriteRAMBuffer(gLcdPixelCache, size % LCD_DATA_CACHE_SIZE);
ILI9488_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
// LCD_SetCursor( 0, 0 ) ;
}
/**
* \brief Draws a circle on LCD, at the given coordinates.
*
* \param x X-coordinate of circle center.
* \param y Y-coordinate of circle center.
* \param r circle radius.
* \param color circle color.
*/
extern uint32_t LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color )
{
signed int d; /* Decision Variable */
uint32_t curX; /* Current X Value */
uint32_t curY; /* Current Y Value */
d = 3 - (r << 1);
curX = 0;
curY = r;
while (curX <= curY)
{
LCDD_DrawPixel(x + curX, y + curY, color);
LCDD_DrawPixel(x + curX, y - curY, color);
LCDD_DrawPixel(x - curX, y + curY, color);
LCDD_DrawPixel(x - curX, y - curY, color);
LCDD_DrawPixel(x + curY, y + curX, color);
LCDD_DrawPixel(x + curY, y - curX, color);
LCDD_DrawPixel(x - curY, y + curX, color);
LCDD_DrawPixel(x - curY, y - curX, color);
if (d < 0) {
d += (curX << 2) + 6;
}
else {
d += ((curX - curY) << 2) + 10;
curY--;
}
curX++;
}
return 0;
}
extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius, uint32_t color)
{
signed int d ; /* Decision Variable */
uint32_t dwCurX ; /* Current X Value */
uint32_t dwCurY ; /* Current Y Value */
uint32_t dwXmin, dwYmin;
if (dwRadius == 0)
{
return 0;
}
d = 3 - (dwRadius << 1) ;
dwCurX = 0 ;
dwCurY = dwRadius ;
while ( dwCurX <= dwCurY )
{
dwXmin = (dwCurX > dwX) ? 0 : dwX-dwCurX;
dwYmin = (dwCurY > dwY) ? 0 : dwY-dwCurY;
LCDD_DrawRectangleWithFill( dwXmin, dwYmin, dwX+dwCurX, dwYmin ,color) ;
LCDD_DrawRectangleWithFill( dwXmin, dwY+dwCurY, dwX+dwCurX, dwY+dwCurY, color ) ;
dwXmin = (dwCurY > dwX) ? 0 : dwX-dwCurY;
dwYmin = (dwCurX > dwY) ? 0 : dwY-dwCurX;
LCDD_DrawRectangleWithFill( dwXmin, dwYmin, dwX+dwCurY, dwYmin, color ) ;
LCDD_DrawRectangleWithFill( dwXmin, dwY+dwCurX, dwX+dwCurY, dwY+dwCurX, color ) ;
if ( d < 0 )
{
d += (dwCurX << 2) + 6 ;
}
else
{
d += ((dwCurX - dwCurY) << 2) + 10;
dwCurY-- ;
}
dwCurX++ ;
}
return 0 ;
}
/**
* \brief Draws a string inside a LCD buffer, at the given coordinates. Line breaks
* will be honored.
*
* \param x X-coordinate of string top-left corner.
* \param y Y-coordinate of string top-left corner.
* \param pString String to display.
* \param color String color.
*/
extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color )
{
uint32_t xorg = x ;
while ( *pString != 0 )
{
if ( *pString == '\n' )
{
y += gFont.height + 2 ;
x = xorg ;
}
else
{
LCDD_DrawChar( x, y, *pString, color ) ;
x += gFont.width + 2 ;
}
pString++ ;
}
}
/**
* \brief Draws a string inside a LCD buffer, at the given coordinates
* with given background color. Line breaks will be honored.
*
* \param x X-coordinate of string top-left corner.
* \param y Y-coordinate of string top-left corner.
* \param pString String to display.
* \param fontColor String color.
* \param bgColor Background color.
*/
extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor )
{
unsigned xorg = x;
while ( *pString != 0 )
{
if ( *pString == '\n' )
{
y += gFont.height + 2 ;
x = xorg ;
}
else
{
LCDD_DrawCharWithBGColor( x, y, *pString, fontColor, bgColor ) ;
x += gFont.width + 2;
}
pString++;
}
}
/**
* \brief Returns the width & height in pixels that a string will occupy on the screen
* if drawn using LCDD_DrawString.
*
* \param pString String.
* \param pWidth Pointer for storing the string width (optional).
* \param pHeight Pointer for storing the string height (optional).
*
* \return String width in pixels.
*/
extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight )
{
uint32_t width = 0;
uint32_t height = gFont.height;
while ( *pString != 0 )
{
if ( *pString == '\n' )
{
height += gFont.height + 2 ;
}
else
{
width += gFont.width + 2 ;
}
pString++ ;
}
if ( width > 0 )
{
width -= 2;
}
if ( pWidth != NULL )
{
*pWidth = width;
}
if ( pHeight != NULL )
{
*pHeight = height ;
}
}
/*
* \brief Draw a raw image at given position on LCD.
*
* \param x X-coordinate of image start.
* \param y Y-coordinate of image start.
* \param pImage Image buffer.
* \param width Image width.
* \param height Image height.
*/
extern void LCDD_DrawImage( uint32_t dwX, uint32_t dwY, const LcdColor_t *pImage, uint32_t dwWidth, uint32_t dwHeight )
{
uint32_t size;
/* Determine the refresh window area */
/* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */
CheckBoxCoordinates(&dwX, &dwY, &dwWidth, &dwHeight);
ILI9488_SetWindow(dwX, dwY, dwWidth, dwHeight);
/* Prepare to write in GRAM */
ILI9488_WriteRAM_Prepare();
size = (dwWidth - dwX + 1) * (dwHeight - dwY + 1);
ILI9488_WriteRAMBuffer(pImage, size);
ILI9488_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
}
/*
* \brief Draw a raw image at given position on LCD.
*
* \param dwX X-coordinate of image start.
* \param dwY Y-coordinate of image start.
* \param pGIMPImage Image data.
*/
void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage )
{
uint32_t dw ;
register uint32_t dwLength ;
uint8_t* pucData ;
LcdColor_t *pData;
// Draw raw RGB bitmap
// CheckBoxCoordinates(&dwX, &dwY, &dwWidth, &dwHeight);
ILI9488_SetWindow( dwX, dwY, pGIMPImage->dwWidth, pGIMPImage->dwHeight ) ;
// LCD_SetCursor( dwX, dwY ) ;
ILI9488_WriteRAM_Prepare() ;
dwLength = pGIMPImage->dwWidth*pGIMPImage->dwHeight ;
pucData = pGIMPImage->pucPixel_data ;
for ( dw=0; dw < dwLength; dw++ )
{
*pData = ((*pucData++)<<16) ;
*pData |= ((*pucData++)<<8) ;
*pData |= (*pucData++) ;
ILI9488_WriteRAM(*pData);
}
ILI9488_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
}
/*
* \brief Clear a window with an color.
*
* \param dwX X-coordinate of the window.
* \param dwY Y-coordinate of the window.
* \param dwWidth window width.
* \param dwHeight window height.
* \param dwColor background color
*/
extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor )
{
uint32_t dw ;
ILI9488_SetWindow( dwX, dwY, dwWidth, dwHeight ) ;
ILI9488_WriteRAM_Prepare() ;
for ( dw = dwWidth * dwHeight; dw > 0; dw-- )
{
ILI9488_WriteRAM( dwColor ) ;
}
}

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of draw font on LCD.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
#include <stdint.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
/** Global variable describing the font being instancied. */
const Font gFont = {10, 14};
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Draws an ASCII character on LCD.
*
* \param x X-coordinate of character upper-left corner.
* \param y Y-coordinate of character upper-left corner.
* \param c Character to output.
* \param color Character color.
*/
extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color )
{
uint32_t row, col ;
assert( (c >= 0x20) && (c <= 0x7F) ) ;
for ( col = 0 ; col < 10 ; col++ )
{
for ( row = 0 ; row < 8 ; row++ )
{
if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 )
{
LCDD_DrawPixel( x+col, y+row, color ) ;
}
}
for (row = 0; row < 6; row++ )
{
if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1)
{
LCDD_DrawPixel( x+col, y+row+8, color ) ;
}
}
}
}
/**
* \brief Draws a string inside a LCD buffer, at the given coordinates.
* Line breaks will be honored.
*
* \param dwX X-coordinate of string top-left corner.
* \param dwY Y-coordinate of string top-left corner.
* \param pString String to display.
*/
extern void LCD_DrawString( uint32_t dwX, uint32_t dwY, const uint8_t *pString, uint32_t color )
{
uint32_t dwXorg = dwX ;
while ( *pString != 0 )
{
if ( *pString == '\n' )
{
dwY += gFont.height + 2 ;
dwX = dwXorg ;
}
else
{
LCDD_DrawChar( dwX, dwY, *pString, color ) ;
dwX += gFont.width + 2 ;
}
pString++ ;
}
}
/**
* \brief Draws an ASCII character on LCD with given background color.
*
* \param x X-coordinate of character upper-left corner.
* \param y Y-coordinate of character upper-left corner.
* \param c Character to output.
* \param fontColor Character color.
* \param bgColor Background color.
*/
extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor )
{
uint32_t row, col ;
assert( (c >= 0x20) && (c <= 0x7F) ) ;
for (col = 0; col < 10; col++)
{
for (row = 0 ; row < 8 ; row++)
{
if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 )
{
LCDD_DrawPixel( x+col, y+row, fontColor ) ;
}
else
{
LCDD_DrawPixel( x+col, y+row, bgColor ) ;
}
}
for ( row = 0 ; row < 6 ; row++ )
{
if ( (pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1 )
{
LCDD_DrawPixel( x+col, y+row+8, fontColor ) ;
}
else
{
LCDD_DrawPixel( x+col, y+row+8, bgColor ) ;
}
}
}
}

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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Font 10x14 table definition.
*
*/
#include "board.h"
/** Char set of font 10x14 */
const uint8_t pCharset10x14[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
} ;
const unsigned char FONT6x8[97][8] = {
{0x06,0x08,0x08,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x20,0x20,0x20,0x20,0x20,0x00,0x20,0x00}, // !
{0x50,0x50,0x50,0x00,0x00,0x00,0x00,0x00}, // "
{0x50,0x50,0xF8,0x50,0xF8,0x50,0x50,0x00}, // #
{0x20,0x78,0xA0,0x70,0x28,0xF0,0x20,0x00}, // $
{0xC0,0xC8,0x10,0x20,0x40,0x98,0x18,0x00}, // %
{0x40,0xA0,0xA0,0x40,0xA8,0x90,0x68,0x00}, // &
{0x30,0x30,0x20,0x40,0x00,0x00,0x00,0x00}, // '
{0x10,0x20,0x40,0x40,0x40,0x20,0x10,0x00}, // (
{0x40,0x20,0x10,0x10,0x10,0x20,0x40,0x00}, // )
{0x00,0x20,0xA8,0x70,0x70,0xA8,0x20,0x00}, // *
{0x00,0x20,0x20,0xF8,0x20,0x20,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x30,0x30,0x20,0x40}, // ,
{0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00}, // .
{0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00}, // / (forward slash)
{0x70,0x88,0x88,0xA8,0x88,0x88,0x70,0x00}, // 0 0x30
{0x20,0x60,0x20,0x20,0x20,0x20,0x70,0x00}, // 1
{0x70,0x88,0x08,0x70,0x80,0x80,0xF8,0x00}, // 2
{0xF8,0x08,0x10,0x30,0x08,0x88,0x70,0x00}, // 3
{0x10,0x30,0x50,0x90,0xF8,0x10,0x10,0x00}, // 4
{0xF8,0x80,0xF0,0x08,0x08,0x88,0x70,0x00}, // 5
{0x38,0x40,0x80,0xF0,0x88,0x88,0x70,0x00}, // 6
{0xF8,0x08,0x08,0x10,0x20,0x40,0x80,0x00}, // 7
{0x70,0x88,0x88,0x70,0x88,0x88,0x70,0x00}, // 8
{0x70,0x88,0x88,0x78,0x08,0x10,0xE0,0x00}, // 9
{0x00,0x00,0x20,0x00,0x20,0x00,0x00,0x00}, // :
{0x00,0x00,0x20,0x00,0x20,0x20,0x40,0x00}, // ;
{0x08,0x10,0x20,0x40,0x20,0x10,0x08,0x00}, // <
{0x00,0x00,0xF8,0x00,0xF8,0x00,0x00,0x00}, // =
{0x40,0x20,0x10,0x08,0x10,0x20,0x40,0x00}, // >
{0x70,0x88,0x08,0x30,0x20,0x00,0x20,0x00}, // ?
{0x70,0x88,0xA8,0xB8,0xB0,0x80,0x78,0x00}, // @ 0x40
{0x20,0x50,0x88,0x88,0xF8,0x88,0x88,0x00}, // A
{0xF0,0x88,0x88,0xF0,0x88,0x88,0xF0,0x00}, // B
{0x70,0x88,0x80,0x80,0x80,0x88,0x70,0x00}, // C
{0xF0,0x88,0x88,0x88,0x88,0x88,0xF0,0x00}, // D
{0xF8,0x80,0x80,0xF0,0x80,0x80,0xF8,0x00}, // E
{0xF8,0x80,0x80,0xF0,0x80,0x80,0x80,0x00}, // F
{0x78,0x88,0x80,0x80,0x98,0x88,0x78,0x00}, // G
{0x88,0x88,0x88,0xF8,0x88,0x88,0x88,0x00}, // H
{0x70,0x20,0x20,0x20,0x20,0x20,0x70,0x00}, // I
{0x38,0x10,0x10,0x10,0x10,0x90,0x60,0x00}, // J
{0x88,0x90,0xA0,0xC0,0xA0,0x90,0x88,0x00}, // K
{0x80,0x80,0x80,0x80,0x80,0x80,0xF8,0x00}, // L
{0x88,0xD8,0xA8,0xA8,0xA8,0x88,0x88,0x00}, // M
{0x88,0x88,0xC8,0xA8,0x98,0x88,0x88,0x00}, // N
{0x70,0x88,0x88,0x88,0x88,0x88,0x70,0x00}, // O
{0xF0,0x88,0x88,0xF0,0x80,0x80,0x80,0x00}, // P 0x50
{0x70,0x88,0x88,0x88,0xA8,0x90,0x68,0x00}, // Q
{0xF0,0x88,0x88,0xF0,0xA0,0x90,0x88,0x00}, // R
{0x70,0x88,0x80,0x70,0x08,0x88,0x70,0x00}, // S
{0xF8,0xA8,0x20,0x20,0x20,0x20,0x20,0x00}, // T
{0x88,0x88,0x88,0x88,0x88,0x88,0x70,0x00}, // U
{0x88,0x88,0x88,0x88,0x88,0x50,0x20,0x00}, // V
{0x88,0x88,0x88,0xA8,0xA8,0xA8,0x50,0x00}, // W
{0x88,0x88,0x50,0x20,0x50,0x88,0x88,0x00}, // X
{0x88,0x88,0x50,0x20,0x20,0x20,0x20,0x00}, // Y
{0xF8,0x08,0x10,0x70,0x40,0x80,0xF8,0x00}, // Z
{0x78,0x40,0x40,0x40,0x40,0x40,0x78,0x00}, // [
{0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00}, // \ (back slash)
{0x78,0x08,0x08,0x08,0x08,0x08,0x78,0x00}, // ]
{0x20,0x50,0x88,0x00,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x00}, // _
{0x60,0x60,0x20,0x10,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x60,0x10,0x70,0x90,0x78,0x00}, // a
{0x80,0x80,0xB0,0xC8,0x88,0xC8,0xB0,0x00}, // b
{0x00,0x00,0x70,0x88,0x80,0x88,0x70,0x00}, // c
{0x08,0x08,0x68,0x98,0x88,0x98,0x68,0x00}, // d
{0x00,0x00,0x70,0x88,0xF8,0x80,0x70,0x00}, // e
{0x10,0x28,0x20,0x70,0x20,0x20,0x20,0x00}, // f
{0x00,0x00,0x70,0x98,0x98,0x68,0x08,0x70}, // g
{0x80,0x80,0xB0,0xC8,0x88,0x88,0x88,0x00}, // h
{0x20,0x00,0x60,0x20,0x20,0x20,0x70,0x00}, // i
{0x10,0x00,0x10,0x10,0x10,0x90,0x60,0x00}, // j
{0x80,0x80,0x90,0xA0,0xC0,0xA0,0x90,0x00}, // k
{0x60,0x20,0x20,0x20,0x20,0x20,0x70,0x00}, // l
{0x00,0x00,0xD0,0xA8,0xA8,0xA8,0xA8,0x00}, // m
{0x00,0x00,0xB0,0xC8,0x88,0x88,0x88,0x00}, // n
{0x00,0x00,0x70,0x88,0x88,0x88,0x70,0x00}, // o
{0x00,0x00,0xB0,0xC8,0xC8,0xB0,0x80,0x80}, // p 0x70
{0x00,0x00,0x68,0x98,0x98,0x68,0x08,0x08}, // q
{0x00,0x00,0xB0,0xC8,0x80,0x80,0x80,0x00}, // r
{0x00,0x00,0x78,0x80,0x70,0x08,0xF0,0x00}, // s
{0x20,0x20,0xF8,0x20,0x20,0x28,0x10,0x00}, // t
{0x00,0x00,0x88,0x88,0x88,0x98,0x68,0x00}, // u
{0x00,0x00,0x88,0x88,0x88,0x50,0x20,0x00}, // v
{0x00,0x00,0x88,0x88,0xA8,0xA8,0x50,0x00}, // w
{0x00,0x00,0x88,0x50,0x20,0x50,0x88,0x00}, // x
{0x00,0x00,0x88,0x88,0x78,0x08,0x88,0x70}, // y
{0x00,0x00,0xF8,0x10,0x20,0x40,0xF8,0x00}, // z
{0x10,0x20,0x20,0x40,0x20,0x20,0x10,0x00}, // {
{0x20,0x20,0x20,0x00,0x20,0x20,0x20,0x00}, // |
{0x40,0x20,0x20,0x10,0x20,0x20,0x40,0x00}, // }
{0x40,0xA8,0x10,0x00,0x00,0x00,0x00,0x00}, // ~
{0x70,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00} // DEL
};
const unsigned char FONT8x8[97][8] = {
{0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x30,0x78,0x78,0x30,0x30,0x00,0x30,0x00}, // !
{0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00}, // "
{0x6C,0x6C,0xFE,0x6C,0xFE,0x6C,0x6C,0x00}, // #
{0x18,0x3E,0x60,0x3C,0x06,0x7C,0x18,0x00}, // $
{0x00,0x63,0x66,0x0C,0x18,0x33,0x63,0x00}, // %
{0x1C,0x36,0x1C,0x3B,0x6E,0x66,0x3B,0x00}, // &
{0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00}, // '
{0x0C,0x18,0x30,0x30,0x30,0x18,0x0C,0x00}, // (
{0x30,0x18,0x0C,0x0C,0x0C,0x18,0x30,0x00}, // )
{0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00}, // *
{0x00,0x30,0x30,0xFC,0x30,0x30,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x30}, // ,
{0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00}, // .
{0x03,0x06,0x0C,0x18,0x30,0x60,0x40,0x00}, // / (forward slash)
{0x3E,0x63,0x63,0x6B,0x63,0x63,0x3E,0x00}, // 0 0x30
{0x18,0x38,0x58,0x18,0x18,0x18,0x7E,0x00}, // 1
{0x3C,0x66,0x06,0x1C,0x30,0x66,0x7E,0x00}, // 2
{0x3C,0x66,0x06,0x1C,0x06,0x66,0x3C,0x00}, // 3
{0x0E,0x1E,0x36,0x66,0x7F,0x06,0x0F,0x00}, // 4
{0x7E,0x60,0x7C,0x06,0x06,0x66,0x3C,0x00}, // 5
{0x1C,0x30,0x60,0x7C,0x66,0x66,0x3C,0x00}, // 6
{0x7E,0x66,0x06,0x0C,0x18,0x18,0x18,0x00}, // 7
{0x3C,0x66,0x66,0x3C,0x66,0x66,0x3C,0x00}, // 8
{0x3C,0x66,0x66,0x3E,0x06,0x0C,0x38,0x00}, // 9
{0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x00}, // :
{0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x30}, // ;
{0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00}, // <
{0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00}, // =
{0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00}, // >
{0x3C,0x66,0x06,0x0C,0x18,0x00,0x18,0x00}, // ?
{0x3E,0x63,0x6F,0x69,0x6F,0x60,0x3E,0x00}, // @ 0x40
{0x18,0x3C,0x66,0x66,0x7E,0x66,0x66,0x00}, // A
{0x7E,0x33,0x33,0x3E,0x33,0x33,0x7E,0x00}, // B
{0x1E,0x33,0x60,0x60,0x60,0x33,0x1E,0x00}, // C
{0x7C,0x36,0x33,0x33,0x33,0x36,0x7C,0x00}, // D
{0x7F,0x31,0x34,0x3C,0x34,0x31,0x7F,0x00}, // E
{0x7F,0x31,0x34,0x3C,0x34,0x30,0x78,0x00}, // F
{0x1E,0x33,0x60,0x60,0x67,0x33,0x1F,0x00}, // G
{0x66,0x66,0x66,0x7E,0x66,0x66,0x66,0x00}, // H
{0x3C,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // I
{0x0F,0x06,0x06,0x06,0x66,0x66,0x3C,0x00}, // J
{0x73,0x33,0x36,0x3C,0x36,0x33,0x73,0x00}, // K
{0x78,0x30,0x30,0x30,0x31,0x33,0x7F,0x00}, // L
{0x63,0x77,0x7F,0x7F,0x6B,0x63,0x63,0x00}, // M
{0x63,0x73,0x7B,0x6F,0x67,0x63,0x63,0x00}, // N
{0x3E,0x63,0x63,0x63,0x63,0x63,0x3E,0x00}, // O
{0x7E,0x33,0x33,0x3E,0x30,0x30,0x78,0x00}, // P 0x50
{0x3C,0x66,0x66,0x66,0x6E,0x3C,0x0E,0x00}, // Q
{0x7E,0x33,0x33,0x3E,0x36,0x33,0x73,0x00}, // R
{0x3C,0x66,0x30,0x18,0x0C,0x66,0x3C,0x00}, // S
{0x7E,0x5A,0x18,0x18,0x18,0x18,0x3C,0x00}, // T
{0x66,0x66,0x66,0x66,0x66,0x66,0x7E,0x00}, // U
{0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00}, // V
{0x63,0x63,0x63,0x6B,0x7F,0x77,0x63,0x00}, // W
{0x63,0x63,0x36,0x1C,0x1C,0x36,0x63,0x00}, // X
{0x66,0x66,0x66,0x3C,0x18,0x18,0x3C,0x00}, // Y
{0x7F,0x63,0x46,0x0C,0x19,0x33,0x7F,0x00}, // Z
{0x3C,0x30,0x30,0x30,0x30,0x30,0x3C,0x00}, // [
{0x60,0x30,0x18,0x0C,0x06,0x03,0x01,0x00}, // \ (back slash)
{0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00}, // ]
{0x08,0x1C,0x36,0x63,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF}, // _
{0x18,0x18,0x0C,0x00,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x3C,0x06,0x3E,0x66,0x3B,0x00}, // a
{0x70,0x30,0x3E,0x33,0x33,0x33,0x6E,0x00}, // b
{0x00,0x00,0x3C,0x66,0x60,0x66,0x3C,0x00}, // c
{0x0E,0x06,0x3E,0x66,0x66,0x66,0x3B,0x00}, // d
{0x00,0x00,0x3C,0x66,0x7E,0x60,0x3C,0x00}, // e
{0x1C,0x36,0x30,0x78,0x30,0x30,0x78,0x00}, // f
{0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x7C}, // g
{0x70,0x30,0x36,0x3B,0x33,0x33,0x73,0x00}, // h
{0x18,0x00,0x38,0x18,0x18,0x18,0x3C,0x00}, // i
{0x06,0x00,0x06,0x06,0x06,0x66,0x66,0x3C}, // j
{0x70,0x30,0x33,0x36,0x3C,0x36,0x73,0x00}, // k
{0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // l
{0x00,0x00,0x66,0x7F,0x7F,0x6B,0x63,0x00}, // m
{0x00,0x00,0x7C,0x66,0x66,0x66,0x66,0x00}, // n
{0x00,0x00,0x3C,0x66,0x66,0x66,0x3C,0x00}, // o
{0x00,0x00,0x6E,0x33,0x33,0x3E,0x30,0x78}, // p 0x70
{0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x0F}, // q
{0x00,0x00,0x6E,0x3B,0x33,0x30,0x78,0x00}, // r
{0x00,0x00,0x3E,0x60,0x3C,0x06,0x7C,0x00}, // s
{0x08,0x18,0x3E,0x18,0x18,0x1A,0x0C,0x00}, // t
{0x00,0x00,0x66,0x66,0x66,0x66,0x3B,0x00}, // u
{0x00,0x00,0x66,0x66,0x66,0x3C,0x18,0x00}, // v
{0x00,0x00,0x63,0x6B,0x7F,0x7F,0x36,0x00}, // w
{0x00,0x00,0x63,0x36,0x1C,0x36,0x63,0x00}, // x
{0x00,0x00,0x66,0x66,0x66,0x3E,0x06,0x7C}, // y
{0x00,0x00,0x7E,0x4C,0x18,0x32,0x7E,0x00}, // z
{0x0E,0x18,0x18,0x70,0x18,0x18,0x0E,0x00}, // {
{0x0C,0x0C,0x0C,0x00,0x0C,0x0C,0x0C,0x00}, // |
{0x70,0x18,0x18,0x0E,0x18,0x18,0x70,0x00}, // }
{0x3B,0x6E,0x00,0x00,0x00,0x00,0x00,0x00}, // ~
{0x1C,0x36,0x36,0x1C,0x00,0x00,0x00,0x00}// DEL
};
const unsigned char FONT8x16[97][16] = {
{0x08,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // !
{0x00,0x63,0x63,0x63,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // "
{0x00,0x00,0x00,0x36,0x36,0x7F,0x36,0x36,0x36,0x7F,0x36,0x36,0x00,0x00,0x00,0x00}, // #
{0x0C,0x0C,0x3E,0x63,0x61,0x60,0x3E,0x03,0x03,0x43,0x63,0x3E,0x0C,0x0C,0x00,0x00}, // $
{0x00,0x00,0x00,0x00,0x00,0x61,0x63,0x06,0x0C,0x18,0x33,0x63,0x00,0x00,0x00,0x00}, // %
{0x00,0x00,0x00,0x1C,0x36,0x36,0x1C,0x3B,0x6E,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // &
{0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // '
{0x00,0x00,0x0C,0x18,0x18,0x30,0x30,0x30,0x30,0x18,0x18,0x0C,0x00,0x00,0x00,0x00}, // (
{0x00,0x00,0x18,0x0C,0x0C,0x06,0x06,0x06,0x06,0x0C,0x0C,0x18,0x00,0x00,0x00,0x00}, // )
{0x00,0x00,0x00,0x00,0x42,0x66,0x3C,0xFF,0x3C,0x66,0x42,0x00,0x00,0x00,0x00,0x00}, // *
{0x00,0x00,0x00,0x00,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x00,0x00,0x00,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00}, // ,
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // .
{0x00,0x00,0x01,0x03,0x07,0x0E,0x1C,0x38,0x70,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00}, // / (forward slash)
{0x00,0x00,0x3E,0x63,0x63,0x63,0x6B,0x6B,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 0 0x30
{0x00,0x00,0x0C,0x1C,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3F,0x00,0x00,0x00,0x00}, // 1
{0x00,0x00,0x3E,0x63,0x03,0x06,0x0C,0x18,0x30,0x61,0x63,0x7F,0x00,0x00,0x00,0x00}, // 2
{0x00,0x00,0x3E,0x63,0x03,0x03,0x1E,0x03,0x03,0x03,0x63,0x3E,0x00,0x00,0x00,0x00}, // 3
{0x00,0x00,0x06,0x0E,0x1E,0x36,0x66,0x66,0x7F,0x06,0x06,0x0F,0x00,0x00,0x00,0x00}, // 4
{0x00,0x00,0x7F,0x60,0x60,0x60,0x7E,0x03,0x03,0x63,0x73,0x3E,0x00,0x00,0x00,0x00}, // 5
{0x00,0x00,0x1C,0x30,0x60,0x60,0x7E,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 6
{0x00,0x00,0x7F,0x63,0x03,0x06,0x06,0x0C,0x0C,0x18,0x18,0x18,0x00,0x00,0x00,0x00}, // 7
{0x00,0x00,0x3E,0x63,0x63,0x63,0x3E,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 8
{0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x3F,0x03,0x03,0x06,0x3C,0x00,0x00,0x00,0x00}, // 9
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // :
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00}, // ;
{0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00}, // <
{0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00}, // =
{0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00}, // >
{0x00,0x00,0x3E,0x63,0x63,0x06,0x0C,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x00,0x00,0x00}, // ?
{0x00,0x00,0x3E,0x63,0x63,0x6F,0x6B,0x6B,0x6E,0x60,0x60,0x3E,0x00,0x00,0x00,0x00}, // @ 0x40
{0x00,0x00,0x08,0x1C,0x36,0x63,0x63,0x63,0x7F,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // A
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x33,0x33,0x33,0x33,0x7E,0x00,0x00,0x00,0x00}, // B
{0x00,0x00,0x1E,0x33,0x61,0x60,0x60,0x60,0x60,0x61,0x33,0x1E,0x00,0x00,0x00,0x00}, // C
{0x00,0x00,0x7C,0x36,0x33,0x33,0x33,0x33,0x33,0x33,0x36,0x7C,0x00,0x00,0x00,0x00}, // D
{0x00,0x00,0x7F,0x33,0x31,0x34,0x3C,0x34,0x30,0x31,0x33,0x7F,0x00,0x00,0x00,0x00}, // E
{0x00,0x00,0x7F,0x33,0x31,0x34,0x3C,0x34,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // F
{0x00,0x00,0x1E,0x33,0x61,0x60,0x60,0x6F,0x63,0x63,0x37,0x1D,0x00,0x00,0x00,0x00}, // G
{0x00,0x00,0x63,0x63,0x63,0x63,0x7F,0x63,0x63,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // H
{0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // I
{0x00,0x00,0x0F,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,0x00,0x00,0x00}, // J
{0x00,0x00,0x73,0x33,0x36,0x36,0x3C,0x36,0x36,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // K
{0x00,0x00,0x78,0x30,0x30,0x30,0x30,0x30,0x30,0x31,0x33,0x7F,0x00,0x00,0x00,0x00}, // L
{0x00,0x00,0x63,0x77,0x7F,0x6B,0x63,0x63,0x63,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // M
{0x00,0x00,0x63,0x63,0x73,0x7B,0x7F,0x6F,0x67,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // N
{0x00,0x00,0x1C,0x36,0x63,0x63,0x63,0x63,0x63,0x63,0x36,0x1C,0x00,0x00,0x00,0x00}, // O
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // P 0x50
{0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x63,0x63,0x6B,0x6F,0x3E,0x06,0x07,0x00,0x00}, // Q
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x36,0x36,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // R
{0x00,0x00,0x3E,0x63,0x63,0x30,0x1C,0x06,0x03,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // S
{0x00,0x00,0xFF,0xDB,0x99,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // T
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // U
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x36,0x1C,0x08,0x00,0x00,0x00,0x00}, // V
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x6B,0x6B,0x7F,0x36,0x36,0x00,0x00,0x00,0x00}, // W
{0x00,0x00,0xC3,0xC3,0x66,0x3C,0x18,0x18,0x3C,0x66,0xC3,0xC3,0x00,0x00,0x00,0x00}, // X
{0x00,0x00,0xC3,0xC3,0xC3,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // Y
{0x00,0x00,0x7F,0x63,0x43,0x06,0x0C,0x18,0x30,0x61,0x63,0x7F,0x00,0x00,0x00,0x00}, // Z
{0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00}, // [
{0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x07,0x03,0x01,0x00,0x00,0x00,0x00}, // \ (back slash)
{0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00}, // ]
{0x08,0x1C,0x36,0x63,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00}, // _
{0x18,0x18,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x00,0x00,0x00,0x3C,0x46,0x06,0x3E,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // a
{0x00,0x00,0x70,0x30,0x30,0x3C,0x36,0x33,0x33,0x33,0x33,0x6E,0x00,0x00,0x00,0x00}, // b
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x60,0x60,0x60,0x63,0x3E,0x00,0x00,0x00,0x00}, // c
{0x00,0x00,0x0E,0x06,0x06,0x1E,0x36,0x66,0x66,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // d
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x63,0x7E,0x60,0x63,0x3E,0x00,0x00,0x00,0x00}, // e
{0x00,0x00,0x1C,0x36,0x32,0x30,0x7C,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // f
{0x00,0x00,0x00,0x00,0x00,0x3B,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00,0x00}, // g
{0x00,0x00,0x70,0x30,0x30,0x36,0x3B,0x33,0x33,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // h
{0x00,0x00,0x0C,0x0C,0x00,0x1C,0x0C,0x0C,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}, // i
{0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,0x00}, // j
{0x00,0x00,0x70,0x30,0x30,0x33,0x33,0x36,0x3C,0x36,0x33,0x73,0x00,0x00,0x00,0x00}, // k
{0x00,0x00,0x1C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}, // l
{0x00,0x00,0x00,0x00,0x00,0x6E,0x7F,0x6B,0x6B,0x6B,0x6B,0x6B,0x00,0x00,0x00,0x00}, // m
{0x00,0x00,0x00,0x00,0x00,0x6E,0x33,0x33,0x33,0x33,0x33,0x33,0x00,0x00,0x00,0x00}, // n
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // o
{0x00,0x00,0x00,0x00,0x00,0x6E,0x33,0x33,0x33,0x33,0x3E,0x30,0x30,0x78,0x00,0x00}, // p 0x70
{0x00,0x00,0x00,0x00,0x00,0x3B,0x66,0x66,0x66,0x66,0x3E,0x06,0x06,0x0F,0x00,0x00}, // q
{0x00,0x00,0x00,0x00,0x00,0x6E,0x3B,0x33,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // r
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x38,0x0E,0x03,0x63,0x3E,0x00,0x00,0x00,0x00}, // s
{0x00,0x00,0x08,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x1B,0x0E,0x00,0x00,0x00,0x00}, // t
{0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // u
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x36,0x36,0x1C,0x1C,0x08,0x00,0x00,0x00,0x00}, // v
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x63,0x6B,0x6B,0x7F,0x36,0x00,0x00,0x00,0x00}, // w
{0x00,0x00,0x00,0x00,0x00,0x63,0x36,0x1C,0x1C,0x1C,0x36,0x63,0x00,0x00,0x00,0x00}, // x
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x3F,0x03,0x06,0x3C,0x00,0x00}, // y
{0x00,0x00,0x00,0x00,0x00,0x7F,0x66,0x0C,0x18,0x30,0x63,0x7F,0x00,0x00,0x00,0x00}, // z
{0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00}, // {
{0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00}, // |
{0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00}, // }
{0x00,0x00,0x3B,0x6E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ~
{0x00,0x70,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
}; // DEL

532
FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/source/lcd_fontsize.c
Unescape Escape View File

@ -0,0 +1,532 @@
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Font 10x14 table definition.
*
*/
#include "board.h"
/** Char set of font 10x14 */
const uint8_t pCharset10x14[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
} ;
const unsigned char FONT6x8[97][8] = {
{0x06,0x08,0x08,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x20,0x20,0x20,0x20,0x20,0x00,0x20,0x00}, // !
{0x50,0x50,0x50,0x00,0x00,0x00,0x00,0x00}, // "
{0x50,0x50,0xF8,0x50,0xF8,0x50,0x50,0x00}, // #
{0x20,0x78,0xA0,0x70,0x28,0xF0,0x20,0x00}, // $
{0xC0,0xC8,0x10,0x20,0x40,0x98,0x18,0x00}, // %
{0x40,0xA0,0xA0,0x40,0xA8,0x90,0x68,0x00}, // &
{0x30,0x30,0x20,0x40,0x00,0x00,0x00,0x00}, // '
{0x10,0x20,0x40,0x40,0x40,0x20,0x10,0x00}, // (
{0x40,0x20,0x10,0x10,0x10,0x20,0x40,0x00}, // )
{0x00,0x20,0xA8,0x70,0x70,0xA8,0x20,0x00}, // *
{0x00,0x20,0x20,0xF8,0x20,0x20,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x30,0x30,0x20,0x40}, // ,
{0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00}, // .
{0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00}, // / (forward slash)
{0x70,0x88,0x88,0xA8,0x88,0x88,0x70,0x00}, // 0 0x30
{0x20,0x60,0x20,0x20,0x20,0x20,0x70,0x00}, // 1
{0x70,0x88,0x08,0x70,0x80,0x80,0xF8,0x00}, // 2
{0xF8,0x08,0x10,0x30,0x08,0x88,0x70,0x00}, // 3
{0x10,0x30,0x50,0x90,0xF8,0x10,0x10,0x00}, // 4
{0xF8,0x80,0xF0,0x08,0x08,0x88,0x70,0x00}, // 5
{0x38,0x40,0x80,0xF0,0x88,0x88,0x70,0x00}, // 6
{0xF8,0x08,0x08,0x10,0x20,0x40,0x80,0x00}, // 7
{0x70,0x88,0x88,0x70,0x88,0x88,0x70,0x00}, // 8
{0x70,0x88,0x88,0x78,0x08,0x10,0xE0,0x00}, // 9
{0x00,0x00,0x20,0x00,0x20,0x00,0x00,0x00}, // :
{0x00,0x00,0x20,0x00,0x20,0x20,0x40,0x00}, // ;
{0x08,0x10,0x20,0x40,0x20,0x10,0x08,0x00}, // <
{0x00,0x00,0xF8,0x00,0xF8,0x00,0x00,0x00}, // =
{0x40,0x20,0x10,0x08,0x10,0x20,0x40,0x00}, // >
{0x70,0x88,0x08,0x30,0x20,0x00,0x20,0x00}, // ?
{0x70,0x88,0xA8,0xB8,0xB0,0x80,0x78,0x00}, // @ 0x40
{0x20,0x50,0x88,0x88,0xF8,0x88,0x88,0x00}, // A
{0xF0,0x88,0x88,0xF0,0x88,0x88,0xF0,0x00}, // B
{0x70,0x88,0x80,0x80,0x80,0x88,0x70,0x00}, // C
{0xF0,0x88,0x88,0x88,0x88,0x88,0xF0,0x00}, // D
{0xF8,0x80,0x80,0xF0,0x80,0x80,0xF8,0x00}, // E
{0xF8,0x80,0x80,0xF0,0x80,0x80,0x80,0x00}, // F
{0x78,0x88,0x80,0x80,0x98,0x88,0x78,0x00}, // G
{0x88,0x88,0x88,0xF8,0x88,0x88,0x88,0x00}, // H
{0x70,0x20,0x20,0x20,0x20,0x20,0x70,0x00}, // I
{0x38,0x10,0x10,0x10,0x10,0x90,0x60,0x00}, // J
{0x88,0x90,0xA0,0xC0,0xA0,0x90,0x88,0x00}, // K
{0x80,0x80,0x80,0x80,0x80,0x80,0xF8,0x00}, // L
{0x88,0xD8,0xA8,0xA8,0xA8,0x88,0x88,0x00}, // M
{0x88,0x88,0xC8,0xA8,0x98,0x88,0x88,0x00}, // N
{0x70,0x88,0x88,0x88,0x88,0x88,0x70,0x00}, // O
{0xF0,0x88,0x88,0xF0,0x80,0x80,0x80,0x00}, // P 0x50
{0x70,0x88,0x88,0x88,0xA8,0x90,0x68,0x00}, // Q
{0xF0,0x88,0x88,0xF0,0xA0,0x90,0x88,0x00}, // R
{0x70,0x88,0x80,0x70,0x08,0x88,0x70,0x00}, // S
{0xF8,0xA8,0x20,0x20,0x20,0x20,0x20,0x00}, // T
{0x88,0x88,0x88,0x88,0x88,0x88,0x70,0x00}, // U
{0x88,0x88,0x88,0x88,0x88,0x50,0x20,0x00}, // V
{0x88,0x88,0x88,0xA8,0xA8,0xA8,0x50,0x00}, // W
{0x88,0x88,0x50,0x20,0x50,0x88,0x88,0x00}, // X
{0x88,0x88,0x50,0x20,0x20,0x20,0x20,0x00}, // Y
{0xF8,0x08,0x10,0x70,0x40,0x80,0xF8,0x00}, // Z
{0x78,0x40,0x40,0x40,0x40,0x40,0x78,0x00}, // [
{0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00}, // \ (back slash)
{0x78,0x08,0x08,0x08,0x08,0x08,0x78,0x00}, // ]
{0x20,0x50,0x88,0x00,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x00}, // _
{0x60,0x60,0x20,0x10,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x60,0x10,0x70,0x90,0x78,0x00}, // a
{0x80,0x80,0xB0,0xC8,0x88,0xC8,0xB0,0x00}, // b
{0x00,0x00,0x70,0x88,0x80,0x88,0x70,0x00}, // c
{0x08,0x08,0x68,0x98,0x88,0x98,0x68,0x00}, // d
{0x00,0x00,0x70,0x88,0xF8,0x80,0x70,0x00}, // e
{0x10,0x28,0x20,0x70,0x20,0x20,0x20,0x00}, // f
{0x00,0x00,0x70,0x98,0x98,0x68,0x08,0x70}, // g
{0x80,0x80,0xB0,0xC8,0x88,0x88,0x88,0x00}, // h
{0x20,0x00,0x60,0x20,0x20,0x20,0x70,0x00}, // i
{0x10,0x00,0x10,0x10,0x10,0x90,0x60,0x00}, // j
{0x80,0x80,0x90,0xA0,0xC0,0xA0,0x90,0x00}, // k
{0x60,0x20,0x20,0x20,0x20,0x20,0x70,0x00}, // l
{0x00,0x00,0xD0,0xA8,0xA8,0xA8,0xA8,0x00}, // m
{0x00,0x00,0xB0,0xC8,0x88,0x88,0x88,0x00}, // n
{0x00,0x00,0x70,0x88,0x88,0x88,0x70,0x00}, // o
{0x00,0x00,0xB0,0xC8,0xC8,0xB0,0x80,0x80}, // p 0x70
{0x00,0x00,0x68,0x98,0x98,0x68,0x08,0x08}, // q
{0x00,0x00,0xB0,0xC8,0x80,0x80,0x80,0x00}, // r
{0x00,0x00,0x78,0x80,0x70,0x08,0xF0,0x00}, // s
{0x20,0x20,0xF8,0x20,0x20,0x28,0x10,0x00}, // t
{0x00,0x00,0x88,0x88,0x88,0x98,0x68,0x00}, // u
{0x00,0x00,0x88,0x88,0x88,0x50,0x20,0x00}, // v
{0x00,0x00,0x88,0x88,0xA8,0xA8,0x50,0x00}, // w
{0x00,0x00,0x88,0x50,0x20,0x50,0x88,0x00}, // x
{0x00,0x00,0x88,0x88,0x78,0x08,0x88,0x70}, // y
{0x00,0x00,0xF8,0x10,0x20,0x40,0xF8,0x00}, // z
{0x10,0x20,0x20,0x40,0x20,0x20,0x10,0x00}, // {
{0x20,0x20,0x20,0x00,0x20,0x20,0x20,0x00}, // |
{0x40,0x20,0x20,0x10,0x20,0x20,0x40,0x00}, // }
{0x40,0xA8,0x10,0x00,0x00,0x00,0x00,0x00}, // ~
{0x70,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00} // DEL
};
const unsigned char FONT8x8[97][8] = {
{0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x30,0x78,0x78,0x30,0x30,0x00,0x30,0x00}, // !
{0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00}, // "
{0x6C,0x6C,0xFE,0x6C,0xFE,0x6C,0x6C,0x00}, // #
{0x18,0x3E,0x60,0x3C,0x06,0x7C,0x18,0x00}, // $
{0x00,0x63,0x66,0x0C,0x18,0x33,0x63,0x00}, // %
{0x1C,0x36,0x1C,0x3B,0x6E,0x66,0x3B,0x00}, // &
{0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00}, // '
{0x0C,0x18,0x30,0x30,0x30,0x18,0x0C,0x00}, // (
{0x30,0x18,0x0C,0x0C,0x0C,0x18,0x30,0x00}, // )
{0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00}, // *
{0x00,0x30,0x30,0xFC,0x30,0x30,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x30}, // ,
{0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00}, // .
{0x03,0x06,0x0C,0x18,0x30,0x60,0x40,0x00}, // / (forward slash)
{0x3E,0x63,0x63,0x6B,0x63,0x63,0x3E,0x00}, // 0 0x30
{0x18,0x38,0x58,0x18,0x18,0x18,0x7E,0x00}, // 1
{0x3C,0x66,0x06,0x1C,0x30,0x66,0x7E,0x00}, // 2
{0x3C,0x66,0x06,0x1C,0x06,0x66,0x3C,0x00}, // 3
{0x0E,0x1E,0x36,0x66,0x7F,0x06,0x0F,0x00}, // 4
{0x7E,0x60,0x7C,0x06,0x06,0x66,0x3C,0x00}, // 5
{0x1C,0x30,0x60,0x7C,0x66,0x66,0x3C,0x00}, // 6
{0x7E,0x66,0x06,0x0C,0x18,0x18,0x18,0x00}, // 7
{0x3C,0x66,0x66,0x3C,0x66,0x66,0x3C,0x00}, // 8
{0x3C,0x66,0x66,0x3E,0x06,0x0C,0x38,0x00}, // 9
{0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x00}, // :
{0x00,0x18,0x18,0x00,0x00,0x18,0x18,0x30}, // ;
{0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00}, // <
{0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00}, // =
{0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00}, // >
{0x3C,0x66,0x06,0x0C,0x18,0x00,0x18,0x00}, // ?
{0x3E,0x63,0x6F,0x69,0x6F,0x60,0x3E,0x00}, // @ 0x40
{0x18,0x3C,0x66,0x66,0x7E,0x66,0x66,0x00}, // A
{0x7E,0x33,0x33,0x3E,0x33,0x33,0x7E,0x00}, // B
{0x1E,0x33,0x60,0x60,0x60,0x33,0x1E,0x00}, // C
{0x7C,0x36,0x33,0x33,0x33,0x36,0x7C,0x00}, // D
{0x7F,0x31,0x34,0x3C,0x34,0x31,0x7F,0x00}, // E
{0x7F,0x31,0x34,0x3C,0x34,0x30,0x78,0x00}, // F
{0x1E,0x33,0x60,0x60,0x67,0x33,0x1F,0x00}, // G
{0x66,0x66,0x66,0x7E,0x66,0x66,0x66,0x00}, // H
{0x3C,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // I
{0x0F,0x06,0x06,0x06,0x66,0x66,0x3C,0x00}, // J
{0x73,0x33,0x36,0x3C,0x36,0x33,0x73,0x00}, // K
{0x78,0x30,0x30,0x30,0x31,0x33,0x7F,0x00}, // L
{0x63,0x77,0x7F,0x7F,0x6B,0x63,0x63,0x00}, // M
{0x63,0x73,0x7B,0x6F,0x67,0x63,0x63,0x00}, // N
{0x3E,0x63,0x63,0x63,0x63,0x63,0x3E,0x00}, // O
{0x7E,0x33,0x33,0x3E,0x30,0x30,0x78,0x00}, // P 0x50
{0x3C,0x66,0x66,0x66,0x6E,0x3C,0x0E,0x00}, // Q
{0x7E,0x33,0x33,0x3E,0x36,0x33,0x73,0x00}, // R
{0x3C,0x66,0x30,0x18,0x0C,0x66,0x3C,0x00}, // S
{0x7E,0x5A,0x18,0x18,0x18,0x18,0x3C,0x00}, // T
{0x66,0x66,0x66,0x66,0x66,0x66,0x7E,0x00}, // U
{0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00}, // V
{0x63,0x63,0x63,0x6B,0x7F,0x77,0x63,0x00}, // W
{0x63,0x63,0x36,0x1C,0x1C,0x36,0x63,0x00}, // X
{0x66,0x66,0x66,0x3C,0x18,0x18,0x3C,0x00}, // Y
{0x7F,0x63,0x46,0x0C,0x19,0x33,0x7F,0x00}, // Z
{0x3C,0x30,0x30,0x30,0x30,0x30,0x3C,0x00}, // [
{0x60,0x30,0x18,0x0C,0x06,0x03,0x01,0x00}, // \ (back slash)
{0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00}, // ]
{0x08,0x1C,0x36,0x63,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF}, // _
{0x18,0x18,0x0C,0x00,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x3C,0x06,0x3E,0x66,0x3B,0x00}, // a
{0x70,0x30,0x3E,0x33,0x33,0x33,0x6E,0x00}, // b
{0x00,0x00,0x3C,0x66,0x60,0x66,0x3C,0x00}, // c
{0x0E,0x06,0x3E,0x66,0x66,0x66,0x3B,0x00}, // d
{0x00,0x00,0x3C,0x66,0x7E,0x60,0x3C,0x00}, // e
{0x1C,0x36,0x30,0x78,0x30,0x30,0x78,0x00}, // f
{0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x7C}, // g
{0x70,0x30,0x36,0x3B,0x33,0x33,0x73,0x00}, // h
{0x18,0x00,0x38,0x18,0x18,0x18,0x3C,0x00}, // i
{0x06,0x00,0x06,0x06,0x06,0x66,0x66,0x3C}, // j
{0x70,0x30,0x33,0x36,0x3C,0x36,0x73,0x00}, // k
{0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00}, // l
{0x00,0x00,0x66,0x7F,0x7F,0x6B,0x63,0x00}, // m
{0x00,0x00,0x7C,0x66,0x66,0x66,0x66,0x00}, // n
{0x00,0x00,0x3C,0x66,0x66,0x66,0x3C,0x00}, // o
{0x00,0x00,0x6E,0x33,0x33,0x3E,0x30,0x78}, // p 0x70
{0x00,0x00,0x3B,0x66,0x66,0x3E,0x06,0x0F}, // q
{0x00,0x00,0x6E,0x3B,0x33,0x30,0x78,0x00}, // r
{0x00,0x00,0x3E,0x60,0x3C,0x06,0x7C,0x00}, // s
{0x08,0x18,0x3E,0x18,0x18,0x1A,0x0C,0x00}, // t
{0x00,0x00,0x66,0x66,0x66,0x66,0x3B,0x00}, // u
{0x00,0x00,0x66,0x66,0x66,0x3C,0x18,0x00}, // v
{0x00,0x00,0x63,0x6B,0x7F,0x7F,0x36,0x00}, // w
{0x00,0x00,0x63,0x36,0x1C,0x36,0x63,0x00}, // x
{0x00,0x00,0x66,0x66,0x66,0x3E,0x06,0x7C}, // y
{0x00,0x00,0x7E,0x4C,0x18,0x32,0x7E,0x00}, // z
{0x0E,0x18,0x18,0x70,0x18,0x18,0x0E,0x00}, // {
{0x0C,0x0C,0x0C,0x00,0x0C,0x0C,0x0C,0x00}, // |
{0x70,0x18,0x18,0x0E,0x18,0x18,0x70,0x00}, // }
{0x3B,0x6E,0x00,0x00,0x00,0x00,0x00,0x00}, // ~
{0x1C,0x36,0x36,0x1C,0x00,0x00,0x00,0x00}// DEL
};
const unsigned char FONT8x16[97][16] = {
{0x08,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // columns, rows, num_bytes_per_char
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // space 0x20
{0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // !
{0x00,0x63,0x63,0x63,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // "
{0x00,0x00,0x00,0x36,0x36,0x7F,0x36,0x36,0x36,0x7F,0x36,0x36,0x00,0x00,0x00,0x00}, // #
{0x0C,0x0C,0x3E,0x63,0x61,0x60,0x3E,0x03,0x03,0x43,0x63,0x3E,0x0C,0x0C,0x00,0x00}, // $
{0x00,0x00,0x00,0x00,0x00,0x61,0x63,0x06,0x0C,0x18,0x33,0x63,0x00,0x00,0x00,0x00}, // %
{0x00,0x00,0x00,0x1C,0x36,0x36,0x1C,0x3B,0x6E,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // &
{0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // '
{0x00,0x00,0x0C,0x18,0x18,0x30,0x30,0x30,0x30,0x18,0x18,0x0C,0x00,0x00,0x00,0x00}, // (
{0x00,0x00,0x18,0x0C,0x0C,0x06,0x06,0x06,0x06,0x0C,0x0C,0x18,0x00,0x00,0x00,0x00}, // )
{0x00,0x00,0x00,0x00,0x42,0x66,0x3C,0xFF,0x3C,0x66,0x42,0x00,0x00,0x00,0x00,0x00}, // *
{0x00,0x00,0x00,0x00,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x00,0x00,0x00,0x00,0x00}, // +
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00}, // ,
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // -
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // .
{0x00,0x00,0x01,0x03,0x07,0x0E,0x1C,0x38,0x70,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00}, // / (forward slash)
{0x00,0x00,0x3E,0x63,0x63,0x63,0x6B,0x6B,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 0 0x30
{0x00,0x00,0x0C,0x1C,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3F,0x00,0x00,0x00,0x00}, // 1
{0x00,0x00,0x3E,0x63,0x03,0x06,0x0C,0x18,0x30,0x61,0x63,0x7F,0x00,0x00,0x00,0x00}, // 2
{0x00,0x00,0x3E,0x63,0x03,0x03,0x1E,0x03,0x03,0x03,0x63,0x3E,0x00,0x00,0x00,0x00}, // 3
{0x00,0x00,0x06,0x0E,0x1E,0x36,0x66,0x66,0x7F,0x06,0x06,0x0F,0x00,0x00,0x00,0x00}, // 4
{0x00,0x00,0x7F,0x60,0x60,0x60,0x7E,0x03,0x03,0x63,0x73,0x3E,0x00,0x00,0x00,0x00}, // 5
{0x00,0x00,0x1C,0x30,0x60,0x60,0x7E,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 6
{0x00,0x00,0x7F,0x63,0x03,0x06,0x06,0x0C,0x0C,0x18,0x18,0x18,0x00,0x00,0x00,0x00}, // 7
{0x00,0x00,0x3E,0x63,0x63,0x63,0x3E,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // 8
{0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x3F,0x03,0x03,0x06,0x3C,0x00,0x00,0x00,0x00}, // 9
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}, // :
{0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00}, // ;
{0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00}, // <
{0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00}, // =
{0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00}, // >
{0x00,0x00,0x3E,0x63,0x63,0x06,0x0C,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x00,0x00,0x00}, // ?
{0x00,0x00,0x3E,0x63,0x63,0x6F,0x6B,0x6B,0x6E,0x60,0x60,0x3E,0x00,0x00,0x00,0x00}, // @ 0x40
{0x00,0x00,0x08,0x1C,0x36,0x63,0x63,0x63,0x7F,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // A
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x33,0x33,0x33,0x33,0x7E,0x00,0x00,0x00,0x00}, // B
{0x00,0x00,0x1E,0x33,0x61,0x60,0x60,0x60,0x60,0x61,0x33,0x1E,0x00,0x00,0x00,0x00}, // C
{0x00,0x00,0x7C,0x36,0x33,0x33,0x33,0x33,0x33,0x33,0x36,0x7C,0x00,0x00,0x00,0x00}, // D
{0x00,0x00,0x7F,0x33,0x31,0x34,0x3C,0x34,0x30,0x31,0x33,0x7F,0x00,0x00,0x00,0x00}, // E
{0x00,0x00,0x7F,0x33,0x31,0x34,0x3C,0x34,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // F
{0x00,0x00,0x1E,0x33,0x61,0x60,0x60,0x6F,0x63,0x63,0x37,0x1D,0x00,0x00,0x00,0x00}, // G
{0x00,0x00,0x63,0x63,0x63,0x63,0x7F,0x63,0x63,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // H
{0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // I
{0x00,0x00,0x0F,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,0x00,0x00,0x00}, // J
{0x00,0x00,0x73,0x33,0x36,0x36,0x3C,0x36,0x36,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // K
{0x00,0x00,0x78,0x30,0x30,0x30,0x30,0x30,0x30,0x31,0x33,0x7F,0x00,0x00,0x00,0x00}, // L
{0x00,0x00,0x63,0x77,0x7F,0x6B,0x63,0x63,0x63,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // M
{0x00,0x00,0x63,0x63,0x73,0x7B,0x7F,0x6F,0x67,0x63,0x63,0x63,0x00,0x00,0x00,0x00}, // N
{0x00,0x00,0x1C,0x36,0x63,0x63,0x63,0x63,0x63,0x63,0x36,0x1C,0x00,0x00,0x00,0x00}, // O
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // P 0x50
{0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x63,0x63,0x6B,0x6F,0x3E,0x06,0x07,0x00,0x00}, // Q
{0x00,0x00,0x7E,0x33,0x33,0x33,0x3E,0x36,0x36,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // R
{0x00,0x00,0x3E,0x63,0x63,0x30,0x1C,0x06,0x03,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // S
{0x00,0x00,0xFF,0xDB,0x99,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // T
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // U
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x63,0x63,0x36,0x1C,0x08,0x00,0x00,0x00,0x00}, // V
{0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x6B,0x6B,0x7F,0x36,0x36,0x00,0x00,0x00,0x00}, // W
{0x00,0x00,0xC3,0xC3,0x66,0x3C,0x18,0x18,0x3C,0x66,0xC3,0xC3,0x00,0x00,0x00,0x00}, // X
{0x00,0x00,0xC3,0xC3,0xC3,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00}, // Y
{0x00,0x00,0x7F,0x63,0x43,0x06,0x0C,0x18,0x30,0x61,0x63,0x7F,0x00,0x00,0x00,0x00}, // Z
{0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00}, // [
{0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x07,0x03,0x01,0x00,0x00,0x00,0x00}, // \ (back slash)
{0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00}, // ]
{0x08,0x1C,0x36,0x63,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ^
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00}, // _
{0x18,0x18,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ` 0x60
{0x00,0x00,0x00,0x00,0x00,0x3C,0x46,0x06,0x3E,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // a
{0x00,0x00,0x70,0x30,0x30,0x3C,0x36,0x33,0x33,0x33,0x33,0x6E,0x00,0x00,0x00,0x00}, // b
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x60,0x60,0x60,0x63,0x3E,0x00,0x00,0x00,0x00}, // c
{0x00,0x00,0x0E,0x06,0x06,0x1E,0x36,0x66,0x66,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // d
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x63,0x7E,0x60,0x63,0x3E,0x00,0x00,0x00,0x00}, // e
{0x00,0x00,0x1C,0x36,0x32,0x30,0x7C,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // f
{0x00,0x00,0x00,0x00,0x00,0x3B,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00,0x00}, // g
{0x00,0x00,0x70,0x30,0x30,0x36,0x3B,0x33,0x33,0x33,0x33,0x73,0x00,0x00,0x00,0x00}, // h
{0x00,0x00,0x0C,0x0C,0x00,0x1C,0x0C,0x0C,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}, // i
{0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,0x00}, // j
{0x00,0x00,0x70,0x30,0x30,0x33,0x33,0x36,0x3C,0x36,0x33,0x73,0x00,0x00,0x00,0x00}, // k
{0x00,0x00,0x1C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}, // l
{0x00,0x00,0x00,0x00,0x00,0x6E,0x7F,0x6B,0x6B,0x6B,0x6B,0x6B,0x00,0x00,0x00,0x00}, // m
{0x00,0x00,0x00,0x00,0x00,0x6E,0x33,0x33,0x33,0x33,0x33,0x33,0x00,0x00,0x00,0x00}, // n
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x63,0x63,0x63,0x63,0x3E,0x00,0x00,0x00,0x00}, // o
{0x00,0x00,0x00,0x00,0x00,0x6E,0x33,0x33,0x33,0x33,0x3E,0x30,0x30,0x78,0x00,0x00}, // p 0x70
{0x00,0x00,0x00,0x00,0x00,0x3B,0x66,0x66,0x66,0x66,0x3E,0x06,0x06,0x0F,0x00,0x00}, // q
{0x00,0x00,0x00,0x00,0x00,0x6E,0x3B,0x33,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}, // r
{0x00,0x00,0x00,0x00,0x00,0x3E,0x63,0x38,0x0E,0x03,0x63,0x3E,0x00,0x00,0x00,0x00}, // s
{0x00,0x00,0x08,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x1B,0x0E,0x00,0x00,0x00,0x00}, // t
{0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x3B,0x00,0x00,0x00,0x00}, // u
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x36,0x36,0x1C,0x1C,0x08,0x00,0x00,0x00,0x00}, // v
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x63,0x6B,0x6B,0x7F,0x36,0x00,0x00,0x00,0x00}, // w
{0x00,0x00,0x00,0x00,0x00,0x63,0x36,0x1C,0x1C,0x1C,0x36,0x63,0x00,0x00,0x00,0x00}, // x
{0x00,0x00,0x00,0x00,0x00,0x63,0x63,0x63,0x63,0x63,0x3F,0x03,0x06,0x3C,0x00,0x00}, // y
{0x00,0x00,0x00,0x00,0x00,0x7F,0x66,0x0C,0x18,0x30,0x63,0x7F,0x00,0x00,0x00,0x00}, // z
{0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00}, // {
{0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00}, // |
{0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00}, // }
{0x00,0x00,0x3B,0x6E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ~
{0x00,0x70,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
}; // DEL

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