diff --git a/.github/scripts/core_checker.py b/.github/scripts/core_checker.py
index 471f248353..f029e3b76c 100755
--- a/.github/scripts/core_checker.py
+++ b/.github/scripts/core_checker.py
@@ -260,6 +260,7 @@ FREERTOS_IGNORED_PATTERNS = [
     r'.*mbedtls_config\.h.*',
     r'.*CMSIS.*',
     r'.*/Nordic_Code/*',
+    r'.*/Nuvoton_Code/*',
     r'.*/ST_Code/*',
     r'.*/NXP_Code/*',
     r'.*/makefile',
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/.gitignore b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/.gitignore
new file mode 100644
index 0000000000..30de058bd1
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/.gitignore
@@ -0,0 +1,10 @@
+# Auto generated files.
+*.uvgui*
+settings/
+Nu_Link_Driver.ini
+*.ewt
+*.dep
+
+# Build artifacts.
+Objects/
+Listings/
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Nuvoton_Code/StdDriver/src/retarget.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Nuvoton_Code/StdDriver/src/retarget.c
index 486df61248..127cd2d271 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Nuvoton_Code/StdDriver/src/retarget.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Nuvoton_Code/StdDriver/src/retarget.c
@@ -496,10 +496,15 @@ int fputc(int ch, FILE *stream)
 }
 
 
-#if defined ( __GNUC__ )
+#if ( defined ( __GNUC__ ) || defined( __ICCARM__ ) )
 
 #if !defined(OS_USE_SEMIHOSTING)
-int _write (int fd, char *ptr, int len)
+
+#if defined( __ICCARM__ )
+    int __write (int fd, char *ptr, int len)
+#else
+    int _write (int fd, char *ptr, int len)
+#endif
 {
     int i = len;
 
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewd b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewd
index 8ed1ef4caf..c798137190 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewd
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewd
@@ -11,7 +11,7 @@
             <name>C-SPY</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>30</version>
+                <version>32</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -182,14 +182,6 @@
                     <name>OCMulticoreNrOfCores</name>
                     <state>1</state>
                 </option>
-                <option>
-                    <name>OCMulticoreMaster</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>OCMulticorePort</name>
-                    <state>53461</state>
-                </option>
                 <option>
                     <name>OCMulticoreWorkspace</name>
                     <state></state>
@@ -218,6 +210,18 @@
                     <name>OCMulticoreNrOfCoresSlave</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCTpiuBaseOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -494,7 +498,7 @@
             <name>IJET_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>8</version>
+                <version>9</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -718,6 +722,58 @@
                     <name>CCIjetUsbSerialNoSelect</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CatchV8ARReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL3S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL3S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL3S</name>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -924,7 +980,7 @@
             <name>LMIFTDI_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>2</version>
+                <version>3</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -951,6 +1007,19 @@
                     <name>CCLmiFtdiInterfaceCmdLine</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1003,7 +1072,7 @@
             <name>STLINK_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>5</version>
+                <version>8</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -1101,7 +1170,7 @@
                 </option>
                 <option>
                     <name>CCSTLinkJtagSpeedList</name>
-                    <version>1</version>
+                    <version>2</version>
                     <state>0</state>
                 </option>
                 <option>
@@ -1116,6 +1185,19 @@
                     <name>CCSTLinkUseServerSelect</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CCSTLinkProbeList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkTargetVccEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1218,7 +1300,7 @@
             <name>XDS100_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>8</version>
+                <version>9</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -1343,7 +1425,7 @@
                 </option>
                 <option>
                     <name>CCXds100ResetList</name>
-                    <version>0</version>
+                    <version>1</version>
                     <state>0</state>
                 </option>
                 <option>
@@ -1392,6 +1474,10 @@
                     <name>OCXDSDigitalStatesConfigFile</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>OCSelectedCoreName</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <debuggerPlugins>
@@ -1428,21 +1514,17 @@
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9BE.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
                 <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
-            <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
-                <loadFlag>0</loadFlag>
-            </plugin>
             <plugin>
                 <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
                 <loadFlag>0</loadFlag>
@@ -1455,10 +1537,6 @@
                 <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
-            <plugin>
-                <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
-                <loadFlag>1</loadFlag>
-            </plugin>
             <plugin>
                 <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
                 <loadFlag>0</loadFlag>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewp b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewp
index 6c57c8dc93..d6839b9c13 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewp
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/FreeRTOSDemo_ns.ewp
@@ -11,9 +11,13 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>31</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
+                <option>
+                    <name>BrowseInfoPath</name>
+                    <state>Release\BrowseInfo</state>
+                </option>
                 <option>
                     <name>ExePath</name>
                     <state>Objects</state>
@@ -58,7 +62,7 @@
                 </option>
                 <option>
                     <name>RTDescription</name>
-                    <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+                    <state>A complete configuration of the C/C++14 runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
                 </option>
                 <option>
                     <name>OGProductVersion</name>
@@ -66,15 +70,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.30.2.18207</state>
-                </option>
-                <option>
-                    <name>GeneralEnableMisra</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>GeneralMisraVerbose</name>
-                    <state>0</state>
+                    <state>9.32.2.57275</state>
                 </option>
                 <option>
                     <name>OGChipSelectEditMenu</name>
@@ -82,7 +78,7 @@
                 </option>
                 <option>
                     <name>GenLowLevelInterface</name>
-                    <state>1</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>GEndianModeBE</name>
@@ -96,28 +92,14 @@
                     <name>GenStdoutInterface</name>
                     <state>0</state>
                 </option>
-                <option>
-                    <name>GeneralMisraRules98</name>
-                    <version>0</version>
-                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
-                </option>
-                <option>
-                    <name>GeneralMisraVer</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>GeneralMisraRules04</name>
-                    <version>0</version>
-                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
-                </option>
                 <option>
                     <name>RTConfigPath2</name>
                     <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Full.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>OGUseCmsis</name>
@@ -133,8 +115,8 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>GFPUDeviceSlave</name>
@@ -156,8 +138,8 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>OGCMSISPackSelectDevice</name>
@@ -209,18 +191,38 @@
                     <version>0</version>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>OGAarch64Abi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OG_32_64Device</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>BuildFilesPath</name>
+                    <state>Release</state>
+                </option>
+                <option>
+                    <name>PointerAuthentication</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FPU64</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>37</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
                     <name>CCDefines</name>
-                    <state>DEBUG_PORT=UART1_NS</state>
+                    <state>DEBUG_PORT=UART0_NS</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -339,10 +341,6 @@
                     <name>PreInclude</name>
                     <state></state>
                 </option>
-                <option>
-                    <name>CompilerMisraOverride</name>
-                    <state>0</state>
-                </option>
                 <option>
                     <name>CCIncludePath2</name>
                     <state>$PROJ_DIR$\..\Config</state>
@@ -354,6 +352,9 @@
                     <state>$PROJ_DIR$\..\..\..\Nuvoton_Code\StdDriver\inc</state>
                     <state>$PROJ_DIR$\..\..\..\Nuvoton_Code\CMSIS\Include</state>
                     <state>$PROJ_DIR$\..\..\..\Nuvoton_Code\Device\Nuvoton\M2351\Include</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\secure</state>
+                    <state>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\non_secure</state>
+                    <state>$PROJ_DIR$\..\..\..\RegTests</state>
                 </option>
                 <option>
                     <name>CCStdIncCheck</name>
@@ -380,16 +381,6 @@
                     <name>CCOptLevelSlave</name>
                     <state>3</state>
                 </option>
-                <option>
-                    <name>CompilerMisraRules98</name>
-                    <version>0</version>
-                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
-                </option>
-                <option>
-                    <name>CompilerMisraRules04</name>
-                    <version>0</version>
-                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
-                </option>
                 <option>
                     <name>CCPosIndRopi</name>
                     <state>0</state>
@@ -471,13 +462,21 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCStackProtection</name>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>AARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>10</version>
+                <version>11</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -635,6 +634,10 @@
                     <name>AsmNoLiteralPool</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -673,14 +676,10 @@
             <data>
                 <extensions></extensions>
                 <cmdline></cmdline>
-                <hasPrio>0</hasPrio>
+                <hasPrio>112</hasPrio>
+                <buildSequence>inputOutputBased</buildSequence>
             </data>
         </settings>
-        <settings>
-            <name>BICOMP</name>
-            <archiveVersion>0</archiveVersion>
-            <data />
-        </settings>
         <settings>
             <name>BUILDACTION</name>
             <archiveVersion>1</archiveVersion>
@@ -693,17 +692,13 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>21</version>
+                <version>27</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
                     <name>IlinkLibIOConfig</name>
                     <state>1</state>
                 </option>
-                <option>
-                    <name>XLinkMisraHandler</name>
-                    <state>0</state>
-                </option>
                 <option>
                     <name>IlinkInputFileSlave</name>
                     <state>0</state>
@@ -1009,6 +1004,62 @@
                     <name>IlinkTrustzoneImportLibraryOut</name>
                     <state>FreeRTOSDemo_ns_importlib.o</state>
                 </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkLogCrtRoutineSelection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogFragmentInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInlining</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogMerging</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkDemangle</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFileEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkFpuProcessor</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1032,11 +1083,6 @@
                 </option>
             </data>
         </settings>
-        <settings>
-            <name>BILINK</name>
-            <archiveVersion>0</archiveVersion>
-            <data />
-        </settings>
     </configuration>
     <group>
         <name>Config</name>
@@ -1052,6 +1098,18 @@
         <file>
             <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\mpu_demo\mpu_demo.h</name>
         </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\non_secure\reg_test_asm.h</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\non_secure\reg_test_asm.s</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\RegTests\reg_tests.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\RegTests\reg_tests.h</name>
+        </file>
         <file>
             <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\tz_demo\tz_demo.c</name>
         </file>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c
index 5e28eba01e..900ed89e6b 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c
@@ -35,6 +35,7 @@
 /* Demo includes. */
 #include "tz_demo.h"
 #include "mpu_demo.h"
+#include "reg_tests.h"
 
 /**
  * @brief Create all demo tasks.
@@ -54,10 +55,10 @@ int main( void )
 	DEBUG_PORT->LINE = UART_WORD_LEN_8 | UART_PARITY_NONE | UART_STOP_BIT_1;
 
 	/* Print banner. */
-	printf( "\n" );
-	printf( "+---------------------------------------------+\n" );
-	printf( "|           Nonsecure is running ...          |\n" );
-	printf( "+---------------------------------------------+\n" );
+	printf( "\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
+	printf( "|           Nonsecure is running ...          |\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
 
 	/* Create tasks. */
 	prvCreateTasks();
@@ -83,6 +84,8 @@ static void prvCreateTasks( void )
 	/* Create tasks for the TZ Demo. */
 	vStartTZDemo();
 
+	/* Create tasks for register tests. */
+	vStartRegTests();
 }
 /*-----------------------------------------------------------*/
 
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewd b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewd
index ecf520569d..8491b4e1a6 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewd
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewd
@@ -11,7 +11,7 @@
             <name>C-SPY</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>30</version>
+                <version>32</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -88,7 +88,7 @@
                 </option>
                 <option>
                     <name>OCLastSavedByProductVersion</name>
-                    <state>8.30.1.17146</state>
+                    <state>9.32.2.57275</state>
                 </option>
                 <option>
                     <name>UseFlashLoader</name>
@@ -182,14 +182,6 @@
                     <name>OCMulticoreNrOfCores</name>
                     <state>1</state>
                 </option>
-                <option>
-                    <name>OCMulticoreMaster</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>OCMulticorePort</name>
-                    <state>53461</state>
-                </option>
                 <option>
                     <name>OCMulticoreWorkspace</name>
                     <state></state>
@@ -218,6 +210,18 @@
                     <name>OCMulticoreNrOfCoresSlave</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCTpiuBaseOption</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -494,7 +498,7 @@
             <name>IJET_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>8</version>
+                <version>9</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -718,6 +722,58 @@
                     <name>CCIjetUsbSerialNoSelect</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CatchV8ARReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREREL3S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL1NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL1S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL2NS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8AREEL3S</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchV8ARREL3S</name>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -924,7 +980,7 @@
             <name>LMIFTDI_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>2</version>
+                <version>3</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -951,6 +1007,19 @@
                     <name>CCLmiFtdiInterfaceCmdLine</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCLmiftdiUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCLmiftdiResetList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1003,7 +1072,7 @@
             <name>STLINK_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>5</version>
+                <version>8</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -1101,7 +1170,7 @@
                 </option>
                 <option>
                     <name>CCSTLinkJtagSpeedList</name>
-                    <version>1</version>
+                    <version>2</version>
                     <state>0</state>
                 </option>
                 <option>
@@ -1116,6 +1185,19 @@
                     <name>CCSTLinkUseServerSelect</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>CCSTLinkProbeList</name>
+                    <version>1</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCSTLinkTargetVccEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCSTLinkTargetVoltage</name>
+                    <state>###Uninitialized###</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1218,7 +1300,7 @@
             <name>XDS100_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>8</version>
+                <version>9</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -1343,7 +1425,7 @@
                 </option>
                 <option>
                     <name>CCXds100ResetList</name>
-                    <version>0</version>
+                    <version>1</version>
                     <state>0</state>
                 </option>
                 <option>
@@ -1392,6 +1474,10 @@
                     <name>OCXDSDigitalStatesConfigFile</name>
                     <state>1</state>
                 </option>
+                <option>
+                    <name>OCSelectedCoreName</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <debuggerPlugins>
@@ -1428,21 +1514,17 @@
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm9BE.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
                 <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
-            <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
-                <loadFlag>0</loadFlag>
-            </plugin>
             <plugin>
                 <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
                 <loadFlag>0</loadFlag>
@@ -1455,10 +1537,6 @@
                 <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
-            <plugin>
-                <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
-                <loadFlag>1</loadFlag>
-            </plugin>
             <plugin>
                 <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
                 <loadFlag>0</loadFlag>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewp b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewp
index 4b8ba8a58b..9815b540db 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewp
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/FreeRTOSDemo_s.ewp
@@ -11,9 +11,13 @@
             <name>General</name>
             <archiveVersion>3</archiveVersion>
             <data>
-                <version>31</version>
+                <version>35</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
+                <option>
+                    <name>BrowseInfoPath</name>
+                    <state>Release\BrowseInfo</state>
+                </option>
                 <option>
                     <name>ExePath</name>
                     <state>Objects</state>
@@ -58,7 +62,7 @@
                 </option>
                 <option>
                     <name>RTDescription</name>
-                    <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+                    <state>A complete configuration of the C/C++14 runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
                 </option>
                 <option>
                     <name>OGProductVersion</name>
@@ -66,15 +70,7 @@
                 </option>
                 <option>
                     <name>OGLastSavedByProductVersion</name>
-                    <state>8.30.2.18207</state>
-                </option>
-                <option>
-                    <name>GeneralEnableMisra</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>GeneralMisraVerbose</name>
-                    <state>0</state>
+                    <state>9.32.2.57275</state>
                 </option>
                 <option>
                     <name>OGChipSelectEditMenu</name>
@@ -82,7 +78,7 @@
                 </option>
                 <option>
                     <name>GenLowLevelInterface</name>
-                    <state>1</state>
+                    <state>0</state>
                 </option>
                 <option>
                     <name>GEndianModeBE</name>
@@ -96,28 +92,14 @@
                     <name>GenStdoutInterface</name>
                     <state>0</state>
                 </option>
-                <option>
-                    <name>GeneralMisraRules98</name>
-                    <version>0</version>
-                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
-                </option>
-                <option>
-                    <name>GeneralMisraVer</name>
-                    <state>0</state>
-                </option>
-                <option>
-                    <name>GeneralMisraRules04</name>
-                    <version>0</version>
-                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
-                </option>
                 <option>
                     <name>RTConfigPath2</name>
                     <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Full.h</state>
                 </option>
                 <option>
                     <name>GBECoreSlave</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>OGUseCmsis</name>
@@ -133,8 +115,8 @@
                 </option>
                 <option>
                     <name>CoreVariant</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>GFPUDeviceSlave</name>
@@ -156,8 +138,8 @@
                 </option>
                 <option>
                     <name>GFPUCoreSlave2</name>
-                    <version>26</version>
-                    <state>58</state>
+                    <version>32</version>
+                    <state>60</state>
                 </option>
                 <option>
                     <name>OGCMSISPackSelectDevice</name>
@@ -209,13 +191,33 @@
                     <version>0</version>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OGAarch64Abi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OG_32_64Device</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>BuildFilesPath</name>
+                    <state>Release</state>
+                </option>
+                <option>
+                    <name>PointerAuthentication</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FPU64</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>ICCARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>34</version>
+                <version>37</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -339,10 +341,6 @@
                     <name>PreInclude</name>
                     <state></state>
                 </option>
-                <option>
-                    <name>CompilerMisraOverride</name>
-                    <state>0</state>
-                </option>
                 <option>
                     <name>CCIncludePath2</name>
                     <state>$PROJ_DIR$\..</state>
@@ -377,16 +375,6 @@
                     <name>CCOptLevelSlave</name>
                     <state>3</state>
                 </option>
-                <option>
-                    <name>CompilerMisraRules98</name>
-                    <version>0</version>
-                    <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
-                </option>
-                <option>
-                    <name>CompilerMisraRules04</name>
-                    <version>0</version>
-                    <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
-                </option>
                 <option>
                     <name>CCPosIndRopi</name>
                     <state>0</state>
@@ -468,13 +456,21 @@
                     <name>IccRTTI2</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>OICompilerExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCStackProtection</name>
+                    <state>0</state>
+                </option>
             </data>
         </settings>
         <settings>
             <name>AARM</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>10</version>
+                <version>11</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -632,6 +628,10 @@
                     <name>AsmNoLiteralPool</name>
                     <state>0</state>
                 </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -671,13 +671,9 @@
                 <extensions></extensions>
                 <cmdline></cmdline>
                 <hasPrio>0</hasPrio>
+                <buildSequence>inputOutputBased</buildSequence>
             </data>
         </settings>
-        <settings>
-            <name>BICOMP</name>
-            <archiveVersion>0</archiveVersion>
-            <data />
-        </settings>
         <settings>
             <name>BUILDACTION</name>
             <archiveVersion>1</archiveVersion>
@@ -690,17 +686,13 @@
             <name>ILINK</name>
             <archiveVersion>0</archiveVersion>
             <data>
-                <version>21</version>
+                <version>27</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
                     <name>IlinkLibIOConfig</name>
                     <state>1</state>
                 </option>
-                <option>
-                    <name>XLinkMisraHandler</name>
-                    <state>0</state>
-                </option>
                 <option>
                     <name>IlinkInputFileSlave</name>
                     <state>0</state>
@@ -1006,6 +998,62 @@
                     <name>IlinkTrustzoneImportLibraryOut</name>
                     <state>FreeRTOSDemo_s_importlib.o</state>
                 </option>
+                <option>
+                    <name>OILinkExtraOption</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkLogCrtRoutineSelection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogFragmentInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInlining</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogMerging</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkDemangle</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFileEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkProcessor</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkFpuProcessor</name>
+                    <state>1</state>
+                </option>
             </data>
         </settings>
         <settings>
@@ -1029,11 +1077,6 @@
                 </option>
             </data>
         </settings>
-        <settings>
-            <name>BILINK</name>
-            <archiveVersion>0</archiveVersion>
-            <data />
-        </settings>
     </configuration>
     <group>
         <name>Device</name>
@@ -1067,6 +1110,15 @@
         <file>
             <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\tz_demo\nsc_functions.h</name>
         </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\secure\secure_reg_test.c</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\secure\secure_reg_test_asm.h</name>
+        </file>
+        <file>
+            <name>$PROJ_DIR$\..\..\..\..\Common\ARMv8M\reg_tests\IAR\ARM_CM23\secure\secure_reg_test_asm.s</name>
+        </file>
     </group>
     <group>
         <name>SecureContext</name>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c
index 240bfb9953..48653a444c 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c
@@ -69,10 +69,10 @@ int main(void)
 	prvSetupHardware();
 
 	/* Print banner. */
-	printf( "\n" );
-	printf( "+---------------------------------------------+\n" );
-	printf( "|            Secure is running ...            |\n" );
-	printf( "+---------------------------------------------+\n" );
+	printf( "\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
+	printf( "|            Secure is running ...            |\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
 
 	/* Do not generate Systick interrupt on secure side. */
 	SysTick_Config( 1 );
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvoptx b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvoptx
index 1e170edd80..a4e011e60d 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvoptx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvoptx
@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -77,7 +77,7 @@
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
-      <CpuCode>255</CpuCode>
+      <CpuCode>6</CpuCode>
       <DebugOpt>
         <uSim>0</uSim>
         <uTrg>1</uTrg>
@@ -101,7 +101,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>19</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>7</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -112,13 +114,13 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile>.\FreeRTOSDemo_ns_debug.ini</tIfile>
-        <pMon>Bin\Nu_Link.dll</pMon>
+        <pMon>NULink\Nu_Link.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>DLGTARM</Key>
-          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=3048,372,3621,908,0)(6000=-1,-1,-1,-1,0)</Name>
+          <Name>(6010=-1,-1,-1,-1,0)(6018=-1,-1,-1,-1,0)(6019=-1,-1,-1,-1,0)(6008=-1,-1,-1,-1,0)(6009=-1,-1,-1,-1,0)(6014=-1,-1,-1,-1,0)(6015=-1,-1,-1,-1,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -504,6 +506,54 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>24</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\non_secure\reg_test_asm.c</PathWithFileName>
+      <FilenameWithoutPath>reg_test_asm.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>25</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\non_secure\reg_test_asm.h</PathWithFileName>
+      <FilenameWithoutPath>reg_test_asm.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>26</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\RegTests\reg_tests.c</PathWithFileName>
+      <FilenameWithoutPath>reg_tests.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>27</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\RegTests\reg_tests.h</PathWithFileName>
+      <FilenameWithoutPath>reg_tests.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>
@@ -514,7 +564,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>24</FileNumber>
+      <FileNumber>28</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvprojx b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvprojx
index b073ae2989..02f216bffa 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvprojx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/FreeRTOSDemo_ns.uvprojx
@@ -10,14 +10,14 @@
       <TargetName>FreeRTOSDemo_ns</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6070000::V6.7::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>M2351KIAAEES</Device>
           <Vendor>Nuvoton</Vendor>
-          <PackID>Nuvoton.NuMicro_DFP.1.3.3</PackID>
-          <PackURL>http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack</PackURL>
+          <PackID>Nuvoton.NuMicro_DFP.1.3.19</PackID>
+          <PackURL>https://github.com/OpenNuvoton/cmsis-packs/raw/master/Nuvoton_DFP/</PackURL>
           <Cpu>IRAM(0x20000000,0x18000) IROM(0x00000000,0x00080000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
@@ -134,7 +134,7 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>4100</DriverSelection>
+            <DriverSelection>4102</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2V8M.DLL</Flash2>
@@ -184,6 +184,9 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <nBranchProt>0</nBranchProt>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -324,6 +327,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>5</v6Lang>
             <v6LangP>0</v6LangP>
@@ -336,7 +340,7 @@
               <MiscControls></MiscControls>
               <Define>DEBUG_PORT=UART0_NS</Define>
               <Undefine></Undefine>
-              <IncludePath>..\Config;..\..\..\..\Common\ARMv8M\tz_demo;..\..\..\..\Common\ARMv8M\mpu_demo;..\..\..\..\..\Source\include;..\..\..\..\..\Source\portable\GCC\ARM_CM23\secure;..\..\..\..\..\Source\portable\GCC\ARM_CM23\non_secure;..\..\..\Nuvoton_Code\StdDriver\inc;..\..\..\Nuvoton_Code\CMSIS\Include;..\..\..\Nuvoton_Code\Device\Nuvoton\M2351\Include</IncludePath>
+              <IncludePath>..\Config;..\..\..\RegTests;..\..\..\..\Common\ARMv8M\tz_demo;..\..\..\..\Common\ARMv8M\mpu_demo;..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\secure;..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\non_secure;..\..\..\..\..\Source\include;..\..\..\..\..\Source\portable\GCC\ARM_CM23\secure;..\..\..\..\..\Source\portable\GCC\ARM_CM23\non_secure;..\..\..\Nuvoton_Code\StdDriver\inc;..\..\..\Nuvoton_Code\CMSIS\Include;..\..\..\Nuvoton_Code\Device\Nuvoton\M2351\Include</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -349,7 +353,7 @@
             <NoWarn>1</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>4</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -515,6 +519,26 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\Common\ARMv8M\tz_demo\tz_demo.c</FilePath>
             </File>
+            <File>
+              <FileName>reg_test_asm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\non_secure\reg_test_asm.c</FilePath>
+            </File>
+            <File>
+              <FileName>reg_test_asm.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\non_secure\reg_test_asm.h</FilePath>
+            </File>
+            <File>
+              <FileName>reg_tests.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\RegTests\reg_tests.c</FilePath>
+            </File>
+            <File>
+              <FileName>reg_tests.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\RegTests\reg_tests.h</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c
index a0590b71b5..c702e95cdd 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c
@@ -35,6 +35,7 @@
 /* Demo includes. */
 #include "tz_demo.h"
 #include "mpu_demo.h"
+#include "reg_tests.h"
 
 /* Externs needed by the MPU setup code. These are defined in Scatter-Loading
  * description file (FreeRTOSDemo_ns.sct). */
@@ -97,10 +98,10 @@ int main( void )
 	DEBUG_PORT->LINE = UART_WORD_LEN_8 | UART_PARITY_NONE | UART_STOP_BIT_1;
 
 	/* Print banner. */
-	printf( "\n" );
-	printf( "+---------------------------------------------+\n" );
-	printf( "|           Nonsecure is running ...          |\n" );
-	printf( "+---------------------------------------------+\n" );
+	printf( "\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
+	printf( "|           Nonsecure is running ...          |\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
 
 	/* Create tasks. */
 	prvCreateTasks();
@@ -126,6 +127,8 @@ static void prvCreateTasks( void )
 	/* Create tasks for the TZ Demo. */
 	vStartTZDemo();
 
+	/* Create tasks for register tests. */
+	vStartRegTests();
 }
 /*-----------------------------------------------------------*/
 
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvoptx b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvoptx
index 09c6368dad..e2fb7fca09 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvoptx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvoptx
@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc</tExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -77,7 +77,7 @@
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
-      <CpuCode>255</CpuCode>
+      <CpuCode>6</CpuCode>
       <DebugOpt>
         <uSim>0</uSim>
         <uTrg>1</uTrg>
@@ -101,7 +101,9 @@
         <sRunDeb>0</sRunDeb>
         <sLrtime>0</sLrtime>
         <bEvRecOn>1</bEvRecOn>
-        <nTsel>19</nTsel>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>7</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -112,7 +114,7 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile>.\FreeRTOSDemo_s_debug.ini</tIfile>
-        <pMon>Bin\Nu_Link.dll</pMon>
+        <pMon>NULink\Nu_Link.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
         <SetRegEntry>
@@ -137,6 +139,14 @@
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
+      <MemoryWindow1>
+        <Mm>
+          <WinNumber>1</WinNumber>
+          <SubType>2</SubType>
+          <ItemText>0x30016060</ItemText>
+          <AccSizeX>0</AccSizeX>
+        </Mm>
+      </MemoryWindow1>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>
@@ -312,6 +322,30 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\secure\secure_reg_test_asm.c</PathWithFileName>
+      <FilenameWithoutPath>secure_reg_test_asm.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>5</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\secure\secure_reg_test_asm.h</PathWithFileName>
+      <FilenameWithoutPath>secure_reg_test_asm.h</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
   <Group>
@@ -322,7 +356,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>10</FileNumber>
+      <FileNumber>12</FileNumber>
       <FileType>5</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -334,7 +368,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>11</FileNumber>
+      <FileNumber>13</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -346,7 +380,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>12</FileNumber>
+      <FileNumber>14</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -358,7 +392,7 @@
     </File>
     <File>
       <GroupNumber>4</GroupNumber>
-      <FileNumber>13</FileNumber>
+      <FileNumber>15</FileNumber>
       <FileType>5</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -378,7 +412,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>14</FileNumber>
+      <FileNumber>16</FileNumber>
       <FileType>5</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -390,7 +424,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>15</FileNumber>
+      <FileNumber>17</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -410,7 +444,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>16</FileNumber>
+      <FileNumber>18</FileNumber>
       <FileType>5</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -422,7 +456,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>17</FileNumber>
+      <FileNumber>19</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -442,7 +476,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>18</FileNumber>
+      <FileNumber>20</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvprojx b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvprojx
index 0d6eb2628b..1f6c9dab0e 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvprojx
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/FreeRTOSDemo_s.uvprojx
@@ -10,14 +10,14 @@
       <TargetName>FreeRTOSDemo_s</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pCCUsed>6070000::V6.7::.\ARMCLANG</pCCUsed>
+      <pCCUsed>6190000::V6.19::ARMCLANG</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
           <Device>M2351KIAAEES</Device>
           <Vendor>Nuvoton</Vendor>
-          <PackID>Nuvoton.NuMicro_DFP.1.3.3</PackID>
-          <PackURL>http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack</PackURL>
+          <PackID>Nuvoton.NuMicro_DFP.1.3.19</PackID>
+          <PackURL>https://github.com/OpenNuvoton/cmsis-packs/raw/master/Nuvoton_DFP/</PackURL>
           <Cpu>IRAM(0x20000000,0x18000) IROM(0x00000000,0x00080000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
@@ -134,7 +134,7 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>4099</DriverSelection>
+            <DriverSelection>4102</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2V8M.DLL</Flash2>
@@ -184,6 +184,9 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <nBranchProt>0</nBranchProt>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -324,6 +327,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>0</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>5</v6Lang>
             <v6LangP>0</v6LangP>
@@ -334,7 +338,7 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls>-mfloat-abi=soft -Wno-documentation -Wno-reserved-id-macro</MiscControls>
-              <Define>DEBUG_PORT = UART1</Define>
+              <Define>DEBUG_PORT = UART0</Define>
               <Undefine></Undefine>
               <IncludePath>..\Config;..\..\Keil;..\..\..\..\Common\ARMv8M\tz_demo;..\..\..\..\..\Source\portable\GCC\ARM_CM23\secure;..\..\..\Nuvoton_Code\StdDriver\inc;..\..\..\Nuvoton_Code\CMSIS\Include;..\..\..\Nuvoton_Code\Device\Nuvoton\M2351\Include</IncludePath>
             </VariousControls>
@@ -349,7 +353,7 @@
             <NoWarn>1</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <uClangAs>0</uClangAs>
+            <ClangAsOpt>4</ClangAsOpt>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>
@@ -435,6 +439,16 @@
               <FileType>1</FileType>
               <FilePath>..\..\..\..\Common\ARMv8M\tz_demo\nsc_functions.c</FilePath>
             </File>
+            <File>
+              <FileName>secure_reg_test_asm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\secure\secure_reg_test_asm.c</FilePath>
+            </File>
+            <File>
+              <FileName>secure_reg_test_asm.h</FileName>
+              <FileType>5</FileType>
+              <FilePath>..\..\..\..\Common\ARMv8M\reg_tests\GCC\ARM_CM23\secure\secure_reg_test_asm.h</FilePath>
+            </File>
           </Files>
         </Group>
         <Group>
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c
index 8d3603f0cd..d247ecc165 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c
@@ -69,10 +69,10 @@ int main(void)
 	prvSetupHardware();
 
 	/* Print banner. */
-	printf( "\n" );
-	printf( "+---------------------------------------------+\n" );
-	printf( "|            Secure is running ...            |\n" );
-	printf( "+---------------------------------------------+\n" );
+	printf( "\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
+	printf( "|            Secure is running ...            |\r\n" );
+	printf( "+---------------------------------------------+\r\n" );
 
 	/* Do not generate Systick interrupt on secure side. */
 	SysTick_Config( 1 );
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.c b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.c
new file mode 100644
index 0000000000..9cda7f753b
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.c
@@ -0,0 +1,373 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Reg test includes. */
+#include "reg_tests.h"
+#include "reg_test_asm.h"
+#include "secure_reg_test_asm.h"
+
+/* Device includes. */
+#include "NuMicro.h"
+
+/*
+ * Functions that implement reg test tasks.
+ */
+static void prvRegTest1_Task( void * pvParameters );
+static void prvRegTest2_Task( void * pvParameters );
+static void prvRegTest_Secure_Task( void * pvParameters );
+static void prvRegTest_NonSecureCallback_Task( void * pvParameters );
+
+/*
+ * Check task periodically checks that reg tests tasks
+ * are running fine.
+ */
+static void prvCheckTask( void * pvParameters );
+/*-----------------------------------------------------------*/
+
+/*
+ * On board LEDs.
+ */
+#define YELLOW_LED  PA11_NS
+#define GREEN_LED   PA10_NS
+
+/*
+ * Priority of the check task.
+ */
+#define CHECK_TASK_PRIORITY                 ( configMAX_PRIORITIES - 1 )
+
+/*
+ * Frequency of check task.
+ */
+#define NO_ERROR_CHECK_TASK_PERIOD          ( pdMS_TO_TICKS( 5000UL ) )
+#define ERROR_CHECK_TASK_PERIOD             ( pdMS_TO_TICKS( 200UL ) )
+
+/*
+ * Parameters passed to reg test tasks.
+ */
+#define REG_TEST_1_TASK_PARAMETER                   ( ( void * ) 0x12345678 )
+#define REG_TEST_2_TASK_PARAMETER                   ( ( void * ) 0x87654321 )
+#define REG_TEST_SECURE_TASK_PARAMETER              ( ( void * ) 0x1234ABCD )
+#define REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER ( ( void * ) 0xABCD1234 )
+/*-----------------------------------------------------------*/
+
+/*
+ * The following variables are used to communicate the status of the register
+ * test tasks to the check task. If the variables keep incrementing, then the
+ * register test tasks have not discovered any errors. If a variable stops
+ * incrementing, then an error has been found.
+ */
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
+volatile unsigned long ulRegTestSecureLoopCounter = 0UL;
+volatile unsigned long ulRegTestNonSecureCallbackLoopCounter = 0UL;
+
+/**
+ * Counter to keep a count of how may times the check task loop has detected
+ * error.
+ */
+volatile unsigned long ulCheckTaskLoops = 0UL;
+/*-----------------------------------------------------------*/
+
+void vStartRegTests( void )
+{
+static StackType_t xRegTest1TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
+static StackType_t xRegTest2TaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
+static StackType_t xRegTestSecureTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
+static StackType_t xRegTestNonSecureCallbackTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
+static StackType_t xCheckTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
+
+TaskParameters_t xRegTest1TaskParameters =
+{
+    .pvTaskCode      = prvRegTest1_Task,
+    .pcName          = "RegTest1",
+    .usStackDepth    = configMINIMAL_STACK_SIZE,
+    .pvParameters    = REG_TEST_1_TASK_PARAMETER,
+    .uxPriority      = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
+    .puxStackBuffer  = xRegTest1TaskStack,
+    .xRegions        =  {
+                            { 0, 0, 0 },
+                            { 0, 0, 0 },
+                            { 0, 0, 0 }
+                        }
+};
+TaskParameters_t xRegTest2TaskParameters =
+{
+    .pvTaskCode      = prvRegTest2_Task,
+    .pcName          = "RegTest2",
+    .usStackDepth    = configMINIMAL_STACK_SIZE,
+    .pvParameters    = REG_TEST_2_TASK_PARAMETER,
+    .uxPriority      = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
+    .puxStackBuffer  = xRegTest2TaskStack,
+    .xRegions        =  {
+                            { 0, 0, 0 },
+                            { 0, 0, 0 },
+                            { 0, 0, 0 }
+                        }
+};
+TaskParameters_t xRegTestSecureTaskParameters =
+{
+    .pvTaskCode      = prvRegTest_Secure_Task,
+    .pcName          = "RegTestSecure",
+    .usStackDepth    = configMINIMAL_STACK_SIZE,
+    .pvParameters    = REG_TEST_SECURE_TASK_PARAMETER,
+    .uxPriority      = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
+    .puxStackBuffer  = xRegTestSecureTaskStack,
+    .xRegions        =  {
+                            { 0, 0, 0 },
+                            { 0, 0, 0 },
+                            { 0, 0, 0 }
+                        }
+};
+TaskParameters_t xRegTestNonSecureCallbackTaskParameters =
+{
+    .pvTaskCode      = prvRegTest_NonSecureCallback_Task,
+    .pcName          = "RegTestNonSecureCallback",
+    .usStackDepth    = configMINIMAL_STACK_SIZE,
+    .pvParameters    = REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER,
+    .uxPriority      = tskIDLE_PRIORITY | portPRIVILEGE_BIT,
+    .puxStackBuffer  = xRegTestNonSecureCallbackTaskStack,
+    .xRegions        =  {
+                            { 0, 0, 0 },
+                            { 0, 0, 0 },
+                            { 0, 0, 0 }
+                        }
+};
+
+TaskParameters_t xCheckTaskParameters =
+{
+    .pvTaskCode      = prvCheckTask,
+    .pcName          = "Check",
+    .usStackDepth    = configMINIMAL_STACK_SIZE,
+    .pvParameters    = NULL,
+    .uxPriority      = ( CHECK_TASK_PRIORITY | portPRIVILEGE_BIT ),
+    .puxStackBuffer  = xCheckTaskStack,
+    .xRegions        =  {
+                            { 0, 0, 0 },
+                            { 0, 0, 0 },
+                            { 0, 0, 0 }
+                        }
+};
+
+    /* Configure pins in output mode to drive external LEDs. */
+    GPIO_SetMode( PA_NS, BIT10 | BIT11, GPIO_MODE_OUTPUT );
+
+    /* Start with both LEDs off. */
+    YELLOW_LED = 1;
+    GREEN_LED = 1;
+
+    xTaskCreateRestricted( &( xRegTest1TaskParameters ), NULL );
+    xTaskCreateRestricted( &( xRegTest2TaskParameters ), NULL );
+    xTaskCreateRestricted( &( xRegTestSecureTaskParameters ), NULL );
+    xTaskCreateRestricted( &( xRegTestNonSecureCallbackTaskParameters ), NULL );
+    xTaskCreateRestricted( &( xCheckTaskParameters ), NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTest1_Task( void * pvParameters )
+{
+    /* Although the reg tests are written in assembly, its entry
+     * point is written in C for convenience of checking that the
+     * task parameter is being passed in correctly. */
+    if( pvParameters == REG_TEST_1_TASK_PARAMETER )
+    {
+        /* Start the part of the test that is written in assembler. */
+        vRegTest1Asm_NonSecure();
+    }
+
+    /* The following line will only execute if the task parameter
+     * is found to be incorrect. The check task will detect that
+     * the reg test loop counter is not being incremented and flag
+     * an error. */
+    vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTest2_Task( void * pvParameters )
+{
+    /* Although the reg tests are written in assembly, its entry
+     * point is written in C for convenience of checking that the
+     * task parameter is being passed in correctly. */
+    if( pvParameters == REG_TEST_2_TASK_PARAMETER )
+    {
+        /* Start the part of the test that is written in assembler. */
+        vRegTest2Asm_NonSecure();
+    }
+
+    /* The following line will only execute if the task parameter
+     * is found to be incorrect. The check task will detect that
+     * the reg test loop counter is not being incremented and flag
+     * an error. */
+    vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTest_Secure_Task( void * pvParameters )
+{
+    /* This task is going to call secure side functions. */
+    portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
+
+    /* Although the reg tests are written in assembly, its entry
+     * point is written in C for convenience of checking that the
+     * task parameter is being passed in correctly. */
+    if( pvParameters == REG_TEST_SECURE_TASK_PARAMETER )
+    {
+        for( ;; )
+        {
+            /* Call the secure side function. This function populates registers
+             * with known values, then forces a context switch while on the
+             * secure side and then verifies that the contents of the registers
+             * are intact. This ensure that the context restoring mechanism
+             * works properly when the interrupted task was in the middle of a
+             * call to a secure side function. */
+            vRegTestAsm_Secure();
+
+            ulRegTestSecureLoopCounter += 1;
+        }
+    }
+
+    /* The following line will only execute if the task parameter
+     * is found to be incorrect. The check task will detect that
+     * the reg test loop counter is not being incremented and flag
+     * an error. */
+    vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTest_NonSecureCallback_Task( void * pvParameters )
+{
+    /* This task is going to call secure side functions. */
+    portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
+
+    /* Although the reg tests are written in assembly, its entry
+     * point is written in C for convenience of checking that the
+     * task parameter is being passed in correctly. */
+    if( pvParameters == REG_TEST_NON_SECURE_CALLBACK_TASK_PARAMETER )
+    {
+        for( ;; )
+        {
+            /* Call the secure side function. This function calls the provided
+             * non-secure callback which in-turn populates registers with
+             * known values, then forces a context switch while on the
+             * non-secure side and then verifies that the contents of the
+             * registers are intact. This ensure that the context restoring
+             * mechanism works properly when the interrupted task was in the
+             * middle of a non-secure callback from the secure side. */
+            vRegTest_NonSecureCallback( vRegTestAsm_NonSecureCallback );
+
+            ulRegTestNonSecureCallbackLoopCounter += 1;
+        }
+    }
+
+    /* The following line will only execute if the task parameter
+     * is found to be incorrect. The check task will detect that
+     * the reg test loop counter is not being incremented and flag
+     * an error. */
+    vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvCheckTask( void * pvParameters )
+{
+TickType_t xDelayPeriod = NO_ERROR_CHECK_TASK_PERIOD;
+TickType_t xLastExecutionTime;
+unsigned long ulErrorFound = pdFALSE;
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
+static unsigned long ulLastRegTestSecureValue = 0, ulLastRegTestNonSecureCallbackValue = 0;
+
+    /* Just to stop compiler warnings. */
+    ( void ) pvParameters;
+
+    /* Initialize xLastExecutionTime so the first call to vTaskDelayUntil()
+     * works correctly. */
+    xLastExecutionTime = xTaskGetTickCount();
+
+    /* Cycle for ever, delaying then checking all the other tasks are still
+     * operating without error.  The onboard LED is toggled on each iteration.
+     * If an error is detected then the delay period is decreased from
+     * mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD.  This has
+     * the effect of increasing the rate at which the onboard LED toggles, and
+     * in so doing gives visual feedback of the system status. */
+    for( ;; )
+    {
+        /* Delay until it is time to execute again. */
+        vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
+
+        /* Check that the register test 1 task is still running. */
+        if( ulLastRegTest1Value == ulRegTest1LoopCounter )
+        {
+            ulErrorFound |= 1UL << 0UL;
+        }
+        ulLastRegTest1Value = ulRegTest1LoopCounter;
+
+        /* Check that the register test 2 task is still running. */
+        if( ulLastRegTest2Value == ulRegTest2LoopCounter )
+        {
+            ulErrorFound |= 1UL << 1UL;
+        }
+        ulLastRegTest2Value = ulRegTest2LoopCounter;
+
+        /* Check that the register test secure task is still running. */
+        if( ulLastRegTestSecureValue == ulRegTestSecureLoopCounter )
+        {
+            ulErrorFound |= 1UL << 2UL;
+        }
+        ulLastRegTestSecureValue = ulRegTestSecureLoopCounter;
+
+        /* Check that the register test non-secure callback task is
+         * still running. */
+        if( ulLastRegTestNonSecureCallbackValue == ulRegTestNonSecureCallbackLoopCounter )
+        {
+            ulErrorFound |= 1UL << 3UL;
+        }
+        ulLastRegTestNonSecureCallbackValue = ulRegTestNonSecureCallbackLoopCounter;
+
+        /* Toggle the green LED to give an indication of the system status.
+         * If the LED toggles every NO_ERROR_CHECK_TASK_PERIOD milliseconds
+         * then everything is ok. A faster toggle indicates an error. */
+        GPIO_TOGGLE( GREEN_LED );
+
+        if( ulErrorFound != pdFALSE )
+        {
+            /* An error has been detected in one of the tasks. */
+            xDelayPeriod = ERROR_CHECK_TASK_PERIOD;
+
+            /* Turn on Yellow LED to indicate error. */
+            YELLOW_LED = 0;
+            printf( "ERROR detected!\r\n" );
+
+            /* Increment error detection count. */
+            ulCheckTaskLoops++;
+        }
+        else
+        {
+            printf( "No errors.\r\n" );
+        }
+    }
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.h b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.h
new file mode 100644
index 0000000000..0837aad72d
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/RegTests/reg_tests.h
@@ -0,0 +1,35 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef REG_TESTS_H
+#define REG_TESTS_H
+
+/**
+ * @brief Creates all the tasks for reg tests.
+ */
+void vStartRegTests( void );
+
+#endif /* REG_TESTS_H */
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.c b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.c
new file mode 100644
index 0000000000..c0af7c5136
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.c
@@ -0,0 +1,312 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * "Reg tests" - These tests fill the registers with known values, then check
+ * that each register maintains its expected value for the lifetime of the
+ * task.  Each task uses a different set of values.  The reg test tasks execute
+ * with a very low priority, so get preempted very frequently.  A register
+ * containing an unexpected value is indicative of an error in the context
+ * switching mechanism.
+ */
+
+#include "reg_test_asm.h"
+/*-----------------------------------------------------------*/
+
+void vRegTest1Asm_NonSecure( void ) /* __attribute__(( naked )) */
+{
+    __asm volatile
+    (
+        ".extern ulRegTest1LoopCounter                              \n"
+        ".syntax unified                                            \n"
+        "                                                           \n"
+        "    /* Fill the core registers with known values. */       \n"
+        "    movs r1, #101                                          \n"
+        "    movs r2, #102                                          \n"
+        "    movs r3, #103                                          \n"
+        "    movs r4, #104                                          \n"
+        "    movs r5, #105                                          \n"
+        "    movs r6, #106                                          \n"
+        "    movs r7, #107                                          \n"
+        "    movs r0, #108                                          \n"
+        "    mov  r8, r0                                            \n"
+        "    movs r0, #109                                          \n"
+        "    mov  r9, r0                                            \n"
+        "    movs r0, #110                                          \n"
+        "    mov  r10, r0                                           \n"
+        "    movs r0, #111                                          \n"
+        "    mov  r11, r0                                           \n"
+        "    movs r0, #112                                          \n"
+        "    mov  r12, r0                                           \n"
+        "    movs r0, #100                                          \n"
+        "                                                           \n"
+        "reg1_loop:                                                 \n"
+        "                                                           \n"
+        " /* Verify that core registers contain correct values. */  \n"
+        "    cmp  r0, #100                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r1, #101                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r2, #102                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r3, #103                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r4, #104                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r5, #105                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r6, #106                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    cmp  r7, #107                                          \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    movs r0, #108                                          \n"
+        "    cmp  r8, r0                                            \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    movs r0, #109                                          \n"
+        "    cmp  r9, r0                                            \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    movs r0, #110                                          \n"
+        "    cmp  r10, r0                                           \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    movs r0, #111                                          \n"
+        "    cmp  r11, r0                                           \n"
+        "    bne  reg1_error_loop                                   \n"
+        "    movs r0, #112                                          \n"
+        "    cmp  r12, r0                                           \n"
+        "    bne  reg1_error_loop                                   \n"
+        "                                                           \n"
+        "    /* Everything passed, inc the loop counter. */         \n"
+        "    push { r1 }                                            \n"
+        "    ldr  r0, =ulRegTest1LoopCounter                        \n"
+        "    ldr  r1, [r0]                                          \n"
+        "    adds r1, r1, #1                                        \n"
+        "    str  r1, [r0]                                          \n"
+        "                                                           \n"
+        "    /* Yield to increase test coverage. */                 \n"
+        "    movs r0, #0x01                                         \n"
+        "    ldr  r1, =0xe000ed04                                   \n" /* NVIC_ICSR. */
+        "    lsls r0, #28                                           \n" /* Shift to PendSV bit. */
+        "    str  r0, [r1]                                          \n"
+        "    dsb                                                    \n"
+        "    pop  { r1 }                                            \n"
+        "                                                           \n"
+        "    /* Start again. */                                     \n"
+        "    movs r0, #100                                          \n"
+        "    b reg1_loop                                            \n"
+        "                                                           \n"
+        "reg1_error_loop:                                           \n"
+        "    /* If this line is hit then there was an error in      \n"
+        "     * a core register value. The loop ensures the         \n"
+        "     * loop counter stops incrementing. */                 \n"
+        "    b reg1_error_loop                                      \n"
+        "    nop                                                    \n"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vRegTest2Asm_NonSecure( void ) /* __attribute__(( naked )) */
+{
+    __asm volatile
+    (
+        ".extern ulRegTest2LoopCounter                              \n"
+        ".syntax unified                                            \n"
+        "                                                           \n"
+        "    /* Fill the core registers with known values. */       \n"
+        "    movs r1, #1                                            \n"
+        "    movs r2, #2                                            \n"
+        "    movs r3, #3                                            \n"
+        "    movs r4, #4                                            \n"
+        "    movs r5, #5                                            \n"
+        "    movs r6, #6                                            \n"
+        "    movs r7, #7                                            \n"
+        "    movs r0, #8                                            \n"
+        "    mov  r8, r0                                            \n"
+        "    movs r0, #9                                            \n"
+        "    mov  r9, r0                                            \n"
+        "    movs r0, #10                                           \n"
+        "    mov  r10, r0                                           \n"
+        "    movs r0, #11                                           \n"
+        "    mov  r11, r0                                           \n"
+        "    movs r0, #12                                           \n"
+        "    mov  r12, r0                                           \n"
+        "    movs r0, #10                                           \n"
+        "                                                           \n"
+        "reg2_loop:                                                 \n"
+        "                                                           \n"
+        " /* Verify that core registers contain correct values. */  \n"
+        "    cmp  r0, #10                                           \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r1, #1                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r2, #2                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r3, #3                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r4, #4                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r5, #5                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r6, #6                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    cmp  r7, #7                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    movs r0, #8                                            \n"
+        "    cmp  r8, r0                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    movs r0, #9                                            \n"
+        "    cmp  r9, r0                                            \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    movs r0, #10                                           \n"
+        "    cmp  r10, r0                                           \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    movs r0, #11                                           \n"
+        "    cmp  r11, r0                                           \n"
+        "    bne  reg2_error_loop                                   \n"
+        "    movs r0, #12                                           \n"
+        "    cmp  r12, r0                                           \n"
+        "    bne  reg2_error_loop                                   \n"
+        "                                                           \n"
+        "    /* Everything passed, inc the loop counter. */         \n"
+        "    push { r1 }                                            \n"
+        "    ldr  r0, =ulRegTest2LoopCounter                        \n"
+        "    ldr  r1, [r0]                                          \n"
+        "    adds r1, r1, #1                                        \n"
+        "    str  r1, [r0]                                          \n"
+        "    pop  { r1 }                                            \n"
+        "                                                           \n"
+        "    /* Start again. */                                     \n"
+        "    movs r0, #10                                           \n"
+        "    b reg2_loop                                            \n"
+        "                                                           \n"
+        "reg2_error_loop:                                           \n"
+        "    /* If this line is hit then there was an error in      \n"
+        "     * a core register value. The loop ensures the         \n"
+        "     * loop counter stops incrementing. */                 \n"
+        "    b reg2_error_loop                                      \n"
+        "    nop                                                    \n"
+    );
+}
+/*-----------------------------------------------------------*/
+
+void vRegTestAsm_NonSecureCallback( void )
+{
+    __asm volatile
+    (
+        ".syntax unified                                                \n"
+        "                                                               \n"
+        "    /* Store callee saved registers. */                        \n"
+        "    push { r4-r7 }                                             \n"
+        "    mov r0, r8                                                 \n"
+        "    mov r1, r9                                                 \n"
+        "    mov r2, r10                                                \n"
+        "    mov r3, r11                                                \n"
+        "    mov r4, r12                                                \n"
+        "    push { r0-r4 }                                             \n"
+        "                                                               \n"
+        "    /* Fill the core registers with known values. */           \n"
+        "    movs r1, #151                                              \n"
+        "    movs r2, #152                                              \n"
+        "    movs r3, #153                                              \n"
+        "    movs r4, #154                                              \n"
+        "    movs r5, #155                                              \n"
+        "    movs r6, #156                                              \n"
+        "    movs r7, #157                                              \n"
+        "    movs r0, #158                                              \n"
+        "    mov  r8, r0                                                \n"
+        "    movs r0, #159                                              \n"
+        "    mov  r9, r0                                                \n"
+        "    movs r0, #160                                              \n"
+        "    mov  r10, r0                                               \n"
+        "    movs r0, #161                                              \n"
+        "    mov  r11, r0                                               \n"
+        "    movs r0, #162                                              \n"
+        "    mov  r12, r0                                               \n"
+        "    movs r0, #150                                              \n"
+        "                                                               \n"
+        "    /* Force a context switch by pending non-secure sv. */     \n"
+        "    push { r0, r1 }                                            \n"
+        "    movs r0, #0x01                                             \n"
+        "    ldr  r1, =0xe000ed04                                       \n" /* NVIC_ICSR. */
+        "    lsls r0, #28                                               \n" /* Shift to PendSV bit. */
+        "    str  r0, [r1]                                              \n"
+        "    dsb                                                        \n"
+        "    pop  { r0, r1 }                                            \n"
+        "                                                               \n"
+        "    /* Verify that core registers contain correct values. */   \n"
+        "    cmp  r0, #150                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r1, #151                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r2, #152                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r3, #153                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r4, #154                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r5, #155                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r6, #156                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    cmp  r7, #157                                              \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    movs r0, #158                                              \n"
+        "    cmp  r8, r0                                                \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    movs r0, #159                                              \n"
+        "    cmp  r9, r0                                                \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    movs r0, #160                                              \n"
+        "    cmp  r10, r0                                               \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    movs r0, #161                                              \n"
+        "    cmp  r11, r0                                               \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "    movs r0, #162                                              \n"
+        "    cmp  r12, r0                                               \n"
+        "    bne  reg_nscb_error_loop                                   \n"
+        "                                                               \n"
+        "    /* Everything passed, finish. */                           \n"
+        "    b reg_nscb_success                                         \n"
+        "                                                               \n"
+        "reg_nscb_error_loop     :                                      \n"
+        "    /* If this line is hit then there was an error in          \n"
+        "     * a core register value. The loop ensures the             \n"
+        "     * loop counter stops incrementing. */                     \n"
+        "    b reg_nscb_error_loop                                      \n"
+        "    nop                                                        \n"
+        "                                                               \n"
+        "reg_nscb_success:                                              \n"
+        "    /* Restore callee saved registers. */                      \n"
+        "    pop { r0-r4 }                                              \n"
+        "    mov r8, r0                                                 \n"
+        "    mov r9, r1                                                 \n"
+        "    mov r10, r2                                                \n"
+        "    mov r11, r3                                                \n"
+        "    mov r12, r4                                                \n"
+        "    pop { r4-r7 }                                              \n"
+    );
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.h b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.h
new file mode 100644
index 0000000000..088f2ce987
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.h
@@ -0,0 +1,46 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef REG_TEST_ASM_H
+#define REG_TEST_ASM_H
+
+/**
+ * @brief Functions that implement reg tests in assembly.
+ *
+ * These are called from the FreeRTOS tasks on the non-secure side.
+ */
+void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
+void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
+
+/**
+ * @brief Function that implements reg tests in assembly.
+ *
+ * This is passed as function pointer to the secure side and called
+ * from the secure side.
+ */
+void vRegTestAsm_NonSecureCallback( void );
+
+#endif /* REG_TEST_ASM_H */
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.c b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.c
new file mode 100644
index 0000000000..2230567e8c
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.c
@@ -0,0 +1,151 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+#include <arm_cmse.h>
+
+/* Interface includes. */
+#include "secure_reg_test_asm.h"
+
+/* FreeRTOS includes. */
+#include "secure_port_macros.h"
+
+/* typedef for non-secure callback function. */
+typedef RegTestCallback_t NonSecureRegTestCallback_t __attribute__( ( cmse_nonsecure_call ) );
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
+{
+    __asm volatile
+    (
+        ".syntax unified                                                \n"
+        "                                                               \n"
+        "    /* Store callee saved registers. */                        \n"
+        "    push { r4-r7 }                                             \n"
+        "    mov r0, r8                                                 \n"
+        "    mov r1, r9                                                 \n"
+        "    mov r2, r10                                                \n"
+        "    mov r3, r11                                                \n"
+        "    mov r4, r12                                                \n"
+        "    push { r0-r4 }                                             \n"
+        "                                                               \n"
+        "    /* Fill the core registers with known values. */           \n"
+        "    movs r1, #201                                              \n"
+        "    movs r2, #202                                              \n"
+        "    movs r3, #203                                              \n"
+        "    movs r4, #204                                              \n"
+        "    movs r5, #205                                              \n"
+        "    movs r6, #206                                              \n"
+        "    movs r7, #207                                              \n"
+        "    movs r0, #208                                              \n"
+        "    mov  r8, r0                                                \n"
+        "    movs r0, #209                                              \n"
+        "    mov  r9, r0                                                \n"
+        "    movs r0, #210                                              \n"
+        "    mov  r10, r0                                               \n"
+        "    movs r0, #211                                              \n"
+        "    mov  r11, r0                                               \n"
+        "    movs r0, #212                                              \n"
+        "    mov  r12, r0                                               \n"
+        "    movs r0, #200                                              \n"
+        "                                                               \n"
+        "    /* Force a context switch by pending non-secure sv. */     \n"
+        "    push { r0, r1 }                                            \n"
+        "    movs r0, #0x01                                             \n"
+        "    ldr  r1, =0xe002ed04                                       \n" /* NVIC_ICSR_NS. */
+        "    lsls r0, #28                                               \n" /* Shift to PendSV bit. */
+        "    str  r0, [r1]                                              \n"
+        "    dsb                                                        \n"
+        "    pop  { r0, r1 }                                            \n"
+        "                                                               \n"
+        "    /* Verify that core registers contain correct values. */   \n"
+        "    cmp  r0, #200                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r1, #201                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r2, #202                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r3, #203                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r4, #204                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r5, #205                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r6, #206                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    cmp  r7, #207                                              \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    movs r0, #208                                              \n"
+        "    cmp  r8, r0                                                \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    movs r0, #209                                              \n"
+        "    cmp  r9, r0                                                \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    movs r0, #210                                              \n"
+        "    cmp  r10, r0                                               \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    movs r0, #211                                              \n"
+        "    cmp  r11, r0                                               \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "    movs r0, #212                                              \n"
+        "    cmp  r12, r0                                               \n"
+        "    bne  secure_reg_test_error_loop                            \n"
+        "                                                               \n"
+        "    /* Everything passed, finish. */                           \n"
+        "    b secure_reg_test_success                                  \n"
+        "                                                               \n"
+        "secure_reg_test_error_loop:                                    \n"
+        "    /* If this line is hit then there was an error in          \n"
+        "     * a core register value. The loop ensures the             \n"
+        "     * loop counter stops incrementing. */                     \n"
+        "    b secure_reg_test_error_loop                               \n"
+        "    nop                                                        \n"
+        "                                                               \n"
+        "secure_reg_test_success:                                       \n"
+        "    /* Restore callee saved registers. */                      \n"
+        "    pop { r0-r4 }                                              \n"
+        "    mov r8, r0                                                 \n"
+        "    mov r9, r1                                                 \n"
+        "    mov r10, r2                                                \n"
+        "    mov r11, r3                                                \n"
+        "    mov r12, r4                                                \n"
+        "    pop { r4-r7 }                                              \n"
+    );
+}
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
+{
+    NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
+
+    /* Return function pointer with cleared LSB. */
+    pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
+
+    /* Invoke the callback which runs reg tests. */
+    pxNonSecureRegTestCallback();
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.h b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.h
new file mode 100644
index 0000000000..3b59c88d23
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.h
@@ -0,0 +1,49 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef SECURE_REG_TEST_ASM_H
+#define SECURE_REG_TEST_ASM_H
+
+/* Callback function pointer definition. */
+typedef void ( * RegTestCallback_t )( void );
+
+/**
+ * @brief Function that implements reg tests for the secure side.
+ *
+ * This function is exported as "non-secure callable" and is called
+ * from a FreeRTOS task on the non-secure side.
+ */
+void vRegTestAsm_Secure( void );
+
+/**
+ * @brief Invokes the supplied reg test callback on the non-secure side.
+ *
+ * This function is exported as "non-secure callable" and is called
+ * from a FreeRTOS task on the non-secure side..
+ */
+void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
+
+#endif /* SECURE_REG_TEST_ASM_H */
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.h b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.h
new file mode 100644
index 0000000000..088f2ce987
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.h
@@ -0,0 +1,46 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef REG_TEST_ASM_H
+#define REG_TEST_ASM_H
+
+/**
+ * @brief Functions that implement reg tests in assembly.
+ *
+ * These are called from the FreeRTOS tasks on the non-secure side.
+ */
+void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
+void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
+
+/**
+ * @brief Function that implements reg tests in assembly.
+ *
+ * This is passed as function pointer to the secure side and called
+ * from the secure side.
+ */
+void vRegTestAsm_NonSecureCallback( void );
+
+#endif /* REG_TEST_ASM_H */
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.s b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.s
new file mode 100644
index 0000000000..630e0540c7
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.s
@@ -0,0 +1,298 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/*
+ * "Reg tests" - These tests fill the registers with known values, then check
+ * that each register maintains its expected value for the lifetime of the
+ * task.  Each task uses a different set of values.  The reg test tasks execute
+ * with a very low priority, so get preempted very frequently.  A register
+ * containing an unexpected value is indicative of an error in the context
+ * switching mechanism.
+ */
+
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
+
+    EXTERN ulRegTest1LoopCounter
+    EXTERN ulRegTest2LoopCounter
+
+    PUBLIC vRegTest1Asm_NonSecure
+    PUBLIC vRegTest2Asm_NonSecure
+    PUBLIC vRegTestAsm_NonSecureCallback
+/*-----------------------------------------------------------*/
+
+vRegTest1Asm_NonSecure:
+    /* Fill the core registers with known values. */
+    movs r1, #101
+    movs r2, #102
+    movs r3, #103
+    movs r4, #104
+    movs r5, #105
+    movs r6, #106
+    movs r7, #107
+    movs r0, #108
+    mov  r8, r0
+    movs r0, #109
+    mov  r9, r0
+    movs r0, #110
+    mov  r10, r0
+    movs r0, #111
+    mov  r11, r0
+    movs r0, #112
+    mov  r12, r0
+    movs r0, #100
+
+    reg1_loop:
+        /* Verify that core registers contain correct values. */
+        cmp  r0, #100
+        bne  reg1_error_loop
+        cmp  r1, #101
+        bne  reg1_error_loop
+        cmp  r2, #102
+        bne  reg1_error_loop
+        cmp  r3, #103
+        bne  reg1_error_loop
+        cmp  r4, #104
+        bne  reg1_error_loop
+        cmp  r5, #105
+        bne  reg1_error_loop
+        cmp  r6, #106
+        bne  reg1_error_loop
+        cmp  r7, #107
+        bne  reg1_error_loop
+        movs r0, #108
+        cmp  r8, r0
+        bne  reg1_error_loop
+        movs r0, #109
+        cmp  r9, r0
+        bne  reg1_error_loop
+        movs r0, #110
+        cmp  r10, r0
+        bne  reg1_error_loop
+        movs r0, #111
+        cmp  r11, r0
+        bne  reg1_error_loop
+        movs r0, #112
+        cmp  r12, r0
+        bne  reg1_error_loop
+
+        /* Everything passed, inc the loop counter. */
+        push { r1 }
+        ldr  r0, =ulRegTest1LoopCounter
+        ldr  r1, [r0]
+        adds r1, r1, #1
+        str  r1, [r0]
+
+        /* Yield to increase test coverage. */
+        movs r0, #0x01
+        ldr  r1, =0xe000ed04    /* NVIC_ICSR. */
+        lsls r0, r0, #28        /* Shift to PendSV bit. */
+        str  r0, [r1]
+        dsb
+        pop  { r1 }
+
+        /* Start again. */
+        movs r0, #100
+        b reg1_loop
+
+    reg1_error_loop:
+        /* If this line is hit then there was an error in
+         * a core register value. The loop ensures the
+         * loop counter stops incrementing. */
+        b reg1_error_loop
+        nop
+/*-----------------------------------------------------------*/
+
+vRegTest2Asm_NonSecure:
+    /* Fill the core registers with known values. */
+    movs r1, #1
+    movs r2, #2
+    movs r3, #3
+    movs r4, #4
+    movs r5, #5
+    movs r6, #6
+    movs r7, #7
+    movs r0, #8
+    mov  r8, r0
+    movs r0, #9
+    mov  r9, r0
+    movs r0, #10
+    mov  r10, r0
+    movs r0, #11
+    mov  r11, r0
+    movs r0, #12
+    mov  r12, r0
+    movs r0, #10
+
+    reg2_loop:
+        /* Verify that core registers contain correct values. */
+        cmp  r0, #10
+        bne  reg2_error_loop
+        cmp  r1, #1
+        bne  reg2_error_loop
+        cmp  r2, #2
+        bne  reg2_error_loop
+        cmp  r3, #3
+        bne  reg2_error_loop
+        cmp  r4, #4
+        bne  reg2_error_loop
+        cmp  r5, #5
+        bne  reg2_error_loop
+        cmp  r6, #6
+        bne  reg2_error_loop
+        cmp  r7, #7
+        bne  reg2_error_loop
+        movs r0, #8
+        cmp  r8, r0
+        bne  reg2_error_loop
+        movs r0, #9
+        cmp  r9, r0
+        bne  reg2_error_loop
+        movs r0, #10
+        cmp  r10, r0
+        bne  reg2_error_loop
+        movs r0, #11
+        cmp  r11, r0
+        bne  reg2_error_loop
+        movs r0, #12
+        cmp  r12, r0
+        bne  reg2_error_loop
+
+        /* Everything passed, inc the loop counter. */
+        push { r1 }
+        ldr  r0, =ulRegTest2LoopCounter
+        ldr  r1, [r0]
+        adds r1, r1, #1
+        str  r1, [r0]
+        pop  { r1 }
+
+        /* Start again. */
+        movs r0, #10
+        b reg2_loop
+
+    reg2_error_loop:
+        /* If this line is hit then there was an error in
+         * a core register value. The loop ensures the
+         * loop counter stops incrementing. */
+        b reg2_error_loop
+        nop
+/*-----------------------------------------------------------*/
+
+vRegTestAsm_NonSecureCallback:
+    /* Store callee saved registers. */
+    push { r4-r7 }
+    mov r0, r8
+    mov r1, r9
+    mov r2, r10
+    mov r3, r11
+    mov r4, r12
+    push { r0-r4 }
+
+    /* Fill the core registers with known values. */
+    movs r1, #151
+    movs r2, #152
+    movs r3, #153
+    movs r4, #154
+    movs r5, #155
+    movs r6, #156
+    movs r7, #157
+    movs r0, #158
+    mov  r8, r0
+    movs r0, #159
+    mov  r9, r0
+    movs r0, #160
+    mov  r10, r0
+    movs r0, #161
+    mov  r11, r0
+    movs r0, #162
+    mov  r12, r0
+    movs r0, #150
+
+    /* Force a context switch by pending non-secure sv. */
+    push { r0, r1 }
+    movs r0, #0x01
+    ldr  r1, =0xe000ed04    /* NVIC_ICSR. */
+    lsls r0, r0, #28        /* Shift to PendSV bit. */
+    str  r0, [r1]
+    dsb
+    pop  { r0, r1 }
+
+    /* Verify that core registers contain correct values. */
+    cmp  r0, #150
+    bne  reg_nscb_error_loop
+    cmp  r1, #151
+    bne  reg_nscb_error_loop
+    cmp  r2, #152
+    bne  reg_nscb_error_loop
+    cmp  r3, #153
+    bne  reg_nscb_error_loop
+    cmp  r4, #154
+    bne  reg_nscb_error_loop
+    cmp  r5, #155
+    bne  reg_nscb_error_loop
+    cmp  r6, #156
+    bne  reg_nscb_error_loop
+    cmp  r7, #157
+    bne  reg_nscb_error_loop
+    movs r0, #158
+    cmp  r8, r0
+    bne  reg_nscb_error_loop
+    movs r0, #159
+    cmp  r9, r0
+    bne  reg_nscb_error_loop
+    movs r0, #160
+    cmp  r10, r0
+    bne  reg_nscb_error_loop
+    movs r0, #161
+    cmp  r11, r0
+    bne  reg_nscb_error_loop
+    movs r0, #162
+    cmp  r12, r0
+    bne  reg_nscb_error_loop
+
+    /* Everything passed, finish. */
+    b reg_nscb_success
+
+    reg_nscb_error_loop:
+        /* If this line is hit then there was an error in
+         * a core register value. The loop ensures the
+         * loop counter stops incrementing. */
+        b reg_nscb_error_loop
+        nop
+
+    reg_nscb_success:
+        /* Restore callee saved registers. */
+        pop { r0-r4 }
+        mov r8, r0
+        mov r9, r1
+        mov r10, r2
+        mov r11, r3
+        mov r12, r4
+        pop { r4-r7 }
+        bx lr
+/*-----------------------------------------------------------*/
+
+    END
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test.c b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test.c
new file mode 100644
index 0000000000..cbef601139
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test.c
@@ -0,0 +1,61 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+#include <arm_cmse.h>
+
+/* Interface includes. */
+#include "secure_reg_test_asm.h"
+
+/* FreeRTOS includes. */
+#include "secure_port_macros.h"
+
+/* Implemented in assembly. */
+extern void vRegTestAsm_SecureImpl( void );
+
+/* typedef for non-secure callback function. */
+typedef __cmse_nonsecure_call void ( * NonSecureRegTestCallback_t ) ( void );
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
+{
+    /* Call the function implemented in assembly. */
+    vRegTestAsm_SecureImpl();
+}
+/*-----------------------------------------------------------*/
+
+secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
+{
+    NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
+
+    /* Return function pointer with cleared LSB. */
+    pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
+
+    /* Invoke the callback which runs reg tests. */
+    pxNonSecureRegTestCallback();
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.h b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.h
new file mode 100644
index 0000000000..3b59c88d23
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.h
@@ -0,0 +1,49 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+#ifndef SECURE_REG_TEST_ASM_H
+#define SECURE_REG_TEST_ASM_H
+
+/* Callback function pointer definition. */
+typedef void ( * RegTestCallback_t )( void );
+
+/**
+ * @brief Function that implements reg tests for the secure side.
+ *
+ * This function is exported as "non-secure callable" and is called
+ * from a FreeRTOS task on the non-secure side.
+ */
+void vRegTestAsm_Secure( void );
+
+/**
+ * @brief Invokes the supplied reg test callback on the non-secure side.
+ *
+ * This function is exported as "non-secure callable" and is called
+ * from a FreeRTOS task on the non-secure side..
+ */
+void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
+
+#endif /* SECURE_REG_TEST_ASM_H */
diff --git a/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.s b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.s
new file mode 100644
index 0000000000..cdb2c0842d
--- /dev/null
+++ b/FreeRTOS/Demo/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.s
@@ -0,0 +1,127 @@
+/*
+ * FreeRTOS V202212.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * https://www.FreeRTOS.org
+ * https://github.com/FreeRTOS
+ *
+ */
+
+    SECTION .text:CODE:NOROOT(2)
+    THUMB
+
+    PUBLIC vRegTestAsm_SecureImpl
+/*-----------------------------------------------------------*/
+
+vRegTestAsm_SecureImpl:
+    /* Store callee saved registers. */
+    push { r4-r7 }
+    mov r0, r8
+    mov r1, r9
+    mov r2, r10
+    mov r3, r11
+    mov r4, r12
+    push { r0-r4 }
+
+    /* Fill the core registers with known values. */
+    movs r1, #201
+    movs r2, #202
+    movs r3, #203
+    movs r4, #204
+    movs r5, #205
+    movs r6, #206
+    movs r7, #207
+    movs r0, #208
+    mov  r8, r0
+    movs r0, #209
+    mov  r9, r0
+    movs r0, #210
+    mov  r10, r0
+    movs r0, #211
+    mov  r11, r0
+    movs r0, #212
+    mov  r12, r0
+    movs r0, #200
+
+    /* Force a context switch by pending non-secure sv. */
+    push { r0, r1 }
+    movs r0, #0x01
+    ldr  r1, =0xe002ed04    /* NVIC_ICSR_NS. */
+    lsls r0, r0, #28        /* Shift to PendSV bit. */
+    str  r0, [r1]
+    dsb
+    pop  { r0, r1 }
+
+    /* Verify that core registers contain correct values. */
+    cmp  r0, #200
+    bne  secure_reg_test_error_loop
+    cmp  r1, #201
+    bne  secure_reg_test_error_loop
+    cmp  r2, #202
+    bne  secure_reg_test_error_loop
+    cmp  r3, #203
+    bne  secure_reg_test_error_loop
+    cmp  r4, #204
+    bne  secure_reg_test_error_loop
+    cmp  r5, #205
+    bne  secure_reg_test_error_loop
+    cmp  r6, #206
+    bne  secure_reg_test_error_loop
+    cmp  r7, #207
+    bne  secure_reg_test_error_loop
+    movs r0, #208
+    cmp  r8, r0
+    bne  secure_reg_test_error_loop
+    movs r0, #209
+    cmp  r9, r0
+    bne  secure_reg_test_error_loop
+    movs r0, #210
+    cmp  r10, r0
+    bne  secure_reg_test_error_loop
+    movs r0, #211
+    cmp  r11, r0
+    bne  secure_reg_test_error_loop
+    movs r0, #212
+    cmp  r12, r0
+    bne  secure_reg_test_error_loop
+
+    /* Everything passed, finish. */
+    b secure_reg_test_success
+
+    secure_reg_test_error_loop:
+        /* If this line is hit then there was an error in
+         * a core register value. The loop ensures the
+         * loop counter stops incrementing. */
+        b secure_reg_test_error_loop
+        nop
+
+    secure_reg_test_success:
+        /* Restore callee saved registers. */
+        pop { r0-r4 }
+        mov r8, r0
+        mov r9, r1
+        mov r10, r2
+        mov r11, r3
+        mov r12, r4
+        pop { r4-r7 }
+        bx lr
+/*-----------------------------------------------------------*/
+
+    END