From 430893f5f89e8c6acd4d1026f314e20109886012 Mon Sep 17 00:00:00 2001 From: Richard Barry Date: Thu, 10 Aug 2006 20:15:54 +0000 Subject: [PATCH] Run the peripheral clock at 48MHz. It was set to 96MHz which was too fast. --- Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM9_STR91X_IAR/main.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h b/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h index c5aadadc5a..84ce2d673d 100644 --- a/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h +++ b/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h @@ -47,7 +47,7 @@ #define configUSE_IDLE_HOOK 0 #define configUSE_TICK_HOOK 0 #define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 96000000 ) -#define configCPU_PERIPH_HZ ( ( unsigned portLONG ) 96000000 ) +#define configCPU_PERIPH_HZ ( ( unsigned portLONG ) 48000000 ) #define configTICK_RATE_HZ ( ( portTickType ) 1000 ) #define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) #define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 180 ) diff --git a/Demo/ARM9_STR91X_IAR/main.c b/Demo/ARM9_STR91X_IAR/main.c index 1bdf0b2162..2c7ab535d2 100644 --- a/Demo/ARM9_STR91X_IAR/main.c +++ b/Demo/ARM9_STR91X_IAR/main.c @@ -228,7 +228,8 @@ static void prvSetupHardware( void ) /* FMI Waite States */ FMI_Config( FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH ); - /* Configure the FPLL = 96MHz */ + /* Configure the FPLL = 96MHz, and APB to 48MHz. */ + SCU_PCLKDivisorConfig( SCU_PCLK_Div2 ); SCU_PLLFactorsConfig( 192, 25, 2 ); SCU_PLLCmd( ENABLE ); SCU_MCLKSourceConfig( SCU_MCLK_PLL );