Second phase of changing the directory that starts Cortex, with one that starts CORTEX.
Richard Barry
14 years ago
parent
7004e0308a
commit
399d8c47c7
@ -0,0 +1,136 @@
|
||||
/*
|
||||
FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS books - available as PDF or paperback *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 1
|
||||
#define configCPU_CLOCK_HZ ( 32000000UL )
|
||||
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
|
||||
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 10 * 1024 ) )
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 5
|
||||
#define configGENERATE_RUN_TIME_STATS 1
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configUSE_RECURSIVE_MUTEXES 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 0
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
|
||||
/* Use the system definition, if there is one */
|
||||
#ifdef __NVIC_PRIO_BITS
|
||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
||||
#else
|
||||
#define configPRIO_BITS 4 /* 15 priority levels */
|
||||
#endif
|
||||
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
||||
|
||||
/* The lowest priority. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
/* Priority 5, or 160 as only the top three bits are implemented. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* Prevent the following definitions being included when FreeRTOSConfig.h
|
||||
is included from an asm file. */
|
||||
#ifdef __ICCARM__
|
||||
#include "stm32l1xx_tim.h"
|
||||
extern void vConfigureTimerForRunTimeStats( void );
|
||||
extern unsigned long ulTIM6_OverflowCount;
|
||||
#endif /* __ICCARM__ */
|
||||
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
|
||||
#define portALT_GET_RUN_TIME_COUNTER_VALUE( ulCountValue ) \
|
||||
{ \
|
||||
TIM_Cmd( TIM6, DISABLE ); \
|
||||
ulCountValue = ( ( ulTIM6_OverflowCount << 16UL ) | ( unsigned long ) TIM6->CNT ); \
|
||||
TIM_Cmd( TIM6, ENABLE ); \
|
||||
}
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
||||
@ -0,0 +1,149 @@
|
||||
/*
|
||||
FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS books - available as PDF or paperback *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Simple parallel port IO routines.
|
||||
*-----------------------------------------------------------*/
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* ST library functions. */
|
||||
#include "stm32l152_eval.h"
|
||||
|
||||
#define partstMAX_OUTPUT_LED 4
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestInitialise( void )
|
||||
{
|
||||
/* Configure the output LEDs. Note that JP18 and JP19 must be closed on
|
||||
the Eval board for LED3 and LED4 to work. */
|
||||
STM_EVAL_LEDInit( LED1 );
|
||||
STM_EVAL_LEDInit( LED2 );
|
||||
STM_EVAL_LEDInit( LED3 );
|
||||
STM_EVAL_LEDInit( LED4 );
|
||||
STM_EVAL_LEDOff( LED1 );
|
||||
STM_EVAL_LEDOff( LED2 );
|
||||
STM_EVAL_LEDOff( LED3 );
|
||||
STM_EVAL_LEDOff( LED4 );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
|
||||
{
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
if( xValue != pdFALSE )
|
||||
{
|
||||
switch( uxLED )
|
||||
{
|
||||
case 0: STM_EVAL_LEDOn( LED1 );
|
||||
break;
|
||||
|
||||
case 1: STM_EVAL_LEDOn( LED2 );
|
||||
break;
|
||||
|
||||
case 2: STM_EVAL_LEDOn( LED3 );
|
||||
break;
|
||||
|
||||
case 3: STM_EVAL_LEDOn( LED4 );
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch( uxLED )
|
||||
{
|
||||
case 0: STM_EVAL_LEDOff( LED1 );
|
||||
break;
|
||||
|
||||
case 1: STM_EVAL_LEDOff( LED2 );
|
||||
break;
|
||||
|
||||
case 2: STM_EVAL_LEDOff( LED3 );
|
||||
break;
|
||||
|
||||
case 3: STM_EVAL_LEDOff( LED4 );
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
switch( uxLED )
|
||||
{
|
||||
case 0: STM_EVAL_LEDToggle( LED1 );
|
||||
break;
|
||||
|
||||
case 1: STM_EVAL_LEDToggle( LED2 );
|
||||
break;
|
||||
|
||||
case 2: STM_EVAL_LEDToggle( LED3 );
|
||||
break;
|
||||
|
||||
case 3: STM_EVAL_LEDToggle( LED4 );
|
||||
break;
|
||||
}
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\RTOSDemo.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@ -0,0 +1,599 @@
|
||||
/*
|
||||
FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS books - available as PDF or paperback *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The documentation page for this demo available on http://www.FreeRTOS.org
|
||||
* documents the hardware configuration required to run this demo. It also
|
||||
* provides more information on the expected demo application behaviour.
|
||||
*
|
||||
* main() creates all the demo application tasks, then starts the scheduler.
|
||||
* A lot of the created tasks are from the pool of "standard demo" tasks. The
|
||||
* web documentation provides more details of the standard demo tasks, which
|
||||
* provide no particular functionality but do provide good examples of how to
|
||||
* use the FreeRTOS API.
|
||||
*
|
||||
* In addition to the standard demo tasks, the following tasks, interrupts and
|
||||
* tests are defined and/or created within this file:
|
||||
*
|
||||
* "LCD" task - The LCD task is a 'gatekeeper' task. It is the only task that
|
||||
* is permitted to access the LCD and therefore ensures access to the LCD is
|
||||
* always serialised and there are no mutual exclusion issues. When a task or
|
||||
* an interrupt wants to write to the LCD, it does not access the LCD directly
|
||||
* but instead sends the message to the LCD task. The LCD task then performs
|
||||
* the actual LCD output. This mechanism also allows interrupts to, in effect,
|
||||
* write to the LCD by sending messages to the LCD task.
|
||||
*
|
||||
* The LCD task is also a demonstration of a 'controller' task design pattern.
|
||||
* Some tasks do not actually send a string to the LCD task directly, but
|
||||
* instead send a command that is interpreted by the LCD task. In a normal
|
||||
* application these commands can be control values or set points, in this
|
||||
* simple example the commands just result in messages being displayed on the
|
||||
* LCD.
|
||||
*
|
||||
* "Button Poll" task - This task polls the state of the 'up' key on the
|
||||
* joystick input device. It uses the vTaskDelay() API function to control
|
||||
* the poll rate to ensure debouncing is not necessary and that the task does
|
||||
* not use all the available CPU processing time.
|
||||
*
|
||||
* Button Interrupt and run time stats display - The select button on the
|
||||
* joystick input device is configured to generate an external interrupt. The
|
||||
* handler for this interrupt sends a message to LCD task, which interprets the
|
||||
* message to mean, firstly write a message to the LCD, and secondly, generate
|
||||
* a table of run time statistics. The run time statistics are displayed as a
|
||||
* table that contains information on how much processing time each task has
|
||||
* been allocated since the application started to execute. This information
|
||||
* is provided both as an absolute time, and as a percentage of the total run
|
||||
* time. The information is displayed in the terminal IO window of the IAR
|
||||
* embedded workbench. The online documentation for this demo shows a screen
|
||||
* shot demonstrating where the run time stats can be viewed.
|
||||
*
|
||||
* Idle Hook - The idle hook is a function that is called on each iteration of
|
||||
* the idle task. In this case it is used to place the processor into a low
|
||||
* power mode. Note however that this application is implemented using standard
|
||||
* components, and is therefore not optimised for low power operation. Lower
|
||||
* power consumption would be achieved by converting polling tasks into event
|
||||
* driven tasks, and slowing the tick interrupt frequency.
|
||||
*
|
||||
* "Check" function called from the tick hook - The tick hook is called during
|
||||
* each tick interrupt. It is called from an interrupt context so must execute
|
||||
* quickly, not attempt to block, and not call any FreeRTOS API functions that
|
||||
* do not end in "FromISR". In this case the tick hook executes a 'check'
|
||||
* function. This only executes every five seconds. Its main function is to
|
||||
* check that all the standard demo tasks are still operational. Each time it
|
||||
* executes it sends a status code to the LCD task. The LCD task interprets the
|
||||
* code and displays an appropriate message - which will be PASS if no tasks
|
||||
* have reported any errors, or a message stating which task has reported an
|
||||
* error.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "queue.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "partest.h"
|
||||
#include "flash.h"
|
||||
#include "dynamic.h"
|
||||
#include "comtest2.h"
|
||||
#include "GenQTest.h"
|
||||
|
||||
/* Eval board includes. */
|
||||
#include "stm32_eval.h"
|
||||
#include "stm32l152_eval_lcd.h"
|
||||
|
||||
/* The priorities assigned to the tasks. */
|
||||
#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainGENERIC_QUEUE_TEST_PRIORITY ( tskIDLE_PRIORITY )
|
||||
|
||||
/* The length of the queue (the number of items the queue can hold) that is used
|
||||
to send messages from tasks and interrupts the the LCD task. */
|
||||
#define mainQUEUE_LENGTH ( 5 )
|
||||
|
||||
/* Codes sent within messages to the LCD task so the LCD task can interpret
|
||||
exactly what the message it just received was. These are sent in the
|
||||
cMessageID member of the message structure (defined below). */
|
||||
#define mainMESSAGE_BUTTON_UP ( 1 )
|
||||
#define mainMESSAGE_BUTTON_SEL ( 2 )
|
||||
#define mainMESSAGE_STATUS ( 3 )
|
||||
|
||||
/* When the cMessageID member of the message sent to the LCD task is
|
||||
mainMESSAGE_STATUS then these definitions are sent in the lMessageValue member
|
||||
of the same message and indicate what the status actually is. */
|
||||
#define mainERROR_DYNAMIC_TASKS ( pdPASS + 1 )
|
||||
#define mainERROR_COM_TEST ( pdPASS + 2 )
|
||||
#define mainERROR_GEN_QUEUE_TEST ( pdPASS + 3 )
|
||||
|
||||
/* Baud rate used by the comtest tasks. */
|
||||
#define mainCOM_TEST_BAUD_RATE ( 115200 )
|
||||
|
||||
/* The LED used by the comtest tasks. See the comtest.c file for more
|
||||
information. */
|
||||
#define mainCOM_TEST_LED ( 3 )
|
||||
|
||||
/* The LCD task uses printf() so requires more stack than most of the other
|
||||
tasks. */
|
||||
#define mainLCD_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* System configuration is performed prior to main() being called, this function
|
||||
* configures the peripherals used by the demo application.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
|
||||
/*
|
||||
* Definition of the LCD/controller task described in the comments at the top
|
||||
* of this file.
|
||||
*/
|
||||
static void prvLCDTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Definition of the button poll task described in the comments at the top of
|
||||
* this file.
|
||||
*/
|
||||
static void prvButtonPollTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Converts a status message value into an appropriate string for display on
|
||||
* the LCD. The string is written to pcBuffer.
|
||||
*/
|
||||
static void prvGenerateStatusMessage( char *pcBuffer, long lStatusValue );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The time base for the run time stats is generated by the 16 bit timer 6.
|
||||
Each time the timer overflows ulTIM6_OverflowCount is incremented. Therefore,
|
||||
when converting the total run time to a 32 bit number, the most significant two
|
||||
bytes are given by ulTIM6_OverflowCount and the least significant two bytes are
|
||||
given by the current TIM6 counter value. Care must be taken with data
|
||||
consistency when combining the two in case a timer overflow occurs as the
|
||||
value is being read. */
|
||||
unsigned long ulTIM6_OverflowCount = 0UL;
|
||||
|
||||
/* The handle of the queue used to send messages from tasks and interrupts to
|
||||
the LCD task. */
|
||||
static xQueueHandle xLCDQueue = NULL;
|
||||
|
||||
/* The definition of each message sent from tasks and interrupts to the LCD
|
||||
task. */
|
||||
typedef struct
|
||||
{
|
||||
char cMessageID; /* << States what the message is. */
|
||||
long lMessageValue; /* << States the message value (can be an integer, string pointer, etc. depending on the value of cMessageID). */
|
||||
} xQueueMessage;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void main( void )
|
||||
{
|
||||
/* Configure the peripherals used by this demo application. This includes
|
||||
configuring the joystick input select button to generate interrupts. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* Create the queue used by tasks and interrupts to send strings to the LCD
|
||||
task. */
|
||||
xLCDQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( xQueueMessage ) );
|
||||
|
||||
/* If the queue could not be created then don't create any tasks that might
|
||||
attempt to use the queue. */
|
||||
if( xLCDQueue != NULL )
|
||||
{
|
||||
/* Add the created queue to the queue registry so it can be viewed in
|
||||
the IAR FreeRTOS state viewer plug-in. */
|
||||
vQueueAddToRegistry( xLCDQueue, "LCDQueue" );
|
||||
|
||||
/* Create the LCD and button poll tasks, as described at the top of this
|
||||
file. */
|
||||
xTaskCreate( prvLCDTask, ( signed char * ) "LCD", mainLCD_TASK_STACK_SIZE, NULL, mainLCD_TASK_PRIORITY, NULL );
|
||||
xTaskCreate( prvButtonPollTask, ( signed char * ) "ButPoll", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
|
||||
|
||||
/* Create a subset of the standard demo tasks. */
|
||||
vStartDynamicPriorityTasks();
|
||||
vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY );
|
||||
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
|
||||
vStartGenericQueueTasks( mainGENERIC_QUEUE_TEST_PRIORITY );
|
||||
|
||||
/* Start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
}
|
||||
|
||||
/* If all is well then this line will never be reached. If it is reached
|
||||
then it is likely that there was insufficient (FreeRTOS) heap memory space
|
||||
to create the idle task. This may have been trapped by the malloc() failed
|
||||
hook function, if one is configured. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvLCDTask( void *pvParameters )
|
||||
{
|
||||
xQueueMessage xReceivedMessage;
|
||||
long lLine = Line1;
|
||||
const long lFontHeight = (((sFONT *)LCD_GetFont())->Height);
|
||||
|
||||
/* Buffer into which strings are formatted and placed ready for display on the
|
||||
LCD. Note this is a static variable to prevent it being allocated on the task
|
||||
stack, which is too small to hold such a variable. The stack size is configured
|
||||
when the task is created. */
|
||||
static char cBuffer[ 512 ];
|
||||
|
||||
/* This function is the only function that uses printf(). If printf() is
|
||||
used from any other function then some sort of mutual exclusion on stdout
|
||||
will be necessary.
|
||||
|
||||
This is also the only function that is permitted to access the LCD.
|
||||
|
||||
First print out the number of bytes that remain in the FreeRTOS heap. This
|
||||
can be viewed in the terminal IO window within the IAR Embedded Workbench. */
|
||||
printf( "%d bytes of heap space remain unallocated\n", xPortGetFreeHeapSize() );
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Wait for a message to be received. Using portMAX_DELAY as the block
|
||||
time will result in an indefinite wait provided INCLUDE_vTaskSuspend is
|
||||
set to 1 in FreeRTOSConfig.h, therefore there is no need to check the
|
||||
function return value and the function will only return when a value
|
||||
has been received. */
|
||||
xQueueReceive( xLCDQueue, &xReceivedMessage, portMAX_DELAY );
|
||||
|
||||
/* Clear the LCD if no room remains for any more text output. */
|
||||
if( lLine > Line9 )
|
||||
{
|
||||
LCD_Clear( Blue );
|
||||
lLine = 0;
|
||||
}
|
||||
|
||||
/* What is this message? What does it contain? */
|
||||
switch( xReceivedMessage.cMessageID )
|
||||
{
|
||||
case mainMESSAGE_BUTTON_UP : /* The button poll task has just
|
||||
informed this task that the up
|
||||
button on the joystick input has
|
||||
been pressed or released. */
|
||||
sprintf( cBuffer, "Button up = %d", xReceivedMessage.lMessageValue );
|
||||
break;
|
||||
|
||||
case mainMESSAGE_BUTTON_SEL : /* The select button interrupt
|
||||
just informed this task that the
|
||||
select button was pressed.
|
||||
Generate a table of task run time
|
||||
statistics and output this to
|
||||
the terminal IO window in the IAR
|
||||
embedded workbench. */
|
||||
printf( "\nTask\t Abs Time\t %%Time\n*****************************************" );
|
||||
vTaskGetRunTimeStats( ( signed char * ) cBuffer );
|
||||
printf( cBuffer );
|
||||
|
||||
/* Also print out a message to
|
||||
the LCD - in this case the
|
||||
pointer to the string to print
|
||||
is sent directly in the
|
||||
lMessageValue member of the
|
||||
message. This just demonstrates
|
||||
a different communication
|
||||
technique. */
|
||||
sprintf( cBuffer, "%s", ( char * ) xReceivedMessage.lMessageValue );
|
||||
break;
|
||||
|
||||
case mainMESSAGE_STATUS : /* The tick interrupt hook
|
||||
function has just informed this
|
||||
task of the system status.
|
||||
Generate a string in accordance
|
||||
with the status value. */
|
||||
prvGenerateStatusMessage( cBuffer, xReceivedMessage.lMessageValue );
|
||||
break;
|
||||
|
||||
default : sprintf( cBuffer, "Unknown message" );
|
||||
break;
|
||||
}
|
||||
|
||||
/* Output the message that was placed into the cBuffer array within the
|
||||
switch statement above. */
|
||||
LCD_DisplayStringLine( lLine, ( uint8_t * ) cBuffer );
|
||||
|
||||
/* Move onto the next LCD line, ready for the next iteration of this
|
||||
loop. */
|
||||
lLine += lFontHeight;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvGenerateStatusMessage( char *pcBuffer, long lStatusValue )
|
||||
{
|
||||
/* Just a utility function to convert a status value into a meaningful
|
||||
string for output onto the LCD. */
|
||||
switch( lStatusValue )
|
||||
{
|
||||
case pdPASS : sprintf( pcBuffer, "Task status = PASS" );
|
||||
break;
|
||||
case mainERROR_DYNAMIC_TASKS : sprintf( pcBuffer, "Error: Dynamic tasks" );
|
||||
break;
|
||||
case mainERROR_COM_TEST : sprintf( pcBuffer, "Err: loop connected?" ); /* Error in COM test - is the Loopback connector connected? */
|
||||
break;
|
||||
case mainERROR_GEN_QUEUE_TEST : sprintf( pcBuffer, "Error: Gen Q test" );
|
||||
break;
|
||||
default : sprintf( pcBuffer, "Unknown status" );
|
||||
break;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void EXTI9_5_IRQHandler( void )
|
||||
{
|
||||
/* Define the message sent to the LCD task from this interrupt. */
|
||||
const xQueueMessage xMessage = { mainMESSAGE_BUTTON_SEL, ( unsigned long ) "Select Interrupt!" };
|
||||
long lHigherPriorityTaskWoken = pdFALSE;
|
||||
|
||||
/* This is the interrupt handler for the joystick select button input.
|
||||
The button has been pushed, write a message to the LCD via the LCD task. */
|
||||
xQueueSendFromISR( xLCDQueue, &xMessage, &lHigherPriorityTaskWoken );
|
||||
|
||||
EXTI_ClearITPendingBit( SEL_BUTTON_EXTI_LINE );
|
||||
|
||||
/* If writing to xLCDQueue caused a task to unblock, and the unblocked task
|
||||
has a priority equal to or above the task that this interrupt interrupted,
|
||||
then lHigherPriorityTaskWoken will have been set to pdTRUE internally within
|
||||
xQueuesendFromISR(), and portEND_SWITCHING_ISR() will ensure that this
|
||||
interrupt returns directly to the higher priority unblocked task. */
|
||||
portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationTickHook( void )
|
||||
{
|
||||
static unsigned long ulCounter = 0;
|
||||
static const unsigned long ulCheckFrequency = 5000UL / portTICK_RATE_MS;
|
||||
long lHigherPriorityTaskWoken = pdFALSE;
|
||||
|
||||
/* Define the status message that is sent to the LCD task. By default the
|
||||
status is PASS. */
|
||||
static xQueueMessage xStatusMessage = { mainMESSAGE_STATUS, pdPASS };
|
||||
|
||||
/* This is called from within the tick interrupt and performs the 'check'
|
||||
functionality as described in the comments at the top of this file.
|
||||
|
||||
Is it time to perform the 'check' functionality again? */
|
||||
ulCounter++;
|
||||
if( ulCounter >= ulCheckFrequency )
|
||||
{
|
||||
/* See if the standard demo tasks are executing as expected, changing
|
||||
the message that is sent to the LCD task from PASS to an error code if
|
||||
any tasks set reports an error. */
|
||||
if( xAreDynamicPriorityTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatusMessage.lMessageValue = mainERROR_DYNAMIC_TASKS;
|
||||
}
|
||||
|
||||
if( xAreComTestTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatusMessage.lMessageValue = mainERROR_COM_TEST;
|
||||
}
|
||||
|
||||
if( xAreGenericQueueTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatusMessage.lMessageValue = mainERROR_GEN_QUEUE_TEST;
|
||||
}
|
||||
|
||||
/* As this is the tick hook the lHigherPriorityTaskWoken parameter is not
|
||||
needed (a context switch is going to be performed anyway), but it must
|
||||
still be provided. */
|
||||
xQueueSendFromISR( xLCDQueue, &xStatusMessage, &lHigherPriorityTaskWoken );
|
||||
ulCounter = 0;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvButtonPollTask( void *pvParameters )
|
||||
{
|
||||
long lLastState = pdTRUE;
|
||||
long lState;
|
||||
xQueueMessage xMessage;
|
||||
|
||||
/* This tasks performs the button polling functionality as described at the
|
||||
top of this file. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Check the button state. */
|
||||
lState = STM_EVAL_PBGetState( BUTTON_UP );
|
||||
if( lState != lLastState )
|
||||
{
|
||||
/* The state has changed, send a message to the LCD task. */
|
||||
xMessage.cMessageID = mainMESSAGE_BUTTON_UP;
|
||||
xMessage.lMessageValue = lState;
|
||||
lLastState = lState;
|
||||
xQueueSend( xLCDQueue, &xMessage, portMAX_DELAY );
|
||||
}
|
||||
|
||||
/* Block for 10 milliseconds so this task does not utilise all the CPU
|
||||
time and debouncing of the button is not necessary. */
|
||||
vTaskDelay( 10 / portTICK_RATE_MS );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Ensure that all 4 interrupt priority bits are used as the pre-emption
|
||||
priority. */
|
||||
NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 );
|
||||
|
||||
/* Initialise the LEDs. */
|
||||
vParTestInitialise();
|
||||
|
||||
/* Initialise the joystick inputs. */
|
||||
STM_EVAL_PBInit( BUTTON_UP, BUTTON_MODE_GPIO );
|
||||
STM_EVAL_PBInit( BUTTON_DOWN, BUTTON_MODE_GPIO );
|
||||
STM_EVAL_PBInit( BUTTON_LEFT, BUTTON_MODE_GPIO );
|
||||
STM_EVAL_PBInit( BUTTON_RIGHT, BUTTON_MODE_GPIO );
|
||||
|
||||
/* The select button in the middle of the joystick is configured to generate
|
||||
an interrupt. The Eval board library will configure the interrupt
|
||||
priority to be the lowest priority available so the priority need not be
|
||||
set here explicitly. It is important that the priority is equal to or
|
||||
below that set by the configMAX_SYSCALL_INTERRUPT_PRIORITY value set in
|
||||
FreeRTOSConfig.h. */
|
||||
STM_EVAL_PBInit( BUTTON_SEL, BUTTON_MODE_EXTI );
|
||||
|
||||
/* Initialize the LCD */
|
||||
STM32L152_LCD_Init();
|
||||
LCD_Clear( Blue );
|
||||
LCD_SetBackColor( Blue );
|
||||
LCD_SetTextColor( White );
|
||||
LCD_DisplayStringLine( Line0, " www.FreeRTOS.org" );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vConfigureTimerForRunTimeStats( void )
|
||||
{
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
/* The time base for the run time stats is generated by the 16 bit timer 6.
|
||||
Each time the timer overflows ulTIM6_OverflowCount is incremented.
|
||||
Therefore, when converting the total run time to a 32 bit number, the most
|
||||
significant two bytes are given by ulTIM6_OverflowCount and the least
|
||||
significant two bytes are given by the current TIM6 counter value. Care
|
||||
must be taken with data consistency when combining the two in case a timer
|
||||
overflow occurs as the value is being read.
|
||||
|
||||
The portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro (in FreeRTOSConfig.h) is
|
||||
defined to call this function, so the kernel will call this function
|
||||
automatically at the appropriate time. */
|
||||
|
||||
/* TIM6 clock enable */
|
||||
RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM6, ENABLE );
|
||||
|
||||
/* The 32MHz clock divided by 5000 should tick (very) approximately every
|
||||
150uS and overflow a 16bit timer (very) approximately every 10 seconds. */
|
||||
TIM_TimeBaseStructure.TIM_Period = 65535;
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = 5000;
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
|
||||
TIM_TimeBaseInit( TIM6, &TIM_TimeBaseStructure );
|
||||
|
||||
/* Only interrupt on overflow events. */
|
||||
TIM6->CR1 |= TIM_CR1_URS;
|
||||
|
||||
/* Enable the interrupt. */
|
||||
TIM_ITConfig( TIM6, TIM_IT_Update, ENABLE );
|
||||
|
||||
/* Enable the TIM6 global Interrupt */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_LOWEST_INTERRUPT_PRIORITY;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00; /* Not used as 4 bits are used for the pre-emption priority. */
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
TIM_ClearITPendingBit( TIM6, TIM_IT_Update );
|
||||
TIM_Cmd( TIM6, ENABLE );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void TIM6_IRQHandler( void )
|
||||
{
|
||||
/* Interrupt handler for TIM 6
|
||||
|
||||
The time base for the run time stats is generated by the 16 bit timer 6.
|
||||
Each time the timer overflows ulTIM6_OverflowCount is incremented.
|
||||
Therefore, when converting the total run time to a 32 bit number, the most
|
||||
significant two bytes are given by ulTIM6_OverflowCount and the least
|
||||
significant two bytes are given by the current TIM6 counter value. Care
|
||||
must be taken with data consistency when combining the two in case a timer
|
||||
overflow occurs as the value is being read. */
|
||||
if( TIM_GetITStatus( TIM6, TIM_IT_Update) != RESET)
|
||||
{
|
||||
ulTIM6_OverflowCount++;
|
||||
TIM_ClearITPendingBit( TIM6, TIM_IT_Update );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName )
|
||||
{
|
||||
( void ) pcTaskName;
|
||||
( void ) pxTask;
|
||||
|
||||
/* Run time stack overflow checking is performed if
|
||||
configconfigCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
|
||||
function is called if a stack overflow is detected. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationMallocFailedHook( void )
|
||||
{
|
||||
/* Called if a call to pvPortMalloc() fails because there is insufficient
|
||||
free memory available in the FreeRTOS heap. pvPortMalloc() is called
|
||||
internally by FreeRTOS API functions that create tasks, queues or
|
||||
semaphores. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationIdleHook( void )
|
||||
{
|
||||
/* Called on each iteration of the idle task. In this case the idle task
|
||||
just enters a low(ish) power mode. */
|
||||
PWR_EnterSleepMode( PWR_Regulator_ON, PWR_SLEEPEntry_WFI );
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,246 @@
|
||||
/*
|
||||
FreeRTOS V6.1.0 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS books - available as PDF or paperback *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
/*
|
||||
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
|
||||
|
||||
***Note*** This example uses queues to send each character into an interrupt
|
||||
service routine and out of an interrupt service routine individually. This
|
||||
is done to demonstrate queues being used in an interrupt, and to deliberately
|
||||
load the system to test the FreeRTOS port. It is *NOT* meant to be an
|
||||
example of an efficient implementation. An efficient implementation should
|
||||
use FIFO's or DMA if available, and only use FreeRTOS API functions when
|
||||
enough has been received to warrant a task being unblocked to process the
|
||||
data.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "semphr.h"
|
||||
#include "comtest2.h"
|
||||
|
||||
/* Library includes. */
|
||||
#include "stm32l152_eval.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Misc defines. */
|
||||
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
|
||||
#define serNO_BLOCK ( ( portTickType ) 0 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The queue used to hold received characters. */
|
||||
static xQueueHandle xRxedChars;
|
||||
static xQueueHandle xCharsForTx;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* See the serial2.h header file.
|
||||
*/
|
||||
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
|
||||
{
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
xComPortHandle xReturn;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
/* Create the queues used to hold Rx/Tx characters. */
|
||||
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
|
||||
/* If the queues were created correctly then setup the serial port
|
||||
hardware. */
|
||||
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
|
||||
{
|
||||
USART_InitStructure.USART_BaudRate = ulWantedBaud;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
|
||||
/* The Eval board COM2 is being used, which in reality is the STM32
|
||||
USART3. */
|
||||
STM_EVAL_COMInit( COM2, &USART_InitStructure );
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; /* Not used as 4 bits are used for the pre-emption priority. */;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init( &NVIC_InitStructure );
|
||||
USART_ITConfig( USART3, USART_IT_RXNE, ENABLE );
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = ( xComPortHandle ) 0;
|
||||
}
|
||||
|
||||
/* This demo file only supports a single port but we have to return
|
||||
something to comply with the standard demo header file. */
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
|
||||
{
|
||||
/* The port handle is not required as this driver only supports one port. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Get the next character from the buffer. Return false if no characters
|
||||
are available, or arrive before xBlockTime expires. */
|
||||
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
|
||||
{
|
||||
return pdTRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return pdFALSE;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
|
||||
{
|
||||
signed portCHAR *pxNext;
|
||||
|
||||
/* A couple of parameters that this port does not use. */
|
||||
( void ) usStringLength;
|
||||
( void ) pxPort;
|
||||
|
||||
/* NOTE: This implementation does not handle the queue being full as no
|
||||
block time is used! */
|
||||
|
||||
/* The port handle is not required as this driver only supports UART1. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Send each character in the string, one at a time. */
|
||||
pxNext = ( signed portCHAR * ) pcString;
|
||||
while( *pxNext )
|
||||
{
|
||||
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
|
||||
pxNext++;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
|
||||
{
|
||||
signed portBASE_TYPE xReturn;
|
||||
|
||||
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )
|
||||
{
|
||||
xReturn = pdPASS;
|
||||
USART_ITConfig( USART3, USART_IT_TXE, ENABLE );
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = pdFAIL;
|
||||
}
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialClose( xComPortHandle xPort )
|
||||
{
|
||||
/* Not supported as not required by the demo application. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void USART3_IRQHandler( void )
|
||||
{
|
||||
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||
portCHAR cChar;
|
||||
|
||||
if( USART_GetITStatus( USART3, USART_IT_TXE ) == SET )
|
||||
{
|
||||
/* The interrupt was caused by the TX register becoming empty. Are
|
||||
there any more characters to transmit? */
|
||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||
{
|
||||
/* A character was retrieved from the queue so can be sent to the
|
||||
USART now. */
|
||||
USART_SendData( USART3, cChar );
|
||||
}
|
||||
else
|
||||
{
|
||||
USART_ITConfig( USART3, USART_IT_TXE, DISABLE );
|
||||
}
|
||||
}
|
||||
|
||||
if( USART_GetITStatus( USART3, USART_IT_RXNE ) == SET )
|
||||
{
|
||||
/* A character has been received on the USART, send it to the Rx
|
||||
handler task. */
|
||||
cChar = USART_ReceiveData( USART3 );
|
||||
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||
}
|
||||
|
||||
/* If sending or receiving from a queue has caused a task to unblock, and
|
||||
the unblocked task has a priority equal to or higher than the currently
|
||||
running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
|
||||
will have automatically been set to pdTRUE within the queue send or receive
|
||||
function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
|
||||
directly to the higher priority unblocked task. */
|
||||
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@ -0,0 +1,15 @@
|
||||
@REM This batch file has been generated by the IAR Embedded Workbench
|
||||
@REM C-SPY Debugger, as an aid to preparing a command line for running
|
||||
@REM the cspybat command line utility using the appropriate settings.
|
||||
@REM
|
||||
@REM You can launch cspybat by typing the name of this batch file followed
|
||||
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
|
||||
@REM Note that this file is generated every time a new debug session
|
||||
@REM is initialized, so you may want to move or rename the file before
|
||||
@REM making changes.
|
||||
@REM
|
||||
|
||||
|
||||
"C:\devtools\IAR Systems\Embedded Workbench 6.0\common\bin\cspybat" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armproc.dll" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armjlink.dll" %1 --plugin "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armbat.dll" --flash_loader "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\config\flashloader\ST\FlashSTM32L15xxB.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\CONFIG\debugger\ST\iostm32l152xx.ddf" "--semihosting" "--device=STM32L152xB" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000"
|
||||
|
||||
|
||||
@ -0,0 +1,68 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<Project>
|
||||
<Desktop>
|
||||
<Static>
|
||||
<Debug-Log>
|
||||
|
||||
|
||||
<PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1622</ColumnWidth1></Debug-Log>
|
||||
<Build>
|
||||
<ColumnWidth0>20</ColumnWidth0>
|
||||
<ColumnWidth1>1216</ColumnWidth1>
|
||||
<ColumnWidth2>324</ColumnWidth2>
|
||||
<ColumnWidth3>81</ColumnWidth3>
|
||||
<PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Debug-Log</Factory></Window></Windows></PreferedWindows></Build>
|
||||
<Workspace>
|
||||
<ColumnWidths>
|
||||
|
||||
|
||||
|
||||
|
||||
<Column0>332</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
</Workspace>
|
||||
<Disassembly>
|
||||
<PreferedWindows>
|
||||
|
||||
|
||||
|
||||
|
||||
<Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows>
|
||||
|
||||
|
||||
|
||||
<MixedMode>1</MixedMode><CodeCovShow>1</CodeCovShow><InstrProfShow>1</InstrProfShow></Disassembly>
|
||||
<Watch><Format><struct_types/><watch_formats><Fmt><Key>{W}Watch-0:tmppre</Key><Value>1</Value></Fmt></watch_formats></Format><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>151</Column0><Column1>148</Column1><Column2>100</Column2><Column3>100</Column3></Watch><QuickWatch><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>208</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></QuickWatch><TerminalIO><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><InputSource>1</InputSource><InputMode>10</InputMode><Filename>$PROJ_DIR$\TermIOInput.txt</Filename><InputEcho>1</InputEcho><ShowReset>0</ShowReset></TerminalIO><TASKVIEW><Column0>200</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3><Column4>100</Column4><Column5>100</Column5><Column6>100</Column6><Column7>150</Column7></TASKVIEW><QUEUEVIEW><Column0>300</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3><Column4>100</Column4><Column5>100</Column5><Column6>100</Column6></QUEUEVIEW><Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><CallStack><PreferedWindows><Position>1</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ViewArgs>1</ViewArgs></CallStack></Static>
|
||||
<Windows>
|
||||
|
||||
|
||||
<Wnd0>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-15530-21362</Identity>
|
||||
<TabName>Workspace</TabName>
|
||||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS_Source</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS_Source/Portable</ExpandedNode><ExpandedNode>RTOSDemo/Standard_Demo_Code</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd0><Wnd1><Tabs><Tab><Identity>TabID-10464-23570</Identity><TabName>Tasks</TabName><Factory>TASKVIEW</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd1><Wnd2><Tabs><Tab><Identity>TabID-31438-23586</Identity><TabName>Queues</TabName><Factory>QUEUEVIEW</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-15541-875</Identity><TabName>Terminal I/O</TabName><Factory>TerminalIO</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>219</YPos><SelStart>10728</SelStart><SelEnd>10728</SelEnd></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\queue.c</Filename><XPos>0</XPos><YPos>1035</YPos><SelStart>35647</SelStart><SelEnd>35647</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-012aad60><key>iaridepm.enu1</key></Toolbar-012aad60><Toolbar-09947288><key>debuggergui.enu1</key></Toolbar-09947288></Sizes></Row0><Row1><Sizes><Toolbar-06af74f0><key>armjlink.enu1</key></Toolbar-06af74f0></Sizes></Row1></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>659</Bottom><Right>406</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>242857</sizeVertCX><sizeVertCY>673116</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>659</Bottom><Right>436</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>260714</sizeVertCX><sizeVertCY>673116</sizeVertCY></Rect></Wnd3></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>172</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>174</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>177189</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0><Row1><Sizes><Wnd2><Rect><Top>170</Top><Left>-2</Left><Bottom>255</Bottom><Right>1682</Right><x>-2</x><y>170</y><xscreen>1684</xscreen><yscreen>85</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>86558</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row1></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Project>
|
||||
|
||||
|
||||
@ -0,0 +1,105 @@
|
||||
[DebugChecksum]
|
||||
Checksum=1802430239
|
||||
[DisAssemblyWindow]
|
||||
NumStates=_ 1
|
||||
State 1=_ 1
|
||||
[InstructionProfiling]
|
||||
Enabled=_ 0
|
||||
[CodeCoverage]
|
||||
Enabled=_ 0
|
||||
[Profiling]
|
||||
Enabled=0
|
||||
[Exceptions]
|
||||
StopOnUncaught=_ 0
|
||||
StopOnThrow=_ 0
|
||||
[StackPlugin]
|
||||
Enabled=1
|
||||
OverflowWarningsEnabled=1
|
||||
WarningThreshold=90
|
||||
SpWarningsEnabled=1
|
||||
WarnHow=0
|
||||
UseTrigger=1
|
||||
TriggerName=main
|
||||
LimitSize=0
|
||||
ByteLimit=50
|
||||
[SWOTraceHWSettings]
|
||||
CpuClock=32000000
|
||||
ClockAutoDetect=1
|
||||
ClockWanted=6000000
|
||||
JtagSpeed=2000000
|
||||
Prescaler=16
|
||||
TimeStampPrescIndex=0
|
||||
TimeStampPrescData=0
|
||||
PcSampCYCTAP=1
|
||||
PcSampPOSTCNT=15
|
||||
PcSampIndex=0
|
||||
DataLogMode=0
|
||||
ITMportsEnable=1
|
||||
ITMportsTermIO=1
|
||||
ITMportsLogFile=0
|
||||
ITMlogFile=$PROJ_DIR$\ITM.log
|
||||
[Interrupts]
|
||||
Enabled=1
|
||||
[MemoryMap]
|
||||
Enabled=0
|
||||
Base=0
|
||||
UseAuto=0
|
||||
TypeViolation=1
|
||||
UnspecRange=1
|
||||
ActionState=1
|
||||
[TraceHelper]
|
||||
Enabled=0
|
||||
ShowSource=1
|
||||
[DataLog]
|
||||
LogEnabled=0
|
||||
SumEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
ShowTimeSum=1
|
||||
[InterruptLog]
|
||||
LogEnabled=0
|
||||
SumEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
ShowTimeSum=1
|
||||
SumSortOrder=0
|
||||
[PowerLog]
|
||||
LogEnabled=0
|
||||
GraphEnabled=0
|
||||
ShowTimeLog=1
|
||||
ShowTimeSum=0
|
||||
Title0=Power [mA]
|
||||
Setup0=0 1 0 500 2 0 4 1 0
|
||||
[Log file]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
Category=_ 0
|
||||
[TermIOLog]
|
||||
LoggingEnabled=_ 0
|
||||
LogFile=_ ""
|
||||
[SWOTraceWindow]
|
||||
PcSampling=0
|
||||
InterruptLogs=0
|
||||
ForcedTimeStamps=0
|
||||
EventCPI=0
|
||||
EventEXC=0
|
||||
EventFOLD=0
|
||||
EventLSU=0
|
||||
EventSLEEP=0
|
||||
[TraceHelperExtra]
|
||||
Enabled=0
|
||||
ShowSource=1
|
||||
[CallStackLog]
|
||||
Enabled=0
|
||||
[DriverProfiling]
|
||||
Enabled=0
|
||||
Mode=3
|
||||
Graph=0
|
||||
Symbiont=0
|
||||
[Disassemble mode]
|
||||
mode=0
|
||||
[Breakpoints]
|
||||
Count=0
|
||||
[Aliases]
|
||||
Count=0
|
||||
SuppressDialog=0
|
||||
@ -0,0 +1,49 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<Workspace>
|
||||
<ConfigDictionary>
|
||||
|
||||
<CurrentConfigs><Project>RTOSDemo/Debug</Project></CurrentConfigs></ConfigDictionary>
|
||||
<Desktop>
|
||||
<Static>
|
||||
<Workspace>
|
||||
<ColumnWidths>
|
||||
|
||||
|
||||
|
||||
|
||||
<Column0>364</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
|
||||
</Workspace>
|
||||
<Build><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1216</ColumnWidth1><ColumnWidth2>324</ColumnWidth2><ColumnWidth3>81</ColumnWidth3></Build><TerminalIO/><Debug-Log><ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1622</ColumnWidth1></Debug-Log></Static>
|
||||
<Windows>
|
||||
|
||||
<Wnd2>
|
||||
<Tabs>
|
||||
<Tab>
|
||||
<Identity>TabID-27630-4718</Identity>
|
||||
<TabName>Workspace</TabName>
|
||||
<Factory>Workspace</Factory>
|
||||
<Session>
|
||||
|
||||
<NodeDict><ExpandedNode>RTOSDemo</ExpandedNode></NodeDict></Session>
|
||||
</Tab>
|
||||
</Tabs>
|
||||
|
||||
<SelectedTab>0</SelectedTab></Wnd2><Wnd3><Tabs><Tab><Identity>TabID-10002-7709</Identity><TabName>Build</TabName><Factory>Build</Factory><Session/></Tab><Tab><Identity>TabID-18437-21512</Identity><TabName>Debug Log</TabName><Factory>Debug-Log</Factory><Session/></Tab></Tabs><SelectedTab>0</SelectedTab></Wnd3></Windows>
|
||||
<Editor>
|
||||
|
||||
|
||||
|
||||
|
||||
<Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>219</YPos><SelStart>10728</SelStart><SelEnd>10728</SelEnd></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\queue.c</Filename><XPos>0</XPos><YPos>1035</YPos><SelStart>35647</SelStart><SelEnd>35647</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
|
||||
<Positions>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<Top><Row0><Sizes><Toolbar-012aad60><key>iaridepm.enu1</key></Toolbar-012aad60></Sizes></Row0><Row1><Sizes/></Row1></Top><Left><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>438</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>261905</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd2></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
|
||||
</Desktop>
|
||||
</Workspace>
|
||||
|
||||
|
||||
@ -0,0 +1,23 @@
|
||||
[BREAKPOINTS]
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 0
|
||||
Device="ADUC7020X62"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
@ -0,0 +1,784 @@
|
||||
/**************************************************************************//**
|
||||
* @file core_cm3.c
|
||||
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
|
||||
* @version V1.30
|
||||
* @date 30. October 2009
|
||||
*
|
||||
* @note
|
||||
* Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
*
|
||||
* @par
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* define compiler specific symbols */
|
||||
#if defined ( __CC_ARM )
|
||||
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
|
||||
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||
/* ARM armcc specific functions */
|
||||
|
||||
/**
|
||||
* @brief Return the Process Stack Pointer
|
||||
*
|
||||
* @return ProcessStackPointer
|
||||
*
|
||||
* Return the actual process stack pointer
|
||||
*/
|
||||
__ASM uint32_t __get_PSP(void)
|
||||
{
|
||||
mrs r0, psp
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Process Stack Pointer
|
||||
*
|
||||
* @param topOfProcStack Process Stack Pointer
|
||||
*
|
||||
* Assign the value ProcessStackPointer to the MSP
|
||||
* (process stack pointer) Cortex processor register
|
||||
*/
|
||||
__ASM void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
msr psp, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Main Stack Pointer
|
||||
*
|
||||
* @return Main Stack Pointer
|
||||
*
|
||||
* Return the current value of the MSP (main stack pointer)
|
||||
* Cortex processor register
|
||||
*/
|
||||
__ASM uint32_t __get_MSP(void)
|
||||
{
|
||||
mrs r0, msp
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Main Stack Pointer
|
||||
*
|
||||
* @param topOfMainStack Main Stack Pointer
|
||||
*
|
||||
* Assign the value mainStackPointer to the MSP
|
||||
* (main stack pointer) Cortex processor register
|
||||
*/
|
||||
__ASM void __set_MSP(uint32_t mainStackPointer)
|
||||
{
|
||||
msr msp, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in unsigned short value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in unsigned short value
|
||||
*/
|
||||
__ASM uint32_t __REV16(uint16_t value)
|
||||
{
|
||||
rev16 r0, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in signed short value with sign extension to integer
|
||||
*/
|
||||
__ASM int32_t __REVSH(int16_t value)
|
||||
{
|
||||
revsh r0, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
|
||||
#if (__ARMCC_VERSION < 400000)
|
||||
|
||||
/**
|
||||
* @brief Remove the exclusive lock created by ldrex
|
||||
*
|
||||
* Removes the exclusive lock which is created by ldrex.
|
||||
*/
|
||||
__ASM void __CLREX(void)
|
||||
{
|
||||
clrex
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Base Priority value
|
||||
*
|
||||
* @return BasePriority
|
||||
*
|
||||
* Return the content of the base priority register
|
||||
*/
|
||||
__ASM uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
mrs r0, basepri
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Base Priority value
|
||||
*
|
||||
* @param basePri BasePriority
|
||||
*
|
||||
* Set the base priority register
|
||||
*/
|
||||
__ASM void __set_BASEPRI(uint32_t basePri)
|
||||
{
|
||||
msr basepri, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Priority Mask value
|
||||
*
|
||||
* @return PriMask
|
||||
*
|
||||
* Return state of the priority mask bit from the priority mask register
|
||||
*/
|
||||
__ASM uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
mrs r0, primask
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Priority Mask value
|
||||
*
|
||||
* @param priMask PriMask
|
||||
*
|
||||
* Set the priority mask bit in the priority mask register
|
||||
*/
|
||||
__ASM void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
msr primask, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Fault Mask value
|
||||
*
|
||||
* @return FaultMask
|
||||
*
|
||||
* Return the content of the fault mask register
|
||||
*/
|
||||
__ASM uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
mrs r0, faultmask
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Fault Mask value
|
||||
*
|
||||
* @param faultMask faultMask value
|
||||
*
|
||||
* Set the fault mask register
|
||||
*/
|
||||
__ASM void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
msr faultmask, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Control Register value
|
||||
*
|
||||
* @return Control value
|
||||
*
|
||||
* Return the content of the control register
|
||||
*/
|
||||
__ASM uint32_t __get_CONTROL(void)
|
||||
{
|
||||
mrs r0, control
|
||||
bx lr
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Control Register value
|
||||
*
|
||||
* @param control Control value
|
||||
*
|
||||
* Set the control register
|
||||
*/
|
||||
__ASM void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
msr control, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
#endif /* __ARMCC_VERSION */
|
||||
|
||||
|
||||
|
||||
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
|
||||
/* IAR iccarm specific functions */
|
||||
#pragma diag_suppress=Pe940
|
||||
|
||||
/**
|
||||
* @brief Return the Process Stack Pointer
|
||||
*
|
||||
* @return ProcessStackPointer
|
||||
*
|
||||
* Return the actual process stack pointer
|
||||
*/
|
||||
uint32_t __get_PSP(void)
|
||||
{
|
||||
__ASM("mrs r0, psp");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Process Stack Pointer
|
||||
*
|
||||
* @param topOfProcStack Process Stack Pointer
|
||||
*
|
||||
* Assign the value ProcessStackPointer to the MSP
|
||||
* (process stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
__ASM("msr psp, r0");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Main Stack Pointer
|
||||
*
|
||||
* @return Main Stack Pointer
|
||||
*
|
||||
* Return the current value of the MSP (main stack pointer)
|
||||
* Cortex processor register
|
||||
*/
|
||||
uint32_t __get_MSP(void)
|
||||
{
|
||||
__ASM("mrs r0, msp");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Main Stack Pointer
|
||||
*
|
||||
* @param topOfMainStack Main Stack Pointer
|
||||
*
|
||||
* Assign the value mainStackPointer to the MSP
|
||||
* (main stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
__ASM("msr msp, r0");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in unsigned short value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in unsigned short value
|
||||
*/
|
||||
uint32_t __REV16(uint16_t value)
|
||||
{
|
||||
__ASM("rev16 r0, r0");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse bit order of value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse bit order of value
|
||||
*/
|
||||
uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
__ASM("rbit r0, r0");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (8 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 8 bit values)
|
||||
*/
|
||||
uint8_t __LDREXB(uint8_t *addr)
|
||||
{
|
||||
__ASM("ldrexb r0, [r0]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (16 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 16 bit values
|
||||
*/
|
||||
uint16_t __LDREXH(uint16_t *addr)
|
||||
{
|
||||
__ASM("ldrexh r0, [r0]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (32 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 32 bit values
|
||||
*/
|
||||
uint32_t __LDREXW(uint32_t *addr)
|
||||
{
|
||||
__ASM("ldrex r0, [r0]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (8 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 8 bit values
|
||||
*/
|
||||
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||
{
|
||||
__ASM("strexb r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (16 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 16 bit values
|
||||
*/
|
||||
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||
{
|
||||
__ASM("strexh r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (32 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 32 bit values
|
||||
*/
|
||||
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||
{
|
||||
__ASM("strex r0, r0, [r1]");
|
||||
__ASM("bx lr");
|
||||
}
|
||||
|
||||
#pragma diag_default=Pe940
|
||||
|
||||
|
||||
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||
/* GNU gcc specific functions */
|
||||
|
||||
/**
|
||||
* @brief Return the Process Stack Pointer
|
||||
*
|
||||
* @return ProcessStackPointer
|
||||
*
|
||||
* Return the actual process stack pointer
|
||||
*/
|
||||
uint32_t __get_PSP(void) __attribute__( ( naked ) );
|
||||
uint32_t __get_PSP(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, psp\n\t"
|
||||
"MOV r0, %0 \n\t"
|
||||
"BX lr \n\t" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Process Stack Pointer
|
||||
*
|
||||
* @param topOfProcStack Process Stack Pointer
|
||||
*
|
||||
* Assign the value ProcessStackPointer to the MSP
|
||||
* (process stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
|
||||
void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
__ASM volatile ("MSR psp, %0\n\t"
|
||||
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Main Stack Pointer
|
||||
*
|
||||
* @return Main Stack Pointer
|
||||
*
|
||||
* Return the current value of the MSP (main stack pointer)
|
||||
* Cortex processor register
|
||||
*/
|
||||
uint32_t __get_MSP(void) __attribute__( ( naked ) );
|
||||
uint32_t __get_MSP(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, msp\n\t"
|
||||
"MOV r0, %0 \n\t"
|
||||
"BX lr \n\t" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Main Stack Pointer
|
||||
*
|
||||
* @param topOfMainStack Main Stack Pointer
|
||||
*
|
||||
* Assign the value mainStackPointer to the MSP
|
||||
* (main stack pointer) Cortex processor register
|
||||
*/
|
||||
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
|
||||
void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
__ASM volatile ("MSR msp, %0\n\t"
|
||||
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Base Priority value
|
||||
*
|
||||
* @return BasePriority
|
||||
*
|
||||
* Return the content of the base priority register
|
||||
*/
|
||||
uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Base Priority value
|
||||
*
|
||||
* @param basePri BasePriority
|
||||
*
|
||||
* Set the base priority register
|
||||
*/
|
||||
void __set_BASEPRI(uint32_t value)
|
||||
{
|
||||
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Priority Mask value
|
||||
*
|
||||
* @return PriMask
|
||||
*
|
||||
* Return state of the priority mask bit from the priority mask register
|
||||
*/
|
||||
uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Priority Mask value
|
||||
*
|
||||
* @param priMask PriMask
|
||||
*
|
||||
* Set the priority mask bit in the priority mask register
|
||||
*/
|
||||
void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Fault Mask value
|
||||
*
|
||||
* @return FaultMask
|
||||
*
|
||||
* Return the content of the fault mask register
|
||||
*/
|
||||
uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Fault Mask value
|
||||
*
|
||||
* @param faultMask faultMask value
|
||||
*
|
||||
* Set the fault mask register
|
||||
*/
|
||||
void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the Control Register value
|
||||
*
|
||||
* @return Control value
|
||||
*
|
||||
* Return the content of the control register
|
||||
*/
|
||||
uint32_t __get_CONTROL(void)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set the Control Register value
|
||||
*
|
||||
* @param control Control value
|
||||
*
|
||||
* Set the control register
|
||||
*/
|
||||
void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in integer value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in integer value
|
||||
*/
|
||||
uint32_t __REV(uint32_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in unsigned short value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in unsigned short value
|
||||
*/
|
||||
uint32_t __REV16(uint16_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse byte order in signed short value with sign extension to integer
|
||||
*/
|
||||
int32_t __REVSH(int16_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reverse bit order of value
|
||||
*
|
||||
* @param value value to reverse
|
||||
* @return reversed value
|
||||
*
|
||||
* Reverse bit order of value
|
||||
*/
|
||||
uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (8 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 8 bit value
|
||||
*/
|
||||
uint8_t __LDREXB(uint8_t *addr)
|
||||
{
|
||||
uint8_t result=0;
|
||||
|
||||
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (16 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 16 bit values
|
||||
*/
|
||||
uint16_t __LDREXH(uint16_t *addr)
|
||||
{
|
||||
uint16_t result=0;
|
||||
|
||||
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LDR Exclusive (32 bit)
|
||||
*
|
||||
* @param *addr address pointer
|
||||
* @return value of (*address)
|
||||
*
|
||||
* Exclusive LDR command for 32 bit values
|
||||
*/
|
||||
uint32_t __LDREXW(uint32_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (8 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 8 bit values
|
||||
*/
|
||||
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (16 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 16 bit values
|
||||
*/
|
||||
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief STR Exclusive (32 bit)
|
||||
*
|
||||
* @param value value to store
|
||||
* @param *addr address pointer
|
||||
* @return successful / failed
|
||||
*
|
||||
* Exclusive STR command for 32 bit values
|
||||
*/
|
||||
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||
{
|
||||
uint32_t result=0;
|
||||
|
||||
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
|
||||
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||
/* TASKING carm specific functions */
|
||||
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,217 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
|
||||
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
|
||||
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32L1xx CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<style>
|
||||
<!--
|
||||
/* Style Definitions */
|
||||
p.MsoNormal, li.MsoNormal, div.MsoNormal
|
||||
{mso-style-parent:"";
|
||||
margin:0in;
|
||||
margin-bottom:.0001pt;
|
||||
mso-pagination:widow-orphan;
|
||||
font-size:12.0pt;
|
||||
font-family:"Times New Roman";
|
||||
mso-fareast-font-family:"Times New Roman";}
|
||||
h2
|
||||
{mso-style-next:Normal;
|
||||
margin-top:12.0pt;
|
||||
margin-right:0in;
|
||||
margin-bottom:3.0pt;
|
||||
margin-left:0in;
|
||||
mso-pagination:widow-orphan;
|
||||
page-break-after:avoid;
|
||||
mso-outline-level:2;
|
||||
font-size:14.0pt;
|
||||
font-family:Arial;
|
||||
font-weight:bold;
|
||||
font-style:italic;}
|
||||
a:link, span.MsoHyperlink
|
||||
{color:blue;
|
||||
text-decoration:underline;
|
||||
text-underline:single;}
|
||||
a:visited, span.MsoHyperlinkFollowed
|
||||
{color:blue;
|
||||
text-decoration:underline;
|
||||
text-underline:single;}
|
||||
p
|
||||
{mso-margin-top-alt:auto;
|
||||
margin-right:0in;
|
||||
mso-margin-bottom-alt:auto;
|
||||
margin-left:0in;
|
||||
mso-pagination:widow-orphan;
|
||||
font-size:12.0pt;
|
||||
font-family:"Times New Roman";
|
||||
mso-fareast-font-family:"Times New Roman";}
|
||||
@page Section1
|
||||
{size:8.5in 11.0in;
|
||||
margin:1.0in 1.25in 1.0in 1.25in;
|
||||
mso-header-margin:.5in;
|
||||
mso-footer-margin:.5in;
|
||||
mso-paper-source:0;}
|
||||
div.Section1
|
||||
{page:Section1;}
|
||||
-->
|
||||
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head><body style="" lang="EN-US" link="blue" vlink="blue">
|
||||
<div class="Section1">
|
||||
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||
</o:p></span></p>
|
||||
<div align="center">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../Release_Notes.html">Back to Release page</a></span></td>
|
||||
</tr>
|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32L1xx CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
|
||||
2010 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32L1xx
|
||||
CMSIS
|
||||
update History</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<span style="font-family: "Times New Roman";"></span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32L1xx
|
||||
CMSIS
|
||||
update History</span></h2>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">1.0.0RC1
|
||||
- 07/02/2010</span></h3><ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">STM32L1xx CMSIS files
|
||||
updated to <span style="font-weight: bold;">CMSIS V1.30</span> release</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Directory structure
|
||||
updated to be aligned with CMSIS V1.30<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||
for <b>STM32L Ultra Low-power
|
||||
Medium-density (STM32L15xx8/B) devices</b>. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||
</ul>
|
||||
<ol style="margin-top: 0in;" start="2" type="1">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">CMSIS Core Peripheral
|
||||
Access Layer</span></i></b></li>
|
||||
</ol>
|
||||
<ul>
|
||||
<li><b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i></b><span style="font-size: 10pt; font-family: Verdana;"> Refer to <a href="../../../CMSIS_changes.htm" target="_blank">CMSIS changes</a></span></li>
|
||||
</ul>
|
||||
<ol style="margin-top: 0in; list-style-type: decimal;" start="3">
|
||||
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32L1xx CMSIS Device
|
||||
Peripheral Access Layer </span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||
</ol>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32L1xx CMSIS Cortex-M3 Device
|
||||
Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32l1xx.h</span></span><br>
|
||||
</li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">All library files renamed with stm32l15x to stm32l1xx.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">STM32L15X_LP product name renamed to STM32L1XX_MD.<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">HSE_VALUE value changed to 8MHz.</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new register in SYSCFG: PMC register</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RTC TCR register renamed to TAFCR</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GPIOF renamed to GPIOH</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add and update of all peripherals bits definitions<br>
|
||||
</span></li>
|
||||
|
||||
</ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32L1xx CMSIS Cortex-M3 Device
|
||||
Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32l1xx.h and
|
||||
system_stm32l1xx.c</span></span><br>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemFrequency
|
||||
variable name changed to SystemCoreClock</span><br>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Default </span></span><span style="font-size: 10pt; font-family: Verdana;">SystemCoreClock</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"> is changed to 32MHz (change the default frequency from SYSCLK_FREQ_HSE to SYSCLK_FREQ_32MHz).</span></span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">All while(1) loop were
|
||||
removed from all clock setting functions. User has to handle the HSE
|
||||
startup failure.<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Additional function <span style="font-weight: bold; font-style: italic;">void
|
||||
SystemCoreClockUpdate (void)</span> is provided.<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Startup files:</span>
|
||||
<span style="font-weight: bold; font-style: italic;">startup_stm32l1xx_md.s</span></span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Startup file name changed from <span style="font-weight: bold;">startup_stm32l15x_lp</span>.s to <span style="font-weight: bold;">startup_stm32l1xx_md.s</span><span style="font-weight: bold; font-style: italic;">.</span></span></li>
|
||||
|
||||
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemInit() function
|
||||
is called from startup file (startup_stm32l1xx_md.s) before to branch
|
||||
to application main.<br>
|
||||
To reconfigure the default setting of SystemInit() function, refer to
|
||||
system_stm32l1xx.c file <br>
|
||||
</span></li>
|
||||
|
||||
</ul>
|
||||
</ul>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
</ul>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||
enclosed firmware and all the related documentation are not covered by
|
||||
a License Agreement, if you need such License you can contact your
|
||||
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%"></span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32L (<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32l" target="_blank">www.st.com/STM32L</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
</div>
|
||||
|
||||
</body></html>
|
||||
@ -0,0 +1,312 @@
|
||||
;******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l15x_lp.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.0.0RC1
|
||||
;* Date : 07/02/2010
|
||||
;* Description : STM32L15x Low Power Devices vector table for RVMDK
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD USB_HP_IRQHandler ; USB High Priority
|
||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
||||
DCD DAC_IRQHandler ; DAC
|
||||
DCD COMP_IRQHandler ; COMP through EXTI Line
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD LCD_IRQHandler ; LCD
|
||||
DCD TIM9_IRQHandler ; TIM9
|
||||
DCD TIM10_IRQHandler ; TIM10
|
||||
DCD TIM11_IRQHandler ; TIM11
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
|
||||
DCD TIM6_IRQHandler ; TIM6
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler routine
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_IRQHandler [WEAK]
|
||||
EXPORT DAC_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT TIM9_IRQHandler [WEAK]
|
||||
EXPORT TIM10_IRQHandler [WEAK]
|
||||
EXPORT TIM11_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT USB_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT TIM6_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
USB_HP_IRQHandler
|
||||
USB_LP_IRQHandler
|
||||
DAC_IRQHandler
|
||||
COMP_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
LCD_IRQHandler
|
||||
TIM9_IRQHandler
|
||||
TIM10_IRQHandler
|
||||
TIM11_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
USB_FS_WKUP_IRQHandler
|
||||
TIM6_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE*****
|
||||
@ -0,0 +1,455 @@
|
||||
;/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l15x_lp.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.0.0RC1
|
||||
;* Date : 07/02/2010
|
||||
;* Description : STM32L15x Low Power Devices vector table for EWARM5.x toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == __iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************/
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD USB_HP_IRQHandler ; USB High Priority
|
||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
||||
DCD DAC_IRQHandler ; DAC
|
||||
DCD COMP_IRQHandler ; COMP through EXTI Line
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD LCD_IRQHandler ; LCD
|
||||
DCD TIM9_IRQHandler ; TIM9
|
||||
DCD TIM10_IRQHandler ; TIM10
|
||||
DCD TIM11_IRQHandler ; TIM11
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
|
||||
DCD TIM6_IRQHandler ; TIM6
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
END
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,97 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l1xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
||||
******************************************************************************
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32L1XX_H
|
||||
#define __SYSTEM_STM32L1XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32L1XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,320 @@
|
||||
<html>
|
||||
|
||||
<head>
|
||||
<title>CMSIS Changes</title>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||
<style>
|
||||
<!--
|
||||
/*-----------------------------------------------------------
|
||||
Keil Software CHM Style Sheet
|
||||
-----------------------------------------------------------*/
|
||||
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||
Verdana, Arial, 'Sans Serif' }
|
||||
a:link { color: #0000FF; text-decoration: underline }
|
||||
a:visited { color: #0000FF; text-decoration: underline }
|
||||
a:active { color: #FF0000; text-decoration: underline }
|
||||
a:hover { color: #FF0000; text-decoration: underline }
|
||||
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||
text-align: Center; margin-right: 3 }
|
||||
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||
padding: 6 }
|
||||
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||
margin-left: 24; margin-right: 24 }
|
||||
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||
li { clear: both; margin-bottom: 6pt }
|
||||
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||
bottom; padding-right: 6pt }
|
||||
tr { text-align: left; vertical-align: top }
|
||||
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||
.ToolT { font-size: 8pt; color: #808080 }
|
||||
.TinyT { font-size: 8pt; text-align: Center }
|
||||
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||
line-height: 120%; font-style: normal }
|
||||
/*-----------------------------------------------------------
|
||||
Notes
|
||||
-----------------------------------------------------------*/
|
||||
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Expanding/Contracting Divisions
|
||||
-----------------------------------------------------------*/
|
||||
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||
img.expand { border-style: none; border-width: medium }
|
||||
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||
/*-----------------------------------------------------------
|
||||
Where List Tags
|
||||
-----------------------------------------------------------*/
|
||||
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||
table.wh { width: 100% }
|
||||
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||
6pt }
|
||||
td.whDesc { padding-bottom: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Keil Table Tags
|
||||
-----------------------------------------------------------*/
|
||||
table.kt { border: 1pt solid #000000 }
|
||||
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||
tr.kt { }
|
||||
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||
padding-bottom: 2pt }
|
||||
/*-----------------------------------------------------------
|
||||
-----------------------------------------------------------*/
|
||||
-->
|
||||
|
||||
</style>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<h1>Changes to CMSIS version V1.20</h1>
|
||||
|
||||
<hr>
|
||||
|
||||
<h2>1. Removed CMSIS Middelware packages</h2>
|
||||
<p>
|
||||
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
|
||||
</p>
|
||||
|
||||
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
|
||||
<p>
|
||||
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
|
||||
because the variable holds the clock value at which the core is running.
|
||||
</p>
|
||||
|
||||
<h2>3. Changed startup concept</h2>
|
||||
<p>
|
||||
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
|
||||
from main) has the weakness that it does not work for controllers which need a already
|
||||
configuerd clock system to configure the external memory controller.
|
||||
</p>
|
||||
|
||||
<h3>Changed startup concept</h3>
|
||||
<ul>
|
||||
<li>
|
||||
SystemInit() is called from startup file before <strong>premain</strong>.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemInit()</strong> configures the clock system and also configures
|
||||
an existing external memory controller.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemInit()</strong> must not use global variables.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
|
||||
</li>
|
||||
<li>
|
||||
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
|
||||
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
|
||||
and must be called whenever the core clock is changed.<br>
|
||||
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
|
||||
the current core clock.
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
|
||||
<h2>4. Advanced Debug Functions</h2>
|
||||
<p>
|
||||
ITM communication channel is only capable for OUT direction. To allow also communication for
|
||||
IN direction a simple concept is provided.
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
|
||||
</li>
|
||||
<li>
|
||||
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
|
||||
</li>
|
||||
<li>
|
||||
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
<p>
|
||||
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
|
||||
</p>
|
||||
|
||||
|
||||
<h2>5. Core Register Bit Definitions</h2>
|
||||
<p>
|
||||
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
|
||||
defines correspond with the Cortex-M Technical Reference Manual.
|
||||
</p>
|
||||
<p>
|
||||
e.g. SysTick structure with bit definitions
|
||||
</p>
|
||||
<pre>
|
||||
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
|
||||
memory mapped structure for SysTick
|
||||
@{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
|
||||
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
|
||||
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
|
||||
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
|
||||
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
|
||||
|
||||
<h2>7. DoxyGen Tags</h2>
|
||||
<p>
|
||||
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
|
||||
using DoxyGen.
|
||||
</p>
|
||||
|
||||
<h2>8. Folder Structure</h2>
|
||||
<p>
|
||||
The folder structure is changed to differentiate the single support packages.
|
||||
</p>
|
||||
|
||||
<ul>
|
||||
<li>CM0</li>
|
||||
<li>CM3
|
||||
<ul>
|
||||
<li>CoreSupport</li>
|
||||
<li>DeviceSupport</li>
|
||||
<ul>
|
||||
<li>Vendor
|
||||
<ul>
|
||||
<li>Device
|
||||
<ul>
|
||||
<li>Startup
|
||||
<ul>
|
||||
<li>Toolchain</li>
|
||||
<li>Toolchain</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Device</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Vendor</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Example
|
||||
<ul>
|
||||
<li>Toolchain
|
||||
<ul>
|
||||
<li>Device</li>
|
||||
<li>Device</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Toolchain</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</li>
|
||||
|
||||
<li>Documentation</li>
|
||||
</ul>
|
||||
|
||||
<h2>9. Open Points</h2>
|
||||
<p>
|
||||
Following points need to be clarified and solved:
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
<p>
|
||||
Equivalent C and Assembler startup files.
|
||||
</p>
|
||||
<p>
|
||||
Is there a need for having C startup files although assembler startup files are
|
||||
very efficient and do not need to be changed?
|
||||
<p/>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Placing of HEAP in external RAM.
|
||||
</p>
|
||||
<p>
|
||||
It must be possible to place HEAP in external RAM if the device supports an
|
||||
external memory controller.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Placing of STACK /HEAP.
|
||||
</p>
|
||||
<p>
|
||||
STACK should always be placed at the end of internal RAM.
|
||||
</p>
|
||||
<p>
|
||||
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Removing core_cm3.c and core_cm0.c.
|
||||
</p>
|
||||
<p>
|
||||
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
|
||||
appropriate compiler intrinsics.
|
||||
</p>
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
|
||||
<h2>10. Limitations</h2>
|
||||
<p>
|
||||
The following limitations are not covered with the current CMSIS version:
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for ARM toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for GNU toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for IAR toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>Tasking</strong> projects are provided yet.
|
||||
</li>
|
||||
</ul>
|
||||
@ -0,0 +1,243 @@
|
||||
<html>
|
||||
|
||||
<head>
|
||||
<title>CMSIS Debug Support</title>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||
<style>
|
||||
<!--
|
||||
/*-----------------------------------------------------------
|
||||
Keil Software CHM Style Sheet
|
||||
-----------------------------------------------------------*/
|
||||
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||
Verdana, Arial, 'Sans Serif' }
|
||||
a:link { color: #0000FF; text-decoration: underline }
|
||||
a:visited { color: #0000FF; text-decoration: underline }
|
||||
a:active { color: #FF0000; text-decoration: underline }
|
||||
a:hover { color: #FF0000; text-decoration: underline }
|
||||
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||
text-align: Center; margin-right: 3 }
|
||||
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||
padding: 6 }
|
||||
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||
margin-left: 24; margin-right: 24 }
|
||||
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||
li { clear: both; margin-bottom: 6pt }
|
||||
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||
bottom; padding-right: 6pt }
|
||||
tr { text-align: left; vertical-align: top }
|
||||
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||
.ToolT { font-size: 8pt; color: #808080 }
|
||||
.TinyT { font-size: 8pt; text-align: Center }
|
||||
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||
line-height: 120%; font-style: normal }
|
||||
/*-----------------------------------------------------------
|
||||
Notes
|
||||
-----------------------------------------------------------*/
|
||||
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Expanding/Contracting Divisions
|
||||
-----------------------------------------------------------*/
|
||||
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||
img.expand { border-style: none; border-width: medium }
|
||||
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||
/*-----------------------------------------------------------
|
||||
Where List Tags
|
||||
-----------------------------------------------------------*/
|
||||
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||
table.wh { width: 100% }
|
||||
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||
6pt }
|
||||
td.whDesc { padding-bottom: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Keil Table Tags
|
||||
-----------------------------------------------------------*/
|
||||
table.kt { border: 1pt solid #000000 }
|
||||
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||
tr.kt { }
|
||||
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||
padding-bottom: 2pt }
|
||||
/*-----------------------------------------------------------
|
||||
-----------------------------------------------------------*/
|
||||
-->
|
||||
|
||||
</style>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<h1>CMSIS Debug Support</h1>
|
||||
|
||||
<hr>
|
||||
|
||||
<h2>Cortex-M3 ITM Debug Access</h2>
|
||||
<p>
|
||||
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
|
||||
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
|
||||
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
|
||||
communication channels are used by CMSIS to output the following information:
|
||||
</p>
|
||||
<ul>
|
||||
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
|
||||
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
|
||||
</ul>
|
||||
|
||||
<h2>Debug IN / OUT functions</h2>
|
||||
<p>CMSIS provides following debug functions:</p>
|
||||
<ul>
|
||||
<li>ITM_SendChar (uses ITM channel 0)</li>
|
||||
<li>ITM_ReceiveChar (uses global variable)</li>
|
||||
<li>ITM_CheckChar (uses global variable)</li>
|
||||
</ul>
|
||||
|
||||
<h3>ITM_SendChar</h3>
|
||||
<p>
|
||||
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
|
||||
the microcontroller system to the debug system. <br>
|
||||
Only a 8 bit value is transmitted.
|
||||
</p>
|
||||
<pre>
|
||||
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
|
||||
{
|
||||
/* check if debugger connected and ITM channel enabled for tracing */
|
||||
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
|
||||
(ITM->TCR & ITM_TCR_ITMENA) &&
|
||||
(ITM->TER & (1UL << 0)) )
|
||||
{
|
||||
while (ITM->PORT[0].u32 == 0);
|
||||
ITM->PORT[0].u8 = (uint8_t)ch;
|
||||
}
|
||||
return (ch);
|
||||
}</pre>
|
||||
|
||||
<h3>ITM_ReceiveChar</h3>
|
||||
<p>
|
||||
ITM communication channel is only capable for OUT direction. For IN direction
|
||||
a globel variable is used. A simple mechansim detects if a character is received.
|
||||
The project to test need to be build with debug information.
|
||||
</p>
|
||||
|
||||
<p>
|
||||
The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
|
||||
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
|
||||
</p>
|
||||
<pre>
|
||||
extern volatile int ITM_RxBuffer; /* variable to receive characters */
|
||||
</pre>
|
||||
<p>
|
||||
A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
|
||||
or contains a valid value.
|
||||
</p>
|
||||
<pre>
|
||||
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
|
||||
</pre>
|
||||
<p>
|
||||
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
|
||||
It returns the received character or '-1' if no character was available.
|
||||
</p>
|
||||
<pre>
|
||||
static __INLINE int ITM_ReceiveChar (void) {
|
||||
int ch = -1; /* no character available */
|
||||
|
||||
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
|
||||
ch = ITM_RxBuffer;
|
||||
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
|
||||
}
|
||||
|
||||
return (ch);
|
||||
}
|
||||
</pre>
|
||||
|
||||
<h3>ITM_CheckChar</h3>
|
||||
<p>
|
||||
<strong>ITM_CheckChar</strong> is used to check if a character is received.
|
||||
</p>
|
||||
<pre>
|
||||
static __INLINE int ITM_CheckChar (void) {
|
||||
|
||||
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
|
||||
return (0); /* no character available */
|
||||
} else {
|
||||
return (1); /* character available */
|
||||
}
|
||||
}</pre>
|
||||
|
||||
|
||||
<h2>ITM Debug Support in uVision</h2>
|
||||
<p>
|
||||
uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
|
||||
display the debug data.
|
||||
</p>
|
||||
<p>Direction microcontroller system -> uVision:</p>
|
||||
<ul>
|
||||
<li>
|
||||
Characters received via ITM communication channel 0 are written in a printf style
|
||||
to <strong>Debug (printf) Viewer</strong> window.
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
<p>Direction uVision -> microcontroller system:</p>
|
||||
<ul>
|
||||
<li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
|
||||
<li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
|
||||
<li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
|
||||
</ul>
|
||||
|
||||
<p class="Note">Note</p>
|
||||
<ul>
|
||||
<li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
<h2>RTX Kernel awareness in uVision</h2>
|
||||
<p>
|
||||
uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
|
||||
No format overhead is necessary.<br>
|
||||
uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
|
||||
to ITM communication channel 31.
|
||||
</p>
|
||||
|
||||
<p>Following RTX events are traced:</p>
|
||||
<ul>
|
||||
<li>Task Create / Delete event
|
||||
<ol>
|
||||
<li>32 bit access. Task start address is transmitted</li>
|
||||
<li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
|
||||
High byte holds Create/Delete flag, Low byte holds TASK ID.
|
||||
</li>
|
||||
</ol>
|
||||
</li>
|
||||
<li>Task switch event
|
||||
<ol>
|
||||
<li>8 bit access. Task ID of current task is transmitted</li>
|
||||
</ol>
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
<p class="Note">Note</p>
|
||||
<ul>
|
||||
<li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
|
||||
<p class="MsoNormal"><span lang="EN-GB"> </span></p>
|
||||
|
||||
<hr>
|
||||
|
||||
<p class="TinyT">Copyright © KEIL - An ARM Company.<br>
|
||||
All rights reserved.<br>
|
||||
Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
|
||||
</p>
|
||||
|
||||
</body>
|
||||
|
||||
</html>
|
||||
@ -0,0 +1,320 @@
|
||||
<html>
|
||||
|
||||
<head>
|
||||
<title>CMSIS Changes</title>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||
<style>
|
||||
<!--
|
||||
/*-----------------------------------------------------------
|
||||
Keil Software CHM Style Sheet
|
||||
-----------------------------------------------------------*/
|
||||
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||
Verdana, Arial, 'Sans Serif' }
|
||||
a:link { color: #0000FF; text-decoration: underline }
|
||||
a:visited { color: #0000FF; text-decoration: underline }
|
||||
a:active { color: #FF0000; text-decoration: underline }
|
||||
a:hover { color: #FF0000; text-decoration: underline }
|
||||
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||
text-align: Center; margin-right: 3 }
|
||||
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||
padding: 6 }
|
||||
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||
margin-left: 24; margin-right: 24 }
|
||||
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||
li { clear: both; margin-bottom: 6pt }
|
||||
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||
bottom; padding-right: 6pt }
|
||||
tr { text-align: left; vertical-align: top }
|
||||
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||
.ToolT { font-size: 8pt; color: #808080 }
|
||||
.TinyT { font-size: 8pt; text-align: Center }
|
||||
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||
line-height: 120%; font-style: normal }
|
||||
/*-----------------------------------------------------------
|
||||
Notes
|
||||
-----------------------------------------------------------*/
|
||||
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Expanding/Contracting Divisions
|
||||
-----------------------------------------------------------*/
|
||||
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||
img.expand { border-style: none; border-width: medium }
|
||||
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||
/*-----------------------------------------------------------
|
||||
Where List Tags
|
||||
-----------------------------------------------------------*/
|
||||
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||
table.wh { width: 100% }
|
||||
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||
6pt }
|
||||
td.whDesc { padding-bottom: 6pt }
|
||||
/*-----------------------------------------------------------
|
||||
Keil Table Tags
|
||||
-----------------------------------------------------------*/
|
||||
table.kt { border: 1pt solid #000000 }
|
||||
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||
tr.kt { }
|
||||
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||
padding-bottom: 2pt }
|
||||
/*-----------------------------------------------------------
|
||||
-----------------------------------------------------------*/
|
||||
-->
|
||||
|
||||
</style>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<h1>Changes to CMSIS version V1.20</h1>
|
||||
|
||||
<hr>
|
||||
|
||||
<h2>1. Removed CMSIS Middelware packages</h2>
|
||||
<p>
|
||||
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
|
||||
</p>
|
||||
|
||||
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
|
||||
<p>
|
||||
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
|
||||
because the variable holds the clock value at which the core is running.
|
||||
</p>
|
||||
|
||||
<h2>3. Changed startup concept</h2>
|
||||
<p>
|
||||
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
|
||||
from main) has the weakness that it does not work for controllers which need a already
|
||||
configuerd clock system to configure the external memory controller.
|
||||
</p>
|
||||
|
||||
<h3>Changed startup concept</h3>
|
||||
<ul>
|
||||
<li>
|
||||
SystemInit() is called from startup file before <strong>premain</strong>.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemInit()</strong> configures the clock system and also configures
|
||||
an existing external memory controller.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemInit()</strong> must not use global variables.
|
||||
</li>
|
||||
<li>
|
||||
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
|
||||
</li>
|
||||
<li>
|
||||
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
|
||||
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
|
||||
and must be called whenever the core clock is changed.<br>
|
||||
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
|
||||
the current core clock.
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
|
||||
<h2>4. Advanced Debug Functions</h2>
|
||||
<p>
|
||||
ITM communication channel is only capable for OUT direction. To allow also communication for
|
||||
IN direction a simple concept is provided.
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
|
||||
</li>
|
||||
<li>
|
||||
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
|
||||
</li>
|
||||
<li>
|
||||
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
<p>
|
||||
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
|
||||
</p>
|
||||
|
||||
|
||||
<h2>5. Core Register Bit Definitions</h2>
|
||||
<p>
|
||||
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
|
||||
defines correspond with the Cortex-M Technical Reference Manual.
|
||||
</p>
|
||||
<p>
|
||||
e.g. SysTick structure with bit definitions
|
||||
</p>
|
||||
<pre>
|
||||
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
|
||||
memory mapped structure for SysTick
|
||||
@{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
|
||||
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
|
||||
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
|
||||
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
|
||||
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
|
||||
|
||||
<h2>7. DoxyGen Tags</h2>
|
||||
<p>
|
||||
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
|
||||
using DoxyGen.
|
||||
</p>
|
||||
|
||||
<h2>8. Folder Structure</h2>
|
||||
<p>
|
||||
The folder structure is changed to differentiate the single support packages.
|
||||
</p>
|
||||
|
||||
<ul>
|
||||
<li>CM0</li>
|
||||
<li>CM3
|
||||
<ul>
|
||||
<li>CoreSupport</li>
|
||||
<li>DeviceSupport</li>
|
||||
<ul>
|
||||
<li>Vendor
|
||||
<ul>
|
||||
<li>Device
|
||||
<ul>
|
||||
<li>Startup
|
||||
<ul>
|
||||
<li>Toolchain</li>
|
||||
<li>Toolchain</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Device</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Vendor</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Example
|
||||
<ul>
|
||||
<li>Toolchain
|
||||
<ul>
|
||||
<li>Device</li>
|
||||
<li>Device</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Toolchain</li>
|
||||
<li>...</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</li>
|
||||
|
||||
<li>Documentation</li>
|
||||
</ul>
|
||||
|
||||
<h2>9. Open Points</h2>
|
||||
<p>
|
||||
Following points need to be clarified and solved:
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
<p>
|
||||
Equivalent C and Assembler startup files.
|
||||
</p>
|
||||
<p>
|
||||
Is there a need for having C startup files although assembler startup files are
|
||||
very efficient and do not need to be changed?
|
||||
<p/>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Placing of HEAP in external RAM.
|
||||
</p>
|
||||
<p>
|
||||
It must be possible to place HEAP in external RAM if the device supports an
|
||||
external memory controller.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Placing of STACK /HEAP.
|
||||
</p>
|
||||
<p>
|
||||
STACK should always be placed at the end of internal RAM.
|
||||
</p>
|
||||
<p>
|
||||
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
Removing core_cm3.c and core_cm0.c.
|
||||
</p>
|
||||
<p>
|
||||
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
|
||||
appropriate compiler intrinsics.
|
||||
</p>
|
||||
</li>
|
||||
</ul>
|
||||
|
||||
|
||||
<h2>10. Limitations</h2>
|
||||
<p>
|
||||
The following limitations are not covered with the current CMSIS version:
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for ARM toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for GNU toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>C startup files</strong> for IAR toolchain are provided.
|
||||
</li>
|
||||
<li>
|
||||
No <strong>Tasking</strong> projects are provided yet.
|
||||
</li>
|
||||
</ul>
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
@ -0,0 +1,996 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file fonts.c
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides text fonts for STM32xx-EVAL's LCD driver.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "fonts.h"
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup Common
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FONTS
|
||||
* @brief This file includes the Fonts driver of STM32-EVAL boards.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FONTS_Private_Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FONTS_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FONTS_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FONTS_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
const uint16_t ASCII16x24_Table [] = {
|
||||
/**
|
||||
* @brief Space ' '
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '!'
|
||||
*/
|
||||
0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000, 0x0000,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '"'
|
||||
*/
|
||||
0x0000, 0x0000, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '#'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0C60, 0x0C60,
|
||||
0x0C60, 0x0630, 0x0630, 0x1FFE, 0x1FFE, 0x0630, 0x0738, 0x0318,
|
||||
0x1FFE, 0x1FFE, 0x0318, 0x0318, 0x018C, 0x018C, 0x018C, 0x0000,
|
||||
/**
|
||||
* @brief '$'
|
||||
*/
|
||||
0x0000, 0x0080, 0x03E0, 0x0FF8, 0x0E9C, 0x1C8C, 0x188C, 0x008C,
|
||||
0x0098, 0x01F8, 0x07E0, 0x0E80, 0x1C80, 0x188C, 0x188C, 0x189C,
|
||||
0x0CB8, 0x0FF0, 0x03E0, 0x0080, 0x0080, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '%'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x180E, 0x0C1B, 0x0C11, 0x0611, 0x0611,
|
||||
0x0311, 0x0311, 0x019B, 0x018E, 0x38C0, 0x6CC0, 0x4460, 0x4460,
|
||||
0x4430, 0x4430, 0x4418, 0x6C18, 0x380C, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '&'
|
||||
*/
|
||||
0x0000, 0x01E0, 0x03F0, 0x0738, 0x0618, 0x0618, 0x0330, 0x01F0,
|
||||
0x00F0, 0x00F8, 0x319C, 0x330E, 0x1E06, 0x1C06, 0x1C06, 0x3F06,
|
||||
0x73FC, 0x21F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '''
|
||||
*/
|
||||
0x0000, 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '('
|
||||
*/
|
||||
0x0000, 0x0200, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x0060, 0x0060,
|
||||
0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
|
||||
0x0060, 0x0060, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0200, 0x0000,
|
||||
/**
|
||||
* @brief ')'
|
||||
*/
|
||||
0x0000, 0x0020, 0x0060, 0x00C0, 0x0180, 0x0180, 0x0300, 0x0300,
|
||||
0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
|
||||
0x0300, 0x0300, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0020, 0x0000,
|
||||
/**
|
||||
* @brief '*'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
|
||||
0x06D8, 0x07F8, 0x01E0, 0x0330, 0x0738, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '+'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x3FFC, 0x3FFC, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief ','
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '-'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, 0x07E0, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '.'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '/'
|
||||
*/
|
||||
0x0000, 0x0C00, 0x0C00, 0x0600, 0x0600, 0x0600, 0x0300, 0x0300,
|
||||
0x0300, 0x0380, 0x0180, 0x0180, 0x0180, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x0060, 0x0060, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '0'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x180C, 0x180C, 0x180C,
|
||||
0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C18, 0x0E38,
|
||||
0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '1'
|
||||
*/
|
||||
0x0000, 0x0100, 0x0180, 0x01C0, 0x01F0, 0x0198, 0x0188, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '2'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x1800,
|
||||
0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
|
||||
0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '3'
|
||||
*/
|
||||
0x0000, 0x01E0, 0x07F8, 0x0E18, 0x0C0C, 0x0C0C, 0x0C00, 0x0600,
|
||||
0x03C0, 0x07C0, 0x0C00, 0x1800, 0x1800, 0x180C, 0x180C, 0x0C18,
|
||||
0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '4'
|
||||
*/
|
||||
0x0000, 0x0C00, 0x0E00, 0x0F00, 0x0F00, 0x0D80, 0x0CC0, 0x0C60,
|
||||
0x0C60, 0x0C30, 0x0C18, 0x0C0C, 0x3FFC, 0x3FFC, 0x0C00, 0x0C00,
|
||||
0x0C00, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '5'
|
||||
*/
|
||||
0x0000, 0x0FF8, 0x0FF8, 0x0018, 0x0018, 0x000C, 0x03EC, 0x07FC,
|
||||
0x0E1C, 0x1C00, 0x1800, 0x1800, 0x1800, 0x180C, 0x0C1C, 0x0E18,
|
||||
0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '6'
|
||||
*/
|
||||
0x0000, 0x07C0, 0x0FF0, 0x1C38, 0x1818, 0x0018, 0x000C, 0x03CC,
|
||||
0x0FEC, 0x0E3C, 0x1C1C, 0x180C, 0x180C, 0x180C, 0x1C18, 0x0E38,
|
||||
0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '7'
|
||||
*/
|
||||
0x0000, 0x1FFC, 0x1FFC, 0x0C00, 0x0600, 0x0600, 0x0300, 0x0380,
|
||||
0x0180, 0x01C0, 0x00C0, 0x00E0, 0x0060, 0x0060, 0x0070, 0x0030,
|
||||
0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '8'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x0C18, 0x0C18, 0x0638,
|
||||
0x07F0, 0x07F0, 0x0C18, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C38,
|
||||
0x0FF8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '9'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C1C, 0x180C, 0x180C, 0x180C,
|
||||
0x1C1C, 0x1E38, 0x1BF8, 0x19E0, 0x1800, 0x0C00, 0x0C00, 0x0E1C,
|
||||
0x07F8, 0x01F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief ':'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief ';'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '<'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x1000, 0x1C00, 0x0F80, 0x03E0, 0x00F8, 0x0018, 0x00F8, 0x03E0,
|
||||
0x0F80, 0x1C00, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '='
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x1FF8, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '>'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0008, 0x0038, 0x01F0, 0x07C0, 0x1F00, 0x1800, 0x1F00, 0x07C0,
|
||||
0x01F0, 0x0038, 0x0008, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '?'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x0C00,
|
||||
0x0600, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x0000, 0x0000,
|
||||
0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '@'
|
||||
*/
|
||||
0x0000, 0x0000, 0x07E0, 0x1818, 0x2004, 0x29C2, 0x4A22, 0x4411,
|
||||
0x4409, 0x4409, 0x4409, 0x2209, 0x1311, 0x0CE2, 0x4002, 0x2004,
|
||||
0x1818, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'A'
|
||||
*/
|
||||
0x0000, 0x0380, 0x0380, 0x06C0, 0x06C0, 0x06C0, 0x0C60, 0x0C60,
|
||||
0x1830, 0x1830, 0x1830, 0x3FF8, 0x3FF8, 0x701C, 0x600C, 0x600C,
|
||||
0xC006, 0xC006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'B'
|
||||
*/
|
||||
0x0000, 0x03FC, 0x0FFC, 0x0C0C, 0x180C, 0x180C, 0x180C, 0x0C0C,
|
||||
0x07FC, 0x0FFC, 0x180C, 0x300C, 0x300C, 0x300C, 0x300C, 0x180C,
|
||||
0x1FFC, 0x07FC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'C'
|
||||
*/
|
||||
0x0000, 0x07C0, 0x1FF0, 0x3838, 0x301C, 0x700C, 0x6006, 0x0006,
|
||||
0x0006, 0x0006, 0x0006, 0x0006, 0x0006, 0x6006, 0x700C, 0x301C,
|
||||
0x1FF0, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'D'
|
||||
*/
|
||||
0x0000, 0x03FE, 0x0FFE, 0x0E06, 0x1806, 0x1806, 0x3006, 0x3006,
|
||||
0x3006, 0x3006, 0x3006, 0x3006, 0x3006, 0x1806, 0x1806, 0x0E06,
|
||||
0x0FFE, 0x03FE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'E'
|
||||
*/
|
||||
0x0000, 0x3FFC, 0x3FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
|
||||
0x1FFC, 0x1FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
|
||||
0x3FFC, 0x3FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'F'
|
||||
*/
|
||||
0x0000, 0x3FF8, 0x3FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
|
||||
0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
|
||||
0x0018, 0x0018, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'G'
|
||||
*/
|
||||
0x0000, 0x0FE0, 0x3FF8, 0x783C, 0x600E, 0xE006, 0xC007, 0x0003,
|
||||
0x0003, 0xFE03, 0xFE03, 0xC003, 0xC007, 0xC006, 0xC00E, 0xF03C,
|
||||
0x3FF8, 0x0FE0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'H'
|
||||
*/
|
||||
0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
|
||||
0x3FFC, 0x3FFC, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
|
||||
0x300C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'I'
|
||||
*/
|
||||
0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'J'
|
||||
*/
|
||||
0x0000, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600,
|
||||
0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0618, 0x0618, 0x0738,
|
||||
0x03F0, 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'K'
|
||||
*/
|
||||
0x0000, 0x3006, 0x1806, 0x0C06, 0x0606, 0x0306, 0x0186, 0x00C6,
|
||||
0x0066, 0x0076, 0x00DE, 0x018E, 0x0306, 0x0606, 0x0C06, 0x1806,
|
||||
0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'L'
|
||||
*/
|
||||
0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
|
||||
0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018,
|
||||
0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'M'
|
||||
*/
|
||||
0x0000, 0xE00E, 0xF01E, 0xF01E, 0xF01E, 0xD836, 0xD836, 0xD836,
|
||||
0xD836, 0xCC66, 0xCC66, 0xCC66, 0xC6C6, 0xC6C6, 0xC6C6, 0xC6C6,
|
||||
0xC386, 0xC386, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'N'
|
||||
*/
|
||||
0x0000, 0x300C, 0x301C, 0x303C, 0x303C, 0x306C, 0x306C, 0x30CC,
|
||||
0x30CC, 0x318C, 0x330C, 0x330C, 0x360C, 0x360C, 0x3C0C, 0x3C0C,
|
||||
0x380C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'O'
|
||||
*/
|
||||
0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xC003, 0xC003,
|
||||
0xC003, 0xC003, 0xC003, 0xC003, 0xC003, 0x6006, 0x700E, 0x381C,
|
||||
0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'P'
|
||||
*/
|
||||
0x0000, 0x0FFC, 0x1FFC, 0x380C, 0x300C, 0x300C, 0x300C, 0x300C,
|
||||
0x180C, 0x1FFC, 0x07FC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C,
|
||||
0x000C, 0x000C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'Q'
|
||||
*/
|
||||
0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xE003, 0xC003,
|
||||
0xC003, 0xC003, 0xC003, 0xC003, 0xE007, 0x6306, 0x3F0E, 0x3C1C,
|
||||
0x3FF8, 0xF7E0, 0xC000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'R'
|
||||
*/
|
||||
0x0000, 0x0FFE, 0x1FFE, 0x3806, 0x3006, 0x3006, 0x3006, 0x3806,
|
||||
0x1FFE, 0x07FE, 0x0306, 0x0606, 0x0C06, 0x1806, 0x1806, 0x3006,
|
||||
0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'S'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x0FF8, 0x0C1C, 0x180C, 0x180C, 0x000C, 0x001C,
|
||||
0x03F8, 0x0FE0, 0x1E00, 0x3800, 0x3006, 0x3006, 0x300E, 0x1C1C,
|
||||
0x0FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'T'
|
||||
*/
|
||||
0x0000, 0x7FFE, 0x7FFE, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'U'
|
||||
*/
|
||||
0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C,
|
||||
0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x1818,
|
||||
0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'V'
|
||||
*/
|
||||
0x0000, 0x6003, 0x3006, 0x3006, 0x3006, 0x180C, 0x180C, 0x180C,
|
||||
0x0C18, 0x0C18, 0x0E38, 0x0630, 0x0630, 0x0770, 0x0360, 0x0360,
|
||||
0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'W'
|
||||
*/
|
||||
0x0000, 0x6003, 0x61C3, 0x61C3, 0x61C3, 0x3366, 0x3366, 0x3366,
|
||||
0x3366, 0x3366, 0x3366, 0x1B6C, 0x1B6C, 0x1B6C, 0x1A2C, 0x1E3C,
|
||||
0x0E38, 0x0E38, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'X'
|
||||
*/
|
||||
0x0000, 0xE00F, 0x700C, 0x3018, 0x1830, 0x0C70, 0x0E60, 0x07C0,
|
||||
0x0380, 0x0380, 0x03C0, 0x06E0, 0x0C70, 0x1C30, 0x1818, 0x300C,
|
||||
0x600E, 0xE007, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'Y'
|
||||
*/
|
||||
0x0000, 0xC003, 0x6006, 0x300C, 0x381C, 0x1838, 0x0C30, 0x0660,
|
||||
0x07E0, 0x03C0, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'Z'
|
||||
*/
|
||||
0x0000, 0x7FFC, 0x7FFC, 0x6000, 0x3000, 0x1800, 0x0C00, 0x0600,
|
||||
0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, 0x000C, 0x0006,
|
||||
0x7FFE, 0x7FFE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '['
|
||||
*/
|
||||
0x0000, 0x03E0, 0x03E0, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
|
||||
0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060,
|
||||
0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x03E0, 0x03E0, 0x0000,
|
||||
/**
|
||||
* @brief '\'
|
||||
*/
|
||||
0x0000, 0x0030, 0x0030, 0x0060, 0x0060, 0x0060, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0300, 0x0300, 0x0300,
|
||||
0x0600, 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief ']'
|
||||
*/
|
||||
0x0000, 0x03E0, 0x03E0, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
|
||||
0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300,
|
||||
0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x03E0, 0x03E0, 0x0000,
|
||||
/**
|
||||
* @brief '^'
|
||||
*/
|
||||
0x0000, 0x0000, 0x01C0, 0x01C0, 0x0360, 0x0360, 0x0360, 0x0630,
|
||||
0x0630, 0x0C18, 0x0C18, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '_'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '''
|
||||
*/
|
||||
0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'a'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03F0, 0x07F8,
|
||||
0x0C1C, 0x0C0C, 0x0F00, 0x0FF0, 0x0CF8, 0x0C0C, 0x0C0C, 0x0F1C,
|
||||
0x0FF8, 0x18F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'b'
|
||||
*/
|
||||
0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x03D8, 0x0FF8,
|
||||
0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
|
||||
0x0FF8, 0x03D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'c'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x07F0,
|
||||
0x0E30, 0x0C18, 0x0018, 0x0018, 0x0018, 0x0018, 0x0C18, 0x0E30,
|
||||
0x07F0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'd'
|
||||
*/
|
||||
0x0000, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x1BC0, 0x1FF0,
|
||||
0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
|
||||
0x1FF0, 0x1BC0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'e'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
|
||||
0x0C30, 0x1818, 0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x1838, 0x1C30,
|
||||
0x0FF0, 0x07C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'f'
|
||||
*/
|
||||
0x0000, 0x0F80, 0x0FC0, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'g'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0DE0, 0x0FF8,
|
||||
0x0E18, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0E18,
|
||||
0x0FF8, 0x0DE0, 0x0C00, 0x0C0C, 0x061C, 0x07F8, 0x01F0, 0x0000,
|
||||
/**
|
||||
* @brief 'h'
|
||||
*/
|
||||
0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x07D8, 0x0FF8,
|
||||
0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
|
||||
0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'i'
|
||||
*/
|
||||
0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'j'
|
||||
*/
|
||||
0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00F8, 0x0078, 0x0000,
|
||||
/**
|
||||
* @brief 'k'
|
||||
*/
|
||||
0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0C0C, 0x060C,
|
||||
0x030C, 0x018C, 0x00CC, 0x006C, 0x00FC, 0x019C, 0x038C, 0x030C,
|
||||
0x060C, 0x0C0C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'l'
|
||||
*/
|
||||
0x0000, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'm'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3C7C, 0x7EFF,
|
||||
0xE3C7, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183,
|
||||
0xC183, 0xC183, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'n'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0798, 0x0FF8,
|
||||
0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818,
|
||||
0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'o'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0,
|
||||
0x0C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C30,
|
||||
0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'p'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03D8, 0x0FF8,
|
||||
0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38,
|
||||
0x0FF8, 0x03D8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0000,
|
||||
/**
|
||||
* @brief 'q'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1BC0, 0x1FF0,
|
||||
0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30,
|
||||
0x1FF0, 0x1BC0, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x0000,
|
||||
/**
|
||||
* @brief 'r'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07B0, 0x03F0,
|
||||
0x0070, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030,
|
||||
0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 's'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03E0, 0x03F0,
|
||||
0x0E38, 0x0C18, 0x0038, 0x03F0, 0x07C0, 0x0C00, 0x0C18, 0x0E38,
|
||||
0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 't'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0080, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x07C0, 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'u'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1818, 0x1818,
|
||||
0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C38,
|
||||
0x1FF0, 0x19E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'v'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x180C, 0x0C18,
|
||||
0x0C18, 0x0C18, 0x0630, 0x0630, 0x0630, 0x0360, 0x0360, 0x0360,
|
||||
0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'w'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x41C1, 0x41C1,
|
||||
0x61C3, 0x6363, 0x6363, 0x6363, 0x3636, 0x3636, 0x3636, 0x1C1C,
|
||||
0x1C1C, 0x1C1C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'x'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x381C, 0x1C38,
|
||||
0x0C30, 0x0660, 0x0360, 0x0360, 0x0360, 0x0360, 0x0660, 0x0C30,
|
||||
0x1C38, 0x381C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief 'y'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3018, 0x1830,
|
||||
0x1830, 0x1870, 0x0C60, 0x0C60, 0x0CE0, 0x06C0, 0x06C0, 0x0380,
|
||||
0x0380, 0x0380, 0x0180, 0x0180, 0x01C0, 0x00F0, 0x0070, 0x0000,
|
||||
/**
|
||||
* @brief 'z'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1FFC, 0x1FFC,
|
||||
0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018,
|
||||
0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '{'
|
||||
*/
|
||||
0x0000, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x0060, 0x0060, 0x0030, 0x0060, 0x0040, 0x00C0, 0x00C0,
|
||||
0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '|'
|
||||
*/
|
||||
0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000,
|
||||
/**
|
||||
* @brief '}'
|
||||
*/
|
||||
0x0000, 0x0060, 0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0180,
|
||||
0x0180, 0x0300, 0x0300, 0x0600, 0x0300, 0x0100, 0x0180, 0x0180,
|
||||
0x0180, 0x0180, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0000, 0x0000,
|
||||
/**
|
||||
* @brief '~'
|
||||
*/
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x10F0, 0x1FF8, 0x0F08, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000};
|
||||
|
||||
const uint16_t ASCII12x12_Table [] = {
|
||||
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x0000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x5000,0x5000,0x5000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0900,0x0900,0x1200,0x7f00,0x1200,0x7f00,0x1200,0x2400,0x2400,0x0000,0x0000,
|
||||
0x1000,0x3800,0x5400,0x5000,0x5000,0x3800,0x1400,0x5400,0x5400,0x3800,0x1000,0x0000,
|
||||
0x0000,0x3080,0x4900,0x4900,0x4a00,0x32c0,0x0520,0x0920,0x0920,0x10c0,0x0000,0x0000,
|
||||
0x0000,0x0c00,0x1200,0x1200,0x1400,0x1800,0x2500,0x2300,0x2300,0x1d80,0x0000,0x0000,
|
||||
0x0000,0x4000,0x4000,0x4000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0800,0x1000,0x1000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x1000,0x1000,
|
||||
0x0000,0x4000,0x2000,0x2000,0x1000,0x1000,0x1000,0x1000,0x1000,0x1000,0x2000,0x2000,
|
||||
0x0000,0x2000,0x7000,0x2000,0x5000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x0800,0x0800,0x7f00,0x0800,0x0800,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x2000,0x2000,0x4000,
|
||||
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x7000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x1000,0x1000,0x1000,0x2000,0x2000,0x2000,0x2000,0x4000,0x4000,0x0000,0x0000,
|
||||
0x0000,0x1000,0x2800,0x4400,0x4400,0x4400,0x4400,0x4400,0x2800,0x1000,0x0000,0x0000,
|
||||
0x0000,0x1000,0x3000,0x5000,0x1000,0x1000,0x1000,0x1000,0x1000,0x1000,0x0000,0x0000,
|
||||
0x0000,0x3000,0x4800,0x4400,0x0400,0x0800,0x1000,0x2000,0x4000,0x7c00,0x0000,0x0000,
|
||||
0x0000,0x3000,0x4800,0x0400,0x0800,0x1000,0x0800,0x4400,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x0800,0x1800,0x1800,0x2800,0x2800,0x4800,0x7c00,0x0800,0x0800,0x0000,0x0000,
|
||||
0x0000,0x3c00,0x2000,0x4000,0x7000,0x4800,0x0400,0x4400,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x1800,0x2400,0x4000,0x5000,0x6800,0x4400,0x4400,0x2800,0x1000,0x0000,0x0000,
|
||||
0x0000,0x7c00,0x0400,0x0800,0x1000,0x1000,0x1000,0x2000,0x2000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x1000,0x2800,0x4400,0x2800,0x1000,0x2800,0x4400,0x2800,0x1000,0x0000,0x0000,
|
||||
0x0000,0x1000,0x2800,0x4400,0x4400,0x2c00,0x1400,0x0400,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x2000,0x0000,0x0000,0x0000,0x0000,0x0000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x2000,0x0000,0x0000,0x0000,0x0000,0x0000,0x2000,0x2000,0x4000,
|
||||
0x0000,0x0000,0x0400,0x0800,0x3000,0x4000,0x3000,0x0800,0x0400,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x7c00,0x0000,0x0000,0x7c00,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x4000,0x2000,0x1800,0x0400,0x1800,0x2000,0x4000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x3800,0x6400,0x4400,0x0400,0x0800,0x1000,0x1000,0x0000,0x1000,0x0000,0x0000,
|
||||
0x0000,0x0f80,0x1040,0x2ea0,0x51a0,0x5120,0x5120,0x5120,0x5320,0x4dc0,0x2020,0x1040,
|
||||
0x0000,0x0800,0x1400,0x1400,0x1400,0x2200,0x3e00,0x2200,0x4100,0x4100,0x0000,0x0000,
|
||||
0x0000,0x3c00,0x2200,0x2200,0x2200,0x3c00,0x2200,0x2200,0x2200,0x3c00,0x0000,0x0000,
|
||||
0x0000,0x0e00,0x1100,0x2100,0x2000,0x2000,0x2000,0x2100,0x1100,0x0e00,0x0000,0x0000,
|
||||
0x0000,0x3c00,0x2200,0x2100,0x2100,0x2100,0x2100,0x2100,0x2200,0x3c00,0x0000,0x0000,
|
||||
0x0000,0x3e00,0x2000,0x2000,0x2000,0x3e00,0x2000,0x2000,0x2000,0x3e00,0x0000,0x0000,
|
||||
0x0000,0x3e00,0x2000,0x2000,0x2000,0x3c00,0x2000,0x2000,0x2000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x0e00,0x1100,0x2100,0x2000,0x2700,0x2100,0x2100,0x1100,0x0e00,0x0000,0x0000,
|
||||
0x0000,0x2100,0x2100,0x2100,0x2100,0x3f00,0x2100,0x2100,0x2100,0x2100,0x0000,0x0000,
|
||||
0x0000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x0800,0x0800,0x0800,0x0800,0x0800,0x0800,0x4800,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x2200,0x2400,0x2800,0x2800,0x3800,0x2800,0x2400,0x2400,0x2200,0x0000,0x0000,
|
||||
0x0000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x3e00,0x0000,0x0000,
|
||||
0x0000,0x2080,0x3180,0x3180,0x3180,0x2a80,0x2a80,0x2a80,0x2a80,0x2480,0x0000,0x0000,
|
||||
0x0000,0x2100,0x3100,0x3100,0x2900,0x2900,0x2500,0x2300,0x2300,0x2100,0x0000,0x0000,
|
||||
0x0000,0x0c00,0x1200,0x2100,0x2100,0x2100,0x2100,0x2100,0x1200,0x0c00,0x0000,0x0000,
|
||||
0x0000,0x3c00,0x2200,0x2200,0x2200,0x3c00,0x2000,0x2000,0x2000,0x2000,0x0000,0x0000,
|
||||
0x0000,0x0c00,0x1200,0x2100,0x2100,0x2100,0x2100,0x2100,0x1600,0x0d00,0x0100,0x0000,
|
||||
0x0000,0x3e00,0x2100,0x2100,0x2100,0x3e00,0x2400,0x2200,0x2100,0x2080,0x0000,0x0000,
|
||||
0x0000,0x1c00,0x2200,0x2200,0x2000,0x1c00,0x0200,0x2200,0x2200,0x1c00,0x0000,0x0000,
|
||||
0x0000,0x3e00,0x0800,0x0800,0x0800,0x0800,0x0800,0x0800,0x0800,0x0800,0x0000,0x0000,
|
||||
0x0000,0x2100,0x2100,0x2100,0x2100,0x2100,0x2100,0x2100,0x1200,0x0c00,0x0000,0x0000,
|
||||
0x0000,0x4100,0x4100,0x2200,0x2200,0x2200,0x1400,0x1400,0x1400,0x0800,0x0000,0x0000,
|
||||
0x0000,0x4440,0x4a40,0x2a40,0x2a80,0x2a80,0x2a80,0x2a80,0x2a80,0x1100,0x0000,0x0000,
|
||||
0x0000,0x4100,0x2200,0x1400,0x1400,0x0800,0x1400,0x1400,0x2200,0x4100,0x0000,0x0000,
|
||||
0x0000,0x4100,0x2200,0x2200,0x1400,0x0800,0x0800,0x0800,0x0800,0x0800,0x0000,0x0000,
|
||||
0x0000,0x7e00,0x0200,0x0400,0x0800,0x1000,0x1000,0x2000,0x4000,0x7e00,0x0000,0x0000,
|
||||
0x0000,0x3000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,
|
||||
0x0000,0x4000,0x4000,0x2000,0x2000,0x2000,0x2000,0x2000,0x1000,0x1000,0x0000,0x0000,
|
||||
0x0000,0x6000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,
|
||||
0x0000,0x1000,0x2800,0x2800,0x2800,0x4400,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x7e00,
|
||||
0x4000,0x2000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3800,0x4400,0x0400,0x3c00,0x4400,0x4400,0x3c00,0x0000,0x0000,
|
||||
0x0000,0x4000,0x4000,0x5800,0x6400,0x4400,0x4400,0x4400,0x6400,0x5800,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3000,0x4800,0x4000,0x4000,0x4000,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x0400,0x0400,0x3400,0x4c00,0x4400,0x4400,0x4400,0x4c00,0x3400,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3800,0x4400,0x4400,0x7c00,0x4000,0x4400,0x3800,0x0000,0x0000,
|
||||
0x0000,0x6000,0x4000,0xe000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3400,0x4c00,0x4400,0x4400,0x4400,0x4c00,0x3400,0x0400,0x4400,
|
||||
0x0000,0x4000,0x4000,0x5800,0x6400,0x4400,0x4400,0x4400,0x4400,0x4400,0x0000,0x0000,
|
||||
0x0000,0x4000,0x0000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x0000,0x0000,
|
||||
0x0000,0x4000,0x0000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,
|
||||
0x0000,0x4000,0x4000,0x4800,0x5000,0x6000,0x5000,0x5000,0x4800,0x4800,0x0000,0x0000,
|
||||
0x0000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x4000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x5200,0x6d00,0x4900,0x4900,0x4900,0x4900,0x4900,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x5800,0x6400,0x4400,0x4400,0x4400,0x4400,0x4400,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3800,0x4400,0x4400,0x4400,0x4400,0x4400,0x3800,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x5800,0x6400,0x4400,0x4400,0x4400,0x6400,0x5800,0x4000,0x4000,
|
||||
0x0000,0x0000,0x0000,0x3400,0x4c00,0x4400,0x4400,0x4400,0x4c00,0x3400,0x0400,0x0400,
|
||||
0x0000,0x0000,0x0000,0x5000,0x6000,0x4000,0x4000,0x4000,0x4000,0x4000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x3000,0x4800,0x4000,0x3000,0x0800,0x4800,0x3000,0x0000,0x0000,
|
||||
0x0000,0x4000,0x4000,0xe000,0x4000,0x4000,0x4000,0x4000,0x4000,0x6000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x4400,0x4400,0x4400,0x4400,0x4400,0x4c00,0x3400,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x4400,0x4400,0x2800,0x2800,0x2800,0x2800,0x1000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x4900,0x4900,0x5500,0x5500,0x5500,0x5500,0x2200,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x4400,0x2800,0x2800,0x1000,0x2800,0x2800,0x4400,0x0000,0x0000,
|
||||
0x0000,0x0000,0x0000,0x4400,0x4400,0x2800,0x2800,0x2800,0x1000,0x1000,0x1000,0x1000,
|
||||
0x0000,0x0000,0x0000,0x7800,0x0800,0x1000,0x2000,0x2000,0x4000,0x7800,0x0000,0x0000,
|
||||
0x0000,0x1000,0x2000,0x2000,0x2000,0x2000,0x4000,0x2000,0x2000,0x2000,0x2000,0x2000,
|
||||
0x0000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,0x2000,
|
||||
0x0000,0x4000,0x2000,0x2000,0x2000,0x2000,0x1000,0x2000,0x2000,0x2000,0x2000,0x2000,
|
||||
0x0000,0x0000,0x0000,0x0000,0x7400,0x5800,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,
|
||||
0x0000,0x0000,0x7000,0x5000,0x5000,0x5000,0x5000,0x5000,0x5000,0x7000,0x0000,0x0000};
|
||||
|
||||
const uint16_t ASCII8x12_Table [] = {
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x00,0x10,0x00,
|
||||
0x00,0x00,0x00,0x28,0x28,0x28,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x14,0x14,0x3e,0x14,0x28,0x7c,0x28,0x28,0x00,
|
||||
0x00,0x00,0x10,0x38,0x54,0x50,0x38,0x14,0x14,0x54,0x38,0x10,
|
||||
0x00,0x00,0x00,0x44,0xa8,0xa8,0x50,0x14,0x1a,0x2a,0x24,0x00,
|
||||
0x00,0x00,0x00,0x20,0x50,0x50,0x20,0xe8,0x98,0x98,0x60,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x40,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
|
||||
0x00,0x00,0x00,0x80,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
|
||||
0x00,0x00,0x00,0x40,0xe0,0x40,0xa0,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x20,0x20,0xf8,0x20,0x20,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x40,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,
|
||||
0x00,0x00,0x00,0x20,0x20,0x20,0x40,0x40,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x90,0x90,0x90,0x90,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x20,0x60,0xa0,0x20,0x20,0x20,0x20,0x20,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x10,0x10,0x20,0x40,0x80,0xf0,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x10,0x60,0x10,0x10,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x10,0x30,0x50,0x50,0x90,0xf8,0x10,0x10,0x00,
|
||||
0x00,0x00,0x00,0x70,0x40,0x80,0xe0,0x10,0x10,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x80,0xa0,0xd0,0x90,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0xf0,0x10,0x20,0x20,0x20,0x40,0x40,0x40,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x90,0x60,0x90,0x90,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x90,0xb0,0x50,0x10,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x40,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x40,0x40,
|
||||
0x00,0x00,0x00,0x00,0x00,0x10,0x60,0x80,0x60,0x10,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0xf0,0x00,0xf0,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x10,0x60,0x80,0x00,0x00,
|
||||
0x00,0x00,0x00,0x60,0x90,0x10,0x20,0x40,0x40,0x00,0x40,0x00,
|
||||
0x00,0x00,0x00,0x1c,0x22,0x5b,0xa5,0xa5,0xa5,0xa5,0x9e,0x41,
|
||||
0x00,0x00,0x00,0x20,0x50,0x50,0x50,0x50,0x70,0x88,0x88,0x00,
|
||||
0x00,0x00,0x00,0xf0,0x88,0x88,0xf0,0x88,0x88,0x88,0xf0,0x00,
|
||||
0x00,0x00,0x00,0x38,0x44,0x84,0x80,0x80,0x84,0x44,0x38,0x00,
|
||||
0x00,0x00,0x00,0xe0,0x90,0x88,0x88,0x88,0x88,0x90,0xe0,0x00,
|
||||
0x00,0x00,0x00,0xf8,0x80,0x80,0xf8,0x80,0x80,0x80,0xf8,0x00,
|
||||
0x00,0x00,0x00,0x78,0x40,0x40,0x70,0x40,0x40,0x40,0x40,0x00,
|
||||
0x00,0x00,0x00,0x38,0x44,0x84,0x80,0x9c,0x84,0x44,0x38,0x00,
|
||||
0x00,0x00,0x00,0x88,0x88,0x88,0xf8,0x88,0x88,0x88,0x88,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x90,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x88,0x90,0xa0,0xe0,0xa0,0x90,0x90,0x88,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0xf0,0x00,
|
||||
0x00,0x00,0x00,0x82,0xc6,0xc6,0xaa,0xaa,0xaa,0xaa,0x92,0x00,
|
||||
0x00,0x00,0x00,0x84,0xc4,0xa4,0xa4,0x94,0x94,0x8c,0x84,0x00,
|
||||
0x00,0x00,0x00,0x30,0x48,0x84,0x84,0x84,0x84,0x48,0x30,0x00,
|
||||
0x00,0x00,0x00,0xf0,0x88,0x88,0x88,0xf0,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x30,0x48,0x84,0x84,0x84,0x84,0x58,0x34,0x04,
|
||||
0x00,0x00,0x00,0x78,0x44,0x44,0x78,0x50,0x48,0x44,0x42,0x00,
|
||||
0x00,0x00,0x00,0x70,0x88,0x80,0x70,0x08,0x88,0x88,0x70,0x00,
|
||||
0x00,0x00,0x00,0xf8,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x00,
|
||||
0x00,0x00,0x00,0x84,0x84,0x84,0x84,0x84,0x84,0x48,0x30,0x00,
|
||||
0x00,0x00,0x00,0x88,0x88,0x50,0x50,0x50,0x50,0x50,0x20,0x00,
|
||||
0x00,0x00,0x00,0x92,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0x44,0x00,
|
||||
0x00,0x00,0x00,0x84,0x48,0x48,0x30,0x30,0x48,0x48,0x84,0x00,
|
||||
0x00,0x00,0x00,0x88,0x50,0x50,0x20,0x20,0x20,0x20,0x20,0x00,
|
||||
0x00,0x00,0x00,0xf8,0x08,0x10,0x20,0x20,0x40,0x80,0xf8,0x00,
|
||||
0x00,0x00,0x00,0xc0,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
|
||||
0x00,0x00,0x00,0x80,0x80,0x40,0x40,0x40,0x40,0x20,0x20,0x00,
|
||||
0x00,0x00,0x00,0xc0,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
|
||||
0x00,0x00,0x00,0x40,0xa0,0xa0,0xa0,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf8,
|
||||
0x00,0x00,0x00,0x80,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xe0,0x10,0x70,0x90,0x90,0x70,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0xa0,0xd0,0x90,0x90,0xd0,0xa0,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x60,0x90,0x80,0x80,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x10,0x10,0x50,0xb0,0x90,0x90,0xb0,0x50,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x60,0x90,0xf0,0x80,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0xc0,0x80,0xc0,0x80,0x80,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x50,0xb0,0x90,0x90,0xb0,0x50,0x10,
|
||||
0x00,0x00,0x00,0x80,0x80,0xa0,0xd0,0x90,0x90,0x90,0x90,0x00,
|
||||
0x00,0x00,0x00,0x80,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x80,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
|
||||
0x00,0x00,0x00,0x80,0x80,0x90,0xa0,0xc0,0xa0,0x90,0x90,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xa6,0xda,0x92,0x92,0x92,0x92,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xa0,0xd0,0x90,0x90,0x90,0x90,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x60,0x90,0x90,0x90,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xa0,0xd0,0x90,0x90,0xd0,0xa0,0x80,
|
||||
0x00,0x00,0x00,0x00,0x00,0x50,0xb0,0x90,0x90,0xb0,0x50,0x10,
|
||||
0x00,0x00,0x00,0x00,0x00,0xa0,0xc0,0x80,0x80,0x80,0x80,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xe0,0x90,0x40,0x20,0x90,0x60,0x00,
|
||||
0x00,0x00,0x00,0x80,0x80,0xc0,0x80,0x80,0x80,0x80,0xc0,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x90,0x90,0x90,0x90,0xb0,0x50,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x88,0x88,0x50,0x50,0x50,0x20,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x92,0xaa,0xaa,0xaa,0xaa,0x44,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x88,0x50,0x20,0x20,0x50,0x88,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x88,0x50,0x50,0x50,0x20,0x20,0x20,
|
||||
0x00,0x00,0x00,0x00,0x00,0xf0,0x10,0x20,0x40,0x80,0xf0,0x00,
|
||||
0x00,0x00,0x00,0xc0,0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x80,
|
||||
0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
|
||||
0x00,0x00,0x00,0xc0,0x40,0x40,0x40,0x20,0x40,0x40,0x40,0x40,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0xe8,0xb0,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0xe0,0xa0,0xa0,0xa0,0xa0,0xa0,0xe0,0x00};
|
||||
|
||||
const uint16_t ASCII8x8_Table [] = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x40,
|
||||
0xa0, 0xa0, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x24, 0x24, 0xfe, 0x48, 0xfc, 0x48, 0x48,
|
||||
0x38, 0x54, 0x50, 0x38, 0x14, 0x14, 0x54, 0x38,
|
||||
0x44, 0xa8, 0xa8, 0x50, 0x14, 0x1a, 0x2a, 0x24,
|
||||
0x10, 0x28, 0x28, 0x10, 0x74, 0x4c, 0x4c, 0x30,
|
||||
0x10, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x08, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x08,
|
||||
0x10, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x10,
|
||||
0x00, 0x00, 0x24, 0x18, 0x3c, 0x18, 0x24, 0x00,
|
||||
0x00, 0x00, 0x10, 0x10, 0x7c, 0x10, 0x10, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x10,
|
||||
0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
|
||||
0x08, 0x08, 0x08, 0x10, 0x10, 0x20, 0x20, 0x20,
|
||||
0x18, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x18,
|
||||
0x08, 0x18, 0x28, 0x08, 0x08, 0x08, 0x08, 0x08,
|
||||
0x38, 0x44, 0x00, 0x04, 0x08, 0x10, 0x20, 0x7c,
|
||||
0x18, 0x24, 0x04, 0x18, 0x04, 0x04, 0x24, 0x18,
|
||||
0x04, 0x0c, 0x14, 0x24, 0x44, 0x7e, 0x04, 0x04,
|
||||
0x3c, 0x20, 0x20, 0x38, 0x04, 0x04, 0x24, 0x18,
|
||||
0x18, 0x24, 0x20, 0x38, 0x24, 0x24, 0x24, 0x18,
|
||||
0x3c, 0x04, 0x08, 0x08, 0x08, 0x10, 0x10, 0x10,
|
||||
0x18, 0x24, 0x24, 0x18, 0x24, 0x24, 0x24, 0x18,
|
||||
0x18, 0x24, 0x24, 0x24, 0x1c, 0x04, 0x24, 0x18,
|
||||
0x00, 0x00, 0x10, 0x00, 0x00, 0x10, 0x00, 0x00,
|
||||
0x00, 0x00, 0x08, 0x00, 0x00, 0x08, 0x10, 0x00,
|
||||
0x00, 0x00, 0x04, 0x18, 0x20, 0x18, 0x04, 0x00,
|
||||
0x00, 0x00, 0x00, 0x3c, 0x00, 0x3c, 0x00, 0x00,
|
||||
0x00, 0x00, 0x20, 0x18, 0x04, 0x18, 0x20, 0x00,
|
||||
0x18, 0x24, 0x04, 0x08, 0x10, 0x10, 0x00, 0x10,
|
||||
0x3c, 0x42, 0x99, 0xa5, 0xa5, 0x9d, 0x42, 0x38,
|
||||
0x38, 0x44, 0x44, 0x44, 0x7c, 0x44, 0x44, 0x44,
|
||||
0x78, 0x44, 0x44, 0x78, 0x44, 0x44, 0x44, 0x78,
|
||||
0x1c, 0x22, 0x42, 0x40, 0x40, 0x42, 0x22, 0x1c,
|
||||
0x70, 0x48, 0x44, 0x44, 0x44, 0x44, 0x48, 0x70,
|
||||
0x7c, 0x40, 0x40, 0x7c, 0x40, 0x40, 0x40, 0x7c,
|
||||
0x3c, 0x20, 0x20, 0x38, 0x20, 0x20, 0x20, 0x20,
|
||||
0x1c, 0x22, 0x42, 0x40, 0x4e, 0x42, 0x22, 0x1c,
|
||||
0x44, 0x44, 0x44, 0x7c, 0x44, 0x44, 0x44, 0x44,
|
||||
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x04, 0x04, 0x04, 0x04, 0x04, 0x24, 0x24, 0x18,
|
||||
0x44, 0x48, 0x50, 0x70, 0x50, 0x48, 0x48, 0x44,
|
||||
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x3c,
|
||||
0x82, 0xc6, 0xc6, 0xaa, 0xaa, 0xaa, 0xaa, 0x92,
|
||||
0x42, 0x62, 0x52, 0x52, 0x4a, 0x4a, 0x46, 0x42,
|
||||
0x18, 0x24, 0x42, 0x42, 0x42, 0x42, 0x24, 0x18,
|
||||
0x78, 0x44, 0x44, 0x44, 0x78, 0x40, 0x40, 0x40,
|
||||
0x18, 0x24, 0x42, 0x42, 0x42, 0x42, 0x2c, 0x1a,
|
||||
0x78, 0x44, 0x44, 0x78, 0x50, 0x48, 0x44, 0x42,
|
||||
0x38, 0x44, 0x40, 0x38, 0x04, 0x44, 0x44, 0x38,
|
||||
0x7c, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x24, 0x18,
|
||||
0x44, 0x44, 0x28, 0x28, 0x28, 0x28, 0x28, 0x10,
|
||||
0x92, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x44,
|
||||
0x42, 0x24, 0x24, 0x18, 0x18, 0x24, 0x24, 0x42,
|
||||
0x44, 0x28, 0x28, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x7c, 0x04, 0x08, 0x10, 0x10, 0x20, 0x40, 0x7c,
|
||||
0x1c, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x1c,
|
||||
0x10, 0x10, 0x08, 0x08, 0x08, 0x08, 0x04, 0x04,
|
||||
0x1c, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x1c,
|
||||
0x10, 0x28, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x20, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x04, 0x1c, 0x24, 0x24, 0x1c,
|
||||
0x20, 0x20, 0x28, 0x34, 0x24, 0x24, 0x34, 0x28,
|
||||
0x00, 0x00, 0x18, 0x24, 0x20, 0x20, 0x24, 0x18,
|
||||
0x04, 0x04, 0x14, 0x2c, 0x24, 0x24, 0x2c, 0x14,
|
||||
0x00, 0x00, 0x18, 0x24, 0x3c, 0x20, 0x24, 0x18,
|
||||
0x00, 0x18, 0x10, 0x10, 0x18, 0x10, 0x10, 0x10,
|
||||
0x00, 0x18, 0x24, 0x24, 0x18, 0x04, 0x24, 0x18,
|
||||
0x20, 0x20, 0x28, 0x34, 0x24, 0x24, 0x24, 0x24,
|
||||
0x10, 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x08, 0x00, 0x08, 0x08, 0x08, 0x08, 0x28, 0x10,
|
||||
0x20, 0x20, 0x24, 0x28, 0x30, 0x28, 0x24, 0x24,
|
||||
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x00, 0x00, 0xa6, 0xda, 0x92, 0x92, 0x92, 0x92,
|
||||
0x00, 0x00, 0x28, 0x34, 0x24, 0x24, 0x24, 0x24,
|
||||
0x00, 0x00, 0x18, 0x24, 0x24, 0x24, 0x24, 0x18,
|
||||
0x00, 0x28, 0x34, 0x24, 0x38, 0x20, 0x20, 0x20,
|
||||
0x00, 0x14, 0x2c, 0x24, 0x1c, 0x04, 0x04, 0x04,
|
||||
0x00, 0x00, 0x2c, 0x30, 0x20, 0x20, 0x20, 0x20,
|
||||
0x00, 0x00, 0x18, 0x24, 0x10, 0x08, 0x24, 0x18,
|
||||
0x00, 0x10, 0x38, 0x10, 0x10, 0x10, 0x10, 0x18,
|
||||
0x00, 0x00, 0x24, 0x24, 0x24, 0x24, 0x2c, 0x14,
|
||||
0x00, 0x00, 0x44, 0x44, 0x28, 0x28, 0x28, 0x10,
|
||||
0x00, 0x00, 0x92, 0xaa, 0xaa, 0xaa, 0xaa, 0x44,
|
||||
0x00, 0x00, 0x44, 0x28, 0x10, 0x10, 0x28, 0x44,
|
||||
0x00, 0x28, 0x28, 0x28, 0x10, 0x10, 0x10, 0x10,
|
||||
0x00, 0x00, 0x3c, 0x04, 0x08, 0x10, 0x20, 0x3c,
|
||||
0x00, 0x08, 0x10, 0x10, 0x20, 0x10, 0x10, 0x08,
|
||||
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x00, 0x10, 0x08, 0x08, 0x04, 0x08, 0x08, 0x10,
|
||||
0x00, 0x00, 0x00, 0x60, 0x92, 0x0c, 0x00, 0x00,
|
||||
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
|
||||
|
||||
|
||||
sFONT Font16x24 = {
|
||||
ASCII16x24_Table,
|
||||
16, /* Width */
|
||||
24, /* Height */
|
||||
};
|
||||
|
||||
sFONT Font12x12 = {
|
||||
ASCII12x12_Table,
|
||||
12, /* Width */
|
||||
12, /* Height */
|
||||
};
|
||||
|
||||
sFONT Font8x12 = {
|
||||
ASCII8x12_Table,
|
||||
8, /* Width */
|
||||
12, /* Height */
|
||||
};
|
||||
|
||||
|
||||
sFONT Font8x8 = {
|
||||
ASCII8x8_Table,
|
||||
8, /* Width */
|
||||
8, /* Height */
|
||||
};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FONTS_Private_Function_Prototypes
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FONTS_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,117 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file fonts.h
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief Header for fonts.c
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __FONTS_H
|
||||
#define __FONTS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include <stdint.h>
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup Common
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FONTS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FONTS_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct _tFont
|
||||
{
|
||||
const uint16_t *table;
|
||||
uint16_t Width;
|
||||
uint16_t Height;
|
||||
|
||||
} sFONT;
|
||||
|
||||
extern sFONT Font16x24;
|
||||
extern sFONT Font12x12;
|
||||
extern sFONT Font8x12;
|
||||
extern sFONT Font8x8;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FONTS_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
#define LINE(x) ((x) * (((sFONT *)LCD_GetFont())->Height))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FONTS_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FONTS_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __FONTS_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,584 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l152_eval.c
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides
|
||||
* - set of firmware functions to manage Leds, push-button and COM ports
|
||||
* - low level initialization functions for SD card (on SPI) and
|
||||
* temperature sensor (LM75)
|
||||
* available on STM32L152-EVAL evaluation board from STMicroelectronics.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l152_eval.h"
|
||||
#include "stm32l1xx_spi.h"
|
||||
#include "stm32l1xx_i2c.h"
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL
|
||||
* @brief This file provides firmware functions to manage Leds, push-buttons,
|
||||
* COM ports, SD card on SPI and temperature sensor (LM75) available on
|
||||
* STM32L152-EVAL evaluation board from STMicroelectronics.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
GPIO_TypeDef* GPIO_PORT[LEDn] = {LED1_GPIO_PORT, LED2_GPIO_PORT, LED3_GPIO_PORT,
|
||||
LED4_GPIO_PORT};
|
||||
const uint16_t GPIO_PIN[LEDn] = {LED1_PIN, LED2_PIN, LED3_PIN,
|
||||
LED4_PIN};
|
||||
const uint32_t GPIO_CLK[LEDn] = {LED1_GPIO_CLK, LED2_GPIO_CLK, LED3_GPIO_CLK,
|
||||
LED4_GPIO_CLK};
|
||||
|
||||
GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {WAKEUP_BUTTON_GPIO_PORT, TAMPER_BUTTON_GPIO_PORT,
|
||||
KEY_BUTTON_GPIO_PORT, RIGHT_BUTTON_GPIO_PORT,
|
||||
LEFT_BUTTON_GPIO_PORT, UP_BUTTON_GPIO_PORT,
|
||||
DOWN_BUTTON_GPIO_PORT, SEL_BUTTON_GPIO_PORT};
|
||||
|
||||
const uint16_t BUTTON_PIN[BUTTONn] = {WAKEUP_BUTTON_PIN, TAMPER_BUTTON_PIN,
|
||||
KEY_BUTTON_PIN, RIGHT_BUTTON_PIN,
|
||||
LEFT_BUTTON_PIN, UP_BUTTON_PIN,
|
||||
DOWN_BUTTON_PIN, SEL_BUTTON_PIN};
|
||||
|
||||
const uint32_t BUTTON_CLK[BUTTONn] = {WAKEUP_BUTTON_GPIO_CLK, TAMPER_BUTTON_GPIO_CLK,
|
||||
KEY_BUTTON_GPIO_CLK, RIGHT_BUTTON_GPIO_CLK,
|
||||
LEFT_BUTTON_GPIO_CLK, UP_BUTTON_GPIO_CLK,
|
||||
DOWN_BUTTON_GPIO_CLK, SEL_BUTTON_GPIO_CLK};
|
||||
|
||||
const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {WAKEUP_BUTTON_EXTI_LINE,
|
||||
TAMPER_BUTTON_EXTI_LINE,
|
||||
KEY_BUTTON_EXTI_LINE,
|
||||
RIGHT_BUTTON_EXTI_LINE,
|
||||
LEFT_BUTTON_EXTI_LINE,
|
||||
UP_BUTTON_EXTI_LINE,
|
||||
DOWN_BUTTON_EXTI_LINE,
|
||||
SEL_BUTTON_EXTI_LINE};
|
||||
|
||||
const uint16_t BUTTON_PORT_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PORT_SOURCE,
|
||||
TAMPER_BUTTON_EXTI_PORT_SOURCE,
|
||||
KEY_BUTTON_EXTI_PORT_SOURCE,
|
||||
RIGHT_BUTTON_EXTI_PORT_SOURCE,
|
||||
LEFT_BUTTON_EXTI_PORT_SOURCE,
|
||||
UP_BUTTON_EXTI_PORT_SOURCE,
|
||||
DOWN_BUTTON_EXTI_PORT_SOURCE,
|
||||
SEL_BUTTON_EXTI_PORT_SOURCE};
|
||||
|
||||
const uint16_t BUTTON_PIN_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PIN_SOURCE,
|
||||
TAMPER_BUTTON_EXTI_PIN_SOURCE,
|
||||
KEY_BUTTON_EXTI_PIN_SOURCE,
|
||||
RIGHT_BUTTON_EXTI_PIN_SOURCE,
|
||||
LEFT_BUTTON_EXTI_PIN_SOURCE,
|
||||
UP_BUTTON_EXTI_PIN_SOURCE,
|
||||
DOWN_BUTTON_EXTI_PIN_SOURCE,
|
||||
SEL_BUTTON_EXTI_PIN_SOURCE};
|
||||
|
||||
const uint16_t BUTTON_IRQn[BUTTONn] = {WAKEUP_BUTTON_EXTI_IRQn, TAMPER_BUTTON_EXTI_IRQn,
|
||||
KEY_BUTTON_EXTI_IRQn, RIGHT_BUTTON_EXTI_IRQn,
|
||||
LEFT_BUTTON_EXTI_IRQn, UP_BUTTON_EXTI_IRQn,
|
||||
DOWN_BUTTON_EXTI_IRQn, SEL_BUTTON_EXTI_IRQn};
|
||||
|
||||
USART_TypeDef* COM_USART[COMn] = {EVAL_COM1, EVAL_COM2};
|
||||
|
||||
GPIO_TypeDef* COM_TX_PORT[COMn] = {EVAL_COM1_TX_GPIO_PORT, EVAL_COM2_TX_GPIO_PORT};
|
||||
|
||||
GPIO_TypeDef* COM_RX_PORT[COMn] = {EVAL_COM1_RX_GPIO_PORT, EVAL_COM2_RX_GPIO_PORT};
|
||||
|
||||
const uint32_t COM_USART_CLK[COMn] = {EVAL_COM1_CLK, EVAL_COM2_CLK};
|
||||
|
||||
const uint32_t COM_TX_PORT_CLK[COMn] = {EVAL_COM1_TX_GPIO_CLK, EVAL_COM2_TX_GPIO_CLK};
|
||||
|
||||
const uint32_t COM_RX_PORT_CLK[COMn] = {EVAL_COM1_RX_GPIO_CLK, EVAL_COM2_RX_GPIO_CLK};
|
||||
|
||||
const uint16_t COM_TX_PIN[COMn] = {EVAL_COM1_TX_PIN, EVAL_COM2_TX_PIN};
|
||||
|
||||
const uint16_t COM_RX_PIN[COMn] = {EVAL_COM1_RX_PIN, EVAL_COM2_RX_PIN};
|
||||
|
||||
const uint16_t COM_TX_PIN_SOURCE[COMn] = {EVAL_COM1_TX_SOURCE, EVAL_COM2_TX_SOURCE};
|
||||
|
||||
const uint16_t COM_RX_PIN_SOURCE[COMn] = {EVAL_COM1_RX_SOURCE, EVAL_COM2_RX_SOURCE};
|
||||
|
||||
const uint16_t COM_TX_AF[COMn] = {EVAL_COM1_TX_AF, EVAL_COM2_TX_AF};
|
||||
|
||||
const uint16_t COM_RX_AF[COMn] = {EVAL_COM1_RX_AF, EVAL_COM2_RX_AF};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configures LED GPIO.
|
||||
* @param Led: Specifies the Led to be configured.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg LED1
|
||||
* @arg LED2
|
||||
* @arg LED3
|
||||
* @arg LED4
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_LEDInit(Led_TypeDef Led)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/* Enable the GPIO_LED Clock */
|
||||
RCC_AHBPeriphClockCmd(GPIO_CLK[Led], ENABLE);
|
||||
|
||||
/* Configure the GPIO_LED pin */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led];
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
|
||||
GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure);
|
||||
GPIO_PORT[Led]->BSRRL = GPIO_PIN[Led];
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Turns selected LED On.
|
||||
* @param Led: Specifies the Led to be set on.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg LED1
|
||||
* @arg LED2
|
||||
* @arg LED3
|
||||
* @arg LED4
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_LEDOn(Led_TypeDef Led)
|
||||
{
|
||||
GPIO_PORT[Led]->BSRRH = GPIO_PIN[Led];
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Turns selected LED Off.
|
||||
* @param Led: Specifies the Led to be set off.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg LED1
|
||||
* @arg LED2
|
||||
* @arg LED3
|
||||
* @arg LED4
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_LEDOff(Led_TypeDef Led)
|
||||
{
|
||||
GPIO_PORT[Led]->BSRRL = GPIO_PIN[Led];
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Toggles the selected LED.
|
||||
* @param Led: Specifies the Led to be toggled.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg LED1
|
||||
* @arg LED2
|
||||
* @arg LED3
|
||||
* @arg LED4
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_LEDToggle(Led_TypeDef Led)
|
||||
{
|
||||
GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led];
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures Button GPIO and EXTI Line.
|
||||
* @param Button: Specifies the Button to be configured.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg BUTTON_WAKEUP: Wakeup Push Button
|
||||
* @arg BUTTON_TAMPER: Tamper Push Button
|
||||
* @arg BUTTON_KEY: Key Push Button
|
||||
* @arg BUTTON_RIGHT: Joystick Right Push Button
|
||||
* @arg BUTTON_LEFT: Joystick Left Push Button
|
||||
* @arg BUTTON_UP: Joystick Up Push Button
|
||||
* @arg BUTTON_DOWN: Joystick Down Push Button
|
||||
* @arg BUTTON_SEL: Joystick Sel Push Button
|
||||
* @param Button_Mode: Specifies Button mode.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
|
||||
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt
|
||||
* generation capability
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
EXTI_InitTypeDef EXTI_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
/* Enable the BUTTON Clock */
|
||||
RCC_AHBPeriphClockCmd(BUTTON_CLK[Button], ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
|
||||
|
||||
/* Configure Button pin as input */
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button];
|
||||
GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure);
|
||||
|
||||
|
||||
if (Button_Mode == BUTTON_MODE_EXTI)
|
||||
{
|
||||
/* Connect Button EXTI Line to Button GPIO Pin */
|
||||
SYSCFG_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]);
|
||||
|
||||
/* Configure Button EXTI line */
|
||||
EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button];
|
||||
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
|
||||
|
||||
if((Button != BUTTON_WAKEUP) && (Button != BUTTON_KEY) && (Button != BUTTON_TAMPER))
|
||||
{
|
||||
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
|
||||
}
|
||||
else
|
||||
{
|
||||
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
|
||||
}
|
||||
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
|
||||
EXTI_Init(&EXTI_InitStructure);
|
||||
|
||||
/* Enable and set Button EXTI Interrupt to the lowest priority */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button];
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the selected Button state.
|
||||
* @param Button: Specifies the Button to be checked.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg BUTTON_WAKEUP: Wakeup Push Button
|
||||
* @arg BUTTON_TAMPER: Tamper Push Button
|
||||
* @arg BUTTON_KEY: Key Push Button
|
||||
* @arg BUTTON_RIGHT: Joystick Right Push Button
|
||||
* @arg BUTTON_LEFT: Joystick Left Push Button
|
||||
* @arg BUTTON_UP: Joystick Up Push Button
|
||||
* @arg BUTTON_DOWN: Joystick Down Push Button
|
||||
* @arg BUTTON_SEL: Joystick Sel Push Button
|
||||
* @retval The Button GPIO pin value.
|
||||
*/
|
||||
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button)
|
||||
{
|
||||
return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Configures COM port.
|
||||
* @param COM: Specifies the COM port to be configured.
|
||||
* This parameter can be one of following parameters:
|
||||
* @arg COM1
|
||||
* @arg COM2
|
||||
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure that
|
||||
* contains the configuration information for the specified USART peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/* Enable GPIO clock */
|
||||
RCC_AHBPeriphClockCmd(COM_TX_PORT_CLK[COM] | COM_RX_PORT_CLK[COM], ENABLE);
|
||||
|
||||
/* Enable UART clock */
|
||||
RCC_APB1PeriphClockCmd(COM_USART_CLK[COM], ENABLE);
|
||||
|
||||
/* Connect PXx to USARTx_Tx*/
|
||||
GPIO_PinAFConfig(COM_TX_PORT[COM], COM_TX_PIN_SOURCE[COM], COM_TX_AF[COM]);
|
||||
|
||||
/* Connect PXx to USARTx_Rx*/
|
||||
GPIO_PinAFConfig(COM_RX_PORT[COM], COM_RX_PIN_SOURCE[COM], COM_RX_AF[COM]);
|
||||
|
||||
/* Configure USART Tx as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = COM_TX_PIN[COM];
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_Init(COM_TX_PORT[COM], &GPIO_InitStructure);
|
||||
|
||||
/* Configure USART Rx as input floating */
|
||||
GPIO_InitStructure.GPIO_Pin = COM_RX_PIN[COM];
|
||||
GPIO_Init(COM_RX_PORT[COM], &GPIO_InitStructure);
|
||||
|
||||
/* USART configuration */
|
||||
USART_Init(COM_USART[COM], USART_InitStruct);
|
||||
|
||||
/* Enable USART */
|
||||
USART_Cmd(COM_USART[COM], ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the SPI interface.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SD_LowLevel_DeInit(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
SPI_Cmd(SD_SPI, DISABLE); /*!< SD_SPI disable */
|
||||
SPI_DeInit(SD_SPI); /*!< DeInitializes the SD_SPI */
|
||||
|
||||
/*!< SD_SPI Periph clock disable */
|
||||
RCC_APB1PeriphClockCmd(SD_SPI_CLK, DISABLE);
|
||||
|
||||
/*!< Configure SD_SPI pins: SCK */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI pins: MISO */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_MISO_PIN;
|
||||
GPIO_Init(SD_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI pins: MOSI */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_MOSI_PIN;
|
||||
GPIO_Init(SD_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_CS_PIN;
|
||||
GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
|
||||
GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SD Card and put it into StandBy State (Ready for
|
||||
* data transfer).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SD_LowLevel_Init(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
SPI_InitTypeDef SPI_InitStructure;
|
||||
|
||||
/*!< SD_SPI_CS_GPIO, SD_SPI_MOSI_GPIO, SD_SPI_MISO_GPIO, SD_SPI_DETECT_GPIO
|
||||
and SD_SPI_SCK_GPIO Periph clock enable */
|
||||
RCC_AHBPeriphClockCmd(SD_CS_GPIO_CLK | SD_SPI_MOSI_GPIO_CLK | SD_SPI_MISO_GPIO_CLK |
|
||||
SD_SPI_SCK_GPIO_CLK | SD_DETECT_GPIO_CLK, ENABLE);
|
||||
|
||||
/*!< SD_SPI Periph clock enable */
|
||||
RCC_APB1PeriphClockCmd(SD_SPI_CLK, ENABLE);
|
||||
|
||||
/*!< Configure SD_SPI pins: SCK */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI pins: MISO */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_MISO_PIN;
|
||||
GPIO_Init(SD_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI pins: MOSI */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_SPI_MOSI_PIN;
|
||||
GPIO_Init(SD_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_CS_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
|
||||
GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
|
||||
GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/* Connect PXx to SD_SPI_SCK */
|
||||
GPIO_PinAFConfig(SD_SPI_SCK_GPIO_PORT, SD_SPI_SCK_SOURCE, SD_SPI_SCK_AF);
|
||||
|
||||
/* Connect PXx to SD_SPI_MISO */
|
||||
GPIO_PinAFConfig(SD_SPI_MISO_GPIO_PORT, SD_SPI_MISO_SOURCE, SD_SPI_MISO_AF);
|
||||
|
||||
/* Connect PXx to SD_SPI_MOSI */
|
||||
GPIO_PinAFConfig(SD_SPI_MOSI_GPIO_PORT, SD_SPI_MOSI_SOURCE, SD_SPI_MOSI_AF);
|
||||
|
||||
/*!< SD_SPI Config */
|
||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
|
||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
|
||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
|
||||
|
||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
||||
SPI_Init(SD_SPI, &SPI_InitStructure);
|
||||
|
||||
SPI_Cmd(SD_SPI, ENABLE); /*!< SD_SPI enable */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitializes the LM75_I2C.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void LM75_LowLevel_DeInit(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/*!< Disable LM75_I2C */
|
||||
I2C_Cmd(LM75_I2C, DISABLE);
|
||||
|
||||
/*!< DeInitializes the LM75_I2C */
|
||||
I2C_DeInit(LM75_I2C);
|
||||
|
||||
/*!< LM75_I2C Periph clock disable */
|
||||
RCC_APB1PeriphClockCmd(LM75_I2C_CLK, DISABLE);
|
||||
|
||||
/*!< Configure LM75_I2C pins: SCL */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure LM75_I2C pins: SDA */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN;
|
||||
GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure LM75_I2C pin: SMBUS ALERT */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN;
|
||||
GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the LM75_I2C.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void LM75_LowLevel_Init(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/*!< LM75_I2C Periph clock enable */
|
||||
RCC_APB1PeriphClockCmd(LM75_I2C_CLK, ENABLE);
|
||||
|
||||
/*!< LM75_I2C_SCL_GPIO_CLK, LM75_I2C_SDA_GPIO_CLK
|
||||
and LM75_I2C_SMBUSALERT_GPIO_CLK Periph clock enable */
|
||||
RCC_AHBPeriphClockCmd(LM75_I2C_SCL_GPIO_CLK | LM75_I2C_SDA_GPIO_CLK |
|
||||
LM75_I2C_SMBUSALERT_GPIO_CLK, ENABLE);
|
||||
|
||||
/*!< Configure LM75_I2C pins: SCL */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure LM75_I2C pins: SDA */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN;
|
||||
GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
/*!< Configure LM75_I2C pin: SMBUS ALERT */
|
||||
GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN;
|
||||
GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
|
||||
/* Connect PXx to I2C_SCL */
|
||||
GPIO_PinAFConfig(LM75_I2C_SCL_GPIO_PORT, LM75_I2C_SCL_SOURCE, LM75_I2C_SCL_AF);
|
||||
|
||||
/* Connect PXx to I2C_SDA */
|
||||
GPIO_PinAFConfig(LM75_I2C_SDA_GPIO_PORT, LM75_I2C_SDA_SOURCE, LM75_I2C_SDA_AF);
|
||||
|
||||
/* Connect PXx to I2C_SMBUSALER */
|
||||
GPIO_PinAFConfig(LM75_I2C_SMBUSALERT_GPIO_PORT, LM75_I2C_SMBUSALERT_SOURCE, LM75_I2C_SMBUSALERT_AF);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,337 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l152_eval.h
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains definitions for STM32L152_EVAL's Leds, push-buttons
|
||||
* and COM ports hardware resources.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L152_EVAL_H
|
||||
#define __STM32L152_EVAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32_eval.h"
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL_LED
|
||||
* @{
|
||||
*/
|
||||
#define LEDn 4
|
||||
|
||||
#define LED1_PIN GPIO_Pin_0
|
||||
#define LED1_GPIO_PORT GPIOD
|
||||
#define LED1_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
|
||||
#define LED2_PIN GPIO_Pin_1
|
||||
#define LED2_GPIO_PORT GPIOD
|
||||
#define LED2_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
|
||||
#define LED3_PIN GPIO_Pin_4
|
||||
#define LED3_GPIO_PORT GPIOD
|
||||
#define LED3_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
|
||||
#define LED4_PIN GPIO_Pin_5
|
||||
#define LED4_GPIO_PORT GPIOD
|
||||
#define LED4_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL_BUTTON
|
||||
* @{
|
||||
*/
|
||||
#define BUTTONn 8
|
||||
|
||||
/**
|
||||
* @brief Wakeup push-button
|
||||
*/
|
||||
#define WAKEUP_BUTTON_PIN GPIO_Pin_13
|
||||
#define WAKEUP_BUTTON_GPIO_PORT GPIOC
|
||||
#define WAKEUP_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOC
|
||||
#define WAKEUP_BUTTON_EXTI_LINE EXTI_Line13
|
||||
#define WAKEUP_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOC
|
||||
#define WAKEUP_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource13
|
||||
#define WAKEUP_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Tamper push-button
|
||||
*/
|
||||
#define TAMPER_BUTTON_PIN GPIO_Pin_13
|
||||
#define TAMPER_BUTTON_GPIO_PORT GPIOC
|
||||
#define TAMPER_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOC
|
||||
#define TAMPER_BUTTON_EXTI_LINE EXTI_Line13
|
||||
#define TAMPER_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOC
|
||||
#define TAMPER_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource13
|
||||
#define TAMPER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Key push-button
|
||||
*/
|
||||
#define KEY_BUTTON_PIN GPIO_Pin_13
|
||||
#define KEY_BUTTON_GPIO_PORT GPIOC
|
||||
#define KEY_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOC
|
||||
#define KEY_BUTTON_EXTI_LINE EXTI_Line13
|
||||
#define KEY_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOC
|
||||
#define KEY_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource13
|
||||
#define KEY_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Joystick Right push-button
|
||||
*/
|
||||
#define RIGHT_BUTTON_PIN GPIO_Pin_11
|
||||
#define RIGHT_BUTTON_GPIO_PORT GPIOE
|
||||
#define RIGHT_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define RIGHT_BUTTON_EXTI_LINE EXTI_Line11
|
||||
#define RIGHT_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
|
||||
#define RIGHT_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource11
|
||||
#define RIGHT_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Joystick Left push-button
|
||||
*/
|
||||
#define LEFT_BUTTON_PIN GPIO_Pin_12
|
||||
#define LEFT_BUTTON_GPIO_PORT GPIOE
|
||||
#define LEFT_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define LEFT_BUTTON_EXTI_LINE EXTI_Line12
|
||||
#define LEFT_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
|
||||
#define LEFT_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource12
|
||||
#define LEFT_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Joystick Up push-button
|
||||
*/
|
||||
#define UP_BUTTON_PIN GPIO_Pin_9
|
||||
#define UP_BUTTON_GPIO_PORT GPIOE
|
||||
#define UP_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define UP_BUTTON_EXTI_LINE EXTI_Line9
|
||||
#define UP_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
|
||||
#define UP_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource9
|
||||
#define UP_BUTTON_EXTI_IRQn EXTI9_5_IRQn
|
||||
|
||||
/**
|
||||
* @brief Joystick Down push-button
|
||||
*/
|
||||
#define DOWN_BUTTON_PIN GPIO_Pin_10
|
||||
#define DOWN_BUTTON_GPIO_PORT GPIOE
|
||||
#define DOWN_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define DOWN_BUTTON_EXTI_LINE EXTI_Line10
|
||||
#define DOWN_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
|
||||
#define DOWN_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource10
|
||||
#define DOWN_BUTTON_EXTI_IRQn EXTI15_10_IRQn
|
||||
|
||||
/**
|
||||
* @brief Joystick Sel push-button
|
||||
*/
|
||||
#define SEL_BUTTON_PIN GPIO_Pin_8
|
||||
#define SEL_BUTTON_GPIO_PORT GPIOE
|
||||
#define SEL_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define SEL_BUTTON_EXTI_LINE EXTI_Line8
|
||||
#define SEL_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
|
||||
#define SEL_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource8
|
||||
#define SEL_BUTTON_EXTI_IRQn EXTI9_5_IRQn
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL_COM
|
||||
* @{
|
||||
*/
|
||||
#define COMn 2
|
||||
|
||||
/**
|
||||
* @brief Definition for COM port1, connected to USART2
|
||||
*/
|
||||
#define EVAL_COM1 USART2
|
||||
#define EVAL_COM1_CLK RCC_APB1Periph_USART2
|
||||
#define EVAL_COM1_TX_PIN GPIO_Pin_5
|
||||
#define EVAL_COM1_TX_GPIO_PORT GPIOD
|
||||
#define EVAL_COM1_TX_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
#define EVAL_COM1_TX_SOURCE GPIO_PinSource5
|
||||
#define EVAL_COM1_TX_AF GPIO_AF_USART2
|
||||
#define EVAL_COM1_RX_PIN GPIO_Pin_6
|
||||
#define EVAL_COM1_RX_GPIO_PORT GPIOD
|
||||
#define EVAL_COM1_RX_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
#define EVAL_COM1_RX_SOURCE GPIO_PinSource6
|
||||
#define EVAL_COM1_RX_AF GPIO_AF_USART2
|
||||
#define EVAL_COM1_IRQn USART2_IRQn
|
||||
|
||||
/**
|
||||
* @brief Definition for COM port2, connected to USART3
|
||||
*/
|
||||
#define EVAL_COM2 USART3
|
||||
#define EVAL_COM2_CLK RCC_APB1Periph_USART3
|
||||
|
||||
#define EVAL_COM2_TX_PIN GPIO_Pin_10
|
||||
#define EVAL_COM2_TX_GPIO_PORT GPIOC
|
||||
#define EVAL_COM2_TX_GPIO_CLK RCC_AHBPeriph_GPIOC
|
||||
#define EVAL_COM2_TX_SOURCE GPIO_PinSource10
|
||||
#define EVAL_COM2_TX_AF GPIO_AF_USART3
|
||||
|
||||
#define EVAL_COM2_RX_PIN GPIO_Pin_11
|
||||
#define EVAL_COM2_RX_GPIO_PORT GPIOC
|
||||
#define EVAL_COM2_RX_GPIO_CLK RCC_AHBPeriph_GPIOC
|
||||
#define EVAL_COM2_RX_SOURCE GPIO_PinSource11
|
||||
#define EVAL_COM2_RX_AF GPIO_AF_USART3
|
||||
#define EVAL_COM2_IRQn USART3_IRQn
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL_SD_FLASH
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SD Card SPI Interface
|
||||
*/
|
||||
#define SD_SPI SPI2
|
||||
#define SD_SPI_CLK RCC_APB1Periph_SPI2
|
||||
#define SD_SPI_SCK_PIN GPIO_Pin_13 /* PB.13 */
|
||||
#define SD_SPI_SCK_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define SD_SPI_SCK_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define SD_SPI_SCK_SOURCE GPIO_PinSource13
|
||||
#define SD_SPI_SCK_AF GPIO_AF_SPI2
|
||||
#define SD_SPI_MISO_PIN GPIO_Pin_14 /* PB.14 */
|
||||
#define SD_SPI_MISO_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define SD_SPI_MISO_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define SD_SPI_MISO_SOURCE GPIO_PinSource14
|
||||
#define SD_SPI_MISO_AF GPIO_AF_SPI2
|
||||
#define SD_SPI_MOSI_PIN GPIO_Pin_15 /* PB.15 */
|
||||
#define SD_SPI_MOSI_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define SD_SPI_MOSI_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define SD_SPI_MOSI_SOURCE GPIO_PinSource15
|
||||
#define SD_SPI_MOSI_AF GPIO_AF_SPI2
|
||||
#define SD_CS_PIN GPIO_Pin_7 /* PD.07 */
|
||||
#define SD_CS_GPIO_PORT GPIOD /* GPIOD */
|
||||
#define SD_CS_GPIO_CLK RCC_AHBPeriph_GPIOD
|
||||
#define SD_DETECT_PIN GPIO_Pin_7 /* PE.07 */
|
||||
#define SD_DETECT_GPIO_PORT GPIOE /* GPIOE */
|
||||
#define SD_DETECT_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LOW_LEVEL_TSENSOR_I2C
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief LM75 Temperature Sensor I2C Interface pins
|
||||
*/
|
||||
#define LM75_I2C I2C1
|
||||
#define LM75_I2C_CLK RCC_APB1Periph_I2C1
|
||||
#define LM75_I2C_SCL_PIN GPIO_Pin_6 /* PB.06 */
|
||||
#define LM75_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define LM75_I2C_SCL_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define LM75_I2C_SCL_SOURCE GPIO_PinSource6
|
||||
#define LM75_I2C_SCL_AF GPIO_AF_I2C1
|
||||
#define LM75_I2C_SDA_PIN GPIO_Pin_7 /* PB.07 */
|
||||
#define LM75_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define LM75_I2C_SDA_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define LM75_I2C_SDA_SOURCE GPIO_PinSource7
|
||||
#define LM75_I2C_SDA_AF GPIO_AF_I2C1
|
||||
#define LM75_I2C_SMBUSALERT_PIN GPIO_Pin_5 /* PB.05 */
|
||||
#define LM75_I2C_SMBUSALERT_GPIO_PORT GPIOB /* GPIOB */
|
||||
#define LM75_I2C_SMBUSALERT_GPIO_CLK RCC_AHBPeriph_GPIOB
|
||||
#define LM75_I2C_SMBUSALERT_SOURCE GPIO_PinSource5
|
||||
#define LM75_I2C_SMBUSALERT_AF GPIO_AF_I2C1
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LOW_LEVEL_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void STM_EVAL_LEDInit(Led_TypeDef Led);
|
||||
void STM_EVAL_LEDOn(Led_TypeDef Led);
|
||||
void STM_EVAL_LEDOff(Led_TypeDef Led);
|
||||
void STM_EVAL_LEDToggle(Led_TypeDef Led);
|
||||
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode);
|
||||
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button);
|
||||
void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct);
|
||||
void SD_LowLevel_DeInit(void);
|
||||
void SD_LowLevel_Init(void);
|
||||
void LM75_LowLevel_DeInit(void);
|
||||
void LM75_LowLevel_Init(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L152_EVAL_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,391 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l152_eval_lcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the stm32l152_eval_lcd
|
||||
* firmware driver.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L152_EVAL_LCD_H
|
||||
#define __STM32L152_EVAL_LCD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
#include "../Common/fonts.h"
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L152_EVAL_LCD
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LCD_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
int16_t X;
|
||||
int16_t Y;
|
||||
} Point, * pPoint;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LCD_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Uncomment the line below if you want to use LCD_DrawBMP function to
|
||||
* display a bitmap picture on the LCD. This function assumes that the bitmap
|
||||
* file is loaded in the SPI Flash (mounted on STM32L152-EVAL board), however
|
||||
* user can tailor it according to his application hardware requirement.
|
||||
*/
|
||||
/*#define USE_LCD_DrawBMP*/
|
||||
|
||||
/**
|
||||
* @brief Uncomment the line below if you want to use user defined Delay function
|
||||
* (for precise timing), otherwise default _delay_ function defined within
|
||||
* this driver is used (less precise timing).
|
||||
*/
|
||||
/* #define USE_Delay */
|
||||
|
||||
#ifdef USE_Delay
|
||||
#include "main.h"
|
||||
|
||||
#define _delay_ Delay /* !< User can provide more timing precise _delay_ function
|
||||
(with 10ms time base), using SysTick for example */
|
||||
#else
|
||||
#define _delay_ delay /* !< Default _delay_ function with less precise timing */
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief LCD Control pins
|
||||
*/
|
||||
#define LCD_NCS_PIN GPIO_Pin_2
|
||||
#define LCD_NCS_GPIO_PORT GPIOH
|
||||
#define LCD_NCS_GPIO_CLK RCC_AHBPeriph_GPIOH
|
||||
|
||||
/**
|
||||
* @brief LCD SPI Interface pins
|
||||
*/
|
||||
#define LCD_SPI_SCK_PIN GPIO_Pin_13 /* PE.13 */
|
||||
#define LCD_SPI_SCK_GPIO_PORT GPIOE /* GPIOE */
|
||||
#define LCD_SPI_SCK_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define LCD_SPI_SCK_SOURCE GPIO_PinSource13
|
||||
#define LCD_SPI_SCK_AF GPIO_AF_SPI1
|
||||
#define LCD_SPI_MISO_PIN GPIO_Pin_14 /* PE.14 */
|
||||
#define LCD_SPI_MISO_GPIO_PORT GPIOE /* GPIOE */
|
||||
#define LCD_SPI_MISO_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define LCD_SPI_MISO_SOURCE GPIO_PinSource14
|
||||
#define LCD_SPI_MISO_AF GPIO_AF_SPI1
|
||||
#define LCD_SPI_MOSI_PIN GPIO_Pin_15 /* PE.15 */
|
||||
#define LCD_SPI_MOSI_GPIO_PORT GPIOE /* GPIOE */
|
||||
#define LCD_SPI_MOSI_GPIO_CLK RCC_AHBPeriph_GPIOE
|
||||
#define LCD_SPI_MOSI_SOURCE GPIO_PinSource15
|
||||
#define LCD_SPI_MOSI_AF GPIO_AF_SPI1
|
||||
#define LCD_SPI SPI1
|
||||
#define LCD_SPI_CLK RCC_APB2Periph_SPI1
|
||||
|
||||
|
||||
/**
|
||||
* @brief LCD Registers
|
||||
*/
|
||||
#define LCD_REG_0 0x00
|
||||
#define LCD_REG_1 0x01
|
||||
#define LCD_REG_2 0x02
|
||||
#define LCD_REG_3 0x03
|
||||
#define LCD_REG_4 0x04
|
||||
#define LCD_REG_5 0x05
|
||||
#define LCD_REG_6 0x06
|
||||
#define LCD_REG_7 0x07
|
||||
#define LCD_REG_8 0x08
|
||||
#define LCD_REG_9 0x09
|
||||
#define LCD_REG_10 0x0A
|
||||
#define LCD_REG_12 0x0C
|
||||
#define LCD_REG_13 0x0D
|
||||
#define LCD_REG_14 0x0E
|
||||
#define LCD_REG_15 0x0F
|
||||
#define LCD_REG_16 0x10
|
||||
#define LCD_REG_17 0x11
|
||||
#define LCD_REG_18 0x12
|
||||
#define LCD_REG_19 0x13
|
||||
#define LCD_REG_20 0x14
|
||||
#define LCD_REG_21 0x15
|
||||
#define LCD_REG_22 0x16
|
||||
#define LCD_REG_23 0x17
|
||||
#define LCD_REG_24 0x18
|
||||
#define LCD_REG_25 0x19
|
||||
#define LCD_REG_26 0x1A
|
||||
#define LCD_REG_27 0x1B
|
||||
#define LCD_REG_28 0x1C
|
||||
#define LCD_REG_29 0x1D
|
||||
#define LCD_REG_30 0x1E
|
||||
#define LCD_REG_31 0x1F
|
||||
#define LCD_REG_32 0x20
|
||||
#define LCD_REG_33 0x21
|
||||
#define LCD_REG_34 0x22
|
||||
#define LCD_REG_36 0x24
|
||||
#define LCD_REG_37 0x25
|
||||
#define LCD_REG_40 0x28
|
||||
#define LCD_REG_41 0x29
|
||||
#define LCD_REG_43 0x2B
|
||||
#define LCD_REG_45 0x2D
|
||||
#define LCD_REG_48 0x30
|
||||
#define LCD_REG_49 0x31
|
||||
#define LCD_REG_50 0x32
|
||||
#define LCD_REG_51 0x33
|
||||
#define LCD_REG_52 0x34
|
||||
#define LCD_REG_53 0x35
|
||||
#define LCD_REG_54 0x36
|
||||
#define LCD_REG_55 0x37
|
||||
#define LCD_REG_56 0x38
|
||||
#define LCD_REG_57 0x39
|
||||
#define LCD_REG_59 0x3B
|
||||
#define LCD_REG_60 0x3C
|
||||
#define LCD_REG_61 0x3D
|
||||
#define LCD_REG_62 0x3E
|
||||
#define LCD_REG_63 0x3F
|
||||
#define LCD_REG_64 0x40
|
||||
#define LCD_REG_65 0x41
|
||||
#define LCD_REG_66 0x42
|
||||
#define LCD_REG_67 0x43
|
||||
#define LCD_REG_68 0x44
|
||||
#define LCD_REG_69 0x45
|
||||
#define LCD_REG_70 0x46
|
||||
#define LCD_REG_71 0x47
|
||||
#define LCD_REG_72 0x48
|
||||
#define LCD_REG_73 0x49
|
||||
#define LCD_REG_74 0x4A
|
||||
#define LCD_REG_75 0x4B
|
||||
#define LCD_REG_76 0x4C
|
||||
#define LCD_REG_77 0x4D
|
||||
#define LCD_REG_78 0x4E
|
||||
#define LCD_REG_79 0x4F
|
||||
#define LCD_REG_80 0x50
|
||||
#define LCD_REG_81 0x51
|
||||
#define LCD_REG_82 0x52
|
||||
#define LCD_REG_83 0x53
|
||||
#define LCD_REG_96 0x60
|
||||
#define LCD_REG_97 0x61
|
||||
#define LCD_REG_106 0x6A
|
||||
#define LCD_REG_118 0x76
|
||||
#define LCD_REG_128 0x80
|
||||
#define LCD_REG_129 0x81
|
||||
#define LCD_REG_130 0x82
|
||||
#define LCD_REG_131 0x83
|
||||
#define LCD_REG_132 0x84
|
||||
#define LCD_REG_133 0x85
|
||||
#define LCD_REG_134 0x86
|
||||
#define LCD_REG_135 0x87
|
||||
#define LCD_REG_136 0x88
|
||||
#define LCD_REG_137 0x89
|
||||
#define LCD_REG_139 0x8B
|
||||
#define LCD_REG_140 0x8C
|
||||
#define LCD_REG_141 0x8D
|
||||
#define LCD_REG_143 0x8F
|
||||
#define LCD_REG_144 0x90
|
||||
#define LCD_REG_145 0x91
|
||||
#define LCD_REG_146 0x92
|
||||
#define LCD_REG_147 0x93
|
||||
#define LCD_REG_148 0x94
|
||||
#define LCD_REG_149 0x95
|
||||
#define LCD_REG_150 0x96
|
||||
#define LCD_REG_151 0x97
|
||||
#define LCD_REG_152 0x98
|
||||
#define LCD_REG_153 0x99
|
||||
#define LCD_REG_154 0x9A
|
||||
#define LCD_REG_157 0x9D
|
||||
#define LCD_REG_192 0xC0
|
||||
#define LCD_REG_193 0xC1
|
||||
#define LCD_REG_227 0xE3
|
||||
#define LCD_REG_229 0xE5
|
||||
#define LCD_REG_231 0xE7
|
||||
#define LCD_REG_239 0xEF
|
||||
|
||||
|
||||
/**
|
||||
* @brief LCD color
|
||||
*/
|
||||
#define LCD_COLOR_WHITE 0xFFFF
|
||||
#define LCD_COLOR_BLACK 0x0000
|
||||
#define LCD_COLOR_GREY 0xF7DE
|
||||
#define LCD_COLOR_BLUE 0x001F
|
||||
#define LCD_COLOR_BLUE2 0x051F
|
||||
#define LCD_COLOR_RED 0xF800
|
||||
#define LCD_COLOR_MAGENTA 0xF81F
|
||||
#define LCD_COLOR_GREEN 0x07E0
|
||||
#define LCD_COLOR_CYAN 0x7FFF
|
||||
#define LCD_COLOR_YELLOW 0xFFE0
|
||||
|
||||
/**
|
||||
* @brief LCD Lines depending on the chosen fonts.
|
||||
*/
|
||||
#define LCD_LINE_0 LINE(0)
|
||||
#define LCD_LINE_1 LINE(1)
|
||||
#define LCD_LINE_2 LINE(2)
|
||||
#define LCD_LINE_3 LINE(3)
|
||||
#define LCD_LINE_4 LINE(4)
|
||||
#define LCD_LINE_5 LINE(5)
|
||||
#define LCD_LINE_6 LINE(6)
|
||||
#define LCD_LINE_7 LINE(7)
|
||||
#define LCD_LINE_8 LINE(8)
|
||||
#define LCD_LINE_9 LINE(9)
|
||||
#define LCD_LINE_10 LINE(10)
|
||||
#define LCD_LINE_11 LINE(11)
|
||||
#define LCD_LINE_12 LINE(12)
|
||||
#define LCD_LINE_13 LINE(13)
|
||||
#define LCD_LINE_14 LINE(14)
|
||||
#define LCD_LINE_15 LINE(15)
|
||||
#define LCD_LINE_16 LINE(16)
|
||||
#define LCD_LINE_17 LINE(17)
|
||||
#define LCD_LINE_18 LINE(18)
|
||||
#define LCD_LINE_19 LINE(19)
|
||||
#define LCD_LINE_20 LINE(20)
|
||||
#define LCD_LINE_21 LINE(21)
|
||||
#define LCD_LINE_22 LINE(22)
|
||||
#define LCD_LINE_23 LINE(23)
|
||||
#define LCD_LINE_24 LINE(24)
|
||||
#define LCD_LINE_25 LINE(25)
|
||||
#define LCD_LINE_26 LINE(26)
|
||||
#define LCD_LINE_27 LINE(27)
|
||||
#define LCD_LINE_28 LINE(28)
|
||||
#define LCD_LINE_29 LINE(29)
|
||||
|
||||
|
||||
/**
|
||||
* @brief LCD default font
|
||||
*/
|
||||
#define LCD_DEFAULT_FONT Font16x24
|
||||
|
||||
/**
|
||||
* @brief LCD Direction
|
||||
*/
|
||||
#define LCD_DIR_HORIZONTAL 0x0000
|
||||
#define LCD_DIR_VERTICAL 0x0001
|
||||
|
||||
/**
|
||||
* @brief LCD Size (Width and Height)
|
||||
*/
|
||||
#define LCD_PIXEL_WIDTH 0x0140
|
||||
#define LCD_PIXEL_HEIGHT 0x00F0
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LCD_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
#define ASSEMBLE_RGB(R, G, B) ((((R)& 0xF8) << 8) | (((G) & 0xFC) << 3) | (((B) & 0xF8) >> 3))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32L152_EVAL_LCD_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void STM32L152_LCD_DeInit(void);
|
||||
void LCD_Setup(void);
|
||||
void STM32L152_LCD_Init(void);
|
||||
void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor);
|
||||
void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor);
|
||||
void LCD_SetTextColor(__IO uint16_t Color);
|
||||
void LCD_SetBackColor(__IO uint16_t Color);
|
||||
void LCD_ClearLine(uint8_t Line);
|
||||
void LCD_Clear(uint16_t Color);
|
||||
void LCD_SetCursor(uint8_t Xpos, uint16_t Ypos);
|
||||
void LCD_DrawChar(uint8_t Xpos, uint16_t Ypos, const uint16_t *c);
|
||||
void LCD_DisplayChar(uint8_t Line, uint16_t Column, uint8_t Ascii);
|
||||
void LCD_SetFont(sFONT *fonts);
|
||||
sFONT *LCD_GetFont(void);
|
||||
void LCD_DisplayStringLine(uint8_t Line, uint8_t *ptr);
|
||||
void LCD_SetDisplayWindow(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width);
|
||||
void LCD_WindowModeDisable(void);
|
||||
void LCD_DrawLine(uint8_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction);
|
||||
void LCD_DrawRect(uint8_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width);
|
||||
void LCD_DrawCircle(uint8_t Xpos, uint16_t Ypos, uint16_t Radius);
|
||||
void LCD_DrawMonoPict(const uint32_t *Pict);
|
||||
void LCD_DrawBMP(uint32_t BmpAddress);
|
||||
void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
|
||||
void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
|
||||
void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius);
|
||||
void LCD_PolyLine(pPoint Points, uint16_t PointCount);
|
||||
void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount);
|
||||
void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount);
|
||||
void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount);
|
||||
void LCD_FillPolyLine(pPoint Points, uint16_t PointCount);
|
||||
void LCD_nCS_StartByte(uint8_t Start_Byte);
|
||||
void LCD_WriteRegIndex(uint8_t LCD_Reg);
|
||||
void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue);
|
||||
void LCD_WriteRAM_Prepare(void);
|
||||
void LCD_WriteRAMWord(uint16_t RGB_Code);
|
||||
uint16_t LCD_ReadReg(uint8_t LCD_Reg);
|
||||
void LCD_WriteRAM(uint16_t RGB_Code);
|
||||
void LCD_PowerOn(void);
|
||||
void LCD_DisplayOn(void);
|
||||
void LCD_DisplayOff(void);
|
||||
|
||||
void LCD_CtrlLinesConfig(void);
|
||||
void LCD_CtrlLinesWrite(GPIO_TypeDef* GPIOx, uint16_t CtrlPins, BitAction BitVal);
|
||||
void LCD_SPIConfig(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L152_EVAL_LCD_H */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,219 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file misc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the miscellaneous
|
||||
* firmware library functions (add-on to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MISC_H
|
||||
#define __MISC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup MISC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief NVIC Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
|
||||
This parameter can be a value of @ref IRQn_Type
|
||||
(For the complete STM32 Devices IRQ Channels list, please
|
||||
refer to stm32l1xx.h file) */
|
||||
|
||||
uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
|
||||
specified in NVIC_IRQChannel. This parameter can be a value
|
||||
between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
||||
|
||||
uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
|
||||
in NVIC_IRQChannel. This parameter can be a value
|
||||
between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
||||
|
||||
FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
|
||||
will be enabled or disabled.
|
||||
This parameter can be set either to ENABLE or DISABLE */
|
||||
} NVIC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup NVIC_Priority_Table
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
@code
|
||||
The table below gives the allowed values of the pre-emption priority and subpriority according
|
||||
to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
|
||||
============================================================================================================================
|
||||
NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
|
||||
============================================================================================================================
|
||||
NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
|
||||
| | | 4 bits for subpriority
|
||||
----------------------------------------------------------------------------------------------------------------------------
|
||||
NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
|
||||
| | | 3 bits for subpriority
|
||||
----------------------------------------------------------------------------------------------------------------------------
|
||||
NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
|
||||
| | | 2 bits for subpriority
|
||||
----------------------------------------------------------------------------------------------------------------------------
|
||||
NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
|
||||
| | | 1 bits for subpriority
|
||||
----------------------------------------------------------------------------------------------------------------------------
|
||||
NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
|
||||
| | | 0 bits for subpriority
|
||||
============================================================================================================================
|
||||
@endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup Vector_Table_Base
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
|
||||
#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
|
||||
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
|
||||
((VECTTAB) == NVIC_VectTab_FLASH))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup System_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
|
||||
#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
|
||||
#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
|
||||
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
|
||||
((LP) == NVIC_LP_SLEEPDEEP) || \
|
||||
((LP) == NVIC_LP_SLEEPONEXIT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Preemption_Priority_Group
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
|
||||
1 bits for subpriority */
|
||||
#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
|
||||
0 bits for subpriority */
|
||||
|
||||
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
|
||||
((GROUP) == NVIC_PriorityGroup_1) || \
|
||||
((GROUP) == NVIC_PriorityGroup_2) || \
|
||||
((GROUP) == NVIC_PriorityGroup_3) || \
|
||||
((GROUP) == NVIC_PriorityGroup_4))
|
||||
|
||||
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||
|
||||
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||
|
||||
#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0001FFFF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SysTick_clock_source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
|
||||
#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
|
||||
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
|
||||
((SOURCE) == SysTick_CLKSource_HCLK_Div8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
|
||||
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
|
||||
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
|
||||
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
|
||||
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MISC_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,201 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_exti.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the EXTI firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_EXTI_H
|
||||
#define __STM32L1xx_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup EXTI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief EXTI mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Mode_Interrupt = 0x00,
|
||||
EXTI_Mode_Event = 0x04
|
||||
}EXTIMode_TypeDef;
|
||||
|
||||
#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
|
||||
|
||||
/**
|
||||
* @brief EXTI Trigger enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
EXTI_Trigger_Rising = 0x08,
|
||||
EXTI_Trigger_Falling = 0x0C,
|
||||
EXTI_Trigger_Rising_Falling = 0x10
|
||||
}EXTITrigger_TypeDef;
|
||||
|
||||
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
|
||||
((TRIGGER) == EXTI_Trigger_Falling) || \
|
||||
((TRIGGER) == EXTI_Trigger_Rising_Falling))
|
||||
/**
|
||||
* @brief EXTI Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
|
||||
This parameter can be any combination of @ref EXTI_Lines */
|
||||
|
||||
EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
|
||||
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||
|
||||
EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
|
||||
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||
|
||||
FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
|
||||
This parameter can be set either to ENABLE or DISABLE */
|
||||
}EXTI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Lines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define EXTI_Line0 ((uint32_t)0x00000001) /*!< External interrupt line 0 */
|
||||
#define EXTI_Line1 ((uint32_t)0x00000002) /*!< External interrupt line 1 */
|
||||
#define EXTI_Line2 ((uint32_t)0x00000004) /*!< External interrupt line 2 */
|
||||
#define EXTI_Line3 ((uint32_t)0x00000008) /*!< External interrupt line 3 */
|
||||
#define EXTI_Line4 ((uint32_t)0x00000010) /*!< External interrupt line 4 */
|
||||
#define EXTI_Line5 ((uint32_t)0x00000020) /*!< External interrupt line 5 */
|
||||
#define EXTI_Line6 ((uint32_t)0x00000040) /*!< External interrupt line 6 */
|
||||
#define EXTI_Line7 ((uint32_t)0x00000080) /*!< External interrupt line 7 */
|
||||
#define EXTI_Line8 ((uint32_t)0x00000100) /*!< External interrupt line 8 */
|
||||
#define EXTI_Line9 ((uint32_t)0x00000200) /*!< External interrupt line 9 */
|
||||
#define EXTI_Line10 ((uint32_t)0x00000400) /*!< External interrupt line 10 */
|
||||
#define EXTI_Line11 ((uint32_t)0x00000800) /*!< External interrupt line 11 */
|
||||
#define EXTI_Line12 ((uint32_t)0x00001000) /*!< External interrupt line 12 */
|
||||
#define EXTI_Line13 ((uint32_t)0x00002000) /*!< External interrupt line 13 */
|
||||
#define EXTI_Line14 ((uint32_t)0x00004000) /*!< External interrupt line 14 */
|
||||
#define EXTI_Line15 ((uint32_t)0x00008000) /*!< External interrupt line 15 */
|
||||
#define EXTI_Line16 ((uint32_t)0x00010000) /*!< External interrupt line 16
|
||||
Connected to the PVD Output */
|
||||
#define EXTI_Line17 ((uint32_t)0x00020000) /*!< External interrupt line 17
|
||||
Connected to the RTC Alarm
|
||||
event */
|
||||
#define EXTI_Line18 ((uint32_t)0x00040000) /*!< External interrupt line 18
|
||||
Connected to the USB Device
|
||||
FS Wakeup from suspend event */
|
||||
#define EXTI_Line19 ((uint32_t)0x00080000) /*!< External interrupt line 19
|
||||
Connected to the RTC Tamper
|
||||
and Time Stamp events */
|
||||
#define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20
|
||||
Connected to the RTC Wakeup
|
||||
event */
|
||||
#define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21
|
||||
Connected to the Comparator 1
|
||||
event */
|
||||
|
||||
#define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22
|
||||
Connected to the Comparator 2
|
||||
event */
|
||||
|
||||
#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
|
||||
|
||||
#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
|
||||
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
|
||||
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
|
||||
((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
|
||||
((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
|
||||
((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
|
||||
((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
|
||||
((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
|
||||
((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
|
||||
((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
|
||||
((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) || \
|
||||
((LINE) == EXTI_Line22))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void EXTI_DeInit(void);
|
||||
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
|
||||
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
|
||||
void EXTI_ClearFlag(uint32_t EXTI_Line);
|
||||
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
|
||||
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_EXTI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,369 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_GPIO_H
|
||||
#define __STM32L1xx_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||
((PERIPH) == GPIOB) || \
|
||||
((PERIPH) == GPIOC) || \
|
||||
((PERIPH) == GPIOD) || \
|
||||
((PERIPH) == GPIOE) || \
|
||||
((PERIPH) == GPIOH))
|
||||
|
||||
/** @defgroup Configuration_Mode_enumeration
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */
|
||||
GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */
|
||||
GPIO_Mode_AF = 0x02, /*!< GPIO Alternate function Mode */
|
||||
GPIO_Mode_AN = 0x03 /*!< GPIO Analog Mode */
|
||||
}GPIOMode_TypeDef;
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN) || ((MODE) == GPIO_Mode_OUT) || \
|
||||
((MODE) == GPIO_Mode_AF)|| ((MODE) == GPIO_Mode_AN))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Output_type_enumeration
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{ GPIO_OType_PP = 0x00,
|
||||
GPIO_OType_OD = 0x01
|
||||
}GPIOOType_TypeDef;
|
||||
#define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Output_Maximum_frequency_enumeration
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Speed_400KHz = 0x00, /*!< Very Low Speed */
|
||||
GPIO_Speed_2MHz = 0x01, /*!< Low Speed */
|
||||
GPIO_Speed_10MHz = 0x02, /*!< Medium Speed */
|
||||
GPIO_Speed_40MHz = 0x03 /*!< High Speed */
|
||||
}GPIOSpeed_TypeDef;
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_400KHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||
((SPEED) == GPIO_Speed_10MHz)|| ((SPEED) == GPIO_Speed_40MHz))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Configuration_Pull-Up_Pull-Down_enumeration
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{ GPIO_PuPd_NOPULL = 0x00,
|
||||
GPIO_PuPd_UP = 0x01,
|
||||
GPIO_PuPd_DOWN = 0x02
|
||||
}GPIOPuPd_TypeDef;
|
||||
#define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \
|
||||
((PUPD) == GPIO_PuPd_DOWN))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Bit_SET_and_Bit_RESET_enumeration
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{ Bit_RESET = 0,
|
||||
Bit_SET
|
||||
}BitAction;
|
||||
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be any value of @ref GPIO_pins_define */
|
||||
|
||||
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIOMode_TypeDef */
|
||||
|
||||
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
||||
|
||||
GPIOOType_TypeDef GPIO_OType; /*!< Specifies the operating output type for the selected pins.
|
||||
This parameter can be a value of @ref GPIOOType_TypeDef */
|
||||
|
||||
GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
|
||||
This parameter can be a value of @ref GPIOPuPd_TypeDef */
|
||||
}GPIO_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_GPIO_PIN(PIN) ((PIN) != (uint16_t)0x00)
|
||||
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||
((PIN) == GPIO_Pin_1) || \
|
||||
((PIN) == GPIO_Pin_2) || \
|
||||
((PIN) == GPIO_Pin_3) || \
|
||||
((PIN) == GPIO_Pin_4) || \
|
||||
((PIN) == GPIO_Pin_5) || \
|
||||
((PIN) == GPIO_Pin_6) || \
|
||||
((PIN) == GPIO_Pin_7) || \
|
||||
((PIN) == GPIO_Pin_8) || \
|
||||
((PIN) == GPIO_Pin_9) || \
|
||||
((PIN) == GPIO_Pin_10) || \
|
||||
((PIN) == GPIO_Pin_11) || \
|
||||
((PIN) == GPIO_Pin_12) || \
|
||||
((PIN) == GPIO_Pin_13) || \
|
||||
((PIN) == GPIO_Pin_14) || \
|
||||
((PIN) == GPIO_Pin_15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Pin_sources
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
|
||||
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
||||
((PINSOURCE) == GPIO_PinSource1) || \
|
||||
((PINSOURCE) == GPIO_PinSource2) || \
|
||||
((PINSOURCE) == GPIO_PinSource3) || \
|
||||
((PINSOURCE) == GPIO_PinSource4) || \
|
||||
((PINSOURCE) == GPIO_PinSource5) || \
|
||||
((PINSOURCE) == GPIO_PinSource6) || \
|
||||
((PINSOURCE) == GPIO_PinSource7) || \
|
||||
((PINSOURCE) == GPIO_PinSource8) || \
|
||||
((PINSOURCE) == GPIO_PinSource9) || \
|
||||
((PINSOURCE) == GPIO_PinSource10) || \
|
||||
((PINSOURCE) == GPIO_PinSource11) || \
|
||||
((PINSOURCE) == GPIO_PinSource12) || \
|
||||
((PINSOURCE) == GPIO_PinSource13) || \
|
||||
((PINSOURCE) == GPIO_PinSource14) || \
|
||||
((PINSOURCE) == GPIO_PinSource15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Alternat_function_selection_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief AF 0 selection
|
||||
*/
|
||||
#define GPIO_AF_RTC_50Hz ((uint8_t)0x00) /*!< RTC 50/60 Hz Alternate Function mapping */
|
||||
#define GPIO_AF_MCO ((uint8_t)0x00) /*!< MCO Alternate Function mapping */
|
||||
#define GPIO_AF_RTC_AF1 ((uint8_t)0x00) /*!< RTC_AF1 Alternate Function mapping */
|
||||
#define GPIO_AF_WKUP ((uint8_t)0x00) /*!< Wakeup (WKUP1, WKUP2 and WKUP3) Alternate Function mapping */
|
||||
#define GPIO_AF_SWJ ((uint8_t)0x00) /*!< SWJ (SW and JTAG) Alternate Function mapping */
|
||||
#define GPIO_AF_TRACE ((uint8_t)0x00) /*!< TRACE Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 1 selection
|
||||
*/
|
||||
#define GPIO_AF_TIM2 ((uint8_t)0x01) /*!< TIM2 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 2 selection
|
||||
*/
|
||||
#define GPIO_AF_TIM3 ((uint8_t)0x02) /*!< TIM3 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM4 ((uint8_t)0x02) /*!< TIM4 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 3 selection
|
||||
*/
|
||||
#define GPIO_AF_TIM9 ((uint8_t)0x03) /*!< TIM9 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM10 ((uint8_t)0x03) /*!< TIM10 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM11 ((uint8_t)0x03) /*!< TIM11 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 4 selection
|
||||
*/
|
||||
#define GPIO_AF_I2C1 ((uint8_t)0x04) /*!< I2C1 Alternate Function mapping */
|
||||
#define GPIO_AF_I2C2 ((uint8_t)0x04) /*!< I2C2 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 5 selection
|
||||
*/
|
||||
#define GPIO_AF_SPI1 ((uint8_t)0x05) /*!< SPI1 Alternate Function mapping */
|
||||
#define GPIO_AF_SPI2 ((uint8_t)0x05) /*!< SPI2 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 7 selection
|
||||
*/
|
||||
#define GPIO_AF_USART1 ((uint8_t)0x07) /*!< USART1 Alternate Function mapping */
|
||||
#define GPIO_AF_USART2 ((uint8_t)0x07) /*!< USART2 Alternate Function mapping */
|
||||
#define GPIO_AF_USART3 ((uint8_t)0x07) /*!< USART3 Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 10 selection
|
||||
*/
|
||||
#define GPIO_AF_USB ((uint8_t)0xA) /*!< USB Full speed device Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 11 selection
|
||||
*/
|
||||
#define GPIO_AF_LCD ((uint8_t)0x0B) /*!< LCD Alternate Function mapping */
|
||||
/**
|
||||
* @brief AF 14 selection
|
||||
*/
|
||||
#define GPIO_AF_RI ((uint8_t)0x0E) /*!< RI Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 15 selection
|
||||
*/
|
||||
#define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /*!< EVENTOUT Alternate Function mapping */
|
||||
|
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_MCO) || \
|
||||
((AF) == GPIO_AF_RTC_AF1) || ((AF) == GPIO_AF_WKUP) || \
|
||||
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
|
||||
((AF) == GPIO_AF_TIM2) || ((AF)== GPIO_AF_TIM3) || \
|
||||
((AF) == GPIO_AF_TIM4) || ((AF)== GPIO_AF_TIM9) || \
|
||||
((AF) == GPIO_AF_TIM10) || ((AF)== GPIO_AF_TIM11) || \
|
||||
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
|
||||
((AF) == GPIO_AF_SPI1) || ((AF) == GPIO_AF_SPI2) || \
|
||||
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
|
||||
((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_USB) || \
|
||||
((AF) == GPIO_AF_LCD) || ((AF) == GPIO_AF_RI) || \
|
||||
((AF) == GPIO_AF_EVENTOUT))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Legacy
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Mode_AIN GPIO_Mode_AN
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32L1xx_GPIO_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,670 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the I2C firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_I2C_H
|
||||
#define __STM32L1xx_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2C
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief I2C Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
|
||||
This parameter must be set to a value lower than 400kHz */
|
||||
|
||||
uint16_t I2C_Mode; /*!< Specifies the I2C mode.
|
||||
This parameter can be a value of @ref I2C_mode */
|
||||
|
||||
uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
||||
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||
|
||||
uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */
|
||||
|
||||
uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
|
||||
This parameter can be a value of @ref I2C_acknowledgement */
|
||||
|
||||
uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
|
||||
This parameter can be a value of @ref I2C_acknowledged_address */
|
||||
}I2C_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup I2C_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
|
||||
((PERIPH) == I2C2))
|
||||
/** @defgroup I2C_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_Mode_I2C ((uint16_t)0x0000)
|
||||
#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
|
||||
#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
|
||||
#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
|
||||
((MODE) == I2C_Mode_SMBusDevice) || \
|
||||
((MODE) == I2C_Mode_SMBusHost))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_duty_cycle_in_fast_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
|
||||
#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
|
||||
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
|
||||
((CYCLE) == I2C_DutyCycle_2))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_acknowledgement
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_Ack_Enable ((uint16_t)0x0400)
|
||||
#define I2C_Ack_Disable ((uint16_t)0x0000)
|
||||
#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
|
||||
((STATE) == I2C_Ack_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_transfer_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_Direction_Transmitter ((uint8_t)0x00)
|
||||
#define I2C_Direction_Receiver ((uint8_t)0x01)
|
||||
#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
|
||||
((DIRECTION) == I2C_Direction_Receiver))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_acknowledged_address
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
|
||||
#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
|
||||
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
|
||||
((ADDRESS) == I2C_AcknowledgedAddress_10bit))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_registers
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_Register_CR1 ((uint8_t)0x00)
|
||||
#define I2C_Register_CR2 ((uint8_t)0x04)
|
||||
#define I2C_Register_OAR1 ((uint8_t)0x08)
|
||||
#define I2C_Register_OAR2 ((uint8_t)0x0C)
|
||||
#define I2C_Register_DR ((uint8_t)0x10)
|
||||
#define I2C_Register_SR1 ((uint8_t)0x14)
|
||||
#define I2C_Register_SR2 ((uint8_t)0x18)
|
||||
#define I2C_Register_CCR ((uint8_t)0x1C)
|
||||
#define I2C_Register_TRISE ((uint8_t)0x20)
|
||||
#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
|
||||
((REGISTER) == I2C_Register_CR2) || \
|
||||
((REGISTER) == I2C_Register_OAR1) || \
|
||||
((REGISTER) == I2C_Register_OAR2) || \
|
||||
((REGISTER) == I2C_Register_DR) || \
|
||||
((REGISTER) == I2C_Register_SR1) || \
|
||||
((REGISTER) == I2C_Register_SR2) || \
|
||||
((REGISTER) == I2C_Register_CCR) || \
|
||||
((REGISTER) == I2C_Register_TRISE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_SMBus_alert_pin_level
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
|
||||
#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
|
||||
#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
|
||||
((ALERT) == I2C_SMBusAlert_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_PEC_position
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_PECPosition_Next ((uint16_t)0x0800)
|
||||
#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
|
||||
#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
|
||||
((POSITION) == I2C_PECPosition_Current))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_IT_BUF ((uint16_t)0x0400)
|
||||
#define I2C_IT_EVT ((uint16_t)0x0200)
|
||||
#define I2C_IT_ERR ((uint16_t)0x0100)
|
||||
#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
|
||||
#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
|
||||
#define I2C_IT_PECERR ((uint32_t)0x01001000)
|
||||
#define I2C_IT_OVR ((uint32_t)0x01000800)
|
||||
#define I2C_IT_AF ((uint32_t)0x01000400)
|
||||
#define I2C_IT_ARLO ((uint32_t)0x01000200)
|
||||
#define I2C_IT_BERR ((uint32_t)0x01000100)
|
||||
#define I2C_IT_TXE ((uint32_t)0x06000080)
|
||||
#define I2C_IT_RXNE ((uint32_t)0x06000040)
|
||||
#define I2C_IT_STOPF ((uint32_t)0x02000010)
|
||||
#define I2C_IT_ADD10 ((uint32_t)0x02000008)
|
||||
#define I2C_IT_BTF ((uint32_t)0x02000004)
|
||||
#define I2C_IT_ADDR ((uint32_t)0x02000002)
|
||||
#define I2C_IT_SB ((uint32_t)0x02000001)
|
||||
|
||||
#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
|
||||
|
||||
#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
|
||||
((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
|
||||
((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
|
||||
((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
|
||||
((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
|
||||
((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
|
||||
((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SR2 register flags
|
||||
*/
|
||||
|
||||
#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
|
||||
#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
|
||||
#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
|
||||
#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
|
||||
#define I2C_FLAG_TRA ((uint32_t)0x00040000)
|
||||
#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
|
||||
#define I2C_FLAG_MSL ((uint32_t)0x00010000)
|
||||
|
||||
/**
|
||||
* @brief SR1 register flags
|
||||
*/
|
||||
|
||||
#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
|
||||
#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
|
||||
#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
|
||||
#define I2C_FLAG_OVR ((uint32_t)0x10000800)
|
||||
#define I2C_FLAG_AF ((uint32_t)0x10000400)
|
||||
#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
|
||||
#define I2C_FLAG_BERR ((uint32_t)0x10000100)
|
||||
#define I2C_FLAG_TXE ((uint32_t)0x10000080)
|
||||
#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
|
||||
#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
|
||||
#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
|
||||
#define I2C_FLAG_BTF ((uint32_t)0x10000004)
|
||||
#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
|
||||
#define I2C_FLAG_SB ((uint32_t)0x10000001)
|
||||
|
||||
#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||
|
||||
#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
|
||||
((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
|
||||
((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
|
||||
((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
|
||||
((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
|
||||
((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
|
||||
((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
|
||||
((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
|
||||
((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
|
||||
((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
|
||||
((FLAG) == I2C_FLAG_SB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Events
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*========================================
|
||||
|
||||
I2C Master Events (Events grouped in order of communication)
|
||||
==========================================*/
|
||||
/**
|
||||
* @brief Communication start
|
||||
*
|
||||
* After sending the START condition (I2C_GenerateSTART() function) the master
|
||||
* has to wait for this event. It means that the Start condition has been correctly
|
||||
* released on the I2C bus (the bus is free, no other devices is communicating).
|
||||
*
|
||||
*/
|
||||
/* --EV5 */
|
||||
#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
|
||||
|
||||
/**
|
||||
* @brief Address Acknowledge
|
||||
*
|
||||
* After checking on EV5 (start condition correctly released on the bus), the
|
||||
* master sends the address of the slave(s) with which it will communicate
|
||||
* (I2C_Send7bitAddress() function, it also determines the direction of the communication:
|
||||
* Master transmitter or Receiver). Then the master has to wait that a slave acknowledges
|
||||
* his address. If an acknowledge is sent on the bus, one of the following events will
|
||||
* be set:
|
||||
*
|
||||
* 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
|
||||
* event is set.
|
||||
*
|
||||
* 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
|
||||
* is set
|
||||
*
|
||||
* 3) In case of 10-Bit addressing mode, the master (just after generating the START
|
||||
* and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
|
||||
* function). Then master should wait on EV9. It means that the 10-bit addressing
|
||||
* header has been correctly sent on the bus. Then master should send the second part of
|
||||
* the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master
|
||||
* should wait for event EV6.
|
||||
*
|
||||
*/
|
||||
|
||||
/* --EV6 */
|
||||
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
|
||||
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
|
||||
/* --EV9 */
|
||||
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
|
||||
|
||||
/**
|
||||
* @brief Communication events
|
||||
*
|
||||
* If a communication is established (START condition generated and slave address
|
||||
* acknowledged) then the master has to check on one of the following events for
|
||||
* communication procedures:
|
||||
*
|
||||
* 1) Master Receiver mode: The master has to wait on the event EV7 then to read
|
||||
* the data received from the slave (I2C_ReceiveData() function).
|
||||
*
|
||||
* 2) Master Transmitter mode: The master has to send data (I2C_SendData()
|
||||
* function) then to wait on event EV8 or EV8_2.
|
||||
* These two events are similar:
|
||||
* - EV8 means that the data has been written in the data register and is
|
||||
* being shifted out.
|
||||
* - EV8_2 means that the data has been physically shifted out and output
|
||||
* on the bus.
|
||||
* In most cases, using EV8 is sufficient for the application.
|
||||
* Using EV8_2 leads to a slower communication but ensure more reliable test.
|
||||
* EV8_2 is also more suitable than EV8 for testing on the last data transmission
|
||||
* (before Stop condition generation).
|
||||
*
|
||||
* @note In case the user software does not guarantee that this event EV7 is
|
||||
* managed before the current byte end of transfer, then user may check on EV7
|
||||
* and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||
* In this case the communication may be slower.
|
||||
*
|
||||
*/
|
||||
|
||||
/* Master RECEIVER mode -----------------------------*/
|
||||
/* --EV7 */
|
||||
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
|
||||
|
||||
/* Master TRANSMITTER mode --------------------------*/
|
||||
/* --EV8 */
|
||||
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
|
||||
/* --EV8_2 */
|
||||
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
|
||||
|
||||
|
||||
/*========================================
|
||||
|
||||
I2C Slave Events (Events grouped in order of communication)
|
||||
==========================================*/
|
||||
|
||||
/**
|
||||
* @brief Communication start events
|
||||
*
|
||||
* Wait on one of these events at the start of the communication. It means that
|
||||
* the I2C peripheral detected a Start condition on the bus (generated by master
|
||||
* device) followed by the peripheral address. The peripheral generates an ACK
|
||||
* condition on the bus (if the acknowledge feature is enabled through function
|
||||
* I2C_AcknowledgeConfig()) and the events listed above are set :
|
||||
*
|
||||
* 1) In normal case (only one address managed by the slave), when the address
|
||||
* sent by the master matches the own address of the peripheral (configured by
|
||||
* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
|
||||
* (where XXX could be TRANSMITTER or RECEIVER).
|
||||
*
|
||||
* 2) In case the address sent by the master matches the second address of the
|
||||
* peripheral (configured by the function I2C_OwnAddress2Config() and enabled
|
||||
* by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
|
||||
* (where XXX could be TRANSMITTER or RECEIVER) are set.
|
||||
*
|
||||
* 3) In case the address sent by the master is General Call (address 0x00) and
|
||||
* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
|
||||
* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
|
||||
*
|
||||
*/
|
||||
|
||||
/* --EV1 (all the events below are variants of EV1) */
|
||||
/* 1) Case of One Single Address managed by the slave */
|
||||
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
|
||||
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
|
||||
|
||||
/* 2) Case of Dual address managed by the slave */
|
||||
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
|
||||
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
|
||||
|
||||
/* 3) Case of General Call enabled for the slave */
|
||||
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
|
||||
|
||||
/**
|
||||
* @brief Communication events
|
||||
*
|
||||
* Wait on one of these events when EV1 has already been checked and:
|
||||
*
|
||||
* - Slave RECEIVER mode:
|
||||
* - EV2: When the application is expecting a data byte to be received.
|
||||
* - EV4: When the application is expecting the end of the communication: master
|
||||
* sends a stop condition and data transmission is stopped.
|
||||
*
|
||||
* - Slave Transmitter mode:
|
||||
* - EV3: When a byte has been transmitted by the slave and the application is expecting
|
||||
* the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
|
||||
* I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be
|
||||
* used when the user software doesn't guarantee the EV3 is managed before the
|
||||
* current byte end of tranfer.
|
||||
* - EV3_2: When the master sends a NACK in order to tell slave that data transmission
|
||||
* shall end (before sending the STOP condition). In this case slave has to stop sending
|
||||
* data bytes and expect a Stop condition on the bus.
|
||||
*
|
||||
* @note In case the user software does not guarantee that the event EV2 is
|
||||
* managed before the current byte end of transfer, then user may check on EV2
|
||||
* and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||
* In this case the communication may be slower.
|
||||
*
|
||||
*/
|
||||
|
||||
/* Slave RECEIVER mode --------------------------*/
|
||||
/* --EV2 */
|
||||
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
|
||||
/* --EV4 */
|
||||
#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
|
||||
|
||||
/* Slave TRANSMITTER mode -----------------------*/
|
||||
/* --EV3 */
|
||||
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
|
||||
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
|
||||
/* --EV3_2 */
|
||||
#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
|
||||
|
||||
/*=========================== End of Events Description ==========================================*/
|
||||
|
||||
#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
|
||||
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
|
||||
((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
|
||||
((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_own_address1
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_clock_speed
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void I2C_DeInit(I2C_TypeDef* I2Cx);
|
||||
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
|
||||
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
|
||||
void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
|
||||
uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
|
||||
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
|
||||
uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
|
||||
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
|
||||
void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
|
||||
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
|
||||
void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
|
||||
|
||||
/**
|
||||
* @brief
|
||||
****************************************************************************************
|
||||
*
|
||||
* I2C State Monitoring Functions
|
||||
*
|
||||
****************************************************************************************
|
||||
* This I2C driver provides three different ways for I2C state monitoring
|
||||
* depending on the application requirements and constraints:
|
||||
*
|
||||
*
|
||||
* 1) Basic state monitoring:
|
||||
* Using I2C_CheckEvent() function:
|
||||
* It compares the status registers (SR1 and SR2) content to a given event
|
||||
* (can be the combination of one or more flags).
|
||||
* It returns SUCCESS if the current status includes the given flags
|
||||
* and returns ERROR if one or more flags are missing in the current status.
|
||||
* - When to use:
|
||||
* - This function is suitable for most applications as well as for startup
|
||||
* activity since the events are fully described in the product reference manual
|
||||
* (RM0008).
|
||||
* - It is also suitable for users who need to define their own events.
|
||||
* - Limitations:
|
||||
* - If an error occurs (ie. error flags are set besides to the monitored flags),
|
||||
* the I2C_CheckEvent() function may return SUCCESS despite the communication
|
||||
* hold or corrupted real state.
|
||||
* In this case, it is advised to use error interrupts to monitor the error
|
||||
* events and handle them in the interrupt IRQ handler.
|
||||
*
|
||||
* @note
|
||||
* For error management, it is advised to use the following functions:
|
||||
* - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
|
||||
* - I2Cx_ER_IRQHandler() which is called when the error interurpt occurs.
|
||||
* Where x is the peripheral instance (I2C1, I2C2 ...)
|
||||
* - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the I2Cx_ER_IRQHandler() function
|
||||
* in order to determine which error occured.
|
||||
* - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() and/or I2C_GenerateStop()
|
||||
* in order to clear the error flag and source and return to correct
|
||||
* communication status.
|
||||
*
|
||||
*
|
||||
* 2) Advanced state monitoring:
|
||||
* Using the function I2C_GetLastEvent() which returns the image of both status
|
||||
* registers in a single word (uint32_t) (Status Register 2 value is shifted left
|
||||
* by 16 bits and concatenated to Status Register 1).
|
||||
* - When to use:
|
||||
* - This function is suitable for the same applications above but it allows to
|
||||
* overcome the limitations of I2C_GetFlagStatus() function (see below).
|
||||
* The returned value could be compared to events already defined in the
|
||||
* library (stm32f10x_i2c.h) or to custom values defined by user.
|
||||
* - This function is suitable when multiple flags are monitored at the same time.
|
||||
* - At the opposite of I2C_CheckEvent() function, this function allows user to
|
||||
* choose when an event is accepted (when all events flags are set and no
|
||||
* other flags are set or just when the needed flags are set like
|
||||
* I2C_CheckEvent() function).
|
||||
* - Limitations:
|
||||
* - User may need to define his own events.
|
||||
* - Same remark concerning the error management is applicable for this
|
||||
* function if user decides to check only regular communication flags (and
|
||||
* ignores error flags).
|
||||
*
|
||||
*
|
||||
* 3) Flag-based state monitoring:
|
||||
* Using the function I2C_GetFlagStatus() which simply returns the status of
|
||||
* one single flag (ie. I2C_FLAG_RXNE ...).
|
||||
* - When to use:
|
||||
* - This function could be used for specific applications or in debug phase.
|
||||
* - It is suitable when only one flag checking is needed (most I2C events
|
||||
* are monitored through multiple flags).
|
||||
* - Limitations:
|
||||
* - When calling this function, the Status register is accessed. Some flags are
|
||||
* cleared when the status register is accessed. So checking the status
|
||||
* of one Flag, may clear other ones.
|
||||
* - Function may need to be called twice or more in order to monitor one
|
||||
* single event.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
*
|
||||
* 1) Basic state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
|
||||
/**
|
||||
*
|
||||
* 2) Advanced state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
|
||||
/**
|
||||
*
|
||||
* 3) Flag-based state monitoring
|
||||
*******************************************************************************
|
||||
*/
|
||||
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
||||
/**
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
||||
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
||||
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32L1xx_I2C_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,208 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the PWR firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_PWR_H
|
||||
#define __STM32L1xx_PWR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup PWR
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PVD_detection_level
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
|
||||
#define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
|
||||
#define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
|
||||
#define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
|
||||
#define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
|
||||
#define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
|
||||
#define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
|
||||
#define PWR_PVDLevel_7 PWR_CR_PLS_LEV7 /* External input analog voltage
|
||||
(Compare internally to VREFINT) */
|
||||
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
|
||||
((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
|
||||
((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
|
||||
((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WakeUp_Pins
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_WakeUpPin_1 ((uint32_t)0x00000000)
|
||||
#define PWR_WakeUpPin_2 ((uint32_t)0x00000004)
|
||||
#define PWR_WakeUpPin_3 ((uint32_t)0x00000008)
|
||||
#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUpPin_1) || \
|
||||
((PIN) == PWR_WakeUpPin_2) || \
|
||||
((PIN) == PWR_WakeUpPin_3))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup Voltage_Scaling_Ranges
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_VoltageScaling_Range1 PWR_CR_VOS_0
|
||||
#define PWR_VoltageScaling_Range2 PWR_CR_VOS_1
|
||||
#define PWR_VoltageScaling_Range3 PWR_CR_VOS
|
||||
|
||||
#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_VoltageScaling_Range1) || \
|
||||
((RANGE) == PWR_VoltageScaling_Range2) || \
|
||||
((RANGE) == PWR_VoltageScaling_Range3))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup Regulator_state_is_Sleep_STOP_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_Regulator_ON ((uint32_t)0x00000000)
|
||||
#define PWR_Regulator_LowPower PWR_CR_LPSDSR
|
||||
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
|
||||
((REGULATOR) == PWR_Regulator_LowPower))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SLEEP_mode_entry
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_SLEEPEntry_WFI ((uint8_t)0x01)
|
||||
#define PWR_SLEEPEntry_WFE ((uint8_t)0x02)
|
||||
#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPEntry_WFI) || ((ENTRY) == PWR_SLEEPEntry_WFE))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STOP_mode_entry
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_STOPEntry_WFI ((uint8_t)0x01)
|
||||
#define PWR_STOPEntry_WFE ((uint8_t)0x02)
|
||||
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PWR_FLAG_WU PWR_CSR_WUF
|
||||
#define PWR_FLAG_SB PWR_CSR_SBF
|
||||
#define PWR_FLAG_PVDO PWR_CSR_PVDO
|
||||
#define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
|
||||
#define PWR_FLAG_VOS PWR_CSR_VOSF
|
||||
#define PWR_FLAG_REGLP PWR_CSR_REGLPF
|
||||
|
||||
#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
|
||||
((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY) || \
|
||||
((FLAG) == PWR_FLAG_VOS) || ((FLAG) == PWR_FLAG_REGLP))
|
||||
|
||||
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void PWR_DeInit(void);
|
||||
void PWR_RTCAccessCmd(FunctionalState NewState);
|
||||
void PWR_PVDCmd(FunctionalState NewState);
|
||||
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
|
||||
void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState);
|
||||
void PWR_FastWakeUpCmd(FunctionalState NewState);
|
||||
void PWR_UltraLowPowerCmd(FunctionalState NewState);
|
||||
void PWR_VoltageScalingConfig(uint32_t PWR_VoltageScaling);
|
||||
void PWR_EnterLowPowerRunMode(FunctionalState NewState);
|
||||
void PWR_EnterSleepMode(uint32_t PWR_Regulator, uint8_t PWR_SLEEPEntry);
|
||||
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
|
||||
void PWR_EnterSTANDBYMode(void);
|
||||
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
|
||||
void PWR_ClearFlag(uint32_t PWR_FLAG);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_PWR_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,471 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the RCC
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_RCC_H
|
||||
#define __STM32L1xx_RCC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RCC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t SYSCLK_Frequency;
|
||||
uint32_t HCLK_Frequency;
|
||||
uint32_t PCLK1_Frequency;
|
||||
uint32_t PCLK2_Frequency;
|
||||
}RCC_ClocksTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HSE_configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HSE_OFF ((uint8_t)0x00)
|
||||
#define RCC_HSE_ON ((uint8_t)0x01)
|
||||
#define RCC_HSE_Bypass ((uint8_t)0x05)
|
||||
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
||||
((HSE) == RCC_HSE_Bypass))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MSI_Clock_Range
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MSIRange_64KHz RCC_ICSCR_MSIRANGE_64KHz
|
||||
#define RCC_MSIRange_128KHz RCC_ICSCR_MSIRANGE_128KHz
|
||||
#define RCC_MSIRange_256KHz RCC_ICSCR_MSIRANGE_256KHz
|
||||
#define RCC_MSIRange_512KHz RCC_ICSCR_MSIRANGE_512KHz
|
||||
#define RCC_MSIRange_1MHz RCC_ICSCR_MSIRANGE_1MHz
|
||||
#define RCC_MSIRange_2MHz RCC_ICSCR_MSIRANGE_2MHz
|
||||
#define RCC_MSIRange_4MHz RCC_ICSCR_MSIRANGE_4MHz
|
||||
|
||||
#define IS_RCC_MSI_CLOCK_RANGE(RANGE) (((RANGE) == RCC_MSIRange_64KHz) || \
|
||||
((RANGE) == RCC_MSIRange_128KHz) || \
|
||||
((RANGE) == RCC_MSIRange_256KHz) || \
|
||||
((RANGE) == RCC_MSIRange_512KHz) || \
|
||||
((RANGE) == RCC_MSIRange_1MHz) || \
|
||||
((RANGE) == RCC_MSIRange_2MHz) || \
|
||||
((RANGE) == RCC_MSIRange_4MHz))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLSource_HSI ((uint8_t)0x00)
|
||||
#define RCC_PLLSource_HSE ((uint8_t)0x01)
|
||||
|
||||
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \
|
||||
((SOURCE) == RCC_PLLSource_HSE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_Multiplication_Factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLMul_3 ((uint8_t)0x00)
|
||||
#define RCC_PLLMul_4 ((uint8_t)0x04)
|
||||
#define RCC_PLLMul_6 ((uint8_t)0x08)
|
||||
#define RCC_PLLMul_8 ((uint8_t)0x0C)
|
||||
#define RCC_PLLMul_12 ((uint8_t)0x10)
|
||||
#define RCC_PLLMul_16 ((uint8_t)0x14)
|
||||
#define RCC_PLLMul_24 ((uint8_t)0x18)
|
||||
#define RCC_PLLMul_32 ((uint8_t)0x1C)
|
||||
#define RCC_PLLMul_48 ((uint8_t)0x20)
|
||||
|
||||
|
||||
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_3) || ((MUL) == RCC_PLLMul_4) || \
|
||||
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_8) || \
|
||||
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_16) || \
|
||||
((MUL) == RCC_PLLMul_24) || ((MUL) == RCC_PLLMul_32) || \
|
||||
((MUL) == RCC_PLLMul_48))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PLL_Divider_Factor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_PLLDiv_2 ((uint8_t)0x40)
|
||||
#define RCC_PLLDiv_3 ((uint8_t)0x80)
|
||||
#define RCC_PLLDiv_4 ((uint8_t)0xC0)
|
||||
|
||||
|
||||
#define IS_RCC_PLL_DIV(DIV) (((DIV) == RCC_PLLDiv_2) || ((DIV) == RCC_PLLDiv_3) || \
|
||||
((DIV) == RCC_PLLDiv_4))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup System_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLKSource_MSI RCC_CFGR_SW_MSI
|
||||
#define RCC_SYSCLKSource_HSI RCC_CFGR_SW_HSI
|
||||
#define RCC_SYSCLKSource_HSE RCC_CFGR_SW_HSE
|
||||
#define RCC_SYSCLKSource_PLLCLK RCC_CFGR_SW_PLL
|
||||
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_MSI) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
||||
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_SYSCLK_Div1 RCC_CFGR_HPRE_DIV1
|
||||
#define RCC_SYSCLK_Div2 RCC_CFGR_HPRE_DIV2
|
||||
#define RCC_SYSCLK_Div4 RCC_CFGR_HPRE_DIV4
|
||||
#define RCC_SYSCLK_Div8 RCC_CFGR_HPRE_DIV8
|
||||
#define RCC_SYSCLK_Div16 RCC_CFGR_HPRE_DIV16
|
||||
#define RCC_SYSCLK_Div64 RCC_CFGR_HPRE_DIV64
|
||||
#define RCC_SYSCLK_Div128 RCC_CFGR_HPRE_DIV128
|
||||
#define RCC_SYSCLK_Div256 RCC_CFGR_HPRE_DIV256
|
||||
#define RCC_SYSCLK_Div512 RCC_CFGR_HPRE_DIV512
|
||||
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
||||
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
||||
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
||||
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
||||
((HCLK) == RCC_SYSCLK_Div512))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_APB2_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_HCLK_Div1 RCC_CFGR_PPRE1_DIV1
|
||||
#define RCC_HCLK_Div2 RCC_CFGR_PPRE1_DIV2
|
||||
#define RCC_HCLK_Div4 RCC_CFGR_PPRE1_DIV4
|
||||
#define RCC_HCLK_Div8 RCC_CFGR_PPRE1_DIV8
|
||||
#define RCC_HCLK_Div16 RCC_CFGR_PPRE1_DIV16
|
||||
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
||||
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
||||
((PCLK) == RCC_HCLK_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup RCC_Interrupt_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_IT_LSIRDY ((uint8_t)0x01)
|
||||
#define RCC_IT_LSERDY ((uint8_t)0x02)
|
||||
#define RCC_IT_HSIRDY ((uint8_t)0x04)
|
||||
#define RCC_IT_HSERDY ((uint8_t)0x08)
|
||||
#define RCC_IT_PLLRDY ((uint8_t)0x10)
|
||||
#define RCC_IT_MSIRDY ((uint8_t)0x20)
|
||||
#define RCC_IT_CSS ((uint8_t)0x80)
|
||||
|
||||
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xC0) == 0x00) && ((IT) != 0x00))
|
||||
|
||||
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_MSIRDY) || \
|
||||
((IT) == RCC_IT_CSS))
|
||||
|
||||
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x40) == 0x00) && ((IT) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup LSE_Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_LSE_OFF ((uint8_t)0x00)
|
||||
#define RCC_LSE_ON ((uint8_t)0x01)
|
||||
#define RCC_LSE_Bypass ((uint8_t)0x05)
|
||||
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
||||
((LSE) == RCC_LSE_Bypass))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTC_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_RTCCLKSource_LSE RCC_CSR_RTCSEL_LSE
|
||||
#define RCC_RTCCLKSource_LSI RCC_CSR_RTCSEL_LSI
|
||||
#define RCC_RTCCLKSource_HSE_Div2 RCC_CSR_RTCSEL_HSE
|
||||
#define RCC_RTCCLKSource_HSE_Div4 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE_0)
|
||||
#define RCC_RTCCLKSource_HSE_Div8 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE_1)
|
||||
#define RCC_RTCCLKSource_HSE_Div16 ((uint32_t)RCC_CSR_RTCSEL_HSE | RCC_CR_RTCPRE)
|
||||
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div2) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div4) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div8) || \
|
||||
((SOURCE) == RCC_RTCCLKSource_HSE_Div16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AHB_Peripherals
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_AHBPeriph_GPIOA RCC_AHBENR_GPIOAEN
|
||||
#define RCC_AHBPeriph_GPIOB RCC_AHBENR_GPIOBEN
|
||||
#define RCC_AHBPeriph_GPIOC RCC_AHBENR_GPIOCEN
|
||||
#define RCC_AHBPeriph_GPIOD RCC_AHBENR_GPIODEN
|
||||
#define RCC_AHBPeriph_GPIOE RCC_AHBENR_GPIOEEN
|
||||
#define RCC_AHBPeriph_GPIOH RCC_AHBENR_GPIOHEN
|
||||
#define RCC_AHBPeriph_CRC RCC_AHBENR_CRCEN
|
||||
#define RCC_AHBPeriph_FLITF RCC_AHBENR_FLITFEN
|
||||
#define RCC_AHBPeriph_SRAM RCC_AHBLPENR_SRAMLPEN
|
||||
#define RCC_AHBPeriph_DMA1 RCC_AHBENR_DMA1EN
|
||||
|
||||
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFEFF6FC0) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0xFEFE6FC0) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB2_Peripherals
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB2Periph_SYSCFG RCC_APB2ENR_SYSCFGEN
|
||||
#define RCC_APB2Periph_TIM9 RCC_APB2ENR_TIM9EN
|
||||
#define RCC_APB2Periph_TIM10 RCC_APB2ENR_TIM10EN
|
||||
#define RCC_APB2Periph_TIM11 RCC_APB2ENR_TIM11EN
|
||||
#define RCC_APB2Periph_ADC1 RCC_APB2ENR_ADC1EN
|
||||
#define RCC_APB2Periph_SPI1 RCC_APB2ENR_SPI1EN
|
||||
#define RCC_APB2Periph_USART1 RCC_APB2ENR_USART1EN
|
||||
|
||||
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFADE2) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup APB1_Peripherals
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_APB1Periph_TIM2 RCC_APB1ENR_TIM2EN
|
||||
#define RCC_APB1Periph_TIM3 RCC_APB1ENR_TIM3EN
|
||||
#define RCC_APB1Periph_TIM4 RCC_APB1ENR_TIM4EN
|
||||
#define RCC_APB1Periph_TIM6 RCC_APB1ENR_TIM6EN
|
||||
#define RCC_APB1Periph_TIM7 RCC_APB1ENR_TIM7EN
|
||||
#define RCC_APB1Periph_LCD RCC_APB1ENR_LCDEN
|
||||
#define RCC_APB1Periph_WWDG RCC_APB1ENR_WWDGEN
|
||||
#define RCC_APB1Periph_SPI2 RCC_APB1ENR_SPI2EN
|
||||
#define RCC_APB1Periph_USART2 RCC_APB1ENR_USART2EN
|
||||
#define RCC_APB1Periph_USART3 RCC_APB1ENR_USART3EN
|
||||
#define RCC_APB1Periph_I2C1 RCC_APB1ENR_I2C1EN
|
||||
#define RCC_APB1Periph_I2C2 RCC_APB1ENR_I2C2EN
|
||||
#define RCC_APB1Periph_USB RCC_APB1ENR_USBEN
|
||||
#define RCC_APB1Periph_PWR RCC_APB1ENR_PWREN
|
||||
#define RCC_APB1Periph_DAC RCC_APB1ENR_DACEN
|
||||
#define RCC_APB1Periph_COMP RCC_APB1ENR_COMPEN
|
||||
|
||||
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x4F19B5C8) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MCO_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MCOSource_NoClock ((uint8_t)0x00)
|
||||
#define RCC_MCOSource_SYSCLK ((uint8_t)0x01)
|
||||
#define RCC_MCOSource_HSI ((uint8_t)0x02)
|
||||
#define RCC_MCOSource_MSI ((uint8_t)0x03)
|
||||
#define RCC_MCOSource_HSE ((uint8_t)0x04)
|
||||
#define RCC_MCOSource_PLLCLK ((uint8_t)0x05)
|
||||
#define RCC_MCOSource_LSI ((uint8_t)0x06)
|
||||
#define RCC_MCOSource_LSE ((uint8_t)0x07)
|
||||
|
||||
#define IS_RCC_MCO_SOURCE(SOURCE) (((SOURCE) == RCC_MCOSource_NoClock) || ((SOURCE) == RCC_MCOSource_SYSCLK) || \
|
||||
((SOURCE) == RCC_MCOSource_HSI) || ((SOURCE) == RCC_MCOSource_MSI) || \
|
||||
((SOURCE) == RCC_MCOSource_HSE) || ((SOURCE) == RCC_MCOSource_PLLCLK) || \
|
||||
((SOURCE) == RCC_MCOSource_LSI) || ((SOURCE) == RCC_MCOSource_LSE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MCO_Output_Divider
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_MCODiv_1 ((uint8_t)0x00)
|
||||
#define RCC_MCODiv_2 ((uint8_t)0x10)
|
||||
#define RCC_MCODiv_4 ((uint8_t)0x20)
|
||||
#define RCC_MCODiv_8 ((uint8_t)0x30)
|
||||
#define RCC_MCODiv_16 ((uint8_t)0x40)
|
||||
|
||||
#define IS_RCC_MCO_DIV(DIV) (((DIV) == RCC_MCODiv_1) || ((DIV) == RCC_MCODiv_2) || \
|
||||
((DIV) == RCC_MCODiv_4) || ((DIV) == RCC_MCODiv_8) || \
|
||||
((DIV) == RCC_MCODiv_16))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Flag
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
||||
#define RCC_FLAG_MSIRDY ((uint8_t)0x29)
|
||||
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
||||
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
||||
#define RCC_FLAG_LSERDY ((uint8_t)0x49)
|
||||
#define RCC_FLAG_LSIRDY ((uint8_t)0x41)
|
||||
#define RCC_FLAG_OBLRST ((uint8_t)0x59)
|
||||
#define RCC_FLAG_PINRST ((uint8_t)0x5A)
|
||||
#define RCC_FLAG_PORRST ((uint8_t)0x5B)
|
||||
#define RCC_FLAG_SFTRST ((uint8_t)0x5C)
|
||||
#define RCC_FLAG_IWDGRST ((uint8_t)0x5D)
|
||||
#define RCC_FLAG_WWDGRST ((uint8_t)0x5E)
|
||||
#define RCC_FLAG_LPWRRST ((uint8_t)0x5F)
|
||||
|
||||
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||
((FLAG) == RCC_FLAG_MSIRDY) || ((FLAG) == RCC_FLAG_PLLRDY) || \
|
||||
((FLAG) == RCC_FLAG_LSERDY) || ((FLAG) == RCC_FLAG_LSIRDY) || \
|
||||
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
|
||||
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
|
||||
((FLAG) == RCC_FLAG_WWDGRST))
|
||||
|
||||
#define IS_RCC_HSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||
#define IS_RCC_MSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x3F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void RCC_DeInit(void);
|
||||
void RCC_HSEConfig(uint8_t RCC_HSE);
|
||||
ErrorStatus RCC_WaitForHSEStartUp(void);
|
||||
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
||||
void RCC_AdjustMSICalibrationValue(uint8_t MSICalibrationValue);
|
||||
void RCC_MSIRangeConfig(uint32_t RCC_MSIRange);
|
||||
void RCC_MSICmd(FunctionalState NewState);
|
||||
void RCC_HSICmd(FunctionalState NewState);
|
||||
void RCC_PLLConfig(uint8_t RCC_PLLSource, uint8_t RCC_PLLMul, uint8_t RCC_PLLDiv);
|
||||
void RCC_PLLCmd(FunctionalState NewState);
|
||||
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||
uint8_t RCC_GetSYSCLKSource(void);
|
||||
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
||||
void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
||||
void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
||||
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
||||
void RCC_LSEConfig(uint8_t RCC_LSE);
|
||||
void RCC_LSICmd(FunctionalState NewState);
|
||||
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
||||
void RCC_RTCCLKCmd(FunctionalState NewState);
|
||||
void RCC_RTCResetCmd(FunctionalState NewState);
|
||||
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
||||
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_AHBPeriphClockLPModeCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||
void RCC_MCOConfig(uint8_t RCC_MCOSource, uint8_t RCC_MCODiv);
|
||||
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
||||
void RCC_ClearFlag(void);
|
||||
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
||||
void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_RCC_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,380 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the SPI
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_SPI_H
|
||||
#define __STM32L1xx_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||
This parameter can be any combination of @ref SPI_data_direction */
|
||||
|
||||
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be any combination of @ref SPI_mode */
|
||||
|
||||
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be any combination of @ref SPI_data_size */
|
||||
|
||||
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be any combination of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be any combination of @ref SPI_Clock_Phase */
|
||||
|
||||
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be any combination of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set. */
|
||||
|
||||
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
||||
((PERIPH) == SPI2))
|
||||
|
||||
/** @defgroup SPI_data_direction
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
||||
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
||||
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
||||
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
||||
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
||||
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||
((MODE) == SPI_Direction_1Line_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Mode_Master ((uint16_t)0x0104)
|
||||
#define SPI_Mode_Slave ((uint16_t)0x0000)
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||
((MODE) == SPI_Mode_Slave))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_DataSize_16b ((uint16_t)0x0800)
|
||||
#define SPI_DataSize_8b ((uint16_t)0x0000)
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||
((DATASIZE) == SPI_DataSize_8b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPOL_Low ((uint16_t)0x0000)
|
||||
#define SPI_CPOL_High ((uint16_t)0x0002)
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||
((CPOL) == SPI_CPOL_High))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||
((CPHA) == SPI_CPHA_2Edge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSS_Soft ((uint16_t)0x0200)
|
||||
#define SPI_NSS_Hard ((uint16_t)0x0000)
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
||||
((NSS) == SPI_NSS_Hard))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
||||
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
||||
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
||||
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
||||
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
||||
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
||||
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
||||
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
||||
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
||||
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
||||
((BIT) == SPI_FirstBit_LSB))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_DMA_transfer_requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_DMAReq_Tx ((uint16_t)0x0002)
|
||||
#define SPI_DMAReq_Rx ((uint16_t)0x0001)
|
||||
#define IS_SPI_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_NSS_internal_software_mangement
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
||||
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
||||
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
||||
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Transmit_Receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_CRC_Tx ((uint8_t)0x00)
|
||||
#define SPI_CRC_Rx ((uint8_t)0x01)
|
||||
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_direction_transmit_receive
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
||||
#define SPI_Direction_Tx ((uint16_t)0x4000)
|
||||
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
||||
((DIRECTION) == SPI_Direction_Tx))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_IT_TXE ((uint8_t)0x71)
|
||||
#define SPI_IT_RXNE ((uint8_t)0x60)
|
||||
#define SPI_IT_ERR ((uint8_t)0x50)
|
||||
#define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TXE) || \
|
||||
((IT) == SPI_IT_RXNE) || \
|
||||
((IT) == SPI_IT_ERR))
|
||||
#define SPI_IT_OVR ((uint8_t)0x56)
|
||||
#define SPI_IT_MODF ((uint8_t)0x55)
|
||||
#define SPI_IT_CRCERR ((uint8_t)0x54)
|
||||
#define IS_SPI_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
||||
#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_RXNE) || ((IT) == SPI_IT_TXE) || \
|
||||
((IT) == SPI_IT_CRCERR) || \
|
||||
((IT) == SPI_IT_MODF) || ((IT) == SPI_IT_OVR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_FLAG_RXNE ((uint16_t)0x0001)
|
||||
#define SPI_FLAG_TXE ((uint16_t)0x0002)
|
||||
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
||||
#define SPI_FLAG_MODF ((uint16_t)0x0020)
|
||||
#define SPI_FLAG_OVR ((uint16_t)0x0040)
|
||||
#define SPI_FLAG_BSY ((uint16_t)0x0080)
|
||||
#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
||||
#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_BSY) || ((FLAG) == SPI_FLAG_OVR) || \
|
||||
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
||||
((FLAG) == SPI_FLAG_TXE) || ((FLAG) == SPI_FLAG_RXNE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_polynomial
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Legacy
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SPI_I2S_DMAReq_Tx SPI_DMAReq_Tx
|
||||
#define SPI_I2S_DMAReq_Rx SPI_DMAReq_Rx
|
||||
#define SPI_I2S_IT_TXE SPI_IT_TXE
|
||||
#define SPI_I2S_IT_RXNE SPI_IT_RXNE
|
||||
#define SPI_I2S_IT_ERR SPI_IT_ERR
|
||||
#define SPI_I2S_IT_OVR SPI_IT_OVR
|
||||
#define SPI_I2S_FLAG_RXNE SPI_FLAG_RXNE
|
||||
#define SPI_I2S_FLAG_TXE SPI_FLAG_TXE
|
||||
#define SPI_I2S_FLAG_OVR SPI_FLAG_OVR
|
||||
#define SPI_I2S_FLAG_BSY SPI_FLAG_BSY
|
||||
#define SPI_I2S_DeInit SPI_DeInit
|
||||
#define SPI_I2S_ITConfig SPI_ITConfig
|
||||
#define SPI_I2S_DMACmd SPI_DMACmd
|
||||
#define SPI_I2S_SendData SPI_SendData
|
||||
#define SPI_I2S_ReceiveData SPI_ReceiveData
|
||||
#define SPI_I2S_GetFlagStatus SPI_GetFlagStatus
|
||||
#define SPI_I2S_ClearFlag SPI_ClearFlag
|
||||
#define SPI_I2S_GetITStatus SPI_GetITStatus
|
||||
#define SPI_I2S_ClearITPendingBit SPI_ClearITPendingBit
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void SPI_DeInit(SPI_TypeDef* SPIx);
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
|
||||
void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);
|
||||
void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
||||
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
|
||||
void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
|
||||
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
|
||||
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32l15x_SPI_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,381 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_syscfg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the SYSCFG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/*!< Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_SYSCFG_H
|
||||
#define __STM32L1xx_SYSCFG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!< Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SYSCFG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Port_Sources
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_PortSourceGPIOA ((uint8_t)0x00)
|
||||
#define EXTI_PortSourceGPIOB ((uint8_t)0x01)
|
||||
#define EXTI_PortSourceGPIOC ((uint8_t)0x02)
|
||||
#define EXTI_PortSourceGPIOD ((uint8_t)0x03)
|
||||
#define EXTI_PortSourceGPIOE ((uint8_t)0x04)
|
||||
#define EXTI_PortSourceGPIOH ((uint8_t)0x05)
|
||||
|
||||
#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
|
||||
((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
|
||||
((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
|
||||
((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
|
||||
((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
|
||||
((PORTSOURCE) == EXTI_PortSourceGPIOH))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Pin_sources
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_PinSource0 ((uint8_t)0x00)
|
||||
#define EXTI_PinSource1 ((uint8_t)0x01)
|
||||
#define EXTI_PinSource2 ((uint8_t)0x02)
|
||||
#define EXTI_PinSource3 ((uint8_t)0x03)
|
||||
#define EXTI_PinSource4 ((uint8_t)0x04)
|
||||
#define EXTI_PinSource5 ((uint8_t)0x05)
|
||||
#define EXTI_PinSource6 ((uint8_t)0x06)
|
||||
#define EXTI_PinSource7 ((uint8_t)0x07)
|
||||
#define EXTI_PinSource8 ((uint8_t)0x08)
|
||||
#define EXTI_PinSource9 ((uint8_t)0x09)
|
||||
#define EXTI_PinSource10 ((uint8_t)0x0A)
|
||||
#define EXTI_PinSource11 ((uint8_t)0x0B)
|
||||
#define EXTI_PinSource12 ((uint8_t)0x0C)
|
||||
#define EXTI_PinSource13 ((uint8_t)0x0D)
|
||||
#define EXTI_PinSource14 ((uint8_t)0x0E)
|
||||
#define EXTI_PinSource15 ((uint8_t)0x0F)
|
||||
#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
|
||||
((PINSOURCE) == EXTI_PinSource1) || \
|
||||
((PINSOURCE) == EXTI_PinSource2) || \
|
||||
((PINSOURCE) == EXTI_PinSource3) || \
|
||||
((PINSOURCE) == EXTI_PinSource4) || \
|
||||
((PINSOURCE) == EXTI_PinSource5) || \
|
||||
((PINSOURCE) == EXTI_PinSource6) || \
|
||||
((PINSOURCE) == EXTI_PinSource7) || \
|
||||
((PINSOURCE) == EXTI_PinSource8) || \
|
||||
((PINSOURCE) == EXTI_PinSource9) || \
|
||||
((PINSOURCE) == EXTI_PinSource10) || \
|
||||
((PINSOURCE) == EXTI_PinSource11) || \
|
||||
((PINSOURCE) == EXTI_PinSource12) || \
|
||||
((PINSOURCE) == EXTI_PinSource13) || \
|
||||
((PINSOURCE) == EXTI_PinSource14) || \
|
||||
((PINSOURCE) == EXTI_PinSource15))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Memory_Remap_Config
|
||||
* @{
|
||||
*/
|
||||
#define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
|
||||
#define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
|
||||
#define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
|
||||
|
||||
#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
|
||||
((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
|
||||
((REMAP) == SYSCFG_MemoryRemap_SRAM))
|
||||
|
||||
|
||||
/** @defgroup RI_Resistor
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RI_Resistor_10KPU COMP_CSR_10KPU
|
||||
#define RI_Resistor_400KPU COMP_CSR_400KPU
|
||||
#define RI_Resistor_10KPD COMP_CSR_10KPD
|
||||
#define RI_Resistor_400KPD COMP_CSR_400KPD
|
||||
|
||||
#define IS_RI_RESISTOR(RESISTOR) (((RESISTOR) == COMP_CSR_10KPU) || \
|
||||
((RESISTOR) == COMP_CSR_400KPU) || \
|
||||
((RESISTOR) == COMP_CSR_10KPD) || \
|
||||
((RESISTOR) == COMP_CSR_400KPD))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_InputCapture
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RI_InputCapture_IC1 RI_ICR_IC1 /*!< Input Capture 1 */
|
||||
#define RI_InputCapture_IC2 RI_ICR_IC2 /*!< Input Capture 2 */
|
||||
#define RI_InputCapture_IC3 RI_ICR_IC3 /*!< Input Capture 3 */
|
||||
#define RI_InputCapture_IC4 RI_ICR_IC4 /*!< Input Capture 4 */
|
||||
|
||||
#define IS_RI_INPUTCAPTURE(INPUTCAPTURE) ((((INPUTCAPTURE) & (uint32_t)0xFFC2FFFF) == 0x00) && ((INPUTCAPTURE) != (uint32_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Select
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_Select_None ((uint32_t)0x00000000) /*!< None selected */
|
||||
#define TIM_Select_TIM2 ((uint32_t)0x00010000) /*!< Timer 2 selected */
|
||||
#define TIM_Select_TIM3 ((uint32_t)0x00020000) /*!< Timer 3 selected */
|
||||
#define TIM_Select_TIM4 ((uint32_t)0x00030000) /*!< Timer 4 selected */
|
||||
|
||||
#define IS_RI_TIM(TIM) (((TIM) == TIM_Select_None) || \
|
||||
((TIM) == TIM_Select_TIM2) || \
|
||||
((TIM) == TIM_Select_TIM3) || \
|
||||
((TIM) == TIM_Select_TIM4))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_InputCaptureRouting
|
||||
* @{
|
||||
*/
|
||||
/* TIMx_IC1 TIMx_IC2 TIMx_IC3 TIMx_IC4 */
|
||||
#define RI_InputCaptureRouting_0 ((uint32_t)0x00000000) /* PA0 PA1 PA2 PA3 */
|
||||
#define RI_InputCaptureRouting_1 ((uint32_t)0x00000001) /* PA4 PA5 PA6 PA7 */
|
||||
#define RI_InputCaptureRouting_2 ((uint32_t)0x00000002) /* PA8 PA9 PA10 PA11 */
|
||||
#define RI_InputCaptureRouting_3 ((uint32_t)0x00000003) /* PA12 PA13 PA14 PA15 */
|
||||
#define RI_InputCaptureRouting_4 ((uint32_t)0x00000004) /* PC0 PC1 PC2 PC3 */
|
||||
#define RI_InputCaptureRouting_5 ((uint32_t)0x00000005) /* PC4 PC5 PC6 PC7 */
|
||||
#define RI_InputCaptureRouting_6 ((uint32_t)0x00000006) /* PC8 PC9 PC10 PC11 */
|
||||
#define RI_InputCaptureRouting_7 ((uint32_t)0x00000007) /* PC12 PC13 PC14 PC15 */
|
||||
#define RI_InputCaptureRouting_8 ((uint32_t)0x00000008) /* PD0 PD1 PD2 PD3 */
|
||||
#define RI_InputCaptureRouting_9 ((uint32_t)0x00000009) /* PD4 PD5 PD6 PD7 */
|
||||
#define RI_InputCaptureRouting_10 ((uint32_t)0x0000000A) /* PD8 PD9 PD10 PD11 */
|
||||
#define RI_InputCaptureRouting_11 ((uint32_t)0x0000000B) /* PD12 PD13 PD14 PD15 */
|
||||
#define RI_InputCaptureRouting_12 ((uint32_t)0x0000000C) /* PE0 PE1 PE2 PE3 */
|
||||
#define RI_InputCaptureRouting_13 ((uint32_t)0x0000000D) /* PE4 PE5 PE6 PE7 */
|
||||
#define RI_InputCaptureRouting_14 ((uint32_t)0x0000000E) /* PE8 PE9 PE10 PE11 */
|
||||
#define RI_InputCaptureRouting_15 ((uint32_t)0x0000000F) /* PE12 PE13 PE14 PE15 */
|
||||
|
||||
#define IS_RI_INPUTCAPTURE_ROUTING(ROUTING) (((ROUTING) == RI_InputCaptureRouting_0) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_1) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_2) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_3) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_4) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_5) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_6) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_7) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_8) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_9) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_10) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_11) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_12) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_13) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_14) || \
|
||||
((ROUTING) == RI_InputCaptureRouting_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_IOSwitch
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* ASCR1 I/O switch: bit 28 is set to '1' to indicate that the mask is in ASCR1 register */
|
||||
#define RI_IOSwitch_CH0 ((uint32_t)0x10000001)
|
||||
#define RI_IOSwitch_CH1 ((uint32_t)0x10000002)
|
||||
#define RI_IOSwitch_CH2 ((uint32_t)0x10000004)
|
||||
#define RI_IOSwitch_CH3 ((uint32_t)0x10000008)
|
||||
#define RI_IOSwitch_CH4 ((uint32_t)0x10000010)
|
||||
#define RI_IOSwitch_CH5 ((uint32_t)0x10000020)
|
||||
#define RI_IOSwitch_CH6 ((uint32_t)0x10000040)
|
||||
#define RI_IOSwitch_CH7 ((uint32_t)0x10000080)
|
||||
#define RI_IOSwitch_CH8 ((uint32_t)0x10000100)
|
||||
#define RI_IOSwitch_CH9 ((uint32_t)0x10000200)
|
||||
#define RI_IOSwitch_CH10 ((uint32_t)0x10000400)
|
||||
#define RI_IOSwitch_CH11 ((uint32_t)0x10000800)
|
||||
#define RI_IOSwitch_CH12 ((uint32_t)0x10001000)
|
||||
#define RI_IOSwitch_CH13 ((uint32_t)0x10002000)
|
||||
#define RI_IOSwitch_CH14 ((uint32_t)0x10004000)
|
||||
#define RI_IOSwitch_CH15 ((uint32_t)0x10008000)
|
||||
#define RI_IOSwitch_CH18 ((uint32_t)0x10040000)
|
||||
#define RI_IOSwitch_CH19 ((uint32_t)0x10080000)
|
||||
#define RI_IOSwitch_CH20 ((uint32_t)0x10100000)
|
||||
#define RI_IOSwitch_CH21 ((uint32_t)0x10200000)
|
||||
#define RI_IOSwitch_CH22 ((uint32_t)0x10400000)
|
||||
#define RI_IOSwitch_CH23 ((uint32_t)0x10800000)
|
||||
#define RI_IOSwitch_CH24 ((uint32_t)0x11000000)
|
||||
#define RI_IOSwitch_CH25 ((uint32_t)0x12000000)
|
||||
#define RI_IOSwitch_VCOMP ((uint32_t)0x14000000) /* VCOMP is an internal switch used to connect
|
||||
selected channel to COMP1 non inverting input */
|
||||
|
||||
/* ASCR2 IO switch: : bit 28 is set to '0' to indicate that the mask is in ASCR2 register */
|
||||
#define RI_IOSwitch_GR10_1 ((uint32_t)0x00000001)
|
||||
#define RI_IOSwitch_GR10_2 ((uint32_t)0x00000002)
|
||||
#define RI_IOSwitch_GR10_3 ((uint32_t)0x00000004)
|
||||
#define RI_IOSwitch_GR10_4 ((uint32_t)0x00000008)
|
||||
#define RI_IOSwitch_GR6_1 ((uint32_t)0x00000010)
|
||||
#define RI_IOSwitch_GR6_2 ((uint32_t)0x00000020)
|
||||
#define RI_IOSwitch_GR5_1 ((uint32_t)0x00000040)
|
||||
#define RI_IOSwitch_GR5_2 ((uint32_t)0x00000080)
|
||||
#define RI_IOSwitch_GR5_3 ((uint32_t)0x00000100)
|
||||
#define RI_IOSwitch_GR4_1 ((uint32_t)0x00000200)
|
||||
#define RI_IOSwitch_GR4_2 ((uint32_t)0x00000400)
|
||||
#define RI_IOSwitch_GR4_3 ((uint32_t)0x00000800)
|
||||
|
||||
#define IS_RI_IOSWITCH(IOSWITCH) (((IOSWITCH) == RI_IOSwitch_CH0) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH1) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH2) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH3) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH4) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH5) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH6) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH7) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH8) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH9) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH10) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH11) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH12) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH13) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH14) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH15) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH18) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH19) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH20) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH21) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH22) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH23) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH24) || \
|
||||
((IOSWITCH) == RI_IOSwitch_CH25) || \
|
||||
((IOSWITCH) == RI_IOSwitch_VCOMP) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR10_1) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR10_2) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR10_3) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR10_4) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR6_1) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR6_2) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR5_1) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR5_2) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR5_3) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR4_1) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR4_2) || \
|
||||
((IOSWITCH) == RI_IOSwitch_GR4_3))
|
||||
|
||||
/** @defgroup RI_Port
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RI_PortA ((uint8_t)0x01) /*!< GPIOA selected */
|
||||
#define RI_PortB ((uint8_t)0x02) /*!< GPIOB selected */
|
||||
#define RI_PortC ((uint8_t)0x03) /*!< GPIOC selected */
|
||||
#define RI_PortD ((uint8_t)0x04) /*!< GPIOD selected */
|
||||
#define RI_PortE ((uint8_t)0x05) /*!< GPIOE selected */
|
||||
|
||||
#define IS_RI_PORT(PORT) (((PORT) == RI_PortA) || \
|
||||
((PORT) == RI_PortB) || \
|
||||
((PORT) == RI_PortC) || \
|
||||
((PORT) == RI_PortD) || \
|
||||
((PORT) == RI_PortE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_Pin define
|
||||
* @{
|
||||
*/
|
||||
#define RI_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define RI_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define RI_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define RI_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define RI_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define RI_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define RI_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define RI_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define RI_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define RI_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define RI_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define RI_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define RI_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define RI_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define RI_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define RI_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define RI_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_RI_PIN(PIN) ((PIN) != (uint16_t)0x00)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
void SYSCFG_DeInit(void);
|
||||
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
|
||||
void SYSCFG_USBPuCmd(FunctionalState NewState);
|
||||
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
|
||||
void SYSCFG_RIDeInit(void);
|
||||
void SYSCFG_RITIMSelect(uint32_t TIM_Select);
|
||||
void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting);
|
||||
void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState);
|
||||
void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState);
|
||||
void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState);
|
||||
void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,
|
||||
FunctionalState NewState);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32L1xx_SYSCFG_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,901 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_tim.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the TIM firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_TIM_H
|
||||
#define __STM32L1xx_TIM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup TIM
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief TIM Time Base Init structure definition
|
||||
* @note This sturcture is used with all TIMx except for TIM6 and TIM7.
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
|
||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||
|
||||
uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
|
||||
This parameter can be a value of @ref TIM_Counter_Mode */
|
||||
|
||||
uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
||||
Auto-Reload Register at the next update event.
|
||||
This parameter must be a number between 0x0000 and 0xFFFF. */
|
||||
|
||||
uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
|
||||
This parameter can be a value of @ref TIM_Clock_Division_CKD */
|
||||
|
||||
} TIM_TimeBaseInitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM Output Compare Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
|
||||
|
||||
uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_state */
|
||||
|
||||
uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
|
||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||
|
||||
uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
|
||||
|
||||
} TIM_OCInitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief TIM Input Capture Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t TIM_Channel; /*!< Specifies the TIM channel.
|
||||
This parameter can be a value of @ref TIM_Channel */
|
||||
|
||||
uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
||||
|
||||
uint16_t TIM_ICSelection; /*!< Specifies the input.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Selection */
|
||||
|
||||
uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
||||
|
||||
uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
|
||||
This parameter can be a number between 0x0 and 0xF */
|
||||
} TIM_ICInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup TIM_Exported_constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7) || \
|
||||
((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM10) || \
|
||||
((PERIPH) == TIM11))
|
||||
|
||||
|
||||
#define IS_TIM_23491011_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM10) || \
|
||||
((PERIPH) == TIM11))
|
||||
|
||||
#define IS_TIM_234_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4))
|
||||
|
||||
#define IS_TIM_2349_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) ||\
|
||||
((PERIPH) == TIM9))
|
||||
|
||||
#define IS_TIM_234679_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) ||\
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7) ||\
|
||||
((PERIPH) == TIM9))
|
||||
|
||||
#define IS_TIM_23467_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) ||\
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7))
|
||||
|
||||
#define IS_TIM_91011_PERIPH(PERIPH) (((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM10) ||\
|
||||
((PERIPH) == TIM11))
|
||||
|
||||
|
||||
|
||||
/** @defgroup TIM_Output_Compare_and_PWM_modes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OCMode_Timing ((uint16_t)0x0000)
|
||||
#define TIM_OCMode_Active ((uint16_t)0x0010)
|
||||
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
||||
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
||||
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
||||
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
||||
#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
((MODE) == TIM_OCMode_Active) || \
|
||||
((MODE) == TIM_OCMode_Inactive) || \
|
||||
((MODE) == TIM_OCMode_Toggle)|| \
|
||||
((MODE) == TIM_OCMode_PWM1) || \
|
||||
((MODE) == TIM_OCMode_PWM2))
|
||||
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
((MODE) == TIM_OCMode_Active) || \
|
||||
((MODE) == TIM_OCMode_Inactive) || \
|
||||
((MODE) == TIM_OCMode_Toggle)|| \
|
||||
((MODE) == TIM_OCMode_PWM1) || \
|
||||
((MODE) == TIM_OCMode_PWM2) || \
|
||||
((MODE) == TIM_ForcedAction_Active) || \
|
||||
((MODE) == TIM_ForcedAction_InActive))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_One_Pulse_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OPMode_Single ((uint16_t)0x0008)
|
||||
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
||||
#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
||||
((MODE) == TIM_OPMode_Repetitive))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Channel
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_Channel_1 ((uint16_t)0x0000)
|
||||
#define TIM_Channel_2 ((uint16_t)0x0004)
|
||||
#define TIM_Channel_3 ((uint16_t)0x0008)
|
||||
#define TIM_Channel_4 ((uint16_t)0x000C)
|
||||
|
||||
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2) || \
|
||||
((CHANNEL) == TIM_Channel_3) || \
|
||||
((CHANNEL) == TIM_Channel_4))
|
||||
|
||||
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Clock_Division_CKD
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
||||
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
||||
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
||||
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
||||
((DIV) == TIM_CKD_DIV2) || \
|
||||
((DIV) == TIM_CKD_DIV4))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Counter_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_CounterMode_Up ((uint16_t)0x0000)
|
||||
#define TIM_CounterMode_Down ((uint16_t)0x0010)
|
||||
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
||||
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
||||
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
||||
#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
||||
((MODE) == TIM_CounterMode_Down) || \
|
||||
((MODE) == TIM_CounterMode_CenterAligned1) || \
|
||||
((MODE) == TIM_CounterMode_CenterAligned2) || \
|
||||
((MODE) == TIM_CounterMode_CenterAligned3))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Output_Compare_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OCPolarity_High ((uint16_t)0x0000)
|
||||
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
||||
#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
||||
((POLARITY) == TIM_OCPolarity_Low))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup TIM_Output_Compare_state
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OutputState_Disable ((uint16_t)0x0000)
|
||||
#define TIM_OutputState_Enable ((uint16_t)0x0001)
|
||||
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
||||
((STATE) == TIM_OutputState_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup TIM_Capture_Compare_state
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_CCx_Enable ((uint16_t)0x0001)
|
||||
#define TIM_CCx_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
||||
((CCX) == TIM_CCx_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Input_Capture_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
||||
#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
||||
((POLARITY) == TIM_ICPolarity_Falling)|| \
|
||||
((POLARITY) == TIM_ICPolarity_BothEdge))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Input_Capture_Selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||
connected to IC1, IC2, IC3 or IC4, respectively */
|
||||
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||
connected to IC2, IC1, IC4 or IC3, respectively. */
|
||||
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
||||
#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
||||
((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
||||
((SELECTION) == TIM_ICSelection_TRC))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Input_Capture_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
||||
#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
||||
#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
||||
#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
||||
#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
|
||||
((PRESCALER) == TIM_ICPSC_DIV2) || \
|
||||
((PRESCALER) == TIM_ICPSC_DIV4) || \
|
||||
((PRESCALER) == TIM_ICPSC_DIV8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_interrupt_sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_IT_Update ((uint16_t)0x0001)
|
||||
#define TIM_IT_CC1 ((uint16_t)0x0002)
|
||||
#define TIM_IT_CC2 ((uint16_t)0x0004)
|
||||
#define TIM_IT_CC3 ((uint16_t)0x0008)
|
||||
#define TIM_IT_CC4 ((uint16_t)0x0010)
|
||||
#define TIM_IT_Trigger ((uint16_t)0x0040)
|
||||
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFFA0) == 0x0000) && ((IT) != 0x0000))
|
||||
|
||||
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
||||
((IT) == TIM_IT_CC1) || \
|
||||
((IT) == TIM_IT_CC2) || \
|
||||
((IT) == TIM_IT_CC3) || \
|
||||
((IT) == TIM_IT_CC4) || \
|
||||
((IT) == TIM_IT_Trigger))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_DMA_Base_address
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
||||
#define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
||||
#define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
||||
#define TIM_DMABase_DIER ((uint16_t)0x0003)
|
||||
#define TIM_DMABase_SR ((uint16_t)0x0004)
|
||||
#define TIM_DMABase_EGR ((uint16_t)0x0005)
|
||||
#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
||||
#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
||||
#define TIM_DMABase_CCER ((uint16_t)0x0008)
|
||||
#define TIM_DMABase_CNT ((uint16_t)0x0009)
|
||||
#define TIM_DMABase_PSC ((uint16_t)0x000A)
|
||||
#define TIM_DMABase_ARR ((uint16_t)0x000B)
|
||||
#define TIM_DMABase_RCR ((uint16_t)0x000C)
|
||||
#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
||||
#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
||||
#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
||||
#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
||||
#define TIM_DMABase_DCR ((uint16_t)0x0012)
|
||||
#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
|
||||
((BASE) == TIM_DMABase_CR2) || \
|
||||
((BASE) == TIM_DMABase_SMCR) || \
|
||||
((BASE) == TIM_DMABase_DIER) || \
|
||||
((BASE) == TIM_DMABase_SR) || \
|
||||
((BASE) == TIM_DMABase_EGR) || \
|
||||
((BASE) == TIM_DMABase_CCMR1) || \
|
||||
((BASE) == TIM_DMABase_CCMR2) || \
|
||||
((BASE) == TIM_DMABase_CCER) || \
|
||||
((BASE) == TIM_DMABase_CNT) || \
|
||||
((BASE) == TIM_DMABase_PSC) || \
|
||||
((BASE) == TIM_DMABase_ARR) || \
|
||||
((BASE) == TIM_DMABase_CCR1) || \
|
||||
((BASE) == TIM_DMABase_CCR2) || \
|
||||
((BASE) == TIM_DMABase_CCR3) || \
|
||||
((BASE) == TIM_DMABase_CCR4) || \
|
||||
((BASE) == TIM_DMABase_DCR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_DMA_Burst_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_DMABurstLength_1Byte ((uint16_t)0x0000)
|
||||
#define TIM_DMABurstLength_2Bytes ((uint16_t)0x0100)
|
||||
#define TIM_DMABurstLength_3Bytes ((uint16_t)0x0200)
|
||||
#define TIM_DMABurstLength_4Bytes ((uint16_t)0x0300)
|
||||
#define TIM_DMABurstLength_5Bytes ((uint16_t)0x0400)
|
||||
#define TIM_DMABurstLength_6Bytes ((uint16_t)0x0500)
|
||||
#define TIM_DMABurstLength_7Bytes ((uint16_t)0x0600)
|
||||
#define TIM_DMABurstLength_8Bytes ((uint16_t)0x0700)
|
||||
#define TIM_DMABurstLength_9Bytes ((uint16_t)0x0800)
|
||||
#define TIM_DMABurstLength_10Bytes ((uint16_t)0x0900)
|
||||
#define TIM_DMABurstLength_11Bytes ((uint16_t)0x0A00)
|
||||
#define TIM_DMABurstLength_12Bytes ((uint16_t)0x0B00)
|
||||
#define TIM_DMABurstLength_13Bytes ((uint16_t)0x0C00)
|
||||
#define TIM_DMABurstLength_14Bytes ((uint16_t)0x0D00)
|
||||
#define TIM_DMABurstLength_15Bytes ((uint16_t)0x0E00)
|
||||
#define TIM_DMABurstLength_16Bytes ((uint16_t)0x0F00)
|
||||
#define TIM_DMABurstLength_17Bytes ((uint16_t)0x1000)
|
||||
#define TIM_DMABurstLength_18Bytes ((uint16_t)0x1100)
|
||||
#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \
|
||||
((LENGTH) == TIM_DMABurstLength_2Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_3Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_4Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_5Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_6Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_7Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_8Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_9Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_10Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_11Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_12Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_13Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_14Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_15Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_16Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_17Bytes) || \
|
||||
((LENGTH) == TIM_DMABurstLength_18Bytes))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_DMA_sources
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_DMA_Update ((uint16_t)0x0100)
|
||||
#define TIM_DMA_CC1 ((uint16_t)0x0200)
|
||||
#define TIM_DMA_CC2 ((uint16_t)0x0400)
|
||||
#define TIM_DMA_CC3 ((uint16_t)0x0800)
|
||||
#define TIM_DMA_CC4 ((uint16_t)0x1000)
|
||||
#define TIM_DMA_Trigger ((uint16_t)0x4000)
|
||||
#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xA0FF) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_External_Trigger_Prescaler
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
||||
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
||||
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
||||
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
||||
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Internal_Trigger_Selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_TS_ITR0 ((uint16_t)0x0000)
|
||||
#define TIM_TS_ITR1 ((uint16_t)0x0010)
|
||||
#define TIM_TS_ITR2 ((uint16_t)0x0020)
|
||||
#define TIM_TS_ITR3 ((uint16_t)0x0030)
|
||||
#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
||||
#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
||||
#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
||||
#define TIM_TS_ETRF ((uint16_t)0x0070)
|
||||
#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
((SELECTION) == TIM_TS_ITR1) || \
|
||||
((SELECTION) == TIM_TS_ITR2) || \
|
||||
((SELECTION) == TIM_TS_ITR3) || \
|
||||
((SELECTION) == TIM_TS_TI1F_ED) || \
|
||||
((SELECTION) == TIM_TS_TI1FP1) || \
|
||||
((SELECTION) == TIM_TS_TI2FP2) || \
|
||||
((SELECTION) == TIM_TS_ETRF))
|
||||
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
((SELECTION) == TIM_TS_ITR1) || \
|
||||
((SELECTION) == TIM_TS_ITR2) || \
|
||||
((SELECTION) == TIM_TS_ITR3))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_TIx_External_Clock_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
||||
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
||||
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_External_Trigger_Polarity
|
||||
* @{
|
||||
*/
|
||||
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
||||
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
||||
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
||||
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Prescaler_Reload_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
||||
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
||||
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
||||
((RELOAD) == TIM_PSCReloadMode_Immediate))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Forced_Action
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
||||
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
||||
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
||||
((ACTION) == TIM_ForcedAction_InActive))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Encoder_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
||||
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||
#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
||||
((MODE) == TIM_EncoderMode_TI2) || \
|
||||
((MODE) == TIM_EncoderMode_TI12))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup TIM_Event_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_EventSource_Update ((uint16_t)0x0001)
|
||||
#define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
||||
#define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
||||
#define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
||||
#define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
||||
#define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
||||
#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFFA0) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Update_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
|
||||
or the setting of UG bit, or an update generation
|
||||
through the slave mode controller. */
|
||||
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
||||
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
||||
((SOURCE) == TIM_UpdateSource_Regular))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Ouput_Compare_Preload_State
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
||||
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
||||
((STATE) == TIM_OCPreload_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Ouput_Compare_Fast_State
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OCFast_Enable ((uint16_t)0x0004)
|
||||
#define TIM_OCFast_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
||||
((STATE) == TIM_OCFast_Disable))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Ouput_Compare_Clear_State
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_OCClear_Enable ((uint16_t)0x0080)
|
||||
#define TIM_OCClear_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
||||
((STATE) == TIM_OCClear_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Trigger_Output_Source
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
||||
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
||||
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
||||
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
||||
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
||||
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
||||
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
||||
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
||||
#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
||||
((SOURCE) == TIM_TRGOSource_Enable) || \
|
||||
((SOURCE) == TIM_TRGOSource_Update) || \
|
||||
((SOURCE) == TIM_TRGOSource_OC1) || \
|
||||
((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
||||
((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
||||
((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
||||
((SOURCE) == TIM_TRGOSource_OC4Ref))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Slave_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
||||
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
||||
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
||||
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
||||
#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
||||
((MODE) == TIM_SlaveMode_Gated) || \
|
||||
((MODE) == TIM_SlaveMode_Trigger) || \
|
||||
((MODE) == TIM_SlaveMode_External1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Master_Slave_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
||||
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
||||
((STATE) == TIM_MasterSlaveMode_Disable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_FLAG_Update ((uint16_t)0x0001)
|
||||
#define TIM_FLAG_CC1 ((uint16_t)0x0002)
|
||||
#define TIM_FLAG_CC2 ((uint16_t)0x0004)
|
||||
#define TIM_FLAG_CC3 ((uint16_t)0x0008)
|
||||
#define TIM_FLAG_CC4 ((uint16_t)0x0010)
|
||||
#define TIM_FLAG_Trigger ((uint16_t)0x0040)
|
||||
#define TIM_FLAG_CC1OF ((uint16_t)0x0200)
|
||||
#define TIM_FLAG_CC2OF ((uint16_t)0x0400)
|
||||
#define TIM_FLAG_CC3OF ((uint16_t)0x0800)
|
||||
#define TIM_FLAG_CC4OF ((uint16_t)0x1000)
|
||||
#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
|
||||
((FLAG) == TIM_FLAG_CC1) || \
|
||||
((FLAG) == TIM_FLAG_CC2) || \
|
||||
((FLAG) == TIM_FLAG_CC3) || \
|
||||
((FLAG) == TIM_FLAG_CC4) || \
|
||||
((FLAG) == TIM_FLAG_Trigger) || \
|
||||
((FLAG) == TIM_FLAG_CC1OF) || \
|
||||
((FLAG) == TIM_FLAG_CC2OF) || \
|
||||
((FLAG) == TIM_FLAG_CC3OF) || \
|
||||
((FLAG) == TIM_FLAG_CC4OF))
|
||||
#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE1A0) == 0x0000) && ((TIM_FLAG) != 0x0000))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Input_Capture_Filer_Value
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_External_Trigger_Filter
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_OCReferenceClear
|
||||
* @{
|
||||
*/
|
||||
#define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008)
|
||||
#define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000)
|
||||
#define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \
|
||||
((SOURCE) == TIM_OCReferenceClear_OCREFCLR))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Remap
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM9_GPIO ((uint16_t)0x0000)
|
||||
#define TIM9_LSE ((uint16_t)0x0001)
|
||||
|
||||
#define TIM10_GPIO ((uint16_t)0x0000)
|
||||
#define TIM10_LSI ((uint16_t)0x0001)
|
||||
#define TIM10_LSE ((uint16_t)0x0002)
|
||||
#define TIM10_RTC ((uint16_t)0x0003)
|
||||
|
||||
#define TIM11_GPIO ((uint16_t)0x0000)
|
||||
#define TIM11_MSI ((uint16_t)0x0001)
|
||||
#define TIM11_HSE_RTC ((uint16_t)0x0002)
|
||||
|
||||
#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM9_GPIO)||\
|
||||
((TIM_REMAP) == TIM9_LSE)||\
|
||||
((TIM_REMAP) == TIM10_GPIO)||\
|
||||
((TIM_REMAP) == TIM10_LSI)||\
|
||||
((TIM_REMAP) == TIM10_LSE)||\
|
||||
((TIM_REMAP) == TIM10_RTC)||\
|
||||
((TIM_REMAP) == TIM11_GPIO)||\
|
||||
((TIM_REMAP) == TIM11_MSI)||\
|
||||
((TIM_REMAP) == TIM11_HSE_RTC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void TIM_DeInit(TIM_TypeDef* TIMx);
|
||||
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||
void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
||||
void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
||||
void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
||||
void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
|
||||
void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
|
||||
void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
|
||||
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||
void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
|
||||
void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
|
||||
void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
|
||||
void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
|
||||
void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
|
||||
void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
|
||||
void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
|
||||
void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
|
||||
void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
|
||||
uint16_t TIM_ICPolarity, uint16_t ICFilter);
|
||||
void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
|
||||
uint16_t ExtTRGFilter);
|
||||
void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
|
||||
uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
|
||||
void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
|
||||
uint16_t ExtTRGFilter);
|
||||
void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
|
||||
void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
|
||||
void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
|
||||
void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
|
||||
uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
||||
void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
||||
void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
||||
void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
||||
void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
|
||||
void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
||||
void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
||||
void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
||||
void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
|
||||
void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
||||
void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
||||
void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
||||
void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
|
||||
void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
||||
void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
||||
void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
||||
void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
|
||||
void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
||||
void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
||||
void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
||||
void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
|
||||
void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
|
||||
void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
|
||||
void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
|
||||
void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
|
||||
void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
|
||||
void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
|
||||
void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
|
||||
void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
|
||||
void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
|
||||
void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);
|
||||
void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
|
||||
void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);
|
||||
void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);
|
||||
void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);
|
||||
void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
||||
void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
||||
void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
||||
void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
|
||||
void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
|
||||
uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
|
||||
uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
|
||||
uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
|
||||
uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);
|
||||
uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);
|
||||
uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
|
||||
void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear);
|
||||
void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);
|
||||
FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
|
||||
void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
|
||||
ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
|
||||
void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /*__STM32L1xx_TIM_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,399 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_USART_H
|
||||
#define __STM32L1xx_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USART
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief USART Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
||||
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||
|
||||
uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USART_Word_Length */
|
||||
|
||||
uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||
This parameter can be a value of @ref USART_Stop_Bits */
|
||||
|
||||
uint16_t USART_Parity; /*!< Specifies the parity mode.
|
||||
This parameter can be a value of @ref USART_Parity
|
||||
@note When parity is enabled, the computed parity is inserted
|
||||
at the MSB position of the transmitted data (9th bit when
|
||||
the word length is set to 9 data bits; 8th bit when the
|
||||
word length is set to 8 data bits). */
|
||||
|
||||
uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Mode */
|
||||
|
||||
uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
||||
or disabled.
|
||||
This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
||||
} USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART Clock Init Structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||
This parameter can be a value of @ref USART_Clock */
|
||||
|
||||
uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
||||
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||
|
||||
uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
||||
This parameter can be a value of @ref USART_Clock_Phase */
|
||||
|
||||
uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit */
|
||||
} USART_ClockInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||
((PERIPH) == USART2) || \
|
||||
((PERIPH) == USART3))
|
||||
|
||||
/** @defgroup USART_Word_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WordLength_8b ((uint16_t)0x0000)
|
||||
#define USART_WordLength_9b ((uint16_t)0x1000)
|
||||
|
||||
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
||||
((LENGTH) == USART_WordLength_9b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Stop_Bits
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_StopBits_1 ((uint16_t)0x0000)
|
||||
#define USART_StopBits_0_5 ((uint16_t)0x1000)
|
||||
#define USART_StopBits_2 ((uint16_t)0x2000)
|
||||
#define USART_StopBits_1_5 ((uint16_t)0x3000)
|
||||
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
||||
((STOPBITS) == USART_StopBits_0_5) || \
|
||||
((STOPBITS) == USART_StopBits_2) || \
|
||||
((STOPBITS) == USART_StopBits_1_5))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Parity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Parity_No ((uint16_t)0x0000)
|
||||
#define USART_Parity_Even ((uint16_t)0x0400)
|
||||
#define USART_Parity_Odd ((uint16_t)0x0600)
|
||||
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
||||
((PARITY) == USART_Parity_Even) || \
|
||||
((PARITY) == USART_Parity_Odd))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_Mode_Rx ((uint16_t)0x0004)
|
||||
#define USART_Mode_Tx ((uint16_t)0x0008)
|
||||
#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Hardware_Flow_Control
|
||||
* @{
|
||||
*/
|
||||
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
||||
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
||||
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
||||
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
||||
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||
(((CONTROL) == USART_HardwareFlowControl_None) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
||||
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_Clock_Disable ((uint16_t)0x0000)
|
||||
#define USART_Clock_Enable ((uint16_t)0x0800)
|
||||
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
||||
((CLOCK) == USART_Clock_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Polarity
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPOL_Low ((uint16_t)0x0000)
|
||||
#define USART_CPOL_High ((uint16_t)0x0400)
|
||||
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Clock_Phase
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_CPHA_1Edge ((uint16_t)0x0000)
|
||||
#define USART_CPHA_2Edge ((uint16_t)0x0200)
|
||||
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Last_Bit
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LastBit_Disable ((uint16_t)0x0000)
|
||||
#define USART_LastBit_Enable ((uint16_t)0x0100)
|
||||
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
||||
((LASTBIT) == USART_LastBit_Enable))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Interrupt_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028)
|
||||
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||
#define USART_IT_TC ((uint16_t)0x0626)
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||
#define USART_IT_LBD ((uint16_t)0x0846)
|
||||
#define USART_IT_CTS ((uint16_t)0x096A)
|
||||
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||
#define USART_IT_ORE ((uint16_t)0x0360)
|
||||
#define USART_IT_NE ((uint16_t)0x0260)
|
||||
#define USART_IT_FE ((uint16_t)0x0160)
|
||||
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
||||
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
||||
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
||||
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_DMA_Requests
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_DMAReq_Tx ((uint16_t)0x0080)
|
||||
#define USART_DMAReq_Rx ((uint16_t)0x0040)
|
||||
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_WakeUp_methods
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
||||
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
||||
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
||||
((WAKEUP) == USART_WakeUp_AddressMark))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_LIN_Break_Detection_Length
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
||||
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
||||
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
||||
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
||||
((LENGTH) == USART_LINBreakDetectLength_11b))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_IrDA_Low_Power
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
||||
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
||||
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
||||
((MODE) == USART_IrDAMode_Normal))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define USART_FLAG_CTS ((uint16_t)0x0200)
|
||||
#define USART_FLAG_LBD ((uint16_t)0x0100)
|
||||
#define USART_FLAG_TXE ((uint16_t)0x0080)
|
||||
#define USART_FLAG_TC ((uint16_t)0x0040)
|
||||
#define USART_FLAG_RXNE ((uint16_t)0x0020)
|
||||
#define USART_FLAG_IDLE ((uint16_t)0x0010)
|
||||
#define USART_FLAG_ORE ((uint16_t)0x0008)
|
||||
#define USART_FLAG_NE ((uint16_t)0x0004)
|
||||
#define USART_FLAG_FE ((uint16_t)0x0002)
|
||||
#define USART_FLAG_PE ((uint16_t)0x0001)
|
||||
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
||||
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
||||
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
||||
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
||||
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
||||
|
||||
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||
|
||||
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x003D0901))
|
||||
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void USART_DeInit(USART_TypeDef* USARTx);
|
||||
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
||||
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
||||
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
||||
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
||||
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
||||
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
||||
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||
void USART_SendBreak(USART_TypeDef* USARTx);
|
||||
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
||||
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
||||
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
||||
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_USART_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,223 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file misc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides all the miscellaneous firmware functions (add-on
|
||||
* to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "misc.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MISC
|
||||
* @brief MISC driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup MISC_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configures the priority grouping: pre-emption priority and subpriority.
|
||||
* @param NVIC_PriorityGroup: specifies the priority grouping bits length.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
|
||||
* 4 bits for subpriority
|
||||
* @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
|
||||
* 3 bits for subpriority
|
||||
* @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
|
||||
* 2 bits for subpriority
|
||||
* @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
|
||||
* 1 bits for subpriority
|
||||
* @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
|
||||
* 0 bits for subpriority
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
|
||||
|
||||
/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
|
||||
SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the NVIC peripheral according to the specified
|
||||
* parameters in the NVIC_InitStruct.
|
||||
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
|
||||
* the configuration information for the specified NVIC peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
|
||||
{
|
||||
uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
|
||||
assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
|
||||
assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
|
||||
|
||||
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
|
||||
{
|
||||
/* Compute the Corresponding IRQ Priority --------------------------------*/
|
||||
tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
|
||||
tmppre = (0x4 - tmppriority);
|
||||
tmpsub = tmpsub >> tmppriority;
|
||||
|
||||
tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
|
||||
tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
|
||||
tmppriority = tmppriority << 0x04;
|
||||
|
||||
NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
|
||||
|
||||
/* Enable the Selected IRQ Channels --------------------------------------*/
|
||||
NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
||||
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Selected IRQ Channels -------------------------------------*/
|
||||
NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
||||
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the vector table location and Offset.
|
||||
* @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg NVIC_VectTab_RAM
|
||||
* @arg NVIC_VectTab_FLASH
|
||||
* @param Offset: Vector Table base offset field. This value must be a multiple of 0x100.
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
|
||||
assert_param(IS_NVIC_OFFSET(Offset));
|
||||
|
||||
SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the condition for the system to enter low power mode.
|
||||
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg NVIC_LP_SEVONPEND
|
||||
* @arg NVIC_LP_SLEEPDEEP
|
||||
* @arg NVIC_LP_SLEEPONEXIT
|
||||
* @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_NVIC_LP(LowPowerMode));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
SCB->SCR |= LowPowerMode;
|
||||
}
|
||||
else
|
||||
{
|
||||
SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the SysTick clock source.
|
||||
* @param SysTick_CLKSource: specifies the SysTick clock source.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
|
||||
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
|
||||
* @retval None
|
||||
*/
|
||||
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
|
||||
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
|
||||
{
|
||||
SysTick->CTRL |= SysTick_CLKSource_HCLK;
|
||||
}
|
||||
else
|
||||
{
|
||||
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,437 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides all the GPIO firmware functions.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_gpio.h"
|
||||
#include "stm32l1xx_rcc.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO
|
||||
* @brief GPIO driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the GPIOx peripheral registers to their default reset
|
||||
* values.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
if(GPIOx == GPIOA)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOA, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOA, DISABLE);
|
||||
}
|
||||
else if(GPIOx == GPIOB)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOB, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOB, DISABLE);
|
||||
}
|
||||
else if(GPIOx == GPIOC)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOC, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOC, DISABLE);
|
||||
}
|
||||
else if(GPIOx == GPIOD)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOD, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOD, DISABLE);
|
||||
}
|
||||
else if(GPIOx == GPIOE)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOE, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOE, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if(GPIOx == GPIOH)
|
||||
{
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOH, ENABLE);
|
||||
RCC_AHBPeriphResetCmd(RCC_AHBPeriph_GPIOH, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the GPIOx peripheral according to the specified
|
||||
* parameters in the GPIO_InitStruct.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
|
||||
* contains the configuration information for the specified GPIO
|
||||
* peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
|
||||
assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
|
||||
|
||||
/* -------------------------Configure the port pins---------------- */
|
||||
/*-- GPIO Mode Configuration --*/
|
||||
for (pinpos = 0x00; pinpos < 0x10; pinpos++)
|
||||
{
|
||||
pos = ((uint32_t)0x01) << pinpos;
|
||||
|
||||
/* Get the port pins position */
|
||||
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
|
||||
|
||||
if (currentpin == pos)
|
||||
{
|
||||
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
|
||||
|
||||
GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
|
||||
|
||||
if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
|
||||
{
|
||||
/*Check Speed mode parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
|
||||
/*Speed mode configuration */
|
||||
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
|
||||
GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
|
||||
|
||||
/*Check Output mode parameters */
|
||||
assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
|
||||
|
||||
/* Output mode configuartion*/
|
||||
GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ;
|
||||
GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
|
||||
}
|
||||
|
||||
/*Pull-up Pull down resistor configuration*/
|
||||
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
|
||||
GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each GPIO_InitStruct member with its default value.
|
||||
* @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
|
||||
* be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
/* Reset GPIO init structure parameters values */
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
||||
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_400KHz;
|
||||
GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified input port pin.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The input port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO input data port.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @retval GPIO input data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->IDR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified output data port bit.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: Specifies the port bit to read.
|
||||
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
||||
* @retval The output port pin value.
|
||||
*/
|
||||
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified GPIO output data port.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @retval GPIO output data port value.
|
||||
*/
|
||||
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
return ((uint16_t)GPIOx->ODR);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the selected data port bits.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BSRRL = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the selected data port bits.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
GPIOx->BSRRH = GPIO_Pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets or clears the selected data port bit.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
|
||||
* @param BitVal: specifies the value to be written to the selected bit.
|
||||
* This parameter can be one of the BitAction enum values:
|
||||
* @arg Bit_RESET: to clear the port pin
|
||||
* @arg Bit_SET: to set the port pin
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
if (BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->BSRRL = GPIO_Pin;
|
||||
}
|
||||
else
|
||||
{
|
||||
GPIOx->BSRRH = GPIO_Pin ;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes data to the specified GPIO data port.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param PortVal: specifies the value to be written to the port output data
|
||||
* register.
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
GPIOx->ODR = PortVal;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t tmp = 0x00010000;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
tmp |= GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Reset LCKK bit */
|
||||
GPIOx->LCKR = GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
/* Read LCKK bit*/
|
||||
tmp = GPIOx->LCKR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the mapping of the specified pin.
|
||||
* @param GPIOx: where x can be (A, B, C, D, E or H) to select the GPIO peripheral.
|
||||
* @param GPIO_PinSource: specifies the pin for the Alternate function.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||||
* @param GPIO_AFSelection: selects the pin to used as Alternat function.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPIO_AF_RTC_50Hz
|
||||
* @arg GPIO_AF_MCO
|
||||
* @arg GPIO_AF_TAMPER
|
||||
* @arg GPIO_AF_WKUP
|
||||
* @arg GPIO_AF_SWJ
|
||||
* @arg GPIO_AF_TRACE
|
||||
* @arg GPIO_AF_TIMESTAMP
|
||||
* @arg GPIO_AF_CALIB
|
||||
* @arg GPIO_AF_TIM2
|
||||
* @arg GPIO_AF_TIM3
|
||||
* @arg GPIO_AF_TIM4
|
||||
* @arg GPIO_AF_TIM9
|
||||
* @arg GPIO_AF_TIM10
|
||||
* @arg GPIO_AF_TIM11
|
||||
* @arg GPIO_AF_I2C1
|
||||
* @arg GPIO_AF_I2C2
|
||||
* @arg GPIO_AF_SPI1
|
||||
* @arg GPIO_AF_SPI2
|
||||
* @arg GPIO_AF_USART1
|
||||
* @arg GPIO_AF_USART2
|
||||
* @arg GPIO_AF_USART3
|
||||
* @arg GPIO_AF_USB
|
||||
* @arg GPIO_AF_LCD
|
||||
* @arg GPIO_AF_RI
|
||||
* @arg GPIO_AF_EVENTOUT
|
||||
* @retval None
|
||||
*/
|
||||
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
|
||||
{
|
||||
uint32_t temp = 0x00;
|
||||
uint32_t temp_2 = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
assert_param(IS_GPIO_AF(GPIO_AF));
|
||||
|
||||
temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
|
||||
GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
|
||||
temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
|
||||
GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,464 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_pwr.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides all the PWR firmware functions.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_pwr.h"
|
||||
#include "stm32l1xx_rcc.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR
|
||||
* @brief PWR driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* --------- PWR registers bit address in the alias region ---------- */
|
||||
#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
|
||||
|
||||
/* --- CR Register ---*/
|
||||
|
||||
/* Alias word address of DBP bit */
|
||||
#define CR_OFFSET (PWR_OFFSET + 0x00)
|
||||
#define DBP_BitNumber 0x08
|
||||
#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
|
||||
|
||||
/* Alias word address of PVDE bit */
|
||||
#define PVDE_BitNumber 0x04
|
||||
#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
|
||||
|
||||
/* Alias word address of ULP bit */
|
||||
#define ULP_BitNumber 0x09
|
||||
#define CR_ULP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ULP_BitNumber * 4))
|
||||
|
||||
/* Alias word address of FWU bit */
|
||||
#define FWU_BitNumber 0x0A
|
||||
#define CR_FWU_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FWU_BitNumber * 4))
|
||||
|
||||
/* --- CSR Register ---*/
|
||||
|
||||
/* Alias word address of EWUP bit */
|
||||
#define CSR_OFFSET (PWR_OFFSET + 0x04)
|
||||
#define EWUP_BitNumber 0x08
|
||||
#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
|
||||
|
||||
/* ------------------ PWR registers bit mask ------------------------ */
|
||||
|
||||
/* CR register bit mask */
|
||||
#define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
|
||||
#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
|
||||
#define CR_VOS_MASK ((uint32_t)0xFFFFE7FF)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the PWR peripheral registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_DeInit(void)
|
||||
{
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables access to the RTC and backup registers.
|
||||
* @param NewState: new state of the access to the RTC and backup registers.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_RTCAccessCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Power Voltage Detector(PVD).
|
||||
* @param NewState: new state of the PVD.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_PVDCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
|
||||
* @param PWR_PVDLevel: specifies the PVD detection level
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_PVDLevel_0: PVD detection level set to 1.9V
|
||||
* @arg PWR_PVDLevel_1: PVD detection level set to 2.1V
|
||||
* @arg PWR_PVDLevel_2: PVD detection level set to 2.3V
|
||||
* @arg PWR_PVDLevel_3: PVD detection level set to 2.5V
|
||||
* @arg PWR_PVDLevel_4: PVD detection level set to 2.7V
|
||||
* @arg PWR_PVDLevel_5: PVD detection level set to 2.9V
|
||||
* @arg PWR_PVDLevel_6: PVD detection level set to 3.1V
|
||||
* @arg PWR_PVDLevel_7: External input analog voltage (Compare internally to VREFINT)
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
|
||||
|
||||
tmpreg = PWR->CR;
|
||||
|
||||
/* Clear PLS[7:5] bits */
|
||||
tmpreg &= CR_PLS_MASK;
|
||||
|
||||
/* Set PLS[7:5] bits according to PWR_PVDLevel value */
|
||||
tmpreg |= PWR_PVDLevel;
|
||||
|
||||
/* Store the new value */
|
||||
PWR->CR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the WakeUp Pin functionality.
|
||||
* @param PWR_WakeUpPin: specifies the WakeUpPin.
|
||||
* This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3.
|
||||
* @param NewState: new state of the WakeUp Pin functionality.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
|
||||
{
|
||||
__IO uint32_t tmp = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
|
||||
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
tmp = CSR_EWUP_BB + PWR_WakeUpPin;
|
||||
|
||||
*(__IO uint32_t *) (tmp) = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Fast WakeUp from Ultra Low Power mode.
|
||||
* @param NewState: new state of the Fast WakeUp functionality.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_FastWakeUpCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) CR_FWU_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the Ultra Low Power mode.
|
||||
* @param NewState: new state of the Ultra Low Power mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_UltraLowPowerCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
*(__IO uint32_t *) CR_ULP_BB = (uint32_t)NewState;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the voltage scaling range.
|
||||
* @param PWR_VoltageScaling: specifies the voltage scaling range.
|
||||
* This parameter can be:
|
||||
* @arg PWR_VoltageScaling_Range1: Voltage Scaling Range 1
|
||||
* @arg PWR_VoltageScaling_Range2: Voltage Scaling Range 2
|
||||
* @arg PWR_VoltageScaling_Range3: Voltage Scaling Range 3
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_VoltageScalingConfig(uint32_t PWR_VoltageScaling)
|
||||
{
|
||||
uint32_t tmp = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(PWR_VoltageScaling));
|
||||
|
||||
tmp = PWR->CR;
|
||||
|
||||
tmp &= CR_VOS_MASK;
|
||||
tmp |= PWR_VoltageScaling;
|
||||
|
||||
PWR->CR = tmp & 0xFFFFFFF3;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enters/Exits the Low Power Run mode.
|
||||
* @param NewState: new state of the Low Power Run mode.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_EnterLowPowerRunMode(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
PWR->CR |= PWR_CR_LPSDSR;
|
||||
PWR->CR |= PWR_CR_LPRUN;
|
||||
}
|
||||
else
|
||||
{
|
||||
PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_LPRUN);
|
||||
PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_LPSDSR);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enters Sleep mode.
|
||||
* @param PWR_Regulator: specifies the regulator state in Sleep mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_Regulator_ON: Sleep mode with regulator ON
|
||||
* @arg PWR_Regulator_LowPower: Sleep mode with regulator in low power mode
|
||||
* @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
|
||||
* @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_EnterSleepMode(uint32_t PWR_Regulator, uint8_t PWR_SLEEPEntry)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_REGULATOR(PWR_Regulator));
|
||||
|
||||
assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
|
||||
|
||||
/* Select the regulator state in Sleep mode ---------------------------------*/
|
||||
tmpreg = PWR->CR;
|
||||
|
||||
/* Clear PDDS and LPDSR bits */
|
||||
tmpreg &= CR_DS_MASK;
|
||||
|
||||
/* Set LPDSR bit according to PWR_Regulator value */
|
||||
tmpreg |= PWR_Regulator;
|
||||
|
||||
/* Store the new value */
|
||||
PWR->CR = tmpreg;
|
||||
|
||||
/* Clear SLEEPDEEP bit of Cortex System Control Register */
|
||||
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
|
||||
|
||||
/* Select SLEEP mode entry -------------------------------------------------*/
|
||||
if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
|
||||
{
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Request Wait For Event */
|
||||
__WFE();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enters STOP mode.
|
||||
* @param PWR_Regulator: specifies the regulator state in STOP mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_Regulator_ON: STOP mode with regulator ON
|
||||
* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
|
||||
* @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
|
||||
* @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_REGULATOR(PWR_Regulator));
|
||||
assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
|
||||
|
||||
/* Select the regulator state in STOP mode ---------------------------------*/
|
||||
tmpreg = PWR->CR;
|
||||
/* Clear PDDS and LPDSR bits */
|
||||
tmpreg &= CR_DS_MASK;
|
||||
|
||||
/* Set LPDSR bit according to PWR_Regulator value */
|
||||
tmpreg |= PWR_Regulator;
|
||||
|
||||
/* Store the new value */
|
||||
PWR->CR = tmpreg;
|
||||
|
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP;
|
||||
|
||||
/* Select STOP mode entry --------------------------------------------------*/
|
||||
if(PWR_STOPEntry == PWR_STOPEntry_WFI)
|
||||
{
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Request Wait For Event */
|
||||
__WFE();
|
||||
}
|
||||
/* Reset SLEEPDEEP bit of Cortex System Control Register */
|
||||
SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enters STANDBY mode.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_EnterSTANDBYMode(void)
|
||||
{
|
||||
/* Clear Wake-up flag */
|
||||
PWR->CR |= PWR_CR_CWUF;
|
||||
|
||||
/* Select STANDBY mode */
|
||||
PWR->CR |= PWR_CR_PDDS;
|
||||
|
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP;
|
||||
|
||||
/* This option is used to ensure that store operations are completed */
|
||||
#if defined ( __CC_ARM )
|
||||
__force_stores();
|
||||
#endif
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified PWR flag is set or not.
|
||||
* @param PWR_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_FLAG_WU: Wake Up flag
|
||||
* @arg PWR_FLAG_SB: StandBy flag
|
||||
* @arg PWR_FLAG_PVDO: PVD Output
|
||||
* @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag
|
||||
* @arg PWR_FLAG_VOS: Voltage Scaling select flag
|
||||
* @arg PWR_FLAG_REGLP: Regulator LP flag
|
||||
* @retval The new state of PWR_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
|
||||
|
||||
if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
|
||||
{
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the flag status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the PWR's pending flags.
|
||||
* @param PWR_FLAG: specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_FLAG_WU: Wake Up flag
|
||||
* @arg PWR_FLAG_SB: StandBy flag
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_ClearFlag(uint32_t PWR_FLAG)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
|
||||
|
||||
PWR->CR |= PWR_FLAG << 2;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,641 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides all the SPI firmware functions.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_spi.h"
|
||||
#include "stm32l1xx_rcc.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI
|
||||
* @brief SPI driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup SPI_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* SPI registers Masks */
|
||||
#define CR1_CLEAR_MASK ((uint16_t)0x3040)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the SPIx peripheral registers to their default
|
||||
* reset values.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DeInit(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
if (SPIx == SPI1)
|
||||
{
|
||||
/* Enable SPI1 reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
|
||||
/* Release SPI1 from reset state */
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (SPIx == SPI2)
|
||||
{
|
||||
/* Enable SPI2 reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
/* Release SPI2 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPIx peripheral according to the specified
|
||||
* parameters in the SPI_InitStruct.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
|
||||
* contains the configuration information for the specified SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
uint16_t tmpreg = 0;
|
||||
|
||||
/* check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Check the SPI parameters */
|
||||
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
|
||||
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
|
||||
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
|
||||
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
|
||||
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
|
||||
|
||||
/*---------------------------- SPIx CR1 Configuration ------------------------*/
|
||||
/* Get the SPIx CR1 value */
|
||||
tmpreg = SPIx->CR1;
|
||||
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
|
||||
tmpreg &= CR1_CLEAR_MASK;
|
||||
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
|
||||
master/salve mode, CPOL and CPHA */
|
||||
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
|
||||
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
|
||||
/* Set LSBFirst bit according to SPI_FirstBit value */
|
||||
/* Set BR bits according to SPI_BaudRatePrescaler value */
|
||||
/* Set CPOL bit according to SPI_CPOL value */
|
||||
/* Set CPHA bit according to SPI_CPHA value */
|
||||
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
|
||||
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
|
||||
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
|
||||
/* Write to SPIx CR1 */
|
||||
SPIx->CR1 = tmpreg;
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
|
||||
/* Write to SPIx CRCPOLY */
|
||||
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Fills each SPI_InitStruct member with its default value.
|
||||
* @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
|
||||
{
|
||||
/*--------------- Reset SPI init structure parameters values -----------------*/
|
||||
/* Initialize the SPI_Direction member */
|
||||
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
|
||||
/* initialize the SPI_Mode member */
|
||||
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
|
||||
/* initialize the SPI_DataSize member */
|
||||
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
|
||||
/* Initialize the SPI_CPOL member */
|
||||
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
|
||||
/* Initialize the SPI_CPHA member */
|
||||
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
|
||||
/* Initialize the SPI_NSS member */
|
||||
SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
|
||||
/* Initialize the SPI_BaudRatePrescaler member */
|
||||
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
|
||||
/* Initialize the SPI_FirstBit member */
|
||||
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
|
||||
/* Initialize the SPI_CRCPolynomial member */
|
||||
SPI_InitStruct->SPI_CRCPolynomial = 7;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI peripheral.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx peripheral.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI peripheral */
|
||||
SPIx->CR1 |= SPI_CR1_SPE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI peripheral */
|
||||
SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified SPI interrupts.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @param SPI_IT: specifies the SPI interrupt source to be enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt mask
|
||||
* @arg SPI_IT_RXNE: Rx buffer not empty interrupt mask
|
||||
* @arg SPI_IT_ERR: Error interrupt mask
|
||||
* @param NewState: new state of the specified SPI interrupt.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState)
|
||||
{
|
||||
uint16_t itpos = 0, itmask = 0 ;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_CONFIG_IT(SPI_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = SPI_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = (uint16_t)1 << (uint16_t)itpos;
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI interrupt */
|
||||
SPIx->CR2 |= itmask;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI interrupt */
|
||||
SPIx->CR2 &= (uint16_t)~itmask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SPIx DMA interface.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @param SPI_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg SPI_DMAReq_Tx: Tx buffer DMA transfer request
|
||||
* @arg SPI_DMAReq_Rx: Rx buffer DMA transfer request
|
||||
* @param NewState: new state of the selected SPI DMA transfer request.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_SPI_DMAREQ(SPI_DMAReq));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI DMA requests */
|
||||
SPIx->CR2 |= SPI_DMAReq;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI DMA requests */
|
||||
SPIx->CR2 &= (uint16_t)~SPI_DMAReq;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmits a Data through the SPIx peripheral.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @param Data : Data to be transmitted.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Write in the DR register the data to be sent */
|
||||
SPIx->DR = Data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the most recent received data by the SPIx peripheral.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @retval The value of the received data.
|
||||
*/
|
||||
uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the data in the DR register */
|
||||
return SPIx->DR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures internally by software the NSS pin for the selected SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
|
||||
* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
|
||||
if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
|
||||
{
|
||||
/* Set NSS pin internally by software */
|
||||
SPIx->CR1 |= SPI_NSSInternalSoft_Set;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Reset NSS pin internally by software */
|
||||
SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the SS output for the selected SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx SS output.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI SS output */
|
||||
SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI SS output */
|
||||
SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the data size for the selected SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param SPI_DataSize: specifies the SPI data size.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_DataSize_16b: Set data frame format to 16bit
|
||||
* @arg SPI_DataSize_8b: Set data frame format to 8bit
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DATASIZE(SPI_DataSize));
|
||||
/* Clear DFF bit */
|
||||
SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
|
||||
/* Set new DFF bit value */
|
||||
SPIx->CR1 |= SPI_DataSize;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmit the SPIx CRC value.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Enable the selected SPI CRC transmission */
|
||||
SPIx->CR1 |= SPI_CR1_CRCNEXT;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the CRC value calculation of the transfered bytes.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param NewState: new state of the SPIx CRC value calculation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected SPI CRC calculation */
|
||||
SPIx->CR1 |= SPI_CR1_CRCEN;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the selected SPI CRC calculation */
|
||||
SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the transmit or the receive CRC register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param SPI_CRC: specifies the CRC register to be read.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_CRC_Tx: Selects Tx CRC register
|
||||
* @arg SPI_CRC_Rx: Selects Rx CRC register
|
||||
* @retval The selected CRC register value..
|
||||
*/
|
||||
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
|
||||
{
|
||||
uint16_t crcreg = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CRC(SPI_CRC));
|
||||
if (SPI_CRC != SPI_CRC_Rx)
|
||||
{
|
||||
/* Get the Tx CRC register */
|
||||
crcreg = SPIx->TXCRCR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Get the Rx CRC register */
|
||||
crcreg = SPIx->RXCRCR;
|
||||
}
|
||||
/* Return the selected CRC register */
|
||||
return crcreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the CRC Polynomial register value for the specified SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @retval The CRC Polynomial register value.
|
||||
*/
|
||||
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
|
||||
/* Return the CRC polynomial register */
|
||||
return SPIx->CRCPR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
|
||||
* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
|
||||
* @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_Direction_Tx: Selects Tx transmission direction
|
||||
* @arg SPI_Direction_Rx: Selects Rx receive direction
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_DIRECTION(SPI_Direction));
|
||||
if (SPI_Direction == SPI_Direction_Tx)
|
||||
{
|
||||
/* Set the Tx only mode */
|
||||
SPIx->CR1 |= SPI_Direction_Tx;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Rx only mode */
|
||||
SPIx->CR1 &= SPI_Direction_Rx;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI flag is set or not.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @param SPI_FLAG: specifies the SPI flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag.
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag.
|
||||
* @arg SPI_FLAG_BSY: Busy flag.
|
||||
* @arg SPI_FLAG_OVR: Overrun flag.
|
||||
* @arg SPI_FLAG_MODF: Mode Fault flag.
|
||||
* @arg SPI_FLAG_CRCERR: CRC Error flag.
|
||||
* @retval The new state of SPI_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_GET_FLAG(SPI_FLAG));
|
||||
/* Check the status of the specified SPI flag */
|
||||
if ((SPIx->SR & SPI_FLAG) != (uint16_t)RESET)
|
||||
{
|
||||
/* SPI_FLAG is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_FLAG is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_FLAG status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) flag.
|
||||
* @param SPIx: where x can be 1 or 2 in SPI mode
|
||||
* @param SPI_FLAG: specifies the SPI flag to clear.
|
||||
* This function clears only CRCERR flag.
|
||||
* @note
|
||||
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
||||
* operation to SPI_DR register (SPI_ReceiveData()) followed by a read
|
||||
* operation to SPI_SR register (SPI_GetFlagStatus()).
|
||||
* - UDR (UnderRun error) flag is cleared by a read operation to
|
||||
* SPI_SR register (SPI_GetFlagStatus()).
|
||||
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
||||
* operation to SPI_SR register (SPI_GetFlagStatus()) followed by a
|
||||
* write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CLEAR_FLAG(SPI_FLAG));
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) flag */
|
||||
SPIx->SR = (uint16_t)~SPI_FLAG;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified SPI interrupt has occurred or not.
|
||||
* @param SPIx: where x can be
|
||||
* - 1 or 2 in SPI mode
|
||||
* @param SPI_IT: specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Transmit buffer empty interrupt.
|
||||
* @arg SPI_IT_RXNE: Receive buffer not empty interrupt.
|
||||
* @arg SPI_IT_OVR: Overrun interrupt.
|
||||
* @arg SPI_IT_MODF: Mode Fault interrupt.
|
||||
* @arg SPI_IT_CRCERR: CRC Error interrupt.
|
||||
* @retval The new state of SPI_IT (SET or RESET).
|
||||
*/
|
||||
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
uint16_t itpos = 0, itmask = 0, enablestatus = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_GET_IT(SPI_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = 0x01 << (SPI_IT & 0x0F);
|
||||
|
||||
/* Get the SPI IT mask */
|
||||
itmask = SPI_IT >> 4;
|
||||
|
||||
/* Set the IT mask */
|
||||
itmask = 0x01 << itmask;
|
||||
|
||||
/* Get the SPI_IT enable bit status */
|
||||
enablestatus = (SPIx->CR2 & itmask) ;
|
||||
|
||||
/* Check the status of the specified SPI interrupt */
|
||||
if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
|
||||
{
|
||||
/* SPI_IT is set */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* SPI_IT is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
/* Return the SPI_IT status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
|
||||
* @param SPIx: where x can be
|
||||
* - 1 or 2 in SPI mode
|
||||
* @param SPI_IT: specifies the SPI interrupt pending bit to clear.
|
||||
* This function clears only CRCERR intetrrupt pending bit.
|
||||
* @note
|
||||
* - OVR (OverRun Error) interrupt pending bit is cleared by software
|
||||
* sequence: a read operation to SPI_DR register (SPI_ReceiveData())
|
||||
* followed by a read operation to SPI_SR register (SPI_GetITStatus()).
|
||||
* - UDR (UnderRun Error) interrupt pending bit is cleared by a read
|
||||
* operation to SPI_SR register (SPI_GetITStatus()).
|
||||
* - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
|
||||
* a read/write operation to SPI_SR register (SPI_GetITStatus())
|
||||
* followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
|
||||
* the SPI).
|
||||
* @retval None
|
||||
*/
|
||||
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT)
|
||||
{
|
||||
uint16_t itpos = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_PERIPH(SPIx));
|
||||
assert_param(IS_SPI_CLEAR_IT(SPI_IT));
|
||||
|
||||
/* Get the SPI IT index */
|
||||
itpos = 0x01 << (SPI_IT & 0x0F);
|
||||
|
||||
/* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
|
||||
SPIx->SR = (uint16_t)~itpos;
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,494 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_syscfg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file provides all the SYSCFG and RI firmware functions.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_syscfg.h"
|
||||
#include "stm32l1xx_rcc.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG
|
||||
* @brief SYSCFG driver modules
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RI_ICR_RESET_VALUE ((uint32_t)0x00000000) /*!< ICR Reset value */
|
||||
#define RI_ASCR1_RESET_VALUE ((uint32_t)0x00000000) /*!< ASCR1 Reset value */
|
||||
#define RI_ASCR2_RESET_VALUE ((uint32_t)0x00000000) /*!< ASCR2 Reset value */
|
||||
#define RI_HYSCR1_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR1 Reset value */
|
||||
#define RI_HYSCR2_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR2 Reset value */
|
||||
#define RI_HYSCR3_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR3 Reset value */
|
||||
|
||||
#define TIM_SELECT_MASK ((uint32_t)0xFFFCFFFF) /*!< TIM select mask */
|
||||
#define IC_ROUTING_MASK ((uint32_t)0x0000000F) /*!< Input Capture routing mask */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the syscfg registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
* @ Note: MEMRMP bits are not reset by APB2 reset.
|
||||
*/
|
||||
void SYSCFG_DeInit(void)
|
||||
{
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
|
||||
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Changes the mapping of the specified pin.
|
||||
* @param SYSCFG_Memory: selects the memory remapping.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
|
||||
* @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
|
||||
* @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
|
||||
SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Control the internal pull-up on USB DP line.
|
||||
* @param NewState: New state of the switch control mode.
|
||||
* This parameter can be ENABLE: Connect internal pull-up on USB DP line.
|
||||
* or DISABLE: Disconnect internal pull-up on USB DP line.
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_USBPuCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Connect internal pull-up on USB DP line */
|
||||
SYSCFG->PMC |= (uint32_t) SYSCFG_PMC_USB_PU;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disconnect internal pull-up on USB DP line */
|
||||
SYSCFG->PMC &= (uint32_t)(~SYSCFG_PMC_USB_PU);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Selects the GPIO pin used as EXTI Line.
|
||||
* @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source
|
||||
* for EXTI lines where x can be (A, B, C, D, E or H).
|
||||
* @param EXTI_PinSourcex: specifies the EXTI line to be configured.
|
||||
* This parameter can be EXTI_PinSourcex where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
|
||||
{
|
||||
uint32_t tmp = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
|
||||
assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
|
||||
|
||||
tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
|
||||
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
|
||||
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the RI registers to their default reset values.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_RIDeInit(void)
|
||||
{
|
||||
RI->ICR = RI_ICR_RESET_VALUE; /*!< Set RI->ICR to reset value */
|
||||
RI->ASCR1 = RI_ASCR1_RESET_VALUE; /*!< Set RI->ASCR1 to reset value */
|
||||
RI->ASCR2 = RI_ASCR2_RESET_VALUE; /*!< Set RI->ASCR2 to reset value */
|
||||
RI->HYSCR1 = RI_HYSCR1_RESET_VALUE; /*!< Set RI->HYSCR1 to reset value */
|
||||
RI->HYSCR2 = RI_HYSCR2_RESET_VALUE; /*!< Set RI->HYSCR2 to reset value */
|
||||
RI->HYSCR3 = RI_HYSCR3_RESET_VALUE; /*!< Set RI->HYSCR3 to reset value */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to select which Timer to be routed.
|
||||
* @param TIM_Select: Timer select.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_Select_None : No timer selected
|
||||
* @arg TIM_Select_TIM2 : Timer 2 selected
|
||||
* @arg TIM_Select_TIM3 : Timer 3 selected
|
||||
* @arg TIM_Select_TIM4 : Timer 4 selected
|
||||
* @retval None.
|
||||
*/
|
||||
void SYSCFG_RITIMSelect(uint32_t TIM_Select)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RI_TIM(TIM_Select));
|
||||
|
||||
/* Get the old register value */
|
||||
tmpreg = RI->ICR;
|
||||
|
||||
/* Clear the TIMx select bits */
|
||||
tmpreg &= TIM_SELECT_MASK;
|
||||
|
||||
/* Select the Timer */
|
||||
tmpreg |= (TIM_Select);
|
||||
|
||||
/* Write to RI->ICR register */
|
||||
RI->ICR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to select which Timer Input Capture
|
||||
* to be routed to a selected pin.
|
||||
* @param RI_InputCapture selects which input capture to be routed.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RI_InputCapture_IC1: Input capture 1 is slected.
|
||||
* @arg RI_InputCapture_IC2: Input capture 2 is slected.
|
||||
* @arg RI_InputCapture_IC3: Input capture 3 is slected.
|
||||
* @arg RI_InputCapture_IC4: Input capture 4 is slected.
|
||||
* @param RI_InputCaptureRouting: selects which pin to be routed to Input Capture.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RI_InputCaptureRouting_0 to RI_InputCaptureRouting_15
|
||||
* @Note Input capture selection bits are not reset by this function.
|
||||
* @retval None.
|
||||
*/
|
||||
void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RI_INPUTCAPTURE(RI_InputCapture));
|
||||
assert_param(IS_RI_INPUTCAPTURE_ROUTING(RI_InputCaptureRouting));
|
||||
|
||||
/* Get the old register value */
|
||||
tmpreg = RI->ICR;
|
||||
|
||||
/* Select input captures to be routed */
|
||||
tmpreg |= (RI_InputCapture);
|
||||
|
||||
if((RI_InputCapture & RI_InputCapture_IC1) == RI_InputCapture_IC1)
|
||||
{
|
||||
/* Clear the input capture select bits */
|
||||
tmpreg &= (uint32_t)(~IC_ROUTING_MASK);
|
||||
|
||||
/* Set RI_InputCaptureRouting bits */
|
||||
tmpreg |= (uint32_t)( RI_InputCaptureRouting);
|
||||
}
|
||||
|
||||
if((RI_InputCapture & RI_InputCapture_IC2) == RI_InputCapture_IC2)
|
||||
{
|
||||
/* Clear the input capture select bits */
|
||||
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 4));
|
||||
|
||||
/* Set RI_InputCaptureRouting bits */
|
||||
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 4));
|
||||
}
|
||||
|
||||
if((RI_InputCapture & RI_InputCapture_IC3) == RI_InputCapture_IC3)
|
||||
{
|
||||
/* Clear the input capture select bits */
|
||||
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 8));
|
||||
|
||||
/* Set RI_InputCaptureRouting bits */
|
||||
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 8));
|
||||
}
|
||||
|
||||
if((RI_InputCapture & RI_InputCapture_IC4) == RI_InputCapture_IC4)
|
||||
{
|
||||
/* Clear the input capture select bits */
|
||||
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 12));
|
||||
|
||||
/* Set RI_InputCaptureRouting bits */
|
||||
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 12));
|
||||
}
|
||||
|
||||
/* Write to RI->ICR register */
|
||||
RI->ICR = tmpreg;
|
||||
}
|
||||
/**
|
||||
* @brief Configures the Pull-up and Pull-down Resistors
|
||||
* @param RI_Resistor selects the resistor to connect.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RI_Resistor_10KPU : 10K pull-up resistor
|
||||
* @arg RI_Resistor_400KPU : 400K pull-up resistor
|
||||
* @arg RI_Resistor_10KPD : 10K pull-down resistor
|
||||
* @arg RI_Resistor_400KPD : 400K pull-down resistor
|
||||
* @param NewState: New state of the analog switch associated to the selected resistor.
|
||||
* This parameter can be:
|
||||
* ENABLE so the selected resistor is connected
|
||||
* or DISABLE so the selected resistor is disconnected
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RI_RESISTOR(RI_Resistor));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the resistor */
|
||||
COMP->CSR |= (uint32_t) RI_Resistor;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Resistor */
|
||||
COMP->CSR &= (uint32_t) (~RI_Resistor);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Close or Open the routing interface Input Output switches.
|
||||
* @param RI_IOSwitch: selects the I/O analog switch number.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RI_IOSwitch_CH0 --> RI_IOSwitch_CH15
|
||||
* @argRI_IOSwitch_CH18 --> RI_IOSwitch_CH25
|
||||
* @arg RI_IOSwitch_GR10_1 --> RI_IOSwitch_GR10_4
|
||||
* @arg RI_IOSwitch_GR6_1 --> RI_IOSwitch_GR6_2
|
||||
* @arg RI_IOSwitch_GR5_1 --> RI_IOSwitch_GR5_3
|
||||
* @arg RI_IOSwitch_GR4_1 --> RI_IOSwitch_GR4_3
|
||||
* @arg RI_IOSwitch_VCOMP
|
||||
* @param NewState: New state of the analog switch.
|
||||
* This parameter can be
|
||||
* ENABLE so the Input Output switch is closed
|
||||
* or DISABLE so the Input Output switch is open
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState)
|
||||
{
|
||||
uint32_t IOSwitchmask = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RI_IOSWITCH(RI_IOSwitch));
|
||||
|
||||
/* Read Analog switch register index*/
|
||||
IOSwitchmask = RI_IOSwitch >> 28;
|
||||
|
||||
/** Get Bits[27:0] of the IO switch */
|
||||
RI_IOSwitch &= 0x0FFFFFFF;
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
if (IOSwitchmask != 0)
|
||||
{
|
||||
/* Close the analog switches */
|
||||
RI->ASCR1 |= RI_IOSwitch;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Open the analog switches */
|
||||
RI->ASCR2 |= RI_IOSwitch;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (IOSwitchmask != 0)
|
||||
{
|
||||
/* Close the analog switches */
|
||||
RI->ASCR1 &= (~ (uint32_t)RI_IOSwitch);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Open the analog switches */
|
||||
RI->ASCR2 &= (~ (uint32_t)RI_IOSwitch);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the switch control mode.
|
||||
* @param NewState: New state of the switch control mode. This parameter can
|
||||
* be ENABLE: ADC analog switches closed if the corresponding
|
||||
* I/O switch is also closed.
|
||||
* or DISABLE: ADC analog switches open or controlled by the ADC interface.
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the Switch control mode */
|
||||
RI->ASCR1 |= (uint32_t) RI_ASCR1_SCM;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the Switch control mode */
|
||||
RI->ASCR1 &= (uint32_t)(~RI_ASCR1_SCM);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports A..E
|
||||
* @param RI_Port: selects the GPIO Port.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RI_PortA : Port A is selected
|
||||
* @arg RI_PortB : Port B is selected
|
||||
* @arg RI_PortC : Port C is selected
|
||||
* @arg RI_PortD : Port D is selected
|
||||
* @arg RI_PortE : Port E is selected
|
||||
* @param RI_Pin : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter can any value from RI_Pin_x where x can be (0..15) or RI_Pin_All.
|
||||
* @param NewState new state of the Hysteresis.
|
||||
* This parameter can be:
|
||||
* ENABLE so the Hysteresis is on
|
||||
* or DISABLE so the Hysteresis is off
|
||||
* @retval None
|
||||
*/
|
||||
void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,
|
||||
FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RI_PORT(RI_Port));
|
||||
assert_param(IS_RI_PIN(RI_Pin));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
if(RI_Port == RI_PortA)
|
||||
{
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Hysteresis on */
|
||||
RI->HYSCR1 &= (uint32_t)~((uint32_t)RI_Pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Hysteresis off */
|
||||
RI->HYSCR1 |= (uint32_t) RI_Pin;
|
||||
}
|
||||
}
|
||||
|
||||
else if(RI_Port == RI_PortB)
|
||||
{
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Hysteresis on */
|
||||
RI->HYSCR1 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Hysteresis off */
|
||||
RI->HYSCR1 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);
|
||||
}
|
||||
}
|
||||
|
||||
else if(RI_Port == RI_PortC)
|
||||
{
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Hysteresis on */
|
||||
RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Hysteresis off */
|
||||
RI->HYSCR2 |= (uint32_t) (RI_Pin );
|
||||
}
|
||||
}
|
||||
else if(RI_Port == RI_PortD)
|
||||
{
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Hysteresis on */
|
||||
RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Hysteresis off */
|
||||
RI->HYSCR2 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);
|
||||
|
||||
}
|
||||
}
|
||||
else /* RI_Port == RI_PortE */
|
||||
{
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Hysteresis on */
|
||||
RI->HYSCR3 &= (uint32_t) (~((uint32_t)RI_Pin));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Hysteresis off */
|
||||
RI->HYSCR3 |= (uint32_t) (RI_Pin );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,459 @@
|
||||
;/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l15x_lp.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.0.0RC1
|
||||
;* Date : 07/02/2010
|
||||
;* Description : STM32L15x Low Power Devices vector table for EWARM5.x toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == __iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************/
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
EXTERN vPortSVCHandler
|
||||
EXTERN xPortPendSVHandler
|
||||
EXTERN xPortSysTickHandler
|
||||
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD vPortSVCHandler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD xPortPendSVHandler ; PendSV Handler
|
||||
DCD xPortSysTickHandler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD USB_HP_IRQHandler ; USB High Priority
|
||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
||||
DCD DAC_IRQHandler ; DAC
|
||||
DCD COMP_IRQHandler ; COMP through EXTI Line
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD LCD_IRQHandler ; LCD
|
||||
DCD TIM9_IRQHandler ; TIM9
|
||||
DCD TIM10_IRQHandler ; TIM10
|
||||
DCD TIM11_IRQHandler ; TIM11
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
|
||||
DCD TIM6_IRQHandler ; TIM6
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
END
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,360 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32_eval.h
|
||||
* @author MCD Application Team
|
||||
* @version V4.4.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief Header file for stm32_eval.c module.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32_EVAL_H
|
||||
#define __STM32_EVAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup Utilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32_EVAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_Abstraction_Layer
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_HARDWARE_RESOURCES
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
@code
|
||||
The table below gives an overview of the hardware resources supported by each
|
||||
STM32 EVAL board.
|
||||
- LCD: TFT Color LCD (Parallel (FSMC) and Serial (SPI))
|
||||
- IOE: IO Expander on I2C
|
||||
- sFLASH: serial SPI FLASH (M25Pxxx)
|
||||
- sEE: serial I2C EEPROM (M24C08, M24C32, M24C64)
|
||||
- TSENSOR: Temperature Sensor (LM75)
|
||||
- SD: SD Card memory (SPI and SDIO (SD Card MODE))
|
||||
=================================================================================================================+
|
||||
STM32 EVAL | LED | Buttons | Com Ports | LCD | IOE | sFLASH | sEE | TSENSOR | SD (SPI) | SD(SDIO) |
|
||||
=================================================================================================================+
|
||||
STM3210B-EVAL | 4 | 8 | 2 | YES (SPI) | NO | YES | NO | YES | YES | NO |
|
||||
-----------------------------------------------------------------------------------------------------------------+
|
||||
STM3210E-EVAL | 4 | 8 | 2 | YES (FSMC)| NO | YES | NO | YES | NO | YES |
|
||||
-----------------------------------------------------------------------------------------------------------------+
|
||||
STM3210C-EVAL | 4 | 3 | 1 | YES (SPI) | YES | NO | YES | NO | YES | NO |
|
||||
-----------------------------------------------------------------------------------------------------------------+
|
||||
STM32100B-EVAL | 4 | 8 | 2 | YES (SPI) | NO | YES | NO | YES | YES | NO |
|
||||
-----------------------------------------------------------------------------------------------------------------+
|
||||
STM32L152-EVAL | 4 | 8 | 2 | YES (SPI) | NO | NO | NO | YES | YES | NO |
|
||||
=================================================================================================================+
|
||||
@endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
LED1 = 0,
|
||||
LED2 = 1,
|
||||
LED3 = 2,
|
||||
LED4 = 3
|
||||
} Led_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_WAKEUP = 0,
|
||||
BUTTON_TAMPER = 1,
|
||||
BUTTON_KEY = 2,
|
||||
BUTTON_RIGHT = 3,
|
||||
BUTTON_LEFT = 4,
|
||||
BUTTON_UP = 5,
|
||||
BUTTON_DOWN = 6,
|
||||
BUTTON_SEL = 7
|
||||
} Button_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
BUTTON_MODE_GPIO = 0,
|
||||
BUTTON_MODE_EXTI = 1
|
||||
} ButtonMode_TypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
JOY_NONE = 0,
|
||||
JOY_SEL = 1,
|
||||
JOY_DOWN = 2,
|
||||
JOY_LEFT = 3,
|
||||
JOY_RIGHT = 4,
|
||||
JOY_UP = 5
|
||||
} JOYState_TypeDef
|
||||
;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
COM1 = 0,
|
||||
COM2 = 1
|
||||
} COM_TypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Uncomment the line corresponding to the STMicroelectronics evaluation
|
||||
* board used in your application.
|
||||
*
|
||||
* Tip: To avoid modifying this file each time you need to switch between these
|
||||
* boards, you can define the board in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined (USE_STM32100B_EVAL) && !defined (USE_STM3210B_EVAL) && !defined (USE_STM3210E_EVAL)\
|
||||
&& !defined (USE_STM3210C_EVAL) && !defined (USE_STM32L152_EVAL)
|
||||
//#define USE_STM32100B_EVAL
|
||||
//#define USE_STM3210B_EVAL
|
||||
//#define USE_STM3210E_EVAL
|
||||
//#define USE_STM3210C_EVAL
|
||||
//#define USE_STM32L152_EVAL
|
||||
#endif
|
||||
|
||||
#ifdef USE_STM32100B_EVAL
|
||||
#include "stm32f10x.h"
|
||||
#include "stm32100b_eval/stm32100b_eval.h"
|
||||
#elif defined USE_STM3210B_EVAL
|
||||
#include "stm32f10x.h"
|
||||
#include "stm3210b_eval/stm3210b_eval.h"
|
||||
#elif defined USE_STM3210E_EVAL
|
||||
#include "stm32f10x.h"
|
||||
#include "stm3210e_eval/stm3210e_eval.h"
|
||||
#elif defined USE_STM3210C_EVAL
|
||||
#include "stm32f10x.h"
|
||||
#include "stm3210c_eval/stm3210c_eval.h"
|
||||
#elif defined USE_STM32L152_EVAL
|
||||
#include "stm32l1xx.h"
|
||||
#include "stm32l152_eval/stm32l152_eval.h"
|
||||
#else
|
||||
#error "Please select first the STM32 EVAL board to be used (in stm32_eval.h)"
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief STM32 Button Defines Legacy
|
||||
*/
|
||||
#define Button_WAKEUP BUTTON_WAKEUP
|
||||
#define Button_TAMPER BUTTON_TAMPER
|
||||
#define Button_KEY BUTTON_KEY
|
||||
#define Button_RIGHT BUTTON_RIGHT
|
||||
#define Button_LEFT BUTTON_LEFT
|
||||
#define Button_UP BUTTON_UP
|
||||
#define Button_DOWN BUTTON_DOWN
|
||||
#define Button_SEL BUTTON_SEL
|
||||
#define Mode_GPIO BUTTON_MODE_GPIO
|
||||
#define Mode_EXTI BUTTON_MODE_EXTI
|
||||
#define Button_Mode_TypeDef ButtonMode_TypeDef
|
||||
#define JOY_CENTER JOY_SEL
|
||||
#define JOY_State_TypeDef JOYState_TypeDef
|
||||
|
||||
/**
|
||||
* @brief LCD Defines Legacy
|
||||
*/
|
||||
#define LCD_RSNWR_GPIO_CLK LCD_NWR_GPIO_CLK
|
||||
#define LCD_SPI_GPIO_PORT LCD_SPI_SCK_GPIO_PORT
|
||||
#define LCD_SPI_GPIO_CLK LCD_SPI_SCK_GPIO_CLK
|
||||
#define R0 LCD_REG_0
|
||||
#define R1 LCD_REG_1
|
||||
#define R2 LCD_REG_2
|
||||
#define R3 LCD_REG_3
|
||||
#define R4 LCD_REG_4
|
||||
#define R5 LCD_REG_5
|
||||
#define R6 LCD_REG_6
|
||||
#define R7 LCD_REG_7
|
||||
#define R8 LCD_REG_8
|
||||
#define R9 LCD_REG_9
|
||||
#define R10 LCD_REG_10
|
||||
#define R12 LCD_REG_12
|
||||
#define R13 LCD_REG_13
|
||||
#define R14 LCD_REG_14
|
||||
#define R15 LCD_REG_15
|
||||
#define R16 LCD_REG_16
|
||||
#define R17 LCD_REG_17
|
||||
#define R18 LCD_REG_18
|
||||
#define R19 LCD_REG_19
|
||||
#define R20 LCD_REG_20
|
||||
#define R21 LCD_REG_21
|
||||
#define R22 LCD_REG_22
|
||||
#define R23 LCD_REG_23
|
||||
#define R24 LCD_REG_24
|
||||
#define R25 LCD_REG_25
|
||||
#define R26 LCD_REG_26
|
||||
#define R27 LCD_REG_27
|
||||
#define R28 LCD_REG_28
|
||||
#define R29 LCD_REG_29
|
||||
#define R30 LCD_REG_30
|
||||
#define R31 LCD_REG_31
|
||||
#define R32 LCD_REG_32
|
||||
#define R33 LCD_REG_33
|
||||
#define R34 LCD_REG_34
|
||||
#define R36 LCD_REG_36
|
||||
#define R37 LCD_REG_37
|
||||
#define R40 LCD_REG_40
|
||||
#define R41 LCD_REG_41
|
||||
#define R43 LCD_REG_43
|
||||
#define R45 LCD_REG_45
|
||||
#define R48 LCD_REG_48
|
||||
#define R49 LCD_REG_49
|
||||
#define R50 LCD_REG_50
|
||||
#define R51 LCD_REG_51
|
||||
#define R52 LCD_REG_52
|
||||
#define R53 LCD_REG_53
|
||||
#define R54 LCD_REG_54
|
||||
#define R55 LCD_REG_55
|
||||
#define R56 LCD_REG_56
|
||||
#define R57 LCD_REG_57
|
||||
#define R59 LCD_REG_59
|
||||
#define R60 LCD_REG_60
|
||||
#define R61 LCD_REG_61
|
||||
#define R62 LCD_REG_62
|
||||
#define R63 LCD_REG_63
|
||||
#define R64 LCD_REG_64
|
||||
#define R65 LCD_REG_65
|
||||
#define R66 LCD_REG_66
|
||||
#define R67 LCD_REG_67
|
||||
#define R68 LCD_REG_68
|
||||
#define R69 LCD_REG_69
|
||||
#define R70 LCD_REG_70
|
||||
#define R71 LCD_REG_71
|
||||
#define R72 LCD_REG_72
|
||||
#define R73 LCD_REG_73
|
||||
#define R74 LCD_REG_74
|
||||
#define R75 LCD_REG_75
|
||||
#define R76 LCD_REG_76
|
||||
#define R77 LCD_REG_77
|
||||
#define R78 LCD_REG_78
|
||||
#define R79 LCD_REG_79
|
||||
#define R80 LCD_REG_80
|
||||
#define R81 LCD_REG_81
|
||||
#define R82 LCD_REG_82
|
||||
#define R83 LCD_REG_83
|
||||
#define R96 LCD_REG_96
|
||||
#define R97 LCD_REG_97
|
||||
#define R106 LCD_REG_106
|
||||
#define R118 LCD_REG_118
|
||||
#define R128 LCD_REG_128
|
||||
#define R129 LCD_REG_129
|
||||
#define R130 LCD_REG_130
|
||||
#define R131 LCD_REG_131
|
||||
#define R132 LCD_REG_132
|
||||
#define R133 LCD_REG_133
|
||||
#define R134 LCD_REG_134
|
||||
#define R135 LCD_REG_135
|
||||
#define R136 LCD_REG_136
|
||||
#define R137 LCD_REG_137
|
||||
#define R139 LCD_REG_139
|
||||
#define R140 LCD_REG_140
|
||||
#define R141 LCD_REG_141
|
||||
#define R143 LCD_REG_143
|
||||
#define R144 LCD_REG_144
|
||||
#define R145 LCD_REG_145
|
||||
#define R146 LCD_REG_146
|
||||
#define R147 LCD_REG_147
|
||||
#define R148 LCD_REG_148
|
||||
#define R149 LCD_REG_149
|
||||
#define R150 LCD_REG_150
|
||||
#define R151 LCD_REG_151
|
||||
#define R152 LCD_REG_152
|
||||
#define R153 LCD_REG_153
|
||||
#define R154 LCD_REG_154
|
||||
#define R157 LCD_REG_157
|
||||
#define R192 LCD_REG_192
|
||||
#define R193 LCD_REG_193
|
||||
#define R227 LCD_REG_227
|
||||
#define R229 LCD_REG_229
|
||||
#define R231 LCD_REG_231
|
||||
#define R239 LCD_REG_239
|
||||
#define White LCD_COLOR_WHITE
|
||||
#define Black LCD_COLOR_BLACK
|
||||
#define Grey LCD_COLOR_GREY
|
||||
#define Blue LCD_COLOR_BLUE
|
||||
#define Blue2 LCD_COLOR_BLUE2
|
||||
#define Red LCD_COLOR_RED
|
||||
#define Magenta LCD_COLOR_MAGENTA
|
||||
#define Green LCD_COLOR_GREEN
|
||||
#define Cyan LCD_COLOR_CYAN
|
||||
#define Yellow LCD_COLOR_YELLOW
|
||||
#define Line0 LCD_LINE_0
|
||||
#define Line1 LCD_LINE_1
|
||||
#define Line2 LCD_LINE_2
|
||||
#define Line3 LCD_LINE_3
|
||||
#define Line4 LCD_LINE_4
|
||||
#define Line5 LCD_LINE_5
|
||||
#define Line6 LCD_LINE_6
|
||||
#define Line7 LCD_LINE_7
|
||||
#define Line8 LCD_LINE_8
|
||||
#define Line9 LCD_LINE_9
|
||||
#define Horizontal LCD_DIR_HORIZONTAL
|
||||
#define Vertical LCD_DIR_VERTICAL
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup STM32_EVAL_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32_EVAL_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,74 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32L1xx_StdPeriph_Template/stm32l1xx_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_CONF_H
|
||||
#define __STM32L1xx_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment the line below to enable peripheral header file inclusion */
|
||||
/* #include "stm32l1xx_adc.h" */
|
||||
/* #include "stm32l1xx_crc.h" */
|
||||
/* #include "stm32l1xx_comp.h" */
|
||||
/* #include "stm32l1xx_dac.h" */
|
||||
/* #include "stm32l1xx_dbgmcu.h" */
|
||||
/* #include "stm32l1xx_dma.h" */
|
||||
#include "stm32l1xx_exti.h"
|
||||
/* #include "stm32l1xx_flash.h" */
|
||||
#include "stm32l1xx_gpio.h"
|
||||
#include "stm32l1xx_syscfg.h"
|
||||
/* #include "stm32l1xx_i2c.h" */
|
||||
/* #include "stm32l1xx_iwdg.h" */
|
||||
/* #include "stm32l1xx_lcd.h" */
|
||||
#include "stm32l1xx_pwr.h"
|
||||
#include "stm32l1xx_rcc.h"
|
||||
/* #include "stm32l1xx_rtc.h" */
|
||||
#include "stm32l1xx_spi.h"
|
||||
#include "stm32l1xx_tim.h"
|
||||
#include "stm32l1xx_usart.h"
|
||||
/* #include "stm32l1xx_wwdg.h" */
|
||||
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function which reports
|
||||
* the name of the source file and the source line number of the call
|
||||
* that failed. If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32L1xx_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,31 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x300;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,160 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32L1xx_StdPeriph_Template/stm32l1xx_it.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief Main Interrupt Service Routines.
|
||||
* This file provides template for all exceptions handler and
|
||||
* peripherals interrupt service routine.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_it.h"
|
||||
|
||||
|
||||
/** @addtogroup Template_Project
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles PendSVC exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SysTick Handler.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32L1xx Peripherals Interrupt Handlers */
|
||||
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
|
||||
/* available peripheral interrupt handler's name please refer to the startup */
|
||||
/* file (startup_stm32l1xx_md.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles PPP interrupt request.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
/*void PPP_IRQHandler(void)
|
||||
{
|
||||
}*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,53 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file Project/STM32L1xx_StdPeriph_Template/stm32l1xx_it.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_IT_H
|
||||
#define __STM32L1xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_IT_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
@ -0,0 +1,934 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l1xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0RC1
|
||||
* @date 07/02/2010
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
******************************************************************************
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
|
||||
frequency (after reset the MSI is used as SYSCLK source)
|
||||
|
||||
IMPORTANT NOTE:
|
||||
==============
|
||||
1. After each device reset the MSI is used as System clock source.
|
||||
|
||||
2. Please make sure that the selected System clock doesn't exceed your device's
|
||||
maximum frequency.
|
||||
|
||||
3. If none of the define below is enabled, the MSI (2MHz default) is used as
|
||||
System clock source.
|
||||
|
||||
4. The System clock configuration functions provided within this file assume that:
|
||||
- For Ultra Low Power Medium Mensity devices an external 8MHz crystal is
|
||||
used to drive the System clock.
|
||||
If you are using different crystal you have to adapt those functions accordingly.
|
||||
*/
|
||||
|
||||
/* #define SYSCLK_FREQ_MSI */
|
||||
|
||||
#ifndef SYSCLK_FREQ_MSI
|
||||
/* #define SYSCLK_FREQ_HSI HSI_VALUE */
|
||||
/* #define SYSCLK_FREQ_HSE HSE_VALUE */
|
||||
/* #define SYSCLK_FREQ_4MHz 4000000 */
|
||||
/* #define SYSCLK_FREQ_8MHz 8000000 */
|
||||
/* #define SYSCLK_FREQ_16MHz 16000000 */
|
||||
#define SYSCLK_FREQ_32MHz 32000000
|
||||
#else
|
||||
/* #define SYSCLK_FREQ_MSI_64KHz 64000 */
|
||||
/* #define SYSCLK_FREQ_MSI_128KHz 128000 */
|
||||
/* #define SYSCLK_FREQ_MSI_256KHz 256000 */
|
||||
/* #define SYSCLK_FREQ_MSI_512KHz 512000 */
|
||||
/* #define SYSCLK_FREQ_MSI_1MHz 1000000 */
|
||||
/* #define SYSCLK_FREQ_MSI_2MHz 2000000 */
|
||||
/* #define SYSCLK_FREQ_MSI_4MHz 4000000 */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Clock Definitions
|
||||
*******************************************************************************/
|
||||
#ifndef SYSCLK_FREQ_MSI
|
||||
#ifdef SYSCLK_FREQ_HSI
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_HSI; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_HSE
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_4MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_4MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_8MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_16MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_16MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_32MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_32MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#else /*!< MSI Selected as System Clock source */
|
||||
uint32_t SystemCoreClock = MSI_VALUE; /*!< System Clock Frequency (Core Clock) */
|
||||
#endif
|
||||
#else
|
||||
#ifdef SYSCLK_FREQ_MSI_64KHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_64KHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_128KHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_128KHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_256KHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_256KHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_512KHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_512KHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_1MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_1MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_2MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_2MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#elif defined SYSCLK_FREQ_MSI_4MHz
|
||||
uint32_t SystemCoreClock = SYSCLK_FREQ_MSI_4MHz; /*!< System Clock Frequency (Core Clock) */
|
||||
#else
|
||||
uint32_t SystemCoreClock = MSI_VALUE; /*!< System Clock Frequency (Core Clock) */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
|
||||
__I uint8_t MSITable[7] = {0, 0, 0, 0, 1, 2, 4};
|
||||
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
static void SetSysClock(void);
|
||||
|
||||
#ifdef SYSCLK_FREQ_HSI
|
||||
static void SetSysClockToHSI(void);
|
||||
#elif defined SYSCLK_FREQ_HSE
|
||||
static void SetSysClockToHSE(void);
|
||||
#elif defined SYSCLK_FREQ_4MHz
|
||||
static void SetSysClockTo4(void);
|
||||
#elif defined SYSCLK_FREQ_8MHz
|
||||
static void SetSysClockTo8(void);
|
||||
#elif defined SYSCLK_FREQ_16MHz
|
||||
static void SetSysClockTo16(void);
|
||||
#elif defined SYSCLK_FREQ_32MHz
|
||||
static void SetSysClockTo32(void);
|
||||
#else
|
||||
static void SetSysClockToMSI(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemCoreClock variable
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
/*!< Set MSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000100;
|
||||
|
||||
/*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0x88FFC00C;
|
||||
|
||||
/*!< Reset HSION, HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xEEFEFFFE;
|
||||
|
||||
/*!< Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0xFF02FFFF;
|
||||
|
||||
/*!< Disable all interrupts */
|
||||
RCC->CIR = 0x00000000;
|
||||
|
||||
/*!< Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
|
||||
/*!< Configure the Flash Latency cycles and enable prefetch buffer */
|
||||
SetSysClock();
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock according to Clock Register Values
|
||||
* @note None
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* MSI used as system clock */
|
||||
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||
SystemCoreClock = (((1 << msirange) * 64000) - (MSITable[msirange] * 24000));
|
||||
break;
|
||||
case 0x04: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x08: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x0C: /* PLL used as system clock */
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
|
||||
pllmul = PLLMulTable[(pllmul >> 18)];
|
||||
plldiv = (plldiv >> 22) + 1;
|
||||
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
if (pllsource == 0x00)
|
||||
{
|
||||
/* HSI oscillator clock selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSE selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
SystemCoreClock = MSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClock(void)
|
||||
{
|
||||
#ifdef SYSCLK_FREQ_HSI
|
||||
SetSysClockToHSI();
|
||||
#elif defined SYSCLK_FREQ_HSE
|
||||
SetSysClockToHSE();
|
||||
#elif defined SYSCLK_FREQ_4MHz
|
||||
SetSysClockTo4();
|
||||
#elif defined SYSCLK_FREQ_8MHz
|
||||
SetSysClockTo8();
|
||||
#elif defined SYSCLK_FREQ_16MHz
|
||||
SetSysClockTo16();
|
||||
#elif defined SYSCLK_FREQ_32MHz
|
||||
SetSysClockTo32();
|
||||
#else
|
||||
SetSysClockToMSI();
|
||||
#endif
|
||||
|
||||
/* If none of the define above is enabled, the MSI (2MHz default) is used as
|
||||
System clock source (default after reset) */
|
||||
}
|
||||
|
||||
#ifdef SYSCLK_FREQ_HSI
|
||||
/**
|
||||
* @brief Selects HSI as System clock source and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockToHSI(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSI */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSION);
|
||||
|
||||
/* Wait till HSI is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSIStatus = RCC->CR & RCC_CR_HSIRDY;
|
||||
StartUpCounter++;
|
||||
} while((HSIStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
|
||||
{
|
||||
HSIStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSIStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSIStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Enable 64-bit access */
|
||||
FLASH->ACR |= FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable Prefetch Buffer */
|
||||
FLASH->ACR |= FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Flash 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 1 (1.8V) */
|
||||
PWR->CR = PWR_CR_VOS_0;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* Select HSI as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
|
||||
|
||||
/* Wait till HSI is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSI fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined SYSCLK_FREQ_HSE
|
||||
/**
|
||||
* @brief Selects HSE as System clock source and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockToHSE(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Flash 0 wait state */
|
||||
FLASH->ACR &= ~FLASH_ACR_LATENCY;
|
||||
|
||||
/* Disable Prefetch Buffer */
|
||||
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Disable 64-bit access */
|
||||
FLASH->ACR &= ~FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 2 (1.5V) */
|
||||
PWR->CR = PWR_CR_VOS_1;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* Select HSE as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;
|
||||
|
||||
/* Wait till HSE is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
#elif defined SYSCLK_FREQ_4MHz
|
||||
/**
|
||||
* @brief Sets System clock frequency to 4MHz and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockTo4(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Flash 0 wait state */
|
||||
FLASH->ACR &= ~FLASH_ACR_LATENCY;
|
||||
|
||||
/* Disable Prefetch Buffer */
|
||||
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Disable 64-bit access */
|
||||
FLASH->ACR &= ~FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 2 (1.5V) */
|
||||
PWR->CR = PWR_CR_VOS_1;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV2;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* Select HSE as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;
|
||||
|
||||
/* Wait till HSE is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined SYSCLK_FREQ_8MHz
|
||||
/**
|
||||
* @brief Sets System clock frequency to 8MHz and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockTo8(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Flash 0 wait state */
|
||||
FLASH->ACR &= ~FLASH_ACR_LATENCY;
|
||||
|
||||
/* Disable Prefetch Buffer */
|
||||
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Disable 64-bit access */
|
||||
FLASH->ACR &= ~FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 2 (1.5V) */
|
||||
PWR->CR = PWR_CR_VOS_1;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* Select HSE as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;
|
||||
|
||||
/* Wait till HSE is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined SYSCLK_FREQ_16MHz
|
||||
/**
|
||||
* @brief Sets System clock frequency to 16MHz and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockTo16(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Enable 64-bit access */
|
||||
FLASH->ACR |= FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable Prefetch Buffer */
|
||||
FLASH->ACR |= FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Flash 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 2 (1.5V) */
|
||||
PWR->CR = PWR_CR_VOS_1;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV2;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* PLL configuration: PLLCLK = (HSE * 12) / 3 = 32MHz */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
|
||||
RCC_CFGR_PLLDIV));
|
||||
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLDIV3);
|
||||
|
||||
/* Enable PLL */
|
||||
RCC->CR |= RCC_CR_PLLON;
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||
{
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
|
||||
|
||||
/* Wait till PLL is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x0C)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined SYSCLK_FREQ_32MHz
|
||||
/**
|
||||
* @brief Sets System clock frequency to 32MHz and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockTo32(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
/* Enable 64-bit access */
|
||||
FLASH->ACR |= FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable Prefetch Buffer */
|
||||
FLASH->ACR |= FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Flash 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 1 (1.8V) */
|
||||
PWR->CR = PWR_CR_VOS_0;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
/* PLL configuration: PLLCLK = (HSE * 12) / 3 = 32MHz */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
|
||||
RCC_CFGR_PLLDIV));
|
||||
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLDIV3);
|
||||
|
||||
/* Enable PLL */
|
||||
RCC->CR |= RCC_CR_PLLON;
|
||||
|
||||
/* Wait till PLL is ready */
|
||||
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||
{
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
|
||||
|
||||
/* Wait till PLL is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x0C)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
/**
|
||||
* @brief Selects MSI as System clock source and configure HCLK, PCLK2
|
||||
* and PCLK1 prescalers.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClockToMSI(void)
|
||||
{
|
||||
__IO uint32_t StartUpCounter = 0, MSIStatus = 0;
|
||||
|
||||
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
|
||||
/* Enable MSI */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_MSION);
|
||||
|
||||
/* Wait till MSI is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
MSIStatus = RCC->CR & RCC_CR_MSIRDY;
|
||||
StartUpCounter++;
|
||||
} while((MSIStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_MSIRDY) != RESET)
|
||||
{
|
||||
MSIStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
MSIStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (MSIStatus == (uint32_t)0x01)
|
||||
{
|
||||
#ifdef SYSCLK_FREQ_MSI
|
||||
#ifdef SYSCLK_FREQ_MSI_4MHz
|
||||
/* Enable 64-bit access */
|
||||
FLASH->ACR |= FLASH_ACR_ACC64;
|
||||
|
||||
/* Enable Prefetch Buffer */
|
||||
FLASH->ACR |= FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Flash 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
#else
|
||||
/* Flash 0 wait state */
|
||||
FLASH->ACR &= ~FLASH_ACR_LATENCY;
|
||||
|
||||
/* Disable Prefetch Buffer */
|
||||
FLASH->ACR &= ~FLASH_ACR_PRFTEN;
|
||||
|
||||
/* Disable 64-bit access */
|
||||
FLASH->ACR &= ~FLASH_ACR_ACC64;
|
||||
#endif
|
||||
#endif
|
||||
/* Enable the PWR APB1 Clock */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Select the Voltage Range 3 (1.2V) */
|
||||
PWR->CR = PWR_CR_VOS;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/* HCLK = SYSCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
|
||||
|
||||
/* PCLK2 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
|
||||
|
||||
/* PCLK1 = HCLK */
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
|
||||
|
||||
#ifdef SYSCLK_FREQ_MSI
|
||||
#ifdef SYSCLK_FREQ_MSI_64KHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_64KHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_128KHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_128KHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_256KHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_256KHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_512KHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_512KHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_1MHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_1MHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_2MHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_2MHz;
|
||||
#elif defined SYSCLK_FREQ_MSI_4MHz
|
||||
/* Set MSI clock range */
|
||||
RCC->ICSCR &= (uint32_t)((uint32_t)~(RCC_ICSCR_MSIRANGE));
|
||||
RCC->ICSCR |= (uint32_t)RCC_ICSCR_MSIRANGE_4MHz;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Select MSI as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_MSI;
|
||||
|
||||
/* Wait till MSI is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x00)
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* If MSI fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
||||
Loading…
Reference in New Issue