diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/File-Related-CLI-commands.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/File-Related-CLI-commands.c
index e7916fbe07..adb4769b2a 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/File-Related-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/File-Related-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/Sample-CLI-commands.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/Sample-CLI-commands.c
index 1d98a0b72d..d74db87e6e 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/Sample-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UARTCommandConsole.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UARTCommandConsole.c
index 9b87c02656..2267fa298e 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UARTCommandConsole.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UARTCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UDP-Related-CLI-commands.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UDP-Related-CLI-commands.c
index 19c9d4c958..475f545b66 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UDP-Related-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_CLI_Demos/UDP-Related-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_FAT_SL_Demos/CreateExampleFiles/File-system-demo.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_FAT_SL_Demos/CreateExampleFiles/File-system-demo.c
index 0c45eb7be9..8f62616b9e 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_FAT_SL_Demos/CreateExampleFiles/File-system-demo.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_FAT_SL_Demos/CreateExampleFiles/File-system-demo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/CLI-commands.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/CLI-commands.c
index e26297e6f8..e4f1e6f0f5 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandInterpreter.h b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandInterpreter.h
index 115a13e06e..514c8b9910 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandInterpreter.h
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandInterpreter.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandServer.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandServer.c
index 99e4d2a40b..d8a6c5e0ee 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandServer.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/CLICommands/UDPCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.c
index 3c3b93b454..60f7403023 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.h b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.h
index 01ceb08f43..21de10e598 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.h
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/EchoClients/TwoEchoClients.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.c b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.c
index 1921b7daf8..e661c10683 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.c
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.h b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.h
index 42e5325179..70730deb01 100644
--- a/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.h
+++ b/FreeRTOS-Plus/Demo/Common/FreeRTOS_Plus_UDP_Demos/TraceMacros/Example1/DemoIPTrace.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/CLI-commands.c
index a74a31bacd..6e33cca94e 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/FreeRTOSConfig.h
index 97e4b8222b..805f087980 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/Run-time-stats-utils.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/Run-time-stats-utils.c
index 2c72eb0e81..be558ec00b 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/Run-time-stats-utils.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/UDPCommandServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/UDPCommandServer.c
index 25af604252..53dbe35651 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/UDPCommandServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/UDPCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/main.c
index 0d4c7c2df9..c5f97f1506 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_CLI_with_Trace_Windows_Simulator/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
index b6ce45a673..de30abe004 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-Releated-CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-Releated-CLI-commands.c
index 64aa45aa5c..51653b3400 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-Releated-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-Releated-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-system-demo.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-system-demo.c
index e4208ad83e..778b00fcf3 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-system-demo.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/File-system-demo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Run-time-stats-utils.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Run-time-stats-utils.c
index 2d1b78941c..0af4a956fe 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Run-time-stats-utils.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Sample-CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Sample-CLI-commands.c
index 2653080b47..bc08555f04 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Sample-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/UDPCommandServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/UDPCommandServer.c
index 23d0d04a7a..59d15e0c6a 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/UDPCommandServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/UDPCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/main.c
index 026dea58e5..24e7363fee 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_FAT_SL_and_CLI_Windows_Simulator/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
index 98810a3ed5..771b5885ef 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/ConfigurationFiles/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-Related-CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-Related-CLI-commands.c
index 6cbe9cf220..47102ab92c 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-Related-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-Related-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-system-demo.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-system-demo.c
index bc3485aec5..da035c3471 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-system-demo.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/File-system-demo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Run-time-stats-utils.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Run-time-stats-utils.c
index 2d1b78941c..0af4a956fe 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Run-time-stats-utils.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Sample-CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Sample-CLI-commands.c
index 2653080b47..bc08555f04 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Sample-CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/UDPCommandServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/UDPCommandServer.c
index 23d0d04a7a..59d15e0c6a 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/UDPCommandServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/UDPCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/main.c
index 5bd4f0bc14..9ad2f8221f 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_Reliance_Edge_and_CLI_Windows_Simulator/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/CLI-commands.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/CLI-commands.c
index 679088bcfa..0ff8644191 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/CLI-commands.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/USB_CDC/CDCCommandConsole.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/USB_CDC/CDCCommandConsole.c
index 5b4f948d7d..063d7c03e2 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/USB_CDC/CDCCommandConsole.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/USB_CDC/CDCCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/CDCCommandConsole.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/CDCCommandConsole.h
index 48c1e74895..723ec7ee5d 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/CDCCommandConsole.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/CDCCommandConsole.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/TwoEchoClients.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/TwoEchoClients.h
index 01ceb08f43..21de10e598 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/TwoEchoClients.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/Examples/include/TwoEchoClients.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/FreeRTOSConfig.h
index 8797409662..d40c9b2694 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/LEDs.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/LEDs.c
index 8dbf2d6e0b..b14bdfe800 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/LEDs.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/RunTimeStatsTimer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/RunTimeStatsTimer.c
index f2a4617519..16fc15f70b 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/RunTimeStatsTimer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/RunTimeStatsTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/main.c
index 979ec52e02..726a10890c 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SelectServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SelectServer.c
index e06f9c2036..c54673c471 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SelectServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SelectServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SimpleClientAndServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SimpleClientAndServer.c
index 1e63349734..8a7f82d520 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SimpleClientAndServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/SimpleClientAndServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/UDPCommandServer.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/UDPCommandServer.c
index 4e16842f80..5108e6dd8e 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/UDPCommandServer.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/UDPCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SelectServer.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SelectServer.h
index 82575d846f..fd87f28a1e 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SelectServer.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SelectServer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SimpleClientAndServer.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SimpleClientAndServer.h
index 2304cb06a2..85c6144d29 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SimpleClientAndServer.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/SimpleClientAndServer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/UDPCommandInterpreter.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/UDPCommandInterpreter.h
index 115a13e06e..514c8b9910 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/UDPCommandInterpreter.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/DemoTasks/include/UDPCommandInterpreter.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/FreeRTOSConfig.h
index b99519d345..65997c134b 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/Run-time-stats-utils.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/Run-time-stats-utils.c
index b7b0cc7c24..36108d2d50 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/Run-time-stats-utils.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/arch.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/arch.c
index 9093946794..c03443093c 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/arch.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/arch.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/netif.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/netif.h
index f2fb788939..bca1dc57d0 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/netif.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/WinPCap/netif.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/main.c
index 01e1758066..21ab35513d 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_Windows_Simulator/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/FreeRTOSConfig.h b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/FreeRTOSConfig.h
index fbbb271a28..b1e2dbff07 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/FreeRTOSConfig.h
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPClientTask.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPClientTask.c
index d155260fa4..3c48da1358 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPClientTask.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPClientTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPServerTask.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPServerTask.c
index d2ee3327c1..1419c0c1ce 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPServerTask.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/SecureTCPServerTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/main.c b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/main.c
index b29d7c988a..22a35de89d 100644
--- a/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/main.c
+++ b/FreeRTOS-Plus/Demo/FreeRTOS_Plus_WolfSSL_Windows_Simulator/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
index 4c40dfac7c..3ed319a9f2 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/Makefile b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/Makefile
index d92ca6d3c3..fb83bc2dfe 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/Makefile
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/Makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
index a39ab340b9..7025702678 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/main.c b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/main.c
index 560d964acb..632d549592 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/main.c
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serial.c b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
index cb3924910f..78dd411a44 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
index 1197416586..c2c9af5038 100644
--- a/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
+++ b/FreeRTOS/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
index 40abe2e5c2..ea14dd8e54 100644
--- a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
index 77e74d2ceb..a5b5c48d18 100644
--- a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
index 81cca87e58..7b93ffb6eb 100644
--- a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
+++ b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/main.c b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/main.c
index e07298e051..cb21d99487 100644
--- a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/main.c
+++ b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
index 41c4c30540..6474a25b2d 100644
--- a/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
index d34c58cdde..5bde3f99de 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/Makefile b/FreeRTOS/Demo/ARM7_LPC2106_GCC/Makefile
index 9735526e54..62c834f665 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/Makefile
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/Makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
index 4f0bcdbb34..5d59f3c525 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/main.c b/FreeRTOS/Demo/ARM7_LPC2106_GCC/main.c
index 44b216ceba..91f592a510 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c b/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c
index 319971b8dd..7689ca1489 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c b/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
index d5c1a6fe6b..5d228394fd 100644
--- a/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
+++ b/FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
index 5f61a77bb0..7b8be0db18 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
index 868bcbb891..adba1b645b 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_IAR/main.c b/FreeRTOS/Demo/ARM7_LPC2129_IAR/main.c
index 55c95af268..67671edbb7 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_IAR/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c b/FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c
index 15cd2baa4c..2af5a1653b 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h
index a7b55fcc83..be133df4f5 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c
index 25ff02cff5..f3c931ead5 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/main.c b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/main.c
index a84bfdd658..a876e70116 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c
index 5407c02391..018cc292e1 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s
index 2dce1adf9e..76a22f5c68 100644
--- a/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s
+++ b/FreeRTOS/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
index dfffea56d6..7e72c0c103 100644
--- a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/main.c b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/main.c
index db9dc33887..3657f5c75a 100644
--- a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/mainISR.c b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/mainISR.c
index 6c4267978b..d434517285 100644
--- a/FreeRTOS/Demo/ARM7_LPC2138_Rowley/mainISR.c
+++ b/FreeRTOS/Demo/ARM7_LPC2138_Rowley/mainISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h
index 4dad9ba76d..3f84242121 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile
index 1748e80ca8..723e59a050 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/Makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c
index fb3261fa4a..d03e0e4a10 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c
index 471c2b24f7..2349db0404 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c
index 544cb01c6d..9baba60f0d 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
index bd868a26b5..d5bb164abb 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
index fb3261fa4a..d03e0e4a10 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/main.c b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/main.c
index 71c2afbd30..dc2c098a2f 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/main.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
index cf40149fd8..b2f9d05579 100644
--- a/FreeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
index 16d05dc1fd..7c9866dd78 100644
--- a/FreeRTOS/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
index ffbba6881e..1235ce9300 100644
--- a/FreeRTOS/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR71x_IAR/main.c b/FreeRTOS/Demo/ARM7_STR71x_IAR/main.c
index fd45916640..a80006d652 100644
--- a/FreeRTOS/Demo/ARM7_STR71x_IAR/main.c
+++ b/FreeRTOS/Demo/ARM7_STR71x_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR71x_IAR/serial/serial.c b/FreeRTOS/Demo/ARM7_STR71x_IAR/serial/serial.c
index 1eab58ae2d..7b9a455cd5 100644
--- a/FreeRTOS/Demo/ARM7_STR71x_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_STR71x_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
index aca85b44b7..aa436d8d5b 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
index ac1aab0f0c..204deb3c44 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_GCC/main.c b/FreeRTOS/Demo/ARM7_STR75x_GCC/main.c
index 68b9a065de..64b760e1e3 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_GCC/main.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serial.c b/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serial.c
index 7cf59919fe..334469778a 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serialISR.c b/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serialISR.c
index 2f4eceb428..dd0e3efdb4 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serialISR.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_GCC/serial/serialISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
index f81eb54486..7297a08c2f 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
index ac1aab0f0c..204deb3c44 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_IAR/main.c b/FreeRTOS/Demo/ARM7_STR75x_IAR/main.c
index 2d95b93ae2..be5e03ac8f 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_IAR/main.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM7_STR75x_IAR/serial/serial.c b/FreeRTOS/Demo/ARM7_STR75x_IAR/serial/serial.c
index 6aa651f446..52d5967cd1 100644
--- a/FreeRTOS/Demo/ARM7_STR75x_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM7_STR75x_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h
index 7373605761..63a6f00c02 100644
--- a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c
index 20472c9d58..4f82b91bad 100644
--- a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/main.c b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/main.c
index 1ad6cf8674..6e4180c1ed 100644
--- a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/main.c
+++ b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c
index 479e3fa6b1..1ffd549198 100644
--- a/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
index 83fd15ebb1..7ebe422403 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
index 5d52523ceb..14b706389d 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h b/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h
index 692c2cecbc..0ec839e4f9 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/include/lwIPWebServer/BasicWEB.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c b/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c
index eab84c12be..2609f304f6 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/lwip/lwipWebServer/BasicWEB.c
@@ -1,6 +1,6 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/main.c b/FreeRTOS/Demo/ARM9_STR91X_IAR/main.c
index 59e42c994c..f8ce83f5ee 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/main.c
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/serial/serial.c b/FreeRTOS/Demo/ARM9_STR91X_IAR/serial/serial.c
index 45bdb67a8f..701fa40a65 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c b/FreeRTOS/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
index c94517b69b..f93059a2a3 100644
--- a/FreeRTOS/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR32_UC3/main.c b/FreeRTOS/Demo/AVR32_UC3/main.c
index 0ee393d1f6..54fe981ba0 100644
--- a/FreeRTOS/Demo/AVR32_UC3/main.c
+++ b/FreeRTOS/Demo/AVR32_UC3/main.c
@@ -30,7 +30,7 @@
*****************************************************************************/
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
index a72ad03530..13c22dad10 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
index 60b0ed8b31..33fa871b5f 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/main.c b/FreeRTOS/Demo/AVR_ATMega323_IAR/main.c
index 955e06f304..56cdbb0b80 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/main.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.c b/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.c
index 194a8c6a8c..9d0a5b2aca 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.h b/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.h
index 2dd7663c6b..10e137cfcc 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.h
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/regtest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_IAR/serial/serial.c b/FreeRTOS/Demo/AVR_ATMega323_IAR/serial/serial.c
index 48ff6f0416..ab4498a509 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
index 0ce8482cf2..5b3d6dea7d 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
index 9e1358553e..3c1b89e919 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/main.c b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/main.c
index fd7eb90ba9..5628305afa 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/main.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.c b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.c
index d03d6e0d9c..304a3e0e59 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.h b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.h
index 2dd7663c6b..10e137cfcc 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.h
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/regtest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/serial/serial.c b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/serial/serial.c
index a4e602c2b9..a2bb34d7e8 100644
--- a/FreeRTOS/Demo/AVR_ATMega323_WinAVR/serial/serial.c
+++ b/FreeRTOS/Demo/AVR_ATMega323_WinAVR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/FreeRTOSConfig.h
index f92cbddddb..dba5575496 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/ParTest.c b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/ParTest.c
index 069a2d1dd1..f868ee4644 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-blinky.c b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-blinky.c
index 969e07c073..6a47c65616 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-full.c b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-full.c
index cb0f813fda..732a1ffb5f 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/uIP_Task.c b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/uIP_Task.c
index cdaa20d127..0c46557fa9 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_IAR_and_Keil/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/FreeRTOSConfig.h
index 08d3d2e2b5..ae2e208b24 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/ParTest.c b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/ParTest.c
index 069a2d1dd1..f868ee4644 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-blinky.c b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-blinky.c
index f9d9dfccd6..a193ee38e8 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-full.c b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-full.c
index bcdf782f99..15db1554d2 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/uIP_Task.c b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/uIP_Task.c
index 9ba5d5a539..e3a5a2bb3d 100644
--- a/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_A2F200_SoftConsole/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c
index d5d8aad77c..7bc077fee7 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h
index b426d9b939..432b7c5180 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c
index 3483e80bca..95d770e7ad 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c
index 8e40b9421f..557ce2e0f7 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c
index b54af17295..8a0b97e38d 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S
index b251393b2c..d3b502f8fb 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c
index a2189fcf18..8535275638 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h
index 05695b937b..070f21b799 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c
index 04ce0256d5..cb07ce2e08 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c
index f88b38820f..ca84265577 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c
index 2bf333ff7a..60acc3d80d 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S
index 272d81a258..5e27fe78ff 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c
index ef77c27585..f004184e01 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c
index 6f1de4009d..419a1aaee2 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c
index 9767ae1b2e..f967ef7924 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
index ad684e213d..a776166843 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
index c08c251569..fef1972c97 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
index 863ce1d274..1b8e13fe12 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
index 789534ca06..cdbfe62782 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
index bef7de92f1..b8f5defe95 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S
index 272d81a258..5e27fe78ff 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c
index c8ff863d53..af6a14f7ef 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c
index d06c460d2b..b26f5ddab1 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
index 745a992bef..ba6608d3a1 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c
index d06c460d2b..b26f5ddab1 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c
index a5ccaa4c82..926256272b 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h
index e865a419c5..1a68c39258 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c
index e87e91f8c5..969fdf724b 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c
index 093650b7fe..730be69ec6 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c
index 09b7032c6e..9844f43211 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S
index d7b68821ed..59bb2e4ef4 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c
index c8ff863d53..af6a14f7ef 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
index 2d6ed0aa57..5c1582f624 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h
index 7e8252e67a..dbb57a05f4 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c
index a486805376..50d0c4677c 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
index 59a7d36be5..d10dfe6524 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c
index 4f2d918127..e72e126d8f 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c
index 036d670b3e..99e9c65560 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S
index 2a73e74d89..9e3f609251 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c
index 59a99ca0e2..62c8293b30 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Blinky-Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Blinky-Demo/main_blinky.c
index b85aecc9a6..21c96ac0cf 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Blinky-Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Blinky-Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOSConfig.h
index c38682af91..e3bfb8d804 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOS_tick_config.c
index dca5718fad..d011c8e53a 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-releated-CLI-commands.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-releated-CLI-commands.c
index 428ac5fe4a..b92c1bf9e2 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-releated-CLI-commands.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-releated-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-system-demo.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-system-demo.c
index 7f9419f745..f8297f753c 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-system-demo.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/File-system-demo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/Sample-CLI-commands.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/Sample-CLI-commands.c
index 0e6d76f932..82b3595972 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/Sample-CLI-commands.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.c
index 609bb346fd..9118636ba1 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.h b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.h
index d8e9262ed5..ae372be32b 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.h
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/UARTCommandConsole.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/main_full.c
index f45b8e4e6a..e4a6f4d811 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/reg_test.s b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/reg_test.s
index c0a6bc0e6d..36a7a3539c 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/reg_test.s
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/reg_test.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/serial.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/serial.c
index 1f17041a69..9f26822990 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/serial.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/Full-Demo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/LEDs.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/LEDs.c
index 45d275fe84..e490b2d51e 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/LEDs.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/main.c b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/main.c
index 42a42c5ceb..80f65422e2 100644
--- a/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/main.c
+++ b/FreeRTOS/Demo/CORTEX_A9_RZ_R7S72100_IAR_DS-5/Source/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c
index 90d0cb110f..6f42fe9cb7 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h
index f958dc68b8..aeafe69e89 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c
index 0b2507acc8..66fed90bbe 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c
index 3744bf96fa..c86424a729 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c
index c113594776..a4d4a61985 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S
index 2a73e74d89..9e3f609251 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c
index af78c480ab..0e3d65cd6a 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c
index dfeb9e0126..fa0c4b4bf8 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
index 861ca46c6e..d3bfd81093 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
index 1b000dbd6e..9c78d770bd 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
index f331909d57..c5febefd9d 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c
index efabe7379e..22097951fd 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c
index e8c05249eb..a07e648dd2 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h
index 98128f953d..23cf8cd796 100644
--- a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c
index 8ad6bc32ee..a81a7fbdae 100644
--- a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h
index 5d13f37208..f316716089 100644
--- a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h
+++ b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/main.c b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/main.c
index 419ac690b8..ba097c7667 100644
--- a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c
index faefb4a8cc..4e542ba8d8 100644
--- a/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c
index 74a3c58943..893193c4c6 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
index 71f30da7ea..94b3f28654 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h
index ed6f0bc5c0..49d9e14235 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c
index 596a25dc81..70b94237aa 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c
index 647f5cc22c..f9bf7fe1a9 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c
index 1952fbc19a..88a1ce4c93 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c
index a9d62ffc45..fb07dbf3ac 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c
index 0013969211..8a577e2354 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c
index 74a3c58943..893193c4c6 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
index 71f30da7ea..94b3f28654 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h
index ed6f0bc5c0..49d9e14235 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c
index 596a25dc81..70b94237aa 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c
index 647f5cc22c..f9bf7fe1a9 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c
index 1952fbc19a..88a1ce4c93 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c
index a9d62ffc45..fb07dbf3ac 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c
index 0fb7cfb7c5..af2f74229d 100644
--- a/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c
+++ b/FreeRTOS/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
index 077bc3f723..e062036f14 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c
index 8c4cbe4a1e..d3753aae4c 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h
index 2eddfe4cc6..93961f0045 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c
index 0396ea7015..20f5856e93 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c
index 13a5246aaf..a6146842cd 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c
index 04971c4f3e..573069d023 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c
index f678b945d5..6e5755e4f1 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
index 077bc3f723..e062036f14 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c
index 8c4cbe4a1e..d3753aae4c 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h
index 2eddfe4cc6..93961f0045 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c
index 0396ea7015..20f5856e93 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c
index 13a5246aaf..a6146842cd 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c
index 04971c4f3e..573069d023 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c
index f678b945d5..6e5755e4f1 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
index 077bc3f723..e062036f14 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c
index 8c4cbe4a1e..d3753aae4c 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h
index 2eddfe4cc6..93961f0045 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c
index 0396ea7015..20f5856e93 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c
index 13a5246aaf..a6146842cd 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c
index 04971c4f3e..573069d023 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c
index f678b945d5..6e5755e4f1 100644
--- a/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c
+++ b/FreeRTOS/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h
index 6bbfc0073c..2ec076f868 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
index 9b98823393..d110e1530a 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c
index 5f382cebe2..9a652c54cc 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c
index 8db7c46d6b..3005db0f25 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c
index 22d97653c6..526f313c24 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
index c7b7bd45ff..21878639f7 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c
index 683c0af733..504d2f53f1 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h
index dc8de7ee61..a7ee0149f0 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
index 171c69a85b..3f921989fc 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c
index 5f382cebe2..9a652c54cc 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
index c4eef11e08..5d41ce663e 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
index c7b7bd45ff..21878639f7 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c
index c9dbb1859a..b195b0d215 100644
--- a/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c
+++ b/FreeRTOS/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/CoreSupport/core_cm3.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/CoreSupport/core_cm3.c
deleted file mode 100644
index 56fddc52bf..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/CoreSupport/core_cm3.c
+++ /dev/null
@@ -1,784 +0,0 @@
-/**************************************************************************//**
- * @file core_cm3.c
- * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
- * @version V1.30
- * @date 30. October 2009
- *
- * @note
- * Copyright (C) 2009 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-
-#include <stdint.h>
-
-/* define compiler specific symbols */
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
-
-#endif
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-/**
- * @brief Return the Process Stack Pointer
- *
- * @return ProcessStackPointer
- *
- * Return the actual process stack pointer
- */
-__ASM uint32_t __get_PSP(void)
-{
- mrs r0, psp
- bx lr
-}
-
-/**
- * @brief Set the Process Stack Pointer
- *
- * @param topOfProcStack Process Stack Pointer
- *
- * Assign the value ProcessStackPointer to the MSP
- * (process stack pointer) Cortex processor register
- */
-__ASM void __set_PSP(uint32_t topOfProcStack)
-{
- msr psp, r0
- bx lr
-}
-
-/**
- * @brief Return the Main Stack Pointer
- *
- * @return Main Stack Pointer
- *
- * Return the current value of the MSP (main stack pointer)
- * Cortex processor register
- */
-__ASM uint32_t __get_MSP(void)
-{
- mrs r0, msp
- bx lr
-}
-
-/**
- * @brief Set the Main Stack Pointer
- *
- * @param topOfMainStack Main Stack Pointer
- *
- * Assign the value mainStackPointer to the MSP
- * (main stack pointer) Cortex processor register
- */
-__ASM void __set_MSP(uint32_t mainStackPointer)
-{
- msr msp, r0
- bx lr
-}
-
-/**
- * @brief Reverse byte order in unsigned short value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in unsigned short value
- */
-__ASM uint32_t __REV16(uint16_t value)
-{
- rev16 r0, r0
- bx lr
-}
-
-/**
- * @brief Reverse byte order in signed short value with sign extension to integer
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in signed short value with sign extension to integer
- */
-__ASM int32_t __REVSH(int16_t value)
-{
- revsh r0, r0
- bx lr
-}
-
-
-#if (__ARMCC_VERSION < 400000)
-
-/**
- * @brief Remove the exclusive lock created by ldrex
- *
- * Removes the exclusive lock which is created by ldrex.
- */
-__ASM void __CLREX(void)
-{
- clrex
-}
-
-/**
- * @brief Return the Base Priority value
- *
- * @return BasePriority
- *
- * Return the content of the base priority register
- */
-__ASM uint32_t __get_BASEPRI(void)
-{
- mrs r0, basepri
- bx lr
-}
-
-/**
- * @brief Set the Base Priority value
- *
- * @param basePri BasePriority
- *
- * Set the base priority register
- */
-__ASM void __set_BASEPRI(uint32_t basePri)
-{
- msr basepri, r0
- bx lr
-}
-
-/**
- * @brief Return the Priority Mask value
- *
- * @return PriMask
- *
- * Return state of the priority mask bit from the priority mask register
- */
-__ASM uint32_t __get_PRIMASK(void)
-{
- mrs r0, primask
- bx lr
-}
-
-/**
- * @brief Set the Priority Mask value
- *
- * @param priMask PriMask
- *
- * Set the priority mask bit in the priority mask register
- */
-__ASM void __set_PRIMASK(uint32_t priMask)
-{
- msr primask, r0
- bx lr
-}
-
-/**
- * @brief Return the Fault Mask value
- *
- * @return FaultMask
- *
- * Return the content of the fault mask register
- */
-__ASM uint32_t __get_FAULTMASK(void)
-{
- mrs r0, faultmask
- bx lr
-}
-
-/**
- * @brief Set the Fault Mask value
- *
- * @param faultMask faultMask value
- *
- * Set the fault mask register
- */
-__ASM void __set_FAULTMASK(uint32_t faultMask)
-{
- msr faultmask, r0
- bx lr
-}
-
-/**
- * @brief Return the Control Register value
- *
- * @return Control value
- *
- * Return the content of the control register
- */
-__ASM uint32_t __get_CONTROL(void)
-{
- mrs r0, control
- bx lr
-}
-
-/**
- * @brief Set the Control Register value
- *
- * @param control Control value
- *
- * Set the control register
- */
-__ASM void __set_CONTROL(uint32_t control)
-{
- msr control, r0
- bx lr
-}
-
-#endif /* __ARMCC_VERSION */
-
-
-
-#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#pragma diag_suppress=Pe940
-
-/**
- * @brief Return the Process Stack Pointer
- *
- * @return ProcessStackPointer
- *
- * Return the actual process stack pointer
- */
-uint32_t __get_PSP(void)
-{
- __ASM("mrs r0, psp");
- __ASM("bx lr");
-}
-
-/**
- * @brief Set the Process Stack Pointer
- *
- * @param topOfProcStack Process Stack Pointer
- *
- * Assign the value ProcessStackPointer to the MSP
- * (process stack pointer) Cortex processor register
- */
-void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM("msr psp, r0");
- __ASM("bx lr");
-}
-
-/**
- * @brief Return the Main Stack Pointer
- *
- * @return Main Stack Pointer
- *
- * Return the current value of the MSP (main stack pointer)
- * Cortex processor register
- */
-uint32_t __get_MSP(void)
-{
- __ASM("mrs r0, msp");
- __ASM("bx lr");
-}
-
-/**
- * @brief Set the Main Stack Pointer
- *
- * @param topOfMainStack Main Stack Pointer
- *
- * Assign the value mainStackPointer to the MSP
- * (main stack pointer) Cortex processor register
- */
-void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM("msr msp, r0");
- __ASM("bx lr");
-}
-
-/**
- * @brief Reverse byte order in unsigned short value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in unsigned short value
- */
-uint32_t __REV16(uint16_t value)
-{
- __ASM("rev16 r0, r0");
- __ASM("bx lr");
-}
-
-/**
- * @brief Reverse bit order of value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse bit order of value
- */
-uint32_t __RBIT(uint32_t value)
-{
- __ASM("rbit r0, r0");
- __ASM("bx lr");
-}
-
-/**
- * @brief LDR Exclusive (8 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 8 bit values)
- */
-uint8_t __LDREXB(uint8_t *addr)
-{
- __ASM("ldrexb r0, [r0]");
- __ASM("bx lr");
-}
-
-/**
- * @brief LDR Exclusive (16 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 16 bit values
- */
-uint16_t __LDREXH(uint16_t *addr)
-{
- __ASM("ldrexh r0, [r0]");
- __ASM("bx lr");
-}
-
-/**
- * @brief LDR Exclusive (32 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 32 bit values
- */
-uint32_t __LDREXW(uint32_t *addr)
-{
- __ASM("ldrex r0, [r0]");
- __ASM("bx lr");
-}
-
-/**
- * @brief STR Exclusive (8 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 8 bit values
- */
-uint32_t __STREXB(uint8_t value, uint8_t *addr)
-{
- __ASM("strexb r0, r0, [r1]");
- __ASM("bx lr");
-}
-
-/**
- * @brief STR Exclusive (16 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 16 bit values
- */
-uint32_t __STREXH(uint16_t value, uint16_t *addr)
-{
- __ASM("strexh r0, r0, [r1]");
- __ASM("bx lr");
-}
-
-/**
- * @brief STR Exclusive (32 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 32 bit values
- */
-uint32_t __STREXW(uint32_t value, uint32_t *addr)
-{
- __ASM("strex r0, r0, [r1]");
- __ASM("bx lr");
-}
-
-#pragma diag_default=Pe940
-
-
-#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/**
- * @brief Return the Process Stack Pointer
- *
- * @return ProcessStackPointer
- *
- * Return the actual process stack pointer
- */
-uint32_t __get_PSP(void) __attribute__( ( naked ) );
-uint32_t __get_PSP(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, psp\n\t"
- "MOV r0, %0 \n\t"
- "BX lr \n\t" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Process Stack Pointer
- *
- * @param topOfProcStack Process Stack Pointer
- *
- * Assign the value ProcessStackPointer to the MSP
- * (process stack pointer) Cortex processor register
- */
-void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
-void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0\n\t"
- "BX lr \n\t" : : "r" (topOfProcStack) );
-}
-
-/**
- * @brief Return the Main Stack Pointer
- *
- * @return Main Stack Pointer
- *
- * Return the current value of the MSP (main stack pointer)
- * Cortex processor register
- */
-uint32_t __get_MSP(void) __attribute__( ( naked ) );
-uint32_t __get_MSP(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, msp\n\t"
- "MOV r0, %0 \n\t"
- "BX lr \n\t" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Main Stack Pointer
- *
- * @param topOfMainStack Main Stack Pointer
- *
- * Assign the value mainStackPointer to the MSP
- * (main stack pointer) Cortex processor register
- */
-void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
-void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0\n\t"
- "BX lr \n\t" : : "r" (topOfMainStack) );
-}
-
-/**
- * @brief Return the Base Priority value
- *
- * @return BasePriority
- *
- * Return the content of the base priority register
- */
-uint32_t __get_BASEPRI(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Base Priority value
- *
- * @param basePri BasePriority
- *
- * Set the base priority register
- */
-void __set_BASEPRI(uint32_t value)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) );
-}
-
-/**
- * @brief Return the Priority Mask value
- *
- * @return PriMask
- *
- * Return state of the priority mask bit from the priority mask register
- */
-uint32_t __get_PRIMASK(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Priority Mask value
- *
- * @param priMask PriMask
- *
- * Set the priority mask bit in the priority mask register
- */
-void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
-}
-
-/**
- * @brief Return the Fault Mask value
- *
- * @return FaultMask
- *
- * Return the content of the fault mask register
- */
-uint32_t __get_FAULTMASK(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Fault Mask value
- *
- * @param faultMask faultMask value
- *
- * Set the fault mask register
- */
-void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
-}
-
-/**
- * @brief Return the Control Register value
-*
-* @return Control value
- *
- * Return the content of the control register
- */
-uint32_t __get_CONTROL(void)
-{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-/**
- * @brief Set the Control Register value
- *
- * @param control Control value
- *
- * Set the control register
- */
-void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) );
-}
-
-
-/**
- * @brief Reverse byte order in integer value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in integer value
- */
-uint32_t __REV(uint32_t value)
-{
- uint32_t result=0;
-
- __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-/**
- * @brief Reverse byte order in unsigned short value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in unsigned short value
- */
-uint32_t __REV16(uint16_t value)
-{
- uint32_t result=0;
-
- __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-/**
- * @brief Reverse byte order in signed short value with sign extension to integer
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse byte order in signed short value with sign extension to integer
- */
-int32_t __REVSH(int16_t value)
-{
- uint32_t result=0;
-
- __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-/**
- * @brief Reverse bit order of value
- *
- * @param value value to reverse
- * @return reversed value
- *
- * Reverse bit order of value
- */
-uint32_t __RBIT(uint32_t value)
-{
- uint32_t result=0;
-
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-/**
- * @brief LDR Exclusive (8 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 8 bit value
- */
-uint8_t __LDREXB(uint8_t *addr)
-{
- uint8_t result=0;
-
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-/**
- * @brief LDR Exclusive (16 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 16 bit values
- */
-uint16_t __LDREXH(uint16_t *addr)
-{
- uint16_t result=0;
-
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-/**
- * @brief LDR Exclusive (32 bit)
- *
- * @param *addr address pointer
- * @return value of (*address)
- *
- * Exclusive LDR command for 32 bit values
- */
-uint32_t __LDREXW(uint32_t *addr)
-{
- uint32_t result=0;
-
- __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-/**
- * @brief STR Exclusive (8 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 8 bit values
- */
-uint32_t __STREXB(uint8_t value, uint8_t *addr)
-{
- uint32_t result=0;
-
- __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-/**
- * @brief STR Exclusive (16 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 16 bit values
- */
-uint32_t __STREXH(uint16_t value, uint16_t *addr)
-{
- uint32_t result=0;
-
- __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-/**
- * @brief STR Exclusive (32 bit)
- *
- * @param value value to store
- * @param *addr address pointer
- * @return successful / failed
- *
- * Exclusive STR command for 32 bit values
- */
-uint32_t __STREXW(uint32_t value, uint32_t *addr)
-{
- uint32_t result=0;
-
- __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-
-#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
-/* TASKING carm specific functions */
-
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all instrinsics,
- * Including the CMSIS ones.
- */
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32.h
deleted file mode 100644
index 9518d72f20..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 Gxxx Device series
- *
- * This is a convenience header file for defining the EFM32 part number on the
- * build command line, instead of specifying the part specific header file.
- * @verbatim
- * Example: Add "-DEFM32G890F128" to your build options, to define part
- * Add "#include "EFM32G.h" to your source files
- * @endverbatim
- * @author Energy Micro AS
- * @version 1.0.2
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __EFM32_H
-#define __EFM32_H
-
-#if defined(EFM32G200F16)
-#include "efm32g200f16.h"
-
-#elif defined(EFM32G200F32)
-#include "efm32g200f32.h"
-
-#elif defined(EFM32G200F64)
-#include "efm32g200f64.h"
-
-#elif defined(EFM32G210F128)
-#include "efm32g210f128.h"
-
-#elif defined(EFM32G230F128)
-#include "efm32g230f128.h"
-
-#elif defined(EFM32G230F32)
-#include "efm32g230f32.h"
-
-#elif defined(EFM32G230F64)
-#include "efm32g230f64.h"
-
-#elif defined(EFM32G280F128)
-#include "efm32g280f128.h"
-
-#elif defined(EFM32G280F32)
-#include "efm32g280f32.h"
-
-#elif defined(EFM32G280F64)
-#include "efm32g280f64.h"
-
-#elif defined(EFM32G290F128)
-#include "efm32g290f128.h"
-
-#elif defined(EFM32G290F32)
-#include "efm32g290f32.h"
-
-#elif defined(EFM32G290F64)
-#include "efm32g290f64.h"
-
-#elif defined(EFM32G840F128)
-#include "efm32g840f128.h"
-
-#elif defined(EFM32G840F32)
-#include "efm32g840f32.h"
-
-#elif defined(EFM32G840F64)
-#include "efm32g840f64.h"
-
-#elif defined(EFM32G880F128)
-#include "efm32g880f128.h"
-
-#elif defined(EFM32G880F32)
-#include "efm32g880f32.h"
-
-#elif defined(EFM32G880F64)
-#include "efm32g880f64.h"
-
-#elif defined(EFM32G890F128)
-#include "efm32g890f128.h"
-
-#elif defined(EFM32G890F32)
-#include "efm32g890f32.h"
-
-#elif defined(EFM32G890F64)
-#include "efm32g890f64.h"
-
-#else
-#error "efm32.h: PART NUMBER undefined"
-#endif
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32g890f128.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32g890f128.h
deleted file mode 100644
index 7d4def48a7..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/efm32g890f128.h
+++ /dev/null
@@ -1,11665 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM EFM32G890F128
- * @author Energy Micro AS
- * @version 1.0.2
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __EFM32G890F128_H
-#define __EFM32G890F128_H
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128 EFM32G890F128
- * @{
- *****************************************************************************/
-
-/** Interrupt Number Definition */
-typedef enum IRQn
-{
-/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
- NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
- HardFault_IRQn = -13, /*!< 3 Cortex-M3 Hard Fault Interrupt */
- MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
- BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
- UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
- SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
- DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
- PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
- SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
-
-/****** EFM32G Peripheral Interrupt Numbers **************************************************/
- DMA_IRQn = 0, /*!< DMA Interrupt */
- GPIO_EVEN_IRQn = 1, /*!< GPIO_EVEN Interrupt */
- TIMER0_IRQn = 2, /*!< TIMER0 Interrupt */
- USART0_RX_IRQn = 3, /*!< USART0_RX Interrupt */
- USART0_TX_IRQn = 4, /*!< USART0_TX Interrupt */
- ACMP0_IRQn = 5, /*!< ACMP0 Interrupt */
- ADC0_IRQn = 6, /*!< ADC0 Interrupt */
- DAC0_IRQn = 7, /*!< DAC0 Interrupt */
- I2C0_IRQn = 8, /*!< I2C0 Interrupt */
- GPIO_ODD_IRQn = 9, /*!< GPIO_ODD Interrupt */
- TIMER1_IRQn = 10, /*!< TIMER1 Interrupt */
- TIMER2_IRQn = 11, /*!< TIMER2 Interrupt */
- USART1_RX_IRQn = 12, /*!< USART1_RX Interrupt */
- USART1_TX_IRQn = 13, /*!< USART1_TX Interrupt */
- USART2_RX_IRQn = 14, /*!< USART2_RX Interrupt */
- USART2_TX_IRQn = 15, /*!< USART2_TX Interrupt */
- UART0_RX_IRQn = 16, /*!< UART0_RX Interrupt */
- UART0_TX_IRQn = 17, /*!< UART0_TX Interrupt */
- LEUART0_IRQn = 18, /*!< LEUART0 Interrupt */
- LEUART1_IRQn = 19, /*!< LEUART1 Interrupt */
- LETIMER0_IRQn = 20, /*!< LETIMER0 Interrupt */
- PCNT0_IRQn = 21, /*!< PCNT0 Interrupt */
- PCNT1_IRQn = 22, /*!< PCNT1 Interrupt */
- PCNT2_IRQn = 23, /*!< PCNT2 Interrupt */
- RTC_IRQn = 24, /*!< RTC Interrupt */
- CMU_IRQn = 25, /*!< CMU Interrupt */
- VCMP_IRQn = 26, /*!< VCMP Interrupt */
- LCD_IRQn = 27, /*!< LCD Interrupt */
- MSC_IRQn = 28, /*!< MSC Interrupt */
- AES_IRQn = 29, /*!< AES Interrupt */
-} IRQn_Type;
-
-/**************************************************************************//**
- * @defgroup EFM32G890F128_Core EFM32G890F128 Core
- * @{
- *****************************************************************************/
-
-#define __MPU_PRESENT 1 /**< Presence of MPU */
-#define __NVIC_PRIO_BITS 3 /**< NVIC intterupt priority bits */
-#define __Vendor_SysTickConfig 0 /**< Is 1 if different SysTick counter is used */
-
-/**
- * @}
- */
-
-/**************************************************************************//**
-* @defgroup EFM32G890F128_Part EFM32G890F128 Part
-* @{
-******************************************************************************/
-
-#if !defined(EFM32G890F128)
-#define EFM32G890F128
-#endif
-
-/** Configure part number */
-#define PART_NUMBER "EFM32G890F128" /**< Part Number */
-
-/** Memory Base addresses and limits */
-#define EBI_MEM_BASE ((uint32_t) 0x80000000UL) /**< EBI base address */
-#define EBI_MEM_SIZE ((uint32_t) 0x10000000UL) /**< EBI available address space */
-#define EBI_MEM_END ((uint32_t) 0x8FFFFFFFUL) /**< EBI end address */
-#define EBI_MEM_BITS ((uint32_t) 0x28UL) /**< EBI used bits */
-#define AES_MEM_BASE ((uint32_t) 0x400E0000UL) /**< AES base address */
-#define AES_MEM_SIZE ((uint32_t) 0x400UL) /**< AES available address space */
-#define AES_MEM_END ((uint32_t) 0x400E03FFUL) /**< AES end address */
-#define AES_MEM_BITS ((uint32_t) 0x10UL) /**< AES used bits */
-#define PER_MEM_BASE ((uint32_t) 0x40000000UL) /**< PER base address */
-#define PER_MEM_SIZE ((uint32_t) 0xE0000UL) /**< PER available address space */
-#define PER_MEM_END ((uint32_t) 0x400DFFFFUL) /**< PER end address */
-#define PER_MEM_BITS ((uint32_t) 0x20UL) /**< PER used bits */
-#define RAM_MEM_BASE ((uint32_t) 0x20000000UL) /**< RAM base address */
-#define RAM_MEM_SIZE ((uint32_t) 0x8000UL) /**< RAM available address space */
-#define RAM_MEM_END ((uint32_t) 0x20007FFFUL) /**< RAM end address */
-#define RAM_MEM_BITS ((uint32_t) 0x15UL) /**< RAM used bits */
-#define RAM_CODE_MEM_BASE ((uint32_t) 0x10000000UL) /**< RAM_CODE base address */
-#define RAM_CODE_MEM_SIZE ((uint32_t) 0x4000UL) /**< RAM_CODE available address space */
-#define RAM_CODE_MEM_END ((uint32_t) 0x10003FFFUL) /**< RAM_CODE end address */
-#define RAM_CODE_MEM_BITS ((uint32_t) 0x14UL) /**< RAM_CODE used bits */
-#define FLASH_MEM_BASE ((uint32_t) 0x0UL) /**< FLASH base address */
-#define FLASH_MEM_SIZE ((uint32_t) 0x10000000UL) /**< FLASH available address space */
-#define FLASH_MEM_END ((uint32_t) 0xFFFFFFFUL) /**< FLASH end address */
-#define FLASH_MEM_BITS ((uint32_t) 0x28UL) /**< FLASH used bits */
-
-/** Flash and SRAM limits for EFM32G890F128 */
-#define FLASH_SIZE 0x00020000UL /**< Available flash memory */
-#define SRAM_SIZE 0x00004000UL /**< Available sram memory */
-#define __CM3_REV 0x200 /**< Cortex-M3 Core revision r2p0 */
-#define DPI_CHAN_COUNT 8 /**< Number of DPI channels */
-#define DMA_CHAN_COUNT 8 /**< Number of DMA channels */
-/* Part number capabilities */
-#define TIMER_PRESENT
-#define TIMER_COUNT 3
-#define TIMER_PARAM_DTI(i) (i == 0 ? 1 : i == 1 ? 0 : i == 2 ? 0 : 0)
-#define TIMER_PARAM_CCNUM(i) (i == 0 ? 3 : i == 1 ? 3 : i == 2 ? 3 : 0)
-#define USART_PRESENT
-#define USART_COUNT 3
-#define USART_PARAM_SC_AVAILABLE(i) (i == 0 ? 1 : i == 1 ? 1 : i == 2 ? 1 : 0)
-#define USART_PARAM_IRDA_AVAILABLE(i) (i == 0 ? 1 : i == 1 ? 0 : i == 2 ? 0 : 0)
-#define USART_PARAM_FULL_DATABIT_RANGE(i) (i == 0 ? 1 : i == 1 ? 1 : i == 2 ? 1 : 0)
-#define USART_PARAM_SYNC_AVAILABLE(i) (i == 0 ? 1 : i == 1 ? 1 : i == 2 ? 1 : 0)
-#define UART_PRESENT
-#define UART_COUNT 1
-#define UART_PARAM_SC_AVAILABLE(i) (i == 0 ? 0 : 0)
-#define UART_PARAM_IRDA_AVAILABLE(i) (i == 0 ? 0 : 0)
-#define UART_PARAM_FULL_DATABIT_RANGE(i) (i == 0 ? 0 : 0)
-#define UART_PARAM_SYNC_AVAILABLE(i) (i == 0 ? 0 : 0)
-#define LEUART_PRESENT
-#define LEUART_COUNT 2
-#define LETIMER_PRESENT
-#define LETIMER_COUNT 1
-#define PCNT_PRESENT
-#define PCNT_COUNT 3
-#define PCNT_PARAM_PCNT_WIDTH(i) (i == 0 ? 16 : i == 1 ? 8 : i == 2 ? 8 : 0)
-#define I2C_PRESENT
-#define I2C_COUNT 1
-#define ADC_PRESENT
-#define ADC_COUNT 1
-#define ADC_PARAM_RES(i) (i == 0 ? 12 : 0)
-#define DAC_PRESENT
-#define DAC_COUNT 1
-#define DAC_PARAM_RES(i) (i == 0 ? 12 : 0)
-#define ACMP_PRESENT
-#define ACMP_COUNT 2
-#define CM3_PRESENT
-#define CM3_COUNT 1
-#define CM3_FREE_PRESENT
-#define CM3_FREE_COUNT 1
-#define BUSMATRIX_PRESENT
-#define BUSMATRIX_COUNT 1
-#define DMEM_PRESENT
-#define DMEM_COUNT 1
-#define AHB2APB_PRESENT
-#define AHB2APB_COUNT 1
-#define LE_PRESENT
-#define LE_COUNT 1
-#define MSC_PRESENT
-#define MSC_COUNT 1
-#define EMU_PRESENT
-#define EMU_COUNT 1
-#define RMU_PRESENT
-#define RMU_COUNT 1
-#define CMU_PRESENT
-#define CMU_COUNT 1
-#define AES_PRESENT
-#define AES_COUNT 1
-#define EBI_PRESENT
-#define EBI_COUNT 1
-#define GPIO_PRESENT
-#define GPIO_COUNT 1
-#define PRS_PRESENT
-#define PRS_COUNT 1
-#define DMA_PRESENT
-#define DMA_COUNT 1
-#define VCMP_PRESENT
-#define VCMP_COUNT 1
-#define LCD_PRESENT
-#define LCD_COUNT 1
-#define LCD_PARAM_SEG_NUM 40
-#define LCD_PARAM_COM_NUM 4
-#define RTC_PRESENT
-#define RTC_COUNT 1
-#define HFXTAL_PRESENT
-#define HFXTAL_COUNT 1
-#define LFXTAL_PRESENT
-#define LFXTAL_COUNT 1
-#define WDOG_PRESENT
-#define WDOG_COUNT 1
-#define DBG_PRESENT
-#define DBG_COUNT 1
-#define TMODE_PRESENT
-#define TMODE_COUNT 1
-#define SCAN_PRESENT
-#define SCAN_COUNT 1
-
-/**
- * @}
- */
-
-/* Include CMSIS core functionality */
-#include "core_cm3.h"
-#include "system_efm32.h"
-#include <stdint.h>
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_Peripheral_TypeDefs EFM32G890F128 Peripheral TypeDefs
- * @{
- *
- *****************************************************************************/
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_MSC
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Memory System Control Register */
- __IO uint32_t READCTRL; /**< Read Control Register */
- __IO uint32_t WRITECTRL; /**< Write Control Register */
- __O uint32_t WRITECMD; /**< Write Command Register */
- __IO uint32_t ADDRB; /**< Page Erase/Write Address Buffer */
-
- uint32_t RESERVED0[1]; /**< Reserved for future use **/
- __IO uint32_t WDATA; /**< Write Data Register */
- __I uint32_t STATUS; /**< Status Register */
-
- uint32_t RESERVED1[3]; /**< Reserved for future use **/
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t LOCK; /**< Configuration Lock Register */
-} MSC_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_EMU
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t MEMCTRL; /**< Memory Control Register */
- __IO uint32_t LOCK; /**< Configuration Lock Register */
-
- uint32_t RESERVED0[3]; /**< Reserved for future use **/
- __IO uint32_t ATESTCTRL; /**< Analog Test Control Register */
-
- uint32_t RESERVED1[2]; /**< Reserved for future use **/
- __IO uint32_t AUXCTRL; /**< Auxiliary Control Register */
-} EMU_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_RMU
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __I uint32_t RSTCAUSE; /**< Reset Cause Register */
- __O uint32_t CMD; /**< Command Register */
-} RMU_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_CMU
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< CMU Control Register */
- __IO uint32_t HFCORECLKDIV; /**< High Frequency Core Clock Division Register */
- __IO uint32_t HFPERCLKDIV; /**< High Frequency Peripheral Clock Division Register */
- __IO uint32_t HFRCOCTRL; /**< HFRCO Control Register */
- __IO uint32_t LFRCOCTRL; /**< LFRCO Control Register */
- __IO uint32_t AUXHFRCOCTRL; /**< AUXHFRCO Control Register */
- __IO uint32_t CALCTRL; /**< Calibration Control Register */
- __IO uint32_t CALCNT; /**< Calibration Counter Register */
- __O uint32_t OSCENCMD; /**< Oscillator Enable/Disable Command Register */
- __O uint32_t CMD; /**< Command Register */
- __IO uint32_t LFCLKSEL; /**< Low Frequency Clock Select Register */
- __I uint32_t STATUS; /**< Status Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t HFCORECLKEN0; /**< High Frequency Core Clock Enable Register 0 */
- __IO uint32_t HFPERCLKEN0; /**< High Frequency Peripheral Clock Enable Register 0 */
- uint32_t RESERVED0[2]; /**< Reserved for future use **/
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
- __IO uint32_t FREEZE; /**< Freeze Register */
- __IO uint32_t LFACLKEN0; /**< Low Frequency A Clock Enable Register 0 */
- uint32_t RESERVED1[1]; /**< Reserved for future use **/
- __IO uint32_t LFBCLKEN0; /**< Low Frequency B Clock Enable Register 0 */
- uint32_t RESERVED2[1]; /**< Reserved for future use **/
- __IO uint32_t LFAPRESC0; /**< Low Frequency A Prescaler Register 0 */
- uint32_t RESERVED3[1]; /**< Reserved for future use **/
- __IO uint32_t LFBPRESC0; /**< Low Frequency B Prescaler Register 0 */
- uint32_t RESERVED4[1]; /**< Reserved for future use **/
- __IO uint32_t PCNTCTRL; /**< PCNT Control Register */
- __IO uint32_t LCDCTRL; /**< LCD Control Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
- __IO uint32_t LOCK; /**< Configuration Lock Register */
-} CMU_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_AES
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t DATA; /**< DATA Register */
- __IO uint32_t XORDATA; /**< XORDATA Register */
- uint32_t RESERVED0[3]; /**< Reserved for future use **/
- __IO uint32_t KEYLA; /**< KEY Low Register */
- __IO uint32_t KEYLB; /**< KEY Low Register */
- __IO uint32_t KEYLC; /**< KEY Low Register */
- __IO uint32_t KEYLD; /**< KEY Low Register */
- __IO uint32_t KEYHA; /**< KEY High Register */
- __IO uint32_t KEYHB; /**< KEY High Register */
- __IO uint32_t KEYHC; /**< KEY High Register */
- __IO uint32_t KEYHD; /**< KEY High Register */
-} AES_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_EBI
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t ADDRTIMING; /**< Address Timing Register */
- __IO uint32_t RDTIMING; /**< Read Timing Register */
- __IO uint32_t WRTIMING; /**< Write Timing Register */
- __IO uint32_t POLARITY; /**< Polarity Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} EBI_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * P
- *
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Port Control Register */
- __IO uint32_t MODEL; /**< Port Pin Mode Low Register */
- __IO uint32_t MODEH; /**< Port Pin Mode High Register */
- __IO uint32_t DOUT; /**< Port Data Out Register */
- __O uint32_t DOUTSET; /**< Port Data Out Set Register */
- __O uint32_t DOUTCLR; /**< Port Data Out Clear Register */
- __O uint32_t DOUTTGL; /**< Port Data Out Toggle Register */
- __I uint32_t DIN; /**< Port Data In Register */
- __IO uint32_t PINLOCKN; /**< Port Unlocked Pins Register */
-} GPIO_P_TypeDef;
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_GPIO
- * @{
- *****************************************************************************/
-typedef struct
-{
- GPIO_P_TypeDef P[6]; /**< Port configuration bits */
-
- uint32_t RESERVED0[10]; /**< Reserved for future use **/
- __IO uint32_t EXTIPSELL; /**< External Interrupt Port Select Low Register */
- __IO uint32_t EXTIPSELH; /**< External Interrupt Port Select High Register */
- __IO uint32_t EXTIRISE; /**< External Interrupt Rising Edge Trigger Register */
- __IO uint32_t EXTIFALL; /**< External Interrupt Falling Edge Trigger Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
-
- __IO uint32_t ROUTE; /**< I/O Routing Register */
- __IO uint32_t INSENSE; /**< Input Sense Register */
- __IO uint32_t LOCK; /**< Configuration Lock Register */
-} GPIO_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * CH
- *
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Channel Control Register */
-} PRS_CH_TypeDef;
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_PRS
- * @{
- *****************************************************************************/
-typedef struct
-{
- __O uint32_t SWPULSE; /**< Software Pulse Register */
- __IO uint32_t SWLEVEL; /**< Software Level Register */
-
- uint32_t RESERVED0[2]; /**< Reserved registers */
-
- PRS_CH_TypeDef CH[8]; /**< Channel registers */
-} PRS_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * CH
- *
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Channel Control Register */
-} DMA_CH_TypeDef;
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_DMA
- * @{
- *****************************************************************************/
-typedef struct
-{
- __I uint32_t STATUS; /**< DMA Status Registers */
- __IO uint32_t CONFIG; /**< DMA Configuration Register */
- __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */
- __I uint32_t ALTCTRLBASE; /**< Channel Alternate Control Data Base Pointer Register */
- __I uint32_t WAITSTATUS; /**< Channel Wait on Request Status Register */
- __O uint32_t CHSWREQ; /**< Channel Software Request Register */
- __O uint32_t CHUSEBURSTS; /**< Channel Useburst Set Register */
- __O uint32_t CHUSEBURSTC; /**< Channel Useburst Clear Register */
- __O uint32_t CHREQMASKS; /**< Channel Request Mask Set Register */
- __O uint32_t CHREQMASKC; /**< Channel Request Mask Clear Register */
- __O uint32_t CHENS; /**< Channel Enable Set Register */
- __O uint32_t CHENC; /**< Channel Enable Clear Register */
- __O uint32_t CHALTS; /**< Channel Alternate Set Register */
- __O uint32_t CHALTC; /**< Channel Alternate Clear Register */
- __O uint32_t CHPRIS; /**< Channel Priority Set Register */
- __O uint32_t CHPRIC; /**< Channel Priority Clear Register */
- uint32_t RESERVED0[3]; /**< Reserved for future use **/
- __IO uint32_t ERRORC; /**< Bus Error Clear Register */
-
- uint32_t RESERVED1[1004]; /**< Reserved for future use **/
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable register */
-
- uint32_t RESERVED2[60]; /**< Reserved registers */
-
- DMA_CH_TypeDef CH[8]; /**< Channel registers */
-} DMA_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * CC
- *
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< CC Channel Control Register */
- __IO uint32_t CCV; /**< CC Channel Value Register */
- __I uint32_t CCVP; /**< CC Channel Value Peek Register */
- __IO uint32_t CCVB; /**< CC Channel Buffer Register */
-} TIMER_CC_TypeDef;
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_TIMER
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t TOP; /**< Counter Top Value Register */
- __IO uint32_t TOPB; /**< Counter Top Value Buffer Register */
- __IO uint32_t CNT; /**< Counter Value Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-
- uint32_t RESERVED0[1]; /**< Reserved registers */
-
- TIMER_CC_TypeDef CC[3]; /**< Compare/Capture Channel */
-
- uint32_t RESERVED1[4]; /**< Reserved for future use **/
- __IO uint32_t DTCTRL; /**< DTI Control Register */
- __IO uint32_t DTTIME; /**< DTI Time Control Register */
- __IO uint32_t DTFC; /**< DTI Fault Configuration Register */
- __IO uint32_t DTOGEN; /**< DTI Output Generation Enable Register */
- __IO uint32_t DTFAULT; /**< DTI Fault Register */
- __O uint32_t DTFAULTC; /**< DTI Fault Clear Register */
- __IO uint32_t DTLOCK; /**< DTI Configuration Lock Register */
-} TIMER_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_USART
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t FRAME; /**< USART Frame Format Register */
- __IO uint32_t TRIGCTRL; /**< USART Trigger Control register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< USART Status Register */
- __IO uint32_t CLKDIV; /**< Clock Control Register */
- __I uint32_t RXDATAX; /**< RX Buffer Data Extended Register */
- __I uint32_t RXDATA; /**< RX Buffer Data Register */
- __I uint32_t RXDOUBLEX; /**< RX Buffer Double Data Extended Register */
- __I uint32_t RXDOUBLE; /**< RX FIFO Double Data Register */
- __I uint32_t RXDATAXP; /**< RX Buffer Data Extended Peek Register */
- __I uint32_t RXDOUBLEXP; /**< RX Buffer Double Data Extended Peek Register */
- __O uint32_t TXDATAX; /**< TX Buffer Data Extended Register */
- __O uint32_t TXDATA; /**< TX Buffer Data Register */
- __O uint32_t TXDOUBLEX; /**< TX Buffer Double Data Extended Register */
- __O uint32_t TXDOUBLE; /**< TX Buffer Double Data Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t IRCTRL; /**< IrDA Control Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} USART_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_LEUART
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t CLKDIV; /**< Clock Control Register */
- __IO uint32_t STARTFRAME; /**< Start Frame Register */
- __IO uint32_t SIGFRAME; /**< Signal Frame Register */
- __I uint32_t RXDATAX; /**< Receive Buffer Data Extended Register */
- __I uint32_t RXDATA; /**< Receive Buffer Data Register */
- __I uint32_t RXDATAXP; /**< Receive Buffer Data Extended Peek Register */
- __O uint32_t TXDATAX; /**< Transmit Buffer Data Extended Register */
- __O uint32_t TXDATA; /**< Transmit Buffer Data Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t PULSECTRL; /**< Pulse Control Register */
-
- __IO uint32_t FREEZE; /**< Freeze Register */
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-
- uint32_t RESERVED0[3]; /**< Reserved for future use **/
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} LEUART_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_LETIMER
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __I uint32_t CNT; /**< Counter Value Register */
- __IO uint32_t COMP0; /**< Compare Value Register 0 */
- __IO uint32_t COMP1; /**< Compare Value Register 1 */
- __IO uint32_t REP0; /**< Repeat Counter Register 0 */
- __IO uint32_t REP1; /**< Repeat Counter Register 1 */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
-
- __IO uint32_t FREEZE; /**< Freeze Register */
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-
- uint32_t RESERVED0[2]; /**< Reserved for future use **/
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} LETIMER_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_PCNT
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __I uint32_t CNT; /**< Counter Value Register */
- __I uint32_t TOP; /**< Top Value Register */
- __IO uint32_t TOPB; /**< Top Value Buffer Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-
- __IO uint32_t FREEZE; /**< Freeze Register */
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-} PCNT_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_I2C
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATE; /**< State Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t CLKDIV; /**< Clock Division Register */
- __IO uint32_t SADDR; /**< Slave Address Register */
- __IO uint32_t SADDRMASK; /**< Slave Address Mask Register */
- __I uint32_t RXDATA; /**< Receive Buffer Data Register */
- __I uint32_t RXDATAP; /**< Receive Buffer Data Peek Register */
- __O uint32_t TXDATA; /**< Transmit Buffer Data Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} I2C_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_ADC
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t SINGLECTRL; /**< Single Sample Control Register */
- __IO uint32_t SCANCTRL; /**< Scan Control Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __I uint32_t SINGLEDATA; /**< Single Conversion Result Data */
- __I uint32_t SCANDATA; /**< Scan Conversion Result Data */
- __I uint32_t SINGLEDATAP; /**< Single Conversion Result Data Peek Register */
- __I uint32_t SCANDATAP; /**< Scan Sequence Result Data Peek Register */
- __IO uint32_t CAL; /**< Calibration Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
- __IO uint32_t BIASPROG; /**< Bias Programming Register */
-} ADC_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_DAC
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t CH0CTRL; /**< Channel 0 Control Register */
- __IO uint32_t CH1CTRL; /**< Channel 1 Control Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t CH0DATA; /**< Channel 0 Data Register */
- __IO uint32_t CH1DATA; /**< Channel 1 Data Register */
- __O uint32_t COMBDATA; /**< Combined Data Register */
- __IO uint32_t CAL; /**< Calibration Register */
- __IO uint32_t BIASPROG; /**< Bias Programming Register */
-} DAC_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_ACMP
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t INPUTSEL; /**< Input Selection Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t ROUTE; /**< I/O Routing Register */
-} ACMP_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_VCMP
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t INPUTSEL; /**< Input Selection Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
-} VCMP_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_LCD
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __IO uint32_t DISPCTRL; /**< Display Control Register */
- __IO uint32_t SEGEN; /**< Segment Enable Register */
- __IO uint32_t BACTRL; /**< Blink and Animation Control Register */
- __I uint32_t STATUS; /**< Status Register */
- __IO uint32_t AREGA; /**< Animation Register A */
- __IO uint32_t AREGB; /**< Animation Register B */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
-
- uint32_t RESERVED0[5]; /**< Reserved for future use **/
- __IO uint32_t SEGD0L; /**< Segment Data Low Register 0 */
- __IO uint32_t SEGD1L; /**< Segment Data Low Register 1 */
- __IO uint32_t SEGD2L; /**< Segment Data Low Register 2 */
- __IO uint32_t SEGD3L; /**< Segment Data Low Register 3 */
- __IO uint32_t SEGD0H; /**< Segment Data High Register 0 */
- __IO uint32_t SEGD1H; /**< Segment Data High Register 1 */
- __IO uint32_t SEGD2H; /**< Segment Data High Register 2 */
- __IO uint32_t SEGD3H; /**< Segment Data High Register 3 */
-
- __IO uint32_t FREEZE; /**< Freeze Register */
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-} LCD_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_RTC
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __I uint32_t CNT; /**< Counter Value Register */
- __IO uint32_t COMP0; /**< Compare Value Register 0 */
- __IO uint32_t COMP1; /**< Compare Value Register 1 */
- __I uint32_t IF; /**< Interrupt Flag Register */
- __O uint32_t IFS; /**< Interrupt Flag Set Register */
- __O uint32_t IFC; /**< Interrupt Flag Clear Register */
- __IO uint32_t IEN; /**< Interrupt Enable Register */
-
- __IO uint32_t FREEZE; /**< Freeze Register */
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-} RTC_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_WDOG
- * @{
- *****************************************************************************/
-typedef struct
-{
- __IO uint32_t CTRL; /**< Control Register */
- __O uint32_t CMD; /**< Command Register */
-
- __I uint32_t SYNCBUSY; /**< Synchronization Busy Register */
-} WDOG_TypeDef; /** @} */
-
-/**
- * @}
- */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_DEVINFO
- * @{
- *****************************************************************************/
-typedef struct
-{
- __I uint32_t UNIQUEL; /**< Low 32 bits of device unique number */
- __I uint32_t UNIQUEH; /**< High 32 bits of device unique number */
- __I uint32_t MSIZE; /**< Flash and SRAM Memory size in KiloBytes */
- __I uint32_t PART; /**< Part description */
-} DEVINFO_TypeDef; /** @} */
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_CALIBRATE
- * @{
- *****************************************************************************/
-#define CALIBRATE_MAX_REGISTERS 50 /**< Max number of address/value pairs for calibration */
-
-typedef struct
-{
- __I uint32_t ADDRESS; /**< Address of calibration register */
- __I uint32_t VALUE; /**< Default value for calibration register */
-} CALIBRATE_TypeDef; /** @} */
-
-/** Special calibration registers */
-#define HFRCO_CALIBH (*(volatile uint32_t *) 0x0FE081DCUL) /**< Calibration value for HFRCO 28 Mhz */
-#define HFRCO_CALIBL (*(volatile uint32_t *) 0x0FE081E0UL) /**< Calibration value for HFRCO 1/7/11/21 Mhz */
-#define ADC_CALIB (*(volatile uint32_t *) 0x0FE081E4UL) /**< ADC temperature for calibration and result */
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_Peripheral_Base EFM32G890F128 Peripheral Base Addresses
- * @{
- *****************************************************************************/
-
-#define MSC_BASE (0x400C0000) /**< MSC base address */
-#define EMU_BASE (0x400C6000) /**< EMU base address */
-#define RMU_BASE (0x400CA000) /**< RMU base address */
-#define CMU_BASE (0x400C8000) /**< CMU base address */
-#define AES_BASE (0x400E0000) /**< AES base address */
-#define EBI_BASE (0x40008000) /**< EBI base address */
-#define GPIO_BASE (0x40006000) /**< GPIO base address */
-#define PRS_BASE (0x400CC000) /**< PRS base address */
-#define DMA_BASE (0x400C2000) /**< DMA base address */
-#define TIMER0_BASE (0x40010000) /**< TIMER0 base address */
-#define TIMER1_BASE (0x40010400) /**< TIMER1 base address */
-#define TIMER2_BASE (0x40010800) /**< TIMER2 base address */
-#define USART0_BASE (0x4000C000) /**< USART0 base address */
-#define USART1_BASE (0x4000C400) /**< USART1 base address */
-#define USART2_BASE (0x4000C800) /**< USART2 base address */
-#define UART0_BASE (0x4000E000) /**< UART0 base address */
-#define LEUART0_BASE (0x40084000) /**< LEUART0 base address */
-#define LEUART1_BASE (0x40084400) /**< LEUART1 base address */
-#define LETIMER0_BASE (0x40082000) /**< LETIMER0 base address */
-#define PCNT0_BASE (0x40086000) /**< PCNT0 base address */
-#define PCNT1_BASE (0x40086400) /**< PCNT1 base address */
-#define PCNT2_BASE (0x40086800) /**< PCNT2 base address */
-#define I2C0_BASE (0x4000A000) /**< I2C0 base address */
-#define ADC0_BASE (0x40002000) /**< ADC0 base address */
-#define DAC0_BASE (0x40004000) /**< DAC0 base address */
-#define ACMP0_BASE (0x40001000) /**< ACMP0 base address */
-#define ACMP1_BASE (0x40001400) /**< ACMP1 base address */
-#define VCMP_BASE (0x40000000) /**< VCMP base address */
-#define LCD_BASE (0x4008A000) /**< LCD base address */
-#define RTC_BASE (0x40080000) /**< RTC base address */
-#define WDOG_BASE (0x40088000) /**< WDOG base address */
-#define DEVINFO_BASE (0x0FE081F0UL) /**< DEVINFO base address */
-#define CALIBRATE_BASE (0x0FE08000UL) /**< CALIBRATE base address */
-/**
- * @}
- */
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_Peripheral_Declaration EFM32G890F128 Peripheral Declaration
- * @{
- *****************************************************************************/
-
-#define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */
-#define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */
-#define RMU ((RMU_TypeDef *) RMU_BASE) /**< RMU base pointer */
-#define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */
-#define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */
-#define EBI ((EBI_TypeDef *) EBI_BASE) /**< EBI base pointer */
-#define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */
-#define PRS ((PRS_TypeDef *) PRS_BASE) /**< PRS base pointer */
-#define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */
-#define TIMER0 ((TIMER_TypeDef *) TIMER0_BASE) /**< TIMER0 base pointer */
-#define TIMER1 ((TIMER_TypeDef *) TIMER1_BASE) /**< TIMER1 base pointer */
-#define TIMER2 ((TIMER_TypeDef *) TIMER2_BASE) /**< TIMER2 base pointer */
-#define USART0 ((USART_TypeDef *) USART0_BASE) /**< USART0 base pointer */
-#define USART1 ((USART_TypeDef *) USART1_BASE) /**< USART1 base pointer */
-#define USART2 ((USART_TypeDef *) USART2_BASE) /**< USART2 base pointer */
-#define UART0 ((USART_TypeDef *) UART0_BASE) /**< UART0 base pointer */
-#define LEUART0 ((LEUART_TypeDef *) LEUART0_BASE) /**< LEUART0 base pointer */
-#define LEUART1 ((LEUART_TypeDef *) LEUART1_BASE) /**< LEUART1 base pointer */
-#define LETIMER0 ((LETIMER_TypeDef *) LETIMER0_BASE) /**< LETIMER0 base pointer */
-#define PCNT0 ((PCNT_TypeDef *) PCNT0_BASE) /**< PCNT0 base pointer */
-#define PCNT1 ((PCNT_TypeDef *) PCNT1_BASE) /**< PCNT1 base pointer */
-#define PCNT2 ((PCNT_TypeDef *) PCNT2_BASE) /**< PCNT2 base pointer */
-#define I2C0 ((I2C_TypeDef *) I2C0_BASE) /**< I2C0 base pointer */
-#define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
-#define DAC0 ((DAC_TypeDef *) DAC0_BASE) /**< DAC0 base pointer */
-#define ACMP0 ((ACMP_TypeDef *) ACMP0_BASE) /**< ACMP0 base pointer */
-#define ACMP1 ((ACMP_TypeDef *) ACMP1_BASE) /**< ACMP1 base pointer */
-#define VCMP ((VCMP_TypeDef *) VCMP_BASE) /**< VCMP base pointer */
-#define LCD ((LCD_TypeDef *) LCD_BASE) /**< LCD base pointer */
-#define RTC ((RTC_TypeDef *) RTC_BASE) /**< RTC base pointer */
-#define WDOG ((WDOG_TypeDef *) WDOG_BASE) /**< WDOG base pointer */
-#define DEVINFO ((DEVINFO_TypeDef *) DEVINFO_BASE) /**< DEVINFO base pointer */
-#define CALIBRATE ((CALIBRATE_TypeDef *) CALIBRATE_BASE) /**< CALIBRATE base pointer */
-/**
- * @}
- */
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_BitFields EFM32G890F128 Bit Fields
- * @{
- *****************************************************************************/
-
-/**************************************************************************//**
- *
- * @addtogroup EFM32G890F128_PRS
- * @{
- *****************************************************************************/
-
-#define PRS_VCMP_OUT ((1 << 16) + 0) /**< PRS Voltage comparator output */
-#define PRS_ACMP0_OUT ((2 << 16) + 0) /**< PRS Analog comparator output */
-#define PRS_ACMP1_OUT ((3 << 16) + 0) /**< PRS Analog comparator output */
-#define PRS_DAC0_CH0 ((6 << 16) + 0) /**< PRS DAC ch0 conversion done */
-#define PRS_DAC0_CH1 ((6 << 16) + 1) /**< PRS DAC ch1 conversion done */
-#define PRS_ADC0_SINGLE ((8 << 16) + 0) /**< PRS ADC single conversion done */
-#define PRS_ADC0_SCAN ((8 << 16) + 1) /**< PRS ADC scan conversion done */
-#define PRS_USART0_IRTX ((16 << 16) + 0) /**< PRS USART 0 IRDA out */
-#define PRS_USART0_TXC ((16 << 16) + 1) /**< PRS USART 0 TX complete */
-#define PRS_USART0_RXDATAV ((16 << 16) + 2) /**< PRS USART 0 RX Data Valid */
-#define PRS_USART1_IRTX ((17 << 16) + 0) /**< PRS USART 1 IRDA out */
-#define PRS_USART1_TXC ((17 << 16) + 1) /**< PRS USART 1 TX complete */
-#define PRS_USART1_RXDATAV ((17 << 16) + 2) /**< PRS USART 1 RX Data Valid */
-#define PRS_USART2_IRTX ((18 << 16) + 0) /**< PRS USART 2 IRDA out */
-#define PRS_USART2_TXC ((18 << 16) + 1) /**< PRS USART 2 TX complete */
-#define PRS_USART2_RXDATAV ((18 << 16) + 2) /**< PRS USART 2 RX Data Valid */
-#define PRS_TIMER0_UF ((28 << 16) + 0) /**< PRS Timer 0 Underflow */
-#define PRS_TIMER0_OF ((28 << 16) + 1) /**< PRS Timer 0 Overflow */
-#define PRS_TIMER0_CC0 ((28 << 16) + 2) /**< PRS Timer 0 Compare/Capture 0 */
-#define PRS_TIMER0_CC1 ((28 << 16) + 3) /**< PRS Timer 0 Compare/Capture 1 */
-#define PRS_TIMER0_CC2 ((28 << 16) + 4) /**< PRS Timer 0 Compare/Capture 2 */
-#define PRS_TIMER1_UF ((29 << 16) + 0) /**< PRS Timer 1 Underflow */
-#define PRS_TIMER1_OF ((29 << 16) + 1) /**< PRS Timer 1 Overflow */
-#define PRS_TIMER1_CC0 ((29 << 16) + 2) /**< PRS Timer 1 Compare/Capture 0 */
-#define PRS_TIMER1_CC1 ((29 << 16) + 3) /**< PRS Timer 1 Compare/Capture 1 */
-#define PRS_TIMER1_CC2 ((29 << 16) + 4) /**< PRS Timer 1 Compare/Capture 2 */
-#define PRS_TIMER2_UF ((30 << 16) + 0) /**< PRS Timer 2 Underflow */
-#define PRS_TIMER2_OF ((30 << 16) + 1) /**< PRS Timer 2 Overflow */
-#define PRS_TIMER2_CC0 ((30 << 16) + 2) /**< PRS Timer 2 Compare/Capture 0 */
-#define PRS_TIMER2_CC1 ((30 << 16) + 3) /**< PRS Timer 2 Compare/Capture 1 */
-#define PRS_TIMER2_CC2 ((30 << 16) + 4) /**< PRS Timer 2 Compare/Capture 2 */
-#define PRS_RTC_OF ((40 << 16) + 0) /**< PRS RTC Overflow */
-#define PRS_RTC_COMP0 ((40 << 16) + 1) /**< PRS RTC Compare 0 */
-#define PRS_RTC_COMP1 ((40 << 16) + 2) /**< PRS RTC Compare 1 */
-#define PRS_UART0_IRTX ((41 << 16) + 0) /**< PRS USART 0 IRDA out */
-#define PRS_UART0_TXC ((41 << 16) + 1) /**< PRS USART 0 TX complete */
-#define PRS_UART0_RXDATAV ((41 << 16) + 2) /**< PRS USART 0 RX Data Valid */
-#define PRS_GPIO_PIN0 ((48 << 16) + 0) /**< PRS GPIO pin 0 */
-#define PRS_GPIO_PIN1 ((48 << 16) + 1) /**< PRS GPIO pin 1 */
-#define PRS_GPIO_PIN2 ((48 << 16) + 2) /**< PRS GPIO pin 2 */
-#define PRS_GPIO_PIN3 ((48 << 16) + 3) /**< PRS GPIO pin 3 */
-#define PRS_GPIO_PIN4 ((48 << 16) + 4) /**< PRS GPIO pin 4 */
-#define PRS_GPIO_PIN5 ((48 << 16) + 5) /**< PRS GPIO pin 5 */
-#define PRS_GPIO_PIN6 ((48 << 16) + 6) /**< PRS GPIO pin 6 */
-#define PRS_GPIO_PIN7 ((48 << 16) + 7) /**< PRS GPIO pin 7 */
-#define PRS_GPIO_PIN8 ((49 << 16) + 0) /**< PRS GPIO pin 8 */
-#define PRS_GPIO_PIN9 ((49 << 16) + 1) /**< PRS GPIO pin 9 */
-#define PRS_GPIO_PIN10 ((49 << 16) + 2) /**< PRS GPIO pin 10 */
-#define PRS_GPIO_PIN11 ((49 << 16) + 3) /**< PRS GPIO pin 11 */
-#define PRS_GPIO_PIN12 ((49 << 16) + 4) /**< PRS GPIO pin 12 */
-#define PRS_GPIO_PIN13 ((49 << 16) + 5) /**< PRS GPIO pin 13 */
-#define PRS_GPIO_PIN14 ((49 << 16) + 6) /**< PRS GPIO pin 14 */
-#define PRS_GPIO_PIN15 ((49 << 16) + 7) /**< PRS GPIO pin 15 */
-
-/**
- * @}
- */
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_DMA_Channel_Select EFM32G890F128 DMA Channel Select
- * @{
- *****************************************************************************/
-#define DMAREQ_ADC0_SINGLE ((8 << 16) + 0) /**< DMA channel select for ADC0_SINGLE */
-#define DMAREQ_ADC0_SCAN ((8 << 16) + 1) /**< DMA channel select for ADC0_SCAN */
-#define DMAREQ_DAC0_CH0 ((10 << 16) + 0) /**< DMA channel select for DAC0_CH0 */
-#define DMAREQ_DAC0_CH1 ((10 << 16) + 1) /**< DMA channel select for DAC0_CH1 */
-#define DMAREQ_USART0_RXDATAV ((12 << 16) + 0) /**< DMA channel select for USART0_RXDATAV */
-#define DMAREQ_USART0_TXBL ((12 << 16) + 1) /**< DMA channel select for USART0_TXBL */
-#define DMAREQ_USART0_TXEMPTY ((12 << 16) + 2) /**< DMA channel select for USART0_TXEMPTY */
-#define DMAREQ_USART1_RXDATAV ((13 << 16) + 0) /**< DMA channel select for USART1_RXDATAV */
-#define DMAREQ_USART1_TXBL ((13 << 16) + 1) /**< DMA channel select for USART1_TXBL */
-#define DMAREQ_USART1_TXEMPTY ((13 << 16) + 2) /**< DMA channel select for USART1_TXEMPTY */
-#define DMAREQ_USART2_RXDATAV ((14 << 16) + 0) /**< DMA channel select for USART2_RXDATAV */
-#define DMAREQ_USART2_TXBL ((14 << 16) + 1) /**< DMA channel select for USART2_TXBL */
-#define DMAREQ_USART2_TXEMPTY ((14 << 16) + 2) /**< DMA channel select for USART2_TXEMPTY */
-#define DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0) /**< DMA channel select for LEUART0_RXDATAV */
-#define DMAREQ_LEUART0_TXBL ((16 << 16) + 1) /**< DMA channel select for LEUART0_TXBL */
-#define DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2) /**< DMA channel select for LEUART0_TXEMPTY */
-#define DMAREQ_LEUART1_RXDATAV ((17 << 16) + 0) /**< DMA channel select for LEUART1_RXDATAV */
-#define DMAREQ_LEUART1_TXBL ((17 << 16) + 1) /**< DMA channel select for LEUART1_TXBL */
-#define DMAREQ_LEUART1_TXEMPTY ((17 << 16) + 2) /**< DMA channel select for LEUART1_TXEMPTY */
-#define DMAREQ_I2C0_RXDATAV ((20 << 16) + 0) /**< DMA channel select for I2C0_RXDATAV */
-#define DMAREQ_I2C0_TXBL ((20 << 16) + 1) /**< DMA channel select for I2C0_TXBL */
-#define DMAREQ_TIMER0_UFOF ((24 << 16) + 0) /**< DMA channel select for TIMER0_UFOF */
-#define DMAREQ_TIMER0_CC0 ((24 << 16) + 1) /**< DMA channel select for TIMER0_CC0 */
-#define DMAREQ_TIMER0_CC1 ((24 << 16) + 2) /**< DMA channel select for TIMER0_CC1 */
-#define DMAREQ_TIMER0_CC2 ((24 << 16) + 3) /**< DMA channel select for TIMER0_CC2 */
-#define DMAREQ_TIMER1_UFOF ((25 << 16) + 0) /**< DMA channel select for TIMER1_UFOF */
-#define DMAREQ_TIMER1_CC0 ((25 << 16) + 1) /**< DMA channel select for TIMER1_CC0 */
-#define DMAREQ_TIMER1_CC1 ((25 << 16) + 2) /**< DMA channel select for TIMER1_CC1 */
-#define DMAREQ_TIMER1_CC2 ((25 << 16) + 3) /**< DMA channel select for TIMER1_CC2 */
-#define DMAREQ_TIMER2_UFOF ((26 << 16) + 0) /**< DMA channel select for TIMER2_UFOF */
-#define DMAREQ_TIMER2_CC0 ((26 << 16) + 1) /**< DMA channel select for TIMER2_CC0 */
-#define DMAREQ_TIMER2_CC1 ((26 << 16) + 2) /**< DMA channel select for TIMER2_CC1 */
-#define DMAREQ_TIMER2_CC2 ((26 << 16) + 3) /**< DMA channel select for TIMER2_CC2 */
-#define DMAREQ_UART0_RXDATAV ((44 << 16) + 0) /**< DMA channel select for UART0_RXDATAV */
-#define DMAREQ_UART0_TXBL ((44 << 16) + 1) /**< DMA channel select for UART0_TXBL */
-#define DMAREQ_UART0_TXEMPTY ((44 << 16) + 2) /**< DMA channel select for UART0_TXEMPTY */
-#define DMAREQ_MSC_WDATA ((48 << 16) + 0) /**< DMA channel select for MSC_WDATA */
-#define DMAREQ_AES_DATAWR ((49 << 16) + 0) /**< DMA channel select for AES_DATAWR */
-#define DMAREQ_AES_XORDATAWR ((49 << 16) + 1) /**< DMA channel select for AES_XORDATAWR */
-#define DMAREQ_AES_DATARD ((49 << 16) + 2) /**< DMA channel select for AES_DATARD */
-#define DMAREQ_AES_KEYWR ((49 << 16) + 3) /**< DMA channel select for AES_KEYWR */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_TIMER
- * @{
- */
-
-/** Bit fields for TIMER CTRL */
-#define _TIMER_CTRL_RESETVALUE 0x00000000UL /**< Default value for TIMER_CTRL */
-#define _TIMER_CTRL_MASK 0x0F030FFBUL /**< Mask for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_SHIFT 0 /**< Shift value for TIMER_MODE */
-#define _TIMER_CTRL_MODE_MASK 0x3UL /**< Bit mask for TIMER_MODE */
-#define TIMER_CTRL_MODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_MODE_UP (0x00000000UL << 0) /**< Shifted mode UP for TIMER_CTRL */
-#define TIMER_CTRL_MODE_DOWN (0x00000001UL << 0) /**< Shifted mode DOWN for TIMER_CTRL */
-#define TIMER_CTRL_MODE_UPDOWN (0x00000002UL << 0) /**< Shifted mode UPDOWN for TIMER_CTRL */
-#define TIMER_CTRL_MODE_QDEC (0x00000003UL << 0) /**< Shifted mode QDEC for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_UP 0x00000000UL /**< Mode UP for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_DOWN 0x00000001UL /**< Mode DOWN for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_UPDOWN 0x00000002UL /**< Mode UPDOWN for TIMER_CTRL */
-#define _TIMER_CTRL_MODE_QDEC 0x00000003UL /**< Mode QDEC for TIMER_CTRL */
-#define TIMER_CTRL_SYNC (1 << 3) /**< Timer Start/Stop/Reload Synchronization */
-#define _TIMER_CTRL_SYNC_SHIFT 3 /**< Shift value for TIMER_SYNC */
-#define _TIMER_CTRL_SYNC_MASK 0x8UL /**< Bit mask for TIMER_SYNC */
-#define TIMER_CTRL_SYNC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_SYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_OSMEN (1 << 4) /**< One-shot Mode Enable */
-#define _TIMER_CTRL_OSMEN_SHIFT 4 /**< Shift value for TIMER_OSMEN */
-#define _TIMER_CTRL_OSMEN_MASK 0x10UL /**< Bit mask for TIMER_OSMEN */
-#define TIMER_CTRL_OSMEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_OSMEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_QEM (1 << 5) /**< Quadrature Decoder Mode Selection */
-#define _TIMER_CTRL_QEM_SHIFT 5 /**< Shift value for TIMER_QEM */
-#define _TIMER_CTRL_QEM_MASK 0x20UL /**< Bit mask for TIMER_QEM */
-#define TIMER_CTRL_QEM_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_QEM_X2 (0x00000000UL << 5) /**< Shifted mode X2 for TIMER_CTRL */
-#define TIMER_CTRL_QEM_X4 (0x00000001UL << 5) /**< Shifted mode X4 for TIMER_CTRL */
-#define _TIMER_CTRL_QEM_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_QEM_X2 0x00000000UL /**< Mode X2 for TIMER_CTRL */
-#define _TIMER_CTRL_QEM_X4 0x00000001UL /**< Mode X4 for TIMER_CTRL */
-#define TIMER_CTRL_DEBUGRUN (1 << 6) /**< Debug Mode Run Enable */
-#define _TIMER_CTRL_DEBUGRUN_SHIFT 6 /**< Shift value for TIMER_DEBUGRUN */
-#define _TIMER_CTRL_DEBUGRUN_MASK 0x40UL /**< Bit mask for TIMER_DEBUGRUN */
-#define TIMER_CTRL_DEBUGRUN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_DMACLRACT (1 << 7) /**< DMA Request Clear on Active */
-#define _TIMER_CTRL_DMACLRACT_SHIFT 7 /**< Shift value for TIMER_DMACLRACT */
-#define _TIMER_CTRL_DMACLRACT_MASK 0x80UL /**< Bit mask for TIMER_DMACLRACT */
-#define TIMER_CTRL_DMACLRACT_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_DMACLRACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_SHIFT 8 /**< Shift value for TIMER_RISEA */
-#define _TIMER_CTRL_RISEA_MASK 0x300UL /**< Bit mask for TIMER_RISEA */
-#define TIMER_CTRL_RISEA_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_RISEA_NONE (0x00000000UL << 8) /**< Shifted mode NONE for TIMER_CTRL */
-#define TIMER_CTRL_RISEA_START (0x00000001UL << 8) /**< Shifted mode START for TIMER_CTRL */
-#define TIMER_CTRL_RISEA_STOP (0x00000002UL << 8) /**< Shifted mode STOP for TIMER_CTRL */
-#define TIMER_CTRL_RISEA_RELOADSTART (0x00000003UL << 8) /**< Shifted mode RELOADSTART for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_NONE 0x00000000UL /**< Mode NONE for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_START 0x00000001UL /**< Mode START for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_STOP 0x00000002UL /**< Mode STOP for TIMER_CTRL */
-#define _TIMER_CTRL_RISEA_RELOADSTART 0x00000003UL /**< Mode RELOADSTART for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_SHIFT 10 /**< Shift value for TIMER_FALLA */
-#define _TIMER_CTRL_FALLA_MASK 0xC00UL /**< Bit mask for TIMER_FALLA */
-#define TIMER_CTRL_FALLA_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_FALLA_NONE (0x00000000UL << 10) /**< Shifted mode NONE for TIMER_CTRL */
-#define TIMER_CTRL_FALLA_START (0x00000001UL << 10) /**< Shifted mode START for TIMER_CTRL */
-#define TIMER_CTRL_FALLA_STOP (0x00000002UL << 10) /**< Shifted mode STOP for TIMER_CTRL */
-#define TIMER_CTRL_FALLA_RELOADSTART (0x00000003UL << 10) /**< Shifted mode RELOADSTART for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_NONE 0x00000000UL /**< Mode NONE for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_START 0x00000001UL /**< Mode START for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_STOP 0x00000002UL /**< Mode STOP for TIMER_CTRL */
-#define _TIMER_CTRL_FALLA_RELOADSTART 0x00000003UL /**< Mode RELOADSTART for TIMER_CTRL */
-#define _TIMER_CTRL_CLKSEL_SHIFT 16 /**< Shift value for TIMER_CLKSEL */
-#define _TIMER_CTRL_CLKSEL_MASK 0x30000UL /**< Bit mask for TIMER_CLKSEL */
-#define TIMER_CTRL_CLKSEL_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_CLKSEL_PRESCHFPERCLK (0x00000000UL << 16) /**< Shifted mode PRESCHFPERCLK for TIMER_CTRL */
-#define TIMER_CTRL_CLKSEL_CC1 (0x00000001UL << 16) /**< Shifted mode CC1 for TIMER_CTRL */
-#define TIMER_CTRL_CLKSEL_TIMEROUF (0x00000002UL << 16) /**< Shifted mode TIMEROUF for TIMER_CTRL */
-#define _TIMER_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_CLKSEL_PRESCHFPERCLK 0x00000000UL /**< Mode PRESCHFPERCLK for TIMER_CTRL */
-#define _TIMER_CTRL_CLKSEL_CC1 0x00000001UL /**< Mode CC1 for TIMER_CTRL */
-#define _TIMER_CTRL_CLKSEL_TIMEROUF 0x00000002UL /**< Mode TIMEROUF for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_SHIFT 24 /**< Shift value for TIMER_PRESC */
-#define _TIMER_CTRL_PRESC_MASK 0xF000000UL /**< Bit mask for TIMER_PRESC */
-#define TIMER_CTRL_PRESC_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV1 (0x00000000UL << 24) /**< Shifted mode DIV1 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV2 (0x00000001UL << 24) /**< Shifted mode DIV2 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV4 (0x00000002UL << 24) /**< Shifted mode DIV4 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV8 (0x00000003UL << 24) /**< Shifted mode DIV8 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV16 (0x00000004UL << 24) /**< Shifted mode DIV16 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV32 (0x00000005UL << 24) /**< Shifted mode DIV32 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV64 (0x00000006UL << 24) /**< Shifted mode DIV64 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV128 (0x00000007UL << 24) /**< Shifted mode DIV128 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV256 (0x00000008UL << 24) /**< Shifted mode DIV256 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV512 (0x00000009UL << 24) /**< Shifted mode DIV512 for TIMER_CTRL */
-#define TIMER_CTRL_PRESC_DIV1024 (0x0000000AUL << 24) /**< Shifted mode DIV1024 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV1 0x00000000UL /**< Mode DIV1 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV2 0x00000001UL /**< Mode DIV2 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV4 0x00000002UL /**< Mode DIV4 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV8 0x00000003UL /**< Mode DIV8 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV16 0x00000004UL /**< Mode DIV16 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV32 0x00000005UL /**< Mode DIV32 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV64 0x00000006UL /**< Mode DIV64 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV128 0x00000007UL /**< Mode DIV128 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV256 0x00000008UL /**< Mode DIV256 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV512 0x00000009UL /**< Mode DIV512 for TIMER_CTRL */
-#define _TIMER_CTRL_PRESC_DIV1024 0x0000000AUL /**< Mode DIV1024 for TIMER_CTRL */
-
-/** Bit fields for TIMER CMD */
-#define _TIMER_CMD_RESETVALUE 0x00000000UL /**< Default value for TIMER_CMD */
-#define _TIMER_CMD_MASK 0x00000003UL /**< Mask for TIMER_CMD */
-#define TIMER_CMD_START (1 << 0) /**< Start Timer */
-#define _TIMER_CMD_START_SHIFT 0 /**< Shift value for TIMER_START */
-#define _TIMER_CMD_START_MASK 0x1UL /**< Bit mask for TIMER_START */
-#define TIMER_CMD_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CMD */
-#define _TIMER_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CMD */
-#define TIMER_CMD_STOP (1 << 1) /**< Stop Timer */
-#define _TIMER_CMD_STOP_SHIFT 1 /**< Shift value for TIMER_STOP */
-#define _TIMER_CMD_STOP_MASK 0x2UL /**< Bit mask for TIMER_STOP */
-#define TIMER_CMD_STOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_CMD */
-#define _TIMER_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CMD */
-
-/** Bit fields for TIMER STATUS */
-#define _TIMER_STATUS_RESETVALUE 0x00000000UL /**< Default value for TIMER_STATUS */
-#define _TIMER_STATUS_MASK 0x07070707UL /**< Mask for TIMER_STATUS */
-#define TIMER_STATUS_RUNNING (1 << 0) /**< Running */
-#define _TIMER_STATUS_RUNNING_SHIFT 0 /**< Shift value for TIMER_RUNNING */
-#define _TIMER_STATUS_RUNNING_MASK 0x1UL /**< Bit mask for TIMER_RUNNING */
-#define TIMER_STATUS_RUNNING_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_RUNNING_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_DIR (1 << 1) /**< Direction */
-#define _TIMER_STATUS_DIR_SHIFT 1 /**< Shift value for TIMER_DIR */
-#define _TIMER_STATUS_DIR_MASK 0x2UL /**< Bit mask for TIMER_DIR */
-#define TIMER_STATUS_DIR_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_DIR_UP (0x00000000UL << 1) /**< Shifted mode UP for TIMER_STATUS */
-#define TIMER_STATUS_DIR_DOWN (0x00000001UL << 1) /**< Shifted mode DOWN for TIMER_STATUS */
-#define _TIMER_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_DIR_UP 0x00000000UL /**< Mode UP for TIMER_STATUS */
-#define _TIMER_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for TIMER_STATUS */
-#define TIMER_STATUS_TOPBV (1 << 2) /**< TOPB Valid */
-#define _TIMER_STATUS_TOPBV_SHIFT 2 /**< Shift value for TIMER_TOPBV */
-#define _TIMER_STATUS_TOPBV_MASK 0x4UL /**< Bit mask for TIMER_TOPBV */
-#define TIMER_STATUS_TOPBV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_TOPBV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCVBV0 (1 << 8) /**< CC0 CCVB Valid */
-#define _TIMER_STATUS_CCVBV0_SHIFT 8 /**< Shift value for TIMER_CCVBV0 */
-#define _TIMER_STATUS_CCVBV0_MASK 0x100UL /**< Bit mask for TIMER_CCVBV0 */
-#define TIMER_STATUS_CCVBV0_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCVBV0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCVBV1 (1 << 9) /**< CC1 CCVB Valid */
-#define _TIMER_STATUS_CCVBV1_SHIFT 9 /**< Shift value for TIMER_CCVBV1 */
-#define _TIMER_STATUS_CCVBV1_MASK 0x200UL /**< Bit mask for TIMER_CCVBV1 */
-#define TIMER_STATUS_CCVBV1_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCVBV1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCVBV2 (1 << 10) /**< CC2 CCVB Valid */
-#define _TIMER_STATUS_CCVBV2_SHIFT 10 /**< Shift value for TIMER_CCVBV2 */
-#define _TIMER_STATUS_CCVBV2_MASK 0x400UL /**< Bit mask for TIMER_CCVBV2 */
-#define TIMER_STATUS_CCVBV2_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCVBV2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_ICV0 (1 << 16) /**< CC0 Input Capture Valid */
-#define _TIMER_STATUS_ICV0_SHIFT 16 /**< Shift value for TIMER_ICV0 */
-#define _TIMER_STATUS_ICV0_MASK 0x10000UL /**< Bit mask for TIMER_ICV0 */
-#define TIMER_STATUS_ICV0_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_ICV0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_ICV1 (1 << 17) /**< CC1 Input Capture Valid */
-#define _TIMER_STATUS_ICV1_SHIFT 17 /**< Shift value for TIMER_ICV1 */
-#define _TIMER_STATUS_ICV1_MASK 0x20000UL /**< Bit mask for TIMER_ICV1 */
-#define TIMER_STATUS_ICV1_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_ICV1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_ICV2 (1 << 18) /**< CC2 Input Capture Valid */
-#define _TIMER_STATUS_ICV2_SHIFT 18 /**< Shift value for TIMER_ICV2 */
-#define _TIMER_STATUS_ICV2_MASK 0x40000UL /**< Bit mask for TIMER_ICV2 */
-#define TIMER_STATUS_ICV2_DEFAULT (0x00000000UL << 18) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_ICV2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL0 (1 << 24) /**< CC0 Polarity */
-#define _TIMER_STATUS_CCPOL0_SHIFT 24 /**< Shift value for TIMER_CCPOL0 */
-#define _TIMER_STATUS_CCPOL0_MASK 0x1000000UL /**< Bit mask for TIMER_CCPOL0 */
-#define TIMER_STATUS_CCPOL0_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL0_LOWRISE (0x00000000UL << 24) /**< Shifted mode LOWRISE for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL0_HIGHFALL (0x00000001UL << 24) /**< Shifted mode HIGHFALL for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL0_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL0_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL1 (1 << 25) /**< CC1 Polarity */
-#define _TIMER_STATUS_CCPOL1_SHIFT 25 /**< Shift value for TIMER_CCPOL1 */
-#define _TIMER_STATUS_CCPOL1_MASK 0x2000000UL /**< Bit mask for TIMER_CCPOL1 */
-#define TIMER_STATUS_CCPOL1_DEFAULT (0x00000000UL << 25) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL1_LOWRISE (0x00000000UL << 25) /**< Shifted mode LOWRISE for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL1_HIGHFALL (0x00000001UL << 25) /**< Shifted mode HIGHFALL for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL1_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL1_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL2 (1 << 26) /**< CC2 Polarity */
-#define _TIMER_STATUS_CCPOL2_SHIFT 26 /**< Shift value for TIMER_CCPOL2 */
-#define _TIMER_STATUS_CCPOL2_MASK 0x4000000UL /**< Bit mask for TIMER_CCPOL2 */
-#define TIMER_STATUS_CCPOL2_DEFAULT (0x00000000UL << 26) /**< Shifted mode DEFAULT for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL2_LOWRISE (0x00000000UL << 26) /**< Shifted mode LOWRISE for TIMER_STATUS */
-#define TIMER_STATUS_CCPOL2_HIGHFALL (0x00000001UL << 26) /**< Shifted mode HIGHFALL for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL2_LOWRISE 0x00000000UL /**< Mode LOWRISE for TIMER_STATUS */
-#define _TIMER_STATUS_CCPOL2_HIGHFALL 0x00000001UL /**< Mode HIGHFALL for TIMER_STATUS */
-
-/** Bit fields for TIMER IEN */
-#define _TIMER_IEN_RESETVALUE 0x00000000UL /**< Default value for TIMER_IEN */
-#define _TIMER_IEN_MASK 0x00000773UL /**< Mask for TIMER_IEN */
-#define TIMER_IEN_OF (1 << 0) /**< Overflow Interrupt Enable */
-#define _TIMER_IEN_OF_SHIFT 0 /**< Shift value for TIMER_OF */
-#define _TIMER_IEN_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */
-#define TIMER_IEN_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_UF (1 << 1) /**< Underflow Interrupt Enable */
-#define _TIMER_IEN_UF_SHIFT 1 /**< Shift value for TIMER_UF */
-#define _TIMER_IEN_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */
-#define TIMER_IEN_UF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_CC0 (1 << 4) /**< CC Channel 0 Interrupt Enable */
-#define _TIMER_IEN_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */
-#define _TIMER_IEN_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */
-#define TIMER_IEN_CC0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_CC1 (1 << 5) /**< CC Channel 1 Interrupt Enable */
-#define _TIMER_IEN_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */
-#define _TIMER_IEN_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */
-#define TIMER_IEN_CC1_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_CC2 (1 << 6) /**< CC Channel 2 Interrupt Enable */
-#define _TIMER_IEN_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */
-#define _TIMER_IEN_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */
-#define TIMER_IEN_CC2_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_ICBOF0 (1 << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Enable */
-#define _TIMER_IEN_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */
-#define _TIMER_IEN_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */
-#define TIMER_IEN_ICBOF0_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_ICBOF1 (1 << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Enable */
-#define _TIMER_IEN_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */
-#define _TIMER_IEN_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */
-#define TIMER_IEN_ICBOF1_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-#define TIMER_IEN_ICBOF2 (1 << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Enable */
-#define _TIMER_IEN_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */
-#define _TIMER_IEN_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */
-#define TIMER_IEN_ICBOF2_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_IEN */
-#define _TIMER_IEN_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IEN */
-
-/** Bit fields for TIMER IF */
-#define _TIMER_IF_RESETVALUE 0x00000000UL /**< Default value for TIMER_IF */
-#define _TIMER_IF_MASK 0x00000773UL /**< Mask for TIMER_IF */
-#define TIMER_IF_OF (1 << 0) /**< Overflow Interrupt Flag */
-#define _TIMER_IF_OF_SHIFT 0 /**< Shift value for TIMER_OF */
-#define _TIMER_IF_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */
-#define TIMER_IF_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_UF (1 << 1) /**< Underflow Interrupt Flag */
-#define _TIMER_IF_UF_SHIFT 1 /**< Shift value for TIMER_UF */
-#define _TIMER_IF_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */
-#define TIMER_IF_UF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_CC0 (1 << 4) /**< CC Channel 0 Interrupt Flag */
-#define _TIMER_IF_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */
-#define _TIMER_IF_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */
-#define TIMER_IF_CC0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_CC1 (1 << 5) /**< CC Channel 1 Interrupt Flag */
-#define _TIMER_IF_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */
-#define _TIMER_IF_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */
-#define TIMER_IF_CC1_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_CC2 (1 << 6) /**< CC Channel 2 Interrupt Flag */
-#define _TIMER_IF_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */
-#define _TIMER_IF_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */
-#define TIMER_IF_CC2_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_ICBOF0 (1 << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag */
-#define _TIMER_IF_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */
-#define _TIMER_IF_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */
-#define TIMER_IF_ICBOF0_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_ICBOF1 (1 << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag */
-#define _TIMER_IF_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */
-#define _TIMER_IF_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */
-#define TIMER_IF_ICBOF1_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-#define TIMER_IF_ICBOF2 (1 << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag */
-#define _TIMER_IF_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */
-#define _TIMER_IF_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */
-#define TIMER_IF_ICBOF2_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_IF */
-#define _TIMER_IF_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IF */
-
-/** Bit fields for TIMER IFS */
-#define _TIMER_IFS_RESETVALUE 0x00000000UL /**< Default value for TIMER_IFS */
-#define _TIMER_IFS_MASK 0x00000773UL /**< Mask for TIMER_IFS */
-#define TIMER_IFS_OF (1 << 0) /**< Overflow Interrupt Flag Set */
-#define _TIMER_IFS_OF_SHIFT 0 /**< Shift value for TIMER_OF */
-#define _TIMER_IFS_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */
-#define TIMER_IFS_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_UF (1 << 1) /**< Underflow Interrupt Flag Set */
-#define _TIMER_IFS_UF_SHIFT 1 /**< Shift value for TIMER_UF */
-#define _TIMER_IFS_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */
-#define TIMER_IFS_UF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_CC0 (1 << 4) /**< CC Channel 0 Interrupt Flag Set */
-#define _TIMER_IFS_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */
-#define _TIMER_IFS_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */
-#define TIMER_IFS_CC0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_CC1 (1 << 5) /**< CC Channel 1 Interrupt Flag Set */
-#define _TIMER_IFS_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */
-#define _TIMER_IFS_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */
-#define TIMER_IFS_CC1_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_CC2 (1 << 6) /**< CC Channel 2 Interrupt Flag Set */
-#define _TIMER_IFS_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */
-#define _TIMER_IFS_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */
-#define TIMER_IFS_CC2_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_ICBOF0 (1 << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set */
-#define _TIMER_IFS_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */
-#define _TIMER_IFS_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */
-#define TIMER_IFS_ICBOF0_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_ICBOF1 (1 << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set */
-#define _TIMER_IFS_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */
-#define _TIMER_IFS_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */
-#define TIMER_IFS_ICBOF1_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-#define TIMER_IFS_ICBOF2 (1 << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set */
-#define _TIMER_IFS_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */
-#define _TIMER_IFS_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */
-#define TIMER_IFS_ICBOF2_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_IFS */
-#define _TIMER_IFS_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFS */
-
-/** Bit fields for TIMER IFC */
-#define _TIMER_IFC_RESETVALUE 0x00000000UL /**< Default value for TIMER_IFC */
-#define _TIMER_IFC_MASK 0x00000773UL /**< Mask for TIMER_IFC */
-#define TIMER_IFC_OF (1 << 0) /**< Overflow Interrupt Flag Clear */
-#define _TIMER_IFC_OF_SHIFT 0 /**< Shift value for TIMER_OF */
-#define _TIMER_IFC_OF_MASK 0x1UL /**< Bit mask for TIMER_OF */
-#define TIMER_IFC_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_UF (1 << 1) /**< Underflow Interrupt Flag Clear */
-#define _TIMER_IFC_UF_SHIFT 1 /**< Shift value for TIMER_UF */
-#define _TIMER_IFC_UF_MASK 0x2UL /**< Bit mask for TIMER_UF */
-#define TIMER_IFC_UF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_CC0 (1 << 4) /**< CC Channel 0 Interrupt Flag Clear */
-#define _TIMER_IFC_CC0_SHIFT 4 /**< Shift value for TIMER_CC0 */
-#define _TIMER_IFC_CC0_MASK 0x10UL /**< Bit mask for TIMER_CC0 */
-#define TIMER_IFC_CC0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_CC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_CC1 (1 << 5) /**< CC Channel 1 Interrupt Flag Clear */
-#define _TIMER_IFC_CC1_SHIFT 5 /**< Shift value for TIMER_CC1 */
-#define _TIMER_IFC_CC1_MASK 0x20UL /**< Bit mask for TIMER_CC1 */
-#define TIMER_IFC_CC1_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_CC1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_CC2 (1 << 6) /**< CC Channel 2 Interrupt Flag Clear */
-#define _TIMER_IFC_CC2_SHIFT 6 /**< Shift value for TIMER_CC2 */
-#define _TIMER_IFC_CC2_MASK 0x40UL /**< Bit mask for TIMER_CC2 */
-#define TIMER_IFC_CC2_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_CC2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_ICBOF0 (1 << 8) /**< CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear */
-#define _TIMER_IFC_ICBOF0_SHIFT 8 /**< Shift value for TIMER_ICBOF0 */
-#define _TIMER_IFC_ICBOF0_MASK 0x100UL /**< Bit mask for TIMER_ICBOF0 */
-#define TIMER_IFC_ICBOF0_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_ICBOF0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_ICBOF1 (1 << 9) /**< CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear */
-#define _TIMER_IFC_ICBOF1_SHIFT 9 /**< Shift value for TIMER_ICBOF1 */
-#define _TIMER_IFC_ICBOF1_MASK 0x200UL /**< Bit mask for TIMER_ICBOF1 */
-#define TIMER_IFC_ICBOF1_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_ICBOF1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-#define TIMER_IFC_ICBOF2 (1 << 10) /**< CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear */
-#define _TIMER_IFC_ICBOF2_SHIFT 10 /**< Shift value for TIMER_ICBOF2 */
-#define _TIMER_IFC_ICBOF2_MASK 0x400UL /**< Bit mask for TIMER_ICBOF2 */
-#define TIMER_IFC_ICBOF2_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_IFC */
-#define _TIMER_IFC_ICBOF2_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_IFC */
-
-/** Bit fields for TIMER TOP */
-#define _TIMER_TOP_RESETVALUE 0x0000FFFFUL /**< Default value for TIMER_TOP */
-#define _TIMER_TOP_MASK 0x0000FFFFUL /**< Mask for TIMER_TOP */
-#define _TIMER_TOP_TOP_SHIFT 0 /**< Shift value for TIMER_TOP */
-#define _TIMER_TOP_TOP_MASK 0xFFFFUL /**< Bit mask for TIMER_TOP */
-#define TIMER_TOP_TOP_DEFAULT (0x0000FFFFUL << 0) /**< Shifted mode DEFAULT for TIMER_TOP */
-#define _TIMER_TOP_TOP_DEFAULT 0x0000FFFFUL /**< Mode DEFAULT for TIMER_TOP */
-
-/** Bit fields for TIMER TOPB */
-#define _TIMER_TOPB_RESETVALUE 0x00000000UL /**< Default value for TIMER_TOPB */
-#define _TIMER_TOPB_MASK 0x0000FFFFUL /**< Mask for TIMER_TOPB */
-#define _TIMER_TOPB_TOPB_SHIFT 0 /**< Shift value for TIMER_TOPB */
-#define _TIMER_TOPB_TOPB_MASK 0xFFFFUL /**< Bit mask for TIMER_TOPB */
-#define TIMER_TOPB_TOPB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_TOPB */
-#define _TIMER_TOPB_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_TOPB */
-
-/** Bit fields for TIMER CNT */
-#define _TIMER_CNT_RESETVALUE 0x00000000UL /**< Default value for TIMER_CNT */
-#define _TIMER_CNT_MASK 0x0000FFFFUL /**< Mask for TIMER_CNT */
-#define _TIMER_CNT_CNT_SHIFT 0 /**< Shift value for TIMER_CNT */
-#define _TIMER_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for TIMER_CNT */
-#define TIMER_CNT_CNT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CNT */
-#define _TIMER_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CNT */
-
-/** Bit fields for TIMER ROUTE */
-#define _TIMER_ROUTE_RESETVALUE 0x00000000UL /**< Default value for TIMER_ROUTE */
-#define _TIMER_ROUTE_MASK 0x00030707UL /**< Mask for TIMER_ROUTE */
-#define _TIMER_ROUTE_CCPEN_SHIFT 0 /**< Shift value for TIMER_CCPEN */
-#define _TIMER_ROUTE_CCPEN_MASK 0x7UL /**< Bit mask for TIMER_CCPEN */
-#define TIMER_ROUTE_CCPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_ROUTE */
-#define _TIMER_ROUTE_CCPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */
-#define _TIMER_ROUTE_CDTIPEN_SHIFT 8 /**< Shift value for TIMER_CDTIPEN */
-#define _TIMER_ROUTE_CDTIPEN_MASK 0x700UL /**< Bit mask for TIMER_CDTIPEN */
-#define TIMER_ROUTE_CDTIPEN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_ROUTE */
-#define _TIMER_ROUTE_CDTIPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_SHIFT 16 /**< Shift value for TIMER_LOCATION */
-#define _TIMER_ROUTE_LOCATION_MASK 0x30000UL /**< Bit mask for TIMER_LOCATION */
-#define TIMER_ROUTE_LOCATION_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_ROUTE */
-#define TIMER_ROUTE_LOCATION_LOC0 (0x00000000UL << 16) /**< Shifted mode LOC0 for TIMER_ROUTE */
-#define TIMER_ROUTE_LOCATION_LOC1 (0x00000001UL << 16) /**< Shifted mode LOC1 for TIMER_ROUTE */
-#define TIMER_ROUTE_LOCATION_LOC2 (0x00000002UL << 16) /**< Shifted mode LOC2 for TIMER_ROUTE */
-#define TIMER_ROUTE_LOCATION_LOC3 (0x00000003UL << 16) /**< Shifted mode LOC3 for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for TIMER_ROUTE */
-#define _TIMER_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for TIMER_ROUTE */
-
-/** Bit fields for TIMER CC_CTRL */
-#define _TIMER_CC_CTRL_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MASK 0x0F373F17UL /**< Mask for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_SHIFT 0 /**< Shift value for TIMER_MODE */
-#define _TIMER_CC_CTRL_MODE_MASK 0x3UL /**< Bit mask for TIMER_MODE */
-#define TIMER_CC_CTRL_MODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_MODE_OFF (0x00000000UL << 0) /**< Shifted mode OFF for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_MODE_INPUTCAPTURE (0x00000001UL << 0) /**< Shifted mode INPUTCAPTURE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_MODE_OUTPUTCOMPARE (0x00000002UL << 0) /**< Shifted mode OUTPUTCOMPARE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_MODE_PWM (0x00000003UL << 0) /**< Shifted mode PWM for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_OFF 0x00000000UL /**< Mode OFF for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL /**< Mode INPUTCAPTURE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL /**< Mode OUTPUTCOMPARE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_MODE_PWM 0x00000003UL /**< Mode PWM for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_OUTINV (1 << 2) /**< Output Invert */
-#define _TIMER_CC_CTRL_OUTINV_SHIFT 2 /**< Shift value for TIMER_OUTINV */
-#define _TIMER_CC_CTRL_OUTINV_MASK 0x4UL /**< Bit mask for TIMER_OUTINV */
-#define TIMER_CC_CTRL_OUTINV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_OUTINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_COIST (1 << 4) /**< Compare Output Initial State */
-#define _TIMER_CC_CTRL_COIST_SHIFT 4 /**< Shift value for TIMER_COIST */
-#define _TIMER_CC_CTRL_COIST_MASK 0x10UL /**< Bit mask for TIMER_COIST */
-#define TIMER_CC_CTRL_COIST_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COIST_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_SHIFT 8 /**< Shift value for TIMER_CMOA */
-#define _TIMER_CC_CTRL_CMOA_MASK 0x300UL /**< Bit mask for TIMER_CMOA */
-#define TIMER_CC_CTRL_CMOA_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CMOA_NONE (0x00000000UL << 8) /**< Shifted mode NONE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CMOA_TOGGLE (0x00000001UL << 8) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CMOA_CLEAR (0x00000002UL << 8) /**< Shifted mode CLEAR for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CMOA_SET (0x00000003UL << 8) /**< Shifted mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CMOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_SHIFT 10 /**< Shift value for TIMER_COFOA */
-#define _TIMER_CC_CTRL_COFOA_MASK 0xC00UL /**< Bit mask for TIMER_COFOA */
-#define TIMER_CC_CTRL_COFOA_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_COFOA_NONE (0x00000000UL << 10) /**< Shifted mode NONE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_COFOA_TOGGLE (0x00000001UL << 10) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_COFOA_CLEAR (0x00000002UL << 10) /**< Shifted mode CLEAR for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_COFOA_SET (0x00000003UL << 10) /**< Shifted mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_COFOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_SHIFT 12 /**< Shift value for TIMER_CUFOA */
-#define _TIMER_CC_CTRL_CUFOA_MASK 0x3000UL /**< Bit mask for TIMER_CUFOA */
-#define TIMER_CC_CTRL_CUFOA_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CUFOA_NONE (0x00000000UL << 12) /**< Shifted mode NONE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CUFOA_TOGGLE (0x00000001UL << 12) /**< Shifted mode TOGGLE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CUFOA_CLEAR (0x00000002UL << 12) /**< Shifted mode CLEAR for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_CUFOA_SET (0x00000003UL << 12) /**< Shifted mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_NONE 0x00000000UL /**< Mode NONE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_TOGGLE 0x00000001UL /**< Mode TOGGLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_CUFOA_SET 0x00000003UL /**< Mode SET for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_SHIFT 16 /**< Shift value for TIMER_PRSSEL */
-#define _TIMER_CC_CTRL_PRSSEL_MASK 0x70000UL /**< Bit mask for TIMER_PRSSEL */
-#define TIMER_CC_CTRL_PRSSEL_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH0 (0x00000000UL << 16) /**< Shifted mode PRSCH0 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH1 (0x00000001UL << 16) /**< Shifted mode PRSCH1 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH2 (0x00000002UL << 16) /**< Shifted mode PRSCH2 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH3 (0x00000003UL << 16) /**< Shifted mode PRSCH3 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH4 (0x00000004UL << 16) /**< Shifted mode PRSCH4 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH5 (0x00000005UL << 16) /**< Shifted mode PRSCH5 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH6 (0x00000006UL << 16) /**< Shifted mode PRSCH6 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_PRSSEL_PRSCH7 (0x00000007UL << 16) /**< Shifted mode PRSCH7 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_INSEL (1 << 20) /**< Input Selection */
-#define _TIMER_CC_CTRL_INSEL_SHIFT 20 /**< Shift value for TIMER_INSEL */
-#define _TIMER_CC_CTRL_INSEL_MASK 0x100000UL /**< Bit mask for TIMER_INSEL */
-#define TIMER_CC_CTRL_INSEL_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_INSEL_PIN (0x00000000UL << 20) /**< Shifted mode PIN for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_INSEL_PRS (0x00000001UL << 20) /**< Shifted mode PRS for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_INSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_INSEL_PIN 0x00000000UL /**< Mode PIN for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_INSEL_PRS 0x00000001UL /**< Mode PRS for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_FILT (1 << 21) /**< Digital Filter */
-#define _TIMER_CC_CTRL_FILT_SHIFT 21 /**< Shift value for TIMER_FILT */
-#define _TIMER_CC_CTRL_FILT_MASK 0x200000UL /**< Bit mask for TIMER_FILT */
-#define TIMER_CC_CTRL_FILT_DEFAULT (0x00000000UL << 21) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_FILT_DISABLE (0x00000000UL << 21) /**< Shifted mode DISABLE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_FILT_ENABLE (0x00000001UL << 21) /**< Shifted mode ENABLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_FILT_DISABLE 0x00000000UL /**< Mode DISABLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_FILT_ENABLE 0x00000001UL /**< Mode ENABLE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_SHIFT 24 /**< Shift value for TIMER_ICEDGE */
-#define _TIMER_CC_CTRL_ICEDGE_MASK 0x3000000UL /**< Bit mask for TIMER_ICEDGE */
-#define TIMER_CC_CTRL_ICEDGE_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEDGE_RISING (0x00000000UL << 24) /**< Shifted mode RISING for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEDGE_FALLING (0x00000001UL << 24) /**< Shifted mode FALLING for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEDGE_BOTH (0x00000002UL << 24) /**< Shifted mode BOTH for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEDGE_NONE (0x00000003UL << 24) /**< Shifted mode NONE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_RISING 0x00000000UL /**< Mode RISING for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_FALLING 0x00000001UL /**< Mode FALLING for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_BOTH 0x00000002UL /**< Mode BOTH for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEDGE_NONE 0x00000003UL /**< Mode NONE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_SHIFT 26 /**< Shift value for TIMER_ICEVCTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_MASK 0xC000000UL /**< Bit mask for TIMER_ICEVCTRL */
-#define TIMER_CC_CTRL_ICEVCTRL_DEFAULT (0x00000000UL << 26) /**< Shifted mode DEFAULT for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE (0x00000000UL << 26) /**< Shifted mode EVERYEDGE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE (0x00000001UL << 26) /**< Shifted mode EVERYSECONDEDGE for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEVCTRL_RISING (0x00000002UL << 26) /**< Shifted mode RISING for TIMER_CC_CTRL */
-#define TIMER_CC_CTRL_ICEVCTRL_FALLING (0x00000003UL << 26) /**< Shifted mode FALLING for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_EVERYEDGE 0x00000000UL /**< Mode EVERYEDGE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_EVERYSECONDEDGE 0x00000001UL /**< Mode EVERYSECONDEDGE for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_RISING 0x00000002UL /**< Mode RISING for TIMER_CC_CTRL */
-#define _TIMER_CC_CTRL_ICEVCTRL_FALLING 0x00000003UL /**< Mode FALLING for TIMER_CC_CTRL */
-
-/** Bit fields for TIMER CC_CCV */
-#define _TIMER_CC_CCV_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCV */
-#define _TIMER_CC_CCV_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCV */
-#define _TIMER_CC_CCV_CCV_SHIFT 0 /**< Shift value for TIMER_CCV */
-#define _TIMER_CC_CCV_CCV_MASK 0xFFFFUL /**< Bit mask for TIMER_CCV */
-#define TIMER_CC_CCV_CCV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCV */
-#define _TIMER_CC_CCV_CCV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCV */
-
-/** Bit fields for TIMER CC_CCVP */
-#define _TIMER_CC_CCVP_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCVP */
-#define _TIMER_CC_CCVP_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCVP */
-#define _TIMER_CC_CCVP_CCVP_SHIFT 0 /**< Shift value for TIMER_CCVP */
-#define _TIMER_CC_CCVP_CCVP_MASK 0xFFFFUL /**< Bit mask for TIMER_CCVP */
-#define TIMER_CC_CCVP_CCVP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCVP */
-#define _TIMER_CC_CCVP_CCVP_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCVP */
-
-/** Bit fields for TIMER CC_CCVB */
-#define _TIMER_CC_CCVB_RESETVALUE 0x00000000UL /**< Default value for TIMER_CC_CCVB */
-#define _TIMER_CC_CCVB_MASK 0x0000FFFFUL /**< Mask for TIMER_CC_CCVB */
-#define _TIMER_CC_CCVB_CCVB_SHIFT 0 /**< Shift value for TIMER_CCVB */
-#define _TIMER_CC_CCVB_CCVB_MASK 0xFFFFUL /**< Bit mask for TIMER_CCVB */
-#define TIMER_CC_CCVB_CCVB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_CC_CCVB */
-#define _TIMER_CC_CCVB_CCVB_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_CC_CCVB */
-
-/** Bit fields for TIMER DTCTRL */
-#define _TIMER_DTCTRL_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_MASK 0x0100007FUL /**< Mask for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTEN (1 << 0) /**< DTI Enable */
-#define _TIMER_DTCTRL_DTEN_SHIFT 0 /**< Shift value for TIMER_DTEN */
-#define _TIMER_DTCTRL_DTEN_MASK 0x1UL /**< Bit mask for TIMER_DTEN */
-#define TIMER_DTCTRL_DTEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTDAS (1 << 1) /**< DTI Automatic Start-up Functionality */
-#define _TIMER_DTCTRL_DTDAS_SHIFT 1 /**< Shift value for TIMER_DTDAS */
-#define _TIMER_DTCTRL_DTDAS_MASK 0x2UL /**< Bit mask for TIMER_DTDAS */
-#define TIMER_DTCTRL_DTDAS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTDAS_NORESTART (0x00000000UL << 1) /**< Shifted mode NORESTART for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTDAS_RESTART (0x00000001UL << 1) /**< Shifted mode RESTART for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTDAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTDAS_NORESTART 0x00000000UL /**< Mode NORESTART for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTDAS_RESTART 0x00000001UL /**< Mode RESTART for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTIPOL (1 << 2) /**< DTI Inactive Polarity */
-#define _TIMER_DTCTRL_DTIPOL_SHIFT 2 /**< Shift value for TIMER_DTIPOL */
-#define _TIMER_DTCTRL_DTIPOL_MASK 0x4UL /**< Bit mask for TIMER_DTIPOL */
-#define TIMER_DTCTRL_DTIPOL_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTIPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTCINV (1 << 3) /**< DTI Complementary Output Invert. */
-#define _TIMER_DTCTRL_DTCINV_SHIFT 3 /**< Shift value for TIMER_DTCINV */
-#define _TIMER_DTCTRL_DTCINV_MASK 0x8UL /**< Bit mask for TIMER_DTCINV */
-#define TIMER_DTCTRL_DTCINV_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTCINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_SHIFT 4 /**< Shift value for TIMER_DTPRSSEL */
-#define _TIMER_DTCTRL_DTPRSSEL_MASK 0x70UL /**< Bit mask for TIMER_DTPRSSEL */
-#define TIMER_DTCTRL_DTPRSSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH0 (0x00000000UL << 4) /**< Shifted mode PRSCH0 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH1 (0x00000001UL << 4) /**< Shifted mode PRSCH1 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH2 (0x00000002UL << 4) /**< Shifted mode PRSCH2 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH3 (0x00000003UL << 4) /**< Shifted mode PRSCH3 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH4 (0x00000004UL << 4) /**< Shifted mode PRSCH4 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH5 (0x00000005UL << 4) /**< Shifted mode PRSCH5 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH6 (0x00000006UL << 4) /**< Shifted mode PRSCH6 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSSEL_PRSCH7 (0x00000007UL << 4) /**< Shifted mode PRSCH7 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for TIMER_DTCTRL */
-#define TIMER_DTCTRL_DTPRSEN (1 << 24) /**< DTI PRS Source Enable */
-#define _TIMER_DTCTRL_DTPRSEN_SHIFT 24 /**< Shift value for TIMER_DTPRSEN */
-#define _TIMER_DTCTRL_DTPRSEN_MASK 0x1000000UL /**< Bit mask for TIMER_DTPRSEN */
-#define TIMER_DTCTRL_DTPRSEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for TIMER_DTCTRL */
-#define _TIMER_DTCTRL_DTPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTCTRL */
-
-/** Bit fields for TIMER DTTIME */
-#define _TIMER_DTTIME_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTTIME */
-#define _TIMER_DTTIME_MASK 0x003F3F0FUL /**< Mask for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_SHIFT 0 /**< Shift value for TIMER_DTPRESC */
-#define _TIMER_DTTIME_DTPRESC_MASK 0xFUL /**< Bit mask for TIMER_DTPRESC */
-#define TIMER_DTTIME_DTPRESC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV1 (0x00000000UL << 0) /**< Shifted mode DIV1 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV2 (0x00000001UL << 0) /**< Shifted mode DIV2 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV4 (0x00000002UL << 0) /**< Shifted mode DIV4 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV8 (0x00000003UL << 0) /**< Shifted mode DIV8 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV16 (0x00000004UL << 0) /**< Shifted mode DIV16 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV32 (0x00000005UL << 0) /**< Shifted mode DIV32 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV64 (0x00000006UL << 0) /**< Shifted mode DIV64 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV128 (0x00000007UL << 0) /**< Shifted mode DIV128 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV256 (0x00000008UL << 0) /**< Shifted mode DIV256 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV512 (0x00000009UL << 0) /**< Shifted mode DIV512 for TIMER_DTTIME */
-#define TIMER_DTTIME_DTPRESC_DIV1024 (0x0000000AUL << 0) /**< Shifted mode DIV1024 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV1 0x00000000UL /**< Mode DIV1 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV2 0x00000001UL /**< Mode DIV2 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV4 0x00000002UL /**< Mode DIV4 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV8 0x00000003UL /**< Mode DIV8 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV16 0x00000004UL /**< Mode DIV16 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV32 0x00000005UL /**< Mode DIV32 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV64 0x00000006UL /**< Mode DIV64 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV128 0x00000007UL /**< Mode DIV128 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV256 0x00000008UL /**< Mode DIV256 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV512 0x00000009UL /**< Mode DIV512 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTPRESC_DIV1024 0x0000000AUL /**< Mode DIV1024 for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTRISET_SHIFT 8 /**< Shift value for TIMER_DTRISET */
-#define _TIMER_DTTIME_DTRISET_MASK 0x3F00UL /**< Bit mask for TIMER_DTRISET */
-#define TIMER_DTTIME_DTRISET_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTRISET_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTFALLT_SHIFT 16 /**< Shift value for TIMER_DTFALLT */
-#define _TIMER_DTTIME_DTFALLT_MASK 0x3F0000UL /**< Bit mask for TIMER_DTFALLT */
-#define TIMER_DTTIME_DTFALLT_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_DTTIME */
-#define _TIMER_DTTIME_DTFALLT_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTTIME */
-
-/** Bit fields for TIMER DTFC */
-#define _TIMER_DTFC_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTFC */
-#define _TIMER_DTFC_MASK 0x0F030707UL /**< Mask for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_SHIFT 0 /**< Shift value for TIMER_DTPRSFSEL0 */
-#define _TIMER_DTFC_DTPRSFSEL0_MASK 0x7UL /**< Bit mask for TIMER_DTPRSFSEL0 */
-#define TIMER_DTFC_DTPRSFSEL0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH0 (0x00000000UL << 0) /**< Shifted mode PRSCH0 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH1 (0x00000001UL << 0) /**< Shifted mode PRSCH1 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH2 (0x00000002UL << 0) /**< Shifted mode PRSCH2 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH3 (0x00000003UL << 0) /**< Shifted mode PRSCH3 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH4 (0x00000004UL << 0) /**< Shifted mode PRSCH4 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH5 (0x00000005UL << 0) /**< Shifted mode PRSCH5 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH6 (0x00000006UL << 0) /**< Shifted mode PRSCH6 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL0_PRSCH7 (0x00000007UL << 0) /**< Shifted mode PRSCH7 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH0 0x00000000UL /**< Mode PRSCH0 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH1 0x00000001UL /**< Mode PRSCH1 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH2 0x00000002UL /**< Mode PRSCH2 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH3 0x00000003UL /**< Mode PRSCH3 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH4 0x00000004UL /**< Mode PRSCH4 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH5 0x00000005UL /**< Mode PRSCH5 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH6 0x00000006UL /**< Mode PRSCH6 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL0_PRSCH7 0x00000007UL /**< Mode PRSCH7 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_SHIFT 8 /**< Shift value for TIMER_DTPRSFSEL1 */
-#define _TIMER_DTFC_DTPRSFSEL1_MASK 0x700UL /**< Bit mask for TIMER_DTPRSFSEL1 */
-#define TIMER_DTFC_DTPRSFSEL1_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH0 (0x00000000UL << 8) /**< Shifted mode PRSCH0 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH1 (0x00000001UL << 8) /**< Shifted mode PRSCH1 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH2 (0x00000002UL << 8) /**< Shifted mode PRSCH2 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH3 (0x00000003UL << 8) /**< Shifted mode PRSCH3 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH4 (0x00000004UL << 8) /**< Shifted mode PRSCH4 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH5 (0x00000005UL << 8) /**< Shifted mode PRSCH5 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH6 (0x00000006UL << 8) /**< Shifted mode PRSCH6 for TIMER_DTFC */
-#define TIMER_DTFC_DTPRSFSEL1_PRSCH7 (0x00000007UL << 8) /**< Shifted mode PRSCH7 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH0 0x00000000UL /**< Mode PRSCH0 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH1 0x00000001UL /**< Mode PRSCH1 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH2 0x00000002UL /**< Mode PRSCH2 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH3 0x00000003UL /**< Mode PRSCH3 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH4 0x00000004UL /**< Mode PRSCH4 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH5 0x00000005UL /**< Mode PRSCH5 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH6 0x00000006UL /**< Mode PRSCH6 for TIMER_DTFC */
-#define _TIMER_DTFC_DTPRSFSEL1_PRSCH7 0x00000007UL /**< Mode PRSCH7 for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_SHIFT 16 /**< Shift value for TIMER_DTFA */
-#define _TIMER_DTFC_DTFA_MASK 0x30000UL /**< Bit mask for TIMER_DTFA */
-#define TIMER_DTFC_DTFA_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for TIMER_DTFC */
-#define TIMER_DTFC_DTFA_NONE (0x00000000UL << 16) /**< Shifted mode NONE for TIMER_DTFC */
-#define TIMER_DTFC_DTFA_INACTIVE (0x00000001UL << 16) /**< Shifted mode INACTIVE for TIMER_DTFC */
-#define TIMER_DTFC_DTFA_CLEAR (0x00000002UL << 16) /**< Shifted mode CLEAR for TIMER_DTFC */
-#define TIMER_DTFC_DTFA_TRISTATE (0x00000003UL << 16) /**< Shifted mode TRISTATE for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_NONE 0x00000000UL /**< Mode NONE for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_INACTIVE 0x00000001UL /**< Mode INACTIVE for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_CLEAR 0x00000002UL /**< Mode CLEAR for TIMER_DTFC */
-#define _TIMER_DTFC_DTFA_TRISTATE 0x00000003UL /**< Mode TRISTATE for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_SHIFT 24 /**< Shift value for TIMER_DTFSEN */
-#define _TIMER_DTFC_DTFSEN_MASK 0xF000000UL /**< Bit mask for TIMER_DTFSEN */
-#define TIMER_DTFC_DTFSEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for TIMER_DTFC */
-#define TIMER_DTFC_DTFSEN_PRS0 (0x00000001UL << 24) /**< Shifted mode PRS0 for TIMER_DTFC */
-#define TIMER_DTFC_DTFSEN_PRS1 (0x00000002UL << 24) /**< Shifted mode PRS1 for TIMER_DTFC */
-#define TIMER_DTFC_DTFSEN_DEBUG (0x00000004UL << 24) /**< Shifted mode DEBUG for TIMER_DTFC */
-#define TIMER_DTFC_DTFSEN_LOCKUP (0x00000008UL << 24) /**< Shifted mode LOCKUP for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_PRS0 0x00000001UL /**< Mode PRS0 for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_PRS1 0x00000002UL /**< Mode PRS1 for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_DEBUG 0x00000004UL /**< Mode DEBUG for TIMER_DTFC */
-#define _TIMER_DTFC_DTFSEN_LOCKUP 0x00000008UL /**< Mode LOCKUP for TIMER_DTFC */
-
-/** Bit fields for TIMER DTOGEN */
-#define _TIMER_DTOGEN_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_MASK 0x0000003FUL /**< Mask for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_SHIFT 0 /**< Shift value for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_MASK 0x3FUL /**< Bit mask for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CC0 (0x00000001UL << 0) /**< Shifted mode CC0 for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CC1 (0x00000002UL << 0) /**< Shifted mode CC1 for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CC2 (0x00000004UL << 0) /**< Shifted mode CC2 for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CDTI0 (0x00000008UL << 0) /**< Shifted mode CDTI0 for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CDTI1 (0x00000010UL << 0) /**< Shifted mode CDTI1 for TIMER_DTOGEN */
-#define TIMER_DTOGEN_DTOGEN_CDTI2 (0x00000020UL << 0) /**< Shifted mode CDTI2 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CC0 0x00000001UL /**< Mode CC0 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CC1 0x00000002UL /**< Mode CC1 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CC2 0x00000004UL /**< Mode CC2 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CDTI0 0x00000008UL /**< Mode CDTI0 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CDTI1 0x00000010UL /**< Mode CDTI1 for TIMER_DTOGEN */
-#define _TIMER_DTOGEN_DTOGEN_CDTI2 0x00000020UL /**< Mode CDTI2 for TIMER_DTOGEN */
-
-/** Bit fields for TIMER DTFAULT */
-#define _TIMER_DTFAULT_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_MASK 0x0000000FUL /**< Mask for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_SHIFT 0 /**< Shift value for TIMER_DTFS */
-#define _TIMER_DTFAULT_DTFS_MASK 0xFUL /**< Bit mask for TIMER_DTFS */
-#define TIMER_DTFAULT_DTFS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTFAULT */
-#define TIMER_DTFAULT_DTFS_PRS0 (0x00000001UL << 0) /**< Shifted mode PRS0 for TIMER_DTFAULT */
-#define TIMER_DTFAULT_DTFS_PRS1 (0x00000002UL << 0) /**< Shifted mode PRS1 for TIMER_DTFAULT */
-#define TIMER_DTFAULT_DTFS_DEBUG (0x00000004UL << 0) /**< Shifted mode DEBUG for TIMER_DTFAULT */
-#define TIMER_DTFAULT_DTFS_LOCKUP (0x00000008UL << 0) /**< Shifted mode LOCKUP for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_PRS0 0x00000001UL /**< Mode PRS0 for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_PRS1 0x00000002UL /**< Mode PRS1 for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_DEBUG 0x00000004UL /**< Mode DEBUG for TIMER_DTFAULT */
-#define _TIMER_DTFAULT_DTFS_LOCKUP 0x00000008UL /**< Mode LOCKUP for TIMER_DTFAULT */
-
-/** Bit fields for TIMER DTFAULTC */
-#define _TIMER_DTFAULTC_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_MASK 0x0000000FUL /**< Mask for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_SHIFT 0 /**< Shift value for TIMER_DTFSC */
-#define _TIMER_DTFAULTC_DTFSC_MASK 0xFUL /**< Bit mask for TIMER_DTFSC */
-#define TIMER_DTFAULTC_DTFSC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTFAULTC */
-#define TIMER_DTFAULTC_DTFSC_PRS0 (0x00000001UL << 0) /**< Shifted mode PRS0 for TIMER_DTFAULTC */
-#define TIMER_DTFAULTC_DTFSC_PRS1 (0x00000002UL << 0) /**< Shifted mode PRS1 for TIMER_DTFAULTC */
-#define TIMER_DTFAULTC_DTFSC_DEBUG (0x00000004UL << 0) /**< Shifted mode DEBUG for TIMER_DTFAULTC */
-#define TIMER_DTFAULTC_DTFSC_LOCKUP (0x00000008UL << 0) /**< Shifted mode LOCKUP for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_PRS0 0x00000001UL /**< Mode PRS0 for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_PRS1 0x00000002UL /**< Mode PRS1 for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_DEBUG 0x00000004UL /**< Mode DEBUG for TIMER_DTFAULTC */
-#define _TIMER_DTFAULTC_DTFSC_LOCKUP 0x00000008UL /**< Mode LOCKUP for TIMER_DTFAULTC */
-
-/** Bit fields for TIMER DTLOCK */
-#define _TIMER_DTLOCK_RESETVALUE 0x00000000UL /**< Default value for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_MASK 0x0000FFFFUL /**< Mask for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_SHIFT 0 /**< Shift value for TIMER_LOCKKEY */
-#define _TIMER_DTLOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for TIMER_LOCKKEY */
-#define TIMER_DTLOCK_LOCKKEY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for TIMER_DTLOCK */
-#define TIMER_DTLOCK_LOCKKEY_LOCK (0x00000000UL << 0) /**< Shifted mode LOCK for TIMER_DTLOCK */
-#define TIMER_DTLOCK_LOCKKEY_UNLOCKED (0x00000000UL << 0) /**< Shifted mode UNLOCKED for TIMER_DTLOCK */
-#define TIMER_DTLOCK_LOCKKEY_LOCKED (0x00000001UL << 0) /**< Shifted mode LOCKED for TIMER_DTLOCK */
-#define TIMER_DTLOCK_LOCKKEY_UNLOCK (0x0000CE80UL << 0) /**< Shifted mode UNLOCK for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for TIMER_DTLOCK */
-#define _TIMER_DTLOCK_LOCKKEY_UNLOCK 0x0000CE80UL /**< Mode UNLOCK for TIMER_DTLOCK */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_USART
- * @{
- */
-
-/** Bit fields for USART CTRL */
-#define _USART_CTRL_RESETVALUE 0x00000000UL /**< Default value for USART_CTRL */
-#define _USART_CTRL_MASK 0x1DFFFF7FUL /**< Mask for USART_CTRL */
-#define USART_CTRL_SYNC (1 << 0) /**< USART Synchronous Mode */
-#define _USART_CTRL_SYNC_SHIFT 0 /**< Shift value for USART_SYNC */
-#define _USART_CTRL_SYNC_MASK 0x1UL /**< Bit mask for USART_SYNC */
-#define USART_CTRL_SYNC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_SYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_LOOPBK (1 << 1) /**< Loopback Enable */
-#define _USART_CTRL_LOOPBK_SHIFT 1 /**< Shift value for USART_LOOPBK */
-#define _USART_CTRL_LOOPBK_MASK 0x2UL /**< Bit mask for USART_LOOPBK */
-#define USART_CTRL_LOOPBK_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CCEN (1 << 2) /**< Collision Check Enable */
-#define _USART_CTRL_CCEN_SHIFT 2 /**< Shift value for USART_CCEN */
-#define _USART_CTRL_CCEN_MASK 0x4UL /**< Bit mask for USART_CCEN */
-#define USART_CTRL_CCEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_CCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_MPM (1 << 3) /**< Multi-Processor Mode */
-#define _USART_CTRL_MPM_SHIFT 3 /**< Shift value for USART_MPM */
-#define _USART_CTRL_MPM_MASK 0x8UL /**< Bit mask for USART_MPM */
-#define USART_CTRL_MPM_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_MPAB (1 << 4) /**< Multi-Processor Address-Bit */
-#define _USART_CTRL_MPAB_SHIFT 4 /**< Shift value for USART_MPAB */
-#define _USART_CTRL_MPAB_MASK 0x10UL /**< Bit mask for USART_MPAB */
-#define USART_CTRL_MPAB_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_OVS_SHIFT 5 /**< Shift value for USART_OVS */
-#define _USART_CTRL_OVS_MASK 0x60UL /**< Bit mask for USART_OVS */
-#define USART_CTRL_OVS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_OVS_X16 (0x00000000UL << 5) /**< Shifted mode X16 for USART_CTRL */
-#define USART_CTRL_OVS_X8 (0x00000001UL << 5) /**< Shifted mode X8 for USART_CTRL */
-#define USART_CTRL_OVS_X6 (0x00000002UL << 5) /**< Shifted mode X6 for USART_CTRL */
-#define USART_CTRL_OVS_X4 (0x00000003UL << 5) /**< Shifted mode X4 for USART_CTRL */
-#define _USART_CTRL_OVS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_OVS_X16 0x00000000UL /**< Mode X16 for USART_CTRL */
-#define _USART_CTRL_OVS_X8 0x00000001UL /**< Mode X8 for USART_CTRL */
-#define _USART_CTRL_OVS_X6 0x00000002UL /**< Mode X6 for USART_CTRL */
-#define _USART_CTRL_OVS_X4 0x00000003UL /**< Mode X4 for USART_CTRL */
-#define USART_CTRL_CLKPOL (1 << 8) /**< Clock Polarity */
-#define _USART_CTRL_CLKPOL_SHIFT 8 /**< Shift value for USART_CLKPOL */
-#define _USART_CTRL_CLKPOL_MASK 0x100UL /**< Bit mask for USART_CLKPOL */
-#define USART_CTRL_CLKPOL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CLKPOL_IDLELOW (0x00000000UL << 8) /**< Shifted mode IDLELOW for USART_CTRL */
-#define USART_CTRL_CLKPOL_IDLEHIGH (0x00000001UL << 8) /**< Shifted mode IDLEHIGH for USART_CTRL */
-#define _USART_CTRL_CLKPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_CLKPOL_IDLELOW 0x00000000UL /**< Mode IDLELOW for USART_CTRL */
-#define _USART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL /**< Mode IDLEHIGH for USART_CTRL */
-#define USART_CTRL_CLKPHA (1 << 9) /**< Clock Edge For Setup/Sample */
-#define _USART_CTRL_CLKPHA_SHIFT 9 /**< Shift value for USART_CLKPHA */
-#define _USART_CTRL_CLKPHA_MASK 0x200UL /**< Bit mask for USART_CLKPHA */
-#define USART_CTRL_CLKPHA_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CLKPHA_SAMPLELEADING (0x00000000UL << 9) /**< Shifted mode SAMPLELEADING for USART_CTRL */
-#define USART_CTRL_CLKPHA_SAMPLETRAILING (0x00000001UL << 9) /**< Shifted mode SAMPLETRAILING for USART_CTRL */
-#define _USART_CTRL_CLKPHA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL /**< Mode SAMPLELEADING for USART_CTRL */
-#define _USART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL /**< Mode SAMPLETRAILING for USART_CTRL */
-#define USART_CTRL_MSBF (1 << 10) /**< Most Significant Bit First */
-#define _USART_CTRL_MSBF_SHIFT 10 /**< Shift value for USART_MSBF */
-#define _USART_CTRL_MSBF_MASK 0x400UL /**< Bit mask for USART_MSBF */
-#define USART_CTRL_MSBF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_MSBF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CSMA (1 << 11) /**< Action On Slave-Select In Master Mode */
-#define _USART_CTRL_CSMA_SHIFT 11 /**< Shift value for USART_CSMA */
-#define _USART_CTRL_CSMA_MASK 0x800UL /**< Bit mask for USART_CSMA */
-#define USART_CTRL_CSMA_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CSMA_NOACTION (0x00000000UL << 11) /**< Shifted mode NOACTION for USART_CTRL */
-#define USART_CTRL_CSMA_GOTOSLAVEMODE (0x00000001UL << 11) /**< Shifted mode GOTOSLAVEMODE for USART_CTRL */
-#define _USART_CTRL_CSMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_CSMA_NOACTION 0x00000000UL /**< Mode NOACTION for USART_CTRL */
-#define _USART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL /**< Mode GOTOSLAVEMODE for USART_CTRL */
-#define USART_CTRL_TXBIL (1 << 12) /**< TX Buffer Interrupt Level */
-#define _USART_CTRL_TXBIL_SHIFT 12 /**< Shift value for USART_TXBIL */
-#define _USART_CTRL_TXBIL_MASK 0x1000UL /**< Bit mask for USART_TXBIL */
-#define USART_CTRL_TXBIL_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_TXBIL_EMPTY (0x00000000UL << 12) /**< Shifted mode EMPTY for USART_CTRL */
-#define USART_CTRL_TXBIL_HALFFULL (0x00000001UL << 12) /**< Shifted mode HALFFULL for USART_CTRL */
-#define _USART_CTRL_TXBIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_TXBIL_EMPTY 0x00000000UL /**< Mode EMPTY for USART_CTRL */
-#define _USART_CTRL_TXBIL_HALFFULL 0x00000001UL /**< Mode HALFFULL for USART_CTRL */
-#define USART_CTRL_RXINV (1 << 13) /**< Receiver Input Invert */
-#define _USART_CTRL_RXINV_SHIFT 13 /**< Shift value for USART_RXINV */
-#define _USART_CTRL_RXINV_MASK 0x2000UL /**< Bit mask for USART_RXINV */
-#define USART_CTRL_RXINV_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_RXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_TXINV (1 << 14) /**< Transmitter output Invert */
-#define _USART_CTRL_TXINV_SHIFT 14 /**< Shift value for USART_TXINV */
-#define _USART_CTRL_TXINV_MASK 0x4000UL /**< Bit mask for USART_TXINV */
-#define USART_CTRL_TXINV_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_TXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_CSINV (1 << 15) /**< Chip Select Invert */
-#define _USART_CTRL_CSINV_SHIFT 15 /**< Shift value for USART_CSINV */
-#define _USART_CTRL_CSINV_MASK 0x8000UL /**< Bit mask for USART_CSINV */
-#define USART_CTRL_CSINV_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_CSINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_AUTOCS (1 << 16) /**< Automatic Chip Select */
-#define _USART_CTRL_AUTOCS_SHIFT 16 /**< Shift value for USART_AUTOCS */
-#define _USART_CTRL_AUTOCS_MASK 0x10000UL /**< Bit mask for USART_AUTOCS */
-#define USART_CTRL_AUTOCS_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_AUTOCS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_AUTOTRI (1 << 17) /**< Automatic TX Tristate */
-#define _USART_CTRL_AUTOTRI_SHIFT 17 /**< Shift value for USART_AUTOTRI */
-#define _USART_CTRL_AUTOTRI_MASK 0x20000UL /**< Bit mask for USART_AUTOTRI */
-#define USART_CTRL_AUTOTRI_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_SCMODE (1 << 18) /**< SmartCard Mode */
-#define _USART_CTRL_SCMODE_SHIFT 18 /**< Shift value for USART_SCMODE */
-#define _USART_CTRL_SCMODE_MASK 0x40000UL /**< Bit mask for USART_SCMODE */
-#define USART_CTRL_SCMODE_DEFAULT (0x00000000UL << 18) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_SCMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_SCRETRANS (1 << 19) /**< SmartCard Retransmit */
-#define _USART_CTRL_SCRETRANS_SHIFT 19 /**< Shift value for USART_SCRETRANS */
-#define _USART_CTRL_SCRETRANS_MASK 0x80000UL /**< Bit mask for USART_SCRETRANS */
-#define USART_CTRL_SCRETRANS_DEFAULT (0x00000000UL << 19) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_SCRETRANS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_SKIPPERRF (1 << 20) /**< Skip Parity Error Frames */
-#define _USART_CTRL_SKIPPERRF_SHIFT 20 /**< Shift value for USART_SKIPPERRF */
-#define _USART_CTRL_SKIPPERRF_MASK 0x100000UL /**< Bit mask for USART_SKIPPERRF */
-#define USART_CTRL_SKIPPERRF_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_BIT8DV (1 << 21) /**< Bit 8 Default Value */
-#define _USART_CTRL_BIT8DV_SHIFT 21 /**< Shift value for USART_BIT8DV */
-#define _USART_CTRL_BIT8DV_MASK 0x200000UL /**< Bit mask for USART_BIT8DV */
-#define USART_CTRL_BIT8DV_DEFAULT (0x00000000UL << 21) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_ERRSDMA (1 << 22) /**< Halt DMA On Error */
-#define _USART_CTRL_ERRSDMA_SHIFT 22 /**< Shift value for USART_ERRSDMA */
-#define _USART_CTRL_ERRSDMA_MASK 0x400000UL /**< Bit mask for USART_ERRSDMA */
-#define USART_CTRL_ERRSDMA_DEFAULT (0x00000000UL << 22) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_ERRSRX (1 << 23) /**< Disable RX On Error */
-#define _USART_CTRL_ERRSRX_SHIFT 23 /**< Shift value for USART_ERRSRX */
-#define _USART_CTRL_ERRSRX_MASK 0x800000UL /**< Bit mask for USART_ERRSRX */
-#define USART_CTRL_ERRSRX_DEFAULT (0x00000000UL << 23) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_ERRSRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define USART_CTRL_ERRSTX (1 << 24) /**< Disable TX On Error */
-#define _USART_CTRL_ERRSTX_SHIFT 24 /**< Shift value for USART_ERRSTX */
-#define _USART_CTRL_ERRSTX_MASK 0x1000000UL /**< Bit mask for USART_ERRSTX */
-#define USART_CTRL_ERRSTX_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_ERRSTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_TXDELAY_SHIFT 26 /**< Shift value for USART_TXDELAY */
-#define _USART_CTRL_TXDELAY_MASK 0xC000000UL /**< Bit mask for USART_TXDELAY */
-#define USART_CTRL_TXDELAY_DEFAULT (0x00000000UL << 26) /**< Shifted mode DEFAULT for USART_CTRL */
-#define USART_CTRL_TXDELAY_NONE (0x00000000UL << 26) /**< Shifted mode NONE for USART_CTRL */
-#define USART_CTRL_TXDELAY_SINGLE (0x00000001UL << 26) /**< Shifted mode SINGLE for USART_CTRL */
-#define USART_CTRL_TXDELAY_DOUBLE (0x00000002UL << 26) /**< Shifted mode DOUBLE for USART_CTRL */
-#define USART_CTRL_TXDELAY_TRIPLE (0x00000003UL << 26) /**< Shifted mode TRIPLE for USART_CTRL */
-#define _USART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for USART_CTRL */
-#define _USART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for USART_CTRL */
-#define _USART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for USART_CTRL */
-#define _USART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for USART_CTRL */
-#define USART_CTRL_BYTESWAP (1 << 28) /**< Byteswap In Double Accesses */
-#define _USART_CTRL_BYTESWAP_SHIFT 28 /**< Shift value for USART_BYTESWAP */
-#define _USART_CTRL_BYTESWAP_MASK 0x10000000UL /**< Bit mask for USART_BYTESWAP */
-#define USART_CTRL_BYTESWAP_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for USART_CTRL */
-#define _USART_CTRL_BYTESWAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
-
-/** Bit fields for USART FRAME */
-#define _USART_FRAME_RESETVALUE 0x00001005UL /**< Default value for USART_FRAME */
-#define _USART_FRAME_MASK 0x0000330FUL /**< Mask for USART_FRAME */
-#define _USART_FRAME_DATABITS_SHIFT 0 /**< Shift value for USART_DATABITS */
-#define _USART_FRAME_DATABITS_MASK 0xFUL /**< Bit mask for USART_DATABITS */
-#define USART_FRAME_DATABITS_FOUR (0x00000001UL << 0) /**< Shifted mode FOUR for USART_FRAME */
-#define USART_FRAME_DATABITS_FIVE (0x00000002UL << 0) /**< Shifted mode FIVE for USART_FRAME */
-#define USART_FRAME_DATABITS_SIX (0x00000003UL << 0) /**< Shifted mode SIX for USART_FRAME */
-#define USART_FRAME_DATABITS_SEVEN (0x00000004UL << 0) /**< Shifted mode SEVEN for USART_FRAME */
-#define USART_FRAME_DATABITS_DEFAULT (0x00000005UL << 0) /**< Shifted mode DEFAULT for USART_FRAME */
-#define USART_FRAME_DATABITS_EIGHT (0x00000005UL << 0) /**< Shifted mode EIGHT for USART_FRAME */
-#define USART_FRAME_DATABITS_NINE (0x00000006UL << 0) /**< Shifted mode NINE for USART_FRAME */
-#define USART_FRAME_DATABITS_TEN (0x00000007UL << 0) /**< Shifted mode TEN for USART_FRAME */
-#define USART_FRAME_DATABITS_ELEVEN (0x00000008UL << 0) /**< Shifted mode ELEVEN for USART_FRAME */
-#define USART_FRAME_DATABITS_TWELVE (0x00000009UL << 0) /**< Shifted mode TWELVE for USART_FRAME */
-#define USART_FRAME_DATABITS_THIRTEEN (0x0000000AUL << 0) /**< Shifted mode THIRTEEN for USART_FRAME */
-#define USART_FRAME_DATABITS_FOURTEEN (0x0000000BUL << 0) /**< Shifted mode FOURTEEN for USART_FRAME */
-#define USART_FRAME_DATABITS_FIFTEEN (0x0000000CUL << 0) /**< Shifted mode FIFTEEN for USART_FRAME */
-#define USART_FRAME_DATABITS_SIXTEEN (0x0000000DUL << 0) /**< Shifted mode SIXTEEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_FOUR 0x00000001UL /**< Mode FOUR for USART_FRAME */
-#define _USART_FRAME_DATABITS_FIVE 0x00000002UL /**< Mode FIVE for USART_FRAME */
-#define _USART_FRAME_DATABITS_SIX 0x00000003UL /**< Mode SIX for USART_FRAME */
-#define _USART_FRAME_DATABITS_SEVEN 0x00000004UL /**< Mode SEVEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_DEFAULT 0x00000005UL /**< Mode DEFAULT for USART_FRAME */
-#define _USART_FRAME_DATABITS_EIGHT 0x00000005UL /**< Mode EIGHT for USART_FRAME */
-#define _USART_FRAME_DATABITS_NINE 0x00000006UL /**< Mode NINE for USART_FRAME */
-#define _USART_FRAME_DATABITS_TEN 0x00000007UL /**< Mode TEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_ELEVEN 0x00000008UL /**< Mode ELEVEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_TWELVE 0x00000009UL /**< Mode TWELVE for USART_FRAME */
-#define _USART_FRAME_DATABITS_THIRTEEN 0x0000000AUL /**< Mode THIRTEEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_FOURTEEN 0x0000000BUL /**< Mode FOURTEEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_FIFTEEN 0x0000000CUL /**< Mode FIFTEEN for USART_FRAME */
-#define _USART_FRAME_DATABITS_SIXTEEN 0x0000000DUL /**< Mode SIXTEEN for USART_FRAME */
-#define _USART_FRAME_PARITY_SHIFT 8 /**< Shift value for USART_PARITY */
-#define _USART_FRAME_PARITY_MASK 0x300UL /**< Bit mask for USART_PARITY */
-#define USART_FRAME_PARITY_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_FRAME */
-#define USART_FRAME_PARITY_NONE (0x00000000UL << 8) /**< Shifted mode NONE for USART_FRAME */
-#define USART_FRAME_PARITY_EVEN (0x00000002UL << 8) /**< Shifted mode EVEN for USART_FRAME */
-#define USART_FRAME_PARITY_ODD (0x00000003UL << 8) /**< Shifted mode ODD for USART_FRAME */
-#define _USART_FRAME_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_FRAME */
-#define _USART_FRAME_PARITY_NONE 0x00000000UL /**< Mode NONE for USART_FRAME */
-#define _USART_FRAME_PARITY_EVEN 0x00000002UL /**< Mode EVEN for USART_FRAME */
-#define _USART_FRAME_PARITY_ODD 0x00000003UL /**< Mode ODD for USART_FRAME */
-#define _USART_FRAME_STOPBITS_SHIFT 12 /**< Shift value for USART_STOPBITS */
-#define _USART_FRAME_STOPBITS_MASK 0x3000UL /**< Bit mask for USART_STOPBITS */
-#define USART_FRAME_STOPBITS_HALF (0x00000000UL << 12) /**< Shifted mode HALF for USART_FRAME */
-#define USART_FRAME_STOPBITS_DEFAULT (0x00000001UL << 12) /**< Shifted mode DEFAULT for USART_FRAME */
-#define USART_FRAME_STOPBITS_ONE (0x00000001UL << 12) /**< Shifted mode ONE for USART_FRAME */
-#define USART_FRAME_STOPBITS_ONEANDAHALF (0x00000002UL << 12) /**< Shifted mode ONEANDAHALF for USART_FRAME */
-#define USART_FRAME_STOPBITS_TWO (0x00000003UL << 12) /**< Shifted mode TWO for USART_FRAME */
-#define _USART_FRAME_STOPBITS_HALF 0x00000000UL /**< Mode HALF for USART_FRAME */
-#define _USART_FRAME_STOPBITS_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_FRAME */
-#define _USART_FRAME_STOPBITS_ONE 0x00000001UL /**< Mode ONE for USART_FRAME */
-#define _USART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL /**< Mode ONEANDAHALF for USART_FRAME */
-#define _USART_FRAME_STOPBITS_TWO 0x00000003UL /**< Mode TWO for USART_FRAME */
-
-/** Bit fields for USART TRIGCTRL */
-#define _USART_TRIGCTRL_RESETVALUE 0x00000000UL /**< Default value for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_MASK 0x00000037UL /**< Mask for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_SHIFT 0 /**< Shift value for USART_TSEL */
-#define _USART_TRIGCTRL_TSEL_MASK 0x7UL /**< Bit mask for USART_TSEL */
-#define USART_TRIGCTRL_TSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH0 (0x00000000UL << 0) /**< Shifted mode PRSCH0 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH1 (0x00000001UL << 0) /**< Shifted mode PRSCH1 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH2 (0x00000002UL << 0) /**< Shifted mode PRSCH2 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH3 (0x00000003UL << 0) /**< Shifted mode PRSCH3 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH4 (0x00000004UL << 0) /**< Shifted mode PRSCH4 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH5 (0x00000005UL << 0) /**< Shifted mode PRSCH5 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH6 (0x00000006UL << 0) /**< Shifted mode PRSCH6 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TSEL_PRSCH7 (0x00000007UL << 0) /**< Shifted mode PRSCH7 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for USART_TRIGCTRL */
-#define USART_TRIGCTRL_RXTEN (1 << 4) /**< Receive Trigger Enable */
-#define _USART_TRIGCTRL_RXTEN_SHIFT 4 /**< Shift value for USART_RXTEN */
-#define _USART_TRIGCTRL_RXTEN_MASK 0x10UL /**< Bit mask for USART_RXTEN */
-#define USART_TRIGCTRL_RXTEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
-#define USART_TRIGCTRL_TXTEN (1 << 5) /**< Transmit Trigger Enable */
-#define _USART_TRIGCTRL_TXTEN_SHIFT 5 /**< Shift value for USART_TXTEN */
-#define _USART_TRIGCTRL_TXTEN_MASK 0x20UL /**< Bit mask for USART_TXTEN */
-#define USART_TRIGCTRL_TXTEN_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
-#define _USART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
-
-/** Bit fields for USART CMD */
-#define _USART_CMD_RESETVALUE 0x00000000UL /**< Default value for USART_CMD */
-#define _USART_CMD_MASK 0x00000FFFUL /**< Mask for USART_CMD */
-#define USART_CMD_RXEN (1 << 0) /**< Receiver Enable */
-#define _USART_CMD_RXEN_SHIFT 0 /**< Shift value for USART_RXEN */
-#define _USART_CMD_RXEN_MASK 0x1UL /**< Bit mask for USART_RXEN */
-#define USART_CMD_RXEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_RXDIS (1 << 1) /**< Receiver Disable */
-#define _USART_CMD_RXDIS_SHIFT 1 /**< Shift value for USART_RXDIS */
-#define _USART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for USART_RXDIS */
-#define USART_CMD_RXDIS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_TXEN (1 << 2) /**< Transmitter Enable */
-#define _USART_CMD_TXEN_SHIFT 2 /**< Shift value for USART_TXEN */
-#define _USART_CMD_TXEN_MASK 0x4UL /**< Bit mask for USART_TXEN */
-#define USART_CMD_TXEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_TXDIS (1 << 3) /**< Transmitter Disable */
-#define _USART_CMD_TXDIS_SHIFT 3 /**< Shift value for USART_TXDIS */
-#define _USART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for USART_TXDIS */
-#define USART_CMD_TXDIS_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_MASTEREN (1 << 4) /**< Master Enable */
-#define _USART_CMD_MASTEREN_SHIFT 4 /**< Shift value for USART_MASTEREN */
-#define _USART_CMD_MASTEREN_MASK 0x10UL /**< Bit mask for USART_MASTEREN */
-#define USART_CMD_MASTEREN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_MASTEREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_MASTERDIS (1 << 5) /**< Master Disable */
-#define _USART_CMD_MASTERDIS_SHIFT 5 /**< Shift value for USART_MASTERDIS */
-#define _USART_CMD_MASTERDIS_MASK 0x20UL /**< Bit mask for USART_MASTERDIS */
-#define USART_CMD_MASTERDIS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_MASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_RXBLOCKEN (1 << 6) /**< Receiver Block Enable */
-#define _USART_CMD_RXBLOCKEN_SHIFT 6 /**< Shift value for USART_RXBLOCKEN */
-#define _USART_CMD_RXBLOCKEN_MASK 0x40UL /**< Bit mask for USART_RXBLOCKEN */
-#define USART_CMD_RXBLOCKEN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_RXBLOCKDIS (1 << 7) /**< Receiver Block Disable */
-#define _USART_CMD_RXBLOCKDIS_SHIFT 7 /**< Shift value for USART_RXBLOCKDIS */
-#define _USART_CMD_RXBLOCKDIS_MASK 0x80UL /**< Bit mask for USART_RXBLOCKDIS */
-#define USART_CMD_RXBLOCKDIS_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_TXTRIEN (1 << 8) /**< Transmitter Tristate Enable */
-#define _USART_CMD_TXTRIEN_SHIFT 8 /**< Shift value for USART_TXTRIEN */
-#define _USART_CMD_TXTRIEN_MASK 0x100UL /**< Bit mask for USART_TXTRIEN */
-#define USART_CMD_TXTRIEN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_TXTRIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_TXTRIDIS (1 << 9) /**< Transmitter Tristate Disable */
-#define _USART_CMD_TXTRIDIS_SHIFT 9 /**< Shift value for USART_TXTRIDIS */
-#define _USART_CMD_TXTRIDIS_MASK 0x200UL /**< Bit mask for USART_TXTRIDIS */
-#define USART_CMD_TXTRIDIS_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_TXTRIDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_CLEARTX (1 << 10) /**< Clear TX */
-#define _USART_CMD_CLEARTX_SHIFT 10 /**< Shift value for USART_CLEARTX */
-#define _USART_CMD_CLEARTX_MASK 0x400UL /**< Bit mask for USART_CLEARTX */
-#define USART_CMD_CLEARTX_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-#define USART_CMD_CLEARRX (1 << 11) /**< Clear RX */
-#define _USART_CMD_CLEARRX_SHIFT 11 /**< Shift value for USART_CLEARRX */
-#define _USART_CMD_CLEARRX_MASK 0x800UL /**< Bit mask for USART_CLEARRX */
-#define USART_CMD_CLEARRX_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_CMD */
-#define _USART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
-
-/** Bit fields for USART STATUS */
-#define _USART_STATUS_RESETVALUE 0x00000040UL /**< Default value for USART_STATUS */
-#define _USART_STATUS_MASK 0x000001FFUL /**< Mask for USART_STATUS */
-#define USART_STATUS_RXENS (1 << 0) /**< Receiver Enable Status */
-#define _USART_STATUS_RXENS_SHIFT 0 /**< Shift value for USART_RXENS */
-#define _USART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for USART_RXENS */
-#define USART_STATUS_RXENS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_TXENS (1 << 1) /**< Transmitter Enable Status */
-#define _USART_STATUS_TXENS_SHIFT 1 /**< Shift value for USART_TXENS */
-#define _USART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for USART_TXENS */
-#define USART_STATUS_TXENS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_MASTER (1 << 2) /**< SPI Master Mode */
-#define _USART_STATUS_MASTER_SHIFT 2 /**< Shift value for USART_MASTER */
-#define _USART_STATUS_MASTER_MASK 0x4UL /**< Bit mask for USART_MASTER */
-#define USART_STATUS_MASTER_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_MASTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_RXBLOCK (1 << 3) /**< Block Incoming Data */
-#define _USART_STATUS_RXBLOCK_SHIFT 3 /**< Shift value for USART_RXBLOCK */
-#define _USART_STATUS_RXBLOCK_MASK 0x8UL /**< Bit mask for USART_RXBLOCK */
-#define USART_STATUS_RXBLOCK_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_TXTRI (1 << 4) /**< Transmitter Tristated */
-#define _USART_STATUS_TXTRI_SHIFT 4 /**< Shift value for USART_TXTRI */
-#define _USART_STATUS_TXTRI_MASK 0x10UL /**< Bit mask for USART_TXTRI */
-#define USART_STATUS_TXTRI_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_TXTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_TXC (1 << 5) /**< TX Complete */
-#define _USART_STATUS_TXC_SHIFT 5 /**< Shift value for USART_TXC */
-#define _USART_STATUS_TXC_MASK 0x20UL /**< Bit mask for USART_TXC */
-#define USART_STATUS_TXC_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_TXBL (1 << 6) /**< TX Buffer Level */
-#define _USART_STATUS_TXBL_SHIFT 6 /**< Shift value for USART_TXBL */
-#define _USART_STATUS_TXBL_MASK 0x40UL /**< Bit mask for USART_TXBL */
-#define USART_STATUS_TXBL_DEFAULT (0x00000001UL << 6) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_RXDATAV (1 << 7) /**< RX Data Valid */
-#define _USART_STATUS_RXDATAV_SHIFT 7 /**< Shift value for USART_RXDATAV */
-#define _USART_STATUS_RXDATAV_MASK 0x80UL /**< Bit mask for USART_RXDATAV */
-#define USART_STATUS_RXDATAV_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-#define USART_STATUS_RXFULL (1 << 8) /**< RX FIFO Full */
-#define _USART_STATUS_RXFULL_SHIFT 8 /**< Shift value for USART_RXFULL */
-#define _USART_STATUS_RXFULL_MASK 0x100UL /**< Bit mask for USART_RXFULL */
-#define USART_STATUS_RXFULL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_STATUS */
-#define _USART_STATUS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
-
-/** Bit fields for USART CLKDIV */
-#define _USART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for USART_CLKDIV */
-#define _USART_CLKDIV_MASK 0x001FFFC0UL /**< Mask for USART_CLKDIV */
-#define _USART_CLKDIV_DIV_SHIFT 6 /**< Shift value for USART_DIV */
-#define _USART_CLKDIV_DIV_MASK 0x1FFFC0UL /**< Bit mask for USART_DIV */
-#define USART_CLKDIV_DIV_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_CLKDIV */
-#define _USART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CLKDIV */
-
-/** Bit fields for USART RXDATAX */
-#define _USART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATAX */
-#define _USART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for USART_RXDATAX */
-#define _USART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
-#define _USART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for USART_RXDATA */
-#define USART_RXDATAX_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDATAX */
-#define _USART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
-#define USART_RXDATAX_PERR (1 << 14) /**< Data Parity Error */
-#define _USART_RXDATAX_PERR_SHIFT 14 /**< Shift value for USART_PERR */
-#define _USART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for USART_PERR */
-#define USART_RXDATAX_PERR_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_RXDATAX */
-#define _USART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
-#define USART_RXDATAX_FERR (1 << 15) /**< Data Framing Error */
-#define _USART_RXDATAX_FERR_SHIFT 15 /**< Shift value for USART_FERR */
-#define _USART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for USART_FERR */
-#define USART_RXDATAX_FERR_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_RXDATAX */
-#define _USART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
-
-/** Bit fields for USART RXDATA */
-#define _USART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATA */
-#define _USART_RXDATA_MASK 0x000000FFUL /**< Mask for USART_RXDATA */
-#define _USART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
-#define _USART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for USART_RXDATA */
-#define USART_RXDATA_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDATA */
-#define _USART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATA */
-
-/** Bit fields for USART RXDOUBLEX */
-#define _USART_RXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_MASK 0xC1FFC1FFUL /**< Mask for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
-#define _USART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL /**< Bit mask for USART_RXDATA0 */
-#define USART_RXDOUBLEX_RXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-#define USART_RXDOUBLEX_PERR0 (1 << 14) /**< Data Parity Error 0 */
-#define _USART_RXDOUBLEX_PERR0_SHIFT 14 /**< Shift value for USART_PERR0 */
-#define _USART_RXDOUBLEX_PERR0_MASK 0x4000UL /**< Bit mask for USART_PERR0 */
-#define USART_RXDOUBLEX_PERR0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-#define USART_RXDOUBLEX_FERR0 (1 << 15) /**< Data Framing Error 0 */
-#define _USART_RXDOUBLEX_FERR0_SHIFT 15 /**< Shift value for USART_FERR0 */
-#define _USART_RXDOUBLEX_FERR0_MASK 0x8000UL /**< Bit mask for USART_FERR0 */
-#define USART_RXDOUBLEX_FERR0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_RXDATA1_SHIFT 16 /**< Shift value for USART_RXDATA1 */
-#define _USART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATA1 */
-#define USART_RXDOUBLEX_RXDATA1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-#define USART_RXDOUBLEX_PERR1 (1 << 30) /**< Data Parity Error 1 */
-#define _USART_RXDOUBLEX_PERR1_SHIFT 30 /**< Shift value for USART_PERR1 */
-#define _USART_RXDOUBLEX_PERR1_MASK 0x40000000UL /**< Bit mask for USART_PERR1 */
-#define USART_RXDOUBLEX_PERR1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-#define USART_RXDOUBLEX_FERR1 (1 << 31) /**< Data Framing Error 1 */
-#define _USART_RXDOUBLEX_FERR1_SHIFT 31 /**< Shift value for USART_FERR1 */
-#define _USART_RXDOUBLEX_FERR1_MASK 0x80000000UL /**< Bit mask for USART_FERR1 */
-#define USART_RXDOUBLEX_FERR1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
-#define _USART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
-
-/** Bit fields for USART RXDOUBLE */
-#define _USART_RXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLE */
-#define _USART_RXDOUBLE_MASK 0x0000FFFFUL /**< Mask for USART_RXDOUBLE */
-#define _USART_RXDOUBLE_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
-#define _USART_RXDOUBLE_RXDATA0_MASK 0xFFUL /**< Bit mask for USART_RXDATA0 */
-#define USART_RXDOUBLE_RXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLE */
-#define _USART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLE */
-#define _USART_RXDOUBLE_RXDATA1_SHIFT 8 /**< Shift value for USART_RXDATA1 */
-#define _USART_RXDOUBLE_RXDATA1_MASK 0xFF00UL /**< Bit mask for USART_RXDATA1 */
-#define USART_RXDOUBLE_RXDATA1_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_RXDOUBLE */
-#define _USART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLE */
-
-/** Bit fields for USART RXDATAXP */
-#define _USART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATAXP */
-#define _USART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for USART_RXDATAXP */
-#define _USART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for USART_RXDATAP */
-#define _USART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP */
-#define USART_RXDATAXP_RXDATAP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDATAXP */
-#define _USART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
-#define USART_RXDATAXP_PERRP (1 << 14) /**< Data Parity Error Peek */
-#define _USART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for USART_PERRP */
-#define _USART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for USART_PERRP */
-#define USART_RXDATAXP_PERRP_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_RXDATAXP */
-#define _USART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
-#define USART_RXDATAXP_FERRP (1 << 15) /**< Data Framing Error Peek */
-#define _USART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for USART_FERRP */
-#define _USART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for USART_FERRP */
-#define USART_RXDATAXP_FERRP_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_RXDATAXP */
-#define _USART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
-
-/** Bit fields for USART RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_MASK 0xC1FFC1FFUL /**< Mask for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_RXDATAP0_SHIFT 0 /**< Shift value for USART_RXDATAP0 */
-#define _USART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP0 */
-#define USART_RXDOUBLEXP_RXDATAP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-#define USART_RXDOUBLEXP_PERRP0 (1 << 14) /**< Data Parity Error 0 Peek */
-#define _USART_RXDOUBLEXP_PERRP0_SHIFT 14 /**< Shift value for USART_PERRP0 */
-#define _USART_RXDOUBLEXP_PERRP0_MASK 0x4000UL /**< Bit mask for USART_PERRP0 */
-#define USART_RXDOUBLEXP_PERRP0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-#define USART_RXDOUBLEXP_FERRP0 (1 << 15) /**< Data Framing Error 0 Peek */
-#define _USART_RXDOUBLEXP_FERRP0_SHIFT 15 /**< Shift value for USART_FERRP0 */
-#define _USART_RXDOUBLEXP_FERRP0_MASK 0x8000UL /**< Bit mask for USART_FERRP0 */
-#define USART_RXDOUBLEXP_FERRP0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_RXDATAP1_SHIFT 16 /**< Shift value for USART_RXDATAP1 */
-#define _USART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATAP1 */
-#define USART_RXDOUBLEXP_RXDATAP1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-#define USART_RXDOUBLEXP_PERRP1 (1 << 30) /**< Data Parity Error 1 Peek */
-#define _USART_RXDOUBLEXP_PERRP1_SHIFT 30 /**< Shift value for USART_PERRP1 */
-#define _USART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL /**< Bit mask for USART_PERRP1 */
-#define USART_RXDOUBLEXP_PERRP1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-#define USART_RXDOUBLEXP_FERRP1 (1 << 31) /**< Data Framing Error 1 Peek */
-#define _USART_RXDOUBLEXP_FERRP1_SHIFT 31 /**< Shift value for USART_FERRP1 */
-#define _USART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL /**< Bit mask for USART_FERRP1 */
-#define USART_RXDOUBLEXP_FERRP1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
-#define _USART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
-
-/** Bit fields for USART TXDATAX */
-#define _USART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for USART_TXDATAX */
-#define _USART_TXDATAX_MASK 0x0000F9FFUL /**< Mask for USART_TXDATAX */
-#define _USART_TXDATAX_TXDATAX_SHIFT 0 /**< Shift value for USART_TXDATAX */
-#define _USART_TXDATAX_TXDATAX_MASK 0x1FFUL /**< Bit mask for USART_TXDATAX */
-#define USART_TXDATAX_TXDATAX_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-#define USART_TXDATAX_UBRXAT (1 << 11) /**< Unblock RX After Transmission */
-#define _USART_TXDATAX_UBRXAT_SHIFT 11 /**< Shift value for USART_UBRXAT */
-#define _USART_TXDATAX_UBRXAT_MASK 0x800UL /**< Bit mask for USART_UBRXAT */
-#define USART_TXDATAX_UBRXAT_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-#define USART_TXDATAX_TXTRIAT (1 << 12) /**< Set TXTRI After Transmission */
-#define _USART_TXDATAX_TXTRIAT_SHIFT 12 /**< Shift value for USART_TXTRIAT */
-#define _USART_TXDATAX_TXTRIAT_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT */
-#define USART_TXDATAX_TXTRIAT_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-#define USART_TXDATAX_TXBREAK (1 << 13) /**< Transmit Data As Break */
-#define _USART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for USART_TXBREAK */
-#define _USART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for USART_TXBREAK */
-#define USART_TXDATAX_TXBREAK_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-#define USART_TXDATAX_TXDISAT (1 << 14) /**< Clear TXEN After Transmission */
-#define _USART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for USART_TXDISAT */
-#define _USART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for USART_TXDISAT */
-#define USART_TXDATAX_TXDISAT_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-#define USART_TXDATAX_RXENAT (1 << 15) /**< Enable RX After Transmission */
-#define _USART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for USART_RXENAT */
-#define _USART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for USART_RXENAT */
-#define USART_TXDATAX_RXENAT_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_TXDATAX */
-#define _USART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
-
-/** Bit fields for USART TXDATA */
-#define _USART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for USART_TXDATA */
-#define _USART_TXDATA_MASK 0x000000FFUL /**< Mask for USART_TXDATA */
-#define _USART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for USART_TXDATA */
-#define _USART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for USART_TXDATA */
-#define USART_TXDATA_TXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_TXDATA */
-#define _USART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATA */
-
-/** Bit fields for USART TXDOUBLEX */
-#define _USART_TXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_MASK 0xF9FFF9FFUL /**< Mask for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
-#define _USART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL /**< Bit mask for USART_TXDATA0 */
-#define USART_TXDOUBLEX_TXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_UBRXAT0 (1 << 11) /**< Unblock RX After Transmission */
-#define _USART_TXDOUBLEX_UBRXAT0_SHIFT 11 /**< Shift value for USART_UBRXAT0 */
-#define _USART_TXDOUBLEX_UBRXAT0_MASK 0x800UL /**< Bit mask for USART_UBRXAT0 */
-#define USART_TXDOUBLEX_UBRXAT0_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXTRIAT0 (1 << 12) /**< Set TXTRI After Transmission */
-#define _USART_TXDOUBLEX_TXTRIAT0_SHIFT 12 /**< Shift value for USART_TXTRIAT0 */
-#define _USART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT0 */
-#define USART_TXDOUBLEX_TXTRIAT0_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXBREAK0 (1 << 13) /**< Transmit Data As Break */
-#define _USART_TXDOUBLEX_TXBREAK0_SHIFT 13 /**< Shift value for USART_TXBREAK0 */
-#define _USART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL /**< Bit mask for USART_TXBREAK0 */
-#define USART_TXDOUBLEX_TXBREAK0_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXDISAT0 (1 << 14) /**< Clear TXEN After Transmission */
-#define _USART_TXDOUBLEX_TXDISAT0_SHIFT 14 /**< Shift value for USART_TXDISAT0 */
-#define _USART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL /**< Bit mask for USART_TXDISAT0 */
-#define USART_TXDOUBLEX_TXDISAT0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_RXENAT0 (1 << 15) /**< Enable RX After Transmission */
-#define _USART_TXDOUBLEX_RXENAT0_SHIFT 15 /**< Shift value for USART_RXENAT0 */
-#define _USART_TXDOUBLEX_RXENAT0_MASK 0x8000UL /**< Bit mask for USART_RXENAT0 */
-#define USART_TXDOUBLEX_RXENAT0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDATA1_SHIFT 16 /**< Shift value for USART_TXDATA1 */
-#define _USART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_TXDATA1 */
-#define USART_TXDOUBLEX_TXDATA1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_UBRXAT1 (1 << 27) /**< Unblock RX After Transmission */
-#define _USART_TXDOUBLEX_UBRXAT1_SHIFT 27 /**< Shift value for USART_UBRXAT1 */
-#define _USART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL /**< Bit mask for USART_UBRXAT1 */
-#define USART_TXDOUBLEX_UBRXAT1_DEFAULT (0x00000000UL << 27) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXTRIAT1 (1 << 28) /**< Set TXTRI After Transmission */
-#define _USART_TXDOUBLEX_TXTRIAT1_SHIFT 28 /**< Shift value for USART_TXTRIAT1 */
-#define _USART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL /**< Bit mask for USART_TXTRIAT1 */
-#define USART_TXDOUBLEX_TXTRIAT1_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXBREAK1 (1 << 29) /**< Transmit Data As Break */
-#define _USART_TXDOUBLEX_TXBREAK1_SHIFT 29 /**< Shift value for USART_TXBREAK1 */
-#define _USART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL /**< Bit mask for USART_TXBREAK1 */
-#define USART_TXDOUBLEX_TXBREAK1_DEFAULT (0x00000000UL << 29) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_TXDISAT1 (1 << 30) /**< Clear TXEN After Transmission */
-#define _USART_TXDOUBLEX_TXDISAT1_SHIFT 30 /**< Shift value for USART_TXDISAT1 */
-#define _USART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL /**< Bit mask for USART_TXDISAT1 */
-#define USART_TXDOUBLEX_TXDISAT1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-#define USART_TXDOUBLEX_RXENAT1 (1 << 31) /**< Enable RX After Transmission */
-#define _USART_TXDOUBLEX_RXENAT1_SHIFT 31 /**< Shift value for USART_RXENAT1 */
-#define _USART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL /**< Bit mask for USART_RXENAT1 */
-#define USART_TXDOUBLEX_RXENAT1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
-#define _USART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
-
-/** Bit fields for USART TXDOUBLE */
-#define _USART_TXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for USART_TXDOUBLE */
-#define _USART_TXDOUBLE_MASK 0x0000FFFFUL /**< Mask for USART_TXDOUBLE */
-#define _USART_TXDOUBLE_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
-#define _USART_TXDOUBLE_TXDATA0_MASK 0xFFUL /**< Bit mask for USART_TXDATA0 */
-#define USART_TXDOUBLE_TXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_TXDOUBLE */
-#define _USART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLE */
-#define _USART_TXDOUBLE_TXDATA1_SHIFT 8 /**< Shift value for USART_TXDATA1 */
-#define _USART_TXDOUBLE_TXDATA1_MASK 0xFF00UL /**< Bit mask for USART_TXDATA1 */
-#define USART_TXDOUBLE_TXDATA1_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_TXDOUBLE */
-#define _USART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLE */
-
-/** Bit fields for USART IF */
-#define _USART_IF_RESETVALUE 0x00000002UL /**< Default value for USART_IF */
-#define _USART_IF_MASK 0x00001FFFUL /**< Mask for USART_IF */
-#define USART_IF_TXC (1 << 0) /**< TX Complete Interrupt Flag */
-#define _USART_IF_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _USART_IF_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define USART_IF_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_TXBL (1 << 1) /**< TX Buffer Level Interrupt Flag */
-#define _USART_IF_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
-#define _USART_IF_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
-#define USART_IF_TXBL_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Flag */
-#define _USART_IF_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
-#define _USART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
-#define USART_IF_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_RXFULL (1 << 3) /**< RX Buffer Full Interrupt Flag */
-#define _USART_IF_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _USART_IF_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define USART_IF_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_RXOF (1 << 4) /**< RX Overflow Interrupt Flag */
-#define _USART_IF_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _USART_IF_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define USART_IF_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_RXUF (1 << 5) /**< RX Underflow Interrupt Flag */
-#define _USART_IF_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _USART_IF_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define USART_IF_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_TXOF (1 << 6) /**< TX Overflow Interrupt Flag */
-#define _USART_IF_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _USART_IF_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define USART_IF_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_TXUF (1 << 7) /**< TX Underflow Interrupt Flag */
-#define _USART_IF_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _USART_IF_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define USART_IF_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_PERR (1 << 8) /**< Parity Error Interrupt Flag */
-#define _USART_IF_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _USART_IF_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define USART_IF_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_FERR (1 << 9) /**< Framing Error Interrupt Flag */
-#define _USART_IF_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _USART_IF_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define USART_IF_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_MPAF (1 << 10) /**< Multi-Processor Address Frame Interrupt Flag */
-#define _USART_IF_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _USART_IF_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define USART_IF_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_SSM (1 << 11) /**< Slave-Select In Master Mode Interrupt Flag */
-#define _USART_IF_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _USART_IF_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define USART_IF_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-#define USART_IF_CCF (1 << 12) /**< Collision Check Fail Interrupt Flag */
-#define _USART_IF_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _USART_IF_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define USART_IF_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_IF */
-#define _USART_IF_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
-
-/** Bit fields for USART IFS */
-#define _USART_IFS_RESETVALUE 0x00000000UL /**< Default value for USART_IFS */
-#define _USART_IFS_MASK 0x00001FF9UL /**< Mask for USART_IFS */
-#define USART_IFS_TXC (1 << 0) /**< Set TX Complete Interrupt Flag */
-#define _USART_IFS_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _USART_IFS_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define USART_IFS_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_RXFULL (1 << 3) /**< Set RX Buffer Full Interrupt Flag */
-#define _USART_IFS_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _USART_IFS_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define USART_IFS_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_RXOF (1 << 4) /**< Set RX Overflow Interrupt Flag */
-#define _USART_IFS_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _USART_IFS_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define USART_IFS_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_RXUF (1 << 5) /**< Set RX Underflow Interrupt Flag */
-#define _USART_IFS_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _USART_IFS_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define USART_IFS_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_TXOF (1 << 6) /**< Set TX Overflow Interrupt Flag */
-#define _USART_IFS_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _USART_IFS_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define USART_IFS_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_TXUF (1 << 7) /**< Set TX Underflow Interrupt Flag */
-#define _USART_IFS_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _USART_IFS_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define USART_IFS_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_PERR (1 << 8) /**< Set Parity Error Interrupt Flag */
-#define _USART_IFS_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _USART_IFS_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define USART_IFS_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_FERR (1 << 9) /**< Set Framing Error Interrupt Flag */
-#define _USART_IFS_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _USART_IFS_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define USART_IFS_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_MPAF (1 << 10) /**< Set Multi-Processor Address Frame Interrupt Flag */
-#define _USART_IFS_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _USART_IFS_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define USART_IFS_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_SSM (1 << 11) /**< Set Slave-Select in Master mode Interrupt Flag */
-#define _USART_IFS_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _USART_IFS_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define USART_IFS_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-#define USART_IFS_CCF (1 << 12) /**< Set Collision Check Fail Interrupt Flag */
-#define _USART_IFS_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _USART_IFS_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define USART_IFS_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_IFS */
-#define _USART_IFS_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
-
-/** Bit fields for USART IFC */
-#define _USART_IFC_RESETVALUE 0x00000000UL /**< Default value for USART_IFC */
-#define _USART_IFC_MASK 0x00001FF9UL /**< Mask for USART_IFC */
-#define USART_IFC_TXC (1 << 0) /**< Clear TX Complete Interrupt Flag */
-#define _USART_IFC_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _USART_IFC_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define USART_IFC_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_RXFULL (1 << 3) /**< Clear RX Buffer Full Interrupt Flag */
-#define _USART_IFC_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _USART_IFC_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define USART_IFC_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_RXOF (1 << 4) /**< Clear RX Overflow Interrupt Flag */
-#define _USART_IFC_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _USART_IFC_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define USART_IFC_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_RXUF (1 << 5) /**< Clear RX Underflow Interrupt Flag */
-#define _USART_IFC_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _USART_IFC_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define USART_IFC_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_TXOF (1 << 6) /**< Clear TX Overflow Interrupt Flag */
-#define _USART_IFC_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _USART_IFC_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define USART_IFC_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_TXUF (1 << 7) /**< Clear TX Underflow Interrupt Flag */
-#define _USART_IFC_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _USART_IFC_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define USART_IFC_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_PERR (1 << 8) /**< Clear Parity Error Interrupt Flag */
-#define _USART_IFC_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _USART_IFC_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define USART_IFC_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_FERR (1 << 9) /**< Clear Framing Error Interrupt Flag */
-#define _USART_IFC_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _USART_IFC_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define USART_IFC_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_MPAF (1 << 10) /**< Clear Multi-Processor Address Frame Interrupt Flag */
-#define _USART_IFC_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _USART_IFC_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define USART_IFC_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_SSM (1 << 11) /**< Clear Slave-Select In Master Mode Interrupt Flag */
-#define _USART_IFC_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _USART_IFC_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define USART_IFC_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-#define USART_IFC_CCF (1 << 12) /**< Clear Collision Check Fail Interrupt Flag */
-#define _USART_IFC_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _USART_IFC_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define USART_IFC_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_IFC */
-#define _USART_IFC_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
-
-/** Bit fields for USART IEN */
-#define _USART_IEN_RESETVALUE 0x00000000UL /**< Default value for USART_IEN */
-#define _USART_IEN_MASK 0x00001FFFUL /**< Mask for USART_IEN */
-#define USART_IEN_TXC (1 << 0) /**< TX Complete Interrupt Enable */
-#define _USART_IEN_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _USART_IEN_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define USART_IEN_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_TXBL (1 << 1) /**< TX Buffer Level Interrupt Enable */
-#define _USART_IEN_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
-#define _USART_IEN_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
-#define USART_IEN_TXBL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Enable */
-#define _USART_IEN_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
-#define _USART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
-#define USART_IEN_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_RXFULL (1 << 3) /**< RX Buffer Full Interrupt Enable */
-#define _USART_IEN_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _USART_IEN_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define USART_IEN_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_RXOF (1 << 4) /**< RX Overflow Interrupt Enable */
-#define _USART_IEN_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _USART_IEN_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define USART_IEN_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_RXUF (1 << 5) /**< RX Underflow Interrupt Enable */
-#define _USART_IEN_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _USART_IEN_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define USART_IEN_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_TXOF (1 << 6) /**< TX Overflow Interrupt Enable */
-#define _USART_IEN_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _USART_IEN_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define USART_IEN_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_TXUF (1 << 7) /**< TX Underflow Interrupt Enable */
-#define _USART_IEN_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _USART_IEN_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define USART_IEN_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_PERR (1 << 8) /**< Parity Error Interrupt Enable */
-#define _USART_IEN_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _USART_IEN_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define USART_IEN_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_FERR (1 << 9) /**< Framing Error Interrupt Enable */
-#define _USART_IEN_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _USART_IEN_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define USART_IEN_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_MPAF (1 << 10) /**< Multi-Processor Address Frame Interrupt Enable */
-#define _USART_IEN_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _USART_IEN_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define USART_IEN_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_SSM (1 << 11) /**< Slave-Select In Master Mode Interrupt Enable */
-#define _USART_IEN_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _USART_IEN_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define USART_IEN_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-#define USART_IEN_CCF (1 << 12) /**< Collision Check Fail Interrupt Enable */
-#define _USART_IEN_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _USART_IEN_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define USART_IEN_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for USART_IEN */
-#define _USART_IEN_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
-
-/** Bit fields for USART IRCTRL */
-#define _USART_IRCTRL_RESETVALUE 0x00000000UL /**< Default value for USART_IRCTRL */
-#define _USART_IRCTRL_MASK 0x000000FFUL /**< Mask for USART_IRCTRL */
-#define USART_IRCTRL_IREN (1 << 0) /**< Enable IrDA Module */
-#define _USART_IRCTRL_IREN_SHIFT 0 /**< Shift value for USART_IREN */
-#define _USART_IRCTRL_IREN_MASK 0x1UL /**< Bit mask for USART_IREN */
-#define USART_IRCTRL_IREN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_SHIFT 1 /**< Shift value for USART_IRPW */
-#define _USART_IRCTRL_IRPW_MASK 0x6UL /**< Bit mask for USART_IRPW */
-#define USART_IRCTRL_IRPW_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_IRCTRL */
-#define USART_IRCTRL_IRPW_ONE (0x00000000UL << 1) /**< Shifted mode ONE for USART_IRCTRL */
-#define USART_IRCTRL_IRPW_TWO (0x00000001UL << 1) /**< Shifted mode TWO for USART_IRCTRL */
-#define USART_IRCTRL_IRPW_THREE (0x00000002UL << 1) /**< Shifted mode THREE for USART_IRCTRL */
-#define USART_IRCTRL_IRPW_FOUR (0x00000003UL << 1) /**< Shifted mode FOUR for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_ONE 0x00000000UL /**< Mode ONE for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_TWO 0x00000001UL /**< Mode TWO for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_THREE 0x00000002UL /**< Mode THREE for USART_IRCTRL */
-#define _USART_IRCTRL_IRPW_FOUR 0x00000003UL /**< Mode FOUR for USART_IRCTRL */
-#define USART_IRCTRL_IRFILT (1 << 3) /**< IrDA RX Filter */
-#define _USART_IRCTRL_IRFILT_SHIFT 3 /**< Shift value for USART_IRFILT */
-#define _USART_IRCTRL_IRFILT_MASK 0x8UL /**< Bit mask for USART_IRFILT */
-#define USART_IRCTRL_IRFILT_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_SHIFT 4 /**< Shift value for USART_IRPRSSEL */
-#define _USART_IRCTRL_IRPRSSEL_MASK 0x70UL /**< Bit mask for USART_IRPRSSEL */
-#define USART_IRCTRL_IRPRSSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH0 (0x00000000UL << 4) /**< Shifted mode PRSCH0 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH1 (0x00000001UL << 4) /**< Shifted mode PRSCH1 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH2 (0x00000002UL << 4) /**< Shifted mode PRSCH2 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH3 (0x00000003UL << 4) /**< Shifted mode PRSCH3 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH4 (0x00000004UL << 4) /**< Shifted mode PRSCH4 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH5 (0x00000005UL << 4) /**< Shifted mode PRSCH5 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH6 (0x00000006UL << 4) /**< Shifted mode PRSCH6 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSSEL_PRSCH7 (0x00000007UL << 4) /**< Shifted mode PRSCH7 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for USART_IRCTRL */
-#define USART_IRCTRL_IRPRSEN (1 << 7) /**< IrDA PRS Channel Enable */
-#define _USART_IRCTRL_IRPRSEN_SHIFT 7 /**< Shift value for USART_IRPRSEN */
-#define _USART_IRCTRL_IRPRSEN_MASK 0x80UL /**< Bit mask for USART_IRPRSEN */
-#define USART_IRCTRL_IRPRSEN_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for USART_IRCTRL */
-#define _USART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
-
-/** Bit fields for USART ROUTE */
-#define _USART_ROUTE_RESETVALUE 0x00000000UL /**< Default value for USART_ROUTE */
-#define _USART_ROUTE_MASK 0x0000030FUL /**< Mask for USART_ROUTE */
-#define USART_ROUTE_RXPEN (1 << 0) /**< RX Pin Enable */
-#define _USART_ROUTE_RXPEN_SHIFT 0 /**< Shift value for USART_RXPEN */
-#define _USART_ROUTE_RXPEN_MASK 0x1UL /**< Bit mask for USART_RXPEN */
-#define USART_ROUTE_RXPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
-#define USART_ROUTE_TXPEN (1 << 1) /**< TX Pin Enable */
-#define _USART_ROUTE_TXPEN_SHIFT 1 /**< Shift value for USART_TXPEN */
-#define _USART_ROUTE_TXPEN_MASK 0x2UL /**< Bit mask for USART_TXPEN */
-#define USART_ROUTE_TXPEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
-#define USART_ROUTE_CSPEN (1 << 2) /**< CS Pin Enable */
-#define _USART_ROUTE_CSPEN_SHIFT 2 /**< Shift value for USART_CSPEN */
-#define _USART_ROUTE_CSPEN_MASK 0x4UL /**< Bit mask for USART_CSPEN */
-#define USART_ROUTE_CSPEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_CSPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
-#define USART_ROUTE_CLKPEN (1 << 3) /**< RX Pin Enable */
-#define _USART_ROUTE_CLKPEN_SHIFT 3 /**< Shift value for USART_CLKPEN */
-#define _USART_ROUTE_CLKPEN_MASK 0x8UL /**< Bit mask for USART_CLKPEN */
-#define USART_ROUTE_CLKPEN_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_CLKPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_SHIFT 8 /**< Shift value for USART_LOCATION */
-#define _USART_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for USART_LOCATION */
-#define USART_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for USART_ROUTE */
-#define USART_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for USART_ROUTE */
-#define USART_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for USART_ROUTE */
-#define USART_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for USART_ROUTE */
-#define USART_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for USART_ROUTE */
-#define _USART_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for USART_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_UART
- * @{
- */
-
-/** Bit fields for UART CTRL */
-#define _UART_CTRL_RESETVALUE 0x00000000UL /**< Default value for UART_CTRL */
-#define _UART_CTRL_MASK 0x1DFFFF7FUL /**< Mask for UART_CTRL */
-#define UART_CTRL_SYNC (1 << 0) /**< USART Synchronous Mode */
-#define _UART_CTRL_SYNC_SHIFT 0 /**< Shift value for USART_SYNC */
-#define _UART_CTRL_SYNC_MASK 0x1UL /**< Bit mask for USART_SYNC */
-#define UART_CTRL_SYNC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_SYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_LOOPBK (1 << 1) /**< Loopback Enable */
-#define _UART_CTRL_LOOPBK_SHIFT 1 /**< Shift value for USART_LOOPBK */
-#define _UART_CTRL_LOOPBK_MASK 0x2UL /**< Bit mask for USART_LOOPBK */
-#define UART_CTRL_LOOPBK_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CCEN (1 << 2) /**< Collision Check Enable */
-#define _UART_CTRL_CCEN_SHIFT 2 /**< Shift value for USART_CCEN */
-#define _UART_CTRL_CCEN_MASK 0x4UL /**< Bit mask for USART_CCEN */
-#define UART_CTRL_CCEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_CCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_MPM (1 << 3) /**< Multi-Processor Mode */
-#define _UART_CTRL_MPM_SHIFT 3 /**< Shift value for USART_MPM */
-#define _UART_CTRL_MPM_MASK 0x8UL /**< Bit mask for USART_MPM */
-#define UART_CTRL_MPM_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_MPAB (1 << 4) /**< Multi-Processor Address-Bit */
-#define _UART_CTRL_MPAB_SHIFT 4 /**< Shift value for USART_MPAB */
-#define _UART_CTRL_MPAB_MASK 0x10UL /**< Bit mask for USART_MPAB */
-#define UART_CTRL_MPAB_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_OVS_SHIFT 5 /**< Shift value for USART_OVS */
-#define _UART_CTRL_OVS_MASK 0x60UL /**< Bit mask for USART_OVS */
-#define UART_CTRL_OVS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_OVS_X16 (0x00000000UL << 5) /**< Shifted mode X16 for UART_CTRL */
-#define UART_CTRL_OVS_X8 (0x00000001UL << 5) /**< Shifted mode X8 for UART_CTRL */
-#define UART_CTRL_OVS_X6 (0x00000002UL << 5) /**< Shifted mode X6 for UART_CTRL */
-#define UART_CTRL_OVS_X4 (0x00000003UL << 5) /**< Shifted mode X4 for UART_CTRL */
-#define _UART_CTRL_OVS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_OVS_X16 0x00000000UL /**< Mode X16 for UART_CTRL */
-#define _UART_CTRL_OVS_X8 0x00000001UL /**< Mode X8 for UART_CTRL */
-#define _UART_CTRL_OVS_X6 0x00000002UL /**< Mode X6 for UART_CTRL */
-#define _UART_CTRL_OVS_X4 0x00000003UL /**< Mode X4 for UART_CTRL */
-#define UART_CTRL_CLKPOL (1 << 8) /**< Clock Polarity */
-#define _UART_CTRL_CLKPOL_SHIFT 8 /**< Shift value for USART_CLKPOL */
-#define _UART_CTRL_CLKPOL_MASK 0x100UL /**< Bit mask for USART_CLKPOL */
-#define UART_CTRL_CLKPOL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CLKPOL_IDLELOW (0x00000000UL << 8) /**< Shifted mode IDLELOW for UART_CTRL */
-#define UART_CTRL_CLKPOL_IDLEHIGH (0x00000001UL << 8) /**< Shifted mode IDLEHIGH for UART_CTRL */
-#define _UART_CTRL_CLKPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_CLKPOL_IDLELOW 0x00000000UL /**< Mode IDLELOW for UART_CTRL */
-#define _UART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL /**< Mode IDLEHIGH for UART_CTRL */
-#define UART_CTRL_CLKPHA (1 << 9) /**< Clock Edge For Setup/Sample */
-#define _UART_CTRL_CLKPHA_SHIFT 9 /**< Shift value for USART_CLKPHA */
-#define _UART_CTRL_CLKPHA_MASK 0x200UL /**< Bit mask for USART_CLKPHA */
-#define UART_CTRL_CLKPHA_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CLKPHA_SAMPLELEADING (0x00000000UL << 9) /**< Shifted mode SAMPLELEADING for UART_CTRL */
-#define UART_CTRL_CLKPHA_SAMPLETRAILING (0x00000001UL << 9) /**< Shifted mode SAMPLETRAILING for UART_CTRL */
-#define _UART_CTRL_CLKPHA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL /**< Mode SAMPLELEADING for UART_CTRL */
-#define _UART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL /**< Mode SAMPLETRAILING for UART_CTRL */
-#define UART_CTRL_MSBF (1 << 10) /**< Most Significant Bit First */
-#define _UART_CTRL_MSBF_SHIFT 10 /**< Shift value for USART_MSBF */
-#define _UART_CTRL_MSBF_MASK 0x400UL /**< Bit mask for USART_MSBF */
-#define UART_CTRL_MSBF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_MSBF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CSMA (1 << 11) /**< Action On Slave-Select In Master Mode */
-#define _UART_CTRL_CSMA_SHIFT 11 /**< Shift value for USART_CSMA */
-#define _UART_CTRL_CSMA_MASK 0x800UL /**< Bit mask for USART_CSMA */
-#define UART_CTRL_CSMA_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CSMA_NOACTION (0x00000000UL << 11) /**< Shifted mode NOACTION for UART_CTRL */
-#define UART_CTRL_CSMA_GOTOSLAVEMODE (0x00000001UL << 11) /**< Shifted mode GOTOSLAVEMODE for UART_CTRL */
-#define _UART_CTRL_CSMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_CSMA_NOACTION 0x00000000UL /**< Mode NOACTION for UART_CTRL */
-#define _UART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL /**< Mode GOTOSLAVEMODE for UART_CTRL */
-#define UART_CTRL_TXBIL (1 << 12) /**< TX Buffer Interrupt Level */
-#define _UART_CTRL_TXBIL_SHIFT 12 /**< Shift value for USART_TXBIL */
-#define _UART_CTRL_TXBIL_MASK 0x1000UL /**< Bit mask for USART_TXBIL */
-#define UART_CTRL_TXBIL_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_TXBIL_EMPTY (0x00000000UL << 12) /**< Shifted mode EMPTY for UART_CTRL */
-#define UART_CTRL_TXBIL_HALFFULL (0x00000001UL << 12) /**< Shifted mode HALFFULL for UART_CTRL */
-#define _UART_CTRL_TXBIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_TXBIL_EMPTY 0x00000000UL /**< Mode EMPTY for UART_CTRL */
-#define _UART_CTRL_TXBIL_HALFFULL 0x00000001UL /**< Mode HALFFULL for UART_CTRL */
-#define UART_CTRL_RXINV (1 << 13) /**< Receiver Input Invert */
-#define _UART_CTRL_RXINV_SHIFT 13 /**< Shift value for USART_RXINV */
-#define _UART_CTRL_RXINV_MASK 0x2000UL /**< Bit mask for USART_RXINV */
-#define UART_CTRL_RXINV_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_RXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_TXINV (1 << 14) /**< Transmitter output Invert */
-#define _UART_CTRL_TXINV_SHIFT 14 /**< Shift value for USART_TXINV */
-#define _UART_CTRL_TXINV_MASK 0x4000UL /**< Bit mask for USART_TXINV */
-#define UART_CTRL_TXINV_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_TXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_CSINV (1 << 15) /**< Chip Select Invert */
-#define _UART_CTRL_CSINV_SHIFT 15 /**< Shift value for USART_CSINV */
-#define _UART_CTRL_CSINV_MASK 0x8000UL /**< Bit mask for USART_CSINV */
-#define UART_CTRL_CSINV_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_CSINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_AUTOCS (1 << 16) /**< Automatic Chip Select */
-#define _UART_CTRL_AUTOCS_SHIFT 16 /**< Shift value for USART_AUTOCS */
-#define _UART_CTRL_AUTOCS_MASK 0x10000UL /**< Bit mask for USART_AUTOCS */
-#define UART_CTRL_AUTOCS_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_AUTOCS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_AUTOTRI (1 << 17) /**< Automatic TX Tristate */
-#define _UART_CTRL_AUTOTRI_SHIFT 17 /**< Shift value for USART_AUTOTRI */
-#define _UART_CTRL_AUTOTRI_MASK 0x20000UL /**< Bit mask for USART_AUTOTRI */
-#define UART_CTRL_AUTOTRI_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_SCMODE (1 << 18) /**< SmartCard Mode */
-#define _UART_CTRL_SCMODE_SHIFT 18 /**< Shift value for USART_SCMODE */
-#define _UART_CTRL_SCMODE_MASK 0x40000UL /**< Bit mask for USART_SCMODE */
-#define UART_CTRL_SCMODE_DEFAULT (0x00000000UL << 18) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_SCMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_SCRETRANS (1 << 19) /**< SmartCard Retransmit */
-#define _UART_CTRL_SCRETRANS_SHIFT 19 /**< Shift value for USART_SCRETRANS */
-#define _UART_CTRL_SCRETRANS_MASK 0x80000UL /**< Bit mask for USART_SCRETRANS */
-#define UART_CTRL_SCRETRANS_DEFAULT (0x00000000UL << 19) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_SCRETRANS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_SKIPPERRF (1 << 20) /**< Skip Parity Error Frames */
-#define _UART_CTRL_SKIPPERRF_SHIFT 20 /**< Shift value for USART_SKIPPERRF */
-#define _UART_CTRL_SKIPPERRF_MASK 0x100000UL /**< Bit mask for USART_SKIPPERRF */
-#define UART_CTRL_SKIPPERRF_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_BIT8DV (1 << 21) /**< Bit 8 Default Value */
-#define _UART_CTRL_BIT8DV_SHIFT 21 /**< Shift value for USART_BIT8DV */
-#define _UART_CTRL_BIT8DV_MASK 0x200000UL /**< Bit mask for USART_BIT8DV */
-#define UART_CTRL_BIT8DV_DEFAULT (0x00000000UL << 21) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_ERRSDMA (1 << 22) /**< Halt DMA On Error */
-#define _UART_CTRL_ERRSDMA_SHIFT 22 /**< Shift value for USART_ERRSDMA */
-#define _UART_CTRL_ERRSDMA_MASK 0x400000UL /**< Bit mask for USART_ERRSDMA */
-#define UART_CTRL_ERRSDMA_DEFAULT (0x00000000UL << 22) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_ERRSRX (1 << 23) /**< Disable RX On Error */
-#define _UART_CTRL_ERRSRX_SHIFT 23 /**< Shift value for USART_ERRSRX */
-#define _UART_CTRL_ERRSRX_MASK 0x800000UL /**< Bit mask for USART_ERRSRX */
-#define UART_CTRL_ERRSRX_DEFAULT (0x00000000UL << 23) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_ERRSRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define UART_CTRL_ERRSTX (1 << 24) /**< Disable TX On Error */
-#define _UART_CTRL_ERRSTX_SHIFT 24 /**< Shift value for USART_ERRSTX */
-#define _UART_CTRL_ERRSTX_MASK 0x1000000UL /**< Bit mask for USART_ERRSTX */
-#define UART_CTRL_ERRSTX_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_ERRSTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_TXDELAY_SHIFT 26 /**< Shift value for USART_TXDELAY */
-#define _UART_CTRL_TXDELAY_MASK 0xC000000UL /**< Bit mask for USART_TXDELAY */
-#define UART_CTRL_TXDELAY_DEFAULT (0x00000000UL << 26) /**< Shifted mode DEFAULT for UART_CTRL */
-#define UART_CTRL_TXDELAY_NONE (0x00000000UL << 26) /**< Shifted mode NONE for UART_CTRL */
-#define UART_CTRL_TXDELAY_SINGLE (0x00000001UL << 26) /**< Shifted mode SINGLE for UART_CTRL */
-#define UART_CTRL_TXDELAY_DOUBLE (0x00000002UL << 26) /**< Shifted mode DOUBLE for UART_CTRL */
-#define UART_CTRL_TXDELAY_TRIPLE (0x00000003UL << 26) /**< Shifted mode TRIPLE for UART_CTRL */
-#define _UART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for UART_CTRL */
-#define _UART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for UART_CTRL */
-#define _UART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for UART_CTRL */
-#define _UART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for UART_CTRL */
-#define UART_CTRL_BYTESWAP (1 << 28) /**< Byteswap In Double Accesses */
-#define _UART_CTRL_BYTESWAP_SHIFT 28 /**< Shift value for USART_BYTESWAP */
-#define _UART_CTRL_BYTESWAP_MASK 0x10000000UL /**< Bit mask for USART_BYTESWAP */
-#define UART_CTRL_BYTESWAP_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for UART_CTRL */
-#define _UART_CTRL_BYTESWAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CTRL */
-
-/** Bit fields for UART FRAME */
-#define _UART_FRAME_RESETVALUE 0x00001005UL /**< Default value for UART_FRAME */
-#define _UART_FRAME_MASK 0x0000330FUL /**< Mask for UART_FRAME */
-#define _UART_FRAME_DATABITS_SHIFT 0 /**< Shift value for USART_DATABITS */
-#define _UART_FRAME_DATABITS_MASK 0xFUL /**< Bit mask for USART_DATABITS */
-#define UART_FRAME_DATABITS_FOUR (0x00000001UL << 0) /**< Shifted mode FOUR for UART_FRAME */
-#define UART_FRAME_DATABITS_FIVE (0x00000002UL << 0) /**< Shifted mode FIVE for UART_FRAME */
-#define UART_FRAME_DATABITS_SIX (0x00000003UL << 0) /**< Shifted mode SIX for UART_FRAME */
-#define UART_FRAME_DATABITS_SEVEN (0x00000004UL << 0) /**< Shifted mode SEVEN for UART_FRAME */
-#define UART_FRAME_DATABITS_DEFAULT (0x00000005UL << 0) /**< Shifted mode DEFAULT for UART_FRAME */
-#define UART_FRAME_DATABITS_EIGHT (0x00000005UL << 0) /**< Shifted mode EIGHT for UART_FRAME */
-#define UART_FRAME_DATABITS_NINE (0x00000006UL << 0) /**< Shifted mode NINE for UART_FRAME */
-#define UART_FRAME_DATABITS_TEN (0x00000007UL << 0) /**< Shifted mode TEN for UART_FRAME */
-#define UART_FRAME_DATABITS_ELEVEN (0x00000008UL << 0) /**< Shifted mode ELEVEN for UART_FRAME */
-#define UART_FRAME_DATABITS_TWELVE (0x00000009UL << 0) /**< Shifted mode TWELVE for UART_FRAME */
-#define UART_FRAME_DATABITS_THIRTEEN (0x0000000AUL << 0) /**< Shifted mode THIRTEEN for UART_FRAME */
-#define UART_FRAME_DATABITS_FOURTEEN (0x0000000BUL << 0) /**< Shifted mode FOURTEEN for UART_FRAME */
-#define UART_FRAME_DATABITS_FIFTEEN (0x0000000CUL << 0) /**< Shifted mode FIFTEEN for UART_FRAME */
-#define UART_FRAME_DATABITS_SIXTEEN (0x0000000DUL << 0) /**< Shifted mode SIXTEEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_FOUR 0x00000001UL /**< Mode FOUR for UART_FRAME */
-#define _UART_FRAME_DATABITS_FIVE 0x00000002UL /**< Mode FIVE for UART_FRAME */
-#define _UART_FRAME_DATABITS_SIX 0x00000003UL /**< Mode SIX for UART_FRAME */
-#define _UART_FRAME_DATABITS_SEVEN 0x00000004UL /**< Mode SEVEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_DEFAULT 0x00000005UL /**< Mode DEFAULT for UART_FRAME */
-#define _UART_FRAME_DATABITS_EIGHT 0x00000005UL /**< Mode EIGHT for UART_FRAME */
-#define _UART_FRAME_DATABITS_NINE 0x00000006UL /**< Mode NINE for UART_FRAME */
-#define _UART_FRAME_DATABITS_TEN 0x00000007UL /**< Mode TEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_ELEVEN 0x00000008UL /**< Mode ELEVEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_TWELVE 0x00000009UL /**< Mode TWELVE for UART_FRAME */
-#define _UART_FRAME_DATABITS_THIRTEEN 0x0000000AUL /**< Mode THIRTEEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_FOURTEEN 0x0000000BUL /**< Mode FOURTEEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_FIFTEEN 0x0000000CUL /**< Mode FIFTEEN for UART_FRAME */
-#define _UART_FRAME_DATABITS_SIXTEEN 0x0000000DUL /**< Mode SIXTEEN for UART_FRAME */
-#define _UART_FRAME_PARITY_SHIFT 8 /**< Shift value for USART_PARITY */
-#define _UART_FRAME_PARITY_MASK 0x300UL /**< Bit mask for USART_PARITY */
-#define UART_FRAME_PARITY_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_FRAME */
-#define UART_FRAME_PARITY_NONE (0x00000000UL << 8) /**< Shifted mode NONE for UART_FRAME */
-#define UART_FRAME_PARITY_EVEN (0x00000002UL << 8) /**< Shifted mode EVEN for UART_FRAME */
-#define UART_FRAME_PARITY_ODD (0x00000003UL << 8) /**< Shifted mode ODD for UART_FRAME */
-#define _UART_FRAME_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_FRAME */
-#define _UART_FRAME_PARITY_NONE 0x00000000UL /**< Mode NONE for UART_FRAME */
-#define _UART_FRAME_PARITY_EVEN 0x00000002UL /**< Mode EVEN for UART_FRAME */
-#define _UART_FRAME_PARITY_ODD 0x00000003UL /**< Mode ODD for UART_FRAME */
-#define _UART_FRAME_STOPBITS_SHIFT 12 /**< Shift value for USART_STOPBITS */
-#define _UART_FRAME_STOPBITS_MASK 0x3000UL /**< Bit mask for USART_STOPBITS */
-#define UART_FRAME_STOPBITS_HALF (0x00000000UL << 12) /**< Shifted mode HALF for UART_FRAME */
-#define UART_FRAME_STOPBITS_DEFAULT (0x00000001UL << 12) /**< Shifted mode DEFAULT for UART_FRAME */
-#define UART_FRAME_STOPBITS_ONE (0x00000001UL << 12) /**< Shifted mode ONE for UART_FRAME */
-#define UART_FRAME_STOPBITS_ONEANDAHALF (0x00000002UL << 12) /**< Shifted mode ONEANDAHALF for UART_FRAME */
-#define UART_FRAME_STOPBITS_TWO (0x00000003UL << 12) /**< Shifted mode TWO for UART_FRAME */
-#define _UART_FRAME_STOPBITS_HALF 0x00000000UL /**< Mode HALF for UART_FRAME */
-#define _UART_FRAME_STOPBITS_DEFAULT 0x00000001UL /**< Mode DEFAULT for UART_FRAME */
-#define _UART_FRAME_STOPBITS_ONE 0x00000001UL /**< Mode ONE for UART_FRAME */
-#define _UART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL /**< Mode ONEANDAHALF for UART_FRAME */
-#define _UART_FRAME_STOPBITS_TWO 0x00000003UL /**< Mode TWO for UART_FRAME */
-
-/** Bit fields for UART TRIGCTRL */
-#define _UART_TRIGCTRL_RESETVALUE 0x00000000UL /**< Default value for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_MASK 0x00000037UL /**< Mask for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_SHIFT 0 /**< Shift value for USART_TSEL */
-#define _UART_TRIGCTRL_TSEL_MASK 0x7UL /**< Bit mask for USART_TSEL */
-#define UART_TRIGCTRL_TSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH0 (0x00000000UL << 0) /**< Shifted mode PRSCH0 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH1 (0x00000001UL << 0) /**< Shifted mode PRSCH1 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH2 (0x00000002UL << 0) /**< Shifted mode PRSCH2 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH3 (0x00000003UL << 0) /**< Shifted mode PRSCH3 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH4 (0x00000004UL << 0) /**< Shifted mode PRSCH4 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH5 (0x00000005UL << 0) /**< Shifted mode PRSCH5 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH6 (0x00000006UL << 0) /**< Shifted mode PRSCH6 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TSEL_PRSCH7 (0x00000007UL << 0) /**< Shifted mode PRSCH7 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for UART_TRIGCTRL */
-#define UART_TRIGCTRL_RXTEN (1 << 4) /**< Receive Trigger Enable */
-#define _UART_TRIGCTRL_RXTEN_SHIFT 4 /**< Shift value for USART_RXTEN */
-#define _UART_TRIGCTRL_RXTEN_MASK 0x10UL /**< Bit mask for USART_RXTEN */
-#define UART_TRIGCTRL_RXTEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TRIGCTRL */
-#define UART_TRIGCTRL_TXTEN (1 << 5) /**< Transmit Trigger Enable */
-#define _UART_TRIGCTRL_TXTEN_SHIFT 5 /**< Shift value for USART_TXTEN */
-#define _UART_TRIGCTRL_TXTEN_MASK 0x20UL /**< Bit mask for USART_TXTEN */
-#define UART_TRIGCTRL_TXTEN_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_TRIGCTRL */
-#define _UART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TRIGCTRL */
-
-/** Bit fields for UART CMD */
-#define _UART_CMD_RESETVALUE 0x00000000UL /**< Default value for UART_CMD */
-#define _UART_CMD_MASK 0x00000FFFUL /**< Mask for UART_CMD */
-#define UART_CMD_RXEN (1 << 0) /**< Receiver Enable */
-#define _UART_CMD_RXEN_SHIFT 0 /**< Shift value for USART_RXEN */
-#define _UART_CMD_RXEN_MASK 0x1UL /**< Bit mask for USART_RXEN */
-#define UART_CMD_RXEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_RXDIS (1 << 1) /**< Receiver Disable */
-#define _UART_CMD_RXDIS_SHIFT 1 /**< Shift value for USART_RXDIS */
-#define _UART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for USART_RXDIS */
-#define UART_CMD_RXDIS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_TXEN (1 << 2) /**< Transmitter Enable */
-#define _UART_CMD_TXEN_SHIFT 2 /**< Shift value for USART_TXEN */
-#define _UART_CMD_TXEN_MASK 0x4UL /**< Bit mask for USART_TXEN */
-#define UART_CMD_TXEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_TXDIS (1 << 3) /**< Transmitter Disable */
-#define _UART_CMD_TXDIS_SHIFT 3 /**< Shift value for USART_TXDIS */
-#define _UART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for USART_TXDIS */
-#define UART_CMD_TXDIS_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_MASTEREN (1 << 4) /**< Master Enable */
-#define _UART_CMD_MASTEREN_SHIFT 4 /**< Shift value for USART_MASTEREN */
-#define _UART_CMD_MASTEREN_MASK 0x10UL /**< Bit mask for USART_MASTEREN */
-#define UART_CMD_MASTEREN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_MASTEREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_MASTERDIS (1 << 5) /**< Master Disable */
-#define _UART_CMD_MASTERDIS_SHIFT 5 /**< Shift value for USART_MASTERDIS */
-#define _UART_CMD_MASTERDIS_MASK 0x20UL /**< Bit mask for USART_MASTERDIS */
-#define UART_CMD_MASTERDIS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_MASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_RXBLOCKEN (1 << 6) /**< Receiver Block Enable */
-#define _UART_CMD_RXBLOCKEN_SHIFT 6 /**< Shift value for USART_RXBLOCKEN */
-#define _UART_CMD_RXBLOCKEN_MASK 0x40UL /**< Bit mask for USART_RXBLOCKEN */
-#define UART_CMD_RXBLOCKEN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_RXBLOCKDIS (1 << 7) /**< Receiver Block Disable */
-#define _UART_CMD_RXBLOCKDIS_SHIFT 7 /**< Shift value for USART_RXBLOCKDIS */
-#define _UART_CMD_RXBLOCKDIS_MASK 0x80UL /**< Bit mask for USART_RXBLOCKDIS */
-#define UART_CMD_RXBLOCKDIS_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_TXTRIEN (1 << 8) /**< Transmitter Tristate Enable */
-#define _UART_CMD_TXTRIEN_SHIFT 8 /**< Shift value for USART_TXTRIEN */
-#define _UART_CMD_TXTRIEN_MASK 0x100UL /**< Bit mask for USART_TXTRIEN */
-#define UART_CMD_TXTRIEN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_TXTRIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_TXTRIDIS (1 << 9) /**< Transmitter Tristate Disable */
-#define _UART_CMD_TXTRIDIS_SHIFT 9 /**< Shift value for USART_TXTRIDIS */
-#define _UART_CMD_TXTRIDIS_MASK 0x200UL /**< Bit mask for USART_TXTRIDIS */
-#define UART_CMD_TXTRIDIS_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_TXTRIDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_CLEARTX (1 << 10) /**< Clear TX */
-#define _UART_CMD_CLEARTX_SHIFT 10 /**< Shift value for USART_CLEARTX */
-#define _UART_CMD_CLEARTX_MASK 0x400UL /**< Bit mask for USART_CLEARTX */
-#define UART_CMD_CLEARTX_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-#define UART_CMD_CLEARRX (1 << 11) /**< Clear RX */
-#define _UART_CMD_CLEARRX_SHIFT 11 /**< Shift value for USART_CLEARRX */
-#define _UART_CMD_CLEARRX_MASK 0x800UL /**< Bit mask for USART_CLEARRX */
-#define UART_CMD_CLEARRX_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_CMD */
-#define _UART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CMD */
-
-/** Bit fields for UART STATUS */
-#define _UART_STATUS_RESETVALUE 0x00000040UL /**< Default value for UART_STATUS */
-#define _UART_STATUS_MASK 0x000001FFUL /**< Mask for UART_STATUS */
-#define UART_STATUS_RXENS (1 << 0) /**< Receiver Enable Status */
-#define _UART_STATUS_RXENS_SHIFT 0 /**< Shift value for USART_RXENS */
-#define _UART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for USART_RXENS */
-#define UART_STATUS_RXENS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_TXENS (1 << 1) /**< Transmitter Enable Status */
-#define _UART_STATUS_TXENS_SHIFT 1 /**< Shift value for USART_TXENS */
-#define _UART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for USART_TXENS */
-#define UART_STATUS_TXENS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_MASTER (1 << 2) /**< SPI Master Mode */
-#define _UART_STATUS_MASTER_SHIFT 2 /**< Shift value for USART_MASTER */
-#define _UART_STATUS_MASTER_MASK 0x4UL /**< Bit mask for USART_MASTER */
-#define UART_STATUS_MASTER_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_MASTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_RXBLOCK (1 << 3) /**< Block Incoming Data */
-#define _UART_STATUS_RXBLOCK_SHIFT 3 /**< Shift value for USART_RXBLOCK */
-#define _UART_STATUS_RXBLOCK_MASK 0x8UL /**< Bit mask for USART_RXBLOCK */
-#define UART_STATUS_RXBLOCK_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_TXTRI (1 << 4) /**< Transmitter Tristated */
-#define _UART_STATUS_TXTRI_SHIFT 4 /**< Shift value for USART_TXTRI */
-#define _UART_STATUS_TXTRI_MASK 0x10UL /**< Bit mask for USART_TXTRI */
-#define UART_STATUS_TXTRI_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_TXTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_TXC (1 << 5) /**< TX Complete */
-#define _UART_STATUS_TXC_SHIFT 5 /**< Shift value for USART_TXC */
-#define _UART_STATUS_TXC_MASK 0x20UL /**< Bit mask for USART_TXC */
-#define UART_STATUS_TXC_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_TXBL (1 << 6) /**< TX Buffer Level */
-#define _UART_STATUS_TXBL_SHIFT 6 /**< Shift value for USART_TXBL */
-#define _UART_STATUS_TXBL_MASK 0x40UL /**< Bit mask for USART_TXBL */
-#define UART_STATUS_TXBL_DEFAULT (0x00000001UL << 6) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_RXDATAV (1 << 7) /**< RX Data Valid */
-#define _UART_STATUS_RXDATAV_SHIFT 7 /**< Shift value for USART_RXDATAV */
-#define _UART_STATUS_RXDATAV_MASK 0x80UL /**< Bit mask for USART_RXDATAV */
-#define UART_STATUS_RXDATAV_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-#define UART_STATUS_RXFULL (1 << 8) /**< RX FIFO Full */
-#define _UART_STATUS_RXFULL_SHIFT 8 /**< Shift value for USART_RXFULL */
-#define _UART_STATUS_RXFULL_MASK 0x100UL /**< Bit mask for USART_RXFULL */
-#define UART_STATUS_RXFULL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_STATUS */
-#define _UART_STATUS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_STATUS */
-
-/** Bit fields for UART CLKDIV */
-#define _UART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for UART_CLKDIV */
-#define _UART_CLKDIV_MASK 0x001FFFC0UL /**< Mask for UART_CLKDIV */
-#define _UART_CLKDIV_DIV_SHIFT 6 /**< Shift value for USART_DIV */
-#define _UART_CLKDIV_DIV_MASK 0x1FFFC0UL /**< Bit mask for USART_DIV */
-#define UART_CLKDIV_DIV_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_CLKDIV */
-#define _UART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_CLKDIV */
-
-/** Bit fields for UART RXDATAX */
-#define _UART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for UART_RXDATAX */
-#define _UART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for UART_RXDATAX */
-#define _UART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
-#define _UART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for USART_RXDATA */
-#define UART_RXDATAX_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDATAX */
-#define _UART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAX */
-#define UART_RXDATAX_PERR (1 << 14) /**< Data Parity Error */
-#define _UART_RXDATAX_PERR_SHIFT 14 /**< Shift value for USART_PERR */
-#define _UART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for USART_PERR */
-#define UART_RXDATAX_PERR_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_RXDATAX */
-#define _UART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAX */
-#define UART_RXDATAX_FERR (1 << 15) /**< Data Framing Error */
-#define _UART_RXDATAX_FERR_SHIFT 15 /**< Shift value for USART_FERR */
-#define _UART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for USART_FERR */
-#define UART_RXDATAX_FERR_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_RXDATAX */
-#define _UART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAX */
-
-/** Bit fields for UART RXDATA */
-#define _UART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for UART_RXDATA */
-#define _UART_RXDATA_MASK 0x000000FFUL /**< Mask for UART_RXDATA */
-#define _UART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
-#define _UART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for USART_RXDATA */
-#define UART_RXDATA_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDATA */
-#define _UART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATA */
-
-/** Bit fields for UART RXDOUBLEX */
-#define _UART_RXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_MASK 0xC1FFC1FFUL /**< Mask for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
-#define _UART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL /**< Bit mask for USART_RXDATA0 */
-#define UART_RXDOUBLEX_RXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-#define UART_RXDOUBLEX_PERR0 (1 << 14) /**< Data Parity Error 0 */
-#define _UART_RXDOUBLEX_PERR0_SHIFT 14 /**< Shift value for USART_PERR0 */
-#define _UART_RXDOUBLEX_PERR0_MASK 0x4000UL /**< Bit mask for USART_PERR0 */
-#define UART_RXDOUBLEX_PERR0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-#define UART_RXDOUBLEX_FERR0 (1 << 15) /**< Data Framing Error 0 */
-#define _UART_RXDOUBLEX_FERR0_SHIFT 15 /**< Shift value for USART_FERR0 */
-#define _UART_RXDOUBLEX_FERR0_MASK 0x8000UL /**< Bit mask for USART_FERR0 */
-#define UART_RXDOUBLEX_FERR0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_RXDATA1_SHIFT 16 /**< Shift value for USART_RXDATA1 */
-#define _UART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATA1 */
-#define UART_RXDOUBLEX_RXDATA1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-#define UART_RXDOUBLEX_PERR1 (1 << 30) /**< Data Parity Error 1 */
-#define _UART_RXDOUBLEX_PERR1_SHIFT 30 /**< Shift value for USART_PERR1 */
-#define _UART_RXDOUBLEX_PERR1_MASK 0x40000000UL /**< Bit mask for USART_PERR1 */
-#define UART_RXDOUBLEX_PERR1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-#define UART_RXDOUBLEX_FERR1 (1 << 31) /**< Data Framing Error 1 */
-#define _UART_RXDOUBLEX_FERR1_SHIFT 31 /**< Shift value for USART_FERR1 */
-#define _UART_RXDOUBLEX_FERR1_MASK 0x80000000UL /**< Bit mask for USART_FERR1 */
-#define UART_RXDOUBLEX_FERR1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for UART_RXDOUBLEX */
-#define _UART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEX */
-
-/** Bit fields for UART RXDOUBLE */
-#define _UART_RXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for UART_RXDOUBLE */
-#define _UART_RXDOUBLE_MASK 0x0000FFFFUL /**< Mask for UART_RXDOUBLE */
-#define _UART_RXDOUBLE_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
-#define _UART_RXDOUBLE_RXDATA0_MASK 0xFFUL /**< Bit mask for USART_RXDATA0 */
-#define UART_RXDOUBLE_RXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDOUBLE */
-#define _UART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLE */
-#define _UART_RXDOUBLE_RXDATA1_SHIFT 8 /**< Shift value for USART_RXDATA1 */
-#define _UART_RXDOUBLE_RXDATA1_MASK 0xFF00UL /**< Bit mask for USART_RXDATA1 */
-#define UART_RXDOUBLE_RXDATA1_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_RXDOUBLE */
-#define _UART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLE */
-
-/** Bit fields for UART RXDATAXP */
-#define _UART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for UART_RXDATAXP */
-#define _UART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for UART_RXDATAXP */
-#define _UART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for USART_RXDATAP */
-#define _UART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP */
-#define UART_RXDATAXP_RXDATAP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDATAXP */
-#define _UART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAXP */
-#define UART_RXDATAXP_PERRP (1 << 14) /**< Data Parity Error Peek */
-#define _UART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for USART_PERRP */
-#define _UART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for USART_PERRP */
-#define UART_RXDATAXP_PERRP_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_RXDATAXP */
-#define _UART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAXP */
-#define UART_RXDATAXP_FERRP (1 << 15) /**< Data Framing Error Peek */
-#define _UART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for USART_FERRP */
-#define _UART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for USART_FERRP */
-#define UART_RXDATAXP_FERRP_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_RXDATAXP */
-#define _UART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDATAXP */
-
-/** Bit fields for UART RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_RESETVALUE 0x00000000UL /**< Default value for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_MASK 0xC1FFC1FFUL /**< Mask for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_RXDATAP0_SHIFT 0 /**< Shift value for USART_RXDATAP0 */
-#define _UART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP0 */
-#define UART_RXDOUBLEXP_RXDATAP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-#define UART_RXDOUBLEXP_PERRP0 (1 << 14) /**< Data Parity Error 0 Peek */
-#define _UART_RXDOUBLEXP_PERRP0_SHIFT 14 /**< Shift value for USART_PERRP0 */
-#define _UART_RXDOUBLEXP_PERRP0_MASK 0x4000UL /**< Bit mask for USART_PERRP0 */
-#define UART_RXDOUBLEXP_PERRP0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-#define UART_RXDOUBLEXP_FERRP0 (1 << 15) /**< Data Framing Error 0 Peek */
-#define _UART_RXDOUBLEXP_FERRP0_SHIFT 15 /**< Shift value for USART_FERRP0 */
-#define _UART_RXDOUBLEXP_FERRP0_MASK 0x8000UL /**< Bit mask for USART_FERRP0 */
-#define UART_RXDOUBLEXP_FERRP0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_RXDATAP1_SHIFT 16 /**< Shift value for USART_RXDATAP1 */
-#define _UART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATAP1 */
-#define UART_RXDOUBLEXP_RXDATAP1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-#define UART_RXDOUBLEXP_PERRP1 (1 << 30) /**< Data Parity Error 1 Peek */
-#define _UART_RXDOUBLEXP_PERRP1_SHIFT 30 /**< Shift value for USART_PERRP1 */
-#define _UART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL /**< Bit mask for USART_PERRP1 */
-#define UART_RXDOUBLEXP_PERRP1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-#define UART_RXDOUBLEXP_FERRP1 (1 << 31) /**< Data Framing Error 1 Peek */
-#define _UART_RXDOUBLEXP_FERRP1_SHIFT 31 /**< Shift value for USART_FERRP1 */
-#define _UART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL /**< Bit mask for USART_FERRP1 */
-#define UART_RXDOUBLEXP_FERRP1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for UART_RXDOUBLEXP */
-#define _UART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_RXDOUBLEXP */
-
-/** Bit fields for UART TXDATAX */
-#define _UART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for UART_TXDATAX */
-#define _UART_TXDATAX_MASK 0x0000F9FFUL /**< Mask for UART_TXDATAX */
-#define _UART_TXDATAX_TXDATAX_SHIFT 0 /**< Shift value for USART_TXDATAX */
-#define _UART_TXDATAX_TXDATAX_MASK 0x1FFUL /**< Bit mask for USART_TXDATAX */
-#define UART_TXDATAX_TXDATAX_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-#define UART_TXDATAX_UBRXAT (1 << 11) /**< Unblock RX After Transmission */
-#define _UART_TXDATAX_UBRXAT_SHIFT 11 /**< Shift value for USART_UBRXAT */
-#define _UART_TXDATAX_UBRXAT_MASK 0x800UL /**< Bit mask for USART_UBRXAT */
-#define UART_TXDATAX_UBRXAT_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-#define UART_TXDATAX_TXTRIAT (1 << 12) /**< Set TXTRI After Transmission */
-#define _UART_TXDATAX_TXTRIAT_SHIFT 12 /**< Shift value for USART_TXTRIAT */
-#define _UART_TXDATAX_TXTRIAT_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT */
-#define UART_TXDATAX_TXTRIAT_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-#define UART_TXDATAX_TXBREAK (1 << 13) /**< Transmit Data As Break */
-#define _UART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for USART_TXBREAK */
-#define _UART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for USART_TXBREAK */
-#define UART_TXDATAX_TXBREAK_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-#define UART_TXDATAX_TXDISAT (1 << 14) /**< Clear TXEN After Transmission */
-#define _UART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for USART_TXDISAT */
-#define _UART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for USART_TXDISAT */
-#define UART_TXDATAX_TXDISAT_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-#define UART_TXDATAX_RXENAT (1 << 15) /**< Enable RX After Transmission */
-#define _UART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for USART_RXENAT */
-#define _UART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for USART_RXENAT */
-#define UART_TXDATAX_RXENAT_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_TXDATAX */
-#define _UART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATAX */
-
-/** Bit fields for UART TXDATA */
-#define _UART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for UART_TXDATA */
-#define _UART_TXDATA_MASK 0x000000FFUL /**< Mask for UART_TXDATA */
-#define _UART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for USART_TXDATA */
-#define _UART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for USART_TXDATA */
-#define UART_TXDATA_TXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_TXDATA */
-#define _UART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDATA */
-
-/** Bit fields for UART TXDOUBLEX */
-#define _UART_TXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_MASK 0xF9FFF9FFUL /**< Mask for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
-#define _UART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL /**< Bit mask for USART_TXDATA0 */
-#define UART_TXDOUBLEX_TXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_UBRXAT0 (1 << 11) /**< Unblock RX After Transmission */
-#define _UART_TXDOUBLEX_UBRXAT0_SHIFT 11 /**< Shift value for USART_UBRXAT0 */
-#define _UART_TXDOUBLEX_UBRXAT0_MASK 0x800UL /**< Bit mask for USART_UBRXAT0 */
-#define UART_TXDOUBLEX_UBRXAT0_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXTRIAT0 (1 << 12) /**< Set TXTRI After Transmission */
-#define _UART_TXDOUBLEX_TXTRIAT0_SHIFT 12 /**< Shift value for USART_TXTRIAT0 */
-#define _UART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT0 */
-#define UART_TXDOUBLEX_TXTRIAT0_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXBREAK0 (1 << 13) /**< Transmit Data As Break */
-#define _UART_TXDOUBLEX_TXBREAK0_SHIFT 13 /**< Shift value for USART_TXBREAK0 */
-#define _UART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL /**< Bit mask for USART_TXBREAK0 */
-#define UART_TXDOUBLEX_TXBREAK0_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXDISAT0 (1 << 14) /**< Clear TXEN After Transmission */
-#define _UART_TXDOUBLEX_TXDISAT0_SHIFT 14 /**< Shift value for USART_TXDISAT0 */
-#define _UART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL /**< Bit mask for USART_TXDISAT0 */
-#define UART_TXDOUBLEX_TXDISAT0_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_RXENAT0 (1 << 15) /**< Enable RX After Transmission */
-#define _UART_TXDOUBLEX_RXENAT0_SHIFT 15 /**< Shift value for USART_RXENAT0 */
-#define _UART_TXDOUBLEX_RXENAT0_MASK 0x8000UL /**< Bit mask for USART_RXENAT0 */
-#define UART_TXDOUBLEX_RXENAT0_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDATA1_SHIFT 16 /**< Shift value for USART_TXDATA1 */
-#define _UART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_TXDATA1 */
-#define UART_TXDOUBLEX_TXDATA1_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_UBRXAT1 (1 << 27) /**< Unblock RX After Transmission */
-#define _UART_TXDOUBLEX_UBRXAT1_SHIFT 27 /**< Shift value for USART_UBRXAT1 */
-#define _UART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL /**< Bit mask for USART_UBRXAT1 */
-#define UART_TXDOUBLEX_UBRXAT1_DEFAULT (0x00000000UL << 27) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXTRIAT1 (1 << 28) /**< Set TXTRI After Transmission */
-#define _UART_TXDOUBLEX_TXTRIAT1_SHIFT 28 /**< Shift value for USART_TXTRIAT1 */
-#define _UART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL /**< Bit mask for USART_TXTRIAT1 */
-#define UART_TXDOUBLEX_TXTRIAT1_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXBREAK1 (1 << 29) /**< Transmit Data As Break */
-#define _UART_TXDOUBLEX_TXBREAK1_SHIFT 29 /**< Shift value for USART_TXBREAK1 */
-#define _UART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL /**< Bit mask for USART_TXBREAK1 */
-#define UART_TXDOUBLEX_TXBREAK1_DEFAULT (0x00000000UL << 29) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_TXDISAT1 (1 << 30) /**< Clear TXEN After Transmission */
-#define _UART_TXDOUBLEX_TXDISAT1_SHIFT 30 /**< Shift value for USART_TXDISAT1 */
-#define _UART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL /**< Bit mask for USART_TXDISAT1 */
-#define UART_TXDOUBLEX_TXDISAT1_DEFAULT (0x00000000UL << 30) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-#define UART_TXDOUBLEX_RXENAT1 (1 << 31) /**< Enable RX After Transmission */
-#define _UART_TXDOUBLEX_RXENAT1_SHIFT 31 /**< Shift value for USART_RXENAT1 */
-#define _UART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL /**< Bit mask for USART_RXENAT1 */
-#define UART_TXDOUBLEX_RXENAT1_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for UART_TXDOUBLEX */
-#define _UART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLEX */
-
-/** Bit fields for UART TXDOUBLE */
-#define _UART_TXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for UART_TXDOUBLE */
-#define _UART_TXDOUBLE_MASK 0x0000FFFFUL /**< Mask for UART_TXDOUBLE */
-#define _UART_TXDOUBLE_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
-#define _UART_TXDOUBLE_TXDATA0_MASK 0xFFUL /**< Bit mask for USART_TXDATA0 */
-#define UART_TXDOUBLE_TXDATA0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_TXDOUBLE */
-#define _UART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLE */
-#define _UART_TXDOUBLE_TXDATA1_SHIFT 8 /**< Shift value for USART_TXDATA1 */
-#define _UART_TXDOUBLE_TXDATA1_MASK 0xFF00UL /**< Bit mask for USART_TXDATA1 */
-#define UART_TXDOUBLE_TXDATA1_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_TXDOUBLE */
-#define _UART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_TXDOUBLE */
-
-/** Bit fields for UART IF */
-#define _UART_IF_RESETVALUE 0x00000002UL /**< Default value for UART_IF */
-#define _UART_IF_MASK 0x00001FFFUL /**< Mask for UART_IF */
-#define UART_IF_TXC (1 << 0) /**< TX Complete Interrupt Flag */
-#define _UART_IF_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _UART_IF_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define UART_IF_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_TXBL (1 << 1) /**< TX Buffer Level Interrupt Flag */
-#define _UART_IF_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
-#define _UART_IF_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
-#define UART_IF_TXBL_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Flag */
-#define _UART_IF_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
-#define _UART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
-#define UART_IF_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_RXFULL (1 << 3) /**< RX Buffer Full Interrupt Flag */
-#define _UART_IF_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _UART_IF_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define UART_IF_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_RXOF (1 << 4) /**< RX Overflow Interrupt Flag */
-#define _UART_IF_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _UART_IF_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define UART_IF_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_RXUF (1 << 5) /**< RX Underflow Interrupt Flag */
-#define _UART_IF_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _UART_IF_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define UART_IF_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_TXOF (1 << 6) /**< TX Overflow Interrupt Flag */
-#define _UART_IF_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _UART_IF_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define UART_IF_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_TXUF (1 << 7) /**< TX Underflow Interrupt Flag */
-#define _UART_IF_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _UART_IF_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define UART_IF_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_PERR (1 << 8) /**< Parity Error Interrupt Flag */
-#define _UART_IF_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _UART_IF_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define UART_IF_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_FERR (1 << 9) /**< Framing Error Interrupt Flag */
-#define _UART_IF_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _UART_IF_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define UART_IF_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_MPAF (1 << 10) /**< Multi-Processor Address Frame Interrupt Flag */
-#define _UART_IF_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _UART_IF_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define UART_IF_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_SSM (1 << 11) /**< Slave-Select In Master Mode Interrupt Flag */
-#define _UART_IF_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _UART_IF_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define UART_IF_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-#define UART_IF_CCF (1 << 12) /**< Collision Check Fail Interrupt Flag */
-#define _UART_IF_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _UART_IF_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define UART_IF_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_IF */
-#define _UART_IF_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IF */
-
-/** Bit fields for UART IFS */
-#define _UART_IFS_RESETVALUE 0x00000000UL /**< Default value for UART_IFS */
-#define _UART_IFS_MASK 0x00001FF9UL /**< Mask for UART_IFS */
-#define UART_IFS_TXC (1 << 0) /**< Set TX Complete Interrupt Flag */
-#define _UART_IFS_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _UART_IFS_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define UART_IFS_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_RXFULL (1 << 3) /**< Set RX Buffer Full Interrupt Flag */
-#define _UART_IFS_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _UART_IFS_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define UART_IFS_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_RXOF (1 << 4) /**< Set RX Overflow Interrupt Flag */
-#define _UART_IFS_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _UART_IFS_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define UART_IFS_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_RXUF (1 << 5) /**< Set RX Underflow Interrupt Flag */
-#define _UART_IFS_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _UART_IFS_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define UART_IFS_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_TXOF (1 << 6) /**< Set TX Overflow Interrupt Flag */
-#define _UART_IFS_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _UART_IFS_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define UART_IFS_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_TXUF (1 << 7) /**< Set TX Underflow Interrupt Flag */
-#define _UART_IFS_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _UART_IFS_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define UART_IFS_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_PERR (1 << 8) /**< Set Parity Error Interrupt Flag */
-#define _UART_IFS_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _UART_IFS_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define UART_IFS_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_FERR (1 << 9) /**< Set Framing Error Interrupt Flag */
-#define _UART_IFS_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _UART_IFS_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define UART_IFS_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_MPAF (1 << 10) /**< Set Multi-Processor Address Frame Interrupt Flag */
-#define _UART_IFS_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _UART_IFS_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define UART_IFS_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_SSM (1 << 11) /**< Set Slave-Select in Master mode Interrupt Flag */
-#define _UART_IFS_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _UART_IFS_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define UART_IFS_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-#define UART_IFS_CCF (1 << 12) /**< Set Collision Check Fail Interrupt Flag */
-#define _UART_IFS_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _UART_IFS_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define UART_IFS_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_IFS */
-#define _UART_IFS_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFS */
-
-/** Bit fields for UART IFC */
-#define _UART_IFC_RESETVALUE 0x00000000UL /**< Default value for UART_IFC */
-#define _UART_IFC_MASK 0x00001FF9UL /**< Mask for UART_IFC */
-#define UART_IFC_TXC (1 << 0) /**< Clear TX Complete Interrupt Flag */
-#define _UART_IFC_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _UART_IFC_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define UART_IFC_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_RXFULL (1 << 3) /**< Clear RX Buffer Full Interrupt Flag */
-#define _UART_IFC_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _UART_IFC_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define UART_IFC_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_RXOF (1 << 4) /**< Clear RX Overflow Interrupt Flag */
-#define _UART_IFC_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _UART_IFC_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define UART_IFC_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_RXUF (1 << 5) /**< Clear RX Underflow Interrupt Flag */
-#define _UART_IFC_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _UART_IFC_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define UART_IFC_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_TXOF (1 << 6) /**< Clear TX Overflow Interrupt Flag */
-#define _UART_IFC_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _UART_IFC_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define UART_IFC_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_TXUF (1 << 7) /**< Clear TX Underflow Interrupt Flag */
-#define _UART_IFC_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _UART_IFC_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define UART_IFC_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_PERR (1 << 8) /**< Clear Parity Error Interrupt Flag */
-#define _UART_IFC_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _UART_IFC_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define UART_IFC_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_FERR (1 << 9) /**< Clear Framing Error Interrupt Flag */
-#define _UART_IFC_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _UART_IFC_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define UART_IFC_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_MPAF (1 << 10) /**< Clear Multi-Processor Address Frame Interrupt Flag */
-#define _UART_IFC_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _UART_IFC_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define UART_IFC_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_SSM (1 << 11) /**< Clear Slave-Select In Master Mode Interrupt Flag */
-#define _UART_IFC_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _UART_IFC_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define UART_IFC_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-#define UART_IFC_CCF (1 << 12) /**< Clear Collision Check Fail Interrupt Flag */
-#define _UART_IFC_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _UART_IFC_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define UART_IFC_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_IFC */
-#define _UART_IFC_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IFC */
-
-/** Bit fields for UART IEN */
-#define _UART_IEN_RESETVALUE 0x00000000UL /**< Default value for UART_IEN */
-#define _UART_IEN_MASK 0x00001FFFUL /**< Mask for UART_IEN */
-#define UART_IEN_TXC (1 << 0) /**< TX Complete Interrupt Enable */
-#define _UART_IEN_TXC_SHIFT 0 /**< Shift value for USART_TXC */
-#define _UART_IEN_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
-#define UART_IEN_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_TXBL (1 << 1) /**< TX Buffer Level Interrupt Enable */
-#define _UART_IEN_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
-#define _UART_IEN_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
-#define UART_IEN_TXBL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Enable */
-#define _UART_IEN_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
-#define _UART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
-#define UART_IEN_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_RXFULL (1 << 3) /**< RX Buffer Full Interrupt Enable */
-#define _UART_IEN_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
-#define _UART_IEN_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
-#define UART_IEN_RXFULL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_RXOF (1 << 4) /**< RX Overflow Interrupt Enable */
-#define _UART_IEN_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
-#define _UART_IEN_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
-#define UART_IEN_RXOF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_RXUF (1 << 5) /**< RX Underflow Interrupt Enable */
-#define _UART_IEN_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
-#define _UART_IEN_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
-#define UART_IEN_RXUF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_TXOF (1 << 6) /**< TX Overflow Interrupt Enable */
-#define _UART_IEN_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
-#define _UART_IEN_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
-#define UART_IEN_TXOF_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_TXUF (1 << 7) /**< TX Underflow Interrupt Enable */
-#define _UART_IEN_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
-#define _UART_IEN_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
-#define UART_IEN_TXUF_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_PERR (1 << 8) /**< Parity Error Interrupt Enable */
-#define _UART_IEN_PERR_SHIFT 8 /**< Shift value for USART_PERR */
-#define _UART_IEN_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
-#define UART_IEN_PERR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_FERR (1 << 9) /**< Framing Error Interrupt Enable */
-#define _UART_IEN_FERR_SHIFT 9 /**< Shift value for USART_FERR */
-#define _UART_IEN_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
-#define UART_IEN_FERR_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_MPAF (1 << 10) /**< Multi-Processor Address Frame Interrupt Enable */
-#define _UART_IEN_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
-#define _UART_IEN_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
-#define UART_IEN_MPAF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_SSM (1 << 11) /**< Slave-Select In Master Mode Interrupt Enable */
-#define _UART_IEN_SSM_SHIFT 11 /**< Shift value for USART_SSM */
-#define _UART_IEN_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
-#define UART_IEN_SSM_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-#define UART_IEN_CCF (1 << 12) /**< Collision Check Fail Interrupt Enable */
-#define _UART_IEN_CCF_SHIFT 12 /**< Shift value for USART_CCF */
-#define _UART_IEN_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
-#define UART_IEN_CCF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for UART_IEN */
-#define _UART_IEN_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IEN */
-
-/** Bit fields for UART IRCTRL */
-#define _UART_IRCTRL_RESETVALUE 0x00000000UL /**< Default value for UART_IRCTRL */
-#define _UART_IRCTRL_MASK 0x000000FFUL /**< Mask for UART_IRCTRL */
-#define UART_IRCTRL_IREN (1 << 0) /**< Enable IrDA Module */
-#define _UART_IRCTRL_IREN_SHIFT 0 /**< Shift value for USART_IREN */
-#define _UART_IRCTRL_IREN_MASK 0x1UL /**< Bit mask for USART_IREN */
-#define UART_IRCTRL_IREN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_SHIFT 1 /**< Shift value for USART_IRPW */
-#define _UART_IRCTRL_IRPW_MASK 0x6UL /**< Bit mask for USART_IRPW */
-#define UART_IRCTRL_IRPW_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_IRCTRL */
-#define UART_IRCTRL_IRPW_ONE (0x00000000UL << 1) /**< Shifted mode ONE for UART_IRCTRL */
-#define UART_IRCTRL_IRPW_TWO (0x00000001UL << 1) /**< Shifted mode TWO for UART_IRCTRL */
-#define UART_IRCTRL_IRPW_THREE (0x00000002UL << 1) /**< Shifted mode THREE for UART_IRCTRL */
-#define UART_IRCTRL_IRPW_FOUR (0x00000003UL << 1) /**< Shifted mode FOUR for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_ONE 0x00000000UL /**< Mode ONE for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_TWO 0x00000001UL /**< Mode TWO for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_THREE 0x00000002UL /**< Mode THREE for UART_IRCTRL */
-#define _UART_IRCTRL_IRPW_FOUR 0x00000003UL /**< Mode FOUR for UART_IRCTRL */
-#define UART_IRCTRL_IRFILT (1 << 3) /**< IrDA RX Filter */
-#define _UART_IRCTRL_IRFILT_SHIFT 3 /**< Shift value for USART_IRFILT */
-#define _UART_IRCTRL_IRFILT_MASK 0x8UL /**< Bit mask for USART_IRFILT */
-#define UART_IRCTRL_IRFILT_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_SHIFT 4 /**< Shift value for USART_IRPRSSEL */
-#define _UART_IRCTRL_IRPRSSEL_MASK 0x70UL /**< Bit mask for USART_IRPRSSEL */
-#define UART_IRCTRL_IRPRSSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH0 (0x00000000UL << 4) /**< Shifted mode PRSCH0 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH1 (0x00000001UL << 4) /**< Shifted mode PRSCH1 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH2 (0x00000002UL << 4) /**< Shifted mode PRSCH2 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH3 (0x00000003UL << 4) /**< Shifted mode PRSCH3 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH4 (0x00000004UL << 4) /**< Shifted mode PRSCH4 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH5 (0x00000005UL << 4) /**< Shifted mode PRSCH5 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH6 (0x00000006UL << 4) /**< Shifted mode PRSCH6 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSSEL_PRSCH7 (0x00000007UL << 4) /**< Shifted mode PRSCH7 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for UART_IRCTRL */
-#define UART_IRCTRL_IRPRSEN (1 << 7) /**< IrDA PRS Channel Enable */
-#define _UART_IRCTRL_IRPRSEN_SHIFT 7 /**< Shift value for USART_IRPRSEN */
-#define _UART_IRCTRL_IRPRSEN_MASK 0x80UL /**< Bit mask for USART_IRPRSEN */
-#define UART_IRCTRL_IRPRSEN_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for UART_IRCTRL */
-#define _UART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_IRCTRL */
-
-/** Bit fields for UART ROUTE */
-#define _UART_ROUTE_RESETVALUE 0x00000000UL /**< Default value for UART_ROUTE */
-#define _UART_ROUTE_MASK 0x0000030FUL /**< Mask for UART_ROUTE */
-#define UART_ROUTE_RXPEN (1 << 0) /**< RX Pin Enable */
-#define _UART_ROUTE_RXPEN_SHIFT 0 /**< Shift value for USART_RXPEN */
-#define _UART_ROUTE_RXPEN_MASK 0x1UL /**< Bit mask for USART_RXPEN */
-#define UART_ROUTE_RXPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_ROUTE */
-#define UART_ROUTE_TXPEN (1 << 1) /**< TX Pin Enable */
-#define _UART_ROUTE_TXPEN_SHIFT 1 /**< Shift value for USART_TXPEN */
-#define _UART_ROUTE_TXPEN_MASK 0x2UL /**< Bit mask for USART_TXPEN */
-#define UART_ROUTE_TXPEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_ROUTE */
-#define UART_ROUTE_CSPEN (1 << 2) /**< CS Pin Enable */
-#define _UART_ROUTE_CSPEN_SHIFT 2 /**< Shift value for USART_CSPEN */
-#define _UART_ROUTE_CSPEN_MASK 0x4UL /**< Bit mask for USART_CSPEN */
-#define UART_ROUTE_CSPEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_CSPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_ROUTE */
-#define UART_ROUTE_CLKPEN (1 << 3) /**< RX Pin Enable */
-#define _UART_ROUTE_CLKPEN_SHIFT 3 /**< Shift value for USART_CLKPEN */
-#define _UART_ROUTE_CLKPEN_MASK 0x8UL /**< Bit mask for USART_CLKPEN */
-#define UART_ROUTE_CLKPEN_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_CLKPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_SHIFT 8 /**< Shift value for USART_LOCATION */
-#define _UART_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for USART_LOCATION */
-#define UART_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for UART_ROUTE */
-#define UART_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for UART_ROUTE */
-#define UART_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for UART_ROUTE */
-#define UART_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for UART_ROUTE */
-#define UART_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for UART_ROUTE */
-#define _UART_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for UART_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_LEUART
- * @{
- */
-
-/** Bit fields for LEUART CTRL */
-#define _LEUART_CTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_CTRL */
-#define _LEUART_CTRL_MASK 0x0000FFFFUL /**< Mask for LEUART_CTRL */
-#define LEUART_CTRL_AUTOTRI (1 << 0) /**< Automatic Transmitter Tristate */
-#define _LEUART_CTRL_AUTOTRI_SHIFT 0 /**< Shift value for LEUART_AUTOTRI */
-#define _LEUART_CTRL_AUTOTRI_MASK 0x1UL /**< Bit mask for LEUART_AUTOTRI */
-#define LEUART_CTRL_AUTOTRI_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_DATABITS (1 << 1) /**< Data-Bit Mode */
-#define _LEUART_CTRL_DATABITS_SHIFT 1 /**< Shift value for LEUART_DATABITS */
-#define _LEUART_CTRL_DATABITS_MASK 0x2UL /**< Bit mask for LEUART_DATABITS */
-#define LEUART_CTRL_DATABITS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_DATABITS_EIGHT (0x00000000UL << 1) /**< Shifted mode EIGHT for LEUART_CTRL */
-#define LEUART_CTRL_DATABITS_NINE (0x00000001UL << 1) /**< Shifted mode NINE for LEUART_CTRL */
-#define _LEUART_CTRL_DATABITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_DATABITS_EIGHT 0x00000000UL /**< Mode EIGHT for LEUART_CTRL */
-#define _LEUART_CTRL_DATABITS_NINE 0x00000001UL /**< Mode NINE for LEUART_CTRL */
-#define _LEUART_CTRL_PARITY_SHIFT 2 /**< Shift value for LEUART_PARITY */
-#define _LEUART_CTRL_PARITY_MASK 0xCUL /**< Bit mask for LEUART_PARITY */
-#define LEUART_CTRL_PARITY_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_PARITY_NONE (0x00000000UL << 2) /**< Shifted mode NONE for LEUART_CTRL */
-#define LEUART_CTRL_PARITY_EVEN (0x00000002UL << 2) /**< Shifted mode EVEN for LEUART_CTRL */
-#define LEUART_CTRL_PARITY_ODD (0x00000003UL << 2) /**< Shifted mode ODD for LEUART_CTRL */
-#define _LEUART_CTRL_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_PARITY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
-#define _LEUART_CTRL_PARITY_EVEN 0x00000002UL /**< Mode EVEN for LEUART_CTRL */
-#define _LEUART_CTRL_PARITY_ODD 0x00000003UL /**< Mode ODD for LEUART_CTRL */
-#define LEUART_CTRL_STOPBITS (1 << 4) /**< Stop-Bit Mode */
-#define _LEUART_CTRL_STOPBITS_SHIFT 4 /**< Shift value for LEUART_STOPBITS */
-#define _LEUART_CTRL_STOPBITS_MASK 0x10UL /**< Bit mask for LEUART_STOPBITS */
-#define LEUART_CTRL_STOPBITS_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_STOPBITS_ONE (0x00000000UL << 4) /**< Shifted mode ONE for LEUART_CTRL */
-#define LEUART_CTRL_STOPBITS_TWO (0x00000001UL << 4) /**< Shifted mode TWO for LEUART_CTRL */
-#define _LEUART_CTRL_STOPBITS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_STOPBITS_ONE 0x00000000UL /**< Mode ONE for LEUART_CTRL */
-#define _LEUART_CTRL_STOPBITS_TWO 0x00000001UL /**< Mode TWO for LEUART_CTRL */
-#define LEUART_CTRL_INV (1 << 5) /**< Invert Input And Output */
-#define _LEUART_CTRL_INV_SHIFT 5 /**< Shift value for LEUART_INV */
-#define _LEUART_CTRL_INV_MASK 0x20UL /**< Bit mask for LEUART_INV */
-#define LEUART_CTRL_INV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_INV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_ERRSDMA (1 << 6) /**< Halt RX DMA On Error */
-#define _LEUART_CTRL_ERRSDMA_SHIFT 6 /**< Shift value for LEUART_ERRSDMA */
-#define _LEUART_CTRL_ERRSDMA_MASK 0x40UL /**< Bit mask for LEUART_ERRSDMA */
-#define LEUART_CTRL_ERRSDMA_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_LOOPBK (1 << 7) /**< Loopback Enable */
-#define _LEUART_CTRL_LOOPBK_SHIFT 7 /**< Shift value for LEUART_LOOPBK */
-#define _LEUART_CTRL_LOOPBK_MASK 0x80UL /**< Bit mask for LEUART_LOOPBK */
-#define LEUART_CTRL_LOOPBK_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_SFUBRX (1 << 8) /**< Start-Frame UnBlock RX */
-#define _LEUART_CTRL_SFUBRX_SHIFT 8 /**< Shift value for LEUART_SFUBRX */
-#define _LEUART_CTRL_SFUBRX_MASK 0x100UL /**< Bit mask for LEUART_SFUBRX */
-#define LEUART_CTRL_SFUBRX_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_SFUBRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_MPM (1 << 9) /**< Multi-Processor Mode */
-#define _LEUART_CTRL_MPM_SHIFT 9 /**< Shift value for LEUART_MPM */
-#define _LEUART_CTRL_MPM_MASK 0x200UL /**< Bit mask for LEUART_MPM */
-#define LEUART_CTRL_MPM_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_MPAB (1 << 10) /**< Multi-Processor Address-Bit */
-#define _LEUART_CTRL_MPAB_SHIFT 10 /**< Shift value for LEUART_MPAB */
-#define _LEUART_CTRL_MPAB_MASK 0x400UL /**< Bit mask for LEUART_MPAB */
-#define LEUART_CTRL_MPAB_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_BIT8DV (1 << 11) /**< Bit 8 Default Value */
-#define _LEUART_CTRL_BIT8DV_SHIFT 11 /**< Shift value for LEUART_BIT8DV */
-#define _LEUART_CTRL_BIT8DV_MASK 0x800UL /**< Bit mask for LEUART_BIT8DV */
-#define LEUART_CTRL_BIT8DV_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_RXDMAWU (1 << 12) /**< RX DMA Wakeup */
-#define _LEUART_CTRL_RXDMAWU_SHIFT 12 /**< Shift value for LEUART_RXDMAWU */
-#define _LEUART_CTRL_RXDMAWU_MASK 0x1000UL /**< Bit mask for LEUART_RXDMAWU */
-#define LEUART_CTRL_RXDMAWU_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_RXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_TXDMAWU (1 << 13) /**< TX DMA Wakeup */
-#define _LEUART_CTRL_TXDMAWU_SHIFT 13 /**< Shift value for LEUART_TXDMAWU */
-#define _LEUART_CTRL_TXDMAWU_MASK 0x2000UL /**< Bit mask for LEUART_TXDMAWU */
-#define LEUART_CTRL_TXDMAWU_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_TXDMAWU_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_SHIFT 14 /**< Shift value for LEUART_TXDELAY */
-#define _LEUART_CTRL_TXDELAY_MASK 0xC000UL /**< Bit mask for LEUART_TXDELAY */
-#define LEUART_CTRL_TXDELAY_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for LEUART_CTRL */
-#define LEUART_CTRL_TXDELAY_NONE (0x00000000UL << 14) /**< Shifted mode NONE for LEUART_CTRL */
-#define LEUART_CTRL_TXDELAY_SINGLE (0x00000001UL << 14) /**< Shifted mode SINGLE for LEUART_CTRL */
-#define LEUART_CTRL_TXDELAY_DOUBLE (0x00000002UL << 14) /**< Shifted mode DOUBLE for LEUART_CTRL */
-#define LEUART_CTRL_TXDELAY_TRIPLE (0x00000003UL << 14) /**< Shifted mode TRIPLE for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for LEUART_CTRL */
-#define _LEUART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for LEUART_CTRL */
-
-/** Bit fields for LEUART CMD */
-#define _LEUART_CMD_RESETVALUE 0x00000000UL /**< Default value for LEUART_CMD */
-#define _LEUART_CMD_MASK 0x000000FFUL /**< Mask for LEUART_CMD */
-#define LEUART_CMD_RXEN (1 << 0) /**< Receiver Enable */
-#define _LEUART_CMD_RXEN_SHIFT 0 /**< Shift value for LEUART_RXEN */
-#define _LEUART_CMD_RXEN_MASK 0x1UL /**< Bit mask for LEUART_RXEN */
-#define LEUART_CMD_RXEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_RXDIS (1 << 1) /**< Receiver Disable */
-#define _LEUART_CMD_RXDIS_SHIFT 1 /**< Shift value for LEUART_RXDIS */
-#define _LEUART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for LEUART_RXDIS */
-#define LEUART_CMD_RXDIS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_TXEN (1 << 2) /**< Transmitter Enable */
-#define _LEUART_CMD_TXEN_SHIFT 2 /**< Shift value for LEUART_TXEN */
-#define _LEUART_CMD_TXEN_MASK 0x4UL /**< Bit mask for LEUART_TXEN */
-#define LEUART_CMD_TXEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_TXDIS (1 << 3) /**< Transmitter Disable */
-#define _LEUART_CMD_TXDIS_SHIFT 3 /**< Shift value for LEUART_TXDIS */
-#define _LEUART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for LEUART_TXDIS */
-#define LEUART_CMD_TXDIS_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_RXBLOCKEN (1 << 4) /**< Receiver Block Enable */
-#define _LEUART_CMD_RXBLOCKEN_SHIFT 4 /**< Shift value for LEUART_RXBLOCKEN */
-#define _LEUART_CMD_RXBLOCKEN_MASK 0x10UL /**< Bit mask for LEUART_RXBLOCKEN */
-#define LEUART_CMD_RXBLOCKEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_RXBLOCKDIS (1 << 5) /**< Receiver Block Disable */
-#define _LEUART_CMD_RXBLOCKDIS_SHIFT 5 /**< Shift value for LEUART_RXBLOCKDIS */
-#define _LEUART_CMD_RXBLOCKDIS_MASK 0x20UL /**< Bit mask for LEUART_RXBLOCKDIS */
-#define LEUART_CMD_RXBLOCKDIS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_CLEARTX (1 << 6) /**< Clear TX */
-#define _LEUART_CMD_CLEARTX_SHIFT 6 /**< Shift value for LEUART_CLEARTX */
-#define _LEUART_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for LEUART_CLEARTX */
-#define LEUART_CMD_CLEARTX_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-#define LEUART_CMD_CLEARRX (1 << 7) /**< Clear RX */
-#define _LEUART_CMD_CLEARRX_SHIFT 7 /**< Shift value for LEUART_CLEARRX */
-#define _LEUART_CMD_CLEARRX_MASK 0x80UL /**< Bit mask for LEUART_CLEARRX */
-#define LEUART_CMD_CLEARRX_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_CMD */
-#define _LEUART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CMD */
-
-/** Bit fields for LEUART STATUS */
-#define _LEUART_STATUS_RESETVALUE 0x00000010UL /**< Default value for LEUART_STATUS */
-#define _LEUART_STATUS_MASK 0x0000003FUL /**< Mask for LEUART_STATUS */
-#define LEUART_STATUS_RXENS (1 << 0) /**< Receiver Enable Status */
-#define _LEUART_STATUS_RXENS_SHIFT 0 /**< Shift value for LEUART_RXENS */
-#define _LEUART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for LEUART_RXENS */
-#define LEUART_STATUS_RXENS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
-#define LEUART_STATUS_TXENS (1 << 1) /**< Transmitter Enable Status */
-#define _LEUART_STATUS_TXENS_SHIFT 1 /**< Shift value for LEUART_TXENS */
-#define _LEUART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for LEUART_TXENS */
-#define LEUART_STATUS_TXENS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
-#define LEUART_STATUS_RXBLOCK (1 << 2) /**< Block Incoming Data */
-#define _LEUART_STATUS_RXBLOCK_SHIFT 2 /**< Shift value for LEUART_RXBLOCK */
-#define _LEUART_STATUS_RXBLOCK_MASK 0x4UL /**< Bit mask for LEUART_RXBLOCK */
-#define LEUART_STATUS_RXBLOCK_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
-#define LEUART_STATUS_TXC (1 << 3) /**< TX Complete */
-#define _LEUART_STATUS_TXC_SHIFT 3 /**< Shift value for LEUART_TXC */
-#define _LEUART_STATUS_TXC_MASK 0x8UL /**< Bit mask for LEUART_TXC */
-#define LEUART_STATUS_TXC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
-#define LEUART_STATUS_TXBL (1 << 4) /**< TX Buffer Level */
-#define _LEUART_STATUS_TXBL_SHIFT 4 /**< Shift value for LEUART_TXBL */
-#define _LEUART_STATUS_TXBL_MASK 0x10UL /**< Bit mask for LEUART_TXBL */
-#define LEUART_STATUS_TXBL_DEFAULT (0x00000001UL << 4) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_STATUS */
-#define LEUART_STATUS_RXDATAV (1 << 5) /**< RX Data Valid */
-#define _LEUART_STATUS_RXDATAV_SHIFT 5 /**< Shift value for LEUART_RXDATAV */
-#define _LEUART_STATUS_RXDATAV_MASK 0x20UL /**< Bit mask for LEUART_RXDATAV */
-#define LEUART_STATUS_RXDATAV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_STATUS */
-#define _LEUART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STATUS */
-
-/** Bit fields for LEUART CLKDIV */
-#define _LEUART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for LEUART_CLKDIV */
-#define _LEUART_CLKDIV_MASK 0x00007FF8UL /**< Mask for LEUART_CLKDIV */
-#define _LEUART_CLKDIV_DIV_SHIFT 3 /**< Shift value for LEUART_DIV */
-#define _LEUART_CLKDIV_DIV_MASK 0x7FF8UL /**< Bit mask for LEUART_DIV */
-#define LEUART_CLKDIV_DIV_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_CLKDIV */
-#define _LEUART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_CLKDIV */
-
-/** Bit fields for LEUART STARTFRAME */
-#define _LEUART_STARTFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_STARTFRAME */
-#define _LEUART_STARTFRAME_MASK 0x000001FFUL /**< Mask for LEUART_STARTFRAME */
-#define _LEUART_STARTFRAME_STARTFRAME_SHIFT 0 /**< Shift value for LEUART_STARTFRAME */
-#define _LEUART_STARTFRAME_STARTFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_STARTFRAME */
-#define LEUART_STARTFRAME_STARTFRAME_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_STARTFRAME */
-#define _LEUART_STARTFRAME_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_STARTFRAME */
-
-/** Bit fields for LEUART SIGFRAME */
-#define _LEUART_SIGFRAME_RESETVALUE 0x00000000UL /**< Default value for LEUART_SIGFRAME */
-#define _LEUART_SIGFRAME_MASK 0x000001FFUL /**< Mask for LEUART_SIGFRAME */
-#define _LEUART_SIGFRAME_SIGFRAME_SHIFT 0 /**< Shift value for LEUART_SIGFRAME */
-#define _LEUART_SIGFRAME_SIGFRAME_MASK 0x1FFUL /**< Bit mask for LEUART_SIGFRAME */
-#define LEUART_SIGFRAME_SIGFRAME_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_SIGFRAME */
-#define _LEUART_SIGFRAME_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SIGFRAME */
-
-/** Bit fields for LEUART RXDATAX */
-#define _LEUART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAX */
-#define _LEUART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAX */
-#define _LEUART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
-#define _LEUART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATA */
-#define LEUART_RXDATAX_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
-#define _LEUART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
-#define LEUART_RXDATAX_PERR (1 << 14) /**< Receive Data Parity Error */
-#define _LEUART_RXDATAX_PERR_SHIFT 14 /**< Shift value for LEUART_PERR */
-#define _LEUART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for LEUART_PERR */
-#define LEUART_RXDATAX_PERR_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
-#define _LEUART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
-#define LEUART_RXDATAX_FERR (1 << 15) /**< Receive Data Framing Error */
-#define _LEUART_RXDATAX_FERR_SHIFT 15 /**< Shift value for LEUART_FERR */
-#define _LEUART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for LEUART_FERR */
-#define LEUART_RXDATAX_FERR_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAX */
-#define _LEUART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAX */
-
-/** Bit fields for LEUART RXDATA */
-#define _LEUART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATA */
-#define _LEUART_RXDATA_MASK 0x000000FFUL /**< Mask for LEUART_RXDATA */
-#define _LEUART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for LEUART_RXDATA */
-#define _LEUART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for LEUART_RXDATA */
-#define LEUART_RXDATA_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_RXDATA */
-#define _LEUART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATA */
-
-/** Bit fields for LEUART RXDATAXP */
-#define _LEUART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for LEUART_RXDATAXP */
-#define _LEUART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for LEUART_RXDATAXP */
-#define _LEUART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for LEUART_RXDATAP */
-#define _LEUART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for LEUART_RXDATAP */
-#define LEUART_RXDATAXP_RXDATAP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
-#define _LEUART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
-#define LEUART_RXDATAXP_PERRP (1 << 14) /**< Receive Data Parity Error Peek */
-#define _LEUART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for LEUART_PERRP */
-#define _LEUART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for LEUART_PERRP */
-#define LEUART_RXDATAXP_PERRP_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
-#define _LEUART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
-#define LEUART_RXDATAXP_FERRP (1 << 15) /**< Receive Data Framing Error Peek */
-#define _LEUART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for LEUART_FERRP */
-#define _LEUART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for LEUART_FERRP */
-#define LEUART_RXDATAXP_FERRP_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for LEUART_RXDATAXP */
-#define _LEUART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_RXDATAXP */
-
-/** Bit fields for LEUART TXDATAX */
-#define _LEUART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_MASK 0x0000E1FFUL /**< Mask for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
-#define _LEUART_TXDATAX_TXDATA_MASK 0x1FFUL /**< Bit mask for LEUART_TXDATA */
-#define LEUART_TXDATAX_TXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
-#define LEUART_TXDATAX_TXBREAK (1 << 13) /**< Transmit Data As Break */
-#define _LEUART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for LEUART_TXBREAK */
-#define _LEUART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for LEUART_TXBREAK */
-#define LEUART_TXDATAX_TXBREAK_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
-#define LEUART_TXDATAX_TXDISAT (1 << 14) /**< Disable TX After Transmission */
-#define _LEUART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for LEUART_TXDISAT */
-#define _LEUART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for LEUART_TXDISAT */
-#define LEUART_TXDATAX_TXDISAT_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
-#define LEUART_TXDATAX_RXENAT (1 << 15) /**< Enable RX After Transmission */
-#define _LEUART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for LEUART_RXENAT */
-#define _LEUART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for LEUART_RXENAT */
-#define LEUART_TXDATAX_RXENAT_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for LEUART_TXDATAX */
-#define _LEUART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATAX */
-
-/** Bit fields for LEUART TXDATA */
-#define _LEUART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for LEUART_TXDATA */
-#define _LEUART_TXDATA_MASK 0x000000FFUL /**< Mask for LEUART_TXDATA */
-#define _LEUART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for LEUART_TXDATA */
-#define _LEUART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for LEUART_TXDATA */
-#define LEUART_TXDATA_TXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_TXDATA */
-#define _LEUART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_TXDATA */
-
-/** Bit fields for LEUART IF */
-#define _LEUART_IF_RESETVALUE 0x00000002UL /**< Default value for LEUART_IF */
-#define _LEUART_IF_MASK 0x000007FFUL /**< Mask for LEUART_IF */
-#define LEUART_IF_TXC (1 << 0) /**< TX Complete Interrupt Flag */
-#define _LEUART_IF_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
-#define _LEUART_IF_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
-#define LEUART_IF_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_TXBL (1 << 1) /**< TX Buffer Level Interrupt Flag */
-#define _LEUART_IF_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
-#define _LEUART_IF_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
-#define LEUART_IF_TXBL_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Flag */
-#define _LEUART_IF_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
-#define _LEUART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
-#define LEUART_IF_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_RXOF (1 << 3) /**< RX Overflow Interrupt Flag */
-#define _LEUART_IF_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
-#define _LEUART_IF_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
-#define LEUART_IF_RXOF_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_RXUF (1 << 4) /**< RX Underflow Interrupt Flag */
-#define _LEUART_IF_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
-#define _LEUART_IF_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
-#define LEUART_IF_RXUF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_TXOF (1 << 5) /**< TX Overflow Interrupt Flag */
-#define _LEUART_IF_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
-#define _LEUART_IF_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
-#define LEUART_IF_TXOF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_PERR (1 << 6) /**< Parity Error Interrupt Flag */
-#define _LEUART_IF_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
-#define _LEUART_IF_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
-#define LEUART_IF_PERR_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_FERR (1 << 7) /**< Framing Error Interrupt Flag */
-#define _LEUART_IF_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
-#define _LEUART_IF_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
-#define LEUART_IF_FERR_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_MPAF (1 << 8) /**< Multi-Processor Address Frame Interrupt Flag */
-#define _LEUART_IF_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
-#define _LEUART_IF_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
-#define LEUART_IF_MPAF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_STARTF (1 << 9) /**< Start Frame Interrupt Flag */
-#define _LEUART_IF_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
-#define _LEUART_IF_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
-#define LEUART_IF_STARTF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-#define LEUART_IF_SIGF (1 << 10) /**< Signal Frame Interrupt Flag */
-#define _LEUART_IF_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
-#define _LEUART_IF_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
-#define LEUART_IF_SIGF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LEUART_IF */
-#define _LEUART_IF_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IF */
-
-/** Bit fields for LEUART IFS */
-#define _LEUART_IFS_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFS */
-#define _LEUART_IFS_MASK 0x000007F9UL /**< Mask for LEUART_IFS */
-#define LEUART_IFS_TXC (1 << 0) /**< Set TX Complete Interrupt Flag */
-#define _LEUART_IFS_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
-#define _LEUART_IFS_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
-#define LEUART_IFS_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_RXOF (1 << 3) /**< Set RX Overflow Interrupt Flag */
-#define _LEUART_IFS_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
-#define _LEUART_IFS_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
-#define LEUART_IFS_RXOF_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_RXUF (1 << 4) /**< Set RX Underflow Interrupt Flag */
-#define _LEUART_IFS_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
-#define _LEUART_IFS_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
-#define LEUART_IFS_RXUF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_TXOF (1 << 5) /**< Set TX Overflow Interrupt Flag */
-#define _LEUART_IFS_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
-#define _LEUART_IFS_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
-#define LEUART_IFS_TXOF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_PERR (1 << 6) /**< Set Parity Error Interrupt Flag */
-#define _LEUART_IFS_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
-#define _LEUART_IFS_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
-#define LEUART_IFS_PERR_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_FERR (1 << 7) /**< Set Framing Error Interrupt Flag */
-#define _LEUART_IFS_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
-#define _LEUART_IFS_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
-#define LEUART_IFS_FERR_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_MPAF (1 << 8) /**< Set Multi-Processor Address Frame Interrupt Flag */
-#define _LEUART_IFS_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
-#define _LEUART_IFS_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
-#define LEUART_IFS_MPAF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_STARTF (1 << 9) /**< Set Start Frame Interrupt Flag */
-#define _LEUART_IFS_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
-#define _LEUART_IFS_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
-#define LEUART_IFS_STARTF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-#define LEUART_IFS_SIGF (1 << 10) /**< Set Signal Frame Interrupt Flag */
-#define _LEUART_IFS_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
-#define _LEUART_IFS_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
-#define LEUART_IFS_SIGF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LEUART_IFS */
-#define _LEUART_IFS_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFS */
-
-/** Bit fields for LEUART IFC */
-#define _LEUART_IFC_RESETVALUE 0x00000000UL /**< Default value for LEUART_IFC */
-#define _LEUART_IFC_MASK 0x000007F9UL /**< Mask for LEUART_IFC */
-#define LEUART_IFC_TXC (1 << 0) /**< Clear TX Complete Interrupt Flag */
-#define _LEUART_IFC_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
-#define _LEUART_IFC_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
-#define LEUART_IFC_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_RXOF (1 << 3) /**< Clear RX Overflow Interrupt Flag */
-#define _LEUART_IFC_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
-#define _LEUART_IFC_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
-#define LEUART_IFC_RXOF_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_RXUF (1 << 4) /**< Clear RX Underflow Interrupt Flag */
-#define _LEUART_IFC_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
-#define _LEUART_IFC_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
-#define LEUART_IFC_RXUF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_TXOF (1 << 5) /**< Clear TX Overflow Interrupt Flag */
-#define _LEUART_IFC_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
-#define _LEUART_IFC_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
-#define LEUART_IFC_TXOF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_PERR (1 << 6) /**< Clear Parity Error Interrupt Flag */
-#define _LEUART_IFC_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
-#define _LEUART_IFC_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
-#define LEUART_IFC_PERR_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_FERR (1 << 7) /**< Clear Framing Error Interrupt Flag */
-#define _LEUART_IFC_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
-#define _LEUART_IFC_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
-#define LEUART_IFC_FERR_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_MPAF (1 << 8) /**< Clear Multi-Processor Address Frame Interrupt Flag */
-#define _LEUART_IFC_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
-#define _LEUART_IFC_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
-#define LEUART_IFC_MPAF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_STARTF (1 << 9) /**< Clear Start-Frame Interrupt Flag */
-#define _LEUART_IFC_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
-#define _LEUART_IFC_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
-#define LEUART_IFC_STARTF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-#define LEUART_IFC_SIGF (1 << 10) /**< Clear Signal-Frame Interrupt Flag */
-#define _LEUART_IFC_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
-#define _LEUART_IFC_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
-#define LEUART_IFC_SIGF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LEUART_IFC */
-#define _LEUART_IFC_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IFC */
-
-/** Bit fields for LEUART IEN */
-#define _LEUART_IEN_RESETVALUE 0x00000000UL /**< Default value for LEUART_IEN */
-#define _LEUART_IEN_MASK 0x000007FFUL /**< Mask for LEUART_IEN */
-#define LEUART_IEN_TXC (1 << 0) /**< TX Complete Interrupt Enable */
-#define _LEUART_IEN_TXC_SHIFT 0 /**< Shift value for LEUART_TXC */
-#define _LEUART_IEN_TXC_MASK 0x1UL /**< Bit mask for LEUART_TXC */
-#define LEUART_IEN_TXC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_TXBL (1 << 1) /**< TX Buffer Level Interrupt Enable */
-#define _LEUART_IEN_TXBL_SHIFT 1 /**< Shift value for LEUART_TXBL */
-#define _LEUART_IEN_TXBL_MASK 0x2UL /**< Bit mask for LEUART_TXBL */
-#define LEUART_IEN_TXBL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_RXDATAV (1 << 2) /**< RX Data Valid Interrupt Enable */
-#define _LEUART_IEN_RXDATAV_SHIFT 2 /**< Shift value for LEUART_RXDATAV */
-#define _LEUART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for LEUART_RXDATAV */
-#define LEUART_IEN_RXDATAV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_RXOF (1 << 3) /**< RX Overflow Interrupt Enable */
-#define _LEUART_IEN_RXOF_SHIFT 3 /**< Shift value for LEUART_RXOF */
-#define _LEUART_IEN_RXOF_MASK 0x8UL /**< Bit mask for LEUART_RXOF */
-#define LEUART_IEN_RXOF_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_RXUF (1 << 4) /**< RX Underflow Interrupt Enable */
-#define _LEUART_IEN_RXUF_SHIFT 4 /**< Shift value for LEUART_RXUF */
-#define _LEUART_IEN_RXUF_MASK 0x10UL /**< Bit mask for LEUART_RXUF */
-#define LEUART_IEN_RXUF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_TXOF (1 << 5) /**< TX Overflow Interrupt Enable */
-#define _LEUART_IEN_TXOF_SHIFT 5 /**< Shift value for LEUART_TXOF */
-#define _LEUART_IEN_TXOF_MASK 0x20UL /**< Bit mask for LEUART_TXOF */
-#define LEUART_IEN_TXOF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_PERR (1 << 6) /**< Parity Error Interrupt Enable */
-#define _LEUART_IEN_PERR_SHIFT 6 /**< Shift value for LEUART_PERR */
-#define _LEUART_IEN_PERR_MASK 0x40UL /**< Bit mask for LEUART_PERR */
-#define LEUART_IEN_PERR_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_FERR (1 << 7) /**< Framing Error Interrupt Enable */
-#define _LEUART_IEN_FERR_SHIFT 7 /**< Shift value for LEUART_FERR */
-#define _LEUART_IEN_FERR_MASK 0x80UL /**< Bit mask for LEUART_FERR */
-#define LEUART_IEN_FERR_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_MPAF (1 << 8) /**< Multi-Processor Address Frame Interrupt Enable */
-#define _LEUART_IEN_MPAF_SHIFT 8 /**< Shift value for LEUART_MPAF */
-#define _LEUART_IEN_MPAF_MASK 0x100UL /**< Bit mask for LEUART_MPAF */
-#define LEUART_IEN_MPAF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_STARTF (1 << 9) /**< Start Frame Interrupt Enable */
-#define _LEUART_IEN_STARTF_SHIFT 9 /**< Shift value for LEUART_STARTF */
-#define _LEUART_IEN_STARTF_MASK 0x200UL /**< Bit mask for LEUART_STARTF */
-#define LEUART_IEN_STARTF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_STARTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-#define LEUART_IEN_SIGF (1 << 10) /**< Signal Frame Interrupt Enable */
-#define _LEUART_IEN_SIGF_SHIFT 10 /**< Shift value for LEUART_SIGF */
-#define _LEUART_IEN_SIGF_MASK 0x400UL /**< Bit mask for LEUART_SIGF */
-#define LEUART_IEN_SIGF_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LEUART_IEN */
-#define _LEUART_IEN_SIGF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_IEN */
-
-/** Bit fields for LEUART PULSECTRL */
-#define _LEUART_PULSECTRL_RESETVALUE 0x00000000UL /**< Default value for LEUART_PULSECTRL */
-#define _LEUART_PULSECTRL_MASK 0x0000003FUL /**< Mask for LEUART_PULSECTRL */
-#define _LEUART_PULSECTRL_PULSEW_SHIFT 0 /**< Shift value for LEUART_PULSEW */
-#define _LEUART_PULSECTRL_PULSEW_MASK 0xFUL /**< Bit mask for LEUART_PULSEW */
-#define LEUART_PULSECTRL_PULSEW_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
-#define _LEUART_PULSECTRL_PULSEW_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
-#define LEUART_PULSECTRL_PULSEEN (1 << 4) /**< Pulse Generator/Extender Enable */
-#define _LEUART_PULSECTRL_PULSEEN_SHIFT 4 /**< Shift value for LEUART_PULSEEN */
-#define _LEUART_PULSECTRL_PULSEEN_MASK 0x10UL /**< Bit mask for LEUART_PULSEEN */
-#define LEUART_PULSECTRL_PULSEEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
-#define _LEUART_PULSECTRL_PULSEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
-#define LEUART_PULSECTRL_PULSEFILT (1 << 5) /**< Pulse Filter */
-#define _LEUART_PULSECTRL_PULSEFILT_SHIFT 5 /**< Shift value for LEUART_PULSEFILT */
-#define _LEUART_PULSECTRL_PULSEFILT_MASK 0x20UL /**< Bit mask for LEUART_PULSEFILT */
-#define LEUART_PULSECTRL_PULSEFILT_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_PULSECTRL */
-#define _LEUART_PULSECTRL_PULSEFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_PULSECTRL */
-
-/** Bit fields for LEUART FREEZE */
-#define _LEUART_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LEUART_FREEZE */
-#define _LEUART_FREEZE_MASK 0x00000001UL /**< Mask for LEUART_FREEZE */
-#define LEUART_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _LEUART_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LEUART_REGFREEZE */
-#define _LEUART_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LEUART_REGFREEZE */
-#define LEUART_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_FREEZE */
-#define LEUART_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for LEUART_FREEZE */
-#define LEUART_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for LEUART_FREEZE */
-#define _LEUART_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_FREEZE */
-#define _LEUART_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LEUART_FREEZE */
-#define _LEUART_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LEUART_FREEZE */
-
-/** Bit fields for LEUART SYNCBUSY */
-#define _LEUART_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_MASK 0x000000FFUL /**< Mask for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_CTRL (1 << 0) /**< LEUARTn_CTRL Register Busy */
-#define _LEUART_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LEUART_CTRL */
-#define _LEUART_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LEUART_CTRL */
-#define LEUART_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_CMD (1 << 1) /**< LEUARTn_CMD Register Busy */
-#define _LEUART_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LEUART_CMD */
-#define _LEUART_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LEUART_CMD */
-#define LEUART_SYNCBUSY_CMD_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_CLKDIV (1 << 2) /**< LEUARTn_CLKDIV Register Busy */
-#define _LEUART_SYNCBUSY_CLKDIV_SHIFT 2 /**< Shift value for LEUART_CLKDIV */
-#define _LEUART_SYNCBUSY_CLKDIV_MASK 0x4UL /**< Bit mask for LEUART_CLKDIV */
-#define LEUART_SYNCBUSY_CLKDIV_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_CLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_STARTFRAME (1 << 3) /**< LEUARTn_STARTFRAME Register Busy */
-#define _LEUART_SYNCBUSY_STARTFRAME_SHIFT 3 /**< Shift value for LEUART_STARTFRAME */
-#define _LEUART_SYNCBUSY_STARTFRAME_MASK 0x8UL /**< Bit mask for LEUART_STARTFRAME */
-#define LEUART_SYNCBUSY_STARTFRAME_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_STARTFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_SIGFRAME (1 << 4) /**< LEUARTn_SIGFRAME Register Busy */
-#define _LEUART_SYNCBUSY_SIGFRAME_SHIFT 4 /**< Shift value for LEUART_SIGFRAME */
-#define _LEUART_SYNCBUSY_SIGFRAME_MASK 0x10UL /**< Bit mask for LEUART_SIGFRAME */
-#define LEUART_SYNCBUSY_SIGFRAME_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_SIGFRAME_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_TXDATAX (1 << 5) /**< LEUARTn_TXDATAX Register Busy */
-#define _LEUART_SYNCBUSY_TXDATAX_SHIFT 5 /**< Shift value for LEUART_TXDATAX */
-#define _LEUART_SYNCBUSY_TXDATAX_MASK 0x20UL /**< Bit mask for LEUART_TXDATAX */
-#define LEUART_SYNCBUSY_TXDATAX_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_TXDATA (1 << 6) /**< LEUARTn_TXDATA Register Busy */
-#define _LEUART_SYNCBUSY_TXDATA_SHIFT 6 /**< Shift value for LEUART_TXDATA */
-#define _LEUART_SYNCBUSY_TXDATA_MASK 0x40UL /**< Bit mask for LEUART_TXDATA */
-#define LEUART_SYNCBUSY_TXDATA_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-#define LEUART_SYNCBUSY_PULSECTRL (1 << 7) /**< LEUARTn_PULSECTRL Register Busy */
-#define _LEUART_SYNCBUSY_PULSECTRL_SHIFT 7 /**< Shift value for LEUART_PULSECTRL */
-#define _LEUART_SYNCBUSY_PULSECTRL_MASK 0x80UL /**< Bit mask for LEUART_PULSECTRL */
-#define LEUART_SYNCBUSY_PULSECTRL_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LEUART_SYNCBUSY */
-#define _LEUART_SYNCBUSY_PULSECTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_SYNCBUSY */
-
-/** Bit fields for LEUART ROUTE */
-#define _LEUART_ROUTE_RESETVALUE 0x00000000UL /**< Default value for LEUART_ROUTE */
-#define _LEUART_ROUTE_MASK 0x00000303UL /**< Mask for LEUART_ROUTE */
-#define LEUART_ROUTE_RXPEN (1 << 0) /**< RX Pin Enable */
-#define _LEUART_ROUTE_RXPEN_SHIFT 0 /**< Shift value for LEUART_RXPEN */
-#define _LEUART_ROUTE_RXPEN_MASK 0x1UL /**< Bit mask for LEUART_RXPEN */
-#define LEUART_ROUTE_RXPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LEUART_ROUTE */
-#define _LEUART_ROUTE_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
-#define LEUART_ROUTE_TXPEN (1 << 1) /**< TX Pin Enable */
-#define _LEUART_ROUTE_TXPEN_SHIFT 1 /**< Shift value for LEUART_TXPEN */
-#define _LEUART_ROUTE_TXPEN_MASK 0x2UL /**< Bit mask for LEUART_TXPEN */
-#define LEUART_ROUTE_TXPEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LEUART_ROUTE */
-#define _LEUART_ROUTE_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_SHIFT 8 /**< Shift value for LEUART_LOCATION */
-#define _LEUART_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for LEUART_LOCATION */
-#define LEUART_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LEUART_ROUTE */
-#define LEUART_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for LEUART_ROUTE */
-#define LEUART_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for LEUART_ROUTE */
-#define LEUART_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for LEUART_ROUTE */
-#define LEUART_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for LEUART_ROUTE */
-#define _LEUART_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for LEUART_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_LETIMER
- * @{
- */
-
-/** Bit fields for LETIMER CTRL */
-#define _LETIMER_CTRL_RESETVALUE 0x00000000UL /**< Default value for LETIMER_CTRL */
-#define _LETIMER_CTRL_MASK 0x00001FFFUL /**< Mask for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_SHIFT 0 /**< Shift value for LETIMER_REPMODE */
-#define _LETIMER_CTRL_REPMODE_MASK 0x3UL /**< Bit mask for LETIMER_REPMODE */
-#define LETIMER_CTRL_REPMODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_REPMODE_FREE (0x00000000UL << 0) /**< Shifted mode FREE for LETIMER_CTRL */
-#define LETIMER_CTRL_REPMODE_ONESHOT (0x00000001UL << 0) /**< Shifted mode ONESHOT for LETIMER_CTRL */
-#define LETIMER_CTRL_REPMODE_BUFFERED (0x00000002UL << 0) /**< Shifted mode BUFFERED for LETIMER_CTRL */
-#define LETIMER_CTRL_REPMODE_DOUBLE (0x00000003UL << 0) /**< Shifted mode DOUBLE for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_FREE 0x00000000UL /**< Mode FREE for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_ONESHOT 0x00000001UL /**< Mode ONESHOT for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_BUFFERED 0x00000002UL /**< Mode BUFFERED for LETIMER_CTRL */
-#define _LETIMER_CTRL_REPMODE_DOUBLE 0x00000003UL /**< Mode DOUBLE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_SHIFT 2 /**< Shift value for LETIMER_UFOA0 */
-#define _LETIMER_CTRL_UFOA0_MASK 0xCUL /**< Bit mask for LETIMER_UFOA0 */
-#define LETIMER_CTRL_UFOA0_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA0_NONE (0x00000000UL << 2) /**< Shifted mode NONE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA0_TOGGLE (0x00000001UL << 2) /**< Shifted mode TOGGLE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA0_PULSE (0x00000002UL << 2) /**< Shifted mode PULSE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA0_PWM (0x00000003UL << 2) /**< Shifted mode PWM for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_NONE 0x00000000UL /**< Mode NONE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_TOGGLE 0x00000001UL /**< Mode TOGGLE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_PULSE 0x00000002UL /**< Mode PULSE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA0_PWM 0x00000003UL /**< Mode PWM for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_SHIFT 4 /**< Shift value for LETIMER_UFOA1 */
-#define _LETIMER_CTRL_UFOA1_MASK 0x30UL /**< Bit mask for LETIMER_UFOA1 */
-#define LETIMER_CTRL_UFOA1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA1_NONE (0x00000000UL << 4) /**< Shifted mode NONE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA1_TOGGLE (0x00000001UL << 4) /**< Shifted mode TOGGLE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA1_PULSE (0x00000002UL << 4) /**< Shifted mode PULSE for LETIMER_CTRL */
-#define LETIMER_CTRL_UFOA1_PWM (0x00000003UL << 4) /**< Shifted mode PWM for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_NONE 0x00000000UL /**< Mode NONE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_TOGGLE 0x00000001UL /**< Mode TOGGLE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_PULSE 0x00000002UL /**< Mode PULSE for LETIMER_CTRL */
-#define _LETIMER_CTRL_UFOA1_PWM 0x00000003UL /**< Mode PWM for LETIMER_CTRL */
-#define LETIMER_CTRL_OPOL0 (1 << 6) /**< Output 0 Polarity */
-#define _LETIMER_CTRL_OPOL0_SHIFT 6 /**< Shift value for LETIMER_OPOL0 */
-#define _LETIMER_CTRL_OPOL0_MASK 0x40UL /**< Bit mask for LETIMER_OPOL0 */
-#define LETIMER_CTRL_OPOL0_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_OPOL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_OPOL1 (1 << 7) /**< Output 1 Polarity */
-#define _LETIMER_CTRL_OPOL1_SHIFT 7 /**< Shift value for LETIMER_OPOL1 */
-#define _LETIMER_CTRL_OPOL1_MASK 0x80UL /**< Bit mask for LETIMER_OPOL1 */
-#define LETIMER_CTRL_OPOL1_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_OPOL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_BUFTOP (1 << 8) /**< Buffered Top */
-#define _LETIMER_CTRL_BUFTOP_SHIFT 8 /**< Shift value for LETIMER_BUFTOP */
-#define _LETIMER_CTRL_BUFTOP_MASK 0x100UL /**< Bit mask for LETIMER_BUFTOP */
-#define LETIMER_CTRL_BUFTOP_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_BUFTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_COMP0TOP (1 << 9) /**< Compare Value 0 Is Top Value */
-#define _LETIMER_CTRL_COMP0TOP_SHIFT 9 /**< Shift value for LETIMER_COMP0TOP */
-#define _LETIMER_CTRL_COMP0TOP_MASK 0x200UL /**< Bit mask for LETIMER_COMP0TOP */
-#define LETIMER_CTRL_COMP0TOP_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_COMP0TOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_RTCC0TEN (1 << 10) /**< RTC Compare 0 Trigger Enable */
-#define _LETIMER_CTRL_RTCC0TEN_SHIFT 10 /**< Shift value for LETIMER_RTCC0TEN */
-#define _LETIMER_CTRL_RTCC0TEN_MASK 0x400UL /**< Bit mask for LETIMER_RTCC0TEN */
-#define LETIMER_CTRL_RTCC0TEN_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_RTCC0TEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_RTCC1TEN (1 << 11) /**< RTC Compare 1 Trigger Enable */
-#define _LETIMER_CTRL_RTCC1TEN_SHIFT 11 /**< Shift value for LETIMER_RTCC1TEN */
-#define _LETIMER_CTRL_RTCC1TEN_MASK 0x800UL /**< Bit mask for LETIMER_RTCC1TEN */
-#define LETIMER_CTRL_RTCC1TEN_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_RTCC1TEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-#define LETIMER_CTRL_DEBUGRUN (1 << 12) /**< Debug Mode Run Enable */
-#define _LETIMER_CTRL_DEBUGRUN_SHIFT 12 /**< Shift value for LETIMER_DEBUGRUN */
-#define _LETIMER_CTRL_DEBUGRUN_MASK 0x1000UL /**< Bit mask for LETIMER_DEBUGRUN */
-#define LETIMER_CTRL_DEBUGRUN_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for LETIMER_CTRL */
-#define _LETIMER_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CTRL */
-
-/** Bit fields for LETIMER CMD */
-#define _LETIMER_CMD_RESETVALUE 0x00000000UL /**< Default value for LETIMER_CMD */
-#define _LETIMER_CMD_MASK 0x0000001FUL /**< Mask for LETIMER_CMD */
-#define LETIMER_CMD_START (1 << 0) /**< Start LETIMER */
-#define _LETIMER_CMD_START_SHIFT 0 /**< Shift value for LETIMER_START */
-#define _LETIMER_CMD_START_MASK 0x1UL /**< Bit mask for LETIMER_START */
-#define LETIMER_CMD_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_CMD */
-#define _LETIMER_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CMD */
-#define LETIMER_CMD_STOP (1 << 1) /**< Stop LETIMER */
-#define _LETIMER_CMD_STOP_SHIFT 1 /**< Shift value for LETIMER_STOP */
-#define _LETIMER_CMD_STOP_MASK 0x2UL /**< Bit mask for LETIMER_STOP */
-#define LETIMER_CMD_STOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_CMD */
-#define _LETIMER_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CMD */
-#define LETIMER_CMD_CLEAR (1 << 2) /**< Clear LETIMER */
-#define _LETIMER_CMD_CLEAR_SHIFT 2 /**< Shift value for LETIMER_CLEAR */
-#define _LETIMER_CMD_CLEAR_MASK 0x4UL /**< Bit mask for LETIMER_CLEAR */
-#define LETIMER_CMD_CLEAR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_CMD */
-#define _LETIMER_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CMD */
-#define LETIMER_CMD_CTO0 (1 << 3) /**< Clear Toggle Output 0 */
-#define _LETIMER_CMD_CTO0_SHIFT 3 /**< Shift value for LETIMER_CTO0 */
-#define _LETIMER_CMD_CTO0_MASK 0x8UL /**< Bit mask for LETIMER_CTO0 */
-#define LETIMER_CMD_CTO0_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_CMD */
-#define _LETIMER_CMD_CTO0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CMD */
-#define LETIMER_CMD_CTO1 (1 << 4) /**< Clear Toggle Output 1 */
-#define _LETIMER_CMD_CTO1_SHIFT 4 /**< Shift value for LETIMER_CTO1 */
-#define _LETIMER_CMD_CTO1_MASK 0x10UL /**< Bit mask for LETIMER_CTO1 */
-#define LETIMER_CMD_CTO1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_CMD */
-#define _LETIMER_CMD_CTO1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CMD */
-
-/** Bit fields for LETIMER STATUS */
-#define _LETIMER_STATUS_RESETVALUE 0x00000000UL /**< Default value for LETIMER_STATUS */
-#define _LETIMER_STATUS_MASK 0x00000001UL /**< Mask for LETIMER_STATUS */
-#define LETIMER_STATUS_RUNNING (1 << 0) /**< LETIMER Running */
-#define _LETIMER_STATUS_RUNNING_SHIFT 0 /**< Shift value for LETIMER_RUNNING */
-#define _LETIMER_STATUS_RUNNING_MASK 0x1UL /**< Bit mask for LETIMER_RUNNING */
-#define LETIMER_STATUS_RUNNING_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_STATUS */
-#define _LETIMER_STATUS_RUNNING_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_STATUS */
-
-/** Bit fields for LETIMER CNT */
-#define _LETIMER_CNT_RESETVALUE 0x00000000UL /**< Default value for LETIMER_CNT */
-#define _LETIMER_CNT_MASK 0x0000FFFFUL /**< Mask for LETIMER_CNT */
-#define _LETIMER_CNT_CNT_SHIFT 0 /**< Shift value for LETIMER_CNT */
-#define _LETIMER_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for LETIMER_CNT */
-#define LETIMER_CNT_CNT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_CNT */
-#define _LETIMER_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_CNT */
-
-/** Bit fields for LETIMER COMP0 */
-#define _LETIMER_COMP0_RESETVALUE 0x00000000UL /**< Default value for LETIMER_COMP0 */
-#define _LETIMER_COMP0_MASK 0x0000FFFFUL /**< Mask for LETIMER_COMP0 */
-#define _LETIMER_COMP0_COMP0_SHIFT 0 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_COMP0_COMP0_MASK 0xFFFFUL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_COMP0_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_COMP0 */
-#define _LETIMER_COMP0_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_COMP0 */
-
-/** Bit fields for LETIMER COMP1 */
-#define _LETIMER_COMP1_RESETVALUE 0x00000000UL /**< Default value for LETIMER_COMP1 */
-#define _LETIMER_COMP1_MASK 0x0000FFFFUL /**< Mask for LETIMER_COMP1 */
-#define _LETIMER_COMP1_COMP1_SHIFT 0 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_COMP1_COMP1_MASK 0xFFFFUL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_COMP1_COMP1_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_COMP1 */
-#define _LETIMER_COMP1_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_COMP1 */
-
-/** Bit fields for LETIMER REP0 */
-#define _LETIMER_REP0_RESETVALUE 0x00000000UL /**< Default value for LETIMER_REP0 */
-#define _LETIMER_REP0_MASK 0x000000FFUL /**< Mask for LETIMER_REP0 */
-#define _LETIMER_REP0_REP0_SHIFT 0 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_REP0_REP0_MASK 0xFFUL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_REP0_REP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_REP0 */
-#define _LETIMER_REP0_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_REP0 */
-
-/** Bit fields for LETIMER REP1 */
-#define _LETIMER_REP1_RESETVALUE 0x00000000UL /**< Default value for LETIMER_REP1 */
-#define _LETIMER_REP1_MASK 0x000000FFUL /**< Mask for LETIMER_REP1 */
-#define _LETIMER_REP1_REP1_SHIFT 0 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_REP1_REP1_MASK 0xFFUL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_REP1_REP1_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_REP1 */
-#define _LETIMER_REP1_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_REP1 */
-
-/** Bit fields for LETIMER IF */
-#define _LETIMER_IF_RESETVALUE 0x00000000UL /**< Default value for LETIMER_IF */
-#define _LETIMER_IF_MASK 0x0000001FUL /**< Mask for LETIMER_IF */
-#define LETIMER_IF_COMP0 (1 << 0) /**< Compare Match 0 Interrupt Flag */
-#define _LETIMER_IF_COMP0_SHIFT 0 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_IF_COMP0_MASK 0x1UL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_IF_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_IF */
-#define _LETIMER_IF_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IF */
-#define LETIMER_IF_COMP1 (1 << 1) /**< Compare Match 1 Interrupt Flag */
-#define _LETIMER_IF_COMP1_SHIFT 1 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_IF_COMP1_MASK 0x2UL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_IF_COMP1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_IF */
-#define _LETIMER_IF_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IF */
-#define LETIMER_IF_UF (1 << 2) /**< Underflow Interrupt Flag */
-#define _LETIMER_IF_UF_SHIFT 2 /**< Shift value for LETIMER_UF */
-#define _LETIMER_IF_UF_MASK 0x4UL /**< Bit mask for LETIMER_UF */
-#define LETIMER_IF_UF_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_IF */
-#define _LETIMER_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IF */
-#define LETIMER_IF_REP0 (1 << 3) /**< Repeat Counter 0 Interrupt Flag */
-#define _LETIMER_IF_REP0_SHIFT 3 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_IF_REP0_MASK 0x8UL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_IF_REP0_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_IF */
-#define _LETIMER_IF_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IF */
-#define LETIMER_IF_REP1 (1 << 4) /**< Repeat Counter 1 Interrupt Flag */
-#define _LETIMER_IF_REP1_SHIFT 4 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_IF_REP1_MASK 0x10UL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_IF_REP1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_IF */
-#define _LETIMER_IF_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IF */
-
-/** Bit fields for LETIMER IFS */
-#define _LETIMER_IFS_RESETVALUE 0x00000000UL /**< Default value for LETIMER_IFS */
-#define _LETIMER_IFS_MASK 0x0000001FUL /**< Mask for LETIMER_IFS */
-#define LETIMER_IFS_COMP0 (1 << 0) /**< Set Compare Match 0 Interrupt Flag */
-#define _LETIMER_IFS_COMP0_SHIFT 0 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_IFS_COMP0_MASK 0x1UL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_IFS_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_IFS */
-#define _LETIMER_IFS_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFS */
-#define LETIMER_IFS_COMP1 (1 << 1) /**< Set Compare Match 1 Interrupt Flag */
-#define _LETIMER_IFS_COMP1_SHIFT 1 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_IFS_COMP1_MASK 0x2UL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_IFS_COMP1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_IFS */
-#define _LETIMER_IFS_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFS */
-#define LETIMER_IFS_UF (1 << 2) /**< Set Underflow Interrupt Flag */
-#define _LETIMER_IFS_UF_SHIFT 2 /**< Shift value for LETIMER_UF */
-#define _LETIMER_IFS_UF_MASK 0x4UL /**< Bit mask for LETIMER_UF */
-#define LETIMER_IFS_UF_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_IFS */
-#define _LETIMER_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFS */
-#define LETIMER_IFS_REP0 (1 << 3) /**< Set Repeat Counter 0 Interrupt Flag */
-#define _LETIMER_IFS_REP0_SHIFT 3 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_IFS_REP0_MASK 0x8UL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_IFS_REP0_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_IFS */
-#define _LETIMER_IFS_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFS */
-#define LETIMER_IFS_REP1 (1 << 4) /**< Set Repeat Counter 1 Interrupt Flag */
-#define _LETIMER_IFS_REP1_SHIFT 4 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_IFS_REP1_MASK 0x10UL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_IFS_REP1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_IFS */
-#define _LETIMER_IFS_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFS */
-
-/** Bit fields for LETIMER IFC */
-#define _LETIMER_IFC_RESETVALUE 0x00000000UL /**< Default value for LETIMER_IFC */
-#define _LETIMER_IFC_MASK 0x0000001FUL /**< Mask for LETIMER_IFC */
-#define LETIMER_IFC_COMP0 (1 << 0) /**< Clear Compare Match 0 Interrupt Flag */
-#define _LETIMER_IFC_COMP0_SHIFT 0 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_IFC_COMP0_MASK 0x1UL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_IFC_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_IFC */
-#define _LETIMER_IFC_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFC */
-#define LETIMER_IFC_COMP1 (1 << 1) /**< Clear Compare Match 1 Interrupt Flag */
-#define _LETIMER_IFC_COMP1_SHIFT 1 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_IFC_COMP1_MASK 0x2UL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_IFC_COMP1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_IFC */
-#define _LETIMER_IFC_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFC */
-#define LETIMER_IFC_UF (1 << 2) /**< Clear Underflow Interrupt Flag */
-#define _LETIMER_IFC_UF_SHIFT 2 /**< Shift value for LETIMER_UF */
-#define _LETIMER_IFC_UF_MASK 0x4UL /**< Bit mask for LETIMER_UF */
-#define LETIMER_IFC_UF_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_IFC */
-#define _LETIMER_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFC */
-#define LETIMER_IFC_REP0 (1 << 3) /**< Clear Repeat Counter 0 Interrupt Flag */
-#define _LETIMER_IFC_REP0_SHIFT 3 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_IFC_REP0_MASK 0x8UL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_IFC_REP0_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_IFC */
-#define _LETIMER_IFC_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFC */
-#define LETIMER_IFC_REP1 (1 << 4) /**< Clear Repeat Counter 1 Interrupt Flag */
-#define _LETIMER_IFC_REP1_SHIFT 4 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_IFC_REP1_MASK 0x10UL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_IFC_REP1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_IFC */
-#define _LETIMER_IFC_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IFC */
-
-/** Bit fields for LETIMER IEN */
-#define _LETIMER_IEN_RESETVALUE 0x00000000UL /**< Default value for LETIMER_IEN */
-#define _LETIMER_IEN_MASK 0x0000001FUL /**< Mask for LETIMER_IEN */
-#define LETIMER_IEN_COMP0 (1 << 0) /**< Compare Match 0 Interrupt Enable */
-#define _LETIMER_IEN_COMP0_SHIFT 0 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_IEN_COMP0_MASK 0x1UL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_IEN_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_IEN */
-#define _LETIMER_IEN_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IEN */
-#define LETIMER_IEN_COMP1 (1 << 1) /**< Compare Match 1 Interrupt Enable */
-#define _LETIMER_IEN_COMP1_SHIFT 1 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_IEN_COMP1_MASK 0x2UL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_IEN_COMP1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_IEN */
-#define _LETIMER_IEN_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IEN */
-#define LETIMER_IEN_UF (1 << 2) /**< Underflow Interrupt Enable */
-#define _LETIMER_IEN_UF_SHIFT 2 /**< Shift value for LETIMER_UF */
-#define _LETIMER_IEN_UF_MASK 0x4UL /**< Bit mask for LETIMER_UF */
-#define LETIMER_IEN_UF_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_IEN */
-#define _LETIMER_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IEN */
-#define LETIMER_IEN_REP0 (1 << 3) /**< Repeat Counter 0 Interrupt Enable */
-#define _LETIMER_IEN_REP0_SHIFT 3 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_IEN_REP0_MASK 0x8UL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_IEN_REP0_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_IEN */
-#define _LETIMER_IEN_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IEN */
-#define LETIMER_IEN_REP1 (1 << 4) /**< Repeat Counter 1 Interrupt Enable */
-#define _LETIMER_IEN_REP1_SHIFT 4 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_IEN_REP1_MASK 0x10UL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_IEN_REP1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_IEN */
-#define _LETIMER_IEN_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_IEN */
-
-/** Bit fields for LETIMER FREEZE */
-#define _LETIMER_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LETIMER_FREEZE */
-#define _LETIMER_FREEZE_MASK 0x00000001UL /**< Mask for LETIMER_FREEZE */
-#define LETIMER_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _LETIMER_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LETIMER_REGFREEZE */
-#define _LETIMER_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LETIMER_REGFREEZE */
-#define LETIMER_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_FREEZE */
-#define LETIMER_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for LETIMER_FREEZE */
-#define LETIMER_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for LETIMER_FREEZE */
-#define _LETIMER_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_FREEZE */
-#define _LETIMER_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LETIMER_FREEZE */
-#define _LETIMER_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LETIMER_FREEZE */
-
-/** Bit fields for LETIMER SYNCBUSY */
-#define _LETIMER_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_MASK 0x0000003FUL /**< Mask for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_CTRL (1 << 0) /**< LETIMERn_CTRL Register Busy */
-#define _LETIMER_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LETIMER_CTRL */
-#define _LETIMER_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LETIMER_CTRL */
-#define LETIMER_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_CMD (1 << 1) /**< LETIMERn_CMD Register Busy */
-#define _LETIMER_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for LETIMER_CMD */
-#define _LETIMER_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for LETIMER_CMD */
-#define LETIMER_SYNCBUSY_CMD_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_COMP0 (1 << 2) /**< LETIMERn_COMP0 Register Busy */
-#define _LETIMER_SYNCBUSY_COMP0_SHIFT 2 /**< Shift value for LETIMER_COMP0 */
-#define _LETIMER_SYNCBUSY_COMP0_MASK 0x4UL /**< Bit mask for LETIMER_COMP0 */
-#define LETIMER_SYNCBUSY_COMP0_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_COMP1 (1 << 3) /**< LETIMERn_COMP1 Register Busy */
-#define _LETIMER_SYNCBUSY_COMP1_SHIFT 3 /**< Shift value for LETIMER_COMP1 */
-#define _LETIMER_SYNCBUSY_COMP1_MASK 0x8UL /**< Bit mask for LETIMER_COMP1 */
-#define LETIMER_SYNCBUSY_COMP1_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_REP0 (1 << 4) /**< LETIMERn_REP0 Register Busy */
-#define _LETIMER_SYNCBUSY_REP0_SHIFT 4 /**< Shift value for LETIMER_REP0 */
-#define _LETIMER_SYNCBUSY_REP0_MASK 0x10UL /**< Bit mask for LETIMER_REP0 */
-#define LETIMER_SYNCBUSY_REP0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_REP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-#define LETIMER_SYNCBUSY_REP1 (1 << 5) /**< LETIMERn_REP1 Register Busy */
-#define _LETIMER_SYNCBUSY_REP1_SHIFT 5 /**< Shift value for LETIMER_REP1 */
-#define _LETIMER_SYNCBUSY_REP1_MASK 0x20UL /**< Bit mask for LETIMER_REP1 */
-#define LETIMER_SYNCBUSY_REP1_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LETIMER_SYNCBUSY */
-#define _LETIMER_SYNCBUSY_REP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_SYNCBUSY */
-
-/** Bit fields for LETIMER ROUTE */
-#define _LETIMER_ROUTE_RESETVALUE 0x00000000UL /**< Default value for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_MASK 0x00000303UL /**< Mask for LETIMER_ROUTE */
-#define LETIMER_ROUTE_OUT0PEN (1 << 0) /**< Output 0 Pin Enable */
-#define _LETIMER_ROUTE_OUT0PEN_SHIFT 0 /**< Shift value for LETIMER_OUT0PEN */
-#define _LETIMER_ROUTE_OUT0PEN_MASK 0x1UL /**< Bit mask for LETIMER_OUT0PEN */
-#define LETIMER_ROUTE_OUT0PEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_OUT0PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_ROUTE */
-#define LETIMER_ROUTE_OUT1PEN (1 << 1) /**< Output 1 Pin Enable */
-#define _LETIMER_ROUTE_OUT1PEN_SHIFT 1 /**< Shift value for LETIMER_OUT1PEN */
-#define _LETIMER_ROUTE_OUT1PEN_MASK 0x2UL /**< Bit mask for LETIMER_OUT1PEN */
-#define LETIMER_ROUTE_OUT1PEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_OUT1PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_SHIFT 8 /**< Shift value for LETIMER_LOCATION */
-#define _LETIMER_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for LETIMER_LOCATION */
-#define LETIMER_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LETIMER_ROUTE */
-#define LETIMER_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for LETIMER_ROUTE */
-#define LETIMER_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for LETIMER_ROUTE */
-#define LETIMER_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for LETIMER_ROUTE */
-#define LETIMER_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for LETIMER_ROUTE */
-#define _LETIMER_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for LETIMER_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_PCNT
- * @{
- */
-
-/** Bit fields for PCNT CTRL */
-#define _PCNT_CTRL_RESETVALUE 0x00000000UL /**< Default value for PCNT_CTRL */
-#define _PCNT_CTRL_MASK 0x0000003FUL /**< Mask for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_SHIFT 0 /**< Shift value for PCNT_MODE */
-#define _PCNT_CTRL_MODE_MASK 0x3UL /**< Bit mask for PCNT_MODE */
-#define PCNT_CTRL_MODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_CTRL */
-#define PCNT_CTRL_MODE_DISABLE (0x00000000UL << 0) /**< Shifted mode DISABLE for PCNT_CTRL */
-#define PCNT_CTRL_MODE_OVRSINGLE (0x00000001UL << 0) /**< Shifted mode OVRSINGLE for PCNT_CTRL */
-#define PCNT_CTRL_MODE_EXTCLKSINGLE (0x00000002UL << 0) /**< Shifted mode EXTCLKSINGLE for PCNT_CTRL */
-#define PCNT_CTRL_MODE_EXTCLKQUAD (0x00000003UL << 0) /**< Shifted mode EXTCLKQUAD for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_DISABLE 0x00000000UL /**< Mode DISABLE for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_OVRSINGLE 0x00000001UL /**< Mode OVRSINGLE for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_EXTCLKSINGLE 0x00000002UL /**< Mode EXTCLKSINGLE for PCNT_CTRL */
-#define _PCNT_CTRL_MODE_EXTCLKQUAD 0x00000003UL /**< Mode EXTCLKQUAD for PCNT_CTRL */
-#define PCNT_CTRL_CNTDIR (1 << 2) /**< Non-Quadrature Mode Counter Direction Control */
-#define _PCNT_CTRL_CNTDIR_SHIFT 2 /**< Shift value for PCNT_CNTDIR */
-#define _PCNT_CTRL_CNTDIR_MASK 0x4UL /**< Bit mask for PCNT_CNTDIR */
-#define PCNT_CTRL_CNTDIR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_CTRL */
-#define PCNT_CTRL_CNTDIR_UP (0x00000000UL << 2) /**< Shifted mode UP for PCNT_CTRL */
-#define PCNT_CTRL_CNTDIR_DOWN (0x00000001UL << 2) /**< Shifted mode DOWN for PCNT_CTRL */
-#define _PCNT_CTRL_CNTDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
-#define _PCNT_CTRL_CNTDIR_UP 0x00000000UL /**< Mode UP for PCNT_CTRL */
-#define _PCNT_CTRL_CNTDIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_CTRL */
-#define PCNT_CTRL_EDGE (1 << 3) /**< Edge Select */
-#define _PCNT_CTRL_EDGE_SHIFT 3 /**< Shift value for PCNT_EDGE */
-#define _PCNT_CTRL_EDGE_MASK 0x8UL /**< Bit mask for PCNT_EDGE */
-#define PCNT_CTRL_EDGE_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for PCNT_CTRL */
-#define PCNT_CTRL_EDGE_POS (0x00000000UL << 3) /**< Shifted mode POS for PCNT_CTRL */
-#define PCNT_CTRL_EDGE_NEG (0x00000001UL << 3) /**< Shifted mode NEG for PCNT_CTRL */
-#define _PCNT_CTRL_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
-#define _PCNT_CTRL_EDGE_POS 0x00000000UL /**< Mode POS for PCNT_CTRL */
-#define _PCNT_CTRL_EDGE_NEG 0x00000001UL /**< Mode NEG for PCNT_CTRL */
-#define PCNT_CTRL_FILT (1 << 4) /**< Enable Digital Pulse Width Filter */
-#define _PCNT_CTRL_FILT_SHIFT 4 /**< Shift value for PCNT_FILT */
-#define _PCNT_CTRL_FILT_MASK 0x10UL /**< Bit mask for PCNT_FILT */
-#define PCNT_CTRL_FILT_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for PCNT_CTRL */
-#define _PCNT_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
-#define PCNT_CTRL_RSTEN (1 << 5) /**< Enable PCNT Clock Domain Reset */
-#define _PCNT_CTRL_RSTEN_SHIFT 5 /**< Shift value for PCNT_RSTEN */
-#define _PCNT_CTRL_RSTEN_MASK 0x20UL /**< Bit mask for PCNT_RSTEN */
-#define PCNT_CTRL_RSTEN_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for PCNT_CTRL */
-#define _PCNT_CTRL_RSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */
-
-/** Bit fields for PCNT CMD */
-#define _PCNT_CMD_RESETVALUE 0x00000000UL /**< Default value for PCNT_CMD */
-#define _PCNT_CMD_MASK 0x00000003UL /**< Mask for PCNT_CMD */
-#define PCNT_CMD_LCNTIM (1 << 0) /**< Load CNT Immediately */
-#define _PCNT_CMD_LCNTIM_SHIFT 0 /**< Shift value for PCNT_LCNTIM */
-#define _PCNT_CMD_LCNTIM_MASK 0x1UL /**< Bit mask for PCNT_LCNTIM */
-#define PCNT_CMD_LCNTIM_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_CMD */
-#define _PCNT_CMD_LCNTIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */
-#define PCNT_CMD_LTOPBIM (1 << 1) /**< Load TOPB Immediately */
-#define _PCNT_CMD_LTOPBIM_SHIFT 1 /**< Shift value for PCNT_LTOPBIM */
-#define _PCNT_CMD_LTOPBIM_MASK 0x2UL /**< Bit mask for PCNT_LTOPBIM */
-#define PCNT_CMD_LTOPBIM_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_CMD */
-#define _PCNT_CMD_LTOPBIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */
-
-/** Bit fields for PCNT STATUS */
-#define _PCNT_STATUS_RESETVALUE 0x00000000UL /**< Default value for PCNT_STATUS */
-#define _PCNT_STATUS_MASK 0x00000001UL /**< Mask for PCNT_STATUS */
-#define PCNT_STATUS_DIR (1 << 0) /**< Current Counter Direction */
-#define _PCNT_STATUS_DIR_SHIFT 0 /**< Shift value for PCNT_DIR */
-#define _PCNT_STATUS_DIR_MASK 0x1UL /**< Bit mask for PCNT_DIR */
-#define PCNT_STATUS_DIR_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_STATUS */
-#define PCNT_STATUS_DIR_UP (0x00000000UL << 0) /**< Shifted mode UP for PCNT_STATUS */
-#define PCNT_STATUS_DIR_DOWN (0x00000001UL << 0) /**< Shifted mode DOWN for PCNT_STATUS */
-#define _PCNT_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_STATUS */
-#define _PCNT_STATUS_DIR_UP 0x00000000UL /**< Mode UP for PCNT_STATUS */
-#define _PCNT_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_STATUS */
-
-/** Bit fields for PCNT CNT */
-#define _PCNT_CNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_CNT */
-#define _PCNT_CNT_MASK 0x0000FFFFUL /**< Mask for PCNT_CNT */
-#define _PCNT_CNT_CNT_SHIFT 0 /**< Shift value for PCNT_CNT */
-#define _PCNT_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for PCNT_CNT */
-#define PCNT_CNT_CNT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_CNT */
-#define _PCNT_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CNT */
-
-/** Bit fields for PCNT TOP */
-#define _PCNT_TOP_RESETVALUE 0x0000FFFFUL /**< Default value for PCNT_TOP */
-#define _PCNT_TOP_MASK 0x0000FFFFUL /**< Mask for PCNT_TOP */
-#define _PCNT_TOP_TOP_SHIFT 0 /**< Shift value for PCNT_TOP */
-#define _PCNT_TOP_TOP_MASK 0xFFFFUL /**< Bit mask for PCNT_TOP */
-#define PCNT_TOP_TOP_DEFAULT (0x0000FFFFUL << 0) /**< Shifted mode DEFAULT for PCNT_TOP */
-#define _PCNT_TOP_TOP_DEFAULT 0x0000FFFFUL /**< Mode DEFAULT for PCNT_TOP */
-
-/** Bit fields for PCNT TOPB */
-#define _PCNT_TOPB_RESETVALUE 0x0000FFFFUL /**< Default value for PCNT_TOPB */
-#define _PCNT_TOPB_MASK 0x0000FFFFUL /**< Mask for PCNT_TOPB */
-#define _PCNT_TOPB_TOPB_SHIFT 0 /**< Shift value for PCNT_TOPB */
-#define _PCNT_TOPB_TOPB_MASK 0xFFFFUL /**< Bit mask for PCNT_TOPB */
-#define PCNT_TOPB_TOPB_DEFAULT (0x0000FFFFUL << 0) /**< Shifted mode DEFAULT for PCNT_TOPB */
-#define _PCNT_TOPB_TOPB_DEFAULT 0x0000FFFFUL /**< Mode DEFAULT for PCNT_TOPB */
-
-/** Bit fields for PCNT IF */
-#define _PCNT_IF_RESETVALUE 0x00000000UL /**< Default value for PCNT_IF */
-#define _PCNT_IF_MASK 0x00000007UL /**< Mask for PCNT_IF */
-#define PCNT_IF_UF (1 << 0) /**< Underflow Interrupt Read Flag */
-#define _PCNT_IF_UF_SHIFT 0 /**< Shift value for PCNT_UF */
-#define _PCNT_IF_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
-#define PCNT_IF_UF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_IF */
-#define _PCNT_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
-#define PCNT_IF_OF (1 << 1) /**< Overflow Interrupt Read Flag */
-#define _PCNT_IF_OF_SHIFT 1 /**< Shift value for PCNT_OF */
-#define _PCNT_IF_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
-#define PCNT_IF_OF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_IF */
-#define _PCNT_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
-#define PCNT_IF_DIRCNG (1 << 2) /**< Direction Change Detect Interrupt Flag */
-#define _PCNT_IF_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
-#define _PCNT_IF_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
-#define PCNT_IF_DIRCNG_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_IF */
-#define _PCNT_IF_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */
-
-/** Bit fields for PCNT IFS */
-#define _PCNT_IFS_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFS */
-#define _PCNT_IFS_MASK 0x00000007UL /**< Mask for PCNT_IFS */
-#define PCNT_IFS_UF (1 << 0) /**< Underflow interrupt set */
-#define _PCNT_IFS_UF_SHIFT 0 /**< Shift value for PCNT_UF */
-#define _PCNT_IFS_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
-#define PCNT_IFS_UF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_IFS */
-#define _PCNT_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
-#define PCNT_IFS_OF (1 << 1) /**< Overflow Interrupt Set */
-#define _PCNT_IFS_OF_SHIFT 1 /**< Shift value for PCNT_OF */
-#define _PCNT_IFS_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
-#define PCNT_IFS_OF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_IFS */
-#define _PCNT_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
-#define PCNT_IFS_DIRCNG (1 << 2) /**< Direction Change Detect Interrupt Set */
-#define _PCNT_IFS_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
-#define _PCNT_IFS_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
-#define PCNT_IFS_DIRCNG_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_IFS */
-#define _PCNT_IFS_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */
-
-/** Bit fields for PCNT IFC */
-#define _PCNT_IFC_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFC */
-#define _PCNT_IFC_MASK 0x00000007UL /**< Mask for PCNT_IFC */
-#define PCNT_IFC_UF (1 << 0) /**< Underflow Interrupt Clear */
-#define _PCNT_IFC_UF_SHIFT 0 /**< Shift value for PCNT_UF */
-#define _PCNT_IFC_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
-#define PCNT_IFC_UF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_IFC */
-#define _PCNT_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
-#define PCNT_IFC_OF (1 << 1) /**< Overflow Interrupt Clear */
-#define _PCNT_IFC_OF_SHIFT 1 /**< Shift value for PCNT_OF */
-#define _PCNT_IFC_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
-#define PCNT_IFC_OF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_IFC */
-#define _PCNT_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
-#define PCNT_IFC_DIRCNG (1 << 2) /**< Direction Change Detect Interrupt Clear */
-#define _PCNT_IFC_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
-#define _PCNT_IFC_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
-#define PCNT_IFC_DIRCNG_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_IFC */
-#define _PCNT_IFC_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */
-
-/** Bit fields for PCNT IEN */
-#define _PCNT_IEN_RESETVALUE 0x00000000UL /**< Default value for PCNT_IEN */
-#define _PCNT_IEN_MASK 0x00000007UL /**< Mask for PCNT_IEN */
-#define PCNT_IEN_UF (1 << 0) /**< Underflow Interrupt Enable */
-#define _PCNT_IEN_UF_SHIFT 0 /**< Shift value for PCNT_UF */
-#define _PCNT_IEN_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */
-#define PCNT_IEN_UF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_IEN */
-#define _PCNT_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
-#define PCNT_IEN_OF (1 << 1) /**< Overflow Interrupt Enable */
-#define _PCNT_IEN_OF_SHIFT 1 /**< Shift value for PCNT_OF */
-#define _PCNT_IEN_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */
-#define PCNT_IEN_OF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_IEN */
-#define _PCNT_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
-#define PCNT_IEN_DIRCNG (1 << 2) /**< Direction Change Detect Interrupt Enable */
-#define _PCNT_IEN_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */
-#define _PCNT_IEN_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */
-#define PCNT_IEN_DIRCNG_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_IEN */
-#define _PCNT_IEN_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */
-
-/** Bit fields for PCNT ROUTE */
-#define _PCNT_ROUTE_RESETVALUE 0x00000000UL /**< Default value for PCNT_ROUTE */
-#define _PCNT_ROUTE_MASK 0x00000300UL /**< Mask for PCNT_ROUTE */
-#define _PCNT_ROUTE_LOCATION_SHIFT 8 /**< Shift value for PCNT_LOCATION */
-#define _PCNT_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for PCNT_LOCATION */
-#define PCNT_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for PCNT_ROUTE */
-#define PCNT_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for PCNT_ROUTE */
-#define PCNT_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for PCNT_ROUTE */
-#define PCNT_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for PCNT_ROUTE */
-#define _PCNT_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_ROUTE */
-#define _PCNT_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for PCNT_ROUTE */
-#define _PCNT_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for PCNT_ROUTE */
-#define _PCNT_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for PCNT_ROUTE */
-
-/** Bit fields for PCNT FREEZE */
-#define _PCNT_FREEZE_RESETVALUE 0x00000000UL /**< Default value for PCNT_FREEZE */
-#define _PCNT_FREEZE_MASK 0x00000001UL /**< Mask for PCNT_FREEZE */
-#define PCNT_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _PCNT_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for PCNT_REGFREEZE */
-#define _PCNT_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for PCNT_REGFREEZE */
-#define PCNT_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_FREEZE */
-#define PCNT_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for PCNT_FREEZE */
-#define PCNT_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for PCNT_FREEZE */
-#define _PCNT_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_FREEZE */
-#define _PCNT_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for PCNT_FREEZE */
-#define _PCNT_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for PCNT_FREEZE */
-
-/** Bit fields for PCNT SYNCBUSY */
-#define _PCNT_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for PCNT_SYNCBUSY */
-#define _PCNT_SYNCBUSY_MASK 0x00000007UL /**< Mask for PCNT_SYNCBUSY */
-#define PCNT_SYNCBUSY_CTRL (1 << 0) /**< PCNTn_CTRL Register Busy */
-#define _PCNT_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for PCNT_CTRL */
-#define _PCNT_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for PCNT_CTRL */
-#define PCNT_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
-#define _PCNT_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
-#define PCNT_SYNCBUSY_CMD (1 << 1) /**< PCNTn_CMD Register Busy */
-#define _PCNT_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for PCNT_CMD */
-#define _PCNT_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for PCNT_CMD */
-#define PCNT_SYNCBUSY_CMD_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
-#define _PCNT_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
-#define PCNT_SYNCBUSY_TOPB (1 << 2) /**< PCNTn_TOPB Register Busy */
-#define _PCNT_SYNCBUSY_TOPB_SHIFT 2 /**< Shift value for PCNT_TOPB */
-#define _PCNT_SYNCBUSY_TOPB_MASK 0x4UL /**< Bit mask for PCNT_TOPB */
-#define PCNT_SYNCBUSY_TOPB_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */
-#define _PCNT_SYNCBUSY_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_I2C
- * @{
- */
-
-/** Bit fields for I2C CTRL */
-#define _I2C_CTRL_RESETVALUE 0x00000000UL /**< Default value for I2C_CTRL */
-#define _I2C_CTRL_MASK 0x0007B37FUL /**< Mask for I2C_CTRL */
-#define I2C_CTRL_EN (1 << 0) /**< I2C Enable */
-#define _I2C_CTRL_EN_SHIFT 0 /**< Shift value for I2C_EN */
-#define _I2C_CTRL_EN_MASK 0x1UL /**< Bit mask for I2C_EN */
-#define I2C_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_SLAVE (1 << 1) /**< Addressable as Slave */
-#define _I2C_CTRL_SLAVE_SHIFT 1 /**< Shift value for I2C_SLAVE */
-#define _I2C_CTRL_SLAVE_MASK 0x2UL /**< Bit mask for I2C_SLAVE */
-#define I2C_CTRL_SLAVE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_SLAVE_DISABLE (0x00000000UL << 1) /**< Shifted mode DISABLE for I2C_CTRL */
-#define I2C_CTRL_SLAVE_ENABLE (0x00000001UL << 1) /**< Shifted mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_SLAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_SLAVE_DISABLE 0x00000000UL /**< Mode DISABLE for I2C_CTRL */
-#define _I2C_CTRL_SLAVE_ENABLE 0x00000001UL /**< Mode ENABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOACK (1 << 2) /**< Automatic Acknowledge */
-#define _I2C_CTRL_AUTOACK_SHIFT 2 /**< Shift value for I2C_AUTOACK */
-#define _I2C_CTRL_AUTOACK_MASK 0x4UL /**< Bit mask for I2C_AUTOACK */
-#define I2C_CTRL_AUTOACK_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_AUTOACK_DISABLE (0x00000000UL << 2) /**< Shifted mode DISABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOACK_ENABLE (0x00000001UL << 2) /**< Shifted mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_AUTOACK_DISABLE 0x00000000UL /**< Mode DISABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOACK_ENABLE 0x00000001UL /**< Mode ENABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOSE (1 << 3) /**< Automatic STOP when Empty */
-#define _I2C_CTRL_AUTOSE_SHIFT 3 /**< Shift value for I2C_AUTOSE */
-#define _I2C_CTRL_AUTOSE_MASK 0x8UL /**< Bit mask for I2C_AUTOSE */
-#define I2C_CTRL_AUTOSE_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_AUTOSE_DISABLE (0x00000000UL << 3) /**< Shifted mode DISABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOSE_ENABLE (0x00000001UL << 3) /**< Shifted mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOSE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_AUTOSE_DISABLE 0x00000000UL /**< Mode DISABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOSE_ENABLE 0x00000001UL /**< Mode ENABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOSN (1 << 4) /**< Automatic STOP on NACK */
-#define _I2C_CTRL_AUTOSN_SHIFT 4 /**< Shift value for I2C_AUTOSN */
-#define _I2C_CTRL_AUTOSN_MASK 0x10UL /**< Bit mask for I2C_AUTOSN */
-#define I2C_CTRL_AUTOSN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_AUTOSN_DISABLE (0x00000000UL << 4) /**< Shifted mode DISABLE for I2C_CTRL */
-#define I2C_CTRL_AUTOSN_ENABLE (0x00000001UL << 4) /**< Shifted mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOSN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_AUTOSN_DISABLE 0x00000000UL /**< Mode DISABLE for I2C_CTRL */
-#define _I2C_CTRL_AUTOSN_ENABLE 0x00000001UL /**< Mode ENABLE for I2C_CTRL */
-#define I2C_CTRL_ARBDIS (1 << 5) /**< Arbitration Disable */
-#define _I2C_CTRL_ARBDIS_SHIFT 5 /**< Shift value for I2C_ARBDIS */
-#define _I2C_CTRL_ARBDIS_MASK 0x20UL /**< Bit mask for I2C_ARBDIS */
-#define I2C_CTRL_ARBDIS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_ARBDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_GCAMEN (1 << 6) /**< General Call Address Match Enable */
-#define _I2C_CTRL_GCAMEN_SHIFT 6 /**< Shift value for I2C_GCAMEN */
-#define _I2C_CTRL_GCAMEN_MASK 0x40UL /**< Bit mask for I2C_GCAMEN */
-#define I2C_CTRL_GCAMEN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_GCAMEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_CLHR_SHIFT 8 /**< Shift value for I2C_CLHR */
-#define _I2C_CTRL_CLHR_MASK 0x300UL /**< Bit mask for I2C_CLHR */
-#define I2C_CTRL_CLHR_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_CLHR_STANDARD (0x00000000UL << 8) /**< Shifted mode STANDARD for I2C_CTRL */
-#define I2C_CTRL_CLHR_ASYMMETRIC (0x00000001UL << 8) /**< Shifted mode ASYMMETRIC for I2C_CTRL */
-#define I2C_CTRL_CLHR_FAST (0x00000002UL << 8) /**< Shifted mode FAST for I2C_CTRL */
-#define _I2C_CTRL_CLHR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_CLHR_STANDARD 0x00000000UL /**< Mode STANDARD for I2C_CTRL */
-#define _I2C_CTRL_CLHR_ASYMMETRIC 0x00000001UL /**< Mode ASYMMETRIC for I2C_CTRL */
-#define _I2C_CTRL_CLHR_FAST 0x00000002UL /**< Mode FAST for I2C_CTRL */
-#define _I2C_CTRL_BITO_SHIFT 12 /**< Shift value for I2C_BITO */
-#define _I2C_CTRL_BITO_MASK 0x3000UL /**< Bit mask for I2C_BITO */
-#define I2C_CTRL_BITO_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_BITO_OFF (0x00000000UL << 12) /**< Shifted mode OFF for I2C_CTRL */
-#define I2C_CTRL_BITO_40PCC (0x00000001UL << 12) /**< Shifted mode 40PCC for I2C_CTRL */
-#define I2C_CTRL_BITO_80PCC (0x00000002UL << 12) /**< Shifted mode 80PCC for I2C_CTRL */
-#define I2C_CTRL_BITO_160PCC (0x00000003UL << 12) /**< Shifted mode 160PCC for I2C_CTRL */
-#define _I2C_CTRL_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_BITO_OFF 0x00000000UL /**< Mode OFF for I2C_CTRL */
-#define _I2C_CTRL_BITO_40PCC 0x00000001UL /**< Mode 40PCC for I2C_CTRL */
-#define _I2C_CTRL_BITO_80PCC 0x00000002UL /**< Mode 80PCC for I2C_CTRL */
-#define _I2C_CTRL_BITO_160PCC 0x00000003UL /**< Mode 160PCC for I2C_CTRL */
-#define I2C_CTRL_GIBITO (1 << 15) /**< Go Idle on Bus Idle Timeout */
-#define _I2C_CTRL_GIBITO_SHIFT 15 /**< Shift value for I2C_GIBITO */
-#define _I2C_CTRL_GIBITO_MASK 0x8000UL /**< Bit mask for I2C_GIBITO */
-#define I2C_CTRL_GIBITO_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_GIBITO_DISABLE (0x00000000UL << 15) /**< Shifted mode DISABLE for I2C_CTRL */
-#define I2C_CTRL_GIBITO_ENABLE (0x00000001UL << 15) /**< Shifted mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_GIBITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_GIBITO_DISABLE 0x00000000UL /**< Mode DISABLE for I2C_CTRL */
-#define _I2C_CTRL_GIBITO_ENABLE 0x00000001UL /**< Mode ENABLE for I2C_CTRL */
-#define _I2C_CTRL_CLTO_SHIFT 16 /**< Shift value for I2C_CLTO */
-#define _I2C_CTRL_CLTO_MASK 0x70000UL /**< Bit mask for I2C_CLTO */
-#define I2C_CTRL_CLTO_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for I2C_CTRL */
-#define I2C_CTRL_CLTO_OFF (0x00000000UL << 16) /**< Shifted mode OFF for I2C_CTRL */
-#define I2C_CTRL_CLTO_40PCC (0x00000001UL << 16) /**< Shifted mode 40PCC for I2C_CTRL */
-#define I2C_CTRL_CLTO_80PCC (0x00000002UL << 16) /**< Shifted mode 80PCC for I2C_CTRL */
-#define I2C_CTRL_CLTO_160PCC (0x00000003UL << 16) /**< Shifted mode 160PCC for I2C_CTRL */
-#define I2C_CTRL_CLTO_320PPC (0x00000004UL << 16) /**< Shifted mode 320PPC for I2C_CTRL */
-#define I2C_CTRL_CLTO_1024PPC (0x00000005UL << 16) /**< Shifted mode 1024PPC for I2C_CTRL */
-#define _I2C_CTRL_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
-#define _I2C_CTRL_CLTO_OFF 0x00000000UL /**< Mode OFF for I2C_CTRL */
-#define _I2C_CTRL_CLTO_40PCC 0x00000001UL /**< Mode 40PCC for I2C_CTRL */
-#define _I2C_CTRL_CLTO_80PCC 0x00000002UL /**< Mode 80PCC for I2C_CTRL */
-#define _I2C_CTRL_CLTO_160PCC 0x00000003UL /**< Mode 160PCC for I2C_CTRL */
-#define _I2C_CTRL_CLTO_320PPC 0x00000004UL /**< Mode 320PPC for I2C_CTRL */
-#define _I2C_CTRL_CLTO_1024PPC 0x00000005UL /**< Mode 1024PPC for I2C_CTRL */
-
-/** Bit fields for I2C CMD */
-#define _I2C_CMD_RESETVALUE 0x00000000UL /**< Default value for I2C_CMD */
-#define _I2C_CMD_MASK 0x000000FFUL /**< Mask for I2C_CMD */
-#define I2C_CMD_START (1 << 0) /**< Send start condition */
-#define _I2C_CMD_START_SHIFT 0 /**< Shift value for I2C_START */
-#define _I2C_CMD_START_MASK 0x1UL /**< Bit mask for I2C_START */
-#define I2C_CMD_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_STOP (1 << 1) /**< Send stop condition */
-#define _I2C_CMD_STOP_SHIFT 1 /**< Shift value for I2C_STOP */
-#define _I2C_CMD_STOP_MASK 0x2UL /**< Bit mask for I2C_STOP */
-#define I2C_CMD_STOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_ACK (1 << 2) /**< Send ACK */
-#define _I2C_CMD_ACK_SHIFT 2 /**< Shift value for I2C_ACK */
-#define _I2C_CMD_ACK_MASK 0x4UL /**< Bit mask for I2C_ACK */
-#define I2C_CMD_ACK_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_NACK (1 << 3) /**< Send NACK */
-#define _I2C_CMD_NACK_SHIFT 3 /**< Shift value for I2C_NACK */
-#define _I2C_CMD_NACK_MASK 0x8UL /**< Bit mask for I2C_NACK */
-#define I2C_CMD_NACK_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_CONT (1 << 4) /**< Continue transmission */
-#define _I2C_CMD_CONT_SHIFT 4 /**< Shift value for I2C_CONT */
-#define _I2C_CMD_CONT_MASK 0x10UL /**< Bit mask for I2C_CONT */
-#define I2C_CMD_CONT_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_CONT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_ABORT (1 << 5) /**< Abort transmission */
-#define _I2C_CMD_ABORT_SHIFT 5 /**< Shift value for I2C_ABORT */
-#define _I2C_CMD_ABORT_MASK 0x20UL /**< Bit mask for I2C_ABORT */
-#define I2C_CMD_ABORT_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_ABORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_CLEARTX (1 << 6) /**< Clear TX */
-#define _I2C_CMD_CLEARTX_SHIFT 6 /**< Shift value for I2C_CLEARTX */
-#define _I2C_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for I2C_CLEARTX */
-#define I2C_CMD_CLEARTX_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-#define I2C_CMD_CLEARPC (1 << 7) /**< Clear Pending Commands */
-#define _I2C_CMD_CLEARPC_SHIFT 7 /**< Shift value for I2C_CLEARPC */
-#define _I2C_CMD_CLEARPC_MASK 0x80UL /**< Bit mask for I2C_CLEARPC */
-#define I2C_CMD_CLEARPC_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for I2C_CMD */
-#define _I2C_CMD_CLEARPC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
-
-/** Bit fields for I2C STATE */
-#define _I2C_STATE_RESETVALUE 0x00000001UL /**< Default value for I2C_STATE */
-#define _I2C_STATE_MASK 0x000000FFUL /**< Mask for I2C_STATE */
-#define I2C_STATE_BUSY (1 << 0) /**< Bus Busy */
-#define _I2C_STATE_BUSY_SHIFT 0 /**< Shift value for I2C_BUSY */
-#define _I2C_STATE_BUSY_MASK 0x1UL /**< Bit mask for I2C_BUSY */
-#define I2C_STATE_BUSY_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_BUSY_DEFAULT 0x00000001UL /**< Mode DEFAULT for I2C_STATE */
-#define I2C_STATE_MASTER (1 << 1) /**< Master */
-#define _I2C_STATE_MASTER_SHIFT 1 /**< Shift value for I2C_MASTER */
-#define _I2C_STATE_MASTER_MASK 0x2UL /**< Bit mask for I2C_MASTER */
-#define I2C_STATE_MASTER_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_MASTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
-#define I2C_STATE_TRANSMITTER (1 << 2) /**< Transmitter */
-#define _I2C_STATE_TRANSMITTER_SHIFT 2 /**< Shift value for I2C_TRANSMITTER */
-#define _I2C_STATE_TRANSMITTER_MASK 0x4UL /**< Bit mask for I2C_TRANSMITTER */
-#define I2C_STATE_TRANSMITTER_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_TRANSMITTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
-#define I2C_STATE_NACKED (1 << 3) /**< Nack Received */
-#define _I2C_STATE_NACKED_SHIFT 3 /**< Shift value for I2C_NACKED */
-#define _I2C_STATE_NACKED_MASK 0x8UL /**< Bit mask for I2C_NACKED */
-#define I2C_STATE_NACKED_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_NACKED_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
-#define I2C_STATE_BUSHOLD (1 << 4) /**< Bus Held */
-#define _I2C_STATE_BUSHOLD_SHIFT 4 /**< Shift value for I2C_BUSHOLD */
-#define _I2C_STATE_BUSHOLD_MASK 0x10UL /**< Bit mask for I2C_BUSHOLD */
-#define I2C_STATE_BUSHOLD_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_STATE_SHIFT 5 /**< Shift value for I2C_STATE */
-#define _I2C_STATE_STATE_MASK 0xE0UL /**< Bit mask for I2C_STATE */
-#define I2C_STATE_STATE_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_STATE */
-#define I2C_STATE_STATE_IDLE (0x00000000UL << 5) /**< Shifted mode IDLE for I2C_STATE */
-#define I2C_STATE_STATE_WAIT (0x00000001UL << 5) /**< Shifted mode WAIT for I2C_STATE */
-#define I2C_STATE_STATE_START (0x00000002UL << 5) /**< Shifted mode START for I2C_STATE */
-#define I2C_STATE_STATE_ADDR (0x00000003UL << 5) /**< Shifted mode ADDR for I2C_STATE */
-#define I2C_STATE_STATE_ADDRACK (0x00000004UL << 5) /**< Shifted mode ADDRACK for I2C_STATE */
-#define I2C_STATE_STATE_DATA (0x00000005UL << 5) /**< Shifted mode DATA for I2C_STATE */
-#define I2C_STATE_STATE_DATAACK (0x00000006UL << 5) /**< Shifted mode DATAACK for I2C_STATE */
-#define _I2C_STATE_STATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
-#define _I2C_STATE_STATE_IDLE 0x00000000UL /**< Mode IDLE for I2C_STATE */
-#define _I2C_STATE_STATE_WAIT 0x00000001UL /**< Mode WAIT for I2C_STATE */
-#define _I2C_STATE_STATE_START 0x00000002UL /**< Mode START for I2C_STATE */
-#define _I2C_STATE_STATE_ADDR 0x00000003UL /**< Mode ADDR for I2C_STATE */
-#define _I2C_STATE_STATE_ADDRACK 0x00000004UL /**< Mode ADDRACK for I2C_STATE */
-#define _I2C_STATE_STATE_DATA 0x00000005UL /**< Mode DATA for I2C_STATE */
-#define _I2C_STATE_STATE_DATAACK 0x00000006UL /**< Mode DATAACK for I2C_STATE */
-
-/** Bit fields for I2C STATUS */
-#define _I2C_STATUS_RESETVALUE 0x00000080UL /**< Default value for I2C_STATUS */
-#define _I2C_STATUS_MASK 0x000001FFUL /**< Mask for I2C_STATUS */
-#define I2C_STATUS_PSTART (1 << 0) /**< Pending START */
-#define _I2C_STATUS_PSTART_SHIFT 0 /**< Shift value for I2C_PSTART */
-#define _I2C_STATUS_PSTART_MASK 0x1UL /**< Bit mask for I2C_PSTART */
-#define I2C_STATUS_PSTART_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_PSTOP (1 << 1) /**< Pending STOP */
-#define _I2C_STATUS_PSTOP_SHIFT 1 /**< Shift value for I2C_PSTOP */
-#define _I2C_STATUS_PSTOP_MASK 0x2UL /**< Bit mask for I2C_PSTOP */
-#define I2C_STATUS_PSTOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_PACK (1 << 2) /**< Pending ACK */
-#define _I2C_STATUS_PACK_SHIFT 2 /**< Shift value for I2C_PACK */
-#define _I2C_STATUS_PACK_MASK 0x4UL /**< Bit mask for I2C_PACK */
-#define I2C_STATUS_PACK_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_PNACK (1 << 3) /**< Pending NACK */
-#define _I2C_STATUS_PNACK_SHIFT 3 /**< Shift value for I2C_PNACK */
-#define _I2C_STATUS_PNACK_MASK 0x8UL /**< Bit mask for I2C_PNACK */
-#define I2C_STATUS_PNACK_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PNACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_PCONT (1 << 4) /**< Pending continue */
-#define _I2C_STATUS_PCONT_SHIFT 4 /**< Shift value for I2C_PCONT */
-#define _I2C_STATUS_PCONT_MASK 0x10UL /**< Bit mask for I2C_PCONT */
-#define I2C_STATUS_PCONT_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PCONT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_PABORT (1 << 5) /**< Pending abort */
-#define _I2C_STATUS_PABORT_SHIFT 5 /**< Shift value for I2C_PABORT */
-#define _I2C_STATUS_PABORT_MASK 0x20UL /**< Bit mask for I2C_PABORT */
-#define I2C_STATUS_PABORT_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_PABORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_TXC (1 << 6) /**< TX Complete */
-#define _I2C_STATUS_TXC_SHIFT 6 /**< Shift value for I2C_TXC */
-#define _I2C_STATUS_TXC_MASK 0x40UL /**< Bit mask for I2C_TXC */
-#define I2C_STATUS_TXC_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_TXBL (1 << 7) /**< TX Buffer Level */
-#define _I2C_STATUS_TXBL_SHIFT 7 /**< Shift value for I2C_TXBL */
-#define _I2C_STATUS_TXBL_MASK 0x80UL /**< Bit mask for I2C_TXBL */
-#define I2C_STATUS_TXBL_DEFAULT (0x00000001UL << 7) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for I2C_STATUS */
-#define I2C_STATUS_RXDATAV (1 << 8) /**< RX Data Valid */
-#define _I2C_STATUS_RXDATAV_SHIFT 8 /**< Shift value for I2C_RXDATAV */
-#define _I2C_STATUS_RXDATAV_MASK 0x100UL /**< Bit mask for I2C_RXDATAV */
-#define I2C_STATUS_RXDATAV_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_STATUS */
-#define _I2C_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
-
-/** Bit fields for I2C CLKDIV */
-#define _I2C_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for I2C_CLKDIV */
-#define _I2C_CLKDIV_MASK 0x000001FFUL /**< Mask for I2C_CLKDIV */
-#define _I2C_CLKDIV_DIV_SHIFT 0 /**< Shift value for I2C_DIV */
-#define _I2C_CLKDIV_DIV_MASK 0x1FFUL /**< Bit mask for I2C_DIV */
-#define I2C_CLKDIV_DIV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_CLKDIV */
-#define _I2C_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CLKDIV */
-
-/** Bit fields for I2C SADDR */
-#define _I2C_SADDR_RESETVALUE 0x00000000UL /**< Default value for I2C_SADDR */
-#define _I2C_SADDR_MASK 0x000000FEUL /**< Mask for I2C_SADDR */
-#define _I2C_SADDR_ADDR_SHIFT 1 /**< Shift value for I2C_ADDR */
-#define _I2C_SADDR_ADDR_MASK 0xFEUL /**< Bit mask for I2C_ADDR */
-#define I2C_SADDR_ADDR_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_SADDR */
-#define _I2C_SADDR_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_SADDR */
-
-/** Bit fields for I2C SADDRMASK */
-#define _I2C_SADDRMASK_RESETVALUE 0x00000000UL /**< Default value for I2C_SADDRMASK */
-#define _I2C_SADDRMASK_MASK 0x000000FEUL /**< Mask for I2C_SADDRMASK */
-#define _I2C_SADDRMASK_MASK_SHIFT 1 /**< Shift value for I2C_MASK */
-#define _I2C_SADDRMASK_MASK_MASK 0xFEUL /**< Bit mask for I2C_MASK */
-#define I2C_SADDRMASK_MASK_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_SADDRMASK */
-#define _I2C_SADDRMASK_MASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_SADDRMASK */
-
-/** Bit fields for I2C RXDATA */
-#define _I2C_RXDATA_RESETVALUE 0x00000000UL /**< Default value for I2C_RXDATA */
-#define _I2C_RXDATA_MASK 0x000000FFUL /**< Mask for I2C_RXDATA */
-#define _I2C_RXDATA_RXDATA_SHIFT 0 /**< Shift value for I2C_RXDATA */
-#define _I2C_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for I2C_RXDATA */
-#define I2C_RXDATA_RXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_RXDATA */
-#define _I2C_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_RXDATA */
-
-/** Bit fields for I2C RXDATAP */
-#define _I2C_RXDATAP_RESETVALUE 0x00000000UL /**< Default value for I2C_RXDATAP */
-#define _I2C_RXDATAP_MASK 0x000000FFUL /**< Mask for I2C_RXDATAP */
-#define _I2C_RXDATAP_RXDATAP_SHIFT 0 /**< Shift value for I2C_RXDATAP */
-#define _I2C_RXDATAP_RXDATAP_MASK 0xFFUL /**< Bit mask for I2C_RXDATAP */
-#define I2C_RXDATAP_RXDATAP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_RXDATAP */
-#define _I2C_RXDATAP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_RXDATAP */
-
-/** Bit fields for I2C TXDATA */
-#define _I2C_TXDATA_RESETVALUE 0x00000000UL /**< Default value for I2C_TXDATA */
-#define _I2C_TXDATA_MASK 0x000000FFUL /**< Mask for I2C_TXDATA */
-#define _I2C_TXDATA_TXDATA_SHIFT 0 /**< Shift value for I2C_TXDATA */
-#define _I2C_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for I2C_TXDATA */
-#define I2C_TXDATA_TXDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_TXDATA */
-#define _I2C_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_TXDATA */
-
-/** Bit fields for I2C IF */
-#define _I2C_IF_RESETVALUE 0x00000000UL /**< Default value for I2C_IF */
-#define _I2C_IF_MASK 0x0001FFFFUL /**< Mask for I2C_IF */
-#define I2C_IF_START (1 << 0) /**< START condition Interrupt Flag */
-#define _I2C_IF_START_SHIFT 0 /**< Shift value for I2C_START */
-#define _I2C_IF_START_MASK 0x1UL /**< Bit mask for I2C_START */
-#define I2C_IF_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_RSTART (1 << 1) /**< Repeated START condition Interrupt Flag */
-#define _I2C_IF_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
-#define _I2C_IF_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
-#define I2C_IF_RSTART_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_ADDR (1 << 2) /**< Address Interrupt Flag */
-#define _I2C_IF_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
-#define _I2C_IF_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
-#define I2C_IF_ADDR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_TXC (1 << 3) /**< Transfer Completed Interrupt Flag */
-#define _I2C_IF_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
-#define _I2C_IF_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
-#define I2C_IF_TXC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_TXBL (1 << 4) /**< Transmit Buffer Level Interrupt Flag */
-#define _I2C_IF_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
-#define _I2C_IF_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
-#define I2C_IF_TXBL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_RXDATAV (1 << 5) /**< Receive Data Valid Interrupt Flag */
-#define _I2C_IF_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
-#define _I2C_IF_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
-#define I2C_IF_RXDATAV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_ACK (1 << 6) /**< Acknowledge Received Interrupt Flag */
-#define _I2C_IF_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
-#define _I2C_IF_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
-#define I2C_IF_ACK_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_NACK (1 << 7) /**< Not Acknowledge Received Interrupt Flag */
-#define _I2C_IF_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
-#define _I2C_IF_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
-#define I2C_IF_NACK_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_MSTOP (1 << 8) /**< Master STOP Condition Interrupt Flag */
-#define _I2C_IF_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
-#define _I2C_IF_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
-#define I2C_IF_MSTOP_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_ARBLOST (1 << 9) /**< Arbitration Lost Interrupt Flag */
-#define _I2C_IF_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
-#define _I2C_IF_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
-#define I2C_IF_ARBLOST_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_BUSERR (1 << 10) /**< Bus Error Interrupt Flag */
-#define _I2C_IF_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
-#define _I2C_IF_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
-#define I2C_IF_BUSERR_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_BUSHOLD (1 << 11) /**< Bus Held Interrupt Flag */
-#define _I2C_IF_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
-#define _I2C_IF_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
-#define I2C_IF_BUSHOLD_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_TXOF (1 << 12) /**< Transmit Buffer Overflow Interrupt Flag */
-#define _I2C_IF_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
-#define _I2C_IF_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
-#define I2C_IF_TXOF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_RXUF (1 << 13) /**< Receive Buffer Underflow Interrupt Flag */
-#define _I2C_IF_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
-#define _I2C_IF_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
-#define I2C_IF_RXUF_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_BITO (1 << 14) /**< Bus Idle Timeout Interrupt Flag */
-#define _I2C_IF_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
-#define _I2C_IF_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
-#define I2C_IF_BITO_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_CLTO (1 << 15) /**< Clock Low Interrupt Flag */
-#define _I2C_IF_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
-#define _I2C_IF_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
-#define I2C_IF_CLTO_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-#define I2C_IF_SSTOP (1 << 16) /**< Slave STOP condition Interrupt Flag */
-#define _I2C_IF_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
-#define _I2C_IF_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
-#define I2C_IF_SSTOP_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for I2C_IF */
-#define _I2C_IF_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
-
-/** Bit fields for I2C IFS */
-#define _I2C_IFS_RESETVALUE 0x00000000UL /**< Default value for I2C_IFS */
-#define _I2C_IFS_MASK 0x0001FFFFUL /**< Mask for I2C_IFS */
-#define I2C_IFS_START (1 << 0) /**< Set START Interrupt Flag */
-#define _I2C_IFS_START_SHIFT 0 /**< Shift value for I2C_START */
-#define _I2C_IFS_START_MASK 0x1UL /**< Bit mask for I2C_START */
-#define I2C_IFS_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_RSTART (1 << 1) /**< Set Repeated START Interrupt Flag */
-#define _I2C_IFS_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
-#define _I2C_IFS_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
-#define I2C_IFS_RSTART_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_ADDR (1 << 2) /**< Set Address Interrupt Flag */
-#define _I2C_IFS_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
-#define _I2C_IFS_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
-#define I2C_IFS_ADDR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_TXC (1 << 3) /**< Set Transfer Completed Interrupt Flag */
-#define _I2C_IFS_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
-#define _I2C_IFS_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
-#define I2C_IFS_TXC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_TXBL (1 << 4) /**< Set Transmit Buffer level Interrupt Flag */
-#define _I2C_IFS_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
-#define _I2C_IFS_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
-#define I2C_IFS_TXBL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_RXDATAV (1 << 5) /**< Set Receive Data Valid Interrupt Flag */
-#define _I2C_IFS_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
-#define _I2C_IFS_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
-#define I2C_IFS_RXDATAV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_ACK (1 << 6) /**< Set Acknowledge Received Interrupt Flag */
-#define _I2C_IFS_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
-#define _I2C_IFS_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
-#define I2C_IFS_ACK_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_NACK (1 << 7) /**< Set Not Acknowledge Received Interrupt Flag */
-#define _I2C_IFS_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
-#define _I2C_IFS_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
-#define I2C_IFS_NACK_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_MSTOP (1 << 8) /**< Set MSTOP Interrupt Flag */
-#define _I2C_IFS_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
-#define _I2C_IFS_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
-#define I2C_IFS_MSTOP_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_ARBLOST (1 << 9) /**< Set Arbitration Lost Interrupt Flag */
-#define _I2C_IFS_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
-#define _I2C_IFS_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
-#define I2C_IFS_ARBLOST_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_BUSERR (1 << 10) /**< Set Bus Error Interrupt Flag */
-#define _I2C_IFS_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
-#define _I2C_IFS_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
-#define I2C_IFS_BUSERR_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_BUSHOLD (1 << 11) /**< Set Bus Held Interrupt Flag */
-#define _I2C_IFS_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
-#define _I2C_IFS_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
-#define I2C_IFS_BUSHOLD_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_TXOF (1 << 12) /**< Set Transmit Buffer Overflow Interrupt Flag */
-#define _I2C_IFS_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
-#define _I2C_IFS_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
-#define I2C_IFS_TXOF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_RXUF (1 << 13) /**< Set Receive Buffer Underflow Interrupt Flag */
-#define _I2C_IFS_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
-#define _I2C_IFS_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
-#define I2C_IFS_RXUF_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_BITO (1 << 14) /**< Set Bus Idle Timeout Interrupt Flag */
-#define _I2C_IFS_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
-#define _I2C_IFS_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
-#define I2C_IFS_BITO_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_CLTO (1 << 15) /**< Set Clock Low Interrupt Flag */
-#define _I2C_IFS_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
-#define _I2C_IFS_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
-#define I2C_IFS_CLTO_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-#define I2C_IFS_SSTOP (1 << 16) /**< Set SSTOP Interrupt Flag */
-#define _I2C_IFS_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
-#define _I2C_IFS_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
-#define I2C_IFS_SSTOP_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for I2C_IFS */
-#define _I2C_IFS_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
-
-/** Bit fields for I2C IFC */
-#define _I2C_IFC_RESETVALUE 0x00000000UL /**< Default value for I2C_IFC */
-#define _I2C_IFC_MASK 0x0001FFFFUL /**< Mask for I2C_IFC */
-#define I2C_IFC_START (1 << 0) /**< Clear START Interrupt Flag */
-#define _I2C_IFC_START_SHIFT 0 /**< Shift value for I2C_START */
-#define _I2C_IFC_START_MASK 0x1UL /**< Bit mask for I2C_START */
-#define I2C_IFC_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_RSTART (1 << 1) /**< Clear Repeated START Interrupt Flag */
-#define _I2C_IFC_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
-#define _I2C_IFC_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
-#define I2C_IFC_RSTART_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_ADDR (1 << 2) /**< Clear Address Interrupt Flag */
-#define _I2C_IFC_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
-#define _I2C_IFC_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
-#define I2C_IFC_ADDR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_TXC (1 << 3) /**< Clear Transfer Completed Interrupt Flag */
-#define _I2C_IFC_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
-#define _I2C_IFC_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
-#define I2C_IFC_TXC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_TXBL (1 << 4) /**< Clear Transmit Buffer level Interrupt Flag */
-#define _I2C_IFC_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
-#define _I2C_IFC_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
-#define I2C_IFC_TXBL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_RXDATAV (1 << 5) /**< Clear Receive Data Valid Interrupt Flag */
-#define _I2C_IFC_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
-#define _I2C_IFC_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
-#define I2C_IFC_RXDATAV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_ACK (1 << 6) /**< Clear Acknowledge Received Interrupt Flag */
-#define _I2C_IFC_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
-#define _I2C_IFC_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
-#define I2C_IFC_ACK_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_NACK (1 << 7) /**< Clear Not Acknowledge Received Interrupt Flag */
-#define _I2C_IFC_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
-#define _I2C_IFC_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
-#define I2C_IFC_NACK_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_MSTOP (1 << 8) /**< Clear MSTOP Interrupt Flag */
-#define _I2C_IFC_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
-#define _I2C_IFC_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
-#define I2C_IFC_MSTOP_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_ARBLOST (1 << 9) /**< Clear Arbitration Lost Interrupt Flag */
-#define _I2C_IFC_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
-#define _I2C_IFC_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
-#define I2C_IFC_ARBLOST_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_BUSERR (1 << 10) /**< Clear Bus Error Interrupt Flag */
-#define _I2C_IFC_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
-#define _I2C_IFC_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
-#define I2C_IFC_BUSERR_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_BUSHOLD (1 << 11) /**< Clear Bus Held Interrupt Flag */
-#define _I2C_IFC_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
-#define _I2C_IFC_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
-#define I2C_IFC_BUSHOLD_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_TXOF (1 << 12) /**< Clear Transmit Buffer Overflow Interrupt Flag */
-#define _I2C_IFC_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
-#define _I2C_IFC_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
-#define I2C_IFC_TXOF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_RXUF (1 << 13) /**< Clear Receive Buffer Underflow Interrupt Flag */
-#define _I2C_IFC_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
-#define _I2C_IFC_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
-#define I2C_IFC_RXUF_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_BITO (1 << 14) /**< Clear Bus Idle Timeout Interrupt Flag */
-#define _I2C_IFC_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
-#define _I2C_IFC_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
-#define I2C_IFC_BITO_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_CLTO (1 << 15) /**< Clear Clock Low Interrupt Flag */
-#define _I2C_IFC_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
-#define _I2C_IFC_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
-#define I2C_IFC_CLTO_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-#define I2C_IFC_SSTOP (1 << 16) /**< Clear SSTOP Interrupt Flag */
-#define _I2C_IFC_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
-#define _I2C_IFC_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
-#define I2C_IFC_SSTOP_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for I2C_IFC */
-#define _I2C_IFC_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
-
-/** Bit fields for I2C IEN */
-#define _I2C_IEN_RESETVALUE 0x00000000UL /**< Default value for I2C_IEN */
-#define _I2C_IEN_MASK 0x0001FFFFUL /**< Mask for I2C_IEN */
-#define I2C_IEN_START (1 << 0) /**< START Condition Interrupt Enable */
-#define _I2C_IEN_START_SHIFT 0 /**< Shift value for I2C_START */
-#define _I2C_IEN_START_MASK 0x1UL /**< Bit mask for I2C_START */
-#define I2C_IEN_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_RSTART (1 << 1) /**< Repeated START condition Interrupt Enable */
-#define _I2C_IEN_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
-#define _I2C_IEN_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
-#define I2C_IEN_RSTART_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_ADDR (1 << 2) /**< Address Interrupt Enable */
-#define _I2C_IEN_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
-#define _I2C_IEN_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
-#define I2C_IEN_ADDR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_TXC (1 << 3) /**< Transfer Completed Interrupt Enable */
-#define _I2C_IEN_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
-#define _I2C_IEN_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
-#define I2C_IEN_TXC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_TXBL (1 << 4) /**< Transmit Buffer level Interrupt Enable */
-#define _I2C_IEN_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
-#define _I2C_IEN_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
-#define I2C_IEN_TXBL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_RXDATAV (1 << 5) /**< Receive Data Valid Interrupt Enable */
-#define _I2C_IEN_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
-#define _I2C_IEN_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
-#define I2C_IEN_RXDATAV_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_ACK (1 << 6) /**< Acknowledge Received Interrupt Enable */
-#define _I2C_IEN_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
-#define _I2C_IEN_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
-#define I2C_IEN_ACK_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_NACK (1 << 7) /**< Not Acknowledge Received Interrupt Enable */
-#define _I2C_IEN_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
-#define _I2C_IEN_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
-#define I2C_IEN_NACK_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_MSTOP (1 << 8) /**< MSTOP Interrupt Enable */
-#define _I2C_IEN_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
-#define _I2C_IEN_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
-#define I2C_IEN_MSTOP_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_ARBLOST (1 << 9) /**< Arbitration Lost Interrupt Enable */
-#define _I2C_IEN_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
-#define _I2C_IEN_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
-#define I2C_IEN_ARBLOST_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_BUSERR (1 << 10) /**< Bus Error Interrupt Enable */
-#define _I2C_IEN_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
-#define _I2C_IEN_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
-#define I2C_IEN_BUSERR_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_BUSHOLD (1 << 11) /**< Bus Held Interrupt Enable */
-#define _I2C_IEN_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
-#define _I2C_IEN_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
-#define I2C_IEN_BUSHOLD_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_TXOF (1 << 12) /**< Transmit Buffer Overflow Interrupt Enable */
-#define _I2C_IEN_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
-#define _I2C_IEN_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
-#define I2C_IEN_TXOF_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_RXUF (1 << 13) /**< Receive Buffer Underflow Interrupt Enable */
-#define _I2C_IEN_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
-#define _I2C_IEN_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
-#define I2C_IEN_RXUF_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_BITO (1 << 14) /**< Bus Idle Timeout Interrupt Enable */
-#define _I2C_IEN_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
-#define _I2C_IEN_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
-#define I2C_IEN_BITO_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_CLTO (1 << 15) /**< Clock Low Interrupt Enable */
-#define _I2C_IEN_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
-#define _I2C_IEN_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
-#define I2C_IEN_CLTO_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-#define I2C_IEN_SSTOP (1 << 16) /**< SSTOP Interrupt Enable */
-#define _I2C_IEN_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
-#define _I2C_IEN_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
-#define I2C_IEN_SSTOP_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for I2C_IEN */
-#define _I2C_IEN_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
-
-/** Bit fields for I2C ROUTE */
-#define _I2C_ROUTE_RESETVALUE 0x00000000UL /**< Default value for I2C_ROUTE */
-#define _I2C_ROUTE_MASK 0x00000303UL /**< Mask for I2C_ROUTE */
-#define I2C_ROUTE_SDAPEN (1 << 0) /**< SDA Pin Enable */
-#define _I2C_ROUTE_SDAPEN_SHIFT 0 /**< Shift value for I2C_SDAPEN */
-#define _I2C_ROUTE_SDAPEN_MASK 0x1UL /**< Bit mask for I2C_SDAPEN */
-#define I2C_ROUTE_SDAPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for I2C_ROUTE */
-#define _I2C_ROUTE_SDAPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
-#define I2C_ROUTE_SCLPEN (1 << 1) /**< SCL Pin Enable */
-#define _I2C_ROUTE_SCLPEN_SHIFT 1 /**< Shift value for I2C_SCLPEN */
-#define _I2C_ROUTE_SCLPEN_MASK 0x2UL /**< Bit mask for I2C_SCLPEN */
-#define I2C_ROUTE_SCLPEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for I2C_ROUTE */
-#define _I2C_ROUTE_SCLPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_SHIFT 8 /**< Shift value for I2C_LOCATION */
-#define _I2C_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for I2C_LOCATION */
-#define I2C_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for I2C_ROUTE */
-#define I2C_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for I2C_ROUTE */
-#define I2C_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for I2C_ROUTE */
-#define I2C_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for I2C_ROUTE */
-#define I2C_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for I2C_ROUTE */
-#define _I2C_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for I2C_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_ADC
- * @{
- */
-
-/** Bit fields for ADC CTRL */
-#define _ADC_CTRL_RESETVALUE 0x001F0000UL /**< Default value for ADC_CTRL */
-#define _ADC_CTRL_MASK 0x0F1F7F3BUL /**< Mask for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_SHIFT 0 /**< Shift value for ADC_ENERGYMODE */
-#define _ADC_CTRL_ENERGYMODE_MASK 0x3UL /**< Bit mask for ADC_ENERGYMODE */
-#define ADC_CTRL_ENERGYMODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define ADC_CTRL_ENERGYMODE_NORMAL (0x00000000UL << 0) /**< Shifted mode NORMAL for ADC_CTRL */
-#define ADC_CTRL_ENERGYMODE_FASTBG (0x00000001UL << 0) /**< Shifted mode FASTBG for ADC_CTRL */
-#define ADC_CTRL_ENERGYMODE_KEEPSCANREFWARM (0x00000002UL << 0) /**< Shifted mode KEEPSCANREFWARM for ADC_CTRL */
-#define ADC_CTRL_ENERGYMODE_KEEPADCWARM (0x00000003UL << 0) /**< Shifted mode KEEPADCWARM for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_NORMAL 0x00000000UL /**< Mode NORMAL for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_FASTBG 0x00000001UL /**< Mode FASTBG for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_KEEPSCANREFWARM 0x00000002UL /**< Mode KEEPSCANREFWARM for ADC_CTRL */
-#define _ADC_CTRL_ENERGYMODE_KEEPADCWARM 0x00000003UL /**< Mode KEEPADCWARM for ADC_CTRL */
-#define ADC_CTRL_TAILGATE (1 << 3) /**< Conversion Tailgating */
-#define _ADC_CTRL_TAILGATE_SHIFT 3 /**< Shift value for ADC_TAILGATE */
-#define _ADC_CTRL_TAILGATE_MASK 0x8UL /**< Bit mask for ADC_TAILGATE */
-#define ADC_CTRL_TAILGATE_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_TAILGATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_LPFMODE_SHIFT 4 /**< Shift value for ADC_LPFMODE */
-#define _ADC_CTRL_LPFMODE_MASK 0x30UL /**< Bit mask for ADC_LPFMODE */
-#define ADC_CTRL_LPFMODE_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define ADC_CTRL_LPFMODE_BYPASS (0x00000000UL << 4) /**< Shifted mode BYPASS for ADC_CTRL */
-#define ADC_CTRL_LPFMODE_RCFILT (0x00000001UL << 4) /**< Shifted mode RCFILT for ADC_CTRL */
-#define ADC_CTRL_LPFMODE_DECAP (0x00000002UL << 4) /**< Shifted mode DECAP for ADC_CTRL */
-#define _ADC_CTRL_LPFMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_LPFMODE_BYPASS 0x00000000UL /**< Mode BYPASS for ADC_CTRL */
-#define _ADC_CTRL_LPFMODE_RCFILT 0x00000001UL /**< Mode RCFILT for ADC_CTRL */
-#define _ADC_CTRL_LPFMODE_DECAP 0x00000002UL /**< Mode DECAP for ADC_CTRL */
-#define _ADC_CTRL_PRESC_SHIFT 8 /**< Shift value for ADC_PRESC */
-#define _ADC_CTRL_PRESC_MASK 0x7F00UL /**< Bit mask for ADC_PRESC */
-#define ADC_CTRL_PRESC_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define ADC_CTRL_PRESC_NODIVISION (0x00000000UL << 8) /**< Shifted mode NODIVISION for ADC_CTRL */
-#define _ADC_CTRL_PRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_PRESC_NODIVISION 0x00000000UL /**< Mode NODIVISION for ADC_CTRL */
-#define _ADC_CTRL_TIMEBASE_SHIFT 16 /**< Shift value for ADC_TIMEBASE */
-#define _ADC_CTRL_TIMEBASE_MASK 0x1F0000UL /**< Bit mask for ADC_TIMEBASE */
-#define ADC_CTRL_TIMEBASE_DEFAULT (0x0000001FUL << 16) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_TIMEBASE_DEFAULT 0x0000001FUL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_SHIFT 24 /**< Shift value for ADC_OSRSEL */
-#define _ADC_CTRL_OSRSEL_MASK 0xF000000UL /**< Bit mask for ADC_OSRSEL */
-#define ADC_CTRL_OSRSEL_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR2 (0x00000000UL << 24) /**< Shifted mode OSR2 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR4 (0x00000001UL << 24) /**< Shifted mode OSR4 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR8 (0x00000002UL << 24) /**< Shifted mode OSR8 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR16 (0x00000003UL << 24) /**< Shifted mode OSR16 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR32 (0x00000004UL << 24) /**< Shifted mode OSR32 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR64 (0x00000005UL << 24) /**< Shifted mode OSR64 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR128 (0x00000006UL << 24) /**< Shifted mode OSR128 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR256 (0x00000007UL << 24) /**< Shifted mode OSR256 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR512 (0x00000008UL << 24) /**< Shifted mode OSR512 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR1024 (0x00000009UL << 24) /**< Shifted mode OSR1024 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR2048 (0x0000000AUL << 24) /**< Shifted mode OSR2048 for ADC_CTRL */
-#define ADC_CTRL_OSRSEL_OSR4096 (0x0000000BUL << 24) /**< Shifted mode OSR4096 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR2 0x00000000UL /**< Mode OSR2 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR4 0x00000001UL /**< Mode OSR4 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR8 0x00000002UL /**< Mode OSR8 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR16 0x00000003UL /**< Mode OSR16 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR32 0x00000004UL /**< Mode OSR32 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR64 0x00000005UL /**< Mode OSR64 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR128 0x00000006UL /**< Mode OSR128 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR256 0x00000007UL /**< Mode OSR256 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR512 0x00000008UL /**< Mode OSR512 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR1024 0x00000009UL /**< Mode OSR1024 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR2048 0x0000000AUL /**< Mode OSR2048 for ADC_CTRL */
-#define _ADC_CTRL_OSRSEL_OSR4096 0x0000000BUL /**< Mode OSR4096 for ADC_CTRL */
-
-/** Bit fields for ADC CMD */
-#define _ADC_CMD_RESETVALUE 0x00000000UL /**< Default value for ADC_CMD */
-#define _ADC_CMD_MASK 0x0000000FUL /**< Mask for ADC_CMD */
-#define ADC_CMD_SINGLESTART (1 << 0) /**< Single Conversion Start */
-#define _ADC_CMD_SINGLESTART_SHIFT 0 /**< Shift value for ADC_SINGLESTART */
-#define _ADC_CMD_SINGLESTART_MASK 0x1UL /**< Bit mask for ADC_SINGLESTART */
-#define ADC_CMD_SINGLESTART_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_CMD */
-#define _ADC_CMD_SINGLESTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CMD */
-#define ADC_CMD_SINGLESTOP (1 << 1) /**< Single Conversion Stop */
-#define _ADC_CMD_SINGLESTOP_SHIFT 1 /**< Shift value for ADC_SINGLESTOP */
-#define _ADC_CMD_SINGLESTOP_MASK 0x2UL /**< Bit mask for ADC_SINGLESTOP */
-#define ADC_CMD_SINGLESTOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_CMD */
-#define _ADC_CMD_SINGLESTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CMD */
-#define ADC_CMD_SCANSTART (1 << 2) /**< Scan Sequence Start */
-#define _ADC_CMD_SCANSTART_SHIFT 2 /**< Shift value for ADC_SCANSTART */
-#define _ADC_CMD_SCANSTART_MASK 0x4UL /**< Bit mask for ADC_SCANSTART */
-#define ADC_CMD_SCANSTART_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for ADC_CMD */
-#define _ADC_CMD_SCANSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CMD */
-#define ADC_CMD_SCANSTOP (1 << 3) /**< Scan Sequence Stop */
-#define _ADC_CMD_SCANSTOP_SHIFT 3 /**< Shift value for ADC_SCANSTOP */
-#define _ADC_CMD_SCANSTOP_MASK 0x8UL /**< Bit mask for ADC_SCANSTOP */
-#define ADC_CMD_SCANSTOP_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for ADC_CMD */
-#define _ADC_CMD_SCANSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CMD */
-
-/** Bit fields for ADC STATUS */
-#define _ADC_STATUS_RESETVALUE 0x00000000UL /**< Default value for ADC_STATUS */
-#define _ADC_STATUS_MASK 0x07031303UL /**< Mask for ADC_STATUS */
-#define ADC_STATUS_SINGLEACT (1 << 0) /**< Single Conversion Active */
-#define _ADC_STATUS_SINGLEACT_SHIFT 0 /**< Shift value for ADC_SINGLEACT */
-#define _ADC_STATUS_SINGLEACT_MASK 0x1UL /**< Bit mask for ADC_SINGLEACT */
-#define ADC_STATUS_SINGLEACT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SINGLEACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SCANACT (1 << 1) /**< Scan Conversion Active */
-#define _ADC_STATUS_SCANACT_SHIFT 1 /**< Shift value for ADC_SCANACT */
-#define _ADC_STATUS_SCANACT_MASK 0x2UL /**< Bit mask for ADC_SCANACT */
-#define ADC_STATUS_SCANACT_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SCANACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SINGLEREFWARM (1 << 8) /**< Single Reference Warmed Up */
-#define _ADC_STATUS_SINGLEREFWARM_SHIFT 8 /**< Shift value for ADC_SINGLEREFWARM */
-#define _ADC_STATUS_SINGLEREFWARM_MASK 0x100UL /**< Bit mask for ADC_SINGLEREFWARM */
-#define ADC_STATUS_SINGLEREFWARM_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SINGLEREFWARM_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SCANREFWARM (1 << 9) /**< Scan Reference Warmed Up */
-#define _ADC_STATUS_SCANREFWARM_SHIFT 9 /**< Shift value for ADC_SCANREFWARM */
-#define _ADC_STATUS_SCANREFWARM_MASK 0x200UL /**< Bit mask for ADC_SCANREFWARM */
-#define ADC_STATUS_SCANREFWARM_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SCANREFWARM_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_WARM (1 << 12) /**< ADC Warmed Up */
-#define _ADC_STATUS_WARM_SHIFT 12 /**< Shift value for ADC_WARM */
-#define _ADC_STATUS_WARM_MASK 0x1000UL /**< Bit mask for ADC_WARM */
-#define ADC_STATUS_WARM_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_WARM_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SINGLEDV (1 << 16) /**< Single Sample Data Valid */
-#define _ADC_STATUS_SINGLEDV_SHIFT 16 /**< Shift value for ADC_SINGLEDV */
-#define _ADC_STATUS_SINGLEDV_MASK 0x10000UL /**< Bit mask for ADC_SINGLEDV */
-#define ADC_STATUS_SINGLEDV_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SINGLEDV_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SCANDV (1 << 17) /**< Scan Data Valid */
-#define _ADC_STATUS_SCANDV_SHIFT 17 /**< Shift value for ADC_SCANDV */
-#define _ADC_STATUS_SCANDV_MASK 0x20000UL /**< Bit mask for ADC_SCANDV */
-#define ADC_STATUS_SCANDV_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SCANDV_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_SHIFT 24 /**< Shift value for ADC_SCANDATASRC */
-#define _ADC_STATUS_SCANDATASRC_MASK 0x7000000UL /**< Bit mask for ADC_SCANDATASRC */
-#define ADC_STATUS_SCANDATASRC_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL0 (0x00000000UL << 24) /**< Shifted mode CHANNEL0 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL1 (0x00000001UL << 24) /**< Shifted mode CHANNEL1 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL2 (0x00000002UL << 24) /**< Shifted mode CHANNEL2 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL3 (0x00000003UL << 24) /**< Shifted mode CHANNEL3 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL4 (0x00000004UL << 24) /**< Shifted mode CHANNEL4 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL5 (0x00000005UL << 24) /**< Shifted mode CHANNEL5 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL6 (0x00000006UL << 24) /**< Shifted mode CHANNEL6 for ADC_STATUS */
-#define ADC_STATUS_SCANDATASRC_CHANNEL7 (0x00000007UL << 24) /**< Shifted mode CHANNEL7 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL0 0x00000000UL /**< Mode CHANNEL0 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL1 0x00000001UL /**< Mode CHANNEL1 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL2 0x00000002UL /**< Mode CHANNEL2 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL3 0x00000003UL /**< Mode CHANNEL3 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL4 0x00000004UL /**< Mode CHANNEL4 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL5 0x00000005UL /**< Mode CHANNEL5 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL6 0x00000006UL /**< Mode CHANNEL6 for ADC_STATUS */
-#define _ADC_STATUS_SCANDATASRC_CHANNEL7 0x00000007UL /**< Mode CHANNEL7 for ADC_STATUS */
-
-/** Bit fields for ADC SINGLECTRL */
-#define _ADC_SINGLECTRL_RESETVALUE 0x00000000UL /**< Default value for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_MASK 0x71F70F37UL /**< Mask for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREP (1 << 0) /**< Single Sample Repetitive Mode */
-#define _ADC_SINGLECTRL_SINGLEREP_SHIFT 0 /**< Shift value for ADC_SINGLEREP */
-#define _ADC_SINGLECTRL_SINGLEREP_MASK 0x1UL /**< Bit mask for ADC_SINGLEREP */
-#define ADC_SINGLECTRL_SINGLEREP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEDIFF (1 << 1) /**< Single Sample Differential Mode */
-#define _ADC_SINGLECTRL_SINGLEDIFF_SHIFT 1 /**< Shift value for ADC_SINGLEDIFF */
-#define _ADC_SINGLECTRL_SINGLEDIFF_MASK 0x2UL /**< Bit mask for ADC_SINGLEDIFF */
-#define ADC_SINGLECTRL_SINGLEDIFF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEDIFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEADJ (1 << 2) /**< Single Sample Result Adjustment */
-#define _ADC_SINGLECTRL_SINGLEADJ_SHIFT 2 /**< Shift value for ADC_SINGLEADJ */
-#define _ADC_SINGLECTRL_SINGLEADJ_MASK 0x4UL /**< Bit mask for ADC_SINGLEADJ */
-#define ADC_SINGLECTRL_SINGLEADJ_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEADJ_RIGHT (0x00000000UL << 2) /**< Shifted mode RIGHT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEADJ_LEFT (0x00000001UL << 2) /**< Shifted mode LEFT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEADJ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEADJ_RIGHT 0x00000000UL /**< Mode RIGHT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEADJ_LEFT 0x00000001UL /**< Mode LEFT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_SHIFT 4 /**< Shift value for ADC_SINGLERES */
-#define _ADC_SINGLECTRL_SINGLERES_MASK 0x30UL /**< Bit mask for ADC_SINGLERES */
-#define ADC_SINGLECTRL_SINGLERES_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLERES_12BIT (0x00000000UL << 4) /**< Shifted mode 12BIT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLERES_8BIT (0x00000001UL << 4) /**< Shifted mode 8BIT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLERES_6BIT (0x00000002UL << 4) /**< Shifted mode 6BIT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLERES_OS (0x00000003UL << 4) /**< Shifted mode OS for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_12BIT 0x00000000UL /**< Mode 12BIT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_8BIT 0x00000001UL /**< Mode 8BIT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_6BIT 0x00000002UL /**< Mode 6BIT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLERES_OS 0x00000003UL /**< Mode OS for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_SHIFT 8 /**< Shift value for ADC_SINGLESEL */
-#define _ADC_SINGLECTRL_SINGLESEL_MASK 0xF00UL /**< Bit mask for ADC_SINGLESEL */
-#define ADC_SINGLECTRL_SINGLESEL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL0 (0x00000000UL << 8) /**< Shifted mode CHANNEL0 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL1 (0x00000001UL << 8) /**< Shifted mode CHANNEL1 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL2 (0x00000002UL << 8) /**< Shifted mode CHANNEL2 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL3 (0x00000003UL << 8) /**< Shifted mode CHANNEL3 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL4 (0x00000004UL << 8) /**< Shifted mode CHANNEL4 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL5 (0x00000005UL << 8) /**< Shifted mode CHANNEL5 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL6 (0x00000006UL << 8) /**< Shifted mode CHANNEL6 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL7 (0x00000007UL << 8) /**< Shifted mode CHANNEL7 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL8 (0x00000008UL << 8) /**< Shifted mode CHANNEL8 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL9 (0x00000009UL << 8) /**< Shifted mode CHANNEL9 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL10 (0x0000000AUL << 8) /**< Shifted mode CHANNEL10 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL11 (0x0000000BUL << 8) /**< Shifted mode CHANNEL11 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL12 (0x0000000CUL << 8) /**< Shifted mode CHANNEL12 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL13 (0x0000000DUL << 8) /**< Shifted mode CHANNEL13 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLESEL_CHANNEL14 (0x0000000EUL << 8) /**< Shifted mode CHANNEL14 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL0 0x00000000UL /**< Mode CHANNEL0 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL1 0x00000001UL /**< Mode CHANNEL1 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL2 0x00000002UL /**< Mode CHANNEL2 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL3 0x00000003UL /**< Mode CHANNEL3 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL4 0x00000004UL /**< Mode CHANNEL4 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL5 0x00000005UL /**< Mode CHANNEL5 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL6 0x00000006UL /**< Mode CHANNEL6 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL7 0x00000007UL /**< Mode CHANNEL7 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL8 0x00000008UL /**< Mode CHANNEL8 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL9 0x00000009UL /**< Mode CHANNEL9 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL10 0x0000000AUL /**< Mode CHANNEL10 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL11 0x0000000BUL /**< Mode CHANNEL11 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL12 0x0000000CUL /**< Mode CHANNEL12 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL13 0x0000000DUL /**< Mode CHANNEL13 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLESEL_CHANNEL14 0x0000000EUL /**< Mode CHANNEL14 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_SHIFT 16 /**< Shift value for ADC_SINGLEREF */
-#define _ADC_SINGLECTRL_SINGLEREF_MASK 0x70000UL /**< Bit mask for ADC_SINGLEREF */
-#define ADC_SINGLECTRL_SINGLEREF_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_1V25 (0x00000000UL << 16) /**< Shifted mode 1V25 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_2V5 (0x00000001UL << 16) /**< Shifted mode 2V5 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_VDD (0x00000002UL << 16) /**< Shifted mode VDD for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_5VDIFF (0x00000003UL << 16) /**< Shifted mode 5VDIFF for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_EXTSINGLE (0x00000004UL << 16) /**< Shifted mode EXTSINGLE for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_EXTDIFF (0x00000005UL << 16) /**< Shifted mode EXTDIFF for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEREF_2XVDDVSS (0x00000006UL << 16) /**< Shifted mode 2XVDDVSS for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_1V25 0x00000000UL /**< Mode 1V25 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_2V5 0x00000001UL /**< Mode 2V5 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_VDD 0x00000002UL /**< Mode VDD for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_5VDIFF 0x00000003UL /**< Mode 5VDIFF for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_EXTSINGLE 0x00000004UL /**< Mode EXTSINGLE for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_EXTDIFF 0x00000005UL /**< Mode EXTDIFF for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEREF_2XVDDVSS 0x00000006UL /**< Mode 2XVDDVSS for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_SHIFT 20 /**< Shift value for ADC_SINGLEAT */
-#define _ADC_SINGLECTRL_SINGLEAT_MASK 0xF00000UL /**< Bit mask for ADC_SINGLEAT */
-#define ADC_SINGLECTRL_SINGLEAT_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_1CYCLE (0x00000000UL << 20) /**< Shifted mode 1CYCLE for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_2CYCLES (0x00000001UL << 20) /**< Shifted mode 2CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_4CYCLES (0x00000002UL << 20) /**< Shifted mode 4CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_8CYCLES (0x00000003UL << 20) /**< Shifted mode 8CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_16CYCLES (0x00000004UL << 20) /**< Shifted mode 16CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_32CYCLES (0x00000005UL << 20) /**< Shifted mode 32CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_64CYCLES (0x00000006UL << 20) /**< Shifted mode 64CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_128CYCLES (0x00000007UL << 20) /**< Shifted mode 128CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEAT_256CYCLES (0x00000008UL << 20) /**< Shifted mode 256CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_1CYCLE 0x00000000UL /**< Mode 1CYCLE for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_2CYCLES 0x00000001UL /**< Mode 2CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_4CYCLES 0x00000002UL /**< Mode 4CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_8CYCLES 0x00000003UL /**< Mode 8CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_16CYCLES 0x00000004UL /**< Mode 16CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_32CYCLES 0x00000005UL /**< Mode 32CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_64CYCLES 0x00000006UL /**< Mode 64CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_128CYCLES 0x00000007UL /**< Mode 128CYCLES for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEAT_256CYCLES 0x00000008UL /**< Mode 256CYCLES for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSEN (1 << 24) /**< Single Sample PRS Trigger Enable */
-#define _ADC_SINGLECTRL_SINGLEPRSEN_SHIFT 24 /**< Shift value for ADC_SINGLEPRSEN */
-#define _ADC_SINGLECTRL_SINGLEPRSEN_MASK 0x1000000UL /**< Bit mask for ADC_SINGLEPRSEN */
-#define ADC_SINGLECTRL_SINGLEPRSEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_SHIFT 28 /**< Shift value for ADC_SINGLEPRSSEL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_MASK 0x70000000UL /**< Bit mask for ADC_SINGLEPRSSEL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH0 (0x00000000UL << 28) /**< Shifted mode PRSCH0 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH1 (0x00000001UL << 28) /**< Shifted mode PRSCH1 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH2 (0x00000002UL << 28) /**< Shifted mode PRSCH2 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH3 (0x00000003UL << 28) /**< Shifted mode PRSCH3 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH4 (0x00000004UL << 28) /**< Shifted mode PRSCH4 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH5 (0x00000005UL << 28) /**< Shifted mode PRSCH5 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH6 (0x00000006UL << 28) /**< Shifted mode PRSCH6 for ADC_SINGLECTRL */
-#define ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH7 (0x00000007UL << 28) /**< Shifted mode PRSCH7 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for ADC_SINGLECTRL */
-#define _ADC_SINGLECTRL_SINGLEPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for ADC_SINGLECTRL */
-
-/** Bit fields for ADC SCANCTRL */
-#define _ADC_SCANCTRL_RESETVALUE 0x00000000UL /**< Default value for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_MASK 0x71F7FF37UL /**< Mask for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREP (1 << 0) /**< Scan Sequence Repetitive Mode */
-#define _ADC_SCANCTRL_SCANREP_SHIFT 0 /**< Shift value for ADC_SCANREP */
-#define _ADC_SCANCTRL_SCANREP_MASK 0x1UL /**< Bit mask for ADC_SCANREP */
-#define ADC_SCANCTRL_SCANREP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANDIFF (1 << 1) /**< Scan Sequence Differential Mode */
-#define _ADC_SCANCTRL_SCANDIFF_SHIFT 1 /**< Shift value for ADC_SCANDIFF */
-#define _ADC_SCANCTRL_SCANDIFF_MASK 0x2UL /**< Bit mask for ADC_SCANDIFF */
-#define ADC_SCANCTRL_SCANDIFF_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANDIFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANADJ (1 << 2) /**< Scan Sequence Result Adjustment */
-#define _ADC_SCANCTRL_SCANADJ_SHIFT 2 /**< Shift value for ADC_SCANADJ */
-#define _ADC_SCANCTRL_SCANADJ_MASK 0x4UL /**< Bit mask for ADC_SCANADJ */
-#define ADC_SCANCTRL_SCANADJ_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANADJ_RIGHT (0x00000000UL << 2) /**< Shifted mode RIGHT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANADJ_LEFT (0x00000001UL << 2) /**< Shifted mode LEFT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANADJ_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANADJ_RIGHT 0x00000000UL /**< Mode RIGHT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANADJ_LEFT 0x00000001UL /**< Mode LEFT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_SHIFT 4 /**< Shift value for ADC_SCANRES */
-#define _ADC_SCANCTRL_SCANRES_MASK 0x30UL /**< Bit mask for ADC_SCANRES */
-#define ADC_SCANCTRL_SCANRES_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANRES_12BIT (0x00000000UL << 4) /**< Shifted mode 12BIT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANRES_8BIT (0x00000001UL << 4) /**< Shifted mode 8BIT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANRES_6BIT (0x00000002UL << 4) /**< Shifted mode 6BIT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANRES_OS (0x00000003UL << 4) /**< Shifted mode OS for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_12BIT 0x00000000UL /**< Mode 12BIT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_8BIT 0x00000001UL /**< Mode 8BIT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_6BIT 0x00000002UL /**< Mode 6BIT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANRES_OS 0x00000003UL /**< Mode OS for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_SHIFT 8 /**< Shift value for ADC_SCANMASK */
-#define _ADC_SCANCTRL_SCANMASK_MASK 0xFF00UL /**< Bit mask for ADC_SCANMASK */
-#define ADC_SCANCTRL_SCANMASK_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL0 (0x00000000UL << 8) /**< Shifted mode CHANNEL0 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL1 (0x00000001UL << 8) /**< Shifted mode CHANNEL1 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL2 (0x00000002UL << 8) /**< Shifted mode CHANNEL2 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL3 (0x00000003UL << 8) /**< Shifted mode CHANNEL3 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL4 (0x00000004UL << 8) /**< Shifted mode CHANNEL4 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL5 (0x00000005UL << 8) /**< Shifted mode CHANNEL5 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL6 (0x00000006UL << 8) /**< Shifted mode CHANNEL6 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANMASK_CHANNEL7 (0x00000007UL << 8) /**< Shifted mode CHANNEL7 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL0 0x00000000UL /**< Mode CHANNEL0 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL1 0x00000001UL /**< Mode CHANNEL1 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL2 0x00000002UL /**< Mode CHANNEL2 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL3 0x00000003UL /**< Mode CHANNEL3 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL4 0x00000004UL /**< Mode CHANNEL4 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL5 0x00000005UL /**< Mode CHANNEL5 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL6 0x00000006UL /**< Mode CHANNEL6 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANMASK_CHANNEL7 0x00000007UL /**< Mode CHANNEL7 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_SHIFT 16 /**< Shift value for ADC_SCANREF */
-#define _ADC_SCANCTRL_SCANREF_MASK 0x70000UL /**< Bit mask for ADC_SCANREF */
-#define ADC_SCANCTRL_SCANREF_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_1V25 (0x00000000UL << 16) /**< Shifted mode 1V25 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_2V5 (0x00000001UL << 16) /**< Shifted mode 2V5 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_VDD (0x00000002UL << 16) /**< Shifted mode VDD for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_5VDIFF (0x00000003UL << 16) /**< Shifted mode 5VDIFF for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_EXTSINGLE (0x00000004UL << 16) /**< Shifted mode EXTSINGLE for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_EXTDIFF (0x00000005UL << 16) /**< Shifted mode EXTDIFF for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANREF_2XVDDVSS (0x00000006UL << 16) /**< Shifted mode 2XVDDVSS for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_1V25 0x00000000UL /**< Mode 1V25 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_2V5 0x00000001UL /**< Mode 2V5 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_VDD 0x00000002UL /**< Mode VDD for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_5VDIFF 0x00000003UL /**< Mode 5VDIFF for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_EXTSINGLE 0x00000004UL /**< Mode EXTSINGLE for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_EXTDIFF 0x00000005UL /**< Mode EXTDIFF for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANREF_2XVDDVSS 0x00000006UL /**< Mode 2XVDDVSS for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_SHIFT 20 /**< Shift value for ADC_SCANAT */
-#define _ADC_SCANCTRL_SCANAT_MASK 0xF00000UL /**< Bit mask for ADC_SCANAT */
-#define ADC_SCANCTRL_SCANAT_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_1CYCLE (0x00000000UL << 20) /**< Shifted mode 1CYCLE for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_2CYCLES (0x00000001UL << 20) /**< Shifted mode 2CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_4CYCLES (0x00000002UL << 20) /**< Shifted mode 4CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_8CYCLES (0x00000003UL << 20) /**< Shifted mode 8CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_16CYCLES (0x00000004UL << 20) /**< Shifted mode 16CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_32CYCLES (0x00000005UL << 20) /**< Shifted mode 32CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_64CYCLES (0x00000006UL << 20) /**< Shifted mode 64CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_128CYCLES (0x00000007UL << 20) /**< Shifted mode 128CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANAT_256CYCLES (0x00000008UL << 20) /**< Shifted mode 256CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_1CYCLE 0x00000000UL /**< Mode 1CYCLE for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_2CYCLES 0x00000001UL /**< Mode 2CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_4CYCLES 0x00000002UL /**< Mode 4CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_8CYCLES 0x00000003UL /**< Mode 8CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_16CYCLES 0x00000004UL /**< Mode 16CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_32CYCLES 0x00000005UL /**< Mode 32CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_64CYCLES 0x00000006UL /**< Mode 64CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_128CYCLES 0x00000007UL /**< Mode 128CYCLES for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANAT_256CYCLES 0x00000008UL /**< Mode 256CYCLES for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSEN (1 << 24) /**< Scan Sequence PRS Trigger Enable */
-#define _ADC_SCANCTRL_SCANPRSEN_SHIFT 24 /**< Shift value for ADC_SCANPRSEN */
-#define _ADC_SCANCTRL_SCANPRSEN_MASK 0x1000000UL /**< Bit mask for ADC_SCANPRSEN */
-#define ADC_SCANCTRL_SCANPRSEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_SHIFT 28 /**< Shift value for ADC_SCANPRSSEL */
-#define _ADC_SCANCTRL_SCANPRSSEL_MASK 0x70000000UL /**< Bit mask for ADC_SCANPRSSEL */
-#define ADC_SCANCTRL_SCANPRSSEL_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH0 (0x00000000UL << 28) /**< Shifted mode PRSCH0 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH1 (0x00000001UL << 28) /**< Shifted mode PRSCH1 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH2 (0x00000002UL << 28) /**< Shifted mode PRSCH2 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH3 (0x00000003UL << 28) /**< Shifted mode PRSCH3 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH4 (0x00000004UL << 28) /**< Shifted mode PRSCH4 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH5 (0x00000005UL << 28) /**< Shifted mode PRSCH5 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH6 (0x00000006UL << 28) /**< Shifted mode PRSCH6 for ADC_SCANCTRL */
-#define ADC_SCANCTRL_SCANPRSSEL_PRSCH7 (0x00000007UL << 28) /**< Shifted mode PRSCH7 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for ADC_SCANCTRL */
-#define _ADC_SCANCTRL_SCANPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for ADC_SCANCTRL */
-
-/** Bit fields for ADC IEN */
-#define _ADC_IEN_RESETVALUE 0x00000000UL /**< Default value for ADC_IEN */
-#define _ADC_IEN_MASK 0x00000303UL /**< Mask for ADC_IEN */
-#define ADC_IEN_SINGLE (1 << 0) /**< Single Conversion Complete Interrupt Enable */
-#define _ADC_IEN_SINGLE_SHIFT 0 /**< Shift value for ADC_SINGLE */
-#define _ADC_IEN_SINGLE_MASK 0x1UL /**< Bit mask for ADC_SINGLE */
-#define ADC_IEN_SINGLE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_IEN */
-#define _ADC_IEN_SINGLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IEN */
-#define ADC_IEN_SCAN (1 << 1) /**< Scan Conversion Complete Interrupt Enable */
-#define _ADC_IEN_SCAN_SHIFT 1 /**< Shift value for ADC_SCAN */
-#define _ADC_IEN_SCAN_MASK 0x2UL /**< Bit mask for ADC_SCAN */
-#define ADC_IEN_SCAN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_IEN */
-#define _ADC_IEN_SCAN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IEN */
-#define ADC_IEN_SINGLEOF (1 << 8) /**< Single Result Overflow Interrupt Enable */
-#define _ADC_IEN_SINGLEOF_SHIFT 8 /**< Shift value for ADC_SINGLEOF */
-#define _ADC_IEN_SINGLEOF_MASK 0x100UL /**< Bit mask for ADC_SINGLEOF */
-#define ADC_IEN_SINGLEOF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_IEN */
-#define _ADC_IEN_SINGLEOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IEN */
-#define ADC_IEN_SCANOF (1 << 9) /**< Scan Result Overflow Interrupt Enable */
-#define _ADC_IEN_SCANOF_SHIFT 9 /**< Shift value for ADC_SCANOF */
-#define _ADC_IEN_SCANOF_MASK 0x200UL /**< Bit mask for ADC_SCANOF */
-#define ADC_IEN_SCANOF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for ADC_IEN */
-#define _ADC_IEN_SCANOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IEN */
-
-/** Bit fields for ADC IF */
-#define _ADC_IF_RESETVALUE 0x00000000UL /**< Default value for ADC_IF */
-#define _ADC_IF_MASK 0x00000303UL /**< Mask for ADC_IF */
-#define ADC_IF_SINGLE (1 << 0) /**< Single Conversion Complete Interrupt Flag */
-#define _ADC_IF_SINGLE_SHIFT 0 /**< Shift value for ADC_SINGLE */
-#define _ADC_IF_SINGLE_MASK 0x1UL /**< Bit mask for ADC_SINGLE */
-#define ADC_IF_SINGLE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_IF */
-#define _ADC_IF_SINGLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IF */
-#define ADC_IF_SCAN (1 << 1) /**< Scan Conversion Complete Interrupt Flag */
-#define _ADC_IF_SCAN_SHIFT 1 /**< Shift value for ADC_SCAN */
-#define _ADC_IF_SCAN_MASK 0x2UL /**< Bit mask for ADC_SCAN */
-#define ADC_IF_SCAN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_IF */
-#define _ADC_IF_SCAN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IF */
-#define ADC_IF_SINGLEOF (1 << 8) /**< Single Result Overflow Interrupt Flag */
-#define _ADC_IF_SINGLEOF_SHIFT 8 /**< Shift value for ADC_SINGLEOF */
-#define _ADC_IF_SINGLEOF_MASK 0x100UL /**< Bit mask for ADC_SINGLEOF */
-#define ADC_IF_SINGLEOF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_IF */
-#define _ADC_IF_SINGLEOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IF */
-#define ADC_IF_SCANOF (1 << 9) /**< Scan Result Overflow Interrupt Flag */
-#define _ADC_IF_SCANOF_SHIFT 9 /**< Shift value for ADC_SCANOF */
-#define _ADC_IF_SCANOF_MASK 0x200UL /**< Bit mask for ADC_SCANOF */
-#define ADC_IF_SCANOF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for ADC_IF */
-#define _ADC_IF_SCANOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IF */
-
-/** Bit fields for ADC IFS */
-#define _ADC_IFS_RESETVALUE 0x00000000UL /**< Default value for ADC_IFS */
-#define _ADC_IFS_MASK 0x00000303UL /**< Mask for ADC_IFS */
-#define ADC_IFS_SINGLE (1 << 0) /**< Single Conversion Complete Interrupt Flag Set */
-#define _ADC_IFS_SINGLE_SHIFT 0 /**< Shift value for ADC_SINGLE */
-#define _ADC_IFS_SINGLE_MASK 0x1UL /**< Bit mask for ADC_SINGLE */
-#define ADC_IFS_SINGLE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_IFS */
-#define _ADC_IFS_SINGLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFS */
-#define ADC_IFS_SCAN (1 << 1) /**< Scan Conversion Complete Interrupt Flag Set */
-#define _ADC_IFS_SCAN_SHIFT 1 /**< Shift value for ADC_SCAN */
-#define _ADC_IFS_SCAN_MASK 0x2UL /**< Bit mask for ADC_SCAN */
-#define ADC_IFS_SCAN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_IFS */
-#define _ADC_IFS_SCAN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFS */
-#define ADC_IFS_SINGLEOF (1 << 8) /**< Single Result Overflow Interrupt Flag Set */
-#define _ADC_IFS_SINGLEOF_SHIFT 8 /**< Shift value for ADC_SINGLEOF */
-#define _ADC_IFS_SINGLEOF_MASK 0x100UL /**< Bit mask for ADC_SINGLEOF */
-#define ADC_IFS_SINGLEOF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_IFS */
-#define _ADC_IFS_SINGLEOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFS */
-#define ADC_IFS_SCANOF (1 << 9) /**< Scan Result Overflow Interrupt Flag Set */
-#define _ADC_IFS_SCANOF_SHIFT 9 /**< Shift value for ADC_SCANOF */
-#define _ADC_IFS_SCANOF_MASK 0x200UL /**< Bit mask for ADC_SCANOF */
-#define ADC_IFS_SCANOF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for ADC_IFS */
-#define _ADC_IFS_SCANOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFS */
-
-/** Bit fields for ADC IFC */
-#define _ADC_IFC_RESETVALUE 0x00000000UL /**< Default value for ADC_IFC */
-#define _ADC_IFC_MASK 0x00000303UL /**< Mask for ADC_IFC */
-#define ADC_IFC_SINGLE (1 << 0) /**< Single Conversion Complete Interrupt Flag Clear */
-#define _ADC_IFC_SINGLE_SHIFT 0 /**< Shift value for ADC_SINGLE */
-#define _ADC_IFC_SINGLE_MASK 0x1UL /**< Bit mask for ADC_SINGLE */
-#define ADC_IFC_SINGLE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_IFC */
-#define _ADC_IFC_SINGLE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFC */
-#define ADC_IFC_SCAN (1 << 1) /**< Scan Conversion Complete Interrupt Flag Clear */
-#define _ADC_IFC_SCAN_SHIFT 1 /**< Shift value for ADC_SCAN */
-#define _ADC_IFC_SCAN_MASK 0x2UL /**< Bit mask for ADC_SCAN */
-#define ADC_IFC_SCAN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ADC_IFC */
-#define _ADC_IFC_SCAN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFC */
-#define ADC_IFC_SINGLEOF (1 << 8) /**< Single Result Overflow Interrupt Flag Clear */
-#define _ADC_IFC_SINGLEOF_SHIFT 8 /**< Shift value for ADC_SINGLEOF */
-#define _ADC_IFC_SINGLEOF_MASK 0x100UL /**< Bit mask for ADC_SINGLEOF */
-#define ADC_IFC_SINGLEOF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ADC_IFC */
-#define _ADC_IFC_SINGLEOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFC */
-#define ADC_IFC_SCANOF (1 << 9) /**< Scan Result Overflow Interrupt Flag Clear */
-#define _ADC_IFC_SCANOF_SHIFT 9 /**< Shift value for ADC_SCANOF */
-#define _ADC_IFC_SCANOF_MASK 0x200UL /**< Bit mask for ADC_SCANOF */
-#define ADC_IFC_SCANOF_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for ADC_IFC */
-#define _ADC_IFC_SCANOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_IFC */
-
-/** Bit fields for ADC SINGLEDATA */
-#define _ADC_SINGLEDATA_RESETVALUE 0x00000000UL /**< Default value for ADC_SINGLEDATA */
-#define _ADC_SINGLEDATA_MASK 0xFFFFFFFFUL /**< Mask for ADC_SINGLEDATA */
-#define _ADC_SINGLEDATA_SINGLEDATA_SHIFT 0 /**< Shift value for ADC_SINGLEDATA */
-#define _ADC_SINGLEDATA_SINGLEDATA_MASK 0xFFFFFFFFUL /**< Bit mask for ADC_SINGLEDATA */
-#define ADC_SINGLEDATA_SINGLEDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SINGLEDATA */
-#define _ADC_SINGLEDATA_SINGLEDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLEDATA */
-
-/** Bit fields for ADC SCANDATA */
-#define _ADC_SCANDATA_RESETVALUE 0x00000000UL /**< Default value for ADC_SCANDATA */
-#define _ADC_SCANDATA_MASK 0xFFFFFFFFUL /**< Mask for ADC_SCANDATA */
-#define _ADC_SCANDATA_SCANDATA_SHIFT 0 /**< Shift value for ADC_SCANDATA */
-#define _ADC_SCANDATA_SCANDATA_MASK 0xFFFFFFFFUL /**< Bit mask for ADC_SCANDATA */
-#define ADC_SCANDATA_SCANDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SCANDATA */
-#define _ADC_SCANDATA_SCANDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANDATA */
-
-/** Bit fields for ADC SINGLEDATAP */
-#define _ADC_SINGLEDATAP_RESETVALUE 0x00000000UL /**< Default value for ADC_SINGLEDATAP */
-#define _ADC_SINGLEDATAP_MASK 0xFFFFFFFFUL /**< Mask for ADC_SINGLEDATAP */
-#define _ADC_SINGLEDATAP_SINGLEDATA_SHIFT 0 /**< Shift value for ADC_SINGLEDATA */
-#define _ADC_SINGLEDATAP_SINGLEDATA_MASK 0xFFFFFFFFUL /**< Bit mask for ADC_SINGLEDATA */
-#define ADC_SINGLEDATAP_SINGLEDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SINGLEDATAP */
-#define _ADC_SINGLEDATAP_SINGLEDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SINGLEDATAP */
-
-/** Bit fields for ADC SCANDATAP */
-#define _ADC_SCANDATAP_RESETVALUE 0x00000000UL /**< Default value for ADC_SCANDATAP */
-#define _ADC_SCANDATAP_MASK 0xFFFFFFFFUL /**< Mask for ADC_SCANDATAP */
-#define _ADC_SCANDATAP_SCANDATAP_SHIFT 0 /**< Shift value for ADC_SCANDATAP */
-#define _ADC_SCANDATAP_SCANDATAP_MASK 0xFFFFFFFFUL /**< Bit mask for ADC_SCANDATAP */
-#define ADC_SCANDATAP_SCANDATAP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_SCANDATAP */
-#define _ADC_SCANDATAP_SCANDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_SCANDATAP */
-
-/** Bit fields for ADC CAL */
-#define _ADC_CAL_RESETVALUE 0x3F003F00UL /**< Default value for ADC_CAL */
-#define _ADC_CAL_MASK 0x7F7F7F7FUL /**< Mask for ADC_CAL */
-#define _ADC_CAL_SINGLEOFFSET_SHIFT 0 /**< Shift value for ADC_SINGLEOFFSET */
-#define _ADC_CAL_SINGLEOFFSET_MASK 0x7FUL /**< Bit mask for ADC_SINGLEOFFSET */
-#define ADC_CAL_SINGLEOFFSET_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SINGLEOFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SINGLEGAIN_SHIFT 8 /**< Shift value for ADC_SINGLEGAIN */
-#define _ADC_CAL_SINGLEGAIN_MASK 0x7F00UL /**< Bit mask for ADC_SINGLEGAIN */
-#define ADC_CAL_SINGLEGAIN_DEFAULT (0x0000003FUL << 8) /**< Shifted mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SINGLEGAIN_DEFAULT 0x0000003FUL /**< Mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SCANOFFSET_SHIFT 16 /**< Shift value for ADC_SCANOFFSET */
-#define _ADC_CAL_SCANOFFSET_MASK 0x7F0000UL /**< Bit mask for ADC_SCANOFFSET */
-#define ADC_CAL_SCANOFFSET_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SCANOFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SCANGAIN_SHIFT 24 /**< Shift value for ADC_SCANGAIN */
-#define _ADC_CAL_SCANGAIN_MASK 0x7F000000UL /**< Bit mask for ADC_SCANGAIN */
-#define ADC_CAL_SCANGAIN_DEFAULT (0x0000003FUL << 24) /**< Shifted mode DEFAULT for ADC_CAL */
-#define _ADC_CAL_SCANGAIN_DEFAULT 0x0000003FUL /**< Mode DEFAULT for ADC_CAL */
-
-/** Bit fields for ADC ROUTE */
-#define _ADC_ROUTE_RESETVALUE 0x00000000UL /**< Default value for ADC_ROUTE */
-#define _ADC_ROUTE_MASK 0x00000001UL /**< Mask for ADC_ROUTE */
-#define ADC_ROUTE_VCMPEN (1 << 0) /**< VCM Pin Output Enable */
-#define _ADC_ROUTE_VCMPEN_SHIFT 0 /**< Shift value for ADC_VCMPEN */
-#define _ADC_ROUTE_VCMPEN_MASK 0x1UL /**< Bit mask for ADC_VCMPEN */
-#define ADC_ROUTE_VCMPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ADC_ROUTE */
-#define _ADC_ROUTE_VCMPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ADC_ROUTE */
-
-/** Bit fields for ADC BIASPROG */
-#define _ADC_BIASPROG_RESETVALUE 0x00000747UL /**< Default value for ADC_BIASPROG */
-#define _ADC_BIASPROG_MASK 0x00000F4FUL /**< Mask for ADC_BIASPROG */
-#define _ADC_BIASPROG_BIASPROG_SHIFT 0 /**< Shift value for ADC_BIASPROG */
-#define _ADC_BIASPROG_BIASPROG_MASK 0xFUL /**< Bit mask for ADC_BIASPROG */
-#define ADC_BIASPROG_BIASPROG_DEFAULT (0x00000007UL << 0) /**< Shifted mode DEFAULT for ADC_BIASPROG */
-#define _ADC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for ADC_BIASPROG */
-#define ADC_BIASPROG_HALFBIAS (1 << 6) /**< Half Bias Current */
-#define _ADC_BIASPROG_HALFBIAS_SHIFT 6 /**< Shift value for ADC_HALFBIAS */
-#define _ADC_BIASPROG_HALFBIAS_MASK 0x40UL /**< Bit mask for ADC_HALFBIAS */
-#define ADC_BIASPROG_HALFBIAS_DEFAULT (0x00000001UL << 6) /**< Shifted mode DEFAULT for ADC_BIASPROG */
-#define _ADC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for ADC_BIASPROG */
-#define _ADC_BIASPROG_COMPBIAS_SHIFT 8 /**< Shift value for ADC_COMPBIAS */
-#define _ADC_BIASPROG_COMPBIAS_MASK 0xF00UL /**< Bit mask for ADC_COMPBIAS */
-#define ADC_BIASPROG_COMPBIAS_DEFAULT (0x00000007UL << 8) /**< Shifted mode DEFAULT for ADC_BIASPROG */
-#define _ADC_BIASPROG_COMPBIAS_DEFAULT 0x00000007UL /**< Mode DEFAULT for ADC_BIASPROG */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_DAC
- * @{
- */
-
-/** Bit fields for DAC CTRL */
-#define _DAC_CTRL_RESETVALUE 0x00000010UL /**< Default value for DAC_CTRL */
-#define _DAC_CTRL_MASK 0x0037D3FFUL /**< Mask for DAC_CTRL */
-#define DAC_CTRL_DIFF (1 << 0) /**< Differential Mode */
-#define _DAC_CTRL_DIFF_SHIFT 0 /**< Shift value for DAC_DIFF */
-#define _DAC_CTRL_DIFF_MASK 0x1UL /**< Bit mask for DAC_DIFF */
-#define DAC_CTRL_DIFF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_DIFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_SINEMODE (1 << 1) /**< Sine Mode */
-#define _DAC_CTRL_SINEMODE_SHIFT 1 /**< Shift value for DAC_SINEMODE */
-#define _DAC_CTRL_SINEMODE_MASK 0x2UL /**< Bit mask for DAC_SINEMODE */
-#define DAC_CTRL_SINEMODE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_SINEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_CONVMODE_SHIFT 2 /**< Shift value for DAC_CONVMODE */
-#define _DAC_CTRL_CONVMODE_MASK 0xCUL /**< Bit mask for DAC_CONVMODE */
-#define DAC_CTRL_CONVMODE_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_CONVMODE_CONTINUOUS (0x00000000UL << 2) /**< Shifted mode CONTINUOUS for DAC_CTRL */
-#define DAC_CTRL_CONVMODE_SAMPLEHOLD (0x00000001UL << 2) /**< Shifted mode SAMPLEHOLD for DAC_CTRL */
-#define DAC_CTRL_CONVMODE_SAMPLEOFF (0x00000002UL << 2) /**< Shifted mode SAMPLEOFF for DAC_CTRL */
-#define _DAC_CTRL_CONVMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_CONVMODE_CONTINUOUS 0x00000000UL /**< Mode CONTINUOUS for DAC_CTRL */
-#define _DAC_CTRL_CONVMODE_SAMPLEHOLD 0x00000001UL /**< Mode SAMPLEHOLD for DAC_CTRL */
-#define _DAC_CTRL_CONVMODE_SAMPLEOFF 0x00000002UL /**< Mode SAMPLEOFF for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_SHIFT 4 /**< Shift value for DAC_OUTMODE */
-#define _DAC_CTRL_OUTMODE_MASK 0x30UL /**< Bit mask for DAC_OUTMODE */
-#define DAC_CTRL_OUTMODE_DISABLE (0x00000000UL << 4) /**< Shifted mode DISABLE for DAC_CTRL */
-#define DAC_CTRL_OUTMODE_DEFAULT (0x00000001UL << 4) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_OUTMODE_PIN (0x00000001UL << 4) /**< Shifted mode PIN for DAC_CTRL */
-#define DAC_CTRL_OUTMODE_ADC (0x00000002UL << 4) /**< Shifted mode ADC for DAC_CTRL */
-#define DAC_CTRL_OUTMODE_PINADC (0x00000003UL << 4) /**< Shifted mode PINADC for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_PIN 0x00000001UL /**< Mode PIN for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_ADC 0x00000002UL /**< Mode ADC for DAC_CTRL */
-#define _DAC_CTRL_OUTMODE_PINADC 0x00000003UL /**< Mode PINADC for DAC_CTRL */
-#define DAC_CTRL_OUTENPRS (1 << 6) /**< PRS Controlled Output Enable */
-#define _DAC_CTRL_OUTENPRS_SHIFT 6 /**< Shift value for DAC_OUTENPRS */
-#define _DAC_CTRL_OUTENPRS_MASK 0x40UL /**< Bit mask for DAC_OUTENPRS */
-#define DAC_CTRL_OUTENPRS_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_CH0PRESCRST (1 << 7) /**< Channel 0 Start Reset Prescaler */
-#define _DAC_CTRL_CH0PRESCRST_SHIFT 7 /**< Shift value for DAC_CH0PRESCRST */
-#define _DAC_CTRL_CH0PRESCRST_MASK 0x80UL /**< Bit mask for DAC_CH0PRESCRST */
-#define DAC_CTRL_CH0PRESCRST_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_REFSEL_SHIFT 8 /**< Shift value for DAC_REFSEL */
-#define _DAC_CTRL_REFSEL_MASK 0x300UL /**< Bit mask for DAC_REFSEL */
-#define DAC_CTRL_REFSEL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_REFSEL_1V25 (0x00000000UL << 8) /**< Shifted mode 1V25 for DAC_CTRL */
-#define DAC_CTRL_REFSEL_2V5 (0x00000001UL << 8) /**< Shifted mode 2V5 for DAC_CTRL */
-#define DAC_CTRL_REFSEL_VDD (0x00000002UL << 8) /**< Shifted mode VDD for DAC_CTRL */
-#define _DAC_CTRL_REFSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_REFSEL_1V25 0x00000000UL /**< Mode 1V25 for DAC_CTRL */
-#define _DAC_CTRL_REFSEL_2V5 0x00000001UL /**< Mode 2V5 for DAC_CTRL */
-#define _DAC_CTRL_REFSEL_VDD 0x00000002UL /**< Mode VDD for DAC_CTRL */
-#define DAC_CTRL_LPFEN (1 << 12) /**< Low Pass Filter Enable */
-#define _DAC_CTRL_LPFEN_SHIFT 12 /**< Shift value for DAC_LPFEN */
-#define _DAC_CTRL_LPFEN_MASK 0x1000UL /**< Bit mask for DAC_LPFEN */
-#define DAC_CTRL_LPFEN_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_LPFEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_SHIFT 14 /**< Shift value for DAC_LPFFREQ */
-#define _DAC_CTRL_LPFFREQ_MASK 0xC000UL /**< Bit mask for DAC_LPFFREQ */
-#define DAC_CTRL_LPFFREQ_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_LPFFREQ_FREQ0 (0x00000000UL << 14) /**< Shifted mode FREQ0 for DAC_CTRL */
-#define DAC_CTRL_LPFFREQ_FREQ1 (0x00000001UL << 14) /**< Shifted mode FREQ1 for DAC_CTRL */
-#define DAC_CTRL_LPFFREQ_FREQ2 (0x00000002UL << 14) /**< Shifted mode FREQ2 for DAC_CTRL */
-#define DAC_CTRL_LPFFREQ_FREQ3 (0x00000003UL << 14) /**< Shifted mode FREQ3 for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_FREQ0 0x00000000UL /**< Mode FREQ0 for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_FREQ1 0x00000001UL /**< Mode FREQ1 for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_FREQ2 0x00000002UL /**< Mode FREQ2 for DAC_CTRL */
-#define _DAC_CTRL_LPFFREQ_FREQ3 0x00000003UL /**< Mode FREQ3 for DAC_CTRL */
-#define _DAC_CTRL_PRESC_SHIFT 16 /**< Shift value for DAC_PRESC */
-#define _DAC_CTRL_PRESC_MASK 0x70000UL /**< Bit mask for DAC_PRESC */
-#define DAC_CTRL_PRESC_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_PRESC_NODIVISION (0x00000000UL << 16) /**< Shifted mode NODIVISION for DAC_CTRL */
-#define _DAC_CTRL_PRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_PRESC_NODIVISION 0x00000000UL /**< Mode NODIVISION for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_SHIFT 20 /**< Shift value for DAC_REFRSEL */
-#define _DAC_CTRL_REFRSEL_MASK 0x300000UL /**< Bit mask for DAC_REFRSEL */
-#define DAC_CTRL_REFRSEL_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for DAC_CTRL */
-#define DAC_CTRL_REFRSEL_8CYCLES (0x00000000UL << 20) /**< Shifted mode 8CYCLES for DAC_CTRL */
-#define DAC_CTRL_REFRSEL_16CYCLES (0x00000001UL << 20) /**< Shifted mode 16CYCLES for DAC_CTRL */
-#define DAC_CTRL_REFRSEL_32CYCLES (0x00000002UL << 20) /**< Shifted mode 32CYCLES for DAC_CTRL */
-#define DAC_CTRL_REFRSEL_64CYCLES (0x00000003UL << 20) /**< Shifted mode 64CYCLES for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_8CYCLES 0x00000000UL /**< Mode 8CYCLES for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_16CYCLES 0x00000001UL /**< Mode 16CYCLES for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_32CYCLES 0x00000002UL /**< Mode 32CYCLES for DAC_CTRL */
-#define _DAC_CTRL_REFRSEL_64CYCLES 0x00000003UL /**< Mode 64CYCLES for DAC_CTRL */
-
-/** Bit fields for DAC STATUS */
-#define _DAC_STATUS_RESETVALUE 0x00000000UL /**< Default value for DAC_STATUS */
-#define _DAC_STATUS_MASK 0x00000003UL /**< Mask for DAC_STATUS */
-#define DAC_STATUS_CH0DV (1 << 0) /**< Channel 0 Data Valid */
-#define _DAC_STATUS_CH0DV_SHIFT 0 /**< Shift value for DAC_CH0DV */
-#define _DAC_STATUS_CH0DV_MASK 0x1UL /**< Bit mask for DAC_CH0DV */
-#define DAC_STATUS_CH0DV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_STATUS */
-#define _DAC_STATUS_CH0DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_STATUS */
-#define DAC_STATUS_CH1DV (1 << 1) /**< Channel 1 Data Valid */
-#define _DAC_STATUS_CH1DV_SHIFT 1 /**< Shift value for DAC_CH1DV */
-#define _DAC_STATUS_CH1DV_MASK 0x2UL /**< Bit mask for DAC_CH1DV */
-#define DAC_STATUS_CH1DV_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_STATUS */
-#define _DAC_STATUS_CH1DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_STATUS */
-
-/** Bit fields for DAC CH0CTRL */
-#define _DAC_CH0CTRL_RESETVALUE 0x00000000UL /**< Default value for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_MASK 0x00000077UL /**< Mask for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0EN (1 << 0) /**< Channel 0 Enable */
-#define _DAC_CH0CTRL_CH0EN_SHIFT 0 /**< Shift value for DAC_CH0EN */
-#define _DAC_CH0CTRL_CH0EN_MASK 0x1UL /**< Bit mask for DAC_CH0EN */
-#define DAC_CH0CTRL_CH0EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0REFREN (1 << 1) /**< Channel 0 Automatic Refresh Enable */
-#define _DAC_CH0CTRL_CH0REFREN_SHIFT 1 /**< Shift value for DAC_CH0REFREN */
-#define _DAC_CH0CTRL_CH0REFREN_MASK 0x2UL /**< Bit mask for DAC_CH0REFREN */
-#define DAC_CH0CTRL_CH0REFREN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0REFREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSEN (1 << 2) /**< Channel 0 PRS Trigger Enable */
-#define _DAC_CH0CTRL_CH0PRSEN_SHIFT 2 /**< Shift value for DAC_CH0PRSEN */
-#define _DAC_CH0CTRL_CH0PRSEN_MASK 0x4UL /**< Bit mask for DAC_CH0PRSEN */
-#define DAC_CH0CTRL_CH0PRSEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_SHIFT 4 /**< Shift value for DAC_CH0PRSSEL */
-#define _DAC_CH0CTRL_CH0PRSSEL_MASK 0x70UL /**< Bit mask for DAC_CH0PRSSEL */
-#define DAC_CH0CTRL_CH0PRSSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH0 (0x00000000UL << 4) /**< Shifted mode PRSCH0 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH1 (0x00000001UL << 4) /**< Shifted mode PRSCH1 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH2 (0x00000002UL << 4) /**< Shifted mode PRSCH2 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH3 (0x00000003UL << 4) /**< Shifted mode PRSCH3 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH4 (0x00000004UL << 4) /**< Shifted mode PRSCH4 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH5 (0x00000005UL << 4) /**< Shifted mode PRSCH5 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH6 (0x00000006UL << 4) /**< Shifted mode PRSCH6 for DAC_CH0CTRL */
-#define DAC_CH0CTRL_CH0PRSSEL_PRSCH7 (0x00000007UL << 4) /**< Shifted mode PRSCH7 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for DAC_CH0CTRL */
-#define _DAC_CH0CTRL_CH0PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for DAC_CH0CTRL */
-
-/** Bit fields for DAC CH1CTRL */
-#define _DAC_CH1CTRL_RESETVALUE 0x00000000UL /**< Default value for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_MASK 0x00000077UL /**< Mask for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1EN (1 << 0) /**< Channel 1 Enable */
-#define _DAC_CH1CTRL_CH1EN_SHIFT 0 /**< Shift value for DAC_CH1EN */
-#define _DAC_CH1CTRL_CH1EN_MASK 0x1UL /**< Bit mask for DAC_CH1EN */
-#define DAC_CH1CTRL_CH1EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1REFREN (1 << 1) /**< Channel 1 Automatic Refresh Enable */
-#define _DAC_CH1CTRL_CH1REFREN_SHIFT 1 /**< Shift value for DAC_CH1REFREN */
-#define _DAC_CH1CTRL_CH1REFREN_MASK 0x2UL /**< Bit mask for DAC_CH1REFREN */
-#define DAC_CH1CTRL_CH1REFREN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1REFREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSEN (1 << 2) /**< Channel 1 PRS Trigger Enable */
-#define _DAC_CH1CTRL_CH1PRSEN_SHIFT 2 /**< Shift value for DAC_CH1PRSEN */
-#define _DAC_CH1CTRL_CH1PRSEN_MASK 0x4UL /**< Bit mask for DAC_CH1PRSEN */
-#define DAC_CH1CTRL_CH1PRSEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_SHIFT 4 /**< Shift value for DAC_CH1PRSSEL */
-#define _DAC_CH1CTRL_CH1PRSSEL_MASK 0x70UL /**< Bit mask for DAC_CH1PRSSEL */
-#define DAC_CH1CTRL_CH1PRSSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH0 (0x00000000UL << 4) /**< Shifted mode PRSCH0 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH1 (0x00000001UL << 4) /**< Shifted mode PRSCH1 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH2 (0x00000002UL << 4) /**< Shifted mode PRSCH2 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH3 (0x00000003UL << 4) /**< Shifted mode PRSCH3 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH4 (0x00000004UL << 4) /**< Shifted mode PRSCH4 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH5 (0x00000005UL << 4) /**< Shifted mode PRSCH5 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH6 (0x00000006UL << 4) /**< Shifted mode PRSCH6 for DAC_CH1CTRL */
-#define DAC_CH1CTRL_CH1PRSSEL_PRSCH7 (0x00000007UL << 4) /**< Shifted mode PRSCH7 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for DAC_CH1CTRL */
-#define _DAC_CH1CTRL_CH1PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for DAC_CH1CTRL */
-
-/** Bit fields for DAC IEN */
-#define _DAC_IEN_RESETVALUE 0x00000000UL /**< Default value for DAC_IEN */
-#define _DAC_IEN_MASK 0x00000033UL /**< Mask for DAC_IEN */
-#define DAC_IEN_CH0 (1 << 0) /**< Channel 0 Conversion Complete Interrupt Enable */
-#define _DAC_IEN_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
-#define _DAC_IEN_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
-#define DAC_IEN_CH0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_IEN */
-#define _DAC_IEN_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
-#define DAC_IEN_CH1 (1 << 1) /**< Channel 1 Conversion Complete Interrupt Enable */
-#define _DAC_IEN_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
-#define _DAC_IEN_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
-#define DAC_IEN_CH1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_IEN */
-#define _DAC_IEN_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
-#define DAC_IEN_CH0UF (1 << 4) /**< Channel 0 Conversion Data Underflow Interrupt Enable */
-#define _DAC_IEN_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
-#define _DAC_IEN_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
-#define DAC_IEN_CH0UF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_IEN */
-#define _DAC_IEN_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
-#define DAC_IEN_CH1UF (1 << 5) /**< Channel 1 Conversion Data Underflow Interrupt Enable */
-#define _DAC_IEN_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
-#define _DAC_IEN_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
-#define DAC_IEN_CH1UF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for DAC_IEN */
-#define _DAC_IEN_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
-
-/** Bit fields for DAC IF */
-#define _DAC_IF_RESETVALUE 0x00000000UL /**< Default value for DAC_IF */
-#define _DAC_IF_MASK 0x00000033UL /**< Mask for DAC_IF */
-#define DAC_IF_CH0 (1 << 0) /**< Channel 0 Conversion Complete Interrupt Flag */
-#define _DAC_IF_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
-#define _DAC_IF_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
-#define DAC_IF_CH0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_IF */
-#define _DAC_IF_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
-#define DAC_IF_CH1 (1 << 1) /**< Channel 1 Conversion Complete Interrupt Flag */
-#define _DAC_IF_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
-#define _DAC_IF_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
-#define DAC_IF_CH1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_IF */
-#define _DAC_IF_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
-#define DAC_IF_CH0UF (1 << 4) /**< Channel 0 Data Underflow Interrupt Flag */
-#define _DAC_IF_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
-#define _DAC_IF_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
-#define DAC_IF_CH0UF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_IF */
-#define _DAC_IF_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
-#define DAC_IF_CH1UF (1 << 5) /**< Channel 1 Data Underflow Interrupt Flag */
-#define _DAC_IF_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
-#define _DAC_IF_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
-#define DAC_IF_CH1UF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for DAC_IF */
-#define _DAC_IF_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
-
-/** Bit fields for DAC IFS */
-#define _DAC_IFS_RESETVALUE 0x00000000UL /**< Default value for DAC_IFS */
-#define _DAC_IFS_MASK 0x00000033UL /**< Mask for DAC_IFS */
-#define DAC_IFS_CH0 (1 << 0) /**< Channel 0 Conversion Complete Interrupt Flag Set */
-#define _DAC_IFS_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
-#define _DAC_IFS_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
-#define DAC_IFS_CH0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_IFS */
-#define _DAC_IFS_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
-#define DAC_IFS_CH1 (1 << 1) /**< Channel 1 Conversion Complete Interrupt Flag Set */
-#define _DAC_IFS_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
-#define _DAC_IFS_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
-#define DAC_IFS_CH1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_IFS */
-#define _DAC_IFS_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
-#define DAC_IFS_CH0UF (1 << 4) /**< Channel 0 Data Underflow Interrupt Flag Set */
-#define _DAC_IFS_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
-#define _DAC_IFS_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
-#define DAC_IFS_CH0UF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_IFS */
-#define _DAC_IFS_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
-#define DAC_IFS_CH1UF (1 << 5) /**< Channel 1 Data Underflow Interrupt Flag Set */
-#define _DAC_IFS_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
-#define _DAC_IFS_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
-#define DAC_IFS_CH1UF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for DAC_IFS */
-#define _DAC_IFS_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
-
-/** Bit fields for DAC IFC */
-#define _DAC_IFC_RESETVALUE 0x00000000UL /**< Default value for DAC_IFC */
-#define _DAC_IFC_MASK 0x00000033UL /**< Mask for DAC_IFC */
-#define DAC_IFC_CH0 (1 << 0) /**< Channel 0 Conversion Complete Interrupt Flag Clear */
-#define _DAC_IFC_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
-#define _DAC_IFC_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
-#define DAC_IFC_CH0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_IFC */
-#define _DAC_IFC_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
-#define DAC_IFC_CH1 (1 << 1) /**< Channel 1 Conversion Complete Interrupt Flag Clear */
-#define _DAC_IFC_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
-#define _DAC_IFC_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
-#define DAC_IFC_CH1_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for DAC_IFC */
-#define _DAC_IFC_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
-#define DAC_IFC_CH0UF (1 << 4) /**< Channel 0 Data Underflow Interrupt Flag Clear */
-#define _DAC_IFC_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
-#define _DAC_IFC_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
-#define DAC_IFC_CH0UF_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DAC_IFC */
-#define _DAC_IFC_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
-#define DAC_IFC_CH1UF (1 << 5) /**< Channel 1 Data Underflow Interrupt Flag Clear */
-#define _DAC_IFC_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
-#define _DAC_IFC_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
-#define DAC_IFC_CH1UF_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for DAC_IFC */
-#define _DAC_IFC_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
-
-/** Bit fields for DAC CH0DATA */
-#define _DAC_CH0DATA_RESETVALUE 0x00000000UL /**< Default value for DAC_CH0DATA */
-#define _DAC_CH0DATA_MASK 0x00000FFFUL /**< Mask for DAC_CH0DATA */
-#define _DAC_CH0DATA_CH0DATA_SHIFT 0 /**< Shift value for DAC_CH0DATA */
-#define _DAC_CH0DATA_CH0DATA_MASK 0xFFFUL /**< Bit mask for DAC_CH0DATA */
-#define DAC_CH0DATA_CH0DATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CH0DATA */
-#define _DAC_CH0DATA_CH0DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0DATA */
-
-/** Bit fields for DAC CH1DATA */
-#define _DAC_CH1DATA_RESETVALUE 0x00000000UL /**< Default value for DAC_CH1DATA */
-#define _DAC_CH1DATA_MASK 0x00000FFFUL /**< Mask for DAC_CH1DATA */
-#define _DAC_CH1DATA_CH1DATA_SHIFT 0 /**< Shift value for DAC_CH1DATA */
-#define _DAC_CH1DATA_CH1DATA_MASK 0xFFFUL /**< Bit mask for DAC_CH1DATA */
-#define DAC_CH1DATA_CH1DATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CH1DATA */
-#define _DAC_CH1DATA_CH1DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1DATA */
-
-/** Bit fields for DAC COMBDATA */
-#define _DAC_COMBDATA_RESETVALUE 0x00000000UL /**< Default value for DAC_COMBDATA */
-#define _DAC_COMBDATA_MASK 0x0FFF0FFFUL /**< Mask for DAC_COMBDATA */
-#define _DAC_COMBDATA_CH0CDATA_SHIFT 0 /**< Shift value for DAC_CH0CDATA */
-#define _DAC_COMBDATA_CH0CDATA_MASK 0xFFFUL /**< Bit mask for DAC_CH0CDATA */
-#define DAC_COMBDATA_CH0CDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_COMBDATA */
-#define _DAC_COMBDATA_CH0CDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_COMBDATA */
-#define _DAC_COMBDATA_CH1CDATA_SHIFT 16 /**< Shift value for DAC_CH1CDATA */
-#define _DAC_COMBDATA_CH1CDATA_MASK 0xFFF0000UL /**< Bit mask for DAC_CH1CDATA */
-#define DAC_COMBDATA_CH1CDATA_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for DAC_COMBDATA */
-#define _DAC_COMBDATA_CH1CDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_COMBDATA */
-
-/** Bit fields for DAC CAL */
-#define _DAC_CAL_RESETVALUE 0x00400000UL /**< Default value for DAC_CAL */
-#define _DAC_CAL_MASK 0x007F7F7FUL /**< Mask for DAC_CAL */
-#define _DAC_CAL_CH0OFFSET_SHIFT 0 /**< Shift value for DAC_CH0OFFSET */
-#define _DAC_CAL_CH0OFFSET_MASK 0x7FUL /**< Bit mask for DAC_CH0OFFSET */
-#define DAC_CAL_CH0OFFSET_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DAC_CAL */
-#define _DAC_CAL_CH0OFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CAL */
-#define _DAC_CAL_CH1OFFSET_SHIFT 8 /**< Shift value for DAC_CH1OFFSET */
-#define _DAC_CAL_CH1OFFSET_MASK 0x7F00UL /**< Bit mask for DAC_CH1OFFSET */
-#define DAC_CAL_CH1OFFSET_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for DAC_CAL */
-#define _DAC_CAL_CH1OFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CAL */
-#define _DAC_CAL_GAIN_SHIFT 16 /**< Shift value for DAC_GAIN */
-#define _DAC_CAL_GAIN_MASK 0x7F0000UL /**< Bit mask for DAC_GAIN */
-#define DAC_CAL_GAIN_DEFAULT (0x00000040UL << 16) /**< Shifted mode DEFAULT for DAC_CAL */
-#define _DAC_CAL_GAIN_DEFAULT 0x00000040UL /**< Mode DEFAULT for DAC_CAL */
-
-/** Bit fields for DAC BIASPROG */
-#define _DAC_BIASPROG_RESETVALUE 0x00000047UL /**< Default value for DAC_BIASPROG */
-#define _DAC_BIASPROG_MASK 0x0000004FUL /**< Mask for DAC_BIASPROG */
-#define _DAC_BIASPROG_BIASPROG_SHIFT 0 /**< Shift value for DAC_BIASPROG */
-#define _DAC_BIASPROG_BIASPROG_MASK 0xFUL /**< Bit mask for DAC_BIASPROG */
-#define DAC_BIASPROG_BIASPROG_DEFAULT (0x00000007UL << 0) /**< Shifted mode DEFAULT for DAC_BIASPROG */
-#define _DAC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for DAC_BIASPROG */
-#define DAC_BIASPROG_HALFBIAS (1 << 6) /**< Half Bias Current */
-#define _DAC_BIASPROG_HALFBIAS_SHIFT 6 /**< Shift value for DAC_HALFBIAS */
-#define _DAC_BIASPROG_HALFBIAS_MASK 0x40UL /**< Bit mask for DAC_HALFBIAS */
-#define DAC_BIASPROG_HALFBIAS_DEFAULT (0x00000001UL << 6) /**< Shifted mode DEFAULT for DAC_BIASPROG */
-#define _DAC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_BIASPROG */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_ACMP
- * @{
- */
-
-/** Bit fields for ACMP CTRL */
-#define _ACMP_CTRL_RESETVALUE 0x47000000UL /**< Default value for ACMP_CTRL */
-#define _ACMP_CTRL_MASK 0xCF03077FUL /**< Mask for ACMP_CTRL */
-#define ACMP_CTRL_EN (1 << 0) /**< Analog Comparator Enable */
-#define _ACMP_CTRL_EN_SHIFT 0 /**< Shift value for ACMP_EN */
-#define _ACMP_CTRL_EN_MASK 0x1UL /**< Bit mask for ACMP_EN */
-#define ACMP_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_MUXEN (1 << 1) /**< Input Mux Enable */
-#define _ACMP_CTRL_MUXEN_SHIFT 1 /**< Shift value for ACMP_MUXEN */
-#define _ACMP_CTRL_MUXEN_MASK 0x2UL /**< Bit mask for ACMP_MUXEN */
-#define ACMP_CTRL_MUXEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_MUXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_INACTVAL (1 << 2) /**< Inactive Value */
-#define _ACMP_CTRL_INACTVAL_SHIFT 2 /**< Shift value for ACMP_INACTVAL */
-#define _ACMP_CTRL_INACTVAL_MASK 0x4UL /**< Bit mask for ACMP_INACTVAL */
-#define ACMP_CTRL_INACTVAL_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_INACTVAL_LOW (0x00000000UL << 2) /**< Shifted mode LOW for ACMP_CTRL */
-#define ACMP_CTRL_INACTVAL_HIGH (0x00000001UL << 2) /**< Shifted mode HIGH for ACMP_CTRL */
-#define _ACMP_CTRL_INACTVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_INACTVAL_LOW 0x00000000UL /**< Mode LOW for ACMP_CTRL */
-#define _ACMP_CTRL_INACTVAL_HIGH 0x00000001UL /**< Mode HIGH for ACMP_CTRL */
-#define ACMP_CTRL_GPIOINV (1 << 3) /**< Comparator GPIO Output Invert */
-#define _ACMP_CTRL_GPIOINV_SHIFT 3 /**< Shift value for ACMP_GPIOINV */
-#define _ACMP_CTRL_GPIOINV_MASK 0x8UL /**< Bit mask for ACMP_GPIOINV */
-#define ACMP_CTRL_GPIOINV_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_GPIOINV_NOTINV (0x00000000UL << 3) /**< Shifted mode NOTINV for ACMP_CTRL */
-#define ACMP_CTRL_GPIOINV_INV (0x00000001UL << 3) /**< Shifted mode INV for ACMP_CTRL */
-#define _ACMP_CTRL_GPIOINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_GPIOINV_NOTINV 0x00000000UL /**< Mode NOTINV for ACMP_CTRL */
-#define _ACMP_CTRL_GPIOINV_INV 0x00000001UL /**< Mode INV for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_SHIFT 4 /**< Shift value for ACMP_HYSTSEL */
-#define _ACMP_CTRL_HYSTSEL_MASK 0x70UL /**< Bit mask for ACMP_HYSTSEL */
-#define ACMP_CTRL_HYSTSEL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST0 (0x00000000UL << 4) /**< Shifted mode HYST0 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST1 (0x00000001UL << 4) /**< Shifted mode HYST1 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST2 (0x00000002UL << 4) /**< Shifted mode HYST2 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST3 (0x00000003UL << 4) /**< Shifted mode HYST3 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST4 (0x00000004UL << 4) /**< Shifted mode HYST4 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST5 (0x00000005UL << 4) /**< Shifted mode HYST5 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST6 (0x00000006UL << 4) /**< Shifted mode HYST6 for ACMP_CTRL */
-#define ACMP_CTRL_HYSTSEL_HYST7 (0x00000007UL << 4) /**< Shifted mode HYST7 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST0 0x00000000UL /**< Mode HYST0 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST1 0x00000001UL /**< Mode HYST1 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST2 0x00000002UL /**< Mode HYST2 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST3 0x00000003UL /**< Mode HYST3 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST4 0x00000004UL /**< Mode HYST4 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST5 0x00000005UL /**< Mode HYST5 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST6 0x00000006UL /**< Mode HYST6 for ACMP_CTRL */
-#define _ACMP_CTRL_HYSTSEL_HYST7 0x00000007UL /**< Mode HYST7 for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_SHIFT 8 /**< Shift value for ACMP_WARMTIME */
-#define _ACMP_CTRL_WARMTIME_MASK 0x700UL /**< Bit mask for ACMP_WARMTIME */
-#define ACMP_CTRL_WARMTIME_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_4CYCLES (0x00000000UL << 8) /**< Shifted mode 4CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_8CYCLES (0x00000001UL << 8) /**< Shifted mode 8CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_16CYCLES (0x00000002UL << 8) /**< Shifted mode 16CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_32CYCLES (0x00000003UL << 8) /**< Shifted mode 32CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_64CYCLES (0x00000004UL << 8) /**< Shifted mode 64CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_128CYCLES (0x00000005UL << 8) /**< Shifted mode 128CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_256CYCLES (0x00000006UL << 8) /**< Shifted mode 256CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_WARMTIME_512CYCLES (0x00000007UL << 8) /**< Shifted mode 512CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_4CYCLES 0x00000000UL /**< Mode 4CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_8CYCLES 0x00000001UL /**< Mode 8CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_16CYCLES 0x00000002UL /**< Mode 16CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_32CYCLES 0x00000003UL /**< Mode 32CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_64CYCLES 0x00000004UL /**< Mode 64CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_128CYCLES 0x00000005UL /**< Mode 128CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_256CYCLES 0x00000006UL /**< Mode 256CYCLES for ACMP_CTRL */
-#define _ACMP_CTRL_WARMTIME_512CYCLES 0x00000007UL /**< Mode 512CYCLES for ACMP_CTRL */
-#define ACMP_CTRL_IRISE (1 << 16) /**< Rising Edge Interrupt Sense */
-#define _ACMP_CTRL_IRISE_SHIFT 16 /**< Shift value for ACMP_IRISE */
-#define _ACMP_CTRL_IRISE_MASK 0x10000UL /**< Bit mask for ACMP_IRISE */
-#define ACMP_CTRL_IRISE_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_IRISE_DISABLED (0x00000000UL << 16) /**< Shifted mode DISABLED for ACMP_CTRL */
-#define ACMP_CTRL_IRISE_ENABLED (0x00000001UL << 16) /**< Shifted mode ENABLED for ACMP_CTRL */
-#define _ACMP_CTRL_IRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_IRISE_DISABLED 0x00000000UL /**< Mode DISABLED for ACMP_CTRL */
-#define _ACMP_CTRL_IRISE_ENABLED 0x00000001UL /**< Mode ENABLED for ACMP_CTRL */
-#define ACMP_CTRL_IFALL (1 << 17) /**< Falling Edge Interrupt Sense */
-#define _ACMP_CTRL_IFALL_SHIFT 17 /**< Shift value for ACMP_IFALL */
-#define _ACMP_CTRL_IFALL_MASK 0x20000UL /**< Bit mask for ACMP_IFALL */
-#define ACMP_CTRL_IFALL_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_IFALL_DISABLED (0x00000000UL << 17) /**< Shifted mode DISABLED for ACMP_CTRL */
-#define ACMP_CTRL_IFALL_ENABLED (0x00000001UL << 17) /**< Shifted mode ENABLED for ACMP_CTRL */
-#define _ACMP_CTRL_IFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_IFALL_DISABLED 0x00000000UL /**< Mode DISABLED for ACMP_CTRL */
-#define _ACMP_CTRL_IFALL_ENABLED 0x00000001UL /**< Mode ENABLED for ACMP_CTRL */
-#define _ACMP_CTRL_BIASPROG_SHIFT 24 /**< Shift value for ACMP_BIASPROG */
-#define _ACMP_CTRL_BIASPROG_MASK 0xF000000UL /**< Bit mask for ACMP_BIASPROG */
-#define ACMP_CTRL_BIASPROG_DEFAULT (0x00000007UL << 24) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_HALFBIAS (1 << 30) /**< Half Bias Current */
-#define _ACMP_CTRL_HALFBIAS_SHIFT 30 /**< Shift value for ACMP_HALFBIAS */
-#define _ACMP_CTRL_HALFBIAS_MASK 0x40000000UL /**< Bit mask for ACMP_HALFBIAS */
-#define ACMP_CTRL_HALFBIAS_DEFAULT (0x00000001UL << 30) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for ACMP_CTRL */
-#define ACMP_CTRL_FULLBIAS (1 << 31) /**< Full Bias Current */
-#define _ACMP_CTRL_FULLBIAS_SHIFT 31 /**< Shift value for ACMP_FULLBIAS */
-#define _ACMP_CTRL_FULLBIAS_MASK 0x80000000UL /**< Bit mask for ACMP_FULLBIAS */
-#define ACMP_CTRL_FULLBIAS_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for ACMP_CTRL */
-#define _ACMP_CTRL_FULLBIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_CTRL */
-
-/** Bit fields for ACMP INPUTSEL */
-#define _ACMP_INPUTSEL_RESETVALUE 0x00010080UL /**< Default value for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_MASK 0x31013FF7UL /**< Mask for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_SHIFT 0 /**< Shift value for ACMP_POSSEL */
-#define _ACMP_INPUTSEL_POSSEL_MASK 0x7UL /**< Bit mask for ACMP_POSSEL */
-#define ACMP_INPUTSEL_POSSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN0 (0x00000000UL << 0) /**< Shifted mode POSPIN0 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN1 (0x00000001UL << 0) /**< Shifted mode POSPIN1 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN2 (0x00000002UL << 0) /**< Shifted mode POSPIN2 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN3 (0x00000003UL << 0) /**< Shifted mode POSPIN3 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN4 (0x00000004UL << 0) /**< Shifted mode POSPIN4 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN5 (0x00000005UL << 0) /**< Shifted mode POSPIN5 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN6 (0x00000006UL << 0) /**< Shifted mode POSPIN6 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_POSSEL_POSPIN7 (0x00000007UL << 0) /**< Shifted mode POSPIN7 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN0 0x00000000UL /**< Mode POSPIN0 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN1 0x00000001UL /**< Mode POSPIN1 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN2 0x00000002UL /**< Mode POSPIN2 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN3 0x00000003UL /**< Mode POSPIN3 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN4 0x00000004UL /**< Mode POSPIN4 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN5 0x00000005UL /**< Mode POSPIN5 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN6 0x00000006UL /**< Mode POSPIN6 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_POSSEL_POSPIN7 0x00000007UL /**< Mode POSPIN7 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_SHIFT 4 /**< Shift value for ACMP_NEGSEL */
-#define _ACMP_INPUTSEL_NEGSEL_MASK 0xF0UL /**< Bit mask for ACMP_NEGSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN0 (0x00000000UL << 4) /**< Shifted mode NEGPIN0 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN1 (0x00000001UL << 4) /**< Shifted mode NEGPIN1 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN2 (0x00000002UL << 4) /**< Shifted mode NEGPIN2 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN3 (0x00000003UL << 4) /**< Shifted mode NEGPIN3 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN4 (0x00000004UL << 4) /**< Shifted mode NEGPIN4 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN5 (0x00000005UL << 4) /**< Shifted mode NEGPIN5 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN6 (0x00000006UL << 4) /**< Shifted mode NEGPIN6 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGPIN7 (0x00000007UL << 4) /**< Shifted mode NEGPIN7 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_DEFAULT (0x00000008UL << 4) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEG1V25 (0x00000008UL << 4) /**< Shifted mode NEG1V25 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEG2V5 (0x00000009UL << 4) /**< Shifted mode NEG2V5 for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_NEGVDD (0x0000000AUL << 4) /**< Shifted mode NEGVDD for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_NEGSEL_CAPSENSE (0x0000000BUL << 4) /**< Shifted mode CAPSENSE for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN0 0x00000000UL /**< Mode NEGPIN0 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN1 0x00000001UL /**< Mode NEGPIN1 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN2 0x00000002UL /**< Mode NEGPIN2 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN3 0x00000003UL /**< Mode NEGPIN3 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN4 0x00000004UL /**< Mode NEGPIN4 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN5 0x00000005UL /**< Mode NEGPIN5 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN6 0x00000006UL /**< Mode NEGPIN6 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGPIN7 0x00000007UL /**< Mode NEGPIN7 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_DEFAULT 0x00000008UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEG1V25 0x00000008UL /**< Mode NEG1V25 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEG2V5 0x00000009UL /**< Mode NEG2V5 for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_NEGVDD 0x0000000AUL /**< Mode NEGVDD for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_NEGSEL_CAPSENSE 0x0000000BUL /**< Mode CAPSENSE for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_VDDLEVEL_SHIFT 8 /**< Shift value for ACMP_VDDLEVEL */
-#define _ACMP_INPUTSEL_VDDLEVEL_MASK 0x3F00UL /**< Bit mask for ACMP_VDDLEVEL */
-#define ACMP_INPUTSEL_VDDLEVEL_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_VDDLEVEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_LPREF (1 << 16) /**< Low Power Reference Mode */
-#define _ACMP_INPUTSEL_LPREF_SHIFT 16 /**< Shift value for ACMP_LPREF */
-#define _ACMP_INPUTSEL_LPREF_MASK 0x10000UL /**< Bit mask for ACMP_LPREF */
-#define ACMP_INPUTSEL_LPREF_DEFAULT (0x00000001UL << 16) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_LPREF_DEFAULT 0x00000001UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_CSRESEN (1 << 24) /**< Capacitive Sense Mode Internal Resistor Enable */
-#define _ACMP_INPUTSEL_CSRESEN_SHIFT 24 /**< Shift value for ACMP_CSRESEN */
-#define _ACMP_INPUTSEL_CSRESEN_MASK 0x1000000UL /**< Bit mask for ACMP_CSRESEN */
-#define ACMP_INPUTSEL_CSRESEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_SHIFT 28 /**< Shift value for ACMP_CSRESSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_MASK 0x30000000UL /**< Bit mask for ACMP_CSRESSEL */
-#define ACMP_INPUTSEL_CSRESSEL_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_CSRESSEL_30KOHM (0x00000000UL << 28) /**< Shifted mode 30KOHM for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_CSRESSEL_60KOHM (0x00000001UL << 28) /**< Shifted mode 60KOHM for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_CSRESSEL_90KOHM (0x00000002UL << 28) /**< Shifted mode 90KOHM for ACMP_INPUTSEL */
-#define ACMP_INPUTSEL_CSRESSEL_120KOHM (0x00000003UL << 28) /**< Shifted mode 120KOHM for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_30KOHM 0x00000000UL /**< Mode 30KOHM for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_60KOHM 0x00000001UL /**< Mode 60KOHM for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_90KOHM 0x00000002UL /**< Mode 90KOHM for ACMP_INPUTSEL */
-#define _ACMP_INPUTSEL_CSRESSEL_120KOHM 0x00000003UL /**< Mode 120KOHM for ACMP_INPUTSEL */
-
-/** Bit fields for ACMP STATUS */
-#define _ACMP_STATUS_RESETVALUE 0x00000000UL /**< Default value for ACMP_STATUS */
-#define _ACMP_STATUS_MASK 0x00000003UL /**< Mask for ACMP_STATUS */
-#define ACMP_STATUS_ACMPACT (1 << 0) /**< Analog Comparator Active */
-#define _ACMP_STATUS_ACMPACT_SHIFT 0 /**< Shift value for ACMP_ACMPACT */
-#define _ACMP_STATUS_ACMPACT_MASK 0x1UL /**< Bit mask for ACMP_ACMPACT */
-#define ACMP_STATUS_ACMPACT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_STATUS */
-#define _ACMP_STATUS_ACMPACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_STATUS */
-#define ACMP_STATUS_ACMPOUT (1 << 1) /**< Analog Comparator Output */
-#define _ACMP_STATUS_ACMPOUT_SHIFT 1 /**< Shift value for ACMP_ACMPOUT */
-#define _ACMP_STATUS_ACMPOUT_MASK 0x2UL /**< Bit mask for ACMP_ACMPOUT */
-#define ACMP_STATUS_ACMPOUT_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_STATUS */
-#define _ACMP_STATUS_ACMPOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_STATUS */
-
-/** Bit fields for ACMP IEN */
-#define _ACMP_IEN_RESETVALUE 0x00000000UL /**< Default value for ACMP_IEN */
-#define _ACMP_IEN_MASK 0x00000003UL /**< Mask for ACMP_IEN */
-#define ACMP_IEN_EDGE (1 << 0) /**< Edge Trigger Interrupt Enable */
-#define _ACMP_IEN_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */
-#define _ACMP_IEN_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */
-#define ACMP_IEN_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_IEN */
-#define _ACMP_IEN_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IEN */
-#define ACMP_IEN_WARMUP (1 << 1) /**< Warm-up Interrupt Enable */
-#define _ACMP_IEN_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */
-#define _ACMP_IEN_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */
-#define ACMP_IEN_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_IEN */
-#define _ACMP_IEN_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IEN */
-
-/** Bit fields for ACMP IF */
-#define _ACMP_IF_RESETVALUE 0x00000000UL /**< Default value for ACMP_IF */
-#define _ACMP_IF_MASK 0x00000003UL /**< Mask for ACMP_IF */
-#define ACMP_IF_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag */
-#define _ACMP_IF_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */
-#define _ACMP_IF_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */
-#define ACMP_IF_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_IF */
-#define _ACMP_IF_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IF */
-#define ACMP_IF_WARMUP (1 << 1) /**< Warm-up Interrupt Flag */
-#define _ACMP_IF_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */
-#define _ACMP_IF_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */
-#define ACMP_IF_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_IF */
-#define _ACMP_IF_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IF */
-
-/** Bit fields for ACMP IFS */
-#define _ACMP_IFS_RESETVALUE 0x00000000UL /**< Default value for ACMP_IFS */
-#define _ACMP_IFS_MASK 0x00000003UL /**< Mask for ACMP_IFS */
-#define ACMP_IFS_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag Set */
-#define _ACMP_IFS_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */
-#define _ACMP_IFS_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */
-#define ACMP_IFS_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_IFS */
-#define _ACMP_IFS_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFS */
-#define ACMP_IFS_WARMUP (1 << 1) /**< Warm-up Interrupt Flag Set */
-#define _ACMP_IFS_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */
-#define _ACMP_IFS_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */
-#define ACMP_IFS_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_IFS */
-#define _ACMP_IFS_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFS */
-
-/** Bit fields for ACMP IFC */
-#define _ACMP_IFC_RESETVALUE 0x00000000UL /**< Default value for ACMP_IFC */
-#define _ACMP_IFC_MASK 0x00000003UL /**< Mask for ACMP_IFC */
-#define ACMP_IFC_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag Clear */
-#define _ACMP_IFC_EDGE_SHIFT 0 /**< Shift value for ACMP_EDGE */
-#define _ACMP_IFC_EDGE_MASK 0x1UL /**< Bit mask for ACMP_EDGE */
-#define ACMP_IFC_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_IFC */
-#define _ACMP_IFC_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFC */
-#define ACMP_IFC_WARMUP (1 << 1) /**< Warm-up Interrupt Flag Clear */
-#define _ACMP_IFC_WARMUP_SHIFT 1 /**< Shift value for ACMP_WARMUP */
-#define _ACMP_IFC_WARMUP_MASK 0x2UL /**< Bit mask for ACMP_WARMUP */
-#define ACMP_IFC_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for ACMP_IFC */
-#define _ACMP_IFC_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_IFC */
-
-/** Bit fields for ACMP ROUTE */
-#define _ACMP_ROUTE_RESETVALUE 0x00000000UL /**< Default value for ACMP_ROUTE */
-#define _ACMP_ROUTE_MASK 0x00000301UL /**< Mask for ACMP_ROUTE */
-#define ACMP_ROUTE_ACMPPEN (1 << 0) /**< ACMP Output Pin Enable */
-#define _ACMP_ROUTE_ACMPPEN_SHIFT 0 /**< Shift value for ACMP_ACMPPEN */
-#define _ACMP_ROUTE_ACMPPEN_MASK 0x1UL /**< Bit mask for ACMP_ACMPPEN */
-#define ACMP_ROUTE_ACMPPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for ACMP_ROUTE */
-#define _ACMP_ROUTE_ACMPPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_SHIFT 8 /**< Shift value for ACMP_LOCATION */
-#define _ACMP_ROUTE_LOCATION_MASK 0x300UL /**< Bit mask for ACMP_LOCATION */
-#define ACMP_ROUTE_LOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for ACMP_ROUTE */
-#define ACMP_ROUTE_LOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for ACMP_ROUTE */
-#define ACMP_ROUTE_LOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for ACMP_ROUTE */
-#define ACMP_ROUTE_LOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for ACMP_ROUTE */
-#define ACMP_ROUTE_LOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for ACMP_ROUTE */
-#define _ACMP_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for ACMP_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_MSC
- * @{
- */
-
-/** Bit fields for MSC CTRL */
-#define _MSC_CTRL_RESETVALUE 0x00000001UL /**< Default value for MSC_CTRL */
-#define _MSC_CTRL_MASK 0x00000001UL /**< Mask for MSC_CTRL */
-#define MSC_CTRL_BUSFAULT (1 << 0) /**< Bus Fault Response Enable */
-#define _MSC_CTRL_BUSFAULT_SHIFT 0 /**< Shift value for MSC_BUSFAULT */
-#define _MSC_CTRL_BUSFAULT_MASK 0x1UL /**< Bit mask for MSC_BUSFAULT */
-#define MSC_CTRL_BUSFAULT_GENERATE (0x00000000UL << 0) /**< Shifted mode GENERATE for MSC_CTRL */
-#define MSC_CTRL_BUSFAULT_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for MSC_CTRL */
-#define MSC_CTRL_BUSFAULT_IGNORE (0x00000001UL << 0) /**< Shifted mode IGNORE for MSC_CTRL */
-#define _MSC_CTRL_BUSFAULT_GENERATE 0x00000000UL /**< Mode GENERATE for MSC_CTRL */
-#define _MSC_CTRL_BUSFAULT_DEFAULT 0x00000001UL /**< Mode DEFAULT for MSC_CTRL */
-#define _MSC_CTRL_BUSFAULT_IGNORE 0x00000001UL /**< Mode IGNORE for MSC_CTRL */
-
-/** Bit fields for MSC READCTRL */
-#define _MSC_READCTRL_RESETVALUE 0x00000001UL /**< Default value for MSC_READCTRL */
-#define _MSC_READCTRL_MASK 0x00000007UL /**< Mask for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_SHIFT 0 /**< Shift value for MSC_MODE */
-#define _MSC_READCTRL_MODE_MASK 0x7UL /**< Bit mask for MSC_MODE */
-#define MSC_READCTRL_MODE_WS0 (0x00000000UL << 0) /**< Shifted mode WS0 for MSC_READCTRL */
-#define MSC_READCTRL_MODE_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for MSC_READCTRL */
-#define MSC_READCTRL_MODE_WS1 (0x00000001UL << 0) /**< Shifted mode WS1 for MSC_READCTRL */
-#define MSC_READCTRL_MODE_WS0SCBTP (0x00000002UL << 0) /**< Shifted mode WS0SCBTP for MSC_READCTRL */
-#define MSC_READCTRL_MODE_WS1SCBTP (0x00000003UL << 0) /**< Shifted mode WS1SCBTP for MSC_READCTRL */
-#define MSC_READCTRL_MODE_RESERVED0 (0x00000004UL << 0) /**< Shifted mode RESERVED0 for MSC_READCTRL */
-#define MSC_READCTRL_MODE_RESERVED1 (0x00000005UL << 0) /**< Shifted mode RESERVED1 for MSC_READCTRL */
-#define MSC_READCTRL_MODE_RESERVED2 (0x00000006UL << 0) /**< Shifted mode RESERVED2 for MSC_READCTRL */
-#define MSC_READCTRL_MODE_RESERVED3 (0x00000007UL << 0) /**< Shifted mode RESERVED3 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_WS0 0x00000000UL /**< Mode WS0 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL /**< Mode DEFAULT for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_WS1 0x00000001UL /**< Mode WS1 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_WS0SCBTP 0x00000002UL /**< Mode WS0SCBTP for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_WS1SCBTP 0x00000003UL /**< Mode WS1SCBTP for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_RESERVED0 0x00000004UL /**< Mode RESERVED0 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_RESERVED1 0x00000005UL /**< Mode RESERVED1 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_RESERVED2 0x00000006UL /**< Mode RESERVED2 for MSC_READCTRL */
-#define _MSC_READCTRL_MODE_RESERVED3 0x00000007UL /**< Mode RESERVED3 for MSC_READCTRL */
-
-/** Bit fields for MSC WRITECTRL */
-#define _MSC_WRITECTRL_RESETVALUE 0x00000000UL /**< Default value for MSC_WRITECTRL */
-#define _MSC_WRITECTRL_MASK 0x00000003UL /**< Mask for MSC_WRITECTRL */
-#define MSC_WRITECTRL_WREN (1 << 0) /**< Enable Write/Erase Controller */
-#define _MSC_WRITECTRL_WREN_SHIFT 0 /**< Shift value for MSC_WREN */
-#define _MSC_WRITECTRL_WREN_MASK 0x1UL /**< Bit mask for MSC_WREN */
-#define MSC_WRITECTRL_WREN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_WRITECTRL */
-#define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECTRL */
-#define MSC_WRITECTRL_IRQERASEABORT (1 << 1) /**< Abort Page Erase on Interrupt */
-#define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1 /**< Shift value for MSC_IRQERASEABORT */
-#define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL /**< Bit mask for MSC_IRQERASEABORT */
-#define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_WRITECTRL */
-#define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECTRL */
-
-/** Bit fields for MSC WRITECMD */
-#define _MSC_WRITECMD_RESETVALUE 0x00000000UL /**< Default value for MSC_WRITECMD */
-#define _MSC_WRITECMD_MASK 0x0000001FUL /**< Mask for MSC_WRITECMD */
-#define MSC_WRITECMD_LADDRIM (1 << 0) /**< Load MSC_ADDRB into ADDR */
-#define _MSC_WRITECMD_LADDRIM_SHIFT 0 /**< Shift value for MSC_LADDRIM */
-#define _MSC_WRITECMD_LADDRIM_MASK 0x1UL /**< Bit mask for MSC_LADDRIM */
-#define MSC_WRITECMD_LADDRIM_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_WRITECMD */
-#define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECMD */
-#define MSC_WRITECMD_ERASEPAGE (1 << 1) /**< Erase Page */
-#define _MSC_WRITECMD_ERASEPAGE_SHIFT 1 /**< Shift value for MSC_ERASEPAGE */
-#define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL /**< Bit mask for MSC_ERASEPAGE */
-#define MSC_WRITECMD_ERASEPAGE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_WRITECMD */
-#define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECMD */
-#define MSC_WRITECMD_WRITEEND (1 << 2) /**< End Write Mode */
-#define _MSC_WRITECMD_WRITEEND_SHIFT 2 /**< Shift value for MSC_WRITEEND */
-#define _MSC_WRITECMD_WRITEEND_MASK 0x4UL /**< Bit mask for MSC_WRITEEND */
-#define MSC_WRITECMD_WRITEEND_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for MSC_WRITECMD */
-#define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECMD */
-#define MSC_WRITECMD_WRITEONCE (1 << 3) /**< Word Write-Once Trigger */
-#define _MSC_WRITECMD_WRITEONCE_SHIFT 3 /**< Shift value for MSC_WRITEONCE */
-#define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL /**< Bit mask for MSC_WRITEONCE */
-#define MSC_WRITECMD_WRITEONCE_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for MSC_WRITECMD */
-#define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECMD */
-#define MSC_WRITECMD_WRITETRIG (1 << 4) /**< Word Write Sequence Trigger */
-#define _MSC_WRITECMD_WRITETRIG_SHIFT 4 /**< Shift value for MSC_WRITETRIG */
-#define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL /**< Bit mask for MSC_WRITETRIG */
-#define MSC_WRITECMD_WRITETRIG_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for MSC_WRITECMD */
-#define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WRITECMD */
-
-/** Bit fields for MSC ADDRB */
-#define _MSC_ADDRB_RESETVALUE 0x00000000UL /**< Default value for MSC_ADDRB */
-#define _MSC_ADDRB_MASK 0xFFFFFFFFUL /**< Mask for MSC_ADDRB */
-#define _MSC_ADDRB_ADDRB_SHIFT 0 /**< Shift value for MSC_ADDRB */
-#define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL /**< Bit mask for MSC_ADDRB */
-#define MSC_ADDRB_ADDRB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_ADDRB */
-#define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_ADDRB */
-
-/** Bit fields for MSC WDATA */
-#define _MSC_WDATA_RESETVALUE 0x00000000UL /**< Default value for MSC_WDATA */
-#define _MSC_WDATA_MASK 0xFFFFFFFFUL /**< Mask for MSC_WDATA */
-#define _MSC_WDATA_WDATA_SHIFT 0 /**< Shift value for MSC_WDATA */
-#define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL /**< Bit mask for MSC_WDATA */
-#define MSC_WDATA_WDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_WDATA */
-#define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_WDATA */
-
-/** Bit fields for MSC STATUS */
-#define _MSC_STATUS_RESETVALUE 0x00000008UL /**< Default value for MSC_STATUS */
-#define _MSC_STATUS_MASK 0x0000003FUL /**< Mask for MSC_STATUS */
-#define MSC_STATUS_BUSY (1 << 0) /**< Erase/Write Busy */
-#define _MSC_STATUS_BUSY_SHIFT 0 /**< Shift value for MSC_BUSY */
-#define _MSC_STATUS_BUSY_MASK 0x1UL /**< Bit mask for MSC_BUSY */
-#define MSC_STATUS_BUSY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_STATUS */
-#define MSC_STATUS_LOCKED (1 << 1) /**< Access Locked */
-#define _MSC_STATUS_LOCKED_SHIFT 1 /**< Shift value for MSC_LOCKED */
-#define _MSC_STATUS_LOCKED_MASK 0x2UL /**< Bit mask for MSC_LOCKED */
-#define MSC_STATUS_LOCKED_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_STATUS */
-#define MSC_STATUS_INVADDR (1 << 2) /**< Invalid Write Address or Erase Page */
-#define _MSC_STATUS_INVADDR_SHIFT 2 /**< Shift value for MSC_INVADDR */
-#define _MSC_STATUS_INVADDR_MASK 0x4UL /**< Bit mask for MSC_INVADDR */
-#define MSC_STATUS_INVADDR_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_STATUS */
-#define MSC_STATUS_WDATAREADY (1 << 3) /**< WDATA Write Ready */
-#define _MSC_STATUS_WDATAREADY_SHIFT 3 /**< Shift value for MSC_WDATAREADY */
-#define _MSC_STATUS_WDATAREADY_MASK 0x8UL /**< Bit mask for MSC_WDATAREADY */
-#define MSC_STATUS_WDATAREADY_DEFAULT (0x00000001UL << 3) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL /**< Mode DEFAULT for MSC_STATUS */
-#define MSC_STATUS_WORDTIMEOUT (1 << 4) /**< Flash Write Word Timeout */
-#define _MSC_STATUS_WORDTIMEOUT_SHIFT 4 /**< Shift value for MSC_WORDTIMEOUT */
-#define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL /**< Bit mask for MSC_WORDTIMEOUT */
-#define MSC_STATUS_WORDTIMEOUT_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_STATUS */
-#define MSC_STATUS_ERASEABORTED (1 << 5) /**< The Current Flash Erase Operation Aborted */
-#define _MSC_STATUS_ERASEABORTED_SHIFT 5 /**< Shift value for MSC_ERASEABORTED */
-#define _MSC_STATUS_ERASEABORTED_MASK 0x20UL /**< Bit mask for MSC_ERASEABORTED */
-#define MSC_STATUS_ERASEABORTED_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for MSC_STATUS */
-#define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_STATUS */
-
-/** Bit fields for MSC IF */
-#define _MSC_IF_RESETVALUE 0x00000000UL /**< Default value for MSC_IF */
-#define _MSC_IF_MASK 0x00000003UL /**< Mask for MSC_IF */
-#define MSC_IF_ERASE (1 << 0) /**< Erase Done Interrupt Read Flag */
-#define _MSC_IF_ERASE_SHIFT 0 /**< Shift value for MSC_ERASE */
-#define _MSC_IF_ERASE_MASK 0x1UL /**< Bit mask for MSC_ERASE */
-#define MSC_IF_ERASE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_IF */
-#define _MSC_IF_ERASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IF */
-#define MSC_IF_WRITE (1 << 1) /**< Write Done Interrupt Read Flag */
-#define _MSC_IF_WRITE_SHIFT 1 /**< Shift value for MSC_WRITE */
-#define _MSC_IF_WRITE_MASK 0x2UL /**< Bit mask for MSC_WRITE */
-#define MSC_IF_WRITE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_IF */
-#define _MSC_IF_WRITE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IF */
-
-/** Bit fields for MSC IFS */
-#define _MSC_IFS_RESETVALUE 0x00000000UL /**< Default value for MSC_IFS */
-#define _MSC_IFS_MASK 0x00000003UL /**< Mask for MSC_IFS */
-#define MSC_IFS_ERASE (1 << 0) /**< Erase Done Interrupt Set */
-#define _MSC_IFS_ERASE_SHIFT 0 /**< Shift value for MSC_ERASE */
-#define _MSC_IFS_ERASE_MASK 0x1UL /**< Bit mask for MSC_ERASE */
-#define MSC_IFS_ERASE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_IFS */
-#define _MSC_IFS_ERASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IFS */
-#define MSC_IFS_WRITE (1 << 1) /**< Write Done Interrupt Set */
-#define _MSC_IFS_WRITE_SHIFT 1 /**< Shift value for MSC_WRITE */
-#define _MSC_IFS_WRITE_MASK 0x2UL /**< Bit mask for MSC_WRITE */
-#define MSC_IFS_WRITE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_IFS */
-#define _MSC_IFS_WRITE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IFS */
-
-/** Bit fields for MSC IFC */
-#define _MSC_IFC_RESETVALUE 0x00000000UL /**< Default value for MSC_IFC */
-#define _MSC_IFC_MASK 0x00000003UL /**< Mask for MSC_IFC */
-#define MSC_IFC_ERASE (1 << 0) /**< Erase Done Interrupt Clear */
-#define _MSC_IFC_ERASE_SHIFT 0 /**< Shift value for MSC_ERASE */
-#define _MSC_IFC_ERASE_MASK 0x1UL /**< Bit mask for MSC_ERASE */
-#define MSC_IFC_ERASE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_IFC */
-#define _MSC_IFC_ERASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IFC */
-#define MSC_IFC_WRITE (1 << 1) /**< Write Done Interrupt Clear */
-#define _MSC_IFC_WRITE_SHIFT 1 /**< Shift value for MSC_WRITE */
-#define _MSC_IFC_WRITE_MASK 0x2UL /**< Bit mask for MSC_WRITE */
-#define MSC_IFC_WRITE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_IFC */
-#define _MSC_IFC_WRITE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IFC */
-
-/** Bit fields for MSC IEN */
-#define _MSC_IEN_RESETVALUE 0x00000000UL /**< Default value for MSC_IEN */
-#define _MSC_IEN_MASK 0x00000003UL /**< Mask for MSC_IEN */
-#define MSC_IEN_ERASE (1 << 0) /**< Erase Done Interrupt Enable */
-#define _MSC_IEN_ERASE_SHIFT 0 /**< Shift value for MSC_ERASE */
-#define _MSC_IEN_ERASE_MASK 0x1UL /**< Bit mask for MSC_ERASE */
-#define MSC_IEN_ERASE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_IEN */
-#define _MSC_IEN_ERASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IEN */
-#define MSC_IEN_WRITE (1 << 1) /**< Write Done Interrupt Enable */
-#define _MSC_IEN_WRITE_SHIFT 1 /**< Shift value for MSC_WRITE */
-#define _MSC_IEN_WRITE_MASK 0x2UL /**< Bit mask for MSC_WRITE */
-#define MSC_IEN_WRITE_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for MSC_IEN */
-#define _MSC_IEN_WRITE_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_IEN */
-
-/** Bit fields for MSC LOCK */
-#define _MSC_LOCK_RESETVALUE 0x00000000UL /**< Default value for MSC_LOCK */
-#define _MSC_LOCK_MASK 0x0000FFFFUL /**< Mask for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for MSC_LOCKKEY */
-#define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for MSC_LOCKKEY */
-#define MSC_LOCK_LOCKKEY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for MSC_LOCK */
-#define MSC_LOCK_LOCKKEY_LOCK (0x00000000UL << 0) /**< Shifted mode LOCK for MSC_LOCK */
-#define MSC_LOCK_LOCKKEY_UNLOCKED (0x00000000UL << 0) /**< Shifted mode UNLOCKED for MSC_LOCK */
-#define MSC_LOCK_LOCKKEY_LOCKED (0x00000001UL << 0) /**< Shifted mode LOCKED for MSC_LOCK */
-#define MSC_LOCK_LOCKKEY_UNLOCK (0x00001B71UL << 0) /**< Shifted mode UNLOCK for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for MSC_LOCK */
-#define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL /**< Mode UNLOCK for MSC_LOCK */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_EMU
- * @{
- */
-
-/** Bit fields for EMU CTRL */
-#define _EMU_CTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_CTRL */
-#define _EMU_CTRL_MASK 0x0000000FUL /**< Mask for EMU_CTRL */
-#define EMU_CTRL_EMVREG (1 << 0) /**< Energy Mode Voltage Regulator Control */
-#define _EMU_CTRL_EMVREG_SHIFT 0 /**< Shift value for EMU_EMVREG */
-#define _EMU_CTRL_EMVREG_MASK 0x1UL /**< Bit mask for EMU_EMVREG */
-#define EMU_CTRL_EMVREG_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EMU_CTRL */
-#define EMU_CTRL_EMVREG_OFF (0x00000000UL << 0) /**< Shifted mode OFF for EMU_CTRL */
-#define EMU_CTRL_EMVREG_ON (0x00000001UL << 0) /**< Shifted mode ON for EMU_CTRL */
-#define _EMU_CTRL_EMVREG_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
-#define _EMU_CTRL_EMVREG_OFF 0x00000000UL /**< Mode OFF for EMU_CTRL */
-#define _EMU_CTRL_EMVREG_ON 0x00000001UL /**< Mode ON for EMU_CTRL */
-#define EMU_CTRL_EM2BLOCK (1 << 1) /**< Energy Mode 2 Block */
-#define _EMU_CTRL_EM2BLOCK_SHIFT 1 /**< Shift value for EMU_EM2BLOCK */
-#define _EMU_CTRL_EM2BLOCK_MASK 0x2UL /**< Bit mask for EMU_EM2BLOCK */
-#define EMU_CTRL_EM2BLOCK_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for EMU_CTRL */
-#define _EMU_CTRL_EM2BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
-#define _EMU_CTRL_EM4CTRL_SHIFT 2 /**< Shift value for EMU_EM4CTRL */
-#define _EMU_CTRL_EM4CTRL_MASK 0xCUL /**< Bit mask for EMU_EM4CTRL */
-#define EMU_CTRL_EM4CTRL_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for EMU_CTRL */
-#define _EMU_CTRL_EM4CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
-
-/** Bit fields for EMU MEMCTRL */
-#define _EMU_MEMCTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_MASK 0x00000007UL /**< Mask for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_POWERDOWN_SHIFT 0 /**< Shift value for EMU_POWERDOWN */
-#define _EMU_MEMCTRL_POWERDOWN_MASK 0x7UL /**< Bit mask for EMU_POWERDOWN */
-#define EMU_MEMCTRL_POWERDOWN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EMU_MEMCTRL */
-#define EMU_MEMCTRL_POWERDOWN_BLK3 (0x00000004UL << 0) /**< Shifted mode BLK3 for EMU_MEMCTRL */
-#define EMU_MEMCTRL_POWERDOWN_BLK23 (0x00000006UL << 0) /**< Shifted mode BLK23 for EMU_MEMCTRL */
-#define EMU_MEMCTRL_POWERDOWN_BLK123 (0x00000007UL << 0) /**< Shifted mode BLK123 for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_POWERDOWN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_POWERDOWN_BLK3 0x00000004UL /**< Mode BLK3 for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_POWERDOWN_BLK23 0x00000006UL /**< Mode BLK23 for EMU_MEMCTRL */
-#define _EMU_MEMCTRL_POWERDOWN_BLK123 0x00000007UL /**< Mode BLK123 for EMU_MEMCTRL */
-
-/** Bit fields for EMU LOCK */
-#define _EMU_LOCK_RESETVALUE 0x00000000UL /**< Default value for EMU_LOCK */
-#define _EMU_LOCK_MASK 0x0000FFFFUL /**< Mask for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for EMU_LOCKKEY */
-#define _EMU_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for EMU_LOCKKEY */
-#define EMU_LOCK_LOCKKEY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EMU_LOCK */
-#define EMU_LOCK_LOCKKEY_LOCK (0x00000000UL << 0) /**< Shifted mode LOCK for EMU_LOCK */
-#define EMU_LOCK_LOCKKEY_UNLOCKED (0x00000000UL << 0) /**< Shifted mode UNLOCKED for EMU_LOCK */
-#define EMU_LOCK_LOCKKEY_LOCKED (0x00000001UL << 0) /**< Shifted mode LOCKED for EMU_LOCK */
-#define EMU_LOCK_LOCKKEY_UNLOCK (0x0000ADE8UL << 0) /**< Shifted mode UNLOCK for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for EMU_LOCK */
-#define _EMU_LOCK_LOCKKEY_UNLOCK 0x0000ADE8UL /**< Mode UNLOCK for EMU_LOCK */
-
-/** Bit fields for EMU ATESTCTRL */
-#define _EMU_ATESTCTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_MASK 0x07FFFF0FUL /**< Mask for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_ATESTSEL_SHIFT 0 /**< Shift value for EMU_ATESTSEL */
-#define _EMU_ATESTCTRL_ATESTSEL_MASK 0xFUL /**< Bit mask for EMU_ATESTSEL */
-#define EMU_ATESTCTRL_ATESTSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_ATESTSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_ATESTBUS_SHIFT 8 /**< Shift value for EMU_ATESTBUS */
-#define _EMU_ATESTCTRL_ATESTBUS_MASK 0xFFFF00UL /**< Bit mask for EMU_ATESTBUS */
-#define EMU_ATESTCTRL_ATESTBUS_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_ATESTBUS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_ATESTCTRL */
-#define EMU_ATESTCTRL_DACATESTINEN (1 << 24) /**< DAC Test Input Enable */
-#define _EMU_ATESTCTRL_DACATESTINEN_SHIFT 24 /**< Shift value for EMU_DACATESTINEN */
-#define _EMU_ATESTCTRL_DACATESTINEN_MASK 0x1000000UL /**< Bit mask for EMU_DACATESTINEN */
-#define EMU_ATESTCTRL_DACATESTINEN_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_DACATESTINEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_ATESTCTRL */
-#define EMU_ATESTCTRL_DAC_ATESTOUTEN (1 << 25) /**< DAC Test Output Enable */
-#define _EMU_ATESTCTRL_DAC_ATESTOUTEN_SHIFT 25 /**< Shift value for EMU_DAC_ATESTOUTEN */
-#define _EMU_ATESTCTRL_DAC_ATESTOUTEN_MASK 0x2000000UL /**< Bit mask for EMU_DAC_ATESTOUTEN */
-#define EMU_ATESTCTRL_DAC_ATESTOUTEN_DEFAULT (0x00000000UL << 25) /**< Shifted mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_DAC_ATESTOUTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_ATESTCTRL */
-#define EMU_ATESTCTRL_ANATESTINEN (1 << 26) /**< Analog Test Input Enable */
-#define _EMU_ATESTCTRL_ANATESTINEN_SHIFT 26 /**< Shift value for EMU_ANATESTINEN */
-#define _EMU_ATESTCTRL_ANATESTINEN_MASK 0x4000000UL /**< Bit mask for EMU_ANATESTINEN */
-#define EMU_ATESTCTRL_ANATESTINEN_DEFAULT (0x00000000UL << 26) /**< Shifted mode DEFAULT for EMU_ATESTCTRL */
-#define _EMU_ATESTCTRL_ANATESTINEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_ATESTCTRL */
-
-/** Bit fields for EMU AUXCTRL */
-#define _EMU_AUXCTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_AUXCTRL */
-#define _EMU_AUXCTRL_MASK 0x000000FFUL /**< Mask for EMU_AUXCTRL */
-#define _EMU_AUXCTRL_AUX_SHIFT 0 /**< Shift value for EMU_AUX */
-#define _EMU_AUXCTRL_AUX_MASK 0xFFUL /**< Bit mask for EMU_AUX */
-#define EMU_AUXCTRL_AUX_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EMU_AUXCTRL */
-#define EMU_AUXCTRL_AUX_HRCCLR (0x00000001UL << 0) /**< Shifted mode HRCCLR for EMU_AUXCTRL */
-#define _EMU_AUXCTRL_AUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_AUXCTRL */
-#define _EMU_AUXCTRL_AUX_HRCCLR 0x00000001UL /**< Mode HRCCLR for EMU_AUXCTRL */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_RMU
- * @{
- */
-
-/** Bit fields for RMU CTRL */
-#define _RMU_CTRL_RESETVALUE 0x00000000UL /**< Default value for RMU_CTRL */
-#define _RMU_CTRL_MASK 0x00000001UL /**< Mask for RMU_CTRL */
-#define RMU_CTRL_LOCKUPRDIS (1 << 0) /**< Lockup Reset Disable */
-#define _RMU_CTRL_LOCKUPRDIS_SHIFT 0 /**< Shift value for RMU_LOCKUPRDIS */
-#define _RMU_CTRL_LOCKUPRDIS_MASK 0x1UL /**< Bit mask for RMU_LOCKUPRDIS */
-#define RMU_CTRL_LOCKUPRDIS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RMU_CTRL */
-#define _RMU_CTRL_LOCKUPRDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_CTRL */
-
-/** Bit fields for RMU RSTCAUSE */
-#define _RMU_RSTCAUSE_RESETVALUE 0x00000000UL /**< Default value for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_MASK 0x0000007FUL /**< Mask for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_PORST (1 << 0) /**< Power On Reset */
-#define _RMU_RSTCAUSE_PORST_SHIFT 0 /**< Shift value for RMU_PORST */
-#define _RMU_RSTCAUSE_PORST_MASK 0x1UL /**< Bit mask for RMU_PORST */
-#define RMU_RSTCAUSE_PORST_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_PORST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_BODUNREGRST (1 << 1) /**< Brown Out Detector Unregulated Domain Reset */
-#define _RMU_RSTCAUSE_BODUNREGRST_SHIFT 1 /**< Shift value for RMU_BODUNREGRST */
-#define _RMU_RSTCAUSE_BODUNREGRST_MASK 0x2UL /**< Bit mask for RMU_BODUNREGRST */
-#define RMU_RSTCAUSE_BODUNREGRST_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_BODUNREGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_BODREGRST (1 << 2) /**< Brown Out Detector Regulated Domain Reset */
-#define _RMU_RSTCAUSE_BODREGRST_SHIFT 2 /**< Shift value for RMU_BODREGRST */
-#define _RMU_RSTCAUSE_BODREGRST_MASK 0x4UL /**< Bit mask for RMU_BODREGRST */
-#define RMU_RSTCAUSE_BODREGRST_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_BODREGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_EXTRST (1 << 3) /**< External Pin Reset */
-#define _RMU_RSTCAUSE_EXTRST_SHIFT 3 /**< Shift value for RMU_EXTRST */
-#define _RMU_RSTCAUSE_EXTRST_MASK 0x8UL /**< Bit mask for RMU_EXTRST */
-#define RMU_RSTCAUSE_EXTRST_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_EXTRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_WDOGRST (1 << 4) /**< Watchdog Reset */
-#define _RMU_RSTCAUSE_WDOGRST_SHIFT 4 /**< Shift value for RMU_WDOGRST */
-#define _RMU_RSTCAUSE_WDOGRST_MASK 0x10UL /**< Bit mask for RMU_WDOGRST */
-#define RMU_RSTCAUSE_WDOGRST_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_WDOGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_LOCKUPRST (1 << 5) /**< LOCKUP Reset */
-#define _RMU_RSTCAUSE_LOCKUPRST_SHIFT 5 /**< Shift value for RMU_LOCKUPRST */
-#define _RMU_RSTCAUSE_LOCKUPRST_MASK 0x20UL /**< Bit mask for RMU_LOCKUPRST */
-#define RMU_RSTCAUSE_LOCKUPRST_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_LOCKUPRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-#define RMU_RSTCAUSE_SYSREQRST (1 << 6) /**< System Request Reset */
-#define _RMU_RSTCAUSE_SYSREQRST_SHIFT 6 /**< Shift value for RMU_SYSREQRST */
-#define _RMU_RSTCAUSE_SYSREQRST_MASK 0x40UL /**< Bit mask for RMU_SYSREQRST */
-#define RMU_RSTCAUSE_SYSREQRST_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
-#define _RMU_RSTCAUSE_SYSREQRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
-
-/** Bit fields for RMU CMD */
-#define _RMU_CMD_RESETVALUE 0x00000000UL /**< Default value for RMU_CMD */
-#define _RMU_CMD_MASK 0x00000001UL /**< Mask for RMU_CMD */
-#define RMU_CMD_RCCLR (1 << 0) /**< Reset Cause Clear */
-#define _RMU_CMD_RCCLR_SHIFT 0 /**< Shift value for RMU_RCCLR */
-#define _RMU_CMD_RCCLR_MASK 0x1UL /**< Bit mask for RMU_RCCLR */
-#define RMU_CMD_RCCLR_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RMU_CMD */
-#define _RMU_CMD_RCCLR_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_CMD */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_CMU
- * @{
- */
-
-/** Bit fields for CMU CTRL */
-#define _CMU_CTRL_RESETVALUE 0x000C262CUL /**< Default value for CMU_CTRL */
-#define _CMU_CTRL_MASK 0x00FE3EEFUL /**< Mask for CMU_CTRL */
-#define _CMU_CTRL_HFXOMODE_SHIFT 0 /**< Shift value for CMU_HFXOMODE */
-#define _CMU_CTRL_HFXOMODE_MASK 0x3UL /**< Bit mask for CMU_HFXOMODE */
-#define CMU_CTRL_HFXOMODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_HFXOMODE_XTAL (0x00000000UL << 0) /**< Shifted mode XTAL for CMU_CTRL */
-#define CMU_CTRL_HFXOMODE_BUFEXTCLK (0x00000001UL << 0) /**< Shifted mode BUFEXTCLK for CMU_CTRL */
-#define CMU_CTRL_HFXOMODE_DIGEXTCLK (0x00000002UL << 0) /**< Shifted mode DIGEXTCLK for CMU_CTRL */
-#define _CMU_CTRL_HFXOMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOMODE_XTAL 0x00000000UL /**< Mode XTAL for CMU_CTRL */
-#define _CMU_CTRL_HFXOMODE_BUFEXTCLK 0x00000001UL /**< Mode BUFEXTCLK for CMU_CTRL */
-#define _CMU_CTRL_HFXOMODE_DIGEXTCLK 0x00000002UL /**< Mode DIGEXTCLK for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_SHIFT 2 /**< Shift value for CMU_HFXOBOOST */
-#define _CMU_CTRL_HFXOBOOST_MASK 0xCUL /**< Bit mask for CMU_HFXOBOOST */
-#define CMU_CTRL_HFXOBOOST_50PCENT (0x00000000UL << 2) /**< Shifted mode 50PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBOOST_70PCENT (0x00000001UL << 2) /**< Shifted mode 70PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBOOST_80PCENT (0x00000002UL << 2) /**< Shifted mode 80PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBOOST_DEFAULT (0x00000003UL << 2) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_HFXOBOOST_100PCENT (0x00000003UL << 2) /**< Shifted mode 100PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_50PCENT 0x00000000UL /**< Mode 50PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_70PCENT 0x00000001UL /**< Mode 70PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_80PCENT 0x00000002UL /**< Mode 80PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_DEFAULT 0x00000003UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBOOST_100PCENT 0x00000003UL /**< Mode 100PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_SHIFT 5 /**< Shift value for CMU_HFXOBUFCUR */
-#define _CMU_CTRL_HFXOBUFCUR_MASK 0x60UL /**< Bit mask for CMU_HFXOBUFCUR */
-#define CMU_CTRL_HFXOBUFCUR_80PCENT (0x00000000UL << 5) /**< Shifted mode 80PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBUFCUR_DEFAULT (0x00000001UL << 5) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_HFXOBUFCUR_100PCENT (0x00000001UL << 5) /**< Shifted mode 100PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBUFCUR_120PCENT (0x00000002UL << 5) /**< Shifted mode 120PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOBUFCUR_150PCENT (0x00000003UL << 5) /**< Shifted mode 150PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_80PCENT 0x00000000UL /**< Mode 80PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_100PCENT 0x00000001UL /**< Mode 100PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_120PCENT 0x00000002UL /**< Mode 120PCENT for CMU_CTRL */
-#define _CMU_CTRL_HFXOBUFCUR_150PCENT 0x00000003UL /**< Mode 150PCENT for CMU_CTRL */
-#define CMU_CTRL_HFXOGLITCHDETEN (1 << 7) /**< HFXO Glitch Detector Enable */
-#define _CMU_CTRL_HFXOGLITCHDETEN_SHIFT 7 /**< Shift value for CMU_HFXOGLITCHDETEN */
-#define _CMU_CTRL_HFXOGLITCHDETEN_MASK 0x80UL /**< Bit mask for CMU_HFXOGLITCHDETEN */
-#define CMU_CTRL_HFXOGLITCHDETEN_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOGLITCHDETEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_SHIFT 9 /**< Shift value for CMU_HFXOTIMEOUT */
-#define _CMU_CTRL_HFXOTIMEOUT_MASK 0x600UL /**< Bit mask for CMU_HFXOTIMEOUT */
-#define CMU_CTRL_HFXOTIMEOUT_8CYCLES (0x00000000UL << 9) /**< Shifted mode 8CYCLES for CMU_CTRL */
-#define CMU_CTRL_HFXOTIMEOUT_256CYCLES (0x00000001UL << 9) /**< Shifted mode 256CYCLES for CMU_CTRL */
-#define CMU_CTRL_HFXOTIMEOUT_1KCYCLES (0x00000002UL << 9) /**< Shifted mode 1KCYCLES for CMU_CTRL */
-#define CMU_CTRL_HFXOTIMEOUT_DEFAULT (0x00000003UL << 9) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_HFXOTIMEOUT_16KCYCLES (0x00000003UL << 9) /**< Shifted mode 16KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_8CYCLES 0x00000000UL /**< Mode 8CYCLES for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_256CYCLES 0x00000001UL /**< Mode 256CYCLES for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_1KCYCLES 0x00000002UL /**< Mode 1KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_DEFAULT 0x00000003UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_HFXOTIMEOUT_16KCYCLES 0x00000003UL /**< Mode 16KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_LFXOMODE_SHIFT 11 /**< Shift value for CMU_LFXOMODE */
-#define _CMU_CTRL_LFXOMODE_MASK 0x1800UL /**< Bit mask for CMU_LFXOMODE */
-#define CMU_CTRL_LFXOMODE_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_LFXOMODE_XTAL (0x00000000UL << 11) /**< Shifted mode XTAL for CMU_CTRL */
-#define CMU_CTRL_LFXOMODE_BUFEXTCLK (0x00000001UL << 11) /**< Shifted mode BUFEXTCLK for CMU_CTRL */
-#define CMU_CTRL_LFXOMODE_DIGEXTCLK (0x00000002UL << 11) /**< Shifted mode DIGEXTCLK for CMU_CTRL */
-#define _CMU_CTRL_LFXOMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_LFXOMODE_XTAL 0x00000000UL /**< Mode XTAL for CMU_CTRL */
-#define _CMU_CTRL_LFXOMODE_BUFEXTCLK 0x00000001UL /**< Mode BUFEXTCLK for CMU_CTRL */
-#define _CMU_CTRL_LFXOMODE_DIGEXTCLK 0x00000002UL /**< Mode DIGEXTCLK for CMU_CTRL */
-#define CMU_CTRL_LFXOBOOST (1 << 13) /**< LFXO Start-up Boost Current */
-#define _CMU_CTRL_LFXOBOOST_SHIFT 13 /**< Shift value for CMU_LFXOBOOST */
-#define _CMU_CTRL_LFXOBOOST_MASK 0x2000UL /**< Bit mask for CMU_LFXOBOOST */
-#define CMU_CTRL_LFXOBOOST_70PCENT (0x00000000UL << 13) /**< Shifted mode 70PCENT for CMU_CTRL */
-#define CMU_CTRL_LFXOBOOST_DEFAULT (0x00000001UL << 13) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_LFXOBOOST_100PCENT (0x00000001UL << 13) /**< Shifted mode 100PCENT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBOOST_70PCENT 0x00000000UL /**< Mode 70PCENT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBOOST_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBOOST_100PCENT 0x00000001UL /**< Mode 100PCENT for CMU_CTRL */
-#define CMU_CTRL_LFXOBUFCUR (1 << 17) /**< LFXO Boost Buffer Current */
-#define _CMU_CTRL_LFXOBUFCUR_SHIFT 17 /**< Shift value for CMU_LFXOBUFCUR */
-#define _CMU_CTRL_LFXOBUFCUR_MASK 0x20000UL /**< Bit mask for CMU_LFXOBUFCUR */
-#define CMU_CTRL_LFXOBUFCUR_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_LFXOBUFCUR_100PCENT (0x00000000UL << 17) /**< Shifted mode 100PCENT for CMU_CTRL */
-#define CMU_CTRL_LFXOBUFCUR_150PCENT (0x00000001UL << 17) /**< Shifted mode 150PCENT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBUFCUR_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBUFCUR_100PCENT 0x00000000UL /**< Mode 100PCENT for CMU_CTRL */
-#define _CMU_CTRL_LFXOBUFCUR_150PCENT 0x00000001UL /**< Mode 150PCENT for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_SHIFT 18 /**< Shift value for CMU_LFXOTIMEOUT */
-#define _CMU_CTRL_LFXOTIMEOUT_MASK 0xC0000UL /**< Bit mask for CMU_LFXOTIMEOUT */
-#define CMU_CTRL_LFXOTIMEOUT_8CYCLES (0x00000000UL << 18) /**< Shifted mode 8CYCLES for CMU_CTRL */
-#define CMU_CTRL_LFXOTIMEOUT_1KCYCLES (0x00000001UL << 18) /**< Shifted mode 1KCYCLES for CMU_CTRL */
-#define CMU_CTRL_LFXOTIMEOUT_16KCYCLES (0x00000002UL << 18) /**< Shifted mode 16KCYCLES for CMU_CTRL */
-#define CMU_CTRL_LFXOTIMEOUT_DEFAULT (0x00000003UL << 18) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_LFXOTIMEOUT_32KCYCLES (0x00000003UL << 18) /**< Shifted mode 32KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_8CYCLES 0x00000000UL /**< Mode 8CYCLES for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_1KCYCLES 0x00000001UL /**< Mode 1KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_16KCYCLES 0x00000002UL /**< Mode 16KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_DEFAULT 0x00000003UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_LFXOTIMEOUT_32KCYCLES 0x00000003UL /**< Mode 32KCYCLES for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_SHIFT 20 /**< Shift value for CMU_CLKOUTSEL0 */
-#define _CMU_CTRL_CLKOUTSEL0_MASK 0x700000UL /**< Bit mask for CMU_CLKOUTSEL0 */
-#define CMU_CTRL_CLKOUTSEL0_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFRCO (0x00000000UL << 20) /**< Shifted mode HFRCO for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFXO (0x00000001UL << 20) /**< Shifted mode HFXO for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFCLK2 (0x00000002UL << 20) /**< Shifted mode HFCLK2 for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFCLK4 (0x00000003UL << 20) /**< Shifted mode HFCLK4 for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFCLK8 (0x00000004UL << 20) /**< Shifted mode HFCLK8 for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_HFCLK16 (0x00000005UL << 20) /**< Shifted mode HFCLK16 for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL0_ULFRCO (0x00000006UL << 20) /**< Shifted mode ULFRCO for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFRCO 0x00000000UL /**< Mode HFRCO for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFXO 0x00000001UL /**< Mode HFXO for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFCLK2 0x00000002UL /**< Mode HFCLK2 for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFCLK4 0x00000003UL /**< Mode HFCLK4 for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFCLK8 0x00000004UL /**< Mode HFCLK8 for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_HFCLK16 0x00000005UL /**< Mode HFCLK16 for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000006UL /**< Mode ULFRCO for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL1 (1 << 23) /**< Clock Output Select 1 */
-#define _CMU_CTRL_CLKOUTSEL1_SHIFT 23 /**< Shift value for CMU_CLKOUTSEL1 */
-#define _CMU_CTRL_CLKOUTSEL1_MASK 0x800000UL /**< Bit mask for CMU_CLKOUTSEL1 */
-#define CMU_CTRL_CLKOUTSEL1_DEFAULT (0x00000000UL << 23) /**< Shifted mode DEFAULT for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL1_LFRCO (0x00000000UL << 23) /**< Shifted mode LFRCO for CMU_CTRL */
-#define CMU_CTRL_CLKOUTSEL1_LFXO (0x00000001UL << 23) /**< Shifted mode LFXO for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000000UL /**< Mode LFRCO for CMU_CTRL */
-#define _CMU_CTRL_CLKOUTSEL1_LFXO 0x00000001UL /**< Mode LFXO for CMU_CTRL */
-
-/** Bit fields for CMU HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_RESETVALUE 0x00000000UL /**< Default value for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_MASK 0x0000000FUL /**< Mask for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT 0 /**< Shift value for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK 0xFUL /**< Bit mask for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK (0x00000000UL << 0) /**< Shifted mode HFCLK for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 (0x00000001UL << 0) /**< Shifted mode HFCLK2 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 (0x00000002UL << 0) /**< Shifted mode HFCLK4 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 (0x00000003UL << 0) /**< Shifted mode HFCLK8 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 (0x00000004UL << 0) /**< Shifted mode HFCLK16 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 (0x00000005UL << 0) /**< Shifted mode HFCLK32 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 (0x00000006UL << 0) /**< Shifted mode HFCLK64 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 (0x00000007UL << 0) /**< Shifted mode HFCLK128 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 (0x00000008UL << 0) /**< Shifted mode HFCLK256 for CMU_HFCORECLKDIV */
-#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 (0x00000009UL << 0) /**< Shifted mode HFCLK512 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK 0x00000000UL /**< Mode HFCLK for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 0x00000001UL /**< Mode HFCLK2 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 0x00000002UL /**< Mode HFCLK4 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 0x00000003UL /**< Mode HFCLK8 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 0x00000004UL /**< Mode HFCLK16 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 0x00000005UL /**< Mode HFCLK32 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 0x00000006UL /**< Mode HFCLK64 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 0x00000007UL /**< Mode HFCLK128 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 0x00000008UL /**< Mode HFCLK256 for CMU_HFCORECLKDIV */
-#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 0x00000009UL /**< Mode HFCLK512 for CMU_HFCORECLKDIV */
-
-/** Bit fields for CMU HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_RESETVALUE 0x00000100UL /**< Default value for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_MASK 0x0000010FUL /**< Mask for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT 0 /**< Shift value for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK 0xFUL /**< Bit mask for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK (0x00000000UL << 0) /**< Shifted mode HFCLK for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 (0x00000001UL << 0) /**< Shifted mode HFCLK2 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 (0x00000002UL << 0) /**< Shifted mode HFCLK4 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 (0x00000003UL << 0) /**< Shifted mode HFCLK8 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 (0x00000004UL << 0) /**< Shifted mode HFCLK16 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 (0x00000005UL << 0) /**< Shifted mode HFCLK32 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 (0x00000006UL << 0) /**< Shifted mode HFCLK64 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 (0x00000007UL << 0) /**< Shifted mode HFCLK128 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 (0x00000008UL << 0) /**< Shifted mode HFCLK256 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 (0x00000009UL << 0) /**< Shifted mode HFCLK512 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK 0x00000000UL /**< Mode HFCLK for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 0x00000001UL /**< Mode HFCLK2 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 0x00000002UL /**< Mode HFCLK4 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 0x00000003UL /**< Mode HFCLK8 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 0x00000004UL /**< Mode HFCLK16 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 0x00000005UL /**< Mode HFCLK32 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 0x00000006UL /**< Mode HFCLK64 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 0x00000007UL /**< Mode HFCLK128 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 0x00000008UL /**< Mode HFCLK256 for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 0x00000009UL /**< Mode HFCLK512 for CMU_HFPERCLKDIV */
-#define CMU_HFPERCLKDIV_HFPERCLKEN (1 << 8) /**< HFPERCLK Enable */
-#define _CMU_HFPERCLKDIV_HFPERCLKEN_SHIFT 8 /**< Shift value for CMU_HFPERCLKEN */
-#define _CMU_HFPERCLKDIV_HFPERCLKEN_MASK 0x100UL /**< Bit mask for CMU_HFPERCLKEN */
-#define CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT (0x00000001UL << 8) /**< Shifted mode DEFAULT for CMU_HFPERCLKDIV */
-#define _CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKDIV */
-
-/** Bit fields for CMU HFRCOCTRL */
-#define _CMU_HFRCOCTRL_RESETVALUE 0x00000380UL /**< Default value for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_MASK 0x0001F7FFUL /**< Mask for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_TUNING_SHIFT 0 /**< Shift value for CMU_TUNING */
-#define _CMU_HFRCOCTRL_TUNING_MASK 0xFFUL /**< Bit mask for CMU_TUNING */
-#define CMU_HFRCOCTRL_TUNING_DEFAULT (0x00000080UL << 0) /**< Shifted mode DEFAULT for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mode DEFAULT for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_SHIFT 8 /**< Shift value for CMU_BAND */
-#define _CMU_HFRCOCTRL_BAND_MASK 0x700UL /**< Bit mask for CMU_BAND */
-#define CMU_HFRCOCTRL_BAND_1MHZ (0x00000000UL << 8) /**< Shifted mode 1MHZ for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_7MHZ (0x00000001UL << 8) /**< Shifted mode 7MHZ for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_11MHZ (0x00000002UL << 8) /**< Shifted mode 11MHZ for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_DEFAULT (0x00000003UL << 8) /**< Shifted mode DEFAULT for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_14MHZ (0x00000003UL << 8) /**< Shifted mode 14MHZ for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_21MHZ (0x00000004UL << 8) /**< Shifted mode 21MHZ for CMU_HFRCOCTRL */
-#define CMU_HFRCOCTRL_BAND_28MHZ (0x00000005UL << 8) /**< Shifted mode 28MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_1MHZ 0x00000000UL /**< Mode 1MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_7MHZ 0x00000001UL /**< Mode 7MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_11MHZ 0x00000002UL /**< Mode 11MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_DEFAULT 0x00000003UL /**< Mode DEFAULT for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_14MHZ 0x00000003UL /**< Mode 14MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_21MHZ 0x00000004UL /**< Mode 21MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_BAND_28MHZ 0x00000005UL /**< Mode 28MHZ for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_SUDELAY_SHIFT 12 /**< Shift value for CMU_SUDELAY */
-#define _CMU_HFRCOCTRL_SUDELAY_MASK 0x1F000UL /**< Bit mask for CMU_SUDELAY */
-#define CMU_HFRCOCTRL_SUDELAY_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for CMU_HFRCOCTRL */
-#define _CMU_HFRCOCTRL_SUDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_HFRCOCTRL */
-
-/** Bit fields for CMU LFRCOCTRL */
-#define _CMU_LFRCOCTRL_RESETVALUE 0x00000040UL /**< Default value for CMU_LFRCOCTRL */
-#define _CMU_LFRCOCTRL_MASK 0x0000007FUL /**< Mask for CMU_LFRCOCTRL */
-#define _CMU_LFRCOCTRL_TUNING_SHIFT 0 /**< Shift value for CMU_TUNING */
-#define _CMU_LFRCOCTRL_TUNING_MASK 0x7FUL /**< Bit mask for CMU_TUNING */
-#define CMU_LFRCOCTRL_TUNING_DEFAULT (0x00000040UL << 0) /**< Shifted mode DEFAULT for CMU_LFRCOCTRL */
-#define _CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000040UL /**< Mode DEFAULT for CMU_LFRCOCTRL */
-
-/** Bit fields for CMU AUXHFRCOCTRL */
-#define _CMU_AUXHFRCOCTRL_RESETVALUE 0x00000080UL /**< Default value for CMU_AUXHFRCOCTRL */
-#define _CMU_AUXHFRCOCTRL_MASK 0x000000FFUL /**< Mask for CMU_AUXHFRCOCTRL */
-#define _CMU_AUXHFRCOCTRL_TUNING_SHIFT 0 /**< Shift value for CMU_TUNING */
-#define _CMU_AUXHFRCOCTRL_TUNING_MASK 0xFFUL /**< Bit mask for CMU_TUNING */
-#define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (0x00000080UL << 0) /**< Shifted mode DEFAULT for CMU_AUXHFRCOCTRL */
-#define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL /**< Mode DEFAULT for CMU_AUXHFRCOCTRL */
-
-/** Bit fields for CMU CALCTRL */
-#define _CMU_CALCTRL_RESETVALUE 0x00000000UL /**< Default value for CMU_CALCTRL */
-#define _CMU_CALCTRL_MASK 0x00000007UL /**< Mask for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_SHIFT 0 /**< Shift value for CMU_REFSEL */
-#define _CMU_CALCTRL_REFSEL_MASK 0x7UL /**< Bit mask for CMU_REFSEL */
-#define CMU_CALCTRL_REFSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_CALCTRL */
-#define CMU_CALCTRL_REFSEL_HFXO (0x00000000UL << 0) /**< Shifted mode HFXO for CMU_CALCTRL */
-#define CMU_CALCTRL_REFSEL_LFXO (0x00000001UL << 0) /**< Shifted mode LFXO for CMU_CALCTRL */
-#define CMU_CALCTRL_REFSEL_HFRCO (0x00000002UL << 0) /**< Shifted mode HFRCO for CMU_CALCTRL */
-#define CMU_CALCTRL_REFSEL_LFRCO (0x00000003UL << 0) /**< Shifted mode LFRCO for CMU_CALCTRL */
-#define CMU_CALCTRL_REFSEL_AUXHFRCO (0x00000004UL << 0) /**< Shifted mode AUXHFRCO for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_HFXO 0x00000000UL /**< Mode HFXO for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_LFXO 0x00000001UL /**< Mode LFXO for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_HFRCO 0x00000002UL /**< Mode HFRCO for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_LFRCO 0x00000003UL /**< Mode LFRCO for CMU_CALCTRL */
-#define _CMU_CALCTRL_REFSEL_AUXHFRCO 0x00000004UL /**< Mode AUXHFRCO for CMU_CALCTRL */
-
-/** Bit fields for CMU CALCNT */
-#define _CMU_CALCNT_RESETVALUE 0x00000000UL /**< Default value for CMU_CALCNT */
-#define _CMU_CALCNT_MASK 0x000FFFFFUL /**< Mask for CMU_CALCNT */
-#define _CMU_CALCNT_CALCNT_SHIFT 0 /**< Shift value for CMU_CALCNT */
-#define _CMU_CALCNT_CALCNT_MASK 0xFFFFFUL /**< Bit mask for CMU_CALCNT */
-#define CMU_CALCNT_CALCNT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_CALCNT */
-#define _CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CALCNT */
-
-/** Bit fields for CMU OSCENCMD */
-#define _CMU_OSCENCMD_RESETVALUE 0x00000000UL /**< Default value for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_MASK 0x000003FFUL /**< Mask for CMU_OSCENCMD */
-#define CMU_OSCENCMD_HFRCOEN (1 << 0) /**< HFRCO Enable */
-#define _CMU_OSCENCMD_HFRCOEN_SHIFT 0 /**< Shift value for CMU_HFRCOEN */
-#define _CMU_OSCENCMD_HFRCOEN_MASK 0x1UL /**< Bit mask for CMU_HFRCOEN */
-#define CMU_OSCENCMD_HFRCOEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_HFRCODIS (1 << 1) /**< HFRCO Disable */
-#define _CMU_OSCENCMD_HFRCODIS_SHIFT 1 /**< Shift value for CMU_HFRCODIS */
-#define _CMU_OSCENCMD_HFRCODIS_MASK 0x2UL /**< Bit mask for CMU_HFRCODIS */
-#define CMU_OSCENCMD_HFRCODIS_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_HFXOEN (1 << 2) /**< HFXO Enable */
-#define _CMU_OSCENCMD_HFXOEN_SHIFT 2 /**< Shift value for CMU_HFXOEN */
-#define _CMU_OSCENCMD_HFXOEN_MASK 0x4UL /**< Bit mask for CMU_HFXOEN */
-#define CMU_OSCENCMD_HFXOEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_HFXODIS (1 << 3) /**< HFXO Disable */
-#define _CMU_OSCENCMD_HFXODIS_SHIFT 3 /**< Shift value for CMU_HFXODIS */
-#define _CMU_OSCENCMD_HFXODIS_MASK 0x8UL /**< Bit mask for CMU_HFXODIS */
-#define CMU_OSCENCMD_HFXODIS_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_AUXHFRCOEN (1 << 4) /**< AUXHFRCO Enable */
-#define _CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4 /**< Shift value for CMU_AUXHFRCOEN */
-#define _CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCOEN */
-#define CMU_OSCENCMD_AUXHFRCOEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_AUXHFRCODIS (1 << 5) /**< AUXHFRCO Disable */
-#define _CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5 /**< Shift value for CMU_AUXHFRCODIS */
-#define _CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL /**< Bit mask for CMU_AUXHFRCODIS */
-#define CMU_OSCENCMD_AUXHFRCODIS_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_LFRCOEN (1 << 6) /**< LFRCO Enable */
-#define _CMU_OSCENCMD_LFRCOEN_SHIFT 6 /**< Shift value for CMU_LFRCOEN */
-#define _CMU_OSCENCMD_LFRCOEN_MASK 0x40UL /**< Bit mask for CMU_LFRCOEN */
-#define CMU_OSCENCMD_LFRCOEN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_LFRCODIS (1 << 7) /**< LFRCO Disable */
-#define _CMU_OSCENCMD_LFRCODIS_SHIFT 7 /**< Shift value for CMU_LFRCODIS */
-#define _CMU_OSCENCMD_LFRCODIS_MASK 0x80UL /**< Bit mask for CMU_LFRCODIS */
-#define CMU_OSCENCMD_LFRCODIS_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_LFXOEN (1 << 8) /**< LFXO Enable */
-#define _CMU_OSCENCMD_LFXOEN_SHIFT 8 /**< Shift value for CMU_LFXOEN */
-#define _CMU_OSCENCMD_LFXOEN_MASK 0x100UL /**< Bit mask for CMU_LFXOEN */
-#define CMU_OSCENCMD_LFXOEN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-#define CMU_OSCENCMD_LFXODIS (1 << 9) /**< LFXO Disable */
-#define _CMU_OSCENCMD_LFXODIS_SHIFT 9 /**< Shift value for CMU_LFXODIS */
-#define _CMU_OSCENCMD_LFXODIS_MASK 0x200UL /**< Bit mask for CMU_LFXODIS */
-#define CMU_OSCENCMD_LFXODIS_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for CMU_OSCENCMD */
-#define _CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_OSCENCMD */
-
-/** Bit fields for CMU CMD */
-#define _CMU_CMD_RESETVALUE 0x00000000UL /**< Default value for CMU_CMD */
-#define _CMU_CMD_MASK 0x0000000FUL /**< Mask for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_SHIFT 0 /**< Shift value for CMU_HFCLKSEL */
-#define _CMU_CMD_HFCLKSEL_MASK 0x7UL /**< Bit mask for CMU_HFCLKSEL */
-#define CMU_CMD_HFCLKSEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_CMD */
-#define CMU_CMD_HFCLKSEL_HFRCO (0x00000001UL << 0) /**< Shifted mode HFRCO for CMU_CMD */
-#define CMU_CMD_HFCLKSEL_HFXO (0x00000002UL << 0) /**< Shifted mode HFXO for CMU_CMD */
-#define CMU_CMD_HFCLKSEL_LFRCO (0x00000003UL << 0) /**< Shifted mode LFRCO for CMU_CMD */
-#define CMU_CMD_HFCLKSEL_LFXO (0x00000004UL << 0) /**< Shifted mode LFXO for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_HFRCO 0x00000001UL /**< Mode HFRCO for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_HFXO 0x00000002UL /**< Mode HFXO for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_LFRCO 0x00000003UL /**< Mode LFRCO for CMU_CMD */
-#define _CMU_CMD_HFCLKSEL_LFXO 0x00000004UL /**< Mode LFXO for CMU_CMD */
-#define CMU_CMD_CALSTART (1 << 3) /**< Calibration Start */
-#define _CMU_CMD_CALSTART_SHIFT 3 /**< Shift value for CMU_CALSTART */
-#define _CMU_CMD_CALSTART_MASK 0x8UL /**< Bit mask for CMU_CALSTART */
-#define CMU_CMD_CALSTART_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_CMD */
-#define _CMU_CMD_CALSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_CMD */
-
-/** Bit fields for CMU LFCLKSEL */
-#define _CMU_LFCLKSEL_RESETVALUE 0x00000005UL /**< Default value for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_MASK 0x0000000FUL /**< Mask for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_SHIFT 0 /**< Shift value for CMU_LFA */
-#define _CMU_LFCLKSEL_LFA_MASK 0x3UL /**< Bit mask for CMU_LFA */
-#define CMU_LFCLKSEL_LFA_DISABLED (0x00000000UL << 0) /**< Shifted mode DISABLED for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFA_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFA_LFRCO (0x00000001UL << 0) /**< Shifted mode LFRCO for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFA_LFXO (0x00000002UL << 0) /**< Shifted mode LFXO for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 (0x00000003UL << 0) /**< Shifted mode HFCORECLKLEDIV2 for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_DISABLED 0x00000000UL /**< Mode DISABLED for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_LFRCO 0x00000001UL /**< Mode LFRCO for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_LFXO 0x00000002UL /**< Mode LFXO for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 0x00000003UL /**< Mode HFCORECLKLEDIV2 for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_SHIFT 2 /**< Shift value for CMU_LFB */
-#define _CMU_LFCLKSEL_LFB_MASK 0xCUL /**< Bit mask for CMU_LFB */
-#define CMU_LFCLKSEL_LFB_DISABLED (0x00000000UL << 2) /**< Shifted mode DISABLED for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFB_DEFAULT (0x00000001UL << 2) /**< Shifted mode DEFAULT for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFB_LFRCO (0x00000001UL << 2) /**< Shifted mode LFRCO for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFB_LFXO (0x00000002UL << 2) /**< Shifted mode LFXO for CMU_LFCLKSEL */
-#define CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 (0x00000003UL << 2) /**< Shifted mode HFCORECLKLEDIV2 for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_DISABLED 0x00000000UL /**< Mode DISABLED for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_LFRCO 0x00000001UL /**< Mode LFRCO for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_LFXO 0x00000002UL /**< Mode LFXO for CMU_LFCLKSEL */
-#define _CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 0x00000003UL /**< Mode HFCORECLKLEDIV2 for CMU_LFCLKSEL */
-
-/** Bit fields for CMU STATUS */
-#define _CMU_STATUS_RESETVALUE 0x00000403UL /**< Default value for CMU_STATUS */
-#define _CMU_STATUS_MASK 0x00007FFFUL /**< Mask for CMU_STATUS */
-#define CMU_STATUS_HFRCOENS (1 << 0) /**< HFRCO Enable Status */
-#define _CMU_STATUS_HFRCOENS_SHIFT 0 /**< Shift value for CMU_HFRCOENS */
-#define _CMU_STATUS_HFRCOENS_MASK 0x1UL /**< Bit mask for CMU_HFRCOENS */
-#define CMU_STATUS_HFRCOENS_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_HFRCORDY (1 << 1) /**< HFRCO Ready */
-#define _CMU_STATUS_HFRCORDY_SHIFT 1 /**< Shift value for CMU_HFRCORDY */
-#define _CMU_STATUS_HFRCORDY_MASK 0x2UL /**< Bit mask for CMU_HFRCORDY */
-#define CMU_STATUS_HFRCORDY_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_HFXOENS (1 << 2) /**< HFXO Enable Status */
-#define _CMU_STATUS_HFXOENS_SHIFT 2 /**< Shift value for CMU_HFXOENS */
-#define _CMU_STATUS_HFXOENS_MASK 0x4UL /**< Bit mask for CMU_HFXOENS */
-#define CMU_STATUS_HFXOENS_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_HFXORDY (1 << 3) /**< HFXO Ready */
-#define _CMU_STATUS_HFXORDY_SHIFT 3 /**< Shift value for CMU_HFXORDY */
-#define _CMU_STATUS_HFXORDY_MASK 0x8UL /**< Bit mask for CMU_HFXORDY */
-#define CMU_STATUS_HFXORDY_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_AUXHFRCOENS (1 << 4) /**< AUXHFRCO Enable Status */
-#define _CMU_STATUS_AUXHFRCOENS_SHIFT 4 /**< Shift value for CMU_AUXHFRCOENS */
-#define _CMU_STATUS_AUXHFRCOENS_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCOENS */
-#define CMU_STATUS_AUXHFRCOENS_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_AUXHFRCORDY (1 << 5) /**< AUXHFRCO Ready */
-#define _CMU_STATUS_AUXHFRCORDY_SHIFT 5 /**< Shift value for CMU_AUXHFRCORDY */
-#define _CMU_STATUS_AUXHFRCORDY_MASK 0x20UL /**< Bit mask for CMU_AUXHFRCORDY */
-#define CMU_STATUS_AUXHFRCORDY_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFRCOENS (1 << 6) /**< LFRCO Enable Status */
-#define _CMU_STATUS_LFRCOENS_SHIFT 6 /**< Shift value for CMU_LFRCOENS */
-#define _CMU_STATUS_LFRCOENS_MASK 0x40UL /**< Bit mask for CMU_LFRCOENS */
-#define CMU_STATUS_LFRCOENS_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFRCORDY (1 << 7) /**< LFRCO Ready */
-#define _CMU_STATUS_LFRCORDY_SHIFT 7 /**< Shift value for CMU_LFRCORDY */
-#define _CMU_STATUS_LFRCORDY_MASK 0x80UL /**< Bit mask for CMU_LFRCORDY */
-#define CMU_STATUS_LFRCORDY_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFXOENS (1 << 8) /**< LFXO Enable Status */
-#define _CMU_STATUS_LFXOENS_SHIFT 8 /**< Shift value for CMU_LFXOENS */
-#define _CMU_STATUS_LFXOENS_MASK 0x100UL /**< Bit mask for CMU_LFXOENS */
-#define CMU_STATUS_LFXOENS_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFXORDY (1 << 9) /**< LFXO Ready */
-#define _CMU_STATUS_LFXORDY_SHIFT 9 /**< Shift value for CMU_LFXORDY */
-#define _CMU_STATUS_LFXORDY_MASK 0x200UL /**< Bit mask for CMU_LFXORDY */
-#define CMU_STATUS_LFXORDY_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_HFRCOSEL (1 << 10) /**< HFRCO Selected */
-#define _CMU_STATUS_HFRCOSEL_SHIFT 10 /**< Shift value for CMU_HFRCOSEL */
-#define _CMU_STATUS_HFRCOSEL_MASK 0x400UL /**< Bit mask for CMU_HFRCOSEL */
-#define CMU_STATUS_HFRCOSEL_DEFAULT (0x00000001UL << 10) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFRCOSEL_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_HFXOSEL (1 << 11) /**< HFXO Selected */
-#define _CMU_STATUS_HFXOSEL_SHIFT 11 /**< Shift value for CMU_HFXOSEL */
-#define _CMU_STATUS_HFXOSEL_MASK 0x800UL /**< Bit mask for CMU_HFXOSEL */
-#define CMU_STATUS_HFXOSEL_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_HFXOSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFRCOSEL (1 << 12) /**< HFRCO Selected */
-#define _CMU_STATUS_LFRCOSEL_SHIFT 12 /**< Shift value for CMU_LFRCOSEL */
-#define _CMU_STATUS_LFRCOSEL_MASK 0x1000UL /**< Bit mask for CMU_LFRCOSEL */
-#define CMU_STATUS_LFRCOSEL_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFRCOSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_LFXOSEL (1 << 13) /**< HFXO Selected */
-#define _CMU_STATUS_LFXOSEL_SHIFT 13 /**< Shift value for CMU_LFXOSEL */
-#define _CMU_STATUS_LFXOSEL_MASK 0x2000UL /**< Bit mask for CMU_LFXOSEL */
-#define CMU_STATUS_LFXOSEL_DEFAULT (0x00000000UL << 13) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_LFXOSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-#define CMU_STATUS_CALBSY (1 << 14) /**< Calibration Busy */
-#define _CMU_STATUS_CALBSY_SHIFT 14 /**< Shift value for CMU_CALBSY */
-#define _CMU_STATUS_CALBSY_MASK 0x4000UL /**< Bit mask for CMU_CALBSY */
-#define CMU_STATUS_CALBSY_DEFAULT (0x00000000UL << 14) /**< Shifted mode DEFAULT for CMU_STATUS */
-#define _CMU_STATUS_CALBSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_STATUS */
-
-/** Bit fields for CMU IF */
-#define _CMU_IF_RESETVALUE 0x00000001UL /**< Default value for CMU_IF */
-#define _CMU_IF_MASK 0x0000003FUL /**< Mask for CMU_IF */
-#define CMU_IF_HFRCORDY (1 << 0) /**< HFRCO Ready Interrupt Flag */
-#define _CMU_IF_HFRCORDY_SHIFT 0 /**< Shift value for CMU_HFRCORDY */
-#define _CMU_IF_HFRCORDY_MASK 0x1UL /**< Bit mask for CMU_HFRCORDY */
-#define CMU_IF_HFRCORDY_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_HFRCORDY_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_IF */
-#define CMU_IF_HFXORDY (1 << 1) /**< HFXO Ready Interrupt Flag */
-#define _CMU_IF_HFXORDY_SHIFT 1 /**< Shift value for CMU_HFXORDY */
-#define _CMU_IF_HFXORDY_MASK 0x2UL /**< Bit mask for CMU_HFXORDY */
-#define CMU_IF_HFXORDY_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_HFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IF */
-#define CMU_IF_LFRCORDY (1 << 2) /**< LFRCO Ready Interrupt Flag */
-#define _CMU_IF_LFRCORDY_SHIFT 2 /**< Shift value for CMU_LFRCORDY */
-#define _CMU_IF_LFRCORDY_MASK 0x4UL /**< Bit mask for CMU_LFRCORDY */
-#define CMU_IF_LFRCORDY_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_LFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IF */
-#define CMU_IF_LFXORDY (1 << 3) /**< LFXO Ready Interrupt Flag */
-#define _CMU_IF_LFXORDY_SHIFT 3 /**< Shift value for CMU_LFXORDY */
-#define _CMU_IF_LFXORDY_MASK 0x8UL /**< Bit mask for CMU_LFXORDY */
-#define CMU_IF_LFXORDY_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_LFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IF */
-#define CMU_IF_AUXHFRCORDY (1 << 4) /**< AUXHFRCO Ready Interrupt Flag */
-#define _CMU_IF_AUXHFRCORDY_SHIFT 4 /**< Shift value for CMU_AUXHFRCORDY */
-#define _CMU_IF_AUXHFRCORDY_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCORDY */
-#define CMU_IF_AUXHFRCORDY_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IF */
-#define CMU_IF_CALRDY (1 << 5) /**< Calibration Ready Interrupt Flag */
-#define _CMU_IF_CALRDY_SHIFT 5 /**< Shift value for CMU_CALRDY */
-#define _CMU_IF_CALRDY_MASK 0x20UL /**< Bit mask for CMU_CALRDY */
-#define CMU_IF_CALRDY_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_IF */
-#define _CMU_IF_CALRDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IF */
-
-/** Bit fields for CMU IFS */
-#define _CMU_IFS_RESETVALUE 0x00000000UL /**< Default value for CMU_IFS */
-#define _CMU_IFS_MASK 0x0000003FUL /**< Mask for CMU_IFS */
-#define CMU_IFS_HFRCORDY (1 << 0) /**< HFRCO Ready Interrupt Flag Set */
-#define _CMU_IFS_HFRCORDY_SHIFT 0 /**< Shift value for CMU_HFRCORDY */
-#define _CMU_IFS_HFRCORDY_MASK 0x1UL /**< Bit mask for CMU_HFRCORDY */
-#define CMU_IFS_HFRCORDY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-#define CMU_IFS_HFXORDY (1 << 1) /**< HFXO Ready Interrupt Flag Set */
-#define _CMU_IFS_HFXORDY_SHIFT 1 /**< Shift value for CMU_HFXORDY */
-#define _CMU_IFS_HFXORDY_MASK 0x2UL /**< Bit mask for CMU_HFXORDY */
-#define CMU_IFS_HFXORDY_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_HFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-#define CMU_IFS_LFRCORDY (1 << 2) /**< LFRCO Ready Interrupt Flag Set */
-#define _CMU_IFS_LFRCORDY_SHIFT 2 /**< Shift value for CMU_LFRCORDY */
-#define _CMU_IFS_LFRCORDY_MASK 0x4UL /**< Bit mask for CMU_LFRCORDY */
-#define CMU_IFS_LFRCORDY_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-#define CMU_IFS_LFXORDY (1 << 3) /**< LFXO Ready Interrupt Flag Set */
-#define _CMU_IFS_LFXORDY_SHIFT 3 /**< Shift value for CMU_LFXORDY */
-#define _CMU_IFS_LFXORDY_MASK 0x8UL /**< Bit mask for CMU_LFXORDY */
-#define CMU_IFS_LFXORDY_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_LFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-#define CMU_IFS_AUXHFRCORDY (1 << 4) /**< AUXHFRCO Ready Interrupt Flag Set */
-#define _CMU_IFS_AUXHFRCORDY_SHIFT 4 /**< Shift value for CMU_AUXHFRCORDY */
-#define _CMU_IFS_AUXHFRCORDY_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCORDY */
-#define CMU_IFS_AUXHFRCORDY_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-#define CMU_IFS_CALRDY (1 << 5) /**< Calibration Ready Interrupt Flag Set */
-#define _CMU_IFS_CALRDY_SHIFT 5 /**< Shift value for CMU_CALRDY */
-#define _CMU_IFS_CALRDY_MASK 0x20UL /**< Bit mask for CMU_CALRDY */
-#define CMU_IFS_CALRDY_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_IFS */
-#define _CMU_IFS_CALRDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFS */
-
-/** Bit fields for CMU IFC */
-#define _CMU_IFC_RESETVALUE 0x00000000UL /**< Default value for CMU_IFC */
-#define _CMU_IFC_MASK 0x0000003FUL /**< Mask for CMU_IFC */
-#define CMU_IFC_HFRCORDY (1 << 0) /**< HFRCO Ready Interrupt Flag Clear */
-#define _CMU_IFC_HFRCORDY_SHIFT 0 /**< Shift value for CMU_HFRCORDY */
-#define _CMU_IFC_HFRCORDY_MASK 0x1UL /**< Bit mask for CMU_HFRCORDY */
-#define CMU_IFC_HFRCORDY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-#define CMU_IFC_HFXORDY (1 << 1) /**< HFXO Ready Interrupt Flag Clear */
-#define _CMU_IFC_HFXORDY_SHIFT 1 /**< Shift value for CMU_HFXORDY */
-#define _CMU_IFC_HFXORDY_MASK 0x2UL /**< Bit mask for CMU_HFXORDY */
-#define CMU_IFC_HFXORDY_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_HFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-#define CMU_IFC_LFRCORDY (1 << 2) /**< LFRCO Ready Interrupt Flag Clear */
-#define _CMU_IFC_LFRCORDY_SHIFT 2 /**< Shift value for CMU_LFRCORDY */
-#define _CMU_IFC_LFRCORDY_MASK 0x4UL /**< Bit mask for CMU_LFRCORDY */
-#define CMU_IFC_LFRCORDY_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-#define CMU_IFC_LFXORDY (1 << 3) /**< LFXO Ready Interrupt Flag Clear */
-#define _CMU_IFC_LFXORDY_SHIFT 3 /**< Shift value for CMU_LFXORDY */
-#define _CMU_IFC_LFXORDY_MASK 0x8UL /**< Bit mask for CMU_LFXORDY */
-#define CMU_IFC_LFXORDY_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_LFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-#define CMU_IFC_AUXHFRCORDY (1 << 4) /**< AUXHFRCO Ready Interrupt Flag Clear */
-#define _CMU_IFC_AUXHFRCORDY_SHIFT 4 /**< Shift value for CMU_AUXHFRCORDY */
-#define _CMU_IFC_AUXHFRCORDY_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCORDY */
-#define CMU_IFC_AUXHFRCORDY_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-#define CMU_IFC_CALRDY (1 << 5) /**< Calibration Ready Interrupt Flag Clear */
-#define _CMU_IFC_CALRDY_SHIFT 5 /**< Shift value for CMU_CALRDY */
-#define _CMU_IFC_CALRDY_MASK 0x20UL /**< Bit mask for CMU_CALRDY */
-#define CMU_IFC_CALRDY_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_IFC */
-#define _CMU_IFC_CALRDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IFC */
-
-/** Bit fields for CMU IEN */
-#define _CMU_IEN_RESETVALUE 0x00000000UL /**< Default value for CMU_IEN */
-#define _CMU_IEN_MASK 0x0000003FUL /**< Mask for CMU_IEN */
-#define CMU_IEN_HFRCORDY (1 << 0) /**< HFRCO Ready Interrupt Enable */
-#define _CMU_IEN_HFRCORDY_SHIFT 0 /**< Shift value for CMU_HFRCORDY */
-#define _CMU_IEN_HFRCORDY_MASK 0x1UL /**< Bit mask for CMU_HFRCORDY */
-#define CMU_IEN_HFRCORDY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-#define CMU_IEN_HFXORDY (1 << 1) /**< HFXO Ready Interrupt Enable */
-#define _CMU_IEN_HFXORDY_SHIFT 1 /**< Shift value for CMU_HFXORDY */
-#define _CMU_IEN_HFXORDY_MASK 0x2UL /**< Bit mask for CMU_HFXORDY */
-#define CMU_IEN_HFXORDY_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_HFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-#define CMU_IEN_LFRCORDY (1 << 2) /**< LFRCO Ready Interrupt Enable */
-#define _CMU_IEN_LFRCORDY_SHIFT 2 /**< Shift value for CMU_LFRCORDY */
-#define _CMU_IEN_LFRCORDY_MASK 0x4UL /**< Bit mask for CMU_LFRCORDY */
-#define CMU_IEN_LFRCORDY_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-#define CMU_IEN_LFXORDY (1 << 3) /**< LFXO Ready Interrupt Enable */
-#define _CMU_IEN_LFXORDY_SHIFT 3 /**< Shift value for CMU_LFXORDY */
-#define _CMU_IEN_LFXORDY_MASK 0x8UL /**< Bit mask for CMU_LFXORDY */
-#define CMU_IEN_LFXORDY_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_LFXORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-#define CMU_IEN_AUXHFRCORDY (1 << 4) /**< AUXHFRCO Ready Interrupt Enable */
-#define _CMU_IEN_AUXHFRCORDY_SHIFT 4 /**< Shift value for CMU_AUXHFRCORDY */
-#define _CMU_IEN_AUXHFRCORDY_MASK 0x10UL /**< Bit mask for CMU_AUXHFRCORDY */
-#define CMU_IEN_AUXHFRCORDY_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-#define CMU_IEN_CALRDY (1 << 5) /**< Calibration Ready Interrupt Enable */
-#define _CMU_IEN_CALRDY_SHIFT 5 /**< Shift value for CMU_CALRDY */
-#define _CMU_IEN_CALRDY_MASK 0x20UL /**< Bit mask for CMU_CALRDY */
-#define CMU_IEN_CALRDY_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_IEN */
-#define _CMU_IEN_CALRDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_IEN */
-
-/** Bit fields for CMU HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_RESETVALUE 0x0000000FUL /**< Default value for CMU_HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_MASK 0x0000000FUL /**< Mask for CMU_HFCORECLKEN0 */
-#define CMU_HFCORECLKEN0_AES (1 << 0) /**< Advanced Encryption Standard Accelerator Clock Enable */
-#define _CMU_HFCORECLKEN0_AES_SHIFT 0 /**< Shift value for CMU_AES */
-#define _CMU_HFCORECLKEN0_AES_MASK 0x1UL /**< Bit mask for CMU_AES */
-#define CMU_HFCORECLKEN0_AES_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFCORECLKEN0 */
-#define CMU_HFCORECLKEN0_DMA (1 << 1) /**< Direct Memory Access Controller Clock Enable */
-#define _CMU_HFCORECLKEN0_DMA_SHIFT 1 /**< Shift value for CMU_DMA */
-#define _CMU_HFCORECLKEN0_DMA_MASK 0x2UL /**< Bit mask for CMU_DMA */
-#define CMU_HFCORECLKEN0_DMA_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for CMU_HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_DMA_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFCORECLKEN0 */
-#define CMU_HFCORECLKEN0_LE (1 << 2) /**< Low Energy Peripheral Interface Clock Enable */
-#define _CMU_HFCORECLKEN0_LE_SHIFT 2 /**< Shift value for CMU_LE */
-#define _CMU_HFCORECLKEN0_LE_MASK 0x4UL /**< Bit mask for CMU_LE */
-#define CMU_HFCORECLKEN0_LE_DEFAULT (0x00000001UL << 2) /**< Shifted mode DEFAULT for CMU_HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_LE_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFCORECLKEN0 */
-#define CMU_HFCORECLKEN0_EBI (1 << 3) /**< External Bus Interface Clock Enable */
-#define _CMU_HFCORECLKEN0_EBI_SHIFT 3 /**< Shift value for CMU_EBI */
-#define _CMU_HFCORECLKEN0_EBI_MASK 0x8UL /**< Bit mask for CMU_EBI */
-#define CMU_HFCORECLKEN0_EBI_DEFAULT (0x00000001UL << 3) /**< Shifted mode DEFAULT for CMU_HFCORECLKEN0 */
-#define _CMU_HFCORECLKEN0_EBI_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFCORECLKEN0 */
-
-/** Bit fields for CMU HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_RESETVALUE 0x0000FFFFUL /**< Default value for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_MASK 0x0000FFFFUL /**< Mask for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_USART0 (1 << 0) /**< Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_USART0_SHIFT 0 /**< Shift value for CMU_USART0 */
-#define _CMU_HFPERCLKEN0_USART0_MASK 0x1UL /**< Bit mask for CMU_USART0 */
-#define CMU_HFPERCLKEN0_USART0_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_USART1 (1 << 1) /**< Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable */
-#define _CMU_HFPERCLKEN0_USART1_SHIFT 1 /**< Shift value for CMU_USART1 */
-#define _CMU_HFPERCLKEN0_USART1_MASK 0x2UL /**< Bit mask for CMU_USART1 */
-#define CMU_HFPERCLKEN0_USART1_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_USART2 (1 << 2) /**< Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable */
-#define _CMU_HFPERCLKEN0_USART2_SHIFT 2 /**< Shift value for CMU_USART2 */
-#define _CMU_HFPERCLKEN0_USART2_MASK 0x4UL /**< Bit mask for CMU_USART2 */
-#define CMU_HFPERCLKEN0_USART2_DEFAULT (0x00000001UL << 2) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_UART0 (1 << 3) /**< Universal Asynchronous Receiver/Transmitter 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_UART0_SHIFT 3 /**< Shift value for CMU_UART0 */
-#define _CMU_HFPERCLKEN0_UART0_MASK 0x8UL /**< Bit mask for CMU_UART0 */
-#define CMU_HFPERCLKEN0_UART0_DEFAULT (0x00000001UL << 3) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_UART0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_TIMER0 (1 << 4) /**< Timer 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_TIMER0_SHIFT 4 /**< Shift value for CMU_TIMER0 */
-#define _CMU_HFPERCLKEN0_TIMER0_MASK 0x10UL /**< Bit mask for CMU_TIMER0 */
-#define CMU_HFPERCLKEN0_TIMER0_DEFAULT (0x00000001UL << 4) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_TIMER1 (1 << 5) /**< Timer 1 Clock Enable */
-#define _CMU_HFPERCLKEN0_TIMER1_SHIFT 5 /**< Shift value for CMU_TIMER1 */
-#define _CMU_HFPERCLKEN0_TIMER1_MASK 0x20UL /**< Bit mask for CMU_TIMER1 */
-#define CMU_HFPERCLKEN0_TIMER1_DEFAULT (0x00000001UL << 5) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_TIMER2 (1 << 6) /**< Timer 2 Clock Enable */
-#define _CMU_HFPERCLKEN0_TIMER2_SHIFT 6 /**< Shift value for CMU_TIMER2 */
-#define _CMU_HFPERCLKEN0_TIMER2_MASK 0x40UL /**< Bit mask for CMU_TIMER2 */
-#define CMU_HFPERCLKEN0_TIMER2_DEFAULT (0x00000001UL << 6) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_ACMP0 (1 << 7) /**< Analog Comparator 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_ACMP0_SHIFT 7 /**< Shift value for CMU_ACMP0 */
-#define _CMU_HFPERCLKEN0_ACMP0_MASK 0x80UL /**< Bit mask for CMU_ACMP0 */
-#define CMU_HFPERCLKEN0_ACMP0_DEFAULT (0x00000001UL << 7) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_ACMP1 (1 << 8) /**< Analog Comparator 1 Clock Enable */
-#define _CMU_HFPERCLKEN0_ACMP1_SHIFT 8 /**< Shift value for CMU_ACMP1 */
-#define _CMU_HFPERCLKEN0_ACMP1_MASK 0x100UL /**< Bit mask for CMU_ACMP1 */
-#define CMU_HFPERCLKEN0_ACMP1_DEFAULT (0x00000001UL << 8) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_PRS (1 << 10) /**< Peripheral Reflex System Clock Enable */
-#define _CMU_HFPERCLKEN0_PRS_SHIFT 10 /**< Shift value for CMU_PRS */
-#define _CMU_HFPERCLKEN0_PRS_MASK 0x400UL /**< Bit mask for CMU_PRS */
-#define CMU_HFPERCLKEN0_PRS_DEFAULT (0x00000001UL << 10) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_PRS_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_DAC0 (1 << 11) /**< Digital to Analog Converter 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_DAC0_SHIFT 11 /**< Shift value for CMU_DAC0 */
-#define _CMU_HFPERCLKEN0_DAC0_MASK 0x800UL /**< Bit mask for CMU_DAC0 */
-#define CMU_HFPERCLKEN0_DAC0_DEFAULT (0x00000001UL << 11) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_DAC0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_GPIO (1 << 12) /**< General purpose Input/Output Clock Enable */
-#define _CMU_HFPERCLKEN0_GPIO_SHIFT 12 /**< Shift value for CMU_GPIO */
-#define _CMU_HFPERCLKEN0_GPIO_MASK 0x1000UL /**< Bit mask for CMU_GPIO */
-#define CMU_HFPERCLKEN0_GPIO_DEFAULT (0x00000001UL << 12) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_GPIO_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_VCMP (1 << 13) /**< Voltage Comparator Clock Enable */
-#define _CMU_HFPERCLKEN0_VCMP_SHIFT 13 /**< Shift value for CMU_VCMP */
-#define _CMU_HFPERCLKEN0_VCMP_MASK 0x2000UL /**< Bit mask for CMU_VCMP */
-#define CMU_HFPERCLKEN0_VCMP_DEFAULT (0x00000001UL << 13) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_VCMP_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_ADC0 (1 << 14) /**< Analog to Digital Converter 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_ADC0_SHIFT 14 /**< Shift value for CMU_ADC0 */
-#define _CMU_HFPERCLKEN0_ADC0_MASK 0x4000UL /**< Bit mask for CMU_ADC0 */
-#define CMU_HFPERCLKEN0_ADC0_DEFAULT (0x00000001UL << 14) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-#define CMU_HFPERCLKEN0_I2C0 (1 << 15) /**< I2C 0 Clock Enable */
-#define _CMU_HFPERCLKEN0_I2C0_SHIFT 15 /**< Shift value for CMU_I2C0 */
-#define _CMU_HFPERCLKEN0_I2C0_MASK 0x8000UL /**< Bit mask for CMU_I2C0 */
-#define CMU_HFPERCLKEN0_I2C0_DEFAULT (0x00000001UL << 15) /**< Shifted mode DEFAULT for CMU_HFPERCLKEN0 */
-#define _CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_HFPERCLKEN0 */
-
-/** Bit fields for CMU SYNCBUSY */
-#define _CMU_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for CMU_SYNCBUSY */
-#define _CMU_SYNCBUSY_MASK 0x00000055UL /**< Mask for CMU_SYNCBUSY */
-#define CMU_SYNCBUSY_LFACLKEN0 (1 << 0) /**< Low Frequency A Clock Enable 0 Busy */
-#define _CMU_SYNCBUSY_LFACLKEN0_SHIFT 0 /**< Shift value for CMU_LFACLKEN0 */
-#define _CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL /**< Bit mask for CMU_LFACLKEN0 */
-#define CMU_SYNCBUSY_LFACLKEN0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_SYNCBUSY */
-#define _CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_SYNCBUSY */
-#define CMU_SYNCBUSY_LFAPRESC0 (1 << 2) /**< Low Frequency A Prescaler 0 Busy */
-#define _CMU_SYNCBUSY_LFAPRESC0_SHIFT 2 /**< Shift value for CMU_LFAPRESC0 */
-#define _CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL /**< Bit mask for CMU_LFAPRESC0 */
-#define CMU_SYNCBUSY_LFAPRESC0_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_SYNCBUSY */
-#define _CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_SYNCBUSY */
-#define CMU_SYNCBUSY_LFBCLKEN0 (1 << 4) /**< Low Frequency B Clock Enable 0 Busy */
-#define _CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4 /**< Shift value for CMU_LFBCLKEN0 */
-#define _CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL /**< Bit mask for CMU_LFBCLKEN0 */
-#define CMU_SYNCBUSY_LFBCLKEN0_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for CMU_SYNCBUSY */
-#define _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_SYNCBUSY */
-#define CMU_SYNCBUSY_LFBPRESC0 (1 << 6) /**< Low Frequency B Prescaler 0 Busy */
-#define _CMU_SYNCBUSY_LFBPRESC0_SHIFT 6 /**< Shift value for CMU_LFBPRESC0 */
-#define _CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL /**< Bit mask for CMU_LFBPRESC0 */
-#define CMU_SYNCBUSY_LFBPRESC0_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for CMU_SYNCBUSY */
-#define _CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_SYNCBUSY */
-
-/** Bit fields for CMU FREEZE */
-#define _CMU_FREEZE_RESETVALUE 0x00000000UL /**< Default value for CMU_FREEZE */
-#define _CMU_FREEZE_MASK 0x00000001UL /**< Mask for CMU_FREEZE */
-#define CMU_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _CMU_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for CMU_REGFREEZE */
-#define _CMU_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for CMU_REGFREEZE */
-#define CMU_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_FREEZE */
-#define CMU_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for CMU_FREEZE */
-#define CMU_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for CMU_FREEZE */
-#define _CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_FREEZE */
-#define _CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for CMU_FREEZE */
-#define _CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for CMU_FREEZE */
-
-/** Bit fields for CMU LFACLKEN0 */
-#define _CMU_LFACLKEN0_RESETVALUE 0x00000007UL /**< Default value for CMU_LFACLKEN0 */
-#define _CMU_LFACLKEN0_MASK 0x00000007UL /**< Mask for CMU_LFACLKEN0 */
-#define CMU_LFACLKEN0_RTC (1 << 0) /**< Real-Time Counter Clock Enable */
-#define _CMU_LFACLKEN0_RTC_SHIFT 0 /**< Shift value for CMU_RTC */
-#define _CMU_LFACLKEN0_RTC_MASK 0x1UL /**< Bit mask for CMU_RTC */
-#define CMU_LFACLKEN0_RTC_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_LFACLKEN0 */
-#define _CMU_LFACLKEN0_RTC_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFACLKEN0 */
-#define CMU_LFACLKEN0_LETIMER0 (1 << 1) /**< Low Energy Timer 0 Clock Enable */
-#define _CMU_LFACLKEN0_LETIMER0_SHIFT 1 /**< Shift value for CMU_LETIMER0 */
-#define _CMU_LFACLKEN0_LETIMER0_MASK 0x2UL /**< Bit mask for CMU_LETIMER0 */
-#define CMU_LFACLKEN0_LETIMER0_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for CMU_LFACLKEN0 */
-#define _CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFACLKEN0 */
-#define CMU_LFACLKEN0_LCD (1 << 2) /**< Liquid Crystal Display Controller Clock Enable */
-#define _CMU_LFACLKEN0_LCD_SHIFT 2 /**< Shift value for CMU_LCD */
-#define _CMU_LFACLKEN0_LCD_MASK 0x4UL /**< Bit mask for CMU_LCD */
-#define CMU_LFACLKEN0_LCD_DEFAULT (0x00000001UL << 2) /**< Shifted mode DEFAULT for CMU_LFACLKEN0 */
-#define _CMU_LFACLKEN0_LCD_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFACLKEN0 */
-
-/** Bit fields for CMU LFBCLKEN0 */
-#define _CMU_LFBCLKEN0_RESETVALUE 0x00000003UL /**< Default value for CMU_LFBCLKEN0 */
-#define _CMU_LFBCLKEN0_MASK 0x00000003UL /**< Mask for CMU_LFBCLKEN0 */
-#define CMU_LFBCLKEN0_LEUART0 (1 << 0) /**< Low Energy UART 0 Clock Enable */
-#define _CMU_LFBCLKEN0_LEUART0_SHIFT 0 /**< Shift value for CMU_LEUART0 */
-#define _CMU_LFBCLKEN0_LEUART0_MASK 0x1UL /**< Bit mask for CMU_LEUART0 */
-#define CMU_LFBCLKEN0_LEUART0_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_LFBCLKEN0 */
-#define _CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFBCLKEN0 */
-#define CMU_LFBCLKEN0_LEUART1 (1 << 1) /**< Low Energy UART 1 Clock Enable */
-#define _CMU_LFBCLKEN0_LEUART1_SHIFT 1 /**< Shift value for CMU_LEUART1 */
-#define _CMU_LFBCLKEN0_LEUART1_MASK 0x2UL /**< Bit mask for CMU_LEUART1 */
-#define CMU_LFBCLKEN0_LEUART1_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for CMU_LFBCLKEN0 */
-#define _CMU_LFBCLKEN0_LEUART1_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_LFBCLKEN0 */
-
-/** Bit fields for CMU LFAPRESC0 */
-#define _CMU_LFAPRESC0_RESETVALUE 0x00000000UL /**< Default value for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_MASK 0x000003FFUL /**< Mask for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_SHIFT 0 /**< Shift value for CMU_RTC */
-#define _CMU_LFAPRESC0_RTC_MASK 0xFUL /**< Bit mask for CMU_RTC */
-#define CMU_LFAPRESC0_RTC_DIV1 (0x00000000UL << 0) /**< Shifted mode DIV1 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV2 (0x00000001UL << 0) /**< Shifted mode DIV2 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV4 (0x00000002UL << 0) /**< Shifted mode DIV4 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV8 (0x00000003UL << 0) /**< Shifted mode DIV8 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV16 (0x00000004UL << 0) /**< Shifted mode DIV16 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV32 (0x00000005UL << 0) /**< Shifted mode DIV32 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV64 (0x00000006UL << 0) /**< Shifted mode DIV64 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV128 (0x00000007UL << 0) /**< Shifted mode DIV128 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV256 (0x00000008UL << 0) /**< Shifted mode DIV256 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV512 (0x00000009UL << 0) /**< Shifted mode DIV512 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV1024 (0x0000000AUL << 0) /**< Shifted mode DIV1024 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV2048 (0x0000000BUL << 0) /**< Shifted mode DIV2048 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV4096 (0x0000000CUL << 0) /**< Shifted mode DIV4096 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV8192 (0x0000000DUL << 0) /**< Shifted mode DIV8192 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV16384 (0x0000000EUL << 0) /**< Shifted mode DIV16384 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_RTC_DIV32768 (0x0000000FUL << 0) /**< Shifted mode DIV32768 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV1 0x00000000UL /**< Mode DIV1 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV2 0x00000001UL /**< Mode DIV2 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV4 0x00000002UL /**< Mode DIV4 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV8 0x00000003UL /**< Mode DIV8 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV16 0x00000004UL /**< Mode DIV16 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV32 0x00000005UL /**< Mode DIV32 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV64 0x00000006UL /**< Mode DIV64 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV128 0x00000007UL /**< Mode DIV128 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV256 0x00000008UL /**< Mode DIV256 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV512 0x00000009UL /**< Mode DIV512 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL /**< Mode DIV1024 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL /**< Mode DIV2048 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL /**< Mode DIV4096 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL /**< Mode DIV8192 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL /**< Mode DIV16384 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL /**< Mode DIV32768 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_SHIFT 4 /**< Shift value for CMU_LETIMER0 */
-#define _CMU_LFAPRESC0_LETIMER0_MASK 0xF0UL /**< Bit mask for CMU_LETIMER0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV1 (0x00000000UL << 4) /**< Shifted mode DIV1 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV2 (0x00000001UL << 4) /**< Shifted mode DIV2 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV4 (0x00000002UL << 4) /**< Shifted mode DIV4 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV8 (0x00000003UL << 4) /**< Shifted mode DIV8 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV16 (0x00000004UL << 4) /**< Shifted mode DIV16 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV32 (0x00000005UL << 4) /**< Shifted mode DIV32 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV64 (0x00000006UL << 4) /**< Shifted mode DIV64 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV128 (0x00000007UL << 4) /**< Shifted mode DIV128 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV256 (0x00000008UL << 4) /**< Shifted mode DIV256 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV512 (0x00000009UL << 4) /**< Shifted mode DIV512 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV1024 (0x0000000AUL << 4) /**< Shifted mode DIV1024 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV2048 (0x0000000BUL << 4) /**< Shifted mode DIV2048 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV4096 (0x0000000CUL << 4) /**< Shifted mode DIV4096 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV8192 (0x0000000DUL << 4) /**< Shifted mode DIV8192 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV16384 (0x0000000EUL << 4) /**< Shifted mode DIV16384 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LETIMER0_DIV32768 (0x0000000FUL << 4) /**< Shifted mode DIV32768 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL /**< Mode DIV1 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL /**< Mode DIV2 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL /**< Mode DIV4 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL /**< Mode DIV8 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL /**< Mode DIV16 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL /**< Mode DIV32 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL /**< Mode DIV64 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL /**< Mode DIV128 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL /**< Mode DIV256 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL /**< Mode DIV512 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL /**< Mode DIV1024 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL /**< Mode DIV2048 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL /**< Mode DIV4096 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL /**< Mode DIV8192 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL /**< Mode DIV16384 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL /**< Mode DIV32768 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LCD_SHIFT 8 /**< Shift value for CMU_LCD */
-#define _CMU_LFAPRESC0_LCD_MASK 0x300UL /**< Bit mask for CMU_LCD */
-#define CMU_LFAPRESC0_LCD_DIV16 (0x00000000UL << 8) /**< Shifted mode DIV16 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LCD_DIV32 (0x00000001UL << 8) /**< Shifted mode DIV32 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LCD_DIV64 (0x00000002UL << 8) /**< Shifted mode DIV64 for CMU_LFAPRESC0 */
-#define CMU_LFAPRESC0_LCD_DIV128 (0x00000003UL << 8) /**< Shifted mode DIV128 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LCD_DIV16 0x00000000UL /**< Mode DIV16 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LCD_DIV32 0x00000001UL /**< Mode DIV32 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LCD_DIV64 0x00000002UL /**< Mode DIV64 for CMU_LFAPRESC0 */
-#define _CMU_LFAPRESC0_LCD_DIV128 0x00000003UL /**< Mode DIV128 for CMU_LFAPRESC0 */
-
-/** Bit fields for CMU LFBPRESC0 */
-#define _CMU_LFBPRESC0_RESETVALUE 0x00000000UL /**< Default value for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_MASK 0x00000033UL /**< Mask for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART0_SHIFT 0 /**< Shift value for CMU_LEUART0 */
-#define _CMU_LFBPRESC0_LEUART0_MASK 0x3UL /**< Bit mask for CMU_LEUART0 */
-#define CMU_LFBPRESC0_LEUART0_DIV1 (0x00000000UL << 0) /**< Shifted mode DIV1 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART0_DIV2 (0x00000001UL << 0) /**< Shifted mode DIV2 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART0_DIV4 (0x00000002UL << 0) /**< Shifted mode DIV4 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART0_DIV8 (0x00000003UL << 0) /**< Shifted mode DIV8 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL /**< Mode DIV1 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL /**< Mode DIV2 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL /**< Mode DIV4 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL /**< Mode DIV8 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART1_SHIFT 4 /**< Shift value for CMU_LEUART1 */
-#define _CMU_LFBPRESC0_LEUART1_MASK 0x30UL /**< Bit mask for CMU_LEUART1 */
-#define CMU_LFBPRESC0_LEUART1_DIV1 (0x00000000UL << 4) /**< Shifted mode DIV1 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART1_DIV2 (0x00000001UL << 4) /**< Shifted mode DIV2 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART1_DIV4 (0x00000002UL << 4) /**< Shifted mode DIV4 for CMU_LFBPRESC0 */
-#define CMU_LFBPRESC0_LEUART1_DIV8 (0x00000003UL << 4) /**< Shifted mode DIV8 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART1_DIV1 0x00000000UL /**< Mode DIV1 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART1_DIV2 0x00000001UL /**< Mode DIV2 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART1_DIV4 0x00000002UL /**< Mode DIV4 for CMU_LFBPRESC0 */
-#define _CMU_LFBPRESC0_LEUART1_DIV8 0x00000003UL /**< Mode DIV8 for CMU_LFBPRESC0 */
-
-/** Bit fields for CMU PCNTCTRL */
-#define _CMU_PCNTCTRL_RESETVALUE 0x00000015UL /**< Default value for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_MASK 0x0000003FUL /**< Mask for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT0CLKEN (1 << 0) /**< PCNT0 Clock Enable */
-#define _CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0 /**< Shift value for CMU_PCNT0CLKEN */
-#define _CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL /**< Bit mask for CMU_PCNT0CLKEN */
-#define CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT0CLKSEL (1 << 1) /**< PCNT0 Clock Select */
-#define _CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1 /**< Shift value for CMU_PCNT0CLKSEL */
-#define _CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL /**< Bit mask for CMU_PCNT0CLKSEL */
-#define CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK (0x00000000UL << 1) /**< Shifted mode LFACLK for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 (0x00000001UL << 1) /**< Shifted mode PCNT0S0 for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL /**< Mode LFACLK for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL /**< Mode PCNT0S0 for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT1CLKEN (1 << 2) /**< PCNT1 Clock Enable */
-#define _CMU_PCNTCTRL_PCNT1CLKEN_SHIFT 2 /**< Shift value for CMU_PCNT1CLKEN */
-#define _CMU_PCNTCTRL_PCNT1CLKEN_MASK 0x4UL /**< Bit mask for CMU_PCNT1CLKEN */
-#define CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT (0x00000001UL << 2) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT1CLKSEL (1 << 3) /**< PCNT1 Clock Select */
-#define _CMU_PCNTCTRL_PCNT1CLKSEL_SHIFT 3 /**< Shift value for CMU_PCNT1CLKSEL */
-#define _CMU_PCNTCTRL_PCNT1CLKSEL_MASK 0x8UL /**< Bit mask for CMU_PCNT1CLKSEL */
-#define CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK (0x00000000UL << 3) /**< Shifted mode LFACLK for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 (0x00000001UL << 3) /**< Shifted mode PCNT1S0 for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK 0x00000000UL /**< Mode LFACLK for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 0x00000001UL /**< Mode PCNT1S0 for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT2CLKEN (1 << 4) /**< PCNT2 Clock Enable */
-#define _CMU_PCNTCTRL_PCNT2CLKEN_SHIFT 4 /**< Shift value for CMU_PCNT2CLKEN */
-#define _CMU_PCNTCTRL_PCNT2CLKEN_MASK 0x10UL /**< Bit mask for CMU_PCNT2CLKEN */
-#define CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT (0x00000001UL << 4) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT2CLKSEL (1 << 5) /**< PCNT2 Clock Select */
-#define _CMU_PCNTCTRL_PCNT2CLKSEL_SHIFT 5 /**< Shift value for CMU_PCNT2CLKSEL */
-#define _CMU_PCNTCTRL_PCNT2CLKSEL_MASK 0x20UL /**< Bit mask for CMU_PCNT2CLKSEL */
-#define CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK (0x00000000UL << 5) /**< Shifted mode LFACLK for CMU_PCNTCTRL */
-#define CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 (0x00000001UL << 5) /**< Shifted mode PCNT2S0 for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK 0x00000000UL /**< Mode LFACLK for CMU_PCNTCTRL */
-#define _CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 0x00000001UL /**< Mode PCNT2S0 for CMU_PCNTCTRL */
-
-/** Bit fields for CMU LCDCTRL */
-#define _CMU_LCDCTRL_RESETVALUE 0x00000020UL /**< Default value for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_MASK 0x0000007FUL /**< Mask for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_FDIV_SHIFT 0 /**< Shift value for CMU_FDIV */
-#define _CMU_LCDCTRL_FDIV_MASK 0x7UL /**< Bit mask for CMU_FDIV */
-#define CMU_LCDCTRL_FDIV_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_FDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBOOSTEN (1 << 3) /**< Voltage Boost Enable */
-#define _CMU_LCDCTRL_VBOOSTEN_SHIFT 3 /**< Shift value for CMU_VBOOSTEN */
-#define _CMU_LCDCTRL_VBOOSTEN_MASK 0x8UL /**< Bit mask for CMU_VBOOSTEN */
-#define CMU_LCDCTRL_VBOOSTEN_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBOOSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_SHIFT 4 /**< Shift value for CMU_VBFREQ */
-#define _CMU_LCDCTRL_VBFREQ_MASK 0x70UL /**< Bit mask for CMU_VBFREQ */
-#define CMU_LCDCTRL_VBFREQ_32KHZ (0x00000000UL << 4) /**< Shifted mode 32KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_16KHZ (0x00000001UL << 4) /**< Shifted mode 16KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_DEFAULT (0x00000002UL << 4) /**< Shifted mode DEFAULT for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_8KHZ (0x00000002UL << 4) /**< Shifted mode 8KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_4KHZ (0x00000003UL << 4) /**< Shifted mode 4KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_2KHZ (0x00000004UL << 4) /**< Shifted mode 2KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_1KHZ (0x00000005UL << 4) /**< Shifted mode 1KHZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_512HZ (0x00000006UL << 4) /**< Shifted mode 512HZ for CMU_LCDCTRL */
-#define CMU_LCDCTRL_VBFREQ_256HZ (0x00000007UL << 4) /**< Shifted mode 256HZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_32KHZ 0x00000000UL /**< Mode 32KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_16KHZ 0x00000001UL /**< Mode 16KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_DEFAULT 0x00000002UL /**< Mode DEFAULT for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_8KHZ 0x00000002UL /**< Mode 8KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_4KHZ 0x00000003UL /**< Mode 4KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_2KHZ 0x00000004UL /**< Mode 2KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_1KHZ 0x00000005UL /**< Mode 1KHZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_512HZ 0x00000006UL /**< Mode 512HZ for CMU_LCDCTRL */
-#define _CMU_LCDCTRL_VBFREQ_256HZ 0x00000007UL /**< Mode 256HZ for CMU_LCDCTRL */
-
-/** Bit fields for CMU ROUTE */
-#define _CMU_ROUTE_RESETVALUE 0x00000000UL /**< Default value for CMU_ROUTE */
-#define _CMU_ROUTE_MASK 0x00000007UL /**< Mask for CMU_ROUTE */
-#define CMU_ROUTE_CLKOUT0PEN (1 << 0) /**< CLKOUT0 Pin Enable */
-#define _CMU_ROUTE_CLKOUT0PEN_SHIFT 0 /**< Shift value for CMU_CLKOUT0PEN */
-#define _CMU_ROUTE_CLKOUT0PEN_MASK 0x1UL /**< Bit mask for CMU_CLKOUT0PEN */
-#define CMU_ROUTE_CLKOUT0PEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_ROUTE */
-#define _CMU_ROUTE_CLKOUT0PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_ROUTE */
-#define CMU_ROUTE_CLKOUT1PEN (1 << 1) /**< CLKOUT1 Pin Enable */
-#define _CMU_ROUTE_CLKOUT1PEN_SHIFT 1 /**< Shift value for CMU_CLKOUT1PEN */
-#define _CMU_ROUTE_CLKOUT1PEN_MASK 0x2UL /**< Bit mask for CMU_CLKOUT1PEN */
-#define CMU_ROUTE_CLKOUT1PEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for CMU_ROUTE */
-#define _CMU_ROUTE_CLKOUT1PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_ROUTE */
-#define CMU_ROUTE_LOCATION (1 << 2) /**< I/O Location */
-#define _CMU_ROUTE_LOCATION_SHIFT 2 /**< Shift value for CMU_LOCATION */
-#define _CMU_ROUTE_LOCATION_MASK 0x4UL /**< Bit mask for CMU_LOCATION */
-#define CMU_ROUTE_LOCATION_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for CMU_ROUTE */
-#define CMU_ROUTE_LOCATION_LOC0 (0x00000000UL << 2) /**< Shifted mode LOC0 for CMU_ROUTE */
-#define CMU_ROUTE_LOCATION_LOC1 (0x00000001UL << 2) /**< Shifted mode LOC1 for CMU_ROUTE */
-#define _CMU_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_ROUTE */
-#define _CMU_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for CMU_ROUTE */
-#define _CMU_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for CMU_ROUTE */
-
-/** Bit fields for CMU LOCK */
-#define _CMU_LOCK_RESETVALUE 0x00000000UL /**< Default value for CMU_LOCK */
-#define _CMU_LOCK_MASK 0x0000FFFFUL /**< Mask for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for CMU_LOCKKEY */
-#define _CMU_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for CMU_LOCKKEY */
-#define CMU_LOCK_LOCKKEY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for CMU_LOCK */
-#define CMU_LOCK_LOCKKEY_LOCK (0x00000000UL << 0) /**< Shifted mode LOCK for CMU_LOCK */
-#define CMU_LOCK_LOCKKEY_UNLOCKED (0x00000000UL << 0) /**< Shifted mode UNLOCKED for CMU_LOCK */
-#define CMU_LOCK_LOCKKEY_LOCKED (0x00000001UL << 0) /**< Shifted mode LOCKED for CMU_LOCK */
-#define CMU_LOCK_LOCKKEY_UNLOCK (0x0000580EUL << 0) /**< Shifted mode UNLOCK for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for CMU_LOCK */
-#define _CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL /**< Mode UNLOCK for CMU_LOCK */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_AES
- * @{
- */
-
-/** Bit fields for AES CTRL */
-#define _AES_CTRL_RESETVALUE 0x00000000UL /**< Default value for AES_CTRL */
-#define _AES_CTRL_MASK 0x00000037UL /**< Mask for AES_CTRL */
-#define AES_CTRL_DECRYPT (1 << 0) /**< Decryption/Encryption Mode */
-#define _AES_CTRL_DECRYPT_SHIFT 0 /**< Shift value for AES_DECRYPT */
-#define _AES_CTRL_DECRYPT_MASK 0x1UL /**< Bit mask for AES_DECRYPT */
-#define AES_CTRL_DECRYPT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_CTRL */
-#define _AES_CTRL_DECRYPT_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */
-#define AES_CTRL_AES256 (1 << 1) /**< AES-256 Mode */
-#define _AES_CTRL_AES256_SHIFT 1 /**< Shift value for AES_AES256 */
-#define _AES_CTRL_AES256_MASK 0x2UL /**< Bit mask for AES_AES256 */
-#define AES_CTRL_AES256_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for AES_CTRL */
-#define _AES_CTRL_AES256_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */
-#define AES_CTRL_KEYBUFEN (1 << 2) /**< Key Buffer Enable */
-#define _AES_CTRL_KEYBUFEN_SHIFT 2 /**< Shift value for AES_KEYBUFEN */
-#define _AES_CTRL_KEYBUFEN_MASK 0x4UL /**< Bit mask for AES_KEYBUFEN */
-#define AES_CTRL_KEYBUFEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for AES_CTRL */
-#define _AES_CTRL_KEYBUFEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */
-#define AES_CTRL_DATASTART (1 << 4) /**< AES_DATA Write Start */
-#define _AES_CTRL_DATASTART_SHIFT 4 /**< Shift value for AES_DATASTART */
-#define _AES_CTRL_DATASTART_MASK 0x10UL /**< Bit mask for AES_DATASTART */
-#define AES_CTRL_DATASTART_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for AES_CTRL */
-#define _AES_CTRL_DATASTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */
-#define AES_CTRL_XORSTART (1 << 5) /**< AES_XORDATA Write Start */
-#define _AES_CTRL_XORSTART_SHIFT 5 /**< Shift value for AES_XORSTART */
-#define _AES_CTRL_XORSTART_MASK 0x20UL /**< Bit mask for AES_XORSTART */
-#define AES_CTRL_XORSTART_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for AES_CTRL */
-#define _AES_CTRL_XORSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */
-
-/** Bit fields for AES CMD */
-#define _AES_CMD_RESETVALUE 0x00000000UL /**< Default value for AES_CMD */
-#define _AES_CMD_MASK 0x00000003UL /**< Mask for AES_CMD */
-#define AES_CMD_START (1 << 0) /**< Encryption/Decryption Start */
-#define _AES_CMD_START_SHIFT 0 /**< Shift value for AES_START */
-#define _AES_CMD_START_MASK 0x1UL /**< Bit mask for AES_START */
-#define AES_CMD_START_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_CMD */
-#define _AES_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CMD */
-#define AES_CMD_STOP (1 << 1) /**< Encryption/Decryption Stop */
-#define _AES_CMD_STOP_SHIFT 1 /**< Shift value for AES_STOP */
-#define _AES_CMD_STOP_MASK 0x2UL /**< Bit mask for AES_STOP */
-#define AES_CMD_STOP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for AES_CMD */
-#define _AES_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CMD */
-
-/** Bit fields for AES STATUS */
-#define _AES_STATUS_RESETVALUE 0x00000000UL /**< Default value for AES_STATUS */
-#define _AES_STATUS_MASK 0x00000001UL /**< Mask for AES_STATUS */
-#define AES_STATUS_RUNNING (1 << 0) /**< AES Running */
-#define _AES_STATUS_RUNNING_SHIFT 0 /**< Shift value for AES_RUNNING */
-#define _AES_STATUS_RUNNING_MASK 0x1UL /**< Bit mask for AES_RUNNING */
-#define AES_STATUS_RUNNING_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_STATUS */
-#define _AES_STATUS_RUNNING_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_STATUS */
-
-/** Bit fields for AES IEN */
-#define _AES_IEN_RESETVALUE 0x00000000UL /**< Default value for AES_IEN */
-#define _AES_IEN_MASK 0x00000001UL /**< Mask for AES_IEN */
-#define AES_IEN_DONE (1 << 0) /**< Encryption/Decryption Done Interrupt Enable */
-#define _AES_IEN_DONE_SHIFT 0 /**< Shift value for AES_DONE */
-#define _AES_IEN_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */
-#define AES_IEN_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_IEN */
-#define _AES_IEN_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IEN */
-
-/** Bit fields for AES IF */
-#define _AES_IF_RESETVALUE 0x00000000UL /**< Default value for AES_IF */
-#define _AES_IF_MASK 0x00000001UL /**< Mask for AES_IF */
-#define AES_IF_DONE (1 << 0) /**< Encryption/Decryption Done Interrupt Flag */
-#define _AES_IF_DONE_SHIFT 0 /**< Shift value for AES_DONE */
-#define _AES_IF_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */
-#define AES_IF_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_IF */
-#define _AES_IF_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IF */
-
-/** Bit fields for AES IFS */
-#define _AES_IFS_RESETVALUE 0x00000000UL /**< Default value for AES_IFS */
-#define _AES_IFS_MASK 0x00000001UL /**< Mask for AES_IFS */
-#define AES_IFS_DONE (1 << 0) /**< Encryption/Decryption Done Interrupt Flag Set */
-#define _AES_IFS_DONE_SHIFT 0 /**< Shift value for AES_DONE */
-#define _AES_IFS_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */
-#define AES_IFS_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_IFS */
-#define _AES_IFS_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IFS */
-
-/** Bit fields for AES IFC */
-#define _AES_IFC_RESETVALUE 0x00000000UL /**< Default value for AES_IFC */
-#define _AES_IFC_MASK 0x00000001UL /**< Mask for AES_IFC */
-#define AES_IFC_DONE (1 << 0) /**< Encryption/Decryption Done Interrupt Flag Clear */
-#define _AES_IFC_DONE_SHIFT 0 /**< Shift value for AES_DONE */
-#define _AES_IFC_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */
-#define AES_IFC_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_IFC */
-#define _AES_IFC_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IFC */
-
-/** Bit fields for AES DATA */
-#define _AES_DATA_RESETVALUE 0x00000000UL /**< Default value for AES_DATA */
-#define _AES_DATA_MASK 0xFFFFFFFFUL /**< Mask for AES_DATA */
-#define _AES_DATA_DATA_SHIFT 0 /**< Shift value for AES_DATA */
-#define _AES_DATA_DATA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_DATA */
-#define AES_DATA_DATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_DATA */
-#define _AES_DATA_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_DATA */
-
-/** Bit fields for AES XORDATA */
-#define _AES_XORDATA_RESETVALUE 0x00000000UL /**< Default value for AES_XORDATA */
-#define _AES_XORDATA_MASK 0xFFFFFFFFUL /**< Mask for AES_XORDATA */
-#define _AES_XORDATA_XORDATA_SHIFT 0 /**< Shift value for AES_XORDATA */
-#define _AES_XORDATA_XORDATA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_XORDATA */
-#define AES_XORDATA_XORDATA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_XORDATA */
-#define _AES_XORDATA_XORDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_XORDATA */
-
-/** Bit fields for AES KEYLA */
-#define _AES_KEYLA_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLA */
-#define _AES_KEYLA_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLA */
-#define _AES_KEYLA_KEYLA_SHIFT 0 /**< Shift value for AES_KEYLA */
-#define _AES_KEYLA_KEYLA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLA */
-#define AES_KEYLA_KEYLA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYLA */
-#define _AES_KEYLA_KEYLA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLA */
-
-/** Bit fields for AES KEYLB */
-#define _AES_KEYLB_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLB */
-#define _AES_KEYLB_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLB */
-#define _AES_KEYLB_KEYLB_SHIFT 0 /**< Shift value for AES_KEYLB */
-#define _AES_KEYLB_KEYLB_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLB */
-#define AES_KEYLB_KEYLB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYLB */
-#define _AES_KEYLB_KEYLB_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLB */
-
-/** Bit fields for AES KEYLC */
-#define _AES_KEYLC_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLC */
-#define _AES_KEYLC_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLC */
-#define _AES_KEYLC_KEYLC_SHIFT 0 /**< Shift value for AES_KEYLC */
-#define _AES_KEYLC_KEYLC_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLC */
-#define AES_KEYLC_KEYLC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYLC */
-#define _AES_KEYLC_KEYLC_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLC */
-
-/** Bit fields for AES KEYLD */
-#define _AES_KEYLD_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLD */
-#define _AES_KEYLD_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLD */
-#define _AES_KEYLD_KEYLD_SHIFT 0 /**< Shift value for AES_KEYLD */
-#define _AES_KEYLD_KEYLD_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLD */
-#define AES_KEYLD_KEYLD_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYLD */
-#define _AES_KEYLD_KEYLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLD */
-
-/** Bit fields for AES KEYHA */
-#define _AES_KEYHA_RESETVALUE 0x00000000UL /**< Default value for AES_KEYHA */
-#define _AES_KEYHA_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYHA */
-#define _AES_KEYHA_KEYHA_SHIFT 0 /**< Shift value for AES_KEYHA */
-#define _AES_KEYHA_KEYHA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYHA */
-#define AES_KEYHA_KEYHA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYHA */
-#define _AES_KEYHA_KEYHA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYHA */
-
-/** Bit fields for AES KEYHB */
-#define _AES_KEYHB_RESETVALUE 0x00000000UL /**< Default value for AES_KEYHB */
-#define _AES_KEYHB_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYHB */
-#define _AES_KEYHB_KEYHB_SHIFT 0 /**< Shift value for AES_KEYHB */
-#define _AES_KEYHB_KEYHB_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYHB */
-#define AES_KEYHB_KEYHB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYHB */
-#define _AES_KEYHB_KEYHB_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYHB */
-
-/** Bit fields for AES KEYHC */
-#define _AES_KEYHC_RESETVALUE 0x00000000UL /**< Default value for AES_KEYHC */
-#define _AES_KEYHC_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYHC */
-#define _AES_KEYHC_KEYHC_SHIFT 0 /**< Shift value for AES_KEYHC */
-#define _AES_KEYHC_KEYHC_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYHC */
-#define AES_KEYHC_KEYHC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYHC */
-#define _AES_KEYHC_KEYHC_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYHC */
-
-/** Bit fields for AES KEYHD */
-#define _AES_KEYHD_RESETVALUE 0x00000000UL /**< Default value for AES_KEYHD */
-#define _AES_KEYHD_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYHD */
-#define _AES_KEYHD_KEYHD_SHIFT 0 /**< Shift value for AES_KEYHD */
-#define _AES_KEYHD_KEYHD_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYHD */
-#define AES_KEYHD_KEYHD_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for AES_KEYHD */
-#define _AES_KEYHD_KEYHD_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYHD */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_EBI
- * @{
- */
-
-/** Bit fields for EBI CTRL */
-#define _EBI_CTRL_RESETVALUE 0x00000000UL /**< Default value for EBI_CTRL */
-#define _EBI_CTRL_MASK 0x00030F07UL /**< Mask for EBI_CTRL */
-#define _EBI_CTRL_MODE_SHIFT 0 /**< Shift value for EBI_MODE */
-#define _EBI_CTRL_MODE_MASK 0x7UL /**< Bit mask for EBI_MODE */
-#define EBI_CTRL_MODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_MODE_D8A8 (0x00000000UL << 0) /**< Shifted mode D8A8 for EBI_CTRL */
-#define EBI_CTRL_MODE_D16A16ALE (0x00000001UL << 0) /**< Shifted mode D16A16ALE for EBI_CTRL */
-#define EBI_CTRL_MODE_D8A24ALE (0x00000002UL << 0) /**< Shifted mode D8A24ALE for EBI_CTRL */
-#define _EBI_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_MODE_D8A8 0x00000000UL /**< Mode D8A8 for EBI_CTRL */
-#define _EBI_CTRL_MODE_D16A16ALE 0x00000001UL /**< Mode D16A16ALE for EBI_CTRL */
-#define _EBI_CTRL_MODE_D8A24ALE 0x00000002UL /**< Mode D8A24ALE for EBI_CTRL */
-#define EBI_CTRL_BANK0EN (1 << 8) /**< Bank 0 Enable */
-#define _EBI_CTRL_BANK0EN_SHIFT 8 /**< Shift value for EBI_BANK0EN */
-#define _EBI_CTRL_BANK0EN_MASK 0x100UL /**< Bit mask for EBI_BANK0EN */
-#define EBI_CTRL_BANK0EN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_BANK0EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_BANK1EN (1 << 9) /**< Bank 1 Enable */
-#define _EBI_CTRL_BANK1EN_SHIFT 9 /**< Shift value for EBI_BANK1EN */
-#define _EBI_CTRL_BANK1EN_MASK 0x200UL /**< Bit mask for EBI_BANK1EN */
-#define EBI_CTRL_BANK1EN_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_BANK1EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_BANK2EN (1 << 10) /**< Bank 2 Enable */
-#define _EBI_CTRL_BANK2EN_SHIFT 10 /**< Shift value for EBI_BANK2EN */
-#define _EBI_CTRL_BANK2EN_MASK 0x400UL /**< Bit mask for EBI_BANK2EN */
-#define EBI_CTRL_BANK2EN_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_BANK2EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_BANK3EN (1 << 11) /**< Bank 3 Enable */
-#define _EBI_CTRL_BANK3EN_SHIFT 11 /**< Shift value for EBI_BANK3EN */
-#define _EBI_CTRL_BANK3EN_MASK 0x800UL /**< Bit mask for EBI_BANK3EN */
-#define EBI_CTRL_BANK3EN_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_BANK3EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_ARDYEN (1 << 16) /**< ARDY Enable */
-#define _EBI_CTRL_ARDYEN_SHIFT 16 /**< Shift value for EBI_ARDYEN */
-#define _EBI_CTRL_ARDYEN_MASK 0x10000UL /**< Bit mask for EBI_ARDYEN */
-#define EBI_CTRL_ARDYEN_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_ARDYEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-#define EBI_CTRL_ARDYTODIS (1 << 17) /**< ARDY Timeout Disable */
-#define _EBI_CTRL_ARDYTODIS_SHIFT 17 /**< Shift value for EBI_ARDYTODIS */
-#define _EBI_CTRL_ARDYTODIS_MASK 0x20000UL /**< Bit mask for EBI_ARDYTODIS */
-#define EBI_CTRL_ARDYTODIS_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for EBI_CTRL */
-#define _EBI_CTRL_ARDYTODIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_CTRL */
-
-/** Bit fields for EBI ADDRTIMING */
-#define _EBI_ADDRTIMING_RESETVALUE 0x00000100UL /**< Default value for EBI_ADDRTIMING */
-#define _EBI_ADDRTIMING_MASK 0x00000303UL /**< Mask for EBI_ADDRTIMING */
-#define _EBI_ADDRTIMING_ADDRSET_SHIFT 0 /**< Shift value for EBI_ADDRSET */
-#define _EBI_ADDRTIMING_ADDRSET_MASK 0x3UL /**< Bit mask for EBI_ADDRSET */
-#define EBI_ADDRTIMING_ADDRSET_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_ADDRTIMING */
-#define _EBI_ADDRTIMING_ADDRSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ADDRTIMING */
-#define _EBI_ADDRTIMING_ADDRHOLD_SHIFT 8 /**< Shift value for EBI_ADDRHOLD */
-#define _EBI_ADDRTIMING_ADDRHOLD_MASK 0x300UL /**< Bit mask for EBI_ADDRHOLD */
-#define EBI_ADDRTIMING_ADDRHOLD_DEFAULT (0x00000001UL << 8) /**< Shifted mode DEFAULT for EBI_ADDRTIMING */
-#define _EBI_ADDRTIMING_ADDRHOLD_DEFAULT 0x00000001UL /**< Mode DEFAULT for EBI_ADDRTIMING */
-
-/** Bit fields for EBI RDTIMING */
-#define _EBI_RDTIMING_RESETVALUE 0x00000000UL /**< Default value for EBI_RDTIMING */
-#define _EBI_RDTIMING_MASK 0x00030F03UL /**< Mask for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDSETUP_SHIFT 0 /**< Shift value for EBI_RDSETUP */
-#define _EBI_RDTIMING_RDSETUP_MASK 0x3UL /**< Bit mask for EBI_RDSETUP */
-#define EBI_RDTIMING_RDSETUP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDSETUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDSTRB_SHIFT 8 /**< Shift value for EBI_RDSTRB */
-#define _EBI_RDTIMING_RDSTRB_MASK 0xF00UL /**< Bit mask for EBI_RDSTRB */
-#define EBI_RDTIMING_RDSTRB_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDSTRB_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDHOLD_SHIFT 16 /**< Shift value for EBI_RDHOLD */
-#define _EBI_RDTIMING_RDHOLD_MASK 0x30000UL /**< Bit mask for EBI_RDHOLD */
-#define EBI_RDTIMING_RDHOLD_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for EBI_RDTIMING */
-#define _EBI_RDTIMING_RDHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_RDTIMING */
-
-/** Bit fields for EBI WRTIMING */
-#define _EBI_WRTIMING_RESETVALUE 0x00010000UL /**< Default value for EBI_WRTIMING */
-#define _EBI_WRTIMING_MASK 0x00030F03UL /**< Mask for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRSETUP_SHIFT 0 /**< Shift value for EBI_WRSETUP */
-#define _EBI_WRTIMING_WRSETUP_MASK 0x3UL /**< Bit mask for EBI_WRSETUP */
-#define EBI_WRTIMING_WRSETUP_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRSETUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRSTRB_SHIFT 8 /**< Shift value for EBI_WRSTRB */
-#define _EBI_WRTIMING_WRSTRB_MASK 0xF00UL /**< Bit mask for EBI_WRSTRB */
-#define EBI_WRTIMING_WRSTRB_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRSTRB_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRHOLD_SHIFT 16 /**< Shift value for EBI_WRHOLD */
-#define _EBI_WRTIMING_WRHOLD_MASK 0x30000UL /**< Bit mask for EBI_WRHOLD */
-#define EBI_WRTIMING_WRHOLD_DEFAULT (0x00000001UL << 16) /**< Shifted mode DEFAULT for EBI_WRTIMING */
-#define _EBI_WRTIMING_WRHOLD_DEFAULT 0x00000001UL /**< Mode DEFAULT for EBI_WRTIMING */
-
-/** Bit fields for EBI POLARITY */
-#define _EBI_POLARITY_RESETVALUE 0x00000000UL /**< Default value for EBI_POLARITY */
-#define _EBI_POLARITY_MASK 0x0000001FUL /**< Mask for EBI_POLARITY */
-#define EBI_POLARITY_CSPOL (1 << 0) /**< Chip Select Polarity */
-#define _EBI_POLARITY_CSPOL_SHIFT 0 /**< Shift value for EBI_CSPOL */
-#define _EBI_POLARITY_CSPOL_MASK 0x1UL /**< Bit mask for EBI_CSPOL */
-#define EBI_POLARITY_CSPOL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_POLARITY */
-#define EBI_POLARITY_CSPOL_ACTIVELOW (0x00000000UL << 0) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
-#define EBI_POLARITY_CSPOL_ACTIVEHIGH (0x00000001UL << 0) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
-#define _EBI_POLARITY_CSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
-#define _EBI_POLARITY_CSPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
-#define _EBI_POLARITY_CSPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
-#define EBI_POLARITY_REPOL (1 << 1) /**< Read Enable Polarity */
-#define _EBI_POLARITY_REPOL_SHIFT 1 /**< Shift value for EBI_REPOL */
-#define _EBI_POLARITY_REPOL_MASK 0x2UL /**< Bit mask for EBI_REPOL */
-#define EBI_POLARITY_REPOL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for EBI_POLARITY */
-#define EBI_POLARITY_REPOL_ACTIVELOW (0x00000000UL << 1) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
-#define EBI_POLARITY_REPOL_ACTIVEHIGH (0x00000001UL << 1) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
-#define _EBI_POLARITY_REPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
-#define _EBI_POLARITY_REPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
-#define _EBI_POLARITY_REPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
-#define EBI_POLARITY_WEPOL (1 << 2) /**< Write Enable Polarity */
-#define _EBI_POLARITY_WEPOL_SHIFT 2 /**< Shift value for EBI_WEPOL */
-#define _EBI_POLARITY_WEPOL_MASK 0x4UL /**< Bit mask for EBI_WEPOL */
-#define EBI_POLARITY_WEPOL_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for EBI_POLARITY */
-#define EBI_POLARITY_WEPOL_ACTIVELOW (0x00000000UL << 2) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
-#define EBI_POLARITY_WEPOL_ACTIVEHIGH (0x00000001UL << 2) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
-#define _EBI_POLARITY_WEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
-#define _EBI_POLARITY_WEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
-#define _EBI_POLARITY_WEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
-#define EBI_POLARITY_ALEPOL (1 << 3) /**< Address Latch Polarity */
-#define _EBI_POLARITY_ALEPOL_SHIFT 3 /**< Shift value for EBI_ALEPOL */
-#define _EBI_POLARITY_ALEPOL_MASK 0x8UL /**< Bit mask for EBI_ALEPOL */
-#define EBI_POLARITY_ALEPOL_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for EBI_POLARITY */
-#define EBI_POLARITY_ALEPOL_ACTIVELOW (0x00000000UL << 3) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
-#define EBI_POLARITY_ALEPOL_ACTIVEHIGH (0x00000001UL << 3) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
-#define _EBI_POLARITY_ALEPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
-#define _EBI_POLARITY_ALEPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
-#define _EBI_POLARITY_ALEPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
-#define EBI_POLARITY_ARDYPOL (1 << 4) /**< ARDY Polarity */
-#define _EBI_POLARITY_ARDYPOL_SHIFT 4 /**< Shift value for EBI_ARDYPOL */
-#define _EBI_POLARITY_ARDYPOL_MASK 0x10UL /**< Bit mask for EBI_ARDYPOL */
-#define EBI_POLARITY_ARDYPOL_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for EBI_POLARITY */
-#define EBI_POLARITY_ARDYPOL_ACTIVELOW (0x00000000UL << 4) /**< Shifted mode ACTIVELOW for EBI_POLARITY */
-#define EBI_POLARITY_ARDYPOL_ACTIVEHIGH (0x00000001UL << 4) /**< Shifted mode ACTIVEHIGH for EBI_POLARITY */
-#define _EBI_POLARITY_ARDYPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_POLARITY */
-#define _EBI_POLARITY_ARDYPOL_ACTIVELOW 0x00000000UL /**< Mode ACTIVELOW for EBI_POLARITY */
-#define _EBI_POLARITY_ARDYPOL_ACTIVEHIGH 0x00000001UL /**< Mode ACTIVEHIGH for EBI_POLARITY */
-
-/** Bit fields for EBI ROUTE */
-#define _EBI_ROUTE_RESETVALUE 0x00000000UL /**< Default value for EBI_ROUTE */
-#define _EBI_ROUTE_MASK 0x0000007FUL /**< Mask for EBI_ROUTE */
-#define EBI_ROUTE_EBIPEN (1 << 0) /**< EBI Pin Enable */
-#define _EBI_ROUTE_EBIPEN_SHIFT 0 /**< Shift value for EBI_EBIPEN */
-#define _EBI_ROUTE_EBIPEN_MASK 0x1UL /**< Bit mask for EBI_EBIPEN */
-#define EBI_ROUTE_EBIPEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_EBIPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_CS0PEN (1 << 1) /**< EBI_CS0 Pin Enable */
-#define _EBI_ROUTE_CS0PEN_SHIFT 1 /**< Shift value for EBI_CS0PEN */
-#define _EBI_ROUTE_CS0PEN_MASK 0x2UL /**< Bit mask for EBI_CS0PEN */
-#define EBI_ROUTE_CS0PEN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_CS0PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_CS1PEN (1 << 2) /**< EBI_CS1 Pin Enable */
-#define _EBI_ROUTE_CS1PEN_SHIFT 2 /**< Shift value for EBI_CS1PEN */
-#define _EBI_ROUTE_CS1PEN_MASK 0x4UL /**< Bit mask for EBI_CS1PEN */
-#define EBI_ROUTE_CS1PEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_CS1PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_CS2PEN (1 << 3) /**< EBI_CS2 Pin Enable */
-#define _EBI_ROUTE_CS2PEN_SHIFT 3 /**< Shift value for EBI_CS2PEN */
-#define _EBI_ROUTE_CS2PEN_MASK 0x8UL /**< Bit mask for EBI_CS2PEN */
-#define EBI_ROUTE_CS2PEN_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_CS2PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_CS3PEN (1 << 4) /**< EBI_CS3 Pin Enable */
-#define _EBI_ROUTE_CS3PEN_SHIFT 4 /**< Shift value for EBI_CS3PEN */
-#define _EBI_ROUTE_CS3PEN_MASK 0x10UL /**< Bit mask for EBI_CS3PEN */
-#define EBI_ROUTE_CS3PEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_CS3PEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_ALEPEN (1 << 5) /**< EBI_ALE Pin Enable */
-#define _EBI_ROUTE_ALEPEN_SHIFT 5 /**< Shift value for EBI_ALEPEN */
-#define _EBI_ROUTE_ALEPEN_MASK 0x20UL /**< Bit mask for EBI_ALEPEN */
-#define EBI_ROUTE_ALEPEN_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_ALEPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-#define EBI_ROUTE_ARDYPEN (1 << 6) /**< EBI_ARDY Pin Enable */
-#define _EBI_ROUTE_ARDYPEN_SHIFT 6 /**< Shift value for EBI_ARDYPEN */
-#define _EBI_ROUTE_ARDYPEN_MASK 0x40UL /**< Bit mask for EBI_ARDYPEN */
-#define EBI_ROUTE_ARDYPEN_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for EBI_ROUTE */
-#define _EBI_ROUTE_ARDYPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for EBI_ROUTE */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_GPIO
- * @{
- */
-
-/** Bit fields for GPIO P_CTRL */
-#define _GPIO_P_CTRL_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_MASK 0x00000003UL /**< Mask for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_SHIFT 0 /**< Shift value for GPIO_DRIVEMODE */
-#define _GPIO_P_CTRL_DRIVEMODE_MASK 0x3UL /**< Bit mask for GPIO_DRIVEMODE */
-#define GPIO_P_CTRL_DRIVEMODE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_CTRL */
-#define GPIO_P_CTRL_DRIVEMODE_STANDARD (0x00000000UL << 0) /**< Shifted mode STANDARD for GPIO_P_CTRL */
-#define GPIO_P_CTRL_DRIVEMODE_LOWEST (0x00000001UL << 0) /**< Shifted mode LOWEST for GPIO_P_CTRL */
-#define GPIO_P_CTRL_DRIVEMODE_HIGH (0x00000002UL << 0) /**< Shifted mode HIGH for GPIO_P_CTRL */
-#define GPIO_P_CTRL_DRIVEMODE_LOW (0x00000003UL << 0) /**< Shifted mode LOW for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_STANDARD 0x00000000UL /**< Mode STANDARD for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_LOWEST 0x00000001UL /**< Mode LOWEST for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_HIGH 0x00000002UL /**< Mode HIGH for GPIO_P_CTRL */
-#define _GPIO_P_CTRL_DRIVEMODE_LOW 0x00000003UL /**< Mode LOW for GPIO_P_CTRL */
-
-/** Bit fields for GPIO P_MODEL */
-#define _GPIO_P_MODEL_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MASK 0xFFFFFFFFUL /**< Mask for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_SHIFT 0 /**< Shift value for GPIO_MODE0 */
-#define _GPIO_P_MODEL_MODE0_MASK 0xFUL /**< Bit mask for GPIO_MODE0 */
-#define GPIO_P_MODEL_MODE0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_DISABLED (0x00000000UL << 0) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_INPUT (0x00000001UL << 0) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_INPUTPULL (0x00000002UL << 0) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_INPUTPULLFILTER (0x00000003UL << 0) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_PUSHPULL (0x00000004UL << 0) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_PUSHPULLDRIVE (0x00000005UL << 0) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDOR (0x00000006UL << 0) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDORPULLDOWN (0x00000007UL << 0) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDAND (0x00000008UL << 0) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDFILTER (0x00000009UL << 0) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDPULLUP (0x0000000AUL << 0) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER (0x0000000BUL << 0) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDDRIVE (0x0000000CUL << 0) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER (0x0000000DUL << 0) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP (0x0000000EUL << 0) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 0) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE0_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_SHIFT 4 /**< Shift value for GPIO_MODE1 */
-#define _GPIO_P_MODEL_MODE1_MASK 0xF0UL /**< Bit mask for GPIO_MODE1 */
-#define GPIO_P_MODEL_MODE1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_DISABLED (0x00000000UL << 4) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_INPUT (0x00000001UL << 4) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_INPUTPULL (0x00000002UL << 4) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_INPUTPULLFILTER (0x00000003UL << 4) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_PUSHPULL (0x00000004UL << 4) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_PUSHPULLDRIVE (0x00000005UL << 4) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDOR (0x00000006UL << 4) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDORPULLDOWN (0x00000007UL << 4) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDAND (0x00000008UL << 4) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDFILTER (0x00000009UL << 4) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDPULLUP (0x0000000AUL << 4) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER (0x0000000BUL << 4) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDDRIVE (0x0000000CUL << 4) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDDRIVEFILTER (0x0000000DUL << 4) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUP (0x0000000EUL << 4) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 4) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE1_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_SHIFT 8 /**< Shift value for GPIO_MODE2 */
-#define _GPIO_P_MODEL_MODE2_MASK 0xF00UL /**< Bit mask for GPIO_MODE2 */
-#define GPIO_P_MODEL_MODE2_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_DISABLED (0x00000000UL << 8) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_INPUT (0x00000001UL << 8) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_INPUTPULL (0x00000002UL << 8) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_INPUTPULLFILTER (0x00000003UL << 8) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_PUSHPULL (0x00000004UL << 8) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_PUSHPULLDRIVE (0x00000005UL << 8) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDOR (0x00000006UL << 8) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDORPULLDOWN (0x00000007UL << 8) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDAND (0x00000008UL << 8) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDFILTER (0x00000009UL << 8) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDPULLUP (0x0000000AUL << 8) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER (0x0000000BUL << 8) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDDRIVE (0x0000000CUL << 8) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDDRIVEFILTER (0x0000000DUL << 8) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUP (0x0000000EUL << 8) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 8) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE2_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_SHIFT 12 /**< Shift value for GPIO_MODE3 */
-#define _GPIO_P_MODEL_MODE3_MASK 0xF000UL /**< Bit mask for GPIO_MODE3 */
-#define GPIO_P_MODEL_MODE3_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_DISABLED (0x00000000UL << 12) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_INPUT (0x00000001UL << 12) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_INPUTPULL (0x00000002UL << 12) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_INPUTPULLFILTER (0x00000003UL << 12) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_PUSHPULL (0x00000004UL << 12) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_PUSHPULLDRIVE (0x00000005UL << 12) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDOR (0x00000006UL << 12) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDORPULLDOWN (0x00000007UL << 12) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDAND (0x00000008UL << 12) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDFILTER (0x00000009UL << 12) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDPULLUP (0x0000000AUL << 12) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER (0x0000000BUL << 12) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDDRIVE (0x0000000CUL << 12) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDDRIVEFILTER (0x0000000DUL << 12) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUP (0x0000000EUL << 12) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 12) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE3_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_SHIFT 16 /**< Shift value for GPIO_MODE4 */
-#define _GPIO_P_MODEL_MODE4_MASK 0xF0000UL /**< Bit mask for GPIO_MODE4 */
-#define GPIO_P_MODEL_MODE4_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_DISABLED (0x00000000UL << 16) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_INPUT (0x00000001UL << 16) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_INPUTPULL (0x00000002UL << 16) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_INPUTPULLFILTER (0x00000003UL << 16) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_PUSHPULL (0x00000004UL << 16) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_PUSHPULLDRIVE (0x00000005UL << 16) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDOR (0x00000006UL << 16) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDORPULLDOWN (0x00000007UL << 16) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDAND (0x00000008UL << 16) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDFILTER (0x00000009UL << 16) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDPULLUP (0x0000000AUL << 16) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER (0x0000000BUL << 16) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDDRIVE (0x0000000CUL << 16) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDDRIVEFILTER (0x0000000DUL << 16) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUP (0x0000000EUL << 16) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 16) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE4_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_SHIFT 20 /**< Shift value for GPIO_MODE5 */
-#define _GPIO_P_MODEL_MODE5_MASK 0xF00000UL /**< Bit mask for GPIO_MODE5 */
-#define GPIO_P_MODEL_MODE5_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_DISABLED (0x00000000UL << 20) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_INPUT (0x00000001UL << 20) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_INPUTPULL (0x00000002UL << 20) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_INPUTPULLFILTER (0x00000003UL << 20) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_PUSHPULL (0x00000004UL << 20) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_PUSHPULLDRIVE (0x00000005UL << 20) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDOR (0x00000006UL << 20) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDORPULLDOWN (0x00000007UL << 20) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDAND (0x00000008UL << 20) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDFILTER (0x00000009UL << 20) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDPULLUP (0x0000000AUL << 20) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER (0x0000000BUL << 20) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDDRIVE (0x0000000CUL << 20) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDDRIVEFILTER (0x0000000DUL << 20) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUP (0x0000000EUL << 20) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 20) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE5_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_SHIFT 24 /**< Shift value for GPIO_MODE6 */
-#define _GPIO_P_MODEL_MODE6_MASK 0xF000000UL /**< Bit mask for GPIO_MODE6 */
-#define GPIO_P_MODEL_MODE6_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_DISABLED (0x00000000UL << 24) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_INPUT (0x00000001UL << 24) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_INPUTPULL (0x00000002UL << 24) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_INPUTPULLFILTER (0x00000003UL << 24) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_PUSHPULL (0x00000004UL << 24) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_PUSHPULLDRIVE (0x00000005UL << 24) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDOR (0x00000006UL << 24) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDORPULLDOWN (0x00000007UL << 24) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDAND (0x00000008UL << 24) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDFILTER (0x00000009UL << 24) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDPULLUP (0x0000000AUL << 24) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER (0x0000000BUL << 24) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDDRIVE (0x0000000CUL << 24) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDDRIVEFILTER (0x0000000DUL << 24) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUP (0x0000000EUL << 24) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 24) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE6_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_SHIFT 28 /**< Shift value for GPIO_MODE7 */
-#define _GPIO_P_MODEL_MODE7_MASK 0xF0000000UL /**< Bit mask for GPIO_MODE7 */
-#define GPIO_P_MODEL_MODE7_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_DISABLED (0x00000000UL << 28) /**< Shifted mode DISABLED for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_INPUT (0x00000001UL << 28) /**< Shifted mode INPUT for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_INPUTPULL (0x00000002UL << 28) /**< Shifted mode INPUTPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_INPUTPULLFILTER (0x00000003UL << 28) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_PUSHPULL (0x00000004UL << 28) /**< Shifted mode PUSHPULL for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_PUSHPULLDRIVE (0x00000005UL << 28) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDOR (0x00000006UL << 28) /**< Shifted mode WIREDOR for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDORPULLDOWN (0x00000007UL << 28) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDAND (0x00000008UL << 28) /**< Shifted mode WIREDAND for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDFILTER (0x00000009UL << 28) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDPULLUP (0x0000000AUL << 28) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDPULLUPFILTER (0x0000000BUL << 28) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDDRIVE (0x0000000CUL << 28) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDDRIVEFILTER (0x0000000DUL << 28) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUP (0x0000000EUL << 28) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 28) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEL */
-#define _GPIO_P_MODEL_MODE7_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEL */
-
-/** Bit fields for GPIO P_MODEH */
-#define _GPIO_P_MODEH_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MASK 0xFFFFFFFFUL /**< Mask for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_SHIFT 0 /**< Shift value for GPIO_MODE8 */
-#define _GPIO_P_MODEH_MODE8_MASK 0xFUL /**< Bit mask for GPIO_MODE8 */
-#define GPIO_P_MODEH_MODE8_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_DISABLED (0x00000000UL << 0) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_INPUT (0x00000001UL << 0) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_INPUTPULL (0x00000002UL << 0) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_INPUTPULLFILTER (0x00000003UL << 0) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_PUSHPULL (0x00000004UL << 0) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_PUSHPULLDRIVE (0x00000005UL << 0) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDOR (0x00000006UL << 0) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDORPULLDOWN (0x00000007UL << 0) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDAND (0x00000008UL << 0) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDFILTER (0x00000009UL << 0) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDPULLUP (0x0000000AUL << 0) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDPULLUPFILTER (0x0000000BUL << 0) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDDRIVE (0x0000000CUL << 0) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDDRIVEFILTER (0x0000000DUL << 0) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUP (0x0000000EUL << 0) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 0) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE8_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_SHIFT 4 /**< Shift value for GPIO_MODE9 */
-#define _GPIO_P_MODEH_MODE9_MASK 0xF0UL /**< Bit mask for GPIO_MODE9 */
-#define GPIO_P_MODEH_MODE9_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_DISABLED (0x00000000UL << 4) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_INPUT (0x00000001UL << 4) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_INPUTPULL (0x00000002UL << 4) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_INPUTPULLFILTER (0x00000003UL << 4) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_PUSHPULL (0x00000004UL << 4) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_PUSHPULLDRIVE (0x00000005UL << 4) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDOR (0x00000006UL << 4) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDORPULLDOWN (0x00000007UL << 4) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDAND (0x00000008UL << 4) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDFILTER (0x00000009UL << 4) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDPULLUP (0x0000000AUL << 4) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDPULLUPFILTER (0x0000000BUL << 4) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDDRIVE (0x0000000CUL << 4) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDDRIVEFILTER (0x0000000DUL << 4) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUP (0x0000000EUL << 4) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 4) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE9_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_SHIFT 8 /**< Shift value for GPIO_MODE10 */
-#define _GPIO_P_MODEH_MODE10_MASK 0xF00UL /**< Bit mask for GPIO_MODE10 */
-#define GPIO_P_MODEH_MODE10_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_DISABLED (0x00000000UL << 8) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_INPUT (0x00000001UL << 8) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_INPUTPULL (0x00000002UL << 8) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_INPUTPULLFILTER (0x00000003UL << 8) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_PUSHPULL (0x00000004UL << 8) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_PUSHPULLDRIVE (0x00000005UL << 8) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDOR (0x00000006UL << 8) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDORPULLDOWN (0x00000007UL << 8) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDAND (0x00000008UL << 8) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDFILTER (0x00000009UL << 8) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDPULLUP (0x0000000AUL << 8) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDPULLUPFILTER (0x0000000BUL << 8) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDDRIVE (0x0000000CUL << 8) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDDRIVEFILTER (0x0000000DUL << 8) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUP (0x0000000EUL << 8) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 8) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE10_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_SHIFT 12 /**< Shift value for GPIO_MODE11 */
-#define _GPIO_P_MODEH_MODE11_MASK 0xF000UL /**< Bit mask for GPIO_MODE11 */
-#define GPIO_P_MODEH_MODE11_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_DISABLED (0x00000000UL << 12) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_INPUT (0x00000001UL << 12) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_INPUTPULL (0x00000002UL << 12) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_INPUTPULLFILTER (0x00000003UL << 12) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_PUSHPULL (0x00000004UL << 12) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_PUSHPULLDRIVE (0x00000005UL << 12) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDOR (0x00000006UL << 12) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDORPULLDOWN (0x00000007UL << 12) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDAND (0x00000008UL << 12) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDFILTER (0x00000009UL << 12) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDPULLUP (0x0000000AUL << 12) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDPULLUPFILTER (0x0000000BUL << 12) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDDRIVE (0x0000000CUL << 12) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDDRIVEFILTER (0x0000000DUL << 12) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUP (0x0000000EUL << 12) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 12) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE11_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_SHIFT 16 /**< Shift value for GPIO_MODE12 */
-#define _GPIO_P_MODEH_MODE12_MASK 0xF0000UL /**< Bit mask for GPIO_MODE12 */
-#define GPIO_P_MODEH_MODE12_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_DISABLED (0x00000000UL << 16) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_INPUT (0x00000001UL << 16) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_INPUTPULL (0x00000002UL << 16) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_INPUTPULLFILTER (0x00000003UL << 16) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_PUSHPULL (0x00000004UL << 16) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_PUSHPULLDRIVE (0x00000005UL << 16) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDOR (0x00000006UL << 16) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDORPULLDOWN (0x00000007UL << 16) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDAND (0x00000008UL << 16) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDFILTER (0x00000009UL << 16) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDPULLUP (0x0000000AUL << 16) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDPULLUPFILTER (0x0000000BUL << 16) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDDRIVE (0x0000000CUL << 16) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDDRIVEFILTER (0x0000000DUL << 16) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUP (0x0000000EUL << 16) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 16) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE12_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_SHIFT 20 /**< Shift value for GPIO_MODE13 */
-#define _GPIO_P_MODEH_MODE13_MASK 0xF00000UL /**< Bit mask for GPIO_MODE13 */
-#define GPIO_P_MODEH_MODE13_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_DISABLED (0x00000000UL << 20) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_INPUT (0x00000001UL << 20) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_INPUTPULL (0x00000002UL << 20) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_INPUTPULLFILTER (0x00000003UL << 20) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_PUSHPULL (0x00000004UL << 20) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_PUSHPULLDRIVE (0x00000005UL << 20) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDOR (0x00000006UL << 20) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDORPULLDOWN (0x00000007UL << 20) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDAND (0x00000008UL << 20) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDFILTER (0x00000009UL << 20) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDPULLUP (0x0000000AUL << 20) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDPULLUPFILTER (0x0000000BUL << 20) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDDRIVE (0x0000000CUL << 20) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDDRIVEFILTER (0x0000000DUL << 20) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUP (0x0000000EUL << 20) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 20) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE13_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_SHIFT 24 /**< Shift value for GPIO_MODE14 */
-#define _GPIO_P_MODEH_MODE14_MASK 0xF000000UL /**< Bit mask for GPIO_MODE14 */
-#define GPIO_P_MODEH_MODE14_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_DISABLED (0x00000000UL << 24) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_INPUT (0x00000001UL << 24) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_INPUTPULL (0x00000002UL << 24) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_INPUTPULLFILTER (0x00000003UL << 24) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_PUSHPULL (0x00000004UL << 24) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_PUSHPULLDRIVE (0x00000005UL << 24) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDOR (0x00000006UL << 24) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDORPULLDOWN (0x00000007UL << 24) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDAND (0x00000008UL << 24) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDFILTER (0x00000009UL << 24) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDPULLUP (0x0000000AUL << 24) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDPULLUPFILTER (0x0000000BUL << 24) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDDRIVE (0x0000000CUL << 24) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDDRIVEFILTER (0x0000000DUL << 24) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUP (0x0000000EUL << 24) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 24) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE14_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_SHIFT 28 /**< Shift value for GPIO_MODE15 */
-#define _GPIO_P_MODEH_MODE15_MASK 0xF0000000UL /**< Bit mask for GPIO_MODE15 */
-#define GPIO_P_MODEH_MODE15_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_DISABLED (0x00000000UL << 28) /**< Shifted mode DISABLED for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_INPUT (0x00000001UL << 28) /**< Shifted mode INPUT for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_INPUTPULL (0x00000002UL << 28) /**< Shifted mode INPUTPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_INPUTPULLFILTER (0x00000003UL << 28) /**< Shifted mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_PUSHPULL (0x00000004UL << 28) /**< Shifted mode PUSHPULL for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_PUSHPULLDRIVE (0x00000005UL << 28) /**< Shifted mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDOR (0x00000006UL << 28) /**< Shifted mode WIREDOR for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDORPULLDOWN (0x00000007UL << 28) /**< Shifted mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDAND (0x00000008UL << 28) /**< Shifted mode WIREDAND for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDFILTER (0x00000009UL << 28) /**< Shifted mode WIREDANDFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDPULLUP (0x0000000AUL << 28) /**< Shifted mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDPULLUPFILTER (0x0000000BUL << 28) /**< Shifted mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDDRIVE (0x0000000CUL << 28) /**< Shifted mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDDRIVEFILTER (0x0000000DUL << 28) /**< Shifted mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUP (0x0000000EUL << 28) /**< Shifted mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUPFILTER (0x0000000FUL << 28) /**< Shifted mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_DISABLED 0x00000000UL /**< Mode DISABLED for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_INPUT 0x00000001UL /**< Mode INPUT for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_INPUTPULL 0x00000002UL /**< Mode INPUTPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_INPUTPULLFILTER 0x00000003UL /**< Mode INPUTPULLFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_PUSHPULL 0x00000004UL /**< Mode PUSHPULL for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_PUSHPULLDRIVE 0x00000005UL /**< Mode PUSHPULLDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDOR 0x00000006UL /**< Mode WIREDOR for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDORPULLDOWN 0x00000007UL /**< Mode WIREDORPULLDOWN for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDAND 0x00000008UL /**< Mode WIREDAND for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDFILTER 0x00000009UL /**< Mode WIREDANDFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDPULLUP 0x0000000AUL /**< Mode WIREDANDPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDPULLUPFILTER 0x0000000BUL /**< Mode WIREDANDPULLUPFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDDRIVE 0x0000000CUL /**< Mode WIREDANDDRIVE for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEFILTER 0x0000000DUL /**< Mode WIREDANDDRIVEFILTER for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUP 0x0000000EUL /**< Mode WIREDANDDRIVEPULLUP for GPIO_P_MODEH */
-#define _GPIO_P_MODEH_MODE15_WIREDANDDRIVEPULLUPFILTER 0x0000000FUL /**< Mode WIREDANDDRIVEPULLUPFILTER for GPIO_P_MODEH */
-
-/** Bit fields for GPIO P_DOUT */
-#define _GPIO_P_DOUT_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_DOUT */
-#define _GPIO_P_DOUT_MASK 0x0000FFFFUL /**< Mask for GPIO_P_DOUT */
-#define _GPIO_P_DOUT_DOUT_SHIFT 0 /**< Shift value for GPIO_DOUT */
-#define _GPIO_P_DOUT_DOUT_MASK 0xFFFFUL /**< Bit mask for GPIO_DOUT */
-#define GPIO_P_DOUT_DOUT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUT */
-#define _GPIO_P_DOUT_DOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_DOUT */
-
-/** Bit fields for GPIO P_DOUTSET */
-#define _GPIO_P_DOUTSET_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_DOUTSET */
-#define _GPIO_P_DOUTSET_MASK 0x0000FFFFUL /**< Mask for GPIO_P_DOUTSET */
-#define _GPIO_P_DOUTSET_DOUTSET_SHIFT 0 /**< Shift value for GPIO_DOUTSET */
-#define _GPIO_P_DOUTSET_DOUTSET_MASK 0xFFFFUL /**< Bit mask for GPIO_DOUTSET */
-#define GPIO_P_DOUTSET_DOUTSET_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTSET */
-#define _GPIO_P_DOUTSET_DOUTSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_DOUTSET */
-
-/** Bit fields for GPIO P_DOUTCLR */
-#define _GPIO_P_DOUTCLR_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_DOUTCLR */
-#define _GPIO_P_DOUTCLR_MASK 0x0000FFFFUL /**< Mask for GPIO_P_DOUTCLR */
-#define _GPIO_P_DOUTCLR_DOUTCLR_SHIFT 0 /**< Shift value for GPIO_DOUTCLR */
-#define _GPIO_P_DOUTCLR_DOUTCLR_MASK 0xFFFFUL /**< Bit mask for GPIO_DOUTCLR */
-#define GPIO_P_DOUTCLR_DOUTCLR_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTCLR */
-#define _GPIO_P_DOUTCLR_DOUTCLR_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_DOUTCLR */
-
-/** Bit fields for GPIO P_DOUTTGL */
-#define _GPIO_P_DOUTTGL_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_DOUTTGL */
-#define _GPIO_P_DOUTTGL_MASK 0x0000FFFFUL /**< Mask for GPIO_P_DOUTTGL */
-#define _GPIO_P_DOUTTGL_DOUTTGL_SHIFT 0 /**< Shift value for GPIO_DOUTTGL */
-#define _GPIO_P_DOUTTGL_DOUTTGL_MASK 0xFFFFUL /**< Bit mask for GPIO_DOUTTGL */
-#define GPIO_P_DOUTTGL_DOUTTGL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_DOUTTGL */
-#define _GPIO_P_DOUTTGL_DOUTTGL_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_DOUTTGL */
-
-/** Bit fields for GPIO P_DIN */
-#define _GPIO_P_DIN_RESETVALUE 0x00000000UL /**< Default value for GPIO_P_DIN */
-#define _GPIO_P_DIN_MASK 0x0000FFFFUL /**< Mask for GPIO_P_DIN */
-#define _GPIO_P_DIN_DIN_SHIFT 0 /**< Shift value for GPIO_DIN */
-#define _GPIO_P_DIN_DIN_MASK 0xFFFFUL /**< Bit mask for GPIO_DIN */
-#define GPIO_P_DIN_DIN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_P_DIN */
-#define _GPIO_P_DIN_DIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_P_DIN */
-
-/** Bit fields for GPIO P_PINLOCKN */
-#define _GPIO_P_PINLOCKN_RESETVALUE 0x0000FFFFUL /**< Default value for GPIO_P_PINLOCKN */
-#define _GPIO_P_PINLOCKN_MASK 0x0000FFFFUL /**< Mask for GPIO_P_PINLOCKN */
-#define _GPIO_P_PINLOCKN_PINLOCKN_SHIFT 0 /**< Shift value for GPIO_PINLOCKN */
-#define _GPIO_P_PINLOCKN_PINLOCKN_MASK 0xFFFFUL /**< Bit mask for GPIO_PINLOCKN */
-#define GPIO_P_PINLOCKN_PINLOCKN_DEFAULT (0x0000FFFFUL << 0) /**< Shifted mode DEFAULT for GPIO_P_PINLOCKN */
-#define _GPIO_P_PINLOCKN_PINLOCKN_DEFAULT 0x0000FFFFUL /**< Mode DEFAULT for GPIO_P_PINLOCKN */
-
-/** Bit fields for GPIO EXTIPSELL */
-#define _GPIO_EXTIPSELL_RESETVALUE 0x00000000UL /**< Default value for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_MASK 0x77777777UL /**< Mask for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_SHIFT 0 /**< Shift value for GPIO_EXTIPSEL0 */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_MASK 0x7UL /**< Bit mask for GPIO_EXTIPSEL0 */
-#define GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTA (0x00000000UL << 0) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTB (0x00000001UL << 0) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTC (0x00000002UL << 0) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTD (0x00000003UL << 0) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTE (0x00000004UL << 0) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL0_PORTF (0x00000005UL << 0) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL0_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_SHIFT 4 /**< Shift value for GPIO_EXTIPSEL1 */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_MASK 0x70UL /**< Bit mask for GPIO_EXTIPSEL1 */
-#define GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTA (0x00000000UL << 4) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTB (0x00000001UL << 4) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTC (0x00000002UL << 4) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTD (0x00000003UL << 4) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTE (0x00000004UL << 4) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL1_PORTF (0x00000005UL << 4) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL1_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_SHIFT 8 /**< Shift value for GPIO_EXTIPSEL2 */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_MASK 0x700UL /**< Bit mask for GPIO_EXTIPSEL2 */
-#define GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTA (0x00000000UL << 8) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTB (0x00000001UL << 8) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTC (0x00000002UL << 8) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTD (0x00000003UL << 8) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTE (0x00000004UL << 8) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL2_PORTF (0x00000005UL << 8) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL2_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_SHIFT 12 /**< Shift value for GPIO_EXTIPSEL3 */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_MASK 0x7000UL /**< Bit mask for GPIO_EXTIPSEL3 */
-#define GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTA (0x00000000UL << 12) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTB (0x00000001UL << 12) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTC (0x00000002UL << 12) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTD (0x00000003UL << 12) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTE (0x00000004UL << 12) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL3_PORTF (0x00000005UL << 12) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL3_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_SHIFT 16 /**< Shift value for GPIO_EXTIPSEL4 */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_MASK 0x70000UL /**< Bit mask for GPIO_EXTIPSEL4 */
-#define GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTA (0x00000000UL << 16) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTB (0x00000001UL << 16) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTC (0x00000002UL << 16) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTD (0x00000003UL << 16) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTE (0x00000004UL << 16) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL4_PORTF (0x00000005UL << 16) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL4_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_SHIFT 20 /**< Shift value for GPIO_EXTIPSEL5 */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_MASK 0x700000UL /**< Bit mask for GPIO_EXTIPSEL5 */
-#define GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTA (0x00000000UL << 20) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTB (0x00000001UL << 20) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTC (0x00000002UL << 20) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTD (0x00000003UL << 20) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTE (0x00000004UL << 20) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL5_PORTF (0x00000005UL << 20) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL5_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_SHIFT 24 /**< Shift value for GPIO_EXTIPSEL6 */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_MASK 0x7000000UL /**< Bit mask for GPIO_EXTIPSEL6 */
-#define GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTA (0x00000000UL << 24) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTB (0x00000001UL << 24) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTC (0x00000002UL << 24) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTD (0x00000003UL << 24) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTE (0x00000004UL << 24) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL6_PORTF (0x00000005UL << 24) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL6_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_SHIFT 28 /**< Shift value for GPIO_EXTIPSEL7 */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_MASK 0x70000000UL /**< Bit mask for GPIO_EXTIPSEL7 */
-#define GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTA (0x00000000UL << 28) /**< Shifted mode PORTA for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTB (0x00000001UL << 28) /**< Shifted mode PORTB for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTC (0x00000002UL << 28) /**< Shifted mode PORTC for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTD (0x00000003UL << 28) /**< Shifted mode PORTD for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTE (0x00000004UL << 28) /**< Shifted mode PORTE for GPIO_EXTIPSELL */
-#define GPIO_EXTIPSELL_EXTIPSEL7_PORTF (0x00000005UL << 28) /**< Shifted mode PORTF for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELL */
-#define _GPIO_EXTIPSELL_EXTIPSEL7_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELL */
-
-/** Bit fields for GPIO EXTIPSELH */
-#define _GPIO_EXTIPSELH_RESETVALUE 0x00000000UL /**< Default value for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_MASK 0x77777777UL /**< Mask for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_SHIFT 0 /**< Shift value for GPIO_EXTIPSEL8 */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_MASK 0x7UL /**< Bit mask for GPIO_EXTIPSEL8 */
-#define GPIO_EXTIPSELH_EXTIPSEL8_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTA (0x00000000UL << 0) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTB (0x00000001UL << 0) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTC (0x00000002UL << 0) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTD (0x00000003UL << 0) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTE (0x00000004UL << 0) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL8_PORTF (0x00000005UL << 0) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL8_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_SHIFT 4 /**< Shift value for GPIO_EXTIPSEL9 */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_MASK 0x70UL /**< Bit mask for GPIO_EXTIPSEL9 */
-#define GPIO_EXTIPSELH_EXTIPSEL9_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTA (0x00000000UL << 4) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTB (0x00000001UL << 4) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTC (0x00000002UL << 4) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTD (0x00000003UL << 4) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTE (0x00000004UL << 4) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL9_PORTF (0x00000005UL << 4) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL9_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_SHIFT 8 /**< Shift value for GPIO_EXTIPSEL10 */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_MASK 0x700UL /**< Bit mask for GPIO_EXTIPSEL10 */
-#define GPIO_EXTIPSELH_EXTIPSEL10_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTA (0x00000000UL << 8) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTB (0x00000001UL << 8) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTC (0x00000002UL << 8) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTD (0x00000003UL << 8) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTE (0x00000004UL << 8) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL10_PORTF (0x00000005UL << 8) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL10_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_SHIFT 12 /**< Shift value for GPIO_EXTIPSEL11 */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_MASK 0x7000UL /**< Bit mask for GPIO_EXTIPSEL11 */
-#define GPIO_EXTIPSELH_EXTIPSEL11_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTA (0x00000000UL << 12) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTB (0x00000001UL << 12) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTC (0x00000002UL << 12) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTD (0x00000003UL << 12) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTE (0x00000004UL << 12) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL11_PORTF (0x00000005UL << 12) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL11_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_SHIFT 16 /**< Shift value for GPIO_EXTIPSEL12 */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_MASK 0x70000UL /**< Bit mask for GPIO_EXTIPSEL12 */
-#define GPIO_EXTIPSELH_EXTIPSEL12_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTA (0x00000000UL << 16) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTB (0x00000001UL << 16) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTC (0x00000002UL << 16) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTD (0x00000003UL << 16) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTE (0x00000004UL << 16) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL12_PORTF (0x00000005UL << 16) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL12_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_SHIFT 20 /**< Shift value for GPIO_EXTIPSEL13 */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_MASK 0x700000UL /**< Bit mask for GPIO_EXTIPSEL13 */
-#define GPIO_EXTIPSELH_EXTIPSEL13_DEFAULT (0x00000000UL << 20) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTA (0x00000000UL << 20) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTB (0x00000001UL << 20) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTC (0x00000002UL << 20) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTD (0x00000003UL << 20) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTE (0x00000004UL << 20) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL13_PORTF (0x00000005UL << 20) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL13_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_SHIFT 24 /**< Shift value for GPIO_EXTIPSEL14 */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_MASK 0x7000000UL /**< Bit mask for GPIO_EXTIPSEL14 */
-#define GPIO_EXTIPSELH_EXTIPSEL14_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTA (0x00000000UL << 24) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTB (0x00000001UL << 24) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTC (0x00000002UL << 24) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTD (0x00000003UL << 24) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTE (0x00000004UL << 24) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL14_PORTF (0x00000005UL << 24) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL14_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_SHIFT 28 /**< Shift value for GPIO_EXTIPSEL16 */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_MASK 0x70000000UL /**< Bit mask for GPIO_EXTIPSEL16 */
-#define GPIO_EXTIPSELH_EXTIPSEL16_DEFAULT (0x00000000UL << 28) /**< Shifted mode DEFAULT for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTA (0x00000000UL << 28) /**< Shifted mode PORTA for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTB (0x00000001UL << 28) /**< Shifted mode PORTB for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTC (0x00000002UL << 28) /**< Shifted mode PORTC for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTD (0x00000003UL << 28) /**< Shifted mode PORTD for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTE (0x00000004UL << 28) /**< Shifted mode PORTE for GPIO_EXTIPSELH */
-#define GPIO_EXTIPSELH_EXTIPSEL16_PORTF (0x00000005UL << 28) /**< Shifted mode PORTF for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTA 0x00000000UL /**< Mode PORTA for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTB 0x00000001UL /**< Mode PORTB for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTC 0x00000002UL /**< Mode PORTC for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTD 0x00000003UL /**< Mode PORTD for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTE 0x00000004UL /**< Mode PORTE for GPIO_EXTIPSELH */
-#define _GPIO_EXTIPSELH_EXTIPSEL16_PORTF 0x00000005UL /**< Mode PORTF for GPIO_EXTIPSELH */
-
-/** Bit fields for GPIO EXTIRISE */
-#define _GPIO_EXTIRISE_RESETVALUE 0x00000000UL /**< Default value for GPIO_EXTIRISE */
-#define _GPIO_EXTIRISE_MASK 0x0000FFFFUL /**< Mask for GPIO_EXTIRISE */
-#define _GPIO_EXTIRISE_EXTIRISE_SHIFT 0 /**< Shift value for GPIO_EXTIRISE */
-#define _GPIO_EXTIRISE_EXTIRISE_MASK 0xFFFFUL /**< Bit mask for GPIO_EXTIRISE */
-#define GPIO_EXTIRISE_EXTIRISE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_EXTIRISE */
-#define _GPIO_EXTIRISE_EXTIRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIRISE */
-
-/** Bit fields for GPIO EXTIFALL */
-#define _GPIO_EXTIFALL_RESETVALUE 0x00000000UL /**< Default value for GPIO_EXTIFALL */
-#define _GPIO_EXTIFALL_MASK 0x0000FFFFUL /**< Mask for GPIO_EXTIFALL */
-#define _GPIO_EXTIFALL_EXTIFALL_SHIFT 0 /**< Shift value for GPIO_EXTIFALL */
-#define _GPIO_EXTIFALL_EXTIFALL_MASK 0xFFFFUL /**< Bit mask for GPIO_EXTIFALL */
-#define GPIO_EXTIFALL_EXTIFALL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_EXTIFALL */
-#define _GPIO_EXTIFALL_EXTIFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_EXTIFALL */
-
-/** Bit fields for GPIO IEN */
-#define _GPIO_IEN_RESETVALUE 0x00000000UL /**< Default value for GPIO_IEN */
-#define _GPIO_IEN_MASK 0x0000FFFFUL /**< Mask for GPIO_IEN */
-#define _GPIO_IEN_EXT_SHIFT 0 /**< Shift value for GPIO_EXT */
-#define _GPIO_IEN_EXT_MASK 0xFFFFUL /**< Bit mask for GPIO_EXT */
-#define GPIO_IEN_EXT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_IEN */
-#define _GPIO_IEN_EXT_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_IEN */
-
-/** Bit fields for GPIO IF */
-#define _GPIO_IF_RESETVALUE 0x00000000UL /**< Default value for GPIO_IF */
-#define _GPIO_IF_MASK 0x0000FFFFUL /**< Mask for GPIO_IF */
-#define _GPIO_IF_EXT_SHIFT 0 /**< Shift value for GPIO_EXT */
-#define _GPIO_IF_EXT_MASK 0xFFFFUL /**< Bit mask for GPIO_EXT */
-#define GPIO_IF_EXT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_IF */
-#define _GPIO_IF_EXT_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_IF */
-
-/** Bit fields for GPIO IFS */
-#define _GPIO_IFS_RESETVALUE 0x00000000UL /**< Default value for GPIO_IFS */
-#define _GPIO_IFS_MASK 0x0000FFFFUL /**< Mask for GPIO_IFS */
-#define _GPIO_IFS_EXT_SHIFT 0 /**< Shift value for GPIO_EXT */
-#define _GPIO_IFS_EXT_MASK 0xFFFFUL /**< Bit mask for GPIO_EXT */
-#define GPIO_IFS_EXT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_IFS */
-#define _GPIO_IFS_EXT_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_IFS */
-
-/** Bit fields for GPIO IFC */
-#define _GPIO_IFC_RESETVALUE 0x00000000UL /**< Default value for GPIO_IFC */
-#define _GPIO_IFC_MASK 0x0000FFFFUL /**< Mask for GPIO_IFC */
-#define _GPIO_IFC_EXT_SHIFT 0 /**< Shift value for GPIO_EXT */
-#define _GPIO_IFC_EXT_MASK 0xFFFFUL /**< Bit mask for GPIO_EXT */
-#define GPIO_IFC_EXT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_IFC */
-#define _GPIO_IFC_EXT_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_IFC */
-
-/** Bit fields for GPIO ROUTE */
-#define _GPIO_ROUTE_RESETVALUE 0x00000003UL /**< Default value for GPIO_ROUTE */
-#define _GPIO_ROUTE_MASK 0x00000307UL /**< Mask for GPIO_ROUTE */
-#define GPIO_ROUTE_SWCLKPEN (1 << 0) /**< Serial Wire Clock Pin Enable */
-#define _GPIO_ROUTE_SWCLKPEN_SHIFT 0 /**< Shift value for GPIO_SWCLKPEN */
-#define _GPIO_ROUTE_SWCLKPEN_MASK 0x1UL /**< Bit mask for GPIO_SWCLKPEN */
-#define GPIO_ROUTE_SWCLKPEN_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWCLKPEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for GPIO_ROUTE */
-#define GPIO_ROUTE_SWDIOPEN (1 << 1) /**< Serial Wire Data Pin Enable */
-#define _GPIO_ROUTE_SWDIOPEN_SHIFT 1 /**< Shift value for GPIO_SWDIOPEN */
-#define _GPIO_ROUTE_SWDIOPEN_MASK 0x2UL /**< Bit mask for GPIO_SWDIOPEN */
-#define GPIO_ROUTE_SWDIOPEN_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWDIOPEN_DEFAULT 0x00000001UL /**< Mode DEFAULT for GPIO_ROUTE */
-#define GPIO_ROUTE_SWVPEN (1 << 2) /**< Serial Wire Viewer Pin Enable */
-#define _GPIO_ROUTE_SWVPEN_SHIFT 2 /**< Shift value for GPIO_SWVPEN */
-#define _GPIO_ROUTE_SWVPEN_MASK 0x4UL /**< Bit mask for GPIO_SWVPEN */
-#define GPIO_ROUTE_SWVPEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWVPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_SHIFT 8 /**< Shift value for GPIO_SWLOCATION */
-#define _GPIO_ROUTE_SWLOCATION_MASK 0x300UL /**< Bit mask for GPIO_SWLOCATION */
-#define GPIO_ROUTE_SWLOCATION_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for GPIO_ROUTE */
-#define GPIO_ROUTE_SWLOCATION_LOC0 (0x00000000UL << 8) /**< Shifted mode LOC0 for GPIO_ROUTE */
-#define GPIO_ROUTE_SWLOCATION_LOC1 (0x00000001UL << 8) /**< Shifted mode LOC1 for GPIO_ROUTE */
-#define GPIO_ROUTE_SWLOCATION_LOC2 (0x00000002UL << 8) /**< Shifted mode LOC2 for GPIO_ROUTE */
-#define GPIO_ROUTE_SWLOCATION_LOC3 (0x00000003UL << 8) /**< Shifted mode LOC3 for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_LOC0 0x00000000UL /**< Mode LOC0 for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_LOC1 0x00000001UL /**< Mode LOC1 for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_LOC2 0x00000002UL /**< Mode LOC2 for GPIO_ROUTE */
-#define _GPIO_ROUTE_SWLOCATION_LOC3 0x00000003UL /**< Mode LOC3 for GPIO_ROUTE */
-
-/** Bit fields for GPIO INSENSE */
-#define _GPIO_INSENSE_RESETVALUE 0x00000003UL /**< Default value for GPIO_INSENSE */
-#define _GPIO_INSENSE_MASK 0x00000003UL /**< Mask for GPIO_INSENSE */
-#define GPIO_INSENSE_INTSENSE (1 << 0) /**< Interrupt Sense Enable */
-#define _GPIO_INSENSE_INTSENSE_SHIFT 0 /**< Shift value for GPIO_INTSENSE */
-#define _GPIO_INSENSE_INTSENSE_MASK 0x1UL /**< Bit mask for GPIO_INTSENSE */
-#define GPIO_INSENSE_INTSENSE_DEFAULT (0x00000001UL << 0) /**< Shifted mode DEFAULT for GPIO_INSENSE */
-#define _GPIO_INSENSE_INTSENSE_DEFAULT 0x00000001UL /**< Mode DEFAULT for GPIO_INSENSE */
-#define GPIO_INSENSE_PRSSENSE (1 << 1) /**< PRS Sense Enable */
-#define _GPIO_INSENSE_PRSSENSE_SHIFT 1 /**< Shift value for GPIO_PRSSENSE */
-#define _GPIO_INSENSE_PRSSENSE_MASK 0x2UL /**< Bit mask for GPIO_PRSSENSE */
-#define GPIO_INSENSE_PRSSENSE_DEFAULT (0x00000001UL << 1) /**< Shifted mode DEFAULT for GPIO_INSENSE */
-#define _GPIO_INSENSE_PRSSENSE_DEFAULT 0x00000001UL /**< Mode DEFAULT for GPIO_INSENSE */
-
-/** Bit fields for GPIO LOCK */
-#define _GPIO_LOCK_RESETVALUE 0x00000000UL /**< Default value for GPIO_LOCK */
-#define _GPIO_LOCK_MASK 0x0000FFFFUL /**< Mask for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for GPIO_LOCKKEY */
-#define _GPIO_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for GPIO_LOCKKEY */
-#define GPIO_LOCK_LOCKKEY_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for GPIO_LOCK */
-#define GPIO_LOCK_LOCKKEY_LOCK (0x00000000UL << 0) /**< Shifted mode LOCK for GPIO_LOCK */
-#define GPIO_LOCK_LOCKKEY_UNLOCKED (0x00000000UL << 0) /**< Shifted mode UNLOCKED for GPIO_LOCK */
-#define GPIO_LOCK_LOCKKEY_LOCKED (0x00000001UL << 0) /**< Shifted mode LOCKED for GPIO_LOCK */
-#define GPIO_LOCK_LOCKKEY_UNLOCK (0x0000A534UL << 0) /**< Shifted mode UNLOCK for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for GPIO_LOCK */
-#define _GPIO_LOCK_LOCKKEY_UNLOCK 0x0000A534UL /**< Mode UNLOCK for GPIO_LOCK */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_PRS
- * @{
- */
-
-/** Bit fields for PRS SWPULSE */
-#define _PRS_SWPULSE_RESETVALUE 0x00000000UL /**< Default value for PRS_SWPULSE */
-#define _PRS_SWPULSE_MASK 0x000000FFUL /**< Mask for PRS_SWPULSE */
-#define _PRS_SWPULSE_SWPULSE_SHIFT 0 /**< Shift value for PRS_SWPULSE */
-#define _PRS_SWPULSE_SWPULSE_MASK 0xFFUL /**< Bit mask for PRS_SWPULSE */
-#define PRS_SWPULSE_SWPULSE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PRS_SWPULSE */
-#define _PRS_SWPULSE_SWPULSE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PRS_SWPULSE */
-
-/** Bit fields for PRS SWLEVEL */
-#define _PRS_SWLEVEL_RESETVALUE 0x00000000UL /**< Default value for PRS_SWLEVEL */
-#define _PRS_SWLEVEL_MASK 0x000000FFUL /**< Mask for PRS_SWLEVEL */
-#define _PRS_SWLEVEL_SWLEVEL_SHIFT 0 /**< Shift value for PRS_SWLEVEL */
-#define _PRS_SWLEVEL_SWLEVEL_MASK 0xFFUL /**< Bit mask for PRS_SWLEVEL */
-#define PRS_SWLEVEL_SWLEVEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for PRS_SWLEVEL */
-#define _PRS_SWLEVEL_SWLEVEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PRS_SWLEVEL */
-
-/** Bit fields for PRS CH_CTRL */
-#define _PRS_CH_CTRL_RESETVALUE 0x00000000UL /**< Default value for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_MASK 0x033F0007UL /**< Mask for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_SHIFT 0 /**< Shift value for PRS_SIGSEL */
-#define _PRS_CH_CTRL_SIGSEL_MASK 0x7UL /**< Bit mask for PRS_SIGSEL */
-#define PRS_CH_CTRL_SIGSEL_VCMPOUT (0x00000000UL << 0) /**< Shifted mode VCMPOUT for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_ACMP0OUT (0x00000000UL << 0) /**< Shifted mode ACMP0OUT for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_ACMP1OUT (0x00000000UL << 0) /**< Shifted mode ACMP1OUT for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_DAC0CH0 (0x00000000UL << 0) /**< Shifted mode DAC0CH0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_ADC0SINGLE (0x00000000UL << 0) /**< Shifted mode ADC0SINGLE for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART0IRTX (0x00000000UL << 0) /**< Shifted mode USART0IRTX for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER0UF (0x00000000UL << 0) /**< Shifted mode TIMER0UF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER1UF (0x00000000UL << 0) /**< Shifted mode TIMER1UF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER2UF (0x00000000UL << 0) /**< Shifted mode TIMER2UF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_RTCOF (0x00000000UL << 0) /**< Shifted mode RTCOF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN0 (0x00000000UL << 0) /**< Shifted mode GPIOPIN0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN8 (0x00000000UL << 0) /**< Shifted mode GPIOPIN8 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_DAC0CH1 (0x00000001UL << 0) /**< Shifted mode DAC0CH1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_ADC0SCAN (0x00000001UL << 0) /**< Shifted mode ADC0SCAN for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART0TXC (0x00000001UL << 0) /**< Shifted mode USART0TXC for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART1TXC (0x00000001UL << 0) /**< Shifted mode USART1TXC for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART2TXC (0x00000001UL << 0) /**< Shifted mode USART2TXC for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER0OF (0x00000001UL << 0) /**< Shifted mode TIMER0OF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER1OF (0x00000001UL << 0) /**< Shifted mode TIMER1OF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER2OF (0x00000001UL << 0) /**< Shifted mode TIMER2OF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_RTCCOMP0 (0x00000001UL << 0) /**< Shifted mode RTCCOMP0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_UART0TXC (0x00000001UL << 0) /**< Shifted mode UART0TXC for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN1 (0x00000001UL << 0) /**< Shifted mode GPIOPIN1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN9 (0x00000001UL << 0) /**< Shifted mode GPIOPIN9 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART0RXDATAV (0x00000002UL << 0) /**< Shifted mode USART0RXDATAV for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART1RXDATAV (0x00000002UL << 0) /**< Shifted mode USART1RXDATAV for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_USART2RXDATAV (0x00000002UL << 0) /**< Shifted mode USART2RXDATAV for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER0CC0 (0x00000002UL << 0) /**< Shifted mode TIMER0CC0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER1CC0 (0x00000002UL << 0) /**< Shifted mode TIMER1CC0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER2CC0 (0x00000002UL << 0) /**< Shifted mode TIMER2CC0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_RTCCOMP1 (0x00000002UL << 0) /**< Shifted mode RTCCOMP1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_UART0RXDATAV (0x00000002UL << 0) /**< Shifted mode UART0RXDATAV for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN2 (0x00000002UL << 0) /**< Shifted mode GPIOPIN2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN10 (0x00000002UL << 0) /**< Shifted mode GPIOPIN10 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER0CC1 (0x00000003UL << 0) /**< Shifted mode TIMER0CC1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER1CC1 (0x00000003UL << 0) /**< Shifted mode TIMER1CC1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER2CC1 (0x00000003UL << 0) /**< Shifted mode TIMER2CC1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN3 (0x00000003UL << 0) /**< Shifted mode GPIOPIN3 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN11 (0x00000003UL << 0) /**< Shifted mode GPIOPIN11 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER0CC2 (0x00000004UL << 0) /**< Shifted mode TIMER0CC2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER1CC2 (0x00000004UL << 0) /**< Shifted mode TIMER1CC2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_TIMER2CC2 (0x00000004UL << 0) /**< Shifted mode TIMER2CC2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN4 (0x00000004UL << 0) /**< Shifted mode GPIOPIN4 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN12 (0x00000004UL << 0) /**< Shifted mode GPIOPIN12 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN5 (0x00000005UL << 0) /**< Shifted mode GPIOPIN5 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN13 (0x00000005UL << 0) /**< Shifted mode GPIOPIN13 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN6 (0x00000006UL << 0) /**< Shifted mode GPIOPIN6 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN14 (0x00000006UL << 0) /**< Shifted mode GPIOPIN14 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN7 (0x00000007UL << 0) /**< Shifted mode GPIOPIN7 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SIGSEL_GPIOPIN15 (0x00000007UL << 0) /**< Shifted mode GPIOPIN15 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL /**< Mode VCMPOUT for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL /**< Mode ACMP0OUT for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL /**< Mode ACMP1OUT for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL /**< Mode DAC0CH0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL /**< Mode ADC0SINGLE for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL /**< Mode USART0IRTX for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL /**< Mode TIMER0UF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL /**< Mode TIMER1UF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL /**< Mode TIMER2UF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL /**< Mode RTCOF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL /**< Mode GPIOPIN0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL /**< Mode GPIOPIN8 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL /**< Mode DAC0CH1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL /**< Mode ADC0SCAN for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL /**< Mode USART0TXC for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL /**< Mode USART1TXC for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL /**< Mode USART2TXC for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL /**< Mode TIMER0OF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL /**< Mode TIMER1OF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL /**< Mode TIMER2OF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL /**< Mode RTCCOMP0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_UART0TXC 0x00000001UL /**< Mode UART0TXC for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL /**< Mode GPIOPIN1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL /**< Mode GPIOPIN9 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL /**< Mode USART0RXDATAV for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL /**< Mode USART1RXDATAV for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL /**< Mode USART2RXDATAV for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL /**< Mode TIMER0CC0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL /**< Mode TIMER1CC0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL /**< Mode TIMER2CC0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL /**< Mode RTCCOMP1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000002UL /**< Mode UART0RXDATAV for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL /**< Mode GPIOPIN2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL /**< Mode GPIOPIN10 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL /**< Mode TIMER0CC1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL /**< Mode TIMER1CC1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL /**< Mode TIMER2CC1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL /**< Mode GPIOPIN3 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL /**< Mode GPIOPIN11 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL /**< Mode TIMER0CC2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL /**< Mode TIMER1CC2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL /**< Mode TIMER2CC2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL /**< Mode GPIOPIN4 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL /**< Mode GPIOPIN12 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL /**< Mode GPIOPIN5 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL /**< Mode GPIOPIN13 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL /**< Mode GPIOPIN6 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL /**< Mode GPIOPIN14 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL /**< Mode GPIOPIN7 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL /**< Mode GPIOPIN15 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_SHIFT 16 /**< Shift value for PRS_SOURCESEL */
-#define _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL /**< Bit mask for PRS_SOURCESEL */
-#define PRS_CH_CTRL_SOURCESEL_NONE (0x00000000UL << 16) /**< Shifted mode NONE for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_VCMP (0x00000001UL << 16) /**< Shifted mode VCMP for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_ACMP0 (0x00000002UL << 16) /**< Shifted mode ACMP0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_ACMP1 (0x00000003UL << 16) /**< Shifted mode ACMP1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_DAC0 (0x00000006UL << 16) /**< Shifted mode DAC0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_ADC0 (0x00000008UL << 16) /**< Shifted mode ADC0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_USART0 (0x00000010UL << 16) /**< Shifted mode USART0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_USART1 (0x00000011UL << 16) /**< Shifted mode USART1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_USART2 (0x00000012UL << 16) /**< Shifted mode USART2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_TIMER0 (0x0000001CUL << 16) /**< Shifted mode TIMER0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_TIMER1 (0x0000001DUL << 16) /**< Shifted mode TIMER1 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_TIMER2 (0x0000001EUL << 16) /**< Shifted mode TIMER2 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_RTC (0x00000028UL << 16) /**< Shifted mode RTC for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_UART0 (0x00000029UL << 16) /**< Shifted mode UART0 for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_GPIOL (0x00000030UL << 16) /**< Shifted mode GPIOL for PRS_CH_CTRL */
-#define PRS_CH_CTRL_SOURCESEL_GPIOH (0x00000031UL << 16) /**< Shifted mode GPIOH for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL /**< Mode NONE for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL /**< Mode VCMP for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACMP0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL /**< Mode ACMP1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL /**< Mode DAC0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL /**< Mode ADC0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL /**< Mode USART0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL /**< Mode USART1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL /**< Mode USART2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL /**< Mode TIMER0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL /**< Mode TIMER1 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL /**< Mode TIMER2 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL /**< Mode RTC for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_UART0 0x00000029UL /**< Mode UART0 for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL /**< Mode GPIOL for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL /**< Mode GPIOH for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_SHIFT 24 /**< Shift value for PRS_EDSEL */
-#define _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL /**< Bit mask for PRS_EDSEL */
-#define PRS_CH_CTRL_EDSEL_DEFAULT (0x00000000UL << 24) /**< Shifted mode DEFAULT for PRS_CH_CTRL */
-#define PRS_CH_CTRL_EDSEL_OFF (0x00000000UL << 24) /**< Shifted mode OFF for PRS_CH_CTRL */
-#define PRS_CH_CTRL_EDSEL_POSEDGE (0x00000001UL << 24) /**< Shifted mode POSEDGE for PRS_CH_CTRL */
-#define PRS_CH_CTRL_EDSEL_NEGEDGE (0x00000002UL << 24) /**< Shifted mode NEGEDGE for PRS_CH_CTRL */
-#define PRS_CH_CTRL_EDSEL_BOTHEDGES (0x00000003UL << 24) /**< Shifted mode BOTHEDGES for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL /**< Mode OFF for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL /**< Mode POSEDGE for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL /**< Mode NEGEDGE for PRS_CH_CTRL */
-#define _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL /**< Mode BOTHEDGES for PRS_CH_CTRL */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_DMA
- * @{
- */
-
-/** Bit fields for DMA STATUS */
-#define _DMA_STATUS_RESETVALUE 0x10070000UL /**< Default value for DMA_STATUS */
-#define _DMA_STATUS_MASK 0xF01F00F1UL /**< Mask for DMA_STATUS */
-#define DMA_STATUS_EN (1 << 0) /**< DMA Enable Status */
-#define _DMA_STATUS_EN_SHIFT 0 /**< Shift value for DMA_EN */
-#define _DMA_STATUS_EN_MASK 0x1UL /**< Bit mask for DMA_EN */
-#define DMA_STATUS_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_STATE_SHIFT 4 /**< Shift value for DMA_STATE */
-#define _DMA_STATUS_STATE_MASK 0xF0UL /**< Bit mask for DMA_STATE */
-#define DMA_STATUS_STATE_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for DMA_STATUS */
-#define DMA_STATUS_STATE_IDLE (0x00000000UL << 4) /**< Shifted mode IDLE for DMA_STATUS */
-#define DMA_STATUS_STATE_RDCHCTRLDATA (0x00000001UL << 4) /**< Shifted mode RDCHCTRLDATA for DMA_STATUS */
-#define DMA_STATUS_STATE_RDSRCENDPTR (0x00000002UL << 4) /**< Shifted mode RDSRCENDPTR for DMA_STATUS */
-#define DMA_STATUS_STATE_RDDSTENDPTR (0x00000003UL << 4) /**< Shifted mode RDDSTENDPTR for DMA_STATUS */
-#define DMA_STATUS_STATE_RDSRCDATA (0x00000004UL << 4) /**< Shifted mode RDSRCDATA for DMA_STATUS */
-#define DMA_STATUS_STATE_WRDSTDATA (0x00000005UL << 4) /**< Shifted mode WRDSTDATA for DMA_STATUS */
-#define DMA_STATUS_STATE_WAITREQCLR (0x00000006UL << 4) /**< Shifted mode WAITREQCLR for DMA_STATUS */
-#define DMA_STATUS_STATE_WRCHCTRLDATA (0x00000007UL << 4) /**< Shifted mode WRCHCTRLDATA for DMA_STATUS */
-#define DMA_STATUS_STATE_STALLED (0x00000008UL << 4) /**< Shifted mode STALLED for DMA_STATUS */
-#define DMA_STATUS_STATE_DONE (0x00000009UL << 4) /**< Shifted mode DONE for DMA_STATUS */
-#define DMA_STATUS_STATE_PERSCATTRANS (0x0000000AUL << 4) /**< Shifted mode PERSCATTRANS for DMA_STATUS */
-#define _DMA_STATUS_STATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< Mode IDLE for DMA_STATUS */
-#define _DMA_STATUS_STATE_RDCHCTRLDATA 0x00000001UL /**< Mode RDCHCTRLDATA for DMA_STATUS */
-#define _DMA_STATUS_STATE_RDSRCENDPTR 0x00000002UL /**< Mode RDSRCENDPTR for DMA_STATUS */
-#define _DMA_STATUS_STATE_RDDSTENDPTR 0x00000003UL /**< Mode RDDSTENDPTR for DMA_STATUS */
-#define _DMA_STATUS_STATE_RDSRCDATA 0x00000004UL /**< Mode RDSRCDATA for DMA_STATUS */
-#define _DMA_STATUS_STATE_WRDSTDATA 0x00000005UL /**< Mode WRDSTDATA for DMA_STATUS */
-#define _DMA_STATUS_STATE_WAITREQCLR 0x00000006UL /**< Mode WAITREQCLR for DMA_STATUS */
-#define _DMA_STATUS_STATE_WRCHCTRLDATA 0x00000007UL /**< Mode WRCHCTRLDATA for DMA_STATUS */
-#define _DMA_STATUS_STATE_STALLED 0x00000008UL /**< Mode STALLED for DMA_STATUS */
-#define _DMA_STATUS_STATE_DONE 0x00000009UL /**< Mode DONE for DMA_STATUS */
-#define _DMA_STATUS_STATE_PERSCATTRANS 0x0000000AUL /**< Mode PERSCATTRANS for DMA_STATUS */
-#define _DMA_STATUS_CHNUM_SHIFT 16 /**< Shift value for DMA_CHNUM */
-#define _DMA_STATUS_CHNUM_MASK 0x1F0000UL /**< Bit mask for DMA_CHNUM */
-#define DMA_STATUS_CHNUM_DEFAULT (0x00000007UL << 16) /**< Shifted mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_CHNUM_DEFAULT 0x00000007UL /**< Mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_TEST_SHIFT 28 /**< Shift value for DMA_TEST */
-#define _DMA_STATUS_TEST_MASK 0xF0000000UL /**< Bit mask for DMA_TEST */
-#define DMA_STATUS_TEST_DEFAULT (0x00000001UL << 28) /**< Shifted mode DEFAULT for DMA_STATUS */
-#define _DMA_STATUS_TEST_DEFAULT 0x00000001UL /**< Mode DEFAULT for DMA_STATUS */
-
-/** Bit fields for DMA CONFIG */
-#define _DMA_CONFIG_RESETVALUE 0x00000000UL /**< Default value for DMA_CONFIG */
-#define _DMA_CONFIG_MASK 0x000000E1UL /**< Mask for DMA_CONFIG */
-#define DMA_CONFIG_EN (1 << 0) /**< Enable DMA */
-#define _DMA_CONFIG_EN_SHIFT 0 /**< Shift value for DMA_EN */
-#define _DMA_CONFIG_EN_MASK 0x1UL /**< Bit mask for DMA_EN */
-#define DMA_CONFIG_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CONFIG */
-#define _DMA_CONFIG_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CONFIG */
-#define _DMA_CONFIG_CHPROT_SHIFT 5 /**< Shift value for DMA_CHPROT */
-#define _DMA_CONFIG_CHPROT_MASK 0xE0UL /**< Bit mask for DMA_CHPROT */
-#define DMA_CONFIG_CHPROT_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for DMA_CONFIG */
-#define _DMA_CONFIG_CHPROT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CONFIG */
-
-/** Bit fields for DMA CTRLBASE */
-#define _DMA_CTRLBASE_RESETVALUE 0x00000000UL /**< Default value for DMA_CTRLBASE */
-#define _DMA_CTRLBASE_MASK 0xFFFFFFFFUL /**< Mask for DMA_CTRLBASE */
-#define _DMA_CTRLBASE_CTRLBASE_SHIFT 0 /**< Shift value for DMA_CTRLBASE */
-#define _DMA_CTRLBASE_CTRLBASE_MASK 0xFFFFFFFFUL /**< Bit mask for DMA_CTRLBASE */
-#define DMA_CTRLBASE_CTRLBASE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CTRLBASE */
-#define _DMA_CTRLBASE_CTRLBASE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CTRLBASE */
-
-/** Bit fields for DMA ALTCTRLBASE */
-#define _DMA_ALTCTRLBASE_RESETVALUE 0x00000080UL /**< Default value for DMA_ALTCTRLBASE */
-#define _DMA_ALTCTRLBASE_MASK 0xFFFFFFFFUL /**< Mask for DMA_ALTCTRLBASE */
-#define _DMA_ALTCTRLBASE_ALTCTRLBASE_SHIFT 0 /**< Shift value for DMA_ALTCTRLBASE */
-#define _DMA_ALTCTRLBASE_ALTCTRLBASE_MASK 0xFFFFFFFFUL /**< Bit mask for DMA_ALTCTRLBASE */
-#define DMA_ALTCTRLBASE_ALTCTRLBASE_DEFAULT (0x00000080UL << 0) /**< Shifted mode DEFAULT for DMA_ALTCTRLBASE */
-#define _DMA_ALTCTRLBASE_ALTCTRLBASE_DEFAULT 0x00000080UL /**< Mode DEFAULT for DMA_ALTCTRLBASE */
-
-/** Bit fields for DMA WAITSTATUS */
-#define _DMA_WAITSTATUS_RESETVALUE 0x000000FFUL /**< Default value for DMA_WAITSTATUS */
-#define _DMA_WAITSTATUS_MASK 0xFFFFFFFFUL /**< Mask for DMA_WAITSTATUS */
-#define _DMA_WAITSTATUS_WAITSTATUS_SHIFT 0 /**< Shift value for DMA_WAITSTATUS */
-#define _DMA_WAITSTATUS_WAITSTATUS_MASK 0xFFFFFFFFUL /**< Bit mask for DMA_WAITSTATUS */
-#define DMA_WAITSTATUS_WAITSTATUS_DEFAULT (0x000000FFUL << 0) /**< Shifted mode DEFAULT for DMA_WAITSTATUS */
-#define _DMA_WAITSTATUS_WAITSTATUS_DEFAULT 0x000000FFUL /**< Mode DEFAULT for DMA_WAITSTATUS */
-
-/** Bit fields for DMA CHSWREQ */
-#define _DMA_CHSWREQ_RESETVALUE 0x00000000UL /**< Default value for DMA_CHSWREQ */
-#define _DMA_CHSWREQ_MASK 0x000000FFUL /**< Mask for DMA_CHSWREQ */
-#define _DMA_CHSWREQ_CHSWREQ_SHIFT 0 /**< Shift value for DMA_CHSWREQ */
-#define _DMA_CHSWREQ_CHSWREQ_MASK 0xFFUL /**< Bit mask for DMA_CHSWREQ */
-#define DMA_CHSWREQ_CHSWREQ_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHSWREQ */
-#define _DMA_CHSWREQ_CHSWREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHSWREQ */
-
-/** Bit fields for DMA CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_RESETVALUE 0x00000000UL /**< Default value for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_MASK 0x000000FFUL /**< Mask for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_CHUSEBURSTS_SHIFT 0 /**< Shift value for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_CHUSEBURSTS_MASK 0xFFUL /**< Bit mask for DMA_CHUSEBURSTS */
-#define DMA_CHUSEBURSTS_CHUSEBURSTS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHUSEBURSTS */
-#define DMA_CHUSEBURSTS_CHUSEBURSTS_SINGLEANDBURST (0x00000000UL << 0) /**< Shifted mode SINGLEANDBURST for DMA_CHUSEBURSTS */
-#define DMA_CHUSEBURSTS_CHUSEBURSTS_BURSTONLY (0x00000001UL << 0) /**< Shifted mode BURSTONLY for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_CHUSEBURSTS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_CHUSEBURSTS_SINGLEANDBURST 0x00000000UL /**< Mode SINGLEANDBURST for DMA_CHUSEBURSTS */
-#define _DMA_CHUSEBURSTS_CHUSEBURSTS_BURSTONLY 0x00000001UL /**< Mode BURSTONLY for DMA_CHUSEBURSTS */
-
-/** Bit fields for DMA CHUSEBURSTC */
-#define _DMA_CHUSEBURSTC_RESETVALUE 0x00000000UL /**< Default value for DMA_CHUSEBURSTC */
-#define _DMA_CHUSEBURSTC_MASK 0x000000FFUL /**< Mask for DMA_CHUSEBURSTC */
-#define _DMA_CHUSEBURSTC_CHUSEBURSTC_SHIFT 0 /**< Shift value for DMA_CHUSEBURSTC */
-#define _DMA_CHUSEBURSTC_CHUSEBURSTC_MASK 0xFFUL /**< Bit mask for DMA_CHUSEBURSTC */
-#define DMA_CHUSEBURSTC_CHUSEBURSTC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHUSEBURSTC */
-#define _DMA_CHUSEBURSTC_CHUSEBURSTC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHUSEBURSTC */
-
-/** Bit fields for DMA CHREQMASKS */
-#define _DMA_CHREQMASKS_RESETVALUE 0x00000000UL /**< Default value for DMA_CHREQMASKS */
-#define _DMA_CHREQMASKS_MASK 0x000000FFUL /**< Mask for DMA_CHREQMASKS */
-#define _DMA_CHREQMASKS_CHREQMASKS_SHIFT 0 /**< Shift value for DMA_CHREQMASKS */
-#define _DMA_CHREQMASKS_CHREQMASKS_MASK 0xFFUL /**< Bit mask for DMA_CHREQMASKS */
-#define DMA_CHREQMASKS_CHREQMASKS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHREQMASKS */
-#define _DMA_CHREQMASKS_CHREQMASKS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHREQMASKS */
-
-/** Bit fields for DMA CHREQMASKC */
-#define _DMA_CHREQMASKC_RESETVALUE 0x00000000UL /**< Default value for DMA_CHREQMASKC */
-#define _DMA_CHREQMASKC_MASK 0x000000FFUL /**< Mask for DMA_CHREQMASKC */
-#define _DMA_CHREQMASKC_CHREQMASKC_SHIFT 0 /**< Shift value for DMA_CHREQMASKC */
-#define _DMA_CHREQMASKC_CHREQMASKC_MASK 0xFFUL /**< Bit mask for DMA_CHREQMASKC */
-#define DMA_CHREQMASKC_CHREQMASKC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHREQMASKC */
-#define _DMA_CHREQMASKC_CHREQMASKC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHREQMASKC */
-
-/** Bit fields for DMA CHENS */
-#define _DMA_CHENS_RESETVALUE 0x00000000UL /**< Default value for DMA_CHENS */
-#define _DMA_CHENS_MASK 0x000000FFUL /**< Mask for DMA_CHENS */
-#define _DMA_CHENS_CHENS_SHIFT 0 /**< Shift value for DMA_CHENS */
-#define _DMA_CHENS_CHENS_MASK 0xFFUL /**< Bit mask for DMA_CHENS */
-#define DMA_CHENS_CHENS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHENS */
-#define _DMA_CHENS_CHENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHENS */
-
-/** Bit fields for DMA CHENC */
-#define _DMA_CHENC_RESETVALUE 0x00000000UL /**< Default value for DMA_CHENC */
-#define _DMA_CHENC_MASK 0x000000FFUL /**< Mask for DMA_CHENC */
-#define _DMA_CHENC_CHENC_SHIFT 0 /**< Shift value for DMA_CHENC */
-#define _DMA_CHENC_CHENC_MASK 0xFFUL /**< Bit mask for DMA_CHENC */
-#define DMA_CHENC_CHENC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHENC */
-#define _DMA_CHENC_CHENC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHENC */
-
-/** Bit fields for DMA CHALTS */
-#define _DMA_CHALTS_RESETVALUE 0x00000000UL /**< Default value for DMA_CHALTS */
-#define _DMA_CHALTS_MASK 0x000000FFUL /**< Mask for DMA_CHALTS */
-#define _DMA_CHALTS_CHALTS_SHIFT 0 /**< Shift value for DMA_CHALTS */
-#define _DMA_CHALTS_CHALTS_MASK 0xFFUL /**< Bit mask for DMA_CHALTS */
-#define DMA_CHALTS_CHALTS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHALTS */
-#define _DMA_CHALTS_CHALTS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHALTS */
-
-/** Bit fields for DMA CHALTC */
-#define _DMA_CHALTC_RESETVALUE 0x00000000UL /**< Default value for DMA_CHALTC */
-#define _DMA_CHALTC_MASK 0x000000FFUL /**< Mask for DMA_CHALTC */
-#define _DMA_CHALTC_CHALTC_SHIFT 0 /**< Shift value for DMA_CHALTC */
-#define _DMA_CHALTC_CHALTC_MASK 0xFFUL /**< Bit mask for DMA_CHALTC */
-#define DMA_CHALTC_CHALTC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHALTC */
-#define _DMA_CHALTC_CHALTC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHALTC */
-
-/** Bit fields for DMA CHPRIS */
-#define _DMA_CHPRIS_RESETVALUE 0x00000000UL /**< Default value for DMA_CHPRIS */
-#define _DMA_CHPRIS_MASK 0x000000FFUL /**< Mask for DMA_CHPRIS */
-#define _DMA_CHPRIS_CHPRIS_SHIFT 0 /**< Shift value for DMA_CHPRIS */
-#define _DMA_CHPRIS_CHPRIS_MASK 0xFFUL /**< Bit mask for DMA_CHPRIS */
-#define DMA_CHPRIS_CHPRIS_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHPRIS */
-#define _DMA_CHPRIS_CHPRIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHPRIS */
-
-/** Bit fields for DMA CHPRIC */
-#define _DMA_CHPRIC_RESETVALUE 0x00000000UL /**< Default value for DMA_CHPRIC */
-#define _DMA_CHPRIC_MASK 0x000000FFUL /**< Mask for DMA_CHPRIC */
-#define _DMA_CHPRIC_CHPRIC_SHIFT 0 /**< Shift value for DMA_CHPRIC */
-#define _DMA_CHPRIC_CHPRIC_MASK 0xFFUL /**< Bit mask for DMA_CHPRIC */
-#define DMA_CHPRIC_CHPRIC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_CHPRIC */
-#define _DMA_CHPRIC_CHPRIC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_CHPRIC */
-
-/** Bit fields for DMA ERRORC */
-#define _DMA_ERRORC_RESETVALUE 0x00000000UL /**< Default value for DMA_ERRORC */
-#define _DMA_ERRORC_MASK 0x00000001UL /**< Mask for DMA_ERRORC */
-#define DMA_ERRORC_ERRORC (1 << 0) /**< Bus Error Clear */
-#define _DMA_ERRORC_ERRORC_SHIFT 0 /**< Shift value for DMA_ERRORC */
-#define _DMA_ERRORC_ERRORC_MASK 0x1UL /**< Bit mask for DMA_ERRORC */
-#define DMA_ERRORC_ERRORC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_ERRORC */
-#define _DMA_ERRORC_ERRORC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_ERRORC */
-
-/** Bit fields for DMA IF */
-#define _DMA_IF_RESETVALUE 0x00000000UL /**< Default value for DMA_IF */
-#define _DMA_IF_MASK 0x800000FFUL /**< Mask for DMA_IF */
-#define _DMA_IF_DONE_SHIFT 0 /**< Shift value for DMA_DONE */
-#define _DMA_IF_DONE_MASK 0xFFUL /**< Bit mask for DMA_DONE */
-#define DMA_IF_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_IF */
-#define _DMA_IF_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IF */
-#define DMA_IF_ERR (1 << 31) /**< DMA Error Interrupt Flag */
-#define _DMA_IF_ERR_SHIFT 31 /**< Shift value for DMA_ERR */
-#define _DMA_IF_ERR_MASK 0x80000000UL /**< Bit mask for DMA_ERR */
-#define DMA_IF_ERR_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for DMA_IF */
-#define _DMA_IF_ERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IF */
-
-/** Bit fields for DMA IFS */
-#define _DMA_IFS_RESETVALUE 0x00000000UL /**< Default value for DMA_IFS */
-#define _DMA_IFS_MASK 0x800000FFUL /**< Mask for DMA_IFS */
-#define _DMA_IFS_DONE_SHIFT 0 /**< Shift value for DMA_DONE */
-#define _DMA_IFS_DONE_MASK 0xFFUL /**< Bit mask for DMA_DONE */
-#define DMA_IFS_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_IFS */
-#define _DMA_IFS_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IFS */
-#define DMA_IFS_ERR (1 << 31) /**< DMA Error Interrupt Flag Set */
-#define _DMA_IFS_ERR_SHIFT 31 /**< Shift value for DMA_ERR */
-#define _DMA_IFS_ERR_MASK 0x80000000UL /**< Bit mask for DMA_ERR */
-#define DMA_IFS_ERR_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for DMA_IFS */
-#define _DMA_IFS_ERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IFS */
-
-/** Bit fields for DMA IFC */
-#define _DMA_IFC_RESETVALUE 0x00000000UL /**< Default value for DMA_IFC */
-#define _DMA_IFC_MASK 0x800000FFUL /**< Mask for DMA_IFC */
-#define _DMA_IFC_DONE_SHIFT 0 /**< Shift value for DMA_DONE */
-#define _DMA_IFC_DONE_MASK 0xFFUL /**< Bit mask for DMA_DONE */
-#define DMA_IFC_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_IFC */
-#define _DMA_IFC_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IFC */
-#define DMA_IFC_ERR (1 << 31) /**< DMA Error Interrupt Flag Clear */
-#define _DMA_IFC_ERR_SHIFT 31 /**< Shift value for DMA_ERR */
-#define _DMA_IFC_ERR_MASK 0x80000000UL /**< Bit mask for DMA_ERR */
-#define DMA_IFC_ERR_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for DMA_IFC */
-#define _DMA_IFC_ERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IFC */
-
-/** Bit fields for DMA IEN */
-#define _DMA_IEN_RESETVALUE 0x00000000UL /**< Default value for DMA_IEN */
-#define _DMA_IEN_MASK 0x800000FFUL /**< Mask for DMA_IEN */
-#define _DMA_IEN_DONE_SHIFT 0 /**< Shift value for DMA_DONE */
-#define _DMA_IEN_DONE_MASK 0xFFUL /**< Bit mask for DMA_DONE */
-#define DMA_IEN_DONE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for DMA_IEN */
-#define _DMA_IEN_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IEN */
-#define DMA_IEN_ERR (1 << 31) /**< DMA Error Interrupt Flag Enable */
-#define _DMA_IEN_ERR_SHIFT 31 /**< Shift value for DMA_ERR */
-#define _DMA_IEN_ERR_MASK 0x80000000UL /**< Bit mask for DMA_ERR */
-#define DMA_IEN_ERR_DEFAULT (0x00000000UL << 31) /**< Shifted mode DEFAULT for DMA_IEN */
-#define _DMA_IEN_ERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for DMA_IEN */
-
-/** Bit fields for DMA CH_CTRL */
-#define _DMA_CH_CTRL_RESETVALUE 0x00000000UL /**< Default value for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_MASK 0x003F000FUL /**< Mask for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_SHIFT 0 /**< Shift value for DMA_SIGSEL */
-#define _DMA_CH_CTRL_SIGSEL_MASK 0xFUL /**< Bit mask for DMA_SIGSEL */
-#define DMA_CH_CTRL_SIGSEL_ADC0SINGLE (0x00000000UL << 0) /**< Shifted mode ADC0SINGLE for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_DAC0CH0 (0x00000000UL << 0) /**< Shifted mode DAC0CH0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART0RXDATAV (0x00000000UL << 0) /**< Shifted mode USART0RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART1RXDATAV (0x00000000UL << 0) /**< Shifted mode USART1RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART2RXDATAV (0x00000000UL << 0) /**< Shifted mode USART2RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART0RXDATAV (0x00000000UL << 0) /**< Shifted mode LEUART0RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART1RXDATAV (0x00000000UL << 0) /**< Shifted mode LEUART1RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_I2C0RXDATAV (0x00000000UL << 0) /**< Shifted mode I2C0RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER0UFOF (0x00000000UL << 0) /**< Shifted mode TIMER0UFOF for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER1UFOF (0x00000000UL << 0) /**< Shifted mode TIMER1UFOF for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER2UFOF (0x00000000UL << 0) /**< Shifted mode TIMER2UFOF for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_UART0RXDATAV (0x00000000UL << 0) /**< Shifted mode UART0RXDATAV for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_MSCWDATA (0x00000000UL << 0) /**< Shifted mode MSCWDATA for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_AESDATAWR (0x00000000UL << 0) /**< Shifted mode AESDATAWR for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_ADC0SCAN (0x00000001UL << 0) /**< Shifted mode ADC0SCAN for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_DAC0CH1 (0x00000001UL << 0) /**< Shifted mode DAC0CH1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART0TXBL (0x00000001UL << 0) /**< Shifted mode USART0TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART1TXBL (0x00000001UL << 0) /**< Shifted mode USART1TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART2TXBL (0x00000001UL << 0) /**< Shifted mode USART2TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART0TXBL (0x00000001UL << 0) /**< Shifted mode LEUART0TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART1TXBL (0x00000001UL << 0) /**< Shifted mode LEUART1TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_I2C0TXBL (0x00000001UL << 0) /**< Shifted mode I2C0TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER0CC0 (0x00000001UL << 0) /**< Shifted mode TIMER0CC0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER1CC0 (0x00000001UL << 0) /**< Shifted mode TIMER1CC0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER2CC0 (0x00000001UL << 0) /**< Shifted mode TIMER2CC0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_UART0TXBL (0x00000001UL << 0) /**< Shifted mode UART0TXBL for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_AESXORDATAWR (0x00000001UL << 0) /**< Shifted mode AESXORDATAWR for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART0TXEMPTY (0x00000002UL << 0) /**< Shifted mode USART0TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART1TXEMPTY (0x00000002UL << 0) /**< Shifted mode USART1TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_USART2TXEMPTY (0x00000002UL << 0) /**< Shifted mode USART2TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART0TXEMPTY (0x00000002UL << 0) /**< Shifted mode LEUART0TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_LEUART1TXEMPTY (0x00000002UL << 0) /**< Shifted mode LEUART1TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER0CC1 (0x00000002UL << 0) /**< Shifted mode TIMER0CC1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER1CC1 (0x00000002UL << 0) /**< Shifted mode TIMER1CC1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER2CC1 (0x00000002UL << 0) /**< Shifted mode TIMER2CC1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_UART0TXEMPTY (0x00000002UL << 0) /**< Shifted mode UART0TXEMPTY for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_AESDATARD (0x00000002UL << 0) /**< Shifted mode AESDATARD for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER0CC2 (0x00000003UL << 0) /**< Shifted mode TIMER0CC2 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER1CC2 (0x00000003UL << 0) /**< Shifted mode TIMER1CC2 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_TIMER2CC2 (0x00000003UL << 0) /**< Shifted mode TIMER2CC2 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SIGSEL_AESKEYWR (0x00000003UL << 0) /**< Shifted mode AESKEYWR for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL /**< Mode ADC0SINGLE for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL /**< Mode DAC0CH0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000000UL /**< Mode USART0RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000000UL /**< Mode USART1RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000000UL /**< Mode USART2RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART0RXDATAV 0x00000000UL /**< Mode LEUART0RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART1RXDATAV 0x00000000UL /**< Mode LEUART1RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_I2C0RXDATAV 0x00000000UL /**< Mode I2C0RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER0UFOF 0x00000000UL /**< Mode TIMER0UFOF for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER1UFOF 0x00000000UL /**< Mode TIMER1UFOF for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER2UFOF 0x00000000UL /**< Mode TIMER2UFOF for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000000UL /**< Mode UART0RXDATAV for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_MSCWDATA 0x00000000UL /**< Mode MSCWDATA for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_AESDATAWR 0x00000000UL /**< Mode AESDATAWR for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL /**< Mode ADC0SCAN for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL /**< Mode DAC0CH1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART0TXBL 0x00000001UL /**< Mode USART0TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART1TXBL 0x00000001UL /**< Mode USART1TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART2TXBL 0x00000001UL /**< Mode USART2TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART0TXBL 0x00000001UL /**< Mode LEUART0TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART1TXBL 0x00000001UL /**< Mode LEUART1TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_I2C0TXBL 0x00000001UL /**< Mode I2C0TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER0CC0 0x00000001UL /**< Mode TIMER0CC0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER1CC0 0x00000001UL /**< Mode TIMER1CC0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER2CC0 0x00000001UL /**< Mode TIMER2CC0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_UART0TXBL 0x00000001UL /**< Mode UART0TXBL for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_AESXORDATAWR 0x00000001UL /**< Mode AESXORDATAWR for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART0TXEMPTY 0x00000002UL /**< Mode USART0TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART1TXEMPTY 0x00000002UL /**< Mode USART1TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_USART2TXEMPTY 0x00000002UL /**< Mode USART2TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART0TXEMPTY 0x00000002UL /**< Mode LEUART0TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_LEUART1TXEMPTY 0x00000002UL /**< Mode LEUART1TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER0CC1 0x00000002UL /**< Mode TIMER0CC1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER1CC1 0x00000002UL /**< Mode TIMER1CC1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER2CC1 0x00000002UL /**< Mode TIMER2CC1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_UART0TXEMPTY 0x00000002UL /**< Mode UART0TXEMPTY for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_AESDATARD 0x00000002UL /**< Mode AESDATARD for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER0CC2 0x00000003UL /**< Mode TIMER0CC2 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER1CC2 0x00000003UL /**< Mode TIMER1CC2 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_TIMER2CC2 0x00000003UL /**< Mode TIMER2CC2 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SIGSEL_AESKEYWR 0x00000003UL /**< Mode AESKEYWR for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_SHIFT 16 /**< Shift value for DMA_SOURCESEL */
-#define _DMA_CH_CTRL_SOURCESEL_MASK 0x3F0000UL /**< Bit mask for DMA_SOURCESEL */
-#define DMA_CH_CTRL_SOURCESEL_NONE (0x00000000UL << 16) /**< Shifted mode NONE for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_ADC0 (0x00000008UL << 16) /**< Shifted mode ADC0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_DAC0 (0x0000000AUL << 16) /**< Shifted mode DAC0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_USART0 (0x0000000CUL << 16) /**< Shifted mode USART0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_USART1 (0x0000000DUL << 16) /**< Shifted mode USART1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_USART2 (0x0000000EUL << 16) /**< Shifted mode USART2 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_LEUART0 (0x00000010UL << 16) /**< Shifted mode LEUART0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_LEUART1 (0x00000011UL << 16) /**< Shifted mode LEUART1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_I2C0 (0x00000014UL << 16) /**< Shifted mode I2C0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_TIMER0 (0x00000018UL << 16) /**< Shifted mode TIMER0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_TIMER1 (0x00000019UL << 16) /**< Shifted mode TIMER1 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_TIMER2 (0x0000001AUL << 16) /**< Shifted mode TIMER2 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_UART0 (0x0000002CUL << 16) /**< Shifted mode UART0 for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_IMEM (0x00000030UL << 16) /**< Shifted mode IMEM for DMA_CH_CTRL */
-#define DMA_CH_CTRL_SOURCESEL_AES (0x00000031UL << 16) /**< Shifted mode AES for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_NONE 0x00000000UL /**< Mode NONE for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_ADC0 0x00000008UL /**< Mode ADC0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_DAC0 0x0000000AUL /**< Mode DAC0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_USART0 0x0000000CUL /**< Mode USART0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_USART1 0x0000000DUL /**< Mode USART1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_USART2 0x0000000EUL /**< Mode USART2 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_LEUART0 0x00000010UL /**< Mode LEUART0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_LEUART1 0x00000011UL /**< Mode LEUART1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL /**< Mode I2C0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_TIMER0 0x00000018UL /**< Mode TIMER0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_TIMER1 0x00000019UL /**< Mode TIMER1 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_TIMER2 0x0000001AUL /**< Mode TIMER2 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_UART0 0x0000002CUL /**< Mode UART0 for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_IMEM 0x00000030UL /**< Mode IMEM for DMA_CH_CTRL */
-#define _DMA_CH_CTRL_SOURCESEL_AES 0x00000031UL /**< Mode AES for DMA_CH_CTRL */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_VCMP
- * @{
- */
-
-/** Bit fields for VCMP CTRL */
-#define _VCMP_CTRL_RESETVALUE 0x47000000UL /**< Default value for VCMP_CTRL */
-#define _VCMP_CTRL_MASK 0x4F030715UL /**< Mask for VCMP_CTRL */
-#define VCMP_CTRL_EN (1 << 0) /**< Voltage Supply Comparator Enable */
-#define _VCMP_CTRL_EN_SHIFT 0 /**< Shift value for VCMP_EN */
-#define _VCMP_CTRL_EN_MASK 0x1UL /**< Bit mask for VCMP_EN */
-#define VCMP_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define VCMP_CTRL_INACTVAL (1 << 2) /**< Inactive Value */
-#define _VCMP_CTRL_INACTVAL_SHIFT 2 /**< Shift value for VCMP_INACTVAL */
-#define _VCMP_CTRL_INACTVAL_MASK 0x4UL /**< Bit mask for VCMP_INACTVAL */
-#define VCMP_CTRL_INACTVAL_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_INACTVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define VCMP_CTRL_HYSTEN (1 << 4) /**< Hysteresis Enable */
-#define _VCMP_CTRL_HYSTEN_SHIFT 4 /**< Shift value for VCMP_HYSTEN */
-#define _VCMP_CTRL_HYSTEN_MASK 0x10UL /**< Bit mask for VCMP_HYSTEN */
-#define VCMP_CTRL_HYSTEN_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_HYSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_SHIFT 8 /**< Shift value for VCMP_WARMTIME */
-#define _VCMP_CTRL_WARMTIME_MASK 0x700UL /**< Bit mask for VCMP_WARMTIME */
-#define VCMP_CTRL_WARMTIME_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_4CYCLES (0x00000000UL << 8) /**< Shifted mode 4CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_8CYCLES (0x00000001UL << 8) /**< Shifted mode 8CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_16CYCLES (0x00000002UL << 8) /**< Shifted mode 16CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_32CYCLES (0x00000003UL << 8) /**< Shifted mode 32CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_64CYCLES (0x00000004UL << 8) /**< Shifted mode 64CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_128CYCLES (0x00000005UL << 8) /**< Shifted mode 128CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_256CYCLES (0x00000006UL << 8) /**< Shifted mode 256CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_WARMTIME_512CYCLES (0x00000007UL << 8) /**< Shifted mode 512CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_4CYCLES 0x00000000UL /**< Mode 4CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_8CYCLES 0x00000001UL /**< Mode 8CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_16CYCLES 0x00000002UL /**< Mode 16CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_32CYCLES 0x00000003UL /**< Mode 32CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_64CYCLES 0x00000004UL /**< Mode 64CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_128CYCLES 0x00000005UL /**< Mode 128CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_256CYCLES 0x00000006UL /**< Mode 256CYCLES for VCMP_CTRL */
-#define _VCMP_CTRL_WARMTIME_512CYCLES 0x00000007UL /**< Mode 512CYCLES for VCMP_CTRL */
-#define VCMP_CTRL_IRISE (1 << 16) /**< Rising Edge Interrupt Sense */
-#define _VCMP_CTRL_IRISE_SHIFT 16 /**< Shift value for VCMP_IRISE */
-#define _VCMP_CTRL_IRISE_MASK 0x10000UL /**< Bit mask for VCMP_IRISE */
-#define VCMP_CTRL_IRISE_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_IRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define VCMP_CTRL_IFALL (1 << 17) /**< Falling Edge Interrupt Sense */
-#define _VCMP_CTRL_IFALL_SHIFT 17 /**< Shift value for VCMP_IFALL */
-#define _VCMP_CTRL_IFALL_MASK 0x20000UL /**< Bit mask for VCMP_IFALL */
-#define VCMP_CTRL_IFALL_DEFAULT (0x00000000UL << 17) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_IFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_BIASPROG_SHIFT 24 /**< Shift value for VCMP_BIASPROG */
-#define _VCMP_CTRL_BIASPROG_MASK 0xF000000UL /**< Bit mask for VCMP_BIASPROG */
-#define VCMP_CTRL_BIASPROG_DEFAULT (0x00000007UL << 24) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for VCMP_CTRL */
-#define VCMP_CTRL_HALFBIAS (1 << 30) /**< Half Bias Current */
-#define _VCMP_CTRL_HALFBIAS_SHIFT 30 /**< Shift value for VCMP_HALFBIAS */
-#define _VCMP_CTRL_HALFBIAS_MASK 0x40000000UL /**< Bit mask for VCMP_HALFBIAS */
-#define VCMP_CTRL_HALFBIAS_DEFAULT (0x00000001UL << 30) /**< Shifted mode DEFAULT for VCMP_CTRL */
-#define _VCMP_CTRL_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for VCMP_CTRL */
-
-/** Bit fields for VCMP INPUTSEL */
-#define _VCMP_INPUTSEL_RESETVALUE 0x00000000UL /**< Default value for VCMP_INPUTSEL */
-#define _VCMP_INPUTSEL_MASK 0x0000013FUL /**< Mask for VCMP_INPUTSEL */
-#define _VCMP_INPUTSEL_TRIGLEVEL_SHIFT 0 /**< Shift value for VCMP_TRIGLEVEL */
-#define _VCMP_INPUTSEL_TRIGLEVEL_MASK 0x3FUL /**< Bit mask for VCMP_TRIGLEVEL */
-#define VCMP_INPUTSEL_TRIGLEVEL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */
-#define _VCMP_INPUTSEL_TRIGLEVEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */
-#define VCMP_INPUTSEL_LPREF (1 << 8) /**< Low Power Reference */
-#define _VCMP_INPUTSEL_LPREF_SHIFT 8 /**< Shift value for VCMP_LPREF */
-#define _VCMP_INPUTSEL_LPREF_MASK 0x100UL /**< Bit mask for VCMP_LPREF */
-#define VCMP_INPUTSEL_LPREF_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */
-#define _VCMP_INPUTSEL_LPREF_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */
-
-/** Bit fields for VCMP STATUS */
-#define _VCMP_STATUS_RESETVALUE 0x00000000UL /**< Default value for VCMP_STATUS */
-#define _VCMP_STATUS_MASK 0x00000003UL /**< Mask for VCMP_STATUS */
-#define VCMP_STATUS_VCMPACT (1 << 0) /**< Voltage Supply Comparator Active */
-#define _VCMP_STATUS_VCMPACT_SHIFT 0 /**< Shift value for VCMP_VCMPACT */
-#define _VCMP_STATUS_VCMPACT_MASK 0x1UL /**< Bit mask for VCMP_VCMPACT */
-#define VCMP_STATUS_VCMPACT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_STATUS */
-#define _VCMP_STATUS_VCMPACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */
-#define VCMP_STATUS_VCMPOUT (1 << 1) /**< Voltage Supply Comparator Output */
-#define _VCMP_STATUS_VCMPOUT_SHIFT 1 /**< Shift value for VCMP_VCMPOUT */
-#define _VCMP_STATUS_VCMPOUT_MASK 0x2UL /**< Bit mask for VCMP_VCMPOUT */
-#define VCMP_STATUS_VCMPOUT_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for VCMP_STATUS */
-#define _VCMP_STATUS_VCMPOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */
-
-/** Bit fields for VCMP IEN */
-#define _VCMP_IEN_RESETVALUE 0x00000000UL /**< Default value for VCMP_IEN */
-#define _VCMP_IEN_MASK 0x00000003UL /**< Mask for VCMP_IEN */
-#define VCMP_IEN_EDGE (1 << 0) /**< Edge Trigger Interrupt Enable */
-#define _VCMP_IEN_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
-#define _VCMP_IEN_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
-#define VCMP_IEN_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_IEN */
-#define _VCMP_IEN_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */
-#define VCMP_IEN_WARMUP (1 << 1) /**< Warm-up Interrupt Enable */
-#define _VCMP_IEN_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
-#define _VCMP_IEN_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
-#define VCMP_IEN_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for VCMP_IEN */
-#define _VCMP_IEN_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */
-
-/** Bit fields for VCMP IF */
-#define _VCMP_IF_RESETVALUE 0x00000000UL /**< Default value for VCMP_IF */
-#define _VCMP_IF_MASK 0x00000003UL /**< Mask for VCMP_IF */
-#define VCMP_IF_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag */
-#define _VCMP_IF_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
-#define _VCMP_IF_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
-#define VCMP_IF_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_IF */
-#define _VCMP_IF_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */
-#define VCMP_IF_WARMUP (1 << 1) /**< Warm-up Interrupt Flag */
-#define _VCMP_IF_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
-#define _VCMP_IF_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
-#define VCMP_IF_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for VCMP_IF */
-#define _VCMP_IF_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */
-
-/** Bit fields for VCMP IFS */
-#define _VCMP_IFS_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFS */
-#define _VCMP_IFS_MASK 0x00000003UL /**< Mask for VCMP_IFS */
-#define VCMP_IFS_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag Set */
-#define _VCMP_IFS_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
-#define _VCMP_IFS_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
-#define VCMP_IFS_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_IFS */
-#define _VCMP_IFS_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */
-#define VCMP_IFS_WARMUP (1 << 1) /**< Warm-up Interrupt Flag Set */
-#define _VCMP_IFS_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
-#define _VCMP_IFS_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
-#define VCMP_IFS_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for VCMP_IFS */
-#define _VCMP_IFS_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */
-
-/** Bit fields for VCMP IFC */
-#define _VCMP_IFC_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFC */
-#define _VCMP_IFC_MASK 0x00000003UL /**< Mask for VCMP_IFC */
-#define VCMP_IFC_EDGE (1 << 0) /**< Edge Triggered Interrupt Flag Clear */
-#define _VCMP_IFC_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
-#define _VCMP_IFC_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
-#define VCMP_IFC_EDGE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for VCMP_IFC */
-#define _VCMP_IFC_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */
-#define VCMP_IFC_WARMUP (1 << 1) /**< Warm-up Interrupt Flag Clear */
-#define _VCMP_IFC_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
-#define _VCMP_IFC_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
-#define VCMP_IFC_WARMUP_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for VCMP_IFC */
-#define _VCMP_IFC_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_LCD
- * @{
- */
-
-/** Bit fields for LCD CTRL */
-#define _LCD_CTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_CTRL */
-#define _LCD_CTRL_MASK 0x00000007UL /**< Mask for LCD_CTRL */
-#define LCD_CTRL_EN (1 << 0) /**< LCD Enable */
-#define _LCD_CTRL_EN_SHIFT 0 /**< Shift value for LCD_EN */
-#define _LCD_CTRL_EN_MASK 0x1UL /**< Bit mask for LCD_EN */
-#define LCD_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_CTRL */
-#define _LCD_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */
-#define _LCD_CTRL_UDCTRL_SHIFT 1 /**< Shift value for LCD_UDCTRL */
-#define _LCD_CTRL_UDCTRL_MASK 0x6UL /**< Bit mask for LCD_UDCTRL */
-#define LCD_CTRL_UDCTRL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LCD_CTRL */
-#define LCD_CTRL_UDCTRL_REGULAR (0x00000000UL << 1) /**< Shifted mode REGULAR for LCD_CTRL */
-#define LCD_CTRL_UDCTRL_LFCEVENT (0x00000001UL << 1) /**< Shifted mode LFCEVENT for LCD_CTRL */
-#define LCD_CTRL_UDCTRL_FRAMESTART (0x00000002UL << 1) /**< Shifted mode FRAMESTART for LCD_CTRL */
-#define _LCD_CTRL_UDCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */
-#define _LCD_CTRL_UDCTRL_REGULAR 0x00000000UL /**< Mode REGULAR for LCD_CTRL */
-#define _LCD_CTRL_UDCTRL_LFCEVENT 0x00000001UL /**< Mode LFCEVENT for LCD_CTRL */
-#define _LCD_CTRL_UDCTRL_FRAMESTART 0x00000002UL /**< Mode FRAMESTART for LCD_CTRL */
-
-/** Bit fields for LCD DISPCTRL */
-#define _LCD_DISPCTRL_RESETVALUE 0x000C1F00UL /**< Default value for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MASK 0x001D9F1FUL /**< Mask for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_SHIFT 0 /**< Shift value for LCD_MUX */
-#define _LCD_DISPCTRL_MUX_MASK 0x3UL /**< Bit mask for LCD_MUX */
-#define LCD_DISPCTRL_MUX_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_MUX_STATIC (0x00000000UL << 0) /**< Shifted mode STATIC for LCD_DISPCTRL */
-#define LCD_DISPCTRL_MUX_DUPLEX (0x00000001UL << 0) /**< Shifted mode DUPLEX for LCD_DISPCTRL */
-#define LCD_DISPCTRL_MUX_TRIPLEX (0x00000002UL << 0) /**< Shifted mode TRIPLEX for LCD_DISPCTRL */
-#define LCD_DISPCTRL_MUX_QUADRUPLEX (0x00000003UL << 0) /**< Shifted mode QUADRUPLEX for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_DUPLEX 0x00000001UL /**< Mode DUPLEX for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_TRIPLEX 0x00000002UL /**< Mode TRIPLEX for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_MUX_QUADRUPLEX 0x00000003UL /**< Mode QUADRUPLEX for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_BIAS_SHIFT 2 /**< Shift value for LCD_BIAS */
-#define _LCD_DISPCTRL_BIAS_MASK 0xCUL /**< Bit mask for LCD_BIAS */
-#define LCD_DISPCTRL_BIAS_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_BIAS_STATIC (0x00000000UL << 2) /**< Shifted mode STATIC for LCD_DISPCTRL */
-#define LCD_DISPCTRL_BIAS_ONEHALF (0x00000001UL << 2) /**< Shifted mode ONEHALF for LCD_DISPCTRL */
-#define LCD_DISPCTRL_BIAS_ONETHIRD (0x00000002UL << 2) /**< Shifted mode ONETHIRD for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_BIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_BIAS_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_BIAS_ONEHALF 0x00000001UL /**< Mode ONEHALF for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_BIAS_ONETHIRD 0x00000002UL /**< Mode ONETHIRD for LCD_DISPCTRL */
-#define LCD_DISPCTRL_WAVE (1 << 4) /**< Waveform Selection */
-#define _LCD_DISPCTRL_WAVE_SHIFT 4 /**< Shift value for LCD_WAVE */
-#define _LCD_DISPCTRL_WAVE_MASK 0x10UL /**< Bit mask for LCD_WAVE */
-#define LCD_DISPCTRL_WAVE_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_WAVE_LOWPOWER (0x00000000UL << 4) /**< Shifted mode LOWPOWER for LCD_DISPCTRL */
-#define LCD_DISPCTRL_WAVE_NORMAL (0x00000001UL << 4) /**< Shifted mode NORMAL for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_WAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_WAVE_LOWPOWER 0x00000000UL /**< Mode LOWPOWER for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_WAVE_NORMAL 0x00000001UL /**< Mode NORMAL for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONLEV_SHIFT 8 /**< Shift value for LCD_CONLEV */
-#define _LCD_DISPCTRL_CONLEV_MASK 0x1F00UL /**< Bit mask for LCD_CONLEV */
-#define LCD_DISPCTRL_CONLEV_MIN (0x00000000UL << 8) /**< Shifted mode MIN for LCD_DISPCTRL */
-#define LCD_DISPCTRL_CONLEV_DEFAULT (0x0000001FUL << 8) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_CONLEV_MAX (0x0000001FUL << 8) /**< Shifted mode MAX for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONLEV_MIN 0x00000000UL /**< Mode MIN for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONLEV_DEFAULT 0x0000001FUL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONLEV_MAX 0x0000001FUL /**< Mode MAX for LCD_DISPCTRL */
-#define LCD_DISPCTRL_CONCONF (1 << 15) /**< Contrast Configuration */
-#define _LCD_DISPCTRL_CONCONF_SHIFT 15 /**< Shift value for LCD_CONCONF */
-#define _LCD_DISPCTRL_CONCONF_MASK 0x8000UL /**< Bit mask for LCD_CONCONF */
-#define LCD_DISPCTRL_CONCONF_DEFAULT (0x00000000UL << 15) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_CONCONF_VLCD (0x00000000UL << 15) /**< Shifted mode VLCD for LCD_DISPCTRL */
-#define LCD_DISPCTRL_CONCONF_GND (0x00000001UL << 15) /**< Shifted mode GND for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONCONF_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONCONF_VLCD 0x00000000UL /**< Mode VLCD for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_CONCONF_GND 0x00000001UL /**< Mode GND for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VLCDSEL (1 << 16) /**< VLCD Selection */
-#define _LCD_DISPCTRL_VLCDSEL_SHIFT 16 /**< Shift value for LCD_VLCDSEL */
-#define _LCD_DISPCTRL_VLCDSEL_MASK 0x10000UL /**< Bit mask for LCD_VLCDSEL */
-#define LCD_DISPCTRL_VLCDSEL_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VLCDSEL_VDD (0x00000000UL << 16) /**< Shifted mode VDD for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VLCDSEL_VEXTBOOST (0x00000001UL << 16) /**< Shifted mode VEXTBOOST for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VLCDSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VLCDSEL_VDD 0x00000000UL /**< Mode VDD for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VLCDSEL_VEXTBOOST 0x00000001UL /**< Mode VEXTBOOST for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_SHIFT 18 /**< Shift value for LCD_VBLEV */
-#define _LCD_DISPCTRL_VBLEV_MASK 0x1C0000UL /**< Bit mask for LCD_VBLEV */
-#define LCD_DISPCTRL_VBLEV_3V00 (0x00000000UL << 18) /**< Shifted mode 3V00 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V09 (0x00000001UL << 18) /**< Shifted mode 3V09 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V17 (0x00000002UL << 18) /**< Shifted mode 3V17 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_DEFAULT (0x00000003UL << 18) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V26 (0x00000003UL << 18) /**< Shifted mode 3V26 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V34 (0x00000004UL << 18) /**< Shifted mode 3V34 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V43 (0x00000005UL << 18) /**< Shifted mode 3V43 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V51 (0x00000006UL << 18) /**< Shifted mode 3V51 for LCD_DISPCTRL */
-#define LCD_DISPCTRL_VBLEV_3V60 (0x00000007UL << 18) /**< Shifted mode 3V60 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V00 0x00000000UL /**< Mode 3V00 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V09 0x00000001UL /**< Mode 3V09 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V17 0x00000002UL /**< Mode 3V17 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_DEFAULT 0x00000003UL /**< Mode DEFAULT for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V26 0x00000003UL /**< Mode 3V26 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V34 0x00000004UL /**< Mode 3V34 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V43 0x00000005UL /**< Mode 3V43 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V51 0x00000006UL /**< Mode 3V51 for LCD_DISPCTRL */
-#define _LCD_DISPCTRL_VBLEV_3V60 0x00000007UL /**< Mode 3V60 for LCD_DISPCTRL */
-
-/** Bit fields for LCD SEGEN */
-#define _LCD_SEGEN_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGEN */
-#define _LCD_SEGEN_MASK 0x000003FFUL /**< Mask for LCD_SEGEN */
-#define _LCD_SEGEN_SEGEN_SHIFT 0 /**< Shift value for LCD_SEGEN */
-#define _LCD_SEGEN_SEGEN_MASK 0x3FFUL /**< Bit mask for LCD_SEGEN */
-#define LCD_SEGEN_SEGEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGEN */
-#define _LCD_SEGEN_SEGEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGEN */
-
-/** Bit fields for LCD BACTRL */
-#define _LCD_BACTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_BACTRL */
-#define _LCD_BACTRL_MASK 0x00FF01FFUL /**< Mask for LCD_BACTRL */
-#define LCD_BACTRL_BLINKEN (1 << 0) /**< Blink Enable */
-#define _LCD_BACTRL_BLINKEN_SHIFT 0 /**< Shift value for LCD_BLINKEN */
-#define _LCD_BACTRL_BLINKEN_MASK 0x1UL /**< Bit mask for LCD_BLINKEN */
-#define LCD_BACTRL_BLINKEN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_BLINKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_BLANK (1 << 1) /**< Blank Display */
-#define _LCD_BACTRL_BLANK_SHIFT 1 /**< Shift value for LCD_BLANK */
-#define _LCD_BACTRL_BLANK_MASK 0x2UL /**< Bit mask for LCD_BLANK */
-#define LCD_BACTRL_BLANK_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_BLANK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_AEN (1 << 2) /**< Animation Enable */
-#define _LCD_BACTRL_AEN_SHIFT 2 /**< Shift value for LCD_AEN */
-#define _LCD_BACTRL_AEN_MASK 0x4UL /**< Bit mask for LCD_AEN */
-#define LCD_BACTRL_AEN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_AEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGASC_SHIFT 3 /**< Shift value for LCD_AREGASC */
-#define _LCD_BACTRL_AREGASC_MASK 0x18UL /**< Bit mask for LCD_AREGASC */
-#define LCD_BACTRL_AREGASC_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_AREGASC_NOSHIFT (0x00000000UL << 3) /**< Shifted mode NOSHIFT for LCD_BACTRL */
-#define LCD_BACTRL_AREGASC_SHIFTLEFT (0x00000001UL << 3) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */
-#define LCD_BACTRL_AREGASC_SHIFTRIGHT (0x00000002UL << 3) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGASC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGASC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGASC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGASC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGBSC_SHIFT 5 /**< Shift value for LCD_AREGBSC */
-#define _LCD_BACTRL_AREGBSC_MASK 0x60UL /**< Bit mask for LCD_AREGBSC */
-#define LCD_BACTRL_AREGBSC_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_AREGBSC_NOSHIFT (0x00000000UL << 5) /**< Shifted mode NOSHIFT for LCD_BACTRL */
-#define LCD_BACTRL_AREGBSC_SHIFTLEFT (0x00000001UL << 5) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */
-#define LCD_BACTRL_AREGBSC_SHIFTRIGHT (0x00000002UL << 5) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGBSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGBSC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGBSC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */
-#define _LCD_BACTRL_AREGBSC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */
-#define LCD_BACTRL_ALOGSEL (1 << 7) /**< Animate Logic Function Select */
-#define _LCD_BACTRL_ALOGSEL_SHIFT 7 /**< Shift value for LCD_ALOGSEL */
-#define _LCD_BACTRL_ALOGSEL_MASK 0x80UL /**< Bit mask for LCD_ALOGSEL */
-#define LCD_BACTRL_ALOGSEL_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_ALOGSEL_AND (0x00000000UL << 7) /**< Shifted mode AND for LCD_BACTRL */
-#define LCD_BACTRL_ALOGSEL_OR (0x00000001UL << 7) /**< Shifted mode OR for LCD_BACTRL */
-#define _LCD_BACTRL_ALOGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_ALOGSEL_AND 0x00000000UL /**< Mode AND for LCD_BACTRL */
-#define _LCD_BACTRL_ALOGSEL_OR 0x00000001UL /**< Mode OR for LCD_BACTRL */
-#define LCD_BACTRL_FCEN (1 << 8) /**< Frame Counter Enable */
-#define _LCD_BACTRL_FCEN_SHIFT 8 /**< Shift value for LCD_FCEN */
-#define _LCD_BACTRL_FCEN_MASK 0x100UL /**< Bit mask for LCD_FCEN */
-#define LCD_BACTRL_FCEN_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_FCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_SHIFT 16 /**< Shift value for LCD_FCPRESC */
-#define _LCD_BACTRL_FCPRESC_MASK 0x30000UL /**< Bit mask for LCD_FCPRESC */
-#define LCD_BACTRL_FCPRESC_DEFAULT (0x00000000UL << 16) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define LCD_BACTRL_FCPRESC_DIV1 (0x00000000UL << 16) /**< Shifted mode DIV1 for LCD_BACTRL */
-#define LCD_BACTRL_FCPRESC_DIV2 (0x00000001UL << 16) /**< Shifted mode DIV2 for LCD_BACTRL */
-#define LCD_BACTRL_FCPRESC_DIV4 (0x00000002UL << 16) /**< Shifted mode DIV4 for LCD_BACTRL */
-#define LCD_BACTRL_FCPRESC_DIV8 (0x00000003UL << 16) /**< Shifted mode DIV8 for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_DIV1 0x00000000UL /**< Mode DIV1 for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_DIV2 0x00000001UL /**< Mode DIV2 for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_DIV4 0x00000002UL /**< Mode DIV4 for LCD_BACTRL */
-#define _LCD_BACTRL_FCPRESC_DIV8 0x00000003UL /**< Mode DIV8 for LCD_BACTRL */
-#define _LCD_BACTRL_FCTOP_SHIFT 18 /**< Shift value for LCD_FCTOP */
-#define _LCD_BACTRL_FCTOP_MASK 0xFC0000UL /**< Bit mask for LCD_FCTOP */
-#define LCD_BACTRL_FCTOP_DEFAULT (0x00000000UL << 18) /**< Shifted mode DEFAULT for LCD_BACTRL */
-#define _LCD_BACTRL_FCTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
-
-/** Bit fields for LCD STATUS */
-#define _LCD_STATUS_RESETVALUE 0x00000000UL /**< Default value for LCD_STATUS */
-#define _LCD_STATUS_MASK 0x0000010FUL /**< Mask for LCD_STATUS */
-#define _LCD_STATUS_ASTATE_SHIFT 0 /**< Shift value for LCD_ASTATE */
-#define _LCD_STATUS_ASTATE_MASK 0xFUL /**< Bit mask for LCD_ASTATE */
-#define LCD_STATUS_ASTATE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_STATUS */
-#define _LCD_STATUS_ASTATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */
-#define LCD_STATUS_BLINK (1 << 8) /**< Blink State */
-#define _LCD_STATUS_BLINK_SHIFT 8 /**< Shift value for LCD_BLINK */
-#define _LCD_STATUS_BLINK_MASK 0x100UL /**< Bit mask for LCD_BLINK */
-#define LCD_STATUS_BLINK_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LCD_STATUS */
-#define _LCD_STATUS_BLINK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */
-
-/** Bit fields for LCD AREGA */
-#define _LCD_AREGA_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGA */
-#define _LCD_AREGA_MASK 0x000000FFUL /**< Mask for LCD_AREGA */
-#define _LCD_AREGA_AREGA_SHIFT 0 /**< Shift value for LCD_AREGA */
-#define _LCD_AREGA_AREGA_MASK 0xFFUL /**< Bit mask for LCD_AREGA */
-#define LCD_AREGA_AREGA_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_AREGA */
-#define _LCD_AREGA_AREGA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGA */
-
-/** Bit fields for LCD AREGB */
-#define _LCD_AREGB_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGB */
-#define _LCD_AREGB_MASK 0x000000FFUL /**< Mask for LCD_AREGB */
-#define _LCD_AREGB_AREGB_SHIFT 0 /**< Shift value for LCD_AREGB */
-#define _LCD_AREGB_AREGB_MASK 0xFFUL /**< Bit mask for LCD_AREGB */
-#define LCD_AREGB_AREGB_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_AREGB */
-#define _LCD_AREGB_AREGB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGB */
-
-/** Bit fields for LCD IF */
-#define _LCD_IF_RESETVALUE 0x00000000UL /**< Default value for LCD_IF */
-#define _LCD_IF_MASK 0x00000001UL /**< Mask for LCD_IF */
-#define LCD_IF_FC (1 << 0) /**< Frame Counter Interrupt Flag */
-#define _LCD_IF_FC_SHIFT 0 /**< Shift value for LCD_FC */
-#define _LCD_IF_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
-#define LCD_IF_FC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_IF */
-#define _LCD_IF_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */
-
-/** Bit fields for LCD IFS */
-#define _LCD_IFS_RESETVALUE 0x00000000UL /**< Default value for LCD_IFS */
-#define _LCD_IFS_MASK 0x00000001UL /**< Mask for LCD_IFS */
-#define LCD_IFS_FC (1 << 0) /**< Frame Counter Interrupt Flag Set */
-#define _LCD_IFS_FC_SHIFT 0 /**< Shift value for LCD_FC */
-#define _LCD_IFS_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
-#define LCD_IFS_FC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_IFS */
-#define _LCD_IFS_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IFS */
-
-/** Bit fields for LCD IFC */
-#define _LCD_IFC_RESETVALUE 0x00000000UL /**< Default value for LCD_IFC */
-#define _LCD_IFC_MASK 0x00000001UL /**< Mask for LCD_IFC */
-#define LCD_IFC_FC (1 << 0) /**< Frame Counter Interrupt Flag Clear */
-#define _LCD_IFC_FC_SHIFT 0 /**< Shift value for LCD_FC */
-#define _LCD_IFC_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
-#define LCD_IFC_FC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_IFC */
-#define _LCD_IFC_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IFC */
-
-/** Bit fields for LCD IEN */
-#define _LCD_IEN_RESETVALUE 0x00000000UL /**< Default value for LCD_IEN */
-#define _LCD_IEN_MASK 0x00000001UL /**< Mask for LCD_IEN */
-#define LCD_IEN_FC (1 << 0) /**< Frame Counter Interrupt Enable */
-#define _LCD_IEN_FC_SHIFT 0 /**< Shift value for LCD_FC */
-#define _LCD_IEN_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
-#define LCD_IEN_FC_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_IEN */
-#define _LCD_IEN_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */
-
-/** Bit fields for LCD SEGD0L */
-#define _LCD_SEGD0L_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD0L */
-#define _LCD_SEGD0L_MASK 0xFFFFFFFFUL /**< Mask for LCD_SEGD0L */
-#define _LCD_SEGD0L_SEGD0L_SHIFT 0 /**< Shift value for LCD_SEGD0L */
-#define _LCD_SEGD0L_SEGD0L_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_SEGD0L */
-#define LCD_SEGD0L_SEGD0L_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD0L */
-#define _LCD_SEGD0L_SEGD0L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD0L */
-
-/** Bit fields for LCD SEGD1L */
-#define _LCD_SEGD1L_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD1L */
-#define _LCD_SEGD1L_MASK 0xFFFFFFFFUL /**< Mask for LCD_SEGD1L */
-#define _LCD_SEGD1L_SEGD1L_SHIFT 0 /**< Shift value for LCD_SEGD1L */
-#define _LCD_SEGD1L_SEGD1L_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_SEGD1L */
-#define LCD_SEGD1L_SEGD1L_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD1L */
-#define _LCD_SEGD1L_SEGD1L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD1L */
-
-/** Bit fields for LCD SEGD2L */
-#define _LCD_SEGD2L_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD2L */
-#define _LCD_SEGD2L_MASK 0xFFFFFFFFUL /**< Mask for LCD_SEGD2L */
-#define _LCD_SEGD2L_SEGD2L_SHIFT 0 /**< Shift value for LCD_SEGD2L */
-#define _LCD_SEGD2L_SEGD2L_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_SEGD2L */
-#define LCD_SEGD2L_SEGD2L_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD2L */
-#define _LCD_SEGD2L_SEGD2L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD2L */
-
-/** Bit fields for LCD SEGD3L */
-#define _LCD_SEGD3L_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD3L */
-#define _LCD_SEGD3L_MASK 0xFFFFFFFFUL /**< Mask for LCD_SEGD3L */
-#define _LCD_SEGD3L_SEGD3L_SHIFT 0 /**< Shift value for LCD_SEGD3L */
-#define _LCD_SEGD3L_SEGD3L_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_SEGD3L */
-#define LCD_SEGD3L_SEGD3L_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD3L */
-#define _LCD_SEGD3L_SEGD3L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD3L */
-
-/** Bit fields for LCD SEGD0H */
-#define _LCD_SEGD0H_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD0H */
-#define _LCD_SEGD0H_MASK 0x000000FFUL /**< Mask for LCD_SEGD0H */
-#define _LCD_SEGD0H_SEGD0H_SHIFT 0 /**< Shift value for LCD_SEGD0H */
-#define _LCD_SEGD0H_SEGD0H_MASK 0xFFUL /**< Bit mask for LCD_SEGD0H */
-#define LCD_SEGD0H_SEGD0H_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD0H */
-#define _LCD_SEGD0H_SEGD0H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD0H */
-
-/** Bit fields for LCD SEGD1H */
-#define _LCD_SEGD1H_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD1H */
-#define _LCD_SEGD1H_MASK 0x000000FFUL /**< Mask for LCD_SEGD1H */
-#define _LCD_SEGD1H_SEGD1H_SHIFT 0 /**< Shift value for LCD_SEGD1H */
-#define _LCD_SEGD1H_SEGD1H_MASK 0xFFUL /**< Bit mask for LCD_SEGD1H */
-#define LCD_SEGD1H_SEGD1H_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD1H */
-#define _LCD_SEGD1H_SEGD1H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD1H */
-
-/** Bit fields for LCD SEGD2H */
-#define _LCD_SEGD2H_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD2H */
-#define _LCD_SEGD2H_MASK 0x000000FFUL /**< Mask for LCD_SEGD2H */
-#define _LCD_SEGD2H_SEGD2H_SHIFT 0 /**< Shift value for LCD_SEGD2H */
-#define _LCD_SEGD2H_SEGD2H_MASK 0xFFUL /**< Bit mask for LCD_SEGD2H */
-#define LCD_SEGD2H_SEGD2H_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD2H */
-#define _LCD_SEGD2H_SEGD2H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD2H */
-
-/** Bit fields for LCD SEGD3H */
-#define _LCD_SEGD3H_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD3H */
-#define _LCD_SEGD3H_MASK 0x000000FFUL /**< Mask for LCD_SEGD3H */
-#define _LCD_SEGD3H_SEGD3H_SHIFT 0 /**< Shift value for LCD_SEGD3H */
-#define _LCD_SEGD3H_SEGD3H_MASK 0xFFUL /**< Bit mask for LCD_SEGD3H */
-#define LCD_SEGD3H_SEGD3H_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SEGD3H */
-#define _LCD_SEGD3H_SEGD3H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD3H */
-
-/** Bit fields for LCD FREEZE */
-#define _LCD_FREEZE_RESETVALUE 0x00000000UL /**< Default value for LCD_FREEZE */
-#define _LCD_FREEZE_MASK 0x00000001UL /**< Mask for LCD_FREEZE */
-#define LCD_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _LCD_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for LCD_REGFREEZE */
-#define _LCD_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for LCD_REGFREEZE */
-#define LCD_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_FREEZE */
-#define LCD_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for LCD_FREEZE */
-#define LCD_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for LCD_FREEZE */
-#define _LCD_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_FREEZE */
-#define _LCD_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for LCD_FREEZE */
-#define _LCD_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for LCD_FREEZE */
-
-/** Bit fields for LCD SYNCBUSY */
-#define _LCD_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_MASK 0x00000FFFUL /**< Mask for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_CTRL (1 << 0) /**< LCD_CTRL Register Busy */
-#define _LCD_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for LCD_CTRL */
-#define _LCD_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for LCD_CTRL */
-#define LCD_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_BACTRL (1 << 1) /**< LCD_BACTRL Register Busy */
-#define _LCD_SYNCBUSY_BACTRL_SHIFT 1 /**< Shift value for LCD_BACTRL */
-#define _LCD_SYNCBUSY_BACTRL_MASK 0x2UL /**< Bit mask for LCD_BACTRL */
-#define LCD_SYNCBUSY_BACTRL_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_BACTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_AREGA (1 << 2) /**< LCD_AREGA Register Busy */
-#define _LCD_SYNCBUSY_AREGA_SHIFT 2 /**< Shift value for LCD_AREGA */
-#define _LCD_SYNCBUSY_AREGA_MASK 0x4UL /**< Bit mask for LCD_AREGA */
-#define LCD_SYNCBUSY_AREGA_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_AREGA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_AREGB (1 << 3) /**< LCD_AREGB Register Busy */
-#define _LCD_SYNCBUSY_AREGB_SHIFT 3 /**< Shift value for LCD_AREGB */
-#define _LCD_SYNCBUSY_AREGB_MASK 0x8UL /**< Bit mask for LCD_AREGB */
-#define LCD_SYNCBUSY_AREGB_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_AREGB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD0L (1 << 4) /**< LCD_SEGD0L Register Busy */
-#define _LCD_SYNCBUSY_SEGD0L_SHIFT 4 /**< Shift value for LCD_SEGD0L */
-#define _LCD_SYNCBUSY_SEGD0L_MASK 0x10UL /**< Bit mask for LCD_SEGD0L */
-#define LCD_SYNCBUSY_SEGD0L_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD0L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD1L (1 << 5) /**< LCD_SEGD1L Register Busy */
-#define _LCD_SYNCBUSY_SEGD1L_SHIFT 5 /**< Shift value for LCD_SEGD1L */
-#define _LCD_SYNCBUSY_SEGD1L_MASK 0x20UL /**< Bit mask for LCD_SEGD1L */
-#define LCD_SYNCBUSY_SEGD1L_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD1L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD2L (1 << 6) /**< LCD_SEGD2L Register Busy */
-#define _LCD_SYNCBUSY_SEGD2L_SHIFT 6 /**< Shift value for LCD_SEGD2L */
-#define _LCD_SYNCBUSY_SEGD2L_MASK 0x40UL /**< Bit mask for LCD_SEGD2L */
-#define LCD_SYNCBUSY_SEGD2L_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD2L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD3L (1 << 7) /**< LCD_SEGD3L Register Busy */
-#define _LCD_SYNCBUSY_SEGD3L_SHIFT 7 /**< Shift value for LCD_SEGD3L */
-#define _LCD_SYNCBUSY_SEGD3L_MASK 0x80UL /**< Bit mask for LCD_SEGD3L */
-#define LCD_SYNCBUSY_SEGD3L_DEFAULT (0x00000000UL << 7) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD3L_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD0H (1 << 8) /**< LCD_SEGD0H Register Busy */
-#define _LCD_SYNCBUSY_SEGD0H_SHIFT 8 /**< Shift value for LCD_SEGD0H */
-#define _LCD_SYNCBUSY_SEGD0H_MASK 0x100UL /**< Bit mask for LCD_SEGD0H */
-#define LCD_SYNCBUSY_SEGD0H_DEFAULT (0x00000000UL << 8) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD0H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD1H (1 << 9) /**< LCD_SEGD1H Register Busy */
-#define _LCD_SYNCBUSY_SEGD1H_SHIFT 9 /**< Shift value for LCD_SEGD1H */
-#define _LCD_SYNCBUSY_SEGD1H_MASK 0x200UL /**< Bit mask for LCD_SEGD1H */
-#define LCD_SYNCBUSY_SEGD1H_DEFAULT (0x00000000UL << 9) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD1H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD2H (1 << 10) /**< LCD_SEGD2H Register Busy */
-#define _LCD_SYNCBUSY_SEGD2H_SHIFT 10 /**< Shift value for LCD_SEGD2H */
-#define _LCD_SYNCBUSY_SEGD2H_MASK 0x400UL /**< Bit mask for LCD_SEGD2H */
-#define LCD_SYNCBUSY_SEGD2H_DEFAULT (0x00000000UL << 10) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD2H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-#define LCD_SYNCBUSY_SEGD3H (1 << 11) /**< LCD_SEGD3H Register Busy */
-#define _LCD_SYNCBUSY_SEGD3H_SHIFT 11 /**< Shift value for LCD_SEGD3H */
-#define _LCD_SYNCBUSY_SEGD3H_MASK 0x800UL /**< Bit mask for LCD_SEGD3H */
-#define LCD_SYNCBUSY_SEGD3H_DEFAULT (0x00000000UL << 11) /**< Shifted mode DEFAULT for LCD_SYNCBUSY */
-#define _LCD_SYNCBUSY_SEGD3H_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SYNCBUSY */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_RTC
- * @{
- */
-
-/** Bit fields for RTC CTRL */
-#define _RTC_CTRL_RESETVALUE 0x00000000UL /**< Default value for RTC_CTRL */
-#define _RTC_CTRL_MASK 0x00000007UL /**< Mask for RTC_CTRL */
-#define RTC_CTRL_EN (1 << 0) /**< RTC Enable */
-#define _RTC_CTRL_EN_SHIFT 0 /**< Shift value for RTC_EN */
-#define _RTC_CTRL_EN_MASK 0x1UL /**< Bit mask for RTC_EN */
-#define RTC_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_CTRL */
-#define _RTC_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
-#define RTC_CTRL_DEBUGRUN (1 << 1) /**< Debug Mode Run Enable */
-#define _RTC_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for RTC_DEBUGRUN */
-#define _RTC_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for RTC_DEBUGRUN */
-#define RTC_CTRL_DEBUGRUN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_CTRL */
-#define _RTC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
-#define RTC_CTRL_COMP0TOP (1 << 2) /**< Compare Channel 0 is Top Value */
-#define _RTC_CTRL_COMP0TOP_SHIFT 2 /**< Shift value for RTC_COMP0TOP */
-#define _RTC_CTRL_COMP0TOP_MASK 0x4UL /**< Bit mask for RTC_COMP0TOP */
-#define RTC_CTRL_COMP0TOP_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_CTRL */
-#define RTC_CTRL_COMP0TOP_DISABLE (0x00000000UL << 2) /**< Shifted mode DISABLE for RTC_CTRL */
-#define RTC_CTRL_COMP0TOP_ENABLE (0x00000001UL << 2) /**< Shifted mode ENABLE for RTC_CTRL */
-#define _RTC_CTRL_COMP0TOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
-#define _RTC_CTRL_COMP0TOP_DISABLE 0x00000000UL /**< Mode DISABLE for RTC_CTRL */
-#define _RTC_CTRL_COMP0TOP_ENABLE 0x00000001UL /**< Mode ENABLE for RTC_CTRL */
-
-/** Bit fields for RTC CNT */
-#define _RTC_CNT_RESETVALUE 0x00000000UL /**< Default value for RTC_CNT */
-#define _RTC_CNT_MASK 0x00FFFFFFUL /**< Mask for RTC_CNT */
-#define _RTC_CNT_CNT_SHIFT 0 /**< Shift value for RTC_CNT */
-#define _RTC_CNT_CNT_MASK 0xFFFFFFUL /**< Bit mask for RTC_CNT */
-#define RTC_CNT_CNT_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_CNT */
-#define _RTC_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CNT */
-
-/** Bit fields for RTC COMP0 */
-#define _RTC_COMP0_RESETVALUE 0x00000000UL /**< Default value for RTC_COMP0 */
-#define _RTC_COMP0_MASK 0x00FFFFFFUL /**< Mask for RTC_COMP0 */
-#define _RTC_COMP0_COMP0_SHIFT 0 /**< Shift value for RTC_COMP0 */
-#define _RTC_COMP0_COMP0_MASK 0xFFFFFFUL /**< Bit mask for RTC_COMP0 */
-#define RTC_COMP0_COMP0_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_COMP0 */
-#define _RTC_COMP0_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_COMP0 */
-
-/** Bit fields for RTC COMP1 */
-#define _RTC_COMP1_RESETVALUE 0x00000000UL /**< Default value for RTC_COMP1 */
-#define _RTC_COMP1_MASK 0x00FFFFFFUL /**< Mask for RTC_COMP1 */
-#define _RTC_COMP1_COMP1_SHIFT 0 /**< Shift value for RTC_COMP1 */
-#define _RTC_COMP1_COMP1_MASK 0xFFFFFFUL /**< Bit mask for RTC_COMP1 */
-#define RTC_COMP1_COMP1_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_COMP1 */
-#define _RTC_COMP1_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_COMP1 */
-
-/** Bit fields for RTC IF */
-#define _RTC_IF_RESETVALUE 0x00000000UL /**< Default value for RTC_IF */
-#define _RTC_IF_MASK 0x00000007UL /**< Mask for RTC_IF */
-#define RTC_IF_OF (1 << 0) /**< Overflow Interrupt Flag */
-#define _RTC_IF_OF_SHIFT 0 /**< Shift value for RTC_OF */
-#define _RTC_IF_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
-#define RTC_IF_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_IF */
-#define _RTC_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
-#define RTC_IF_COMP0 (1 << 1) /**< Compare Match 0 Interrupt Flag */
-#define _RTC_IF_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
-#define _RTC_IF_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
-#define RTC_IF_COMP0_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_IF */
-#define _RTC_IF_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
-#define RTC_IF_COMP1 (1 << 2) /**< Compare Match 1 Interrupt Flag */
-#define _RTC_IF_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
-#define _RTC_IF_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
-#define RTC_IF_COMP1_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_IF */
-#define _RTC_IF_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
-
-/** Bit fields for RTC IFS */
-#define _RTC_IFS_RESETVALUE 0x00000000UL /**< Default value for RTC_IFS */
-#define _RTC_IFS_MASK 0x00000007UL /**< Mask for RTC_IFS */
-#define RTC_IFS_OF (1 << 0) /**< Set Overflow Interrupt Flag */
-#define _RTC_IFS_OF_SHIFT 0 /**< Shift value for RTC_OF */
-#define _RTC_IFS_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
-#define RTC_IFS_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_IFS */
-#define _RTC_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
-#define RTC_IFS_COMP0 (1 << 1) /**< Set Compare match 0 Interrupt Flag */
-#define _RTC_IFS_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
-#define _RTC_IFS_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
-#define RTC_IFS_COMP0_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_IFS */
-#define _RTC_IFS_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
-#define RTC_IFS_COMP1 (1 << 2) /**< Set Compare match 1 Interrupt Flag */
-#define _RTC_IFS_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
-#define _RTC_IFS_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
-#define RTC_IFS_COMP1_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_IFS */
-#define _RTC_IFS_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
-
-/** Bit fields for RTC IFC */
-#define _RTC_IFC_RESETVALUE 0x00000000UL /**< Default value for RTC_IFC */
-#define _RTC_IFC_MASK 0x00000007UL /**< Mask for RTC_IFC */
-#define RTC_IFC_OF (1 << 0) /**< Clear Overflow Interrupt Flag */
-#define _RTC_IFC_OF_SHIFT 0 /**< Shift value for RTC_OF */
-#define _RTC_IFC_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
-#define RTC_IFC_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_IFC */
-#define _RTC_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
-#define RTC_IFC_COMP0 (1 << 1) /**< Clear Compare match 0 Interrupt Flag */
-#define _RTC_IFC_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
-#define _RTC_IFC_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
-#define RTC_IFC_COMP0_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_IFC */
-#define _RTC_IFC_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
-#define RTC_IFC_COMP1 (1 << 2) /**< Clear Compare match 1 Interrupt Flag */
-#define _RTC_IFC_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
-#define _RTC_IFC_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
-#define RTC_IFC_COMP1_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_IFC */
-#define _RTC_IFC_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
-
-/** Bit fields for RTC IEN */
-#define _RTC_IEN_RESETVALUE 0x00000000UL /**< Default value for RTC_IEN */
-#define _RTC_IEN_MASK 0x00000007UL /**< Mask for RTC_IEN */
-#define RTC_IEN_OF (1 << 0) /**< Overflow Interrupt Enable */
-#define _RTC_IEN_OF_SHIFT 0 /**< Shift value for RTC_OF */
-#define _RTC_IEN_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
-#define RTC_IEN_OF_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_IEN */
-#define _RTC_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
-#define RTC_IEN_COMP0 (1 << 1) /**< Compare Match 0 Interrupt Enable */
-#define _RTC_IEN_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
-#define _RTC_IEN_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
-#define RTC_IEN_COMP0_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_IEN */
-#define _RTC_IEN_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
-#define RTC_IEN_COMP1 (1 << 2) /**< Compare Match 1 Interrupt Enable */
-#define _RTC_IEN_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
-#define _RTC_IEN_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
-#define RTC_IEN_COMP1_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_IEN */
-#define _RTC_IEN_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
-
-/** Bit fields for RTC FREEZE */
-#define _RTC_FREEZE_RESETVALUE 0x00000000UL /**< Default value for RTC_FREEZE */
-#define _RTC_FREEZE_MASK 0x00000001UL /**< Mask for RTC_FREEZE */
-#define RTC_FREEZE_REGFREEZE (1 << 0) /**< Register Update Freeze */
-#define _RTC_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for RTC_REGFREEZE */
-#define _RTC_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for RTC_REGFREEZE */
-#define RTC_FREEZE_REGFREEZE_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_FREEZE */
-#define RTC_FREEZE_REGFREEZE_UPDATE (0x00000000UL << 0) /**< Shifted mode UPDATE for RTC_FREEZE */
-#define RTC_FREEZE_REGFREEZE_FREEZE (0x00000001UL << 0) /**< Shifted mode FREEZE for RTC_FREEZE */
-#define _RTC_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_FREEZE */
-#define _RTC_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for RTC_FREEZE */
-#define _RTC_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for RTC_FREEZE */
-
-/** Bit fields for RTC SYNCBUSY */
-#define _RTC_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for RTC_SYNCBUSY */
-#define _RTC_SYNCBUSY_MASK 0x00000007UL /**< Mask for RTC_SYNCBUSY */
-#define RTC_SYNCBUSY_CTRL (1 << 0) /**< RTC_CTRL Register Busy */
-#define _RTC_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for RTC_CTRL */
-#define _RTC_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for RTC_CTRL */
-#define RTC_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
-#define _RTC_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
-#define RTC_SYNCBUSY_COMP0 (1 << 1) /**< RTC_COMP0 Register Busy */
-#define _RTC_SYNCBUSY_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
-#define _RTC_SYNCBUSY_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
-#define RTC_SYNCBUSY_COMP0_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
-#define _RTC_SYNCBUSY_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
-#define RTC_SYNCBUSY_COMP1 (1 << 2) /**< RTC_COMP1 Register Busy */
-#define _RTC_SYNCBUSY_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
-#define _RTC_SYNCBUSY_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
-#define RTC_SYNCBUSY_COMP1_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
-#define _RTC_SYNCBUSY_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_WDOG
- * @{
- */
-
-/** Bit fields for WDOG CTRL */
-#define _WDOG_CTRL_RESETVALUE 0x00000F00UL /**< Default value for WDOG_CTRL */
-#define _WDOG_CTRL_MASK 0x00003F7FUL /**< Mask for WDOG_CTRL */
-#define WDOG_CTRL_EN (1 << 0) /**< Watchdog Timer Enable */
-#define _WDOG_CTRL_EN_SHIFT 0 /**< Shift value for WDOG_EN */
-#define _WDOG_CTRL_EN_MASK 0x1UL /**< Bit mask for WDOG_EN */
-#define WDOG_CTRL_EN_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_DEBUGRUN (1 << 1) /**< Debug Mode Run Enable */
-#define _WDOG_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for WDOG_DEBUGRUN */
-#define _WDOG_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for WDOG_DEBUGRUN */
-#define WDOG_CTRL_DEBUGRUN_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_EM2RUN (1 << 2) /**< Energy Mode 2 Run Enable */
-#define _WDOG_CTRL_EM2RUN_SHIFT 2 /**< Shift value for WDOG_EM2RUN */
-#define _WDOG_CTRL_EM2RUN_MASK 0x4UL /**< Bit mask for WDOG_EM2RUN */
-#define WDOG_CTRL_EM2RUN_DEFAULT (0x00000000UL << 2) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_EM2RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_EM3RUN (1 << 3) /**< Energy Mode 3 Run Enable */
-#define _WDOG_CTRL_EM3RUN_SHIFT 3 /**< Shift value for WDOG_EM3RUN */
-#define _WDOG_CTRL_EM3RUN_MASK 0x8UL /**< Bit mask for WDOG_EM3RUN */
-#define WDOG_CTRL_EM3RUN_DEFAULT (0x00000000UL << 3) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_EM3RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_LOCK (1 << 4) /**< Configuration lock */
-#define _WDOG_CTRL_LOCK_SHIFT 4 /**< Shift value for WDOG_LOCK */
-#define _WDOG_CTRL_LOCK_MASK 0x10UL /**< Bit mask for WDOG_LOCK */
-#define WDOG_CTRL_LOCK_DEFAULT (0x00000000UL << 4) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_LOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_EM4BLOCK (1 << 5) /**< Energy Mode 4 Block */
-#define _WDOG_CTRL_EM4BLOCK_SHIFT 5 /**< Shift value for WDOG_EM4BLOCK */
-#define _WDOG_CTRL_EM4BLOCK_MASK 0x20UL /**< Bit mask for WDOG_EM4BLOCK */
-#define WDOG_CTRL_EM4BLOCK_DEFAULT (0x00000000UL << 5) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_EM4BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_SWOSCBLOCK (1 << 6) /**< Oscillator disabling by software block */
-#define _WDOG_CTRL_SWOSCBLOCK_SHIFT 6 /**< Shift value for WDOG_SWOSCBLOCK */
-#define _WDOG_CTRL_SWOSCBLOCK_MASK 0x40UL /**< Bit mask for WDOG_SWOSCBLOCK */
-#define WDOG_CTRL_SWOSCBLOCK_DEFAULT (0x00000000UL << 6) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_SWOSCBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_PERSEL_SHIFT 8 /**< Shift value for WDOG_PERSEL */
-#define _WDOG_CTRL_PERSEL_MASK 0xF00UL /**< Bit mask for WDOG_PERSEL */
-#define WDOG_CTRL_PERSEL_DEFAULT (0x0000000FUL << 8) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_PERSEL_DEFAULT 0x0000000FUL /**< Mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_CLKSEL_SHIFT 12 /**< Shift value for WDOG_CLKSEL */
-#define _WDOG_CTRL_CLKSEL_MASK 0x3000UL /**< Bit mask for WDOG_CLKSEL */
-#define WDOG_CTRL_CLKSEL_DEFAULT (0x00000000UL << 12) /**< Shifted mode DEFAULT for WDOG_CTRL */
-#define WDOG_CTRL_CLKSEL_1KHZ (0x00000000UL << 12) /**< Shifted mode 1KHZ for WDOG_CTRL */
-#define WDOG_CTRL_CLKSEL_LFRCO (0x00000001UL << 12) /**< Shifted mode LFRCO for WDOG_CTRL */
-#define WDOG_CTRL_CLKSEL_LFXO (0x00000002UL << 12) /**< Shifted mode LFXO for WDOG_CTRL */
-#define _WDOG_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
-#define _WDOG_CTRL_CLKSEL_1KHZ 0x00000000UL /**< Mode 1KHZ for WDOG_CTRL */
-#define _WDOG_CTRL_CLKSEL_LFRCO 0x00000001UL /**< Mode LFRCO for WDOG_CTRL */
-#define _WDOG_CTRL_CLKSEL_LFXO 0x00000002UL /**< Mode LFXO for WDOG_CTRL */
-
-/** Bit fields for WDOG CMD */
-#define _WDOG_CMD_RESETVALUE 0x00000000UL /**< Default value for WDOG_CMD */
-#define _WDOG_CMD_MASK 0x00000001UL /**< Mask for WDOG_CMD */
-#define WDOG_CMD_CLEAR (1 << 0) /**< Watchdog Timer Clear */
-#define _WDOG_CMD_CLEAR_SHIFT 0 /**< Shift value for WDOG_CLEAR */
-#define _WDOG_CMD_CLEAR_MASK 0x1UL /**< Bit mask for WDOG_CLEAR */
-#define WDOG_CMD_CLEAR_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for WDOG_CMD */
-#define WDOG_CMD_CLEAR_UNCHANGED (0x00000000UL << 0) /**< Shifted mode UNCHANGED for WDOG_CMD */
-#define WDOG_CMD_CLEAR_CLEARED (0x00000001UL << 0) /**< Shifted mode CLEARED for WDOG_CMD */
-#define _WDOG_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CMD */
-#define _WDOG_CMD_CLEAR_UNCHANGED 0x00000000UL /**< Mode UNCHANGED for WDOG_CMD */
-#define _WDOG_CMD_CLEAR_CLEARED 0x00000001UL /**< Mode CLEARED for WDOG_CMD */
-
-/** Bit fields for WDOG SYNCBUSY */
-#define _WDOG_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for WDOG_SYNCBUSY */
-#define _WDOG_SYNCBUSY_MASK 0x00000003UL /**< Mask for WDOG_SYNCBUSY */
-#define WDOG_SYNCBUSY_CTRL (1 << 0) /**< WDOG_CTRL Register Busy */
-#define _WDOG_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for WDOG_CTRL */
-#define _WDOG_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for WDOG_CTRL */
-#define WDOG_SYNCBUSY_CTRL_DEFAULT (0x00000000UL << 0) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
-#define _WDOG_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
-#define WDOG_SYNCBUSY_CMD (1 << 1) /**< WDOG_CMD Register Busy */
-#define _WDOG_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for WDOG_CMD */
-#define _WDOG_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for WDOG_CMD */
-#define WDOG_SYNCBUSY_CMD_DEFAULT (0x00000000UL << 1) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
-#define _WDOG_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
-
-/**
- * @}
- */
-
-/**
- * @addtogroup EFM32G890F128_DEVINFO
- * @\{
- */
-/** Bit fields for EFM32G890F128_DEVINFO */
-#define _DEVINFO_UNIQUEL_MASK (0xFFFFFFFFUL)
-#define _DEVINFO_UNIQUEL_SHIFT 0
-#define _DEVINFO_UNIQUEH_MASK (0xFFFFFFFFUL)
-#define _DEVINFO_UNIQUEH_SHIFT 0
-#define _DEVINFO_MSIZE_FLASH_MASK (0xFFFF0000UL)
-#define _DEVINFO_MSIZE_FLASH_SHIFT 16
-#define _DEVINFO_MSIZE_SRAM_MASK (0x0000FFFFUL)
-#define _DEVINFO_MSIZE_SRAM_SHIFT 0
-#define _DEVINFO_PART_DEVICE_FAMILY_MASK (0x00FF0000UL)
-#define _DEVINFO_PART_DEVICE_FAMILY_SHIFT 16
-#define _DEVINFO_PART_DEVICE_NUMBER_MASK (0x0000FFFFUL)
-#define _DEVINFO_PART_DEVICE_NUMBER_SHIFT 0
-
-/**
- * @\}
- */
-
-/**
- * @addtogroup EFM32G890F128_CALIB
- * @\{
- */
-
-/** Bit fields for Calibration Special Registers */
-#define _HFRCO_CALIBH_28MHZ_MASK (0x000000FFUL)
-#define _HFRCO_CALIBH_28MHZ_SHIFT 0
-#define _HFRCO_CALIBL_21MHZ_MASK (0xFF000000UL)
-#define _HFRCO_CALIBL_21MHZ_SHIFT 24
-#define _HFRCO_CALIBL_11MHZ_MASK (0x00FF0000UL)
-#define _HFRCO_CALIBL_11MHZ_SHIFT 16
-#define _HFRCO_CALIBL_7MHZ_MASK (0x0000FF00UL)
-#define _HFRCO_CALIBL_7MHZ_SHIFT 8
-#define _HFRCO_CALIBL_1MHZ_MASK (0x000000FFUL)
-#define _HFRCO_CALIBL_1MHZ_SHIFT 0
-#define _ADC_CALIB_TEMP_MASK (0xFF000000UL)
-#define _ADC_CALIB_TEMP_SHIFT 24
-#define _ADC_CALIB_TUNING_MASK (0x00FFFFFFUL)
-#define _ADC_CALIB_TUNING_SHIFT 0
-
-/**
- * @\}
- */
-
-/**************************************************************************//**
- *
- * Unlock codes
- *
- *****************************************************************************/
-/** @addtogroup EFM32G890F128_MSC
- * @{
- */
-#define MSC_UNLOCK_CODE 0x1B71 /**< MSC unlock code */
-/**
- * @}
- *//** @addtogroup EFM32G890F128_EMU
- * @{
- */
-#define EMU_UNLOCK_CODE 0xADE8 /**< EMU unlock code */
-/**
- * @}
- *//** @addtogroup EFM32G890F128_CMU
- * @{
- */
-#define CMU_UNLOCK_CODE 0x580E /**< CMU unlock code */
-/**
- * @}
- *//** @addtogroup EFM32G890F128_GPIO
- * @{
- */
-#define GPIO_UNLOCK_CODE 0xA534 /**< GPIO unlock code */
-/**
- * @}
- *//** @addtogroup EFM32G890F128_TIMER
- * @{
- */
-#define TIMER_UNLOCK_CODE 0xCE80 /**< TIMER unlock code */
-/**
- * @}
- */
-
-/**************************************************************************//**
- *
- * @defgroup EFM32G890F128_Alternate_Function EFM32G890F128 Alternate Function
- * @{
- *****************************************************************************/
-
-/**************************************************************************//**
- * @defgroup EFM32G890F128_AF_Channels EFM32G890F128 AF Channels
- * @{
- *****************************************************************************/
-
-/** AF channels connect the different on-chip peripherals with the af-mux */
-#define AFCHAN_MAX 79
-#define AFCHANLOC_MAX 4
-/** Analog AF channels */
-#define AFACHAN_MAX 37
-
-/** Peripheral Alternate Function (AF) channels */
-#define AF_CMU_CLKOUT0 0
-#define AF_CMU_CLKOUT1 1
-#define AF_EBI_ADDRDAT00 2
-#define AF_EBI_ADDRDAT01 3
-#define AF_EBI_ADDRDAT02 4
-#define AF_EBI_ADDRDAT03 5
-#define AF_EBI_ADDRDAT04 6
-#define AF_EBI_ADDRDAT05 7
-#define AF_EBI_ADDRDAT06 8
-#define AF_EBI_ADDRDAT07 9
-#define AF_EBI_ADDRDAT08 10
-#define AF_EBI_ADDRDAT09 11
-#define AF_EBI_ADDRDAT10 12
-#define AF_EBI_ADDRDAT11 13
-#define AF_EBI_ADDRDAT12 14
-#define AF_EBI_ADDRDAT13 15
-#define AF_EBI_ADDRDAT14 16
-#define AF_EBI_ADDRDAT15 17
-#define AF_EBI_CS0 18
-#define AF_EBI_CS1 19
-#define AF_EBI_CS2 20
-#define AF_EBI_CS3 21
-#define AF_EBI_WEn 22
-#define AF_EBI_REn 23
-#define AF_EBI_ARDY 24
-#define AF_EBI_ALE 25
-#define AF_TIMER0_CC0 26
-#define AF_TIMER0_CC1 27
-#define AF_TIMER0_CC2 28
-#define AF_TIMER0_CCC0 29
-#define AF_TIMER0_CCC1 30
-#define AF_TIMER0_CCC2 31
-#define AF_TIMER1_CC0 32
-#define AF_TIMER1_CC1 33
-#define AF_TIMER1_CC2 34
-#define AF_TIMER1_CCC0 35
-#define AF_TIMER1_CCC1 36
-#define AF_TIMER1_CCC2 37
-#define AF_TIMER2_CC0 38
-#define AF_TIMER2_CC1 39
-#define AF_TIMER2_CC2 40
-#define AF_TIMER2_CCC0 41
-#define AF_TIMER2_CCC1 42
-#define AF_TIMER2_CCC2 43
-#define AF_USART0_TX 44
-#define AF_USART0_RX 45
-#define AF_USART0_CLK 46
-#define AF_USART0_CS 47
-#define AF_USART1_TX 48
-#define AF_USART1_RX 49
-#define AF_USART1_CLK 50
-#define AF_USART1_CS 51
-#define AF_USART2_TX 52
-#define AF_USART2_RX 53
-#define AF_USART2_CLK 54
-#define AF_USART2_CS 55
-#define AF_UART0_TX 56
-#define AF_UART0_RX 57
-#define AF_UART0_CLK 58
-#define AF_UART0_CS 59
-#define AF_LEUART0_TX 60
-#define AF_LEUART0_RX 61
-#define AF_LEUART1_TX 62
-#define AF_LEUART1_RX 63
-#define AF_LETIMER0_OUT0 64
-#define AF_LETIMER0_OUT1 65
-#define AF_PCNT0_S0IN 66
-#define AF_PCNT0_S1IN 67
-#define AF_PCNT1_S0IN 68
-#define AF_PCNT1_S1IN 69
-#define AF_PCNT2_S0IN 70
-#define AF_PCNT2_S1IN 71
-#define AF_I2C0_SDA 72
-#define AF_I2C0_SCL 73
-#define AF_ACMP0_OUT 74
-#define AF_ACMP1_OUT 75
-#define AF_DBG_SWV 76
-#define AF_DBG_SWDITMS 77
-#define AF_DBG_SWCLKTCK 78
-
-/** Analog AF channels */
-#define AFA_MSC_TM0 0
-#define AFA_MSC_TM1 1
-#define AFA_MSC_TM2 2
-#define AFA_ADC0_CH0 3
-#define AFA_ADC0_CH1 4
-#define AFA_ADC0_CH2 5
-#define AFA_ADC0_CH3 6
-#define AFA_ADC0_CH4 7
-#define AFA_ADC0_CH5 8
-#define AFA_ADC0_CH6 9
-#define AFA_ADC0_CH7 10
-#define AFA_ADC0_VCM 11
-#define AFA_DAC0_OUT0 12
-#define AFA_DAC0_OUT1 13
-#define AFA_ACMP0_CH0 14
-#define AFA_ACMP0_CH1 15
-#define AFA_ACMP0_CH2 16
-#define AFA_ACMP0_CH3 17
-#define AFA_ACMP0_CH4 18
-#define AFA_ACMP0_CH5 19
-#define AFA_ACMP0_CH6 20
-#define AFA_ACMP0_CH7 21
-#define AFA_ACMP1_CH0 22
-#define AFA_ACMP1_CH1 23
-#define AFA_ACMP1_CH2 24
-#define AFA_ACMP1_CH3 25
-#define AFA_ACMP1_CH4 26
-#define AFA_ACMP1_CH5 27
-#define AFA_ACMP1_CH6 28
-#define AFA_ACMP1_CH7 29
-#define AFA_LCD_BCAP_P 30
-#define AFA_LCD_BCAP_N 31
-#define AFA_LCD_BEXT 32
-#define AFA_HFXTAL_P 33
-#define AFA_HFXTAL_N 34
-#define AFA_LFXTAL_P 35
-#define AFA_LFXTAL_N 36
-
-/** Digital AF */
-#define AF_TIMER_CC0(i) (i == 0 ? AF_TIMER0_CC0 : i == 1 ? AF_TIMER1_CC0 : i == 2 ? AF_TIMER2_CC0 : -1)
-#define AF_UART_CLK(i) (i == 0 ? AF_UART0_CLK : -1)
-#define AF_I2C_SDA(i) (i == 0 ? AF_I2C0_SDA : -1)
-#define AF_TIMER_CC1(i) (i == 0 ? AF_TIMER0_CC1 : i == 1 ? AF_TIMER1_CC1 : i == 2 ? AF_TIMER2_CC1 : -1)
-#define AF_USART_CS(i) (i == 0 ? AF_USART0_CS : i == 1 ? AF_USART1_CS : i == 2 ? AF_USART2_CS : -1)
-#define AF_I2C_SCL(i) (i == 0 ? AF_I2C0_SCL : -1)
-#define AF_TIMER_CC2(i) (i == 0 ? AF_TIMER0_CC2 : i == 1 ? AF_TIMER1_CC2 : i == 2 ? AF_TIMER2_CC2 : -1)
-#define AF_USART_CLK(i) (i == 0 ? AF_USART0_CLK : i == 1 ? AF_USART1_CLK : i == 2 ? AF_USART2_CLK : -1)
-#define AF_UART_RX(i) (i == 0 ? AF_UART0_RX : -1)
-#define AF_UART_TX(i) (i == 0 ? AF_UART0_TX : -1)
-#define AF_LETIMER_OUT1(i) (i == 0 ? AF_LETIMER0_OUT1 : -1)
-#define AF_LEUART_RX(i) (i == 0 ? AF_LEUART0_RX : i == 1 ? AF_LEUART1_RX : -1)
-#define AF_TIMER_CCC0(i) (i == 0 ? AF_TIMER0_CCC0 : i == 1 ? AF_TIMER1_CCC0 : i == 2 ? AF_TIMER2_CCC0 : -1)
-#define AF_PCNT_S1IN(i) (i == 0 ? AF_PCNT0_S1IN : i == 1 ? AF_PCNT1_S1IN : i == 2 ? AF_PCNT2_S1IN : -1)
-#define AF_LEUART_TX(i) (i == 0 ? AF_LEUART0_TX : i == 1 ? AF_LEUART1_TX : -1)
-#define AF_TIMER_CCC2(i) (i == 0 ? AF_TIMER0_CCC2 : i == 1 ? AF_TIMER1_CCC2 : i == 2 ? AF_TIMER2_CCC2 : -1)
-#define AF_TIMER_CCC1(i) (i == 0 ? AF_TIMER0_CCC1 : i == 1 ? AF_TIMER1_CCC1 : i == 2 ? AF_TIMER2_CCC1 : -1)
-#define AF_USART_TX(i) (i == 0 ? AF_USART0_TX : i == 1 ? AF_USART1_TX : i == 2 ? AF_USART2_TX : -1)
-#define AF_LETIMER_OUT0(i) (i == 0 ? AF_LETIMER0_OUT0 : -1)
-#define AF_ACMP_OUT(i) (i == 0 ? AF_ACMP0_OUT : i == 1 ? AF_ACMP1_OUT : -1)
-#define AF_USART_RX(i) (i == 0 ? AF_USART0_RX : i == 1 ? AF_USART1_RX : i == 2 ? AF_USART2_RX : -1)
-#define AF_UART_CS(i) (i == 0 ? AF_UART0_CS : -1)
-#define AF_PCNT_S0IN(i) (i == 0 ? AF_PCNT0_S0IN : i == 1 ? AF_PCNT1_S0IN : i == 2 ? AF_PCNT2_S0IN : -1)
-#define AFA_DAC_OUT1(i) (i == 0 ? AFA_DAC0_OUT1 : -1)
-#define AFA_DAC_OUT0(i) (i == 0 ? AFA_DAC0_OUT0 : -1)
-#define AFA_ADC_CH7(i) (i == 0 ? AFA_ADC0_CH7 : -1)
-#define AFA_ADC_VCM(i) (i == 0 ? AFA_ADC0_VCM : -1)
-#define AFA_ACMP_CH1(i) (i == 0 ? AFA_ACMP0_CH1 : i == 1 ? AFA_ACMP1_CH1 : -1)
-#define AFA_ADC_CH0(i) (i == 0 ? AFA_ADC0_CH0 : -1)
-#define AFA_ACMP_CH0(i) (i == 0 ? AFA_ACMP0_CH0 : i == 1 ? AFA_ACMP1_CH0 : -1)
-#define AFA_ACMP_CH3(i) (i == 0 ? AFA_ACMP0_CH3 : i == 1 ? AFA_ACMP1_CH3 : -1)
-#define AFA_ADC_CH1(i) (i == 0 ? AFA_ADC0_CH1 : -1)
-#define AFA_ACMP_CH2(i) (i == 0 ? AFA_ACMP0_CH2 : i == 1 ? AFA_ACMP1_CH2 : -1)
-#define AFA_ADC_CH2(i) (i == 0 ? AFA_ADC0_CH2 : -1)
-#define AFA_ADC_CH3(i) (i == 0 ? AFA_ADC0_CH3 : -1)
-#define AFA_ADC_CH4(i) (i == 0 ? AFA_ADC0_CH4 : -1)
-#define AFA_ADC_CH5(i) (i == 0 ? AFA_ADC0_CH5 : -1)
-#define AFA_ADC_CH6(i) (i == 0 ? AFA_ADC0_CH6 : -1)
-#define AFA_ACMP_CH5(i) (i == 0 ? AFA_ACMP0_CH5 : i == 1 ? AFA_ACMP1_CH5 : -1)
-#define AFA_ACMP_CH4(i) (i == 0 ? AFA_ACMP0_CH4 : i == 1 ? AFA_ACMP1_CH4 : -1)
-#define AFA_ACMP_CH7(i) (i == 0 ? AFA_ACMP0_CH7 : i == 1 ? AFA_ACMP1_CH7 : -1)
-#define AFA_ACMP_CH6(i) (i == 0 ? AFA_ACMP0_CH6 : i == 1 ? AFA_ACMP1_CH6 : -1)
-
-/**
- * @}
- */
-
-/**************************************************************************//**
- * @defgroup EFM32G890F128_AF_Ports EFM32G890F128 AF Ports
- * @{
- *****************************************************************************/
-
-/** AF port for function f */
-#define AF_CMU_CLKOUT0_PORT(f) (f == 0 ? 0 : f == 1 ? 2 : -1)
-#define AF_CMU_CLKOUT1_PORT(f) (f == 0 ? 0 : f == 1 ? 3 : -1)
-#define AF_EBI_ADDRDAT00_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT01_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT02_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT03_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT04_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT05_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT06_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT07_PORT(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT08_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT09_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT10_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT11_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT12_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT13_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT14_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT15_PORT(f) (f == 0 ? 0 : -1)
-#define AF_EBI_CS0_PORT(f) (f == 0 ? 3 : -1)
-#define AF_EBI_CS1_PORT(f) (f == 0 ? 3 : -1)
-#define AF_EBI_CS2_PORT(f) (f == 0 ? 3 : -1)
-#define AF_EBI_CS3_PORT(f) (f == 0 ? 3 : -1)
-#define AF_EBI_WEn_PORT(f) (f == 0 ? 5 : -1)
-#define AF_EBI_REn_PORT(f) (f == 0 ? 5 : -1)
-#define AF_EBI_ARDY_PORT(f) (f == 0 ? 5 : -1)
-#define AF_EBI_ALE_PORT(f) (f == 0 ? 5 : -1)
-#define AF_TIMER0_CC0_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 5 : f == 3 ? 3 : -1)
-#define AF_TIMER0_CC1_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 5 : f == 3 ? 3 : -1)
-#define AF_TIMER0_CC2_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 5 : f == 3 ? 3 : -1)
-#define AF_TIMER0_CCC0_PORT(f) (f == 0 ? 0 : f == 1 ? 2 : f == 2 ? 5 : f == 3 ? 2 : -1)
-#define AF_TIMER0_CCC1_PORT(f) (f == 0 ? 0 : f == 1 ? 2 : f == 2 ? 5 : f == 3 ? 2 : -1)
-#define AF_TIMER0_CCC2_PORT(f) (f == 0 ? 0 : f == 1 ? 2 : f == 2 ? 5 : f == 3 ? 2 : -1)
-#define AF_TIMER1_CC0_PORT(f) (f == 0 ? 2 : f == 1 ? 4 : f == 2 ? 1 : -1)
-#define AF_TIMER1_CC1_PORT(f) (f == 0 ? 2 : f == 1 ? 4 : f == 2 ? 1 : -1)
-#define AF_TIMER1_CC2_PORT(f) (f == 0 ? 2 : f == 1 ? 4 : f == 2 ? 1 : -1)
-#define AF_TIMER1_CCC0_PORT(f) (-1)
-#define AF_TIMER1_CCC1_PORT(f) (-1)
-#define AF_TIMER1_CCC2_PORT(f) (-1)
-#define AF_TIMER2_CC0_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 2 : -1)
-#define AF_TIMER2_CC1_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 2 : -1)
-#define AF_TIMER2_CC2_PORT(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 2 : -1)
-#define AF_TIMER2_CCC0_PORT(f) (-1)
-#define AF_TIMER2_CCC1_PORT(f) (-1)
-#define AF_TIMER2_CCC2_PORT(f) (-1)
-#define AF_USART0_TX_PORT(f) (f == 0 ? 4 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_USART0_RX_PORT(f) (f == 0 ? 4 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_USART0_CLK_PORT(f) (f == 0 ? 4 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_USART0_CS_PORT(f) (f == 0 ? 4 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_USART1_TX_PORT(f) (f == 0 ? 2 : f == 1 ? 3 : -1)
-#define AF_USART1_RX_PORT(f) (f == 0 ? 2 : f == 1 ? 3 : -1)
-#define AF_USART1_CLK_PORT(f) (f == 0 ? 1 : f == 1 ? 3 : -1)
-#define AF_USART1_CS_PORT(f) (f == 0 ? 1 : f == 1 ? 3 : -1)
-#define AF_USART2_TX_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_USART2_RX_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_USART2_CLK_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_USART2_CS_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_UART0_TX_PORT(f) (f == 0 ? 5 : f == 1 ? 4 : f == 2 ? 0 : f == 3 ? 2 : -1)
-#define AF_UART0_RX_PORT(f) (f == 0 ? 5 : f == 1 ? 4 : f == 2 ? 0 : f == 3 ? 2 : -1)
-#define AF_UART0_CLK_PORT(f) (-1)
-#define AF_UART0_CS_PORT(f) (-1)
-#define AF_LEUART0_TX_PORT(f) (f == 0 ? 3 : f == 1 ? 1 : f == 2 ? 4 : -1)
-#define AF_LEUART0_RX_PORT(f) (f == 0 ? 3 : f == 1 ? 1 : f == 2 ? 4 : -1)
-#define AF_LEUART1_TX_PORT(f) (f == 0 ? 2 : f == 1 ? 0 : -1)
-#define AF_LEUART1_RX_PORT(f) (f == 0 ? 2 : f == 1 ? 0 : -1)
-#define AF_LETIMER0_OUT0_PORT(f) (f == 0 ? 3 : f == 1 ? 1 : f == 2 ? 5 : f == 3 ? 2 : -1)
-#define AF_LETIMER0_OUT1_PORT(f) (f == 0 ? 3 : f == 1 ? 1 : f == 2 ? 5 : f == 3 ? 2 : -1)
-#define AF_PCNT0_S0IN_PORT(f) (f == 0 ? 2 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_PCNT0_S1IN_PORT(f) (f == 0 ? 2 : f == 1 ? 4 : f == 2 ? 2 : -1)
-#define AF_PCNT1_S0IN_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_PCNT1_S1IN_PORT(f) (f == 0 ? 2 : f == 1 ? 1 : -1)
-#define AF_PCNT2_S0IN_PORT(f) (f == 0 ? 3 : f == 1 ? 4 : -1)
-#define AF_PCNT2_S1IN_PORT(f) (f == 0 ? 3 : f == 1 ? 4 : -1)
-#define AF_I2C0_SDA_PORT(f) (f == 0 ? 0 : f == 1 ? 3 : f == 2 ? 2 : f == 3 ? 3 : -1)
-#define AF_I2C0_SCL_PORT(f) (f == 0 ? 0 : f == 1 ? 3 : f == 2 ? 2 : f == 3 ? 3 : -1)
-#define AF_ACMP0_OUT_PORT(f) (f == 0 ? 4 : f == 1 ? 4 : -1)
-#define AF_ACMP1_OUT_PORT(f) (f == 0 ? 5 : f == 1 ? 4 : -1)
-#define AF_DBG_SWV_PORT(f) (f == 0 ? 5 : f == 1 ? 2 : -1)
-#define AF_DBG_SWDITMS_PORT(f) (f == 0 ? 5 : f == 1 ? 5 : -1)
-#define AF_DBG_SWCLKTCK_PORT(f) (f == 0 ? 5 : f == 1 ? 5 : -1)
-
-/**
- * @}
- */
-
-/**************************************************************************//**
- * @defgroup EFM32G890F128_AF_Pins EFM32G890F128 AF Pins
- * @{
- *****************************************************************************/
-
-/** AF pin for function f */
-#define AF_CMU_CLKOUT0_PIN(f) (f == 0 ? 2 : f == 1 ? 12 : -1)
-#define AF_CMU_CLKOUT1_PIN(f) (f == 0 ? 1 : f == 1 ? 8 : -1)
-#define AF_EBI_ADDRDAT00_PIN(f) (f == 0 ? 8 : -1)
-#define AF_EBI_ADDRDAT01_PIN(f) (f == 0 ? 9 : -1)
-#define AF_EBI_ADDRDAT02_PIN(f) (f == 0 ? 10 : -1)
-#define AF_EBI_ADDRDAT03_PIN(f) (f == 0 ? 11 : -1)
-#define AF_EBI_ADDRDAT04_PIN(f) (f == 0 ? 12 : -1)
-#define AF_EBI_ADDRDAT05_PIN(f) (f == 0 ? 13 : -1)
-#define AF_EBI_ADDRDAT06_PIN(f) (f == 0 ? 14 : -1)
-#define AF_EBI_ADDRDAT07_PIN(f) (f == 0 ? 15 : -1)
-#define AF_EBI_ADDRDAT08_PIN(f) (f == 0 ? 15 : -1)
-#define AF_EBI_ADDRDAT09_PIN(f) (f == 0 ? 0 : -1)
-#define AF_EBI_ADDRDAT10_PIN(f) (f == 0 ? 1 : -1)
-#define AF_EBI_ADDRDAT11_PIN(f) (f == 0 ? 2 : -1)
-#define AF_EBI_ADDRDAT12_PIN(f) (f == 0 ? 3 : -1)
-#define AF_EBI_ADDRDAT13_PIN(f) (f == 0 ? 4 : -1)
-#define AF_EBI_ADDRDAT14_PIN(f) (f == 0 ? 5 : -1)
-#define AF_EBI_ADDRDAT15_PIN(f) (f == 0 ? 6 : -1)
-#define AF_EBI_CS0_PIN(f) (f == 0 ? 9 : -1)
-#define AF_EBI_CS1_PIN(f) (f == 0 ? 10 : -1)
-#define AF_EBI_CS2_PIN(f) (f == 0 ? 11 : -1)
-#define AF_EBI_CS3_PIN(f) (f == 0 ? 12 : -1)
-#define AF_EBI_WEn_PIN(f) (f == 0 ? 4 : -1)
-#define AF_EBI_REn_PIN(f) (f == 0 ? 5 : -1)
-#define AF_EBI_ARDY_PIN(f) (f == 0 ? 2 : -1)
-#define AF_EBI_ALE_PIN(f) (f == 0 ? 3 : -1)
-#define AF_TIMER0_CC0_PIN(f) (f == 0 ? 0 : f == 1 ? 0 : f == 2 ? 6 : f == 3 ? 1 : -1)
-#define AF_TIMER0_CC1_PIN(f) (f == 0 ? 1 : f == 1 ? 1 : f == 2 ? 7 : f == 3 ? 2 : -1)
-#define AF_TIMER0_CC2_PIN(f) (f == 0 ? 2 : f == 1 ? 2 : f == 2 ? 8 : f == 3 ? 3 : -1)
-#define AF_TIMER0_CCC0_PIN(f) (f == 0 ? 3 : f == 1 ? 13 : f == 2 ? 3 : f == 3 ? 13 : -1)
-#define AF_TIMER0_CCC1_PIN(f) (f == 0 ? 4 : f == 1 ? 14 : f == 2 ? 4 : f == 3 ? 14 : -1)
-#define AF_TIMER0_CCC2_PIN(f) (f == 0 ? 5 : f == 1 ? 15 : f == 2 ? 5 : f == 3 ? 15 : -1)
-#define AF_TIMER1_CC0_PIN(f) (f == 0 ? 13 : f == 1 ? 10 : f == 2 ? 0 : -1)
-#define AF_TIMER1_CC1_PIN(f) (f == 0 ? 14 : f == 1 ? 11 : f == 2 ? 1 : -1)
-#define AF_TIMER1_CC2_PIN(f) (f == 0 ? 15 : f == 1 ? 12 : f == 2 ? 2 : -1)
-#define AF_TIMER1_CCC0_PIN(f) (-1)
-#define AF_TIMER1_CCC1_PIN(f) (-1)
-#define AF_TIMER1_CCC2_PIN(f) (-1)
-#define AF_TIMER2_CC0_PIN(f) (f == 0 ? 8 : f == 1 ? 12 : f == 2 ? 8 : -1)
-#define AF_TIMER2_CC1_PIN(f) (f == 0 ? 9 : f == 1 ? 13 : f == 2 ? 9 : -1)
-#define AF_TIMER2_CC2_PIN(f) (f == 0 ? 10 : f == 1 ? 14 : f == 2 ? 10 : -1)
-#define AF_TIMER2_CCC0_PIN(f) (-1)
-#define AF_TIMER2_CCC1_PIN(f) (-1)
-#define AF_TIMER2_CCC2_PIN(f) (-1)
-#define AF_USART0_TX_PIN(f) (f == 0 ? 10 : f == 1 ? 7 : f == 2 ? 11 : -1)
-#define AF_USART0_RX_PIN(f) (f == 0 ? 11 : f == 1 ? 6 : f == 2 ? 10 : -1)
-#define AF_USART0_CLK_PIN(f) (f == 0 ? 12 : f == 1 ? 5 : f == 2 ? 9 : -1)
-#define AF_USART0_CS_PIN(f) (f == 0 ? 13 : f == 1 ? 4 : f == 2 ? 8 : -1)
-#define AF_USART1_TX_PIN(f) (f == 0 ? 0 : f == 1 ? 0 : -1)
-#define AF_USART1_RX_PIN(f) (f == 0 ? 1 : f == 1 ? 1 : -1)
-#define AF_USART1_CLK_PIN(f) (f == 0 ? 7 : f == 1 ? 2 : -1)
-#define AF_USART1_CS_PIN(f) (f == 0 ? 8 : f == 1 ? 3 : -1)
-#define AF_USART2_TX_PIN(f) (f == 0 ? 2 : f == 1 ? 3 : -1)
-#define AF_USART2_RX_PIN(f) (f == 0 ? 3 : f == 1 ? 4 : -1)
-#define AF_USART2_CLK_PIN(f) (f == 0 ? 4 : f == 1 ? 5 : -1)
-#define AF_USART2_CS_PIN(f) (f == 0 ? 5 : f == 1 ? 6 : -1)
-#define AF_UART0_TX_PIN(f) (f == 0 ? 6 : f == 1 ? 0 : f == 2 ? 3 : f == 3 ? 14 : -1)
-#define AF_UART0_RX_PIN(f) (f == 0 ? 7 : f == 1 ? 1 : f == 2 ? 4 : f == 3 ? 15 : -1)
-#define AF_UART0_CLK_PIN(f) (-1)
-#define AF_UART0_CS_PIN(f) (-1)
-#define AF_LEUART0_TX_PIN(f) (f == 0 ? 4 : f == 1 ? 13 : f == 2 ? 14 : -1)
-#define AF_LEUART0_RX_PIN(f) (f == 0 ? 5 : f == 1 ? 14 : f == 2 ? 15 : -1)
-#define AF_LEUART1_TX_PIN(f) (f == 0 ? 6 : f == 1 ? 5 : -1)
-#define AF_LEUART1_RX_PIN(f) (f == 0 ? 7 : f == 1 ? 6 : -1)
-#define AF_LETIMER0_OUT0_PIN(f) (f == 0 ? 6 : f == 1 ? 11 : f == 2 ? 0 : f == 3 ? 4 : -1)
-#define AF_LETIMER0_OUT1_PIN(f) (f == 0 ? 7 : f == 1 ? 12 : f == 2 ? 1 : f == 3 ? 5 : -1)
-#define AF_PCNT0_S0IN_PIN(f) (f == 0 ? 13 : f == 1 ? 0 : f == 2 ? 0 : -1)
-#define AF_PCNT0_S1IN_PIN(f) (f == 0 ? 14 : f == 1 ? 1 : f == 2 ? 1 : -1)
-#define AF_PCNT1_S0IN_PIN(f) (f == 0 ? 4 : f == 1 ? 3 : -1)
-#define AF_PCNT1_S1IN_PIN(f) (f == 0 ? 5 : f == 1 ? 4 : -1)
-#define AF_PCNT2_S0IN_PIN(f) (f == 0 ? 0 : f == 1 ? 8 : -1)
-#define AF_PCNT2_S1IN_PIN(f) (f == 0 ? 1 : f == 1 ? 9 : -1)
-#define AF_I2C0_SDA_PIN(f) (f == 0 ? 0 : f == 1 ? 6 : f == 2 ? 6 : f == 3 ? 14 : -1)
-#define AF_I2C0_SCL_PIN(f) (f == 0 ? 1 : f == 1 ? 7 : f == 2 ? 7 : f == 3 ? 15 : -1)
-#define AF_ACMP0_OUT_PIN(f) (f == 0 ? 13 : f == 1 ? 2 : -1)
-#define AF_ACMP1_OUT_PIN(f) (f == 0 ? 2 : f == 1 ? 3 : -1)
-#define AF_DBG_SWV_PIN(f) (f == 0 ? 2 : f == 1 ? 15 : -1)
-#define AF_DBG_SWDITMS_PIN(f) (f == 0 ? 1 : f == 1 ? 1 : -1)
-#define AF_DBG_SWCLKTCK_PIN(f) (f == 0 ? 0 : f == 1 ? 0 : -1)
-
-/**
- * @}
- */
-
-/** Grouped by channel c, function f */
-#define AF_PORT(c, f) ( \
- c == 0 ? AF_CMU_CLKOUT0_PORT(f) : \
- c == 1 ? AF_CMU_CLKOUT1_PORT(f) : \
- c == 2 ? AF_EBI_ADDRDAT00_PORT(f) : \
- c == 3 ? AF_EBI_ADDRDAT01_PORT(f) : \
- c == 4 ? AF_EBI_ADDRDAT02_PORT(f) : \
- c == 5 ? AF_EBI_ADDRDAT03_PORT(f) : \
- c == 6 ? AF_EBI_ADDRDAT04_PORT(f) : \
- c == 7 ? AF_EBI_ADDRDAT05_PORT(f) : \
- c == 8 ? AF_EBI_ADDRDAT06_PORT(f) : \
- c == 9 ? AF_EBI_ADDRDAT07_PORT(f) : \
- c == 10 ? AF_EBI_ADDRDAT08_PORT(f) : \
- c == 11 ? AF_EBI_ADDRDAT09_PORT(f) : \
- c == 12 ? AF_EBI_ADDRDAT10_PORT(f) : \
- c == 13 ? AF_EBI_ADDRDAT11_PORT(f) : \
- c == 14 ? AF_EBI_ADDRDAT12_PORT(f) : \
- c == 15 ? AF_EBI_ADDRDAT13_PORT(f) : \
- c == 16 ? AF_EBI_ADDRDAT14_PORT(f) : \
- c == 17 ? AF_EBI_ADDRDAT15_PORT(f) : \
- c == 18 ? AF_EBI_CS0_PORT(f) : \
- c == 19 ? AF_EBI_CS1_PORT(f) : \
- c == 20 ? AF_EBI_CS2_PORT(f) : \
- c == 21 ? AF_EBI_CS3_PORT(f) : \
- c == 22 ? AF_EBI_WEn_PORT(f) : \
- c == 23 ? AF_EBI_REn_PORT(f) : \
- c == 24 ? AF_EBI_ARDY_PORT(f) : \
- c == 25 ? AF_EBI_ALE_PORT(f) : \
- c == 26 ? AF_TIMER0_CC0_PORT(f) : \
- c == 27 ? AF_TIMER0_CC1_PORT(f) : \
- c == 28 ? AF_TIMER0_CC2_PORT(f) : \
- c == 29 ? AF_TIMER0_CCC0_PORT(f) : \
- c == 30 ? AF_TIMER0_CCC1_PORT(f) : \
- c == 31 ? AF_TIMER0_CCC2_PORT(f) : \
- c == 32 ? AF_TIMER1_CC0_PORT(f) : \
- c == 33 ? AF_TIMER1_CC1_PORT(f) : \
- c == 34 ? AF_TIMER1_CC2_PORT(f) : \
- c == 35 ? AF_TIMER1_CCC0_PORT(f) : \
- c == 36 ? AF_TIMER1_CCC1_PORT(f) : \
- c == 37 ? AF_TIMER1_CCC2_PORT(f) : \
- c == 38 ? AF_TIMER2_CC0_PORT(f) : \
- c == 39 ? AF_TIMER2_CC1_PORT(f) : \
- c == 40 ? AF_TIMER2_CC2_PORT(f) : \
- c == 41 ? AF_TIMER2_CCC0_PORT(f) : \
- c == 42 ? AF_TIMER2_CCC1_PORT(f) : \
- c == 43 ? AF_TIMER2_CCC2_PORT(f) : \
- c == 44 ? AF_USART0_TX_PORT(f) : \
- c == 45 ? AF_USART0_RX_PORT(f) : \
- c == 46 ? AF_USART0_CLK_PORT(f) : \
- c == 47 ? AF_USART0_CS_PORT(f) : \
- c == 48 ? AF_USART1_TX_PORT(f) : \
- c == 49 ? AF_USART1_RX_PORT(f) : \
- c == 50 ? AF_USART1_CLK_PORT(f) : \
- c == 51 ? AF_USART1_CS_PORT(f) : \
- c == 52 ? AF_USART2_TX_PORT(f) : \
- c == 53 ? AF_USART2_RX_PORT(f) : \
- c == 54 ? AF_USART2_CLK_PORT(f) : \
- c == 55 ? AF_USART2_CS_PORT(f) : \
- c == 56 ? AF_UART0_TX_PORT(f) : \
- c == 57 ? AF_UART0_RX_PORT(f) : \
- c == 58 ? AF_UART0_CLK_PORT(f) : \
- c == 59 ? AF_UART0_CS_PORT(f) : \
- c == 60 ? AF_LEUART0_TX_PORT(f) : \
- c == 61 ? AF_LEUART0_RX_PORT(f) : \
- c == 62 ? AF_LEUART1_TX_PORT(f) : \
- c == 63 ? AF_LEUART1_RX_PORT(f) : \
- c == 64 ? AF_LETIMER0_OUT0_PORT(f) : \
- c == 65 ? AF_LETIMER0_OUT1_PORT(f) : \
- c == 66 ? AF_PCNT0_S0IN_PORT(f) : \
- c == 67 ? AF_PCNT0_S1IN_PORT(f) : \
- c == 68 ? AF_PCNT1_S0IN_PORT(f) : \
- c == 69 ? AF_PCNT1_S1IN_PORT(f) : \
- c == 70 ? AF_PCNT2_S0IN_PORT(f) : \
- c == 71 ? AF_PCNT2_S1IN_PORT(f) : \
- c == 72 ? AF_I2C0_SDA_PORT(f) : \
- c == 73 ? AF_I2C0_SCL_PORT(f) : \
- c == 74 ? AF_ACMP0_OUT_PORT(f) : \
- c == 75 ? AF_ACMP1_OUT_PORT(f) : \
- c == 76 ? AF_DBG_SWV_PORT(f) : \
- c == 77 ? AF_DBG_SWDITMS_PORT(f) : \
- c == 78 ? AF_DBG_SWCLKTCK_PORT(f) : \
- -1)
-
-#define AF_PIN(c, f) ( \
- c == 0 ? AF_CMU_CLKOUT0_PIN(f) : \
- c == 1 ? AF_CMU_CLKOUT1_PIN(f) : \
- c == 2 ? AF_EBI_ADDRDAT00_PIN(f) : \
- c == 3 ? AF_EBI_ADDRDAT01_PIN(f) : \
- c == 4 ? AF_EBI_ADDRDAT02_PIN(f) : \
- c == 5 ? AF_EBI_ADDRDAT03_PIN(f) : \
- c == 6 ? AF_EBI_ADDRDAT04_PIN(f) : \
- c == 7 ? AF_EBI_ADDRDAT05_PIN(f) : \
- c == 8 ? AF_EBI_ADDRDAT06_PIN(f) : \
- c == 9 ? AF_EBI_ADDRDAT07_PIN(f) : \
- c == 10 ? AF_EBI_ADDRDAT08_PIN(f) : \
- c == 11 ? AF_EBI_ADDRDAT09_PIN(f) : \
- c == 12 ? AF_EBI_ADDRDAT10_PIN(f) : \
- c == 13 ? AF_EBI_ADDRDAT11_PIN(f) : \
- c == 14 ? AF_EBI_ADDRDAT12_PIN(f) : \
- c == 15 ? AF_EBI_ADDRDAT13_PIN(f) : \
- c == 16 ? AF_EBI_ADDRDAT14_PIN(f) : \
- c == 17 ? AF_EBI_ADDRDAT15_PIN(f) : \
- c == 18 ? AF_EBI_CS0_PIN(f) : \
- c == 19 ? AF_EBI_CS1_PIN(f) : \
- c == 20 ? AF_EBI_CS2_PIN(f) : \
- c == 21 ? AF_EBI_CS3_PIN(f) : \
- c == 22 ? AF_EBI_WEn_PIN(f) : \
- c == 23 ? AF_EBI_REn_PIN(f) : \
- c == 24 ? AF_EBI_ARDY_PIN(f) : \
- c == 25 ? AF_EBI_ALE_PIN(f) : \
- c == 26 ? AF_TIMER0_CC0_PIN(f) : \
- c == 27 ? AF_TIMER0_CC1_PIN(f) : \
- c == 28 ? AF_TIMER0_CC2_PIN(f) : \
- c == 29 ? AF_TIMER0_CCC0_PIN(f) : \
- c == 30 ? AF_TIMER0_CCC1_PIN(f) : \
- c == 31 ? AF_TIMER0_CCC2_PIN(f) : \
- c == 32 ? AF_TIMER1_CC0_PIN(f) : \
- c == 33 ? AF_TIMER1_CC1_PIN(f) : \
- c == 34 ? AF_TIMER1_CC2_PIN(f) : \
- c == 35 ? AF_TIMER1_CCC0_PIN(f) : \
- c == 36 ? AF_TIMER1_CCC1_PIN(f) : \
- c == 37 ? AF_TIMER1_CCC2_PIN(f) : \
- c == 38 ? AF_TIMER2_CC0_PIN(f) : \
- c == 39 ? AF_TIMER2_CC1_PIN(f) : \
- c == 40 ? AF_TIMER2_CC2_PIN(f) : \
- c == 41 ? AF_TIMER2_CCC0_PIN(f) : \
- c == 42 ? AF_TIMER2_CCC1_PIN(f) : \
- c == 43 ? AF_TIMER2_CCC2_PIN(f) : \
- c == 44 ? AF_USART0_TX_PIN(f) : \
- c == 45 ? AF_USART0_RX_PIN(f) : \
- c == 46 ? AF_USART0_CLK_PIN(f) : \
- c == 47 ? AF_USART0_CS_PIN(f) : \
- c == 48 ? AF_USART1_TX_PIN(f) : \
- c == 49 ? AF_USART1_RX_PIN(f) : \
- c == 50 ? AF_USART1_CLK_PIN(f) : \
- c == 51 ? AF_USART1_CS_PIN(f) : \
- c == 52 ? AF_USART2_TX_PIN(f) : \
- c == 53 ? AF_USART2_RX_PIN(f) : \
- c == 54 ? AF_USART2_CLK_PIN(f) : \
- c == 55 ? AF_USART2_CS_PIN(f) : \
- c == 56 ? AF_UART0_TX_PIN(f) : \
- c == 57 ? AF_UART0_RX_PIN(f) : \
- c == 58 ? AF_UART0_CLK_PIN(f) : \
- c == 59 ? AF_UART0_CS_PIN(f) : \
- c == 60 ? AF_LEUART0_TX_PIN(f) : \
- c == 61 ? AF_LEUART0_RX_PIN(f) : \
- c == 62 ? AF_LEUART1_TX_PIN(f) : \
- c == 63 ? AF_LEUART1_RX_PIN(f) : \
- c == 64 ? AF_LETIMER0_OUT0_PIN(f) : \
- c == 65 ? AF_LETIMER0_OUT1_PIN(f) : \
- c == 66 ? AF_PCNT0_S0IN_PIN(f) : \
- c == 67 ? AF_PCNT0_S1IN_PIN(f) : \
- c == 68 ? AF_PCNT1_S0IN_PIN(f) : \
- c == 69 ? AF_PCNT1_S1IN_PIN(f) : \
- c == 70 ? AF_PCNT2_S0IN_PIN(f) : \
- c == 71 ? AF_PCNT2_S1IN_PIN(f) : \
- c == 72 ? AF_I2C0_SDA_PIN(f) : \
- c == 73 ? AF_I2C0_SCL_PIN(f) : \
- c == 74 ? AF_ACMP0_OUT_PIN(f) : \
- c == 75 ? AF_ACMP1_OUT_PIN(f) : \
- c == 76 ? AF_DBG_SWV_PIN(f) : \
- c == 77 ? AF_DBG_SWDITMS_PIN(f) : \
- c == 78 ? AF_DBG_SWCLKTCK_PIN(f) : \
- -1)
-
-/** AF channel output count for channel c */
-#define AF_COUNT(c) ( \
- c == 0 ? 2 : \
- c == 1 ? 2 : \
- c == 2 ? 1 : \
- c == 3 ? 1 : \
- c == 4 ? 1 : \
- c == 5 ? 1 : \
- c == 6 ? 1 : \
- c == 7 ? 1 : \
- c == 8 ? 1 : \
- c == 9 ? 1 : \
- c == 10 ? 1 : \
- c == 11 ? 1 : \
- c == 12 ? 1 : \
- c == 13 ? 1 : \
- c == 14 ? 1 : \
- c == 15 ? 1 : \
- c == 16 ? 1 : \
- c == 17 ? 1 : \
- c == 18 ? 1 : \
- c == 19 ? 1 : \
- c == 20 ? 1 : \
- c == 21 ? 1 : \
- c == 22 ? 1 : \
- c == 23 ? 1 : \
- c == 24 ? 1 : \
- c == 25 ? 1 : \
- c == 26 ? 4 : \
- c == 27 ? 4 : \
- c == 28 ? 4 : \
- c == 29 ? 4 : \
- c == 30 ? 4 : \
- c == 31 ? 4 : \
- c == 32 ? 3 : \
- c == 33 ? 3 : \
- c == 34 ? 3 : \
- c == 35 ? 0 : \
- c == 36 ? 0 : \
- c == 37 ? 0 : \
- c == 38 ? 3 : \
- c == 39 ? 3 : \
- c == 40 ? 3 : \
- c == 41 ? 0 : \
- c == 42 ? 0 : \
- c == 43 ? 0 : \
- c == 44 ? 3 : \
- c == 45 ? 3 : \
- c == 46 ? 3 : \
- c == 47 ? 3 : \
- c == 48 ? 2 : \
- c == 49 ? 2 : \
- c == 50 ? 2 : \
- c == 51 ? 2 : \
- c == 52 ? 2 : \
- c == 53 ? 2 : \
- c == 54 ? 2 : \
- c == 55 ? 2 : \
- c == 56 ? 4 : \
- c == 57 ? 4 : \
- c == 58 ? 0 : \
- c == 59 ? 0 : \
- c == 60 ? 3 : \
- c == 61 ? 3 : \
- c == 62 ? 2 : \
- c == 63 ? 2 : \
- c == 64 ? 4 : \
- c == 65 ? 4 : \
- c == 66 ? 3 : \
- c == 67 ? 3 : \
- c == 68 ? 2 : \
- c == 69 ? 2 : \
- c == 70 ? 2 : \
- c == 71 ? 2 : \
- c == 72 ? 4 : \
- c == 73 ? 4 : \
- c == 74 ? 2 : \
- c == 75 ? 2 : \
- c == 76 ? 2 : \
- c == 77 ? 2 : \
- c == 78 ? 2 : \
- -1)
-
-#endif
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @brief Set the value of a bit field within a register.
- *
- * @param REG
- * The register to update
- * @param MASK
- * The mask for the bit field to update
- * @param VALUE
- * The value to write to the bit field
- * @param OFFSET
- * The number of bits that the field is offset within the register.
- * 0 (zero) means LSB.
- */
-#define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \
- REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
-
-/**
- * @}
- */
-
-/**
- * @}
- */
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.c
deleted file mode 100644
index a5bbf09e67..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices
- *
- * @author Energy Micro AS
- * @version 1.0.2
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include <stdint.h>
-#include "efm32.h"
-
-uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
-
-#ifndef EFM32_HFXO_FREQ
-#define EFM32_HFXO_FREQ 32000000
-#endif
-#ifndef EFM32_LFXO_FREQ
-#define EFM32_LFXO_FREQ 32768
-#endif
-#ifndef EFM32_LFRCO_FREQ
-#define EFM32_LFRCO_FREQ 32768
-#endif
-
-/**************************************************************************//**
- * @brief Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- *****************************************************************************/
-void SystemInit(void)
-{
-#if EFM32_AUXHFROCO_ENABLE
- CMU_TypeDef *cmu = CMU;
-
- /* Enable clocks to debug modules in Cortex */
- /* This will enable Debug Trace and MSC Flash programming clocks */
- cmu->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
-#endif
-}
-
-/**************************************************************************//**
- * @brief Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- *****************************************************************************/
-void SystemCoreClockUpdate(void)
-{
- CMU_TypeDef *cmu = CMU;
- uint32_t inputClock;
-
- /* Check source for core clock */
- switch (cmu->STATUS &
- (CMU_STATUS_HFRCOSEL |
- CMU_STATUS_HFXOSEL |
- CMU_STATUS_LFRCOSEL |
- CMU_STATUS_LFXOSEL))
- {
- case CMU_STATUS_HFXOSEL:
- inputClock = EFM32_HFXO_FREQ;
- break;
- case CMU_STATUS_LFRCOSEL:
- inputClock = EFM32_LFRCO_FREQ;
- break;
- case CMU_STATUS_LFXOSEL:
- inputClock = EFM32_LFXO_FREQ;
- break;
- case CMU_STATUS_HFRCOSEL:
- default:
- switch ((cmu->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) >> _CMU_HFRCOCTRL_BAND_SHIFT)
- {
- case _CMU_HFRCOCTRL_BAND_28MHZ:
- inputClock = 28000000;
- break;
- case _CMU_HFRCOCTRL_BAND_21MHZ:
- inputClock = 21000000;
- break;
- case _CMU_HFRCOCTRL_BAND_14MHZ:
- inputClock = 14000000;
- break;
- case _CMU_HFRCOCTRL_BAND_11MHZ:
- inputClock = 11000000;
- break;
- case _CMU_HFRCOCTRL_BAND_7MHZ:
- inputClock = 7000000;
- break;
- case _CMU_HFRCOCTRL_BAND_1MHZ:
- inputClock = 1500000;
- break;
- default:
- inputClock = 0;
- break;
- }
- break;
- }
- /* Adjust according to clock divisor */
- SystemCoreClock = inputClock / (1<<((cmu->HFCORECLKDIV & _CMU_HFCORECLKDIV_MASK)>>_CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT));
-}
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.h
deleted file mode 100644
index 5421f5dcad..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices
- *
- * @author Energy Micro AS
- * @version 1.0.2
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __SYSTEM_EFM32_H
-#define __SYSTEM_EFM32_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-extern uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
-
-/**************************************************************************//**
- * @brief Initialize the system
- *
- * @param none
- * @return none
- *
- * @brief Setup the microcontroller system.
- * Initialize the System and update the SystemCoreClock variable.
- *****************************************************************************/
-extern void SystemInit(void);
-
-/**************************************************************************//**
- * @brief Update SystemCoreClock variable
- *
- * @param none
- * @return none
- *
- * @brief Updates the SystemCoreClock with current core Clock
- * retrieved from cpu registers.
- *****************************************************************************/
-extern void SystemCoreClockUpdate(void);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS changes.htm b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS changes.htm
deleted file mode 100644
index 162ffcc9dc..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS changes.htm
+++ /dev/null
@@ -1,320 +0,0 @@
-<html>
-
-<head>
-<title>CMSIS Changes</title>
-<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
-<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
-<meta name="ProgId" content="FrontPage.Editor.Document">
-<style>
-<!--
-/*-----------------------------------------------------------
-Keil Software CHM Style Sheet
------------------------------------------------------------*/
-body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
- Verdana, Arial, 'Sans Serif' }
-a:link { color: #0000FF; text-decoration: underline }
-a:visited { color: #0000FF; text-decoration: underline }
-a:active { color: #FF0000; text-decoration: underline }
-a:hover { color: #FF0000; text-decoration: underline }
-h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
- text-align: Center; margin-right: 3 }
-h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
- background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
- padding: 6 }
-h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
- #CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
-pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
- margin-left: 24; margin-right: 24 }
-ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
-ol { margin-top: 6pt; margin-bottom: 0 }
-li { clear: both; margin-bottom: 6pt }
-table { font-size: 100%; border-width: 0; padding: 0 }
-th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
- bottom; padding-right: 6pt }
-tr { text-align: left; vertical-align: top }
-td { text-align: left; vertical-align: top; padding-right: 6pt }
-.ToolT { font-size: 8pt; color: #808080 }
-.TinyT { font-size: 8pt; text-align: Center }
-code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
- line-height: 120%; font-style: normal }
-/*-----------------------------------------------------------
-Notes
------------------------------------------------------------*/
-p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
-/*-----------------------------------------------------------
-Expanding/Contracting Divisions
------------------------------------------------------------*/
-#expand { text-decoration: none; margin-bottom: 3pt }
-img.expand { border-style: none; border-width: medium }
-div.expand { display: none; margin-left: 9pt; margin-top: 0 }
-/*-----------------------------------------------------------
-Where List Tags
------------------------------------------------------------*/
-p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
-table.wh { width: 100% }
-td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
- 6pt }
-td.whDesc { padding-bottom: 6pt }
-/*-----------------------------------------------------------
-Keil Table Tags
------------------------------------------------------------*/
-table.kt { border: 1pt solid #000000 }
-th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
- padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
-tr.kt { }
-td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
- padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
- padding-bottom: 2pt }
-/*-----------------------------------------------------------
------------------------------------------------------------*/
--->
-
-</style>
-</head>
-
-<body>
-
-<h1>Changes to CMSIS version V1.20</h1>
-
-<hr>
-
-<h2>1. Removed CMSIS Middelware packages</h2>
-<p>
- CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
-</p>
-
-<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
-<p>
- The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
- because the variable holds the clock value at which the core is running.
-</p>
-
-<h2>3. Changed startup concept</h2>
-<p>
- The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
- from main) has the weakness that it does not work for controllers which need a already
- configuerd clock system to configure the external memory controller.
-</p>
-
-<h3>Changed startup concept</h3>
-<ul>
- <li>
- SystemInit() is called from startup file before <strong>premain</strong>.
- </li>
- <li>
- <strong>SystemInit()</strong> configures the clock system and also configures
- an existing external memory controller.
- </li>
- <li>
- <strong>SystemInit()</strong> must not use global variables.
- </li>
- <li>
- <strong>SystemCoreClock</strong> is initialized with a correct predefined value.
- </li>
- <li>
- Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
- <strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
- and must be called whenever the core clock is changed.<br>
- <strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
- the current core clock.
- </li>
-</ul>
-
-
-<h2>4. Advanced Debug Functions</h2>
-<p>
- ITM communication channel is only capable for OUT direction. To allow also communication for
- IN direction a simple concept is provided.
-</p>
-<ul>
- <li>
- Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
- </li>
- <li>
- Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
- </li>
- <li>
- Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
- </li>
-</ul>
-
-<p>
- For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
-</p>
-
-
-<h2>5. Core Register Bit Definitions</h2>
-<p>
- Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
- defines correspond with the Cortex-M Technical Reference Manual.
-</p>
-<p>
- e.g. SysTick structure with bit definitions
-</p>
-<pre>
-/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
- memory mapped structure for SysTick
- @{
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
-
-<h2>7. DoxyGen Tags</h2>
-<p>
- DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
- using DoxyGen.
-</p>
-
-<h2>8. Folder Structure</h2>
-<p>
- The folder structure is changed to differentiate the single support packages.
-</p>
-
- <ul>
- <li>CM0</li>
- <li>CM3
- <ul>
- <li>CoreSupport</li>
- <li>DeviceSupport</li>
- <ul>
- <li>Vendor
- <ul>
- <li>Device
- <ul>
- <li>Startup
- <ul>
- <li>Toolchain</li>
- <li>Toolchain</li>
- <li>...</li>
- </ul>
- </li>
- </ul>
- </li>
- <li>Device</li>
- <li>...</li>
- </ul>
- </li>
- <li>Vendor</li>
- <li>...</li>
- </ul>
- </li>
- <li>Example
- <ul>
- <li>Toolchain
- <ul>
- <li>Device</li>
- <li>Device</li>
- <li>...</li>
- </ul>
- </li>
- <li>Toolchain</li>
- <li>...</li>
- </ul>
- </li>
- </ul>
- </li>
-
- <li>Documentation</li>
- </ul>
-
-<h2>9. Open Points</h2>
-<p>
- Following points need to be clarified and solved:
-</p>
-<ul>
- <li>
- <p>
- Equivalent C and Assembler startup files.
- </p>
- <p>
- Is there a need for having C startup files although assembler startup files are
- very efficient and do not need to be changed?
- <p/>
- </li>
- <li>
- <p>
- Placing of HEAP in external RAM.
- </p>
- <p>
- It must be possible to place HEAP in external RAM if the device supports an
- external memory controller.
- </p>
- </li>
- <li>
- <p>
- Placing of STACK /HEAP.
- </p>
- <p>
- STACK should always be placed at the end of internal RAM.
- </p>
- <p>
- If HEAP is placed in internal RAM than it should be placed after RW ZI section.
- </p>
- </li>
- <li>
- <p>
- Removing core_cm3.c and core_cm0.c.
- </p>
- <p>
- On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
- appropriate compiler intrinsics.
- </p>
- </li>
-</ul>
-
-
-<h2>10. Limitations</h2>
-<p>
- The following limitations are not covered with the current CMSIS version:
-</p>
-<ul>
- <li>
- No <strong>C startup files</strong> for ARM toolchain are provided.
- </li>
- <li>
- No <strong>C startup files</strong> for GNU toolchain are provided.
- </li>
- <li>
- No <strong>C startup files</strong> for IAR toolchain are provided.
- </li>
- <li>
- No <strong>Tasking</strong> projects are provided yet.
- </li>
-</ul>
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS debug support.htm b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS debug support.htm
deleted file mode 100644
index efda685be6..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/CMSIS debug support.htm
+++ /dev/null
@@ -1,243 +0,0 @@
-<html>
-
-<head>
-<title>CMSIS Debug Support</title>
-<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
-<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
-<meta name="ProgId" content="FrontPage.Editor.Document">
-<style>
-<!--
-/*-----------------------------------------------------------
-Keil Software CHM Style Sheet
------------------------------------------------------------*/
-body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
- Verdana, Arial, 'Sans Serif' }
-a:link { color: #0000FF; text-decoration: underline }
-a:visited { color: #0000FF; text-decoration: underline }
-a:active { color: #FF0000; text-decoration: underline }
-a:hover { color: #FF0000; text-decoration: underline }
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- background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
- padding: 6 }
-h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
- #CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
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- margin-left: 24; margin-right: 24 }
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- line-height: 120%; font-style: normal }
-/*-----------------------------------------------------------
-Notes
------------------------------------------------------------*/
-p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
-/*-----------------------------------------------------------
-Expanding/Contracting Divisions
------------------------------------------------------------*/
-#expand { text-decoration: none; margin-bottom: 3pt }
-img.expand { border-style: none; border-width: medium }
-div.expand { display: none; margin-left: 9pt; margin-top: 0 }
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-table.wh { width: 100% }
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- 6pt }
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-td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
- padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
- padding-bottom: 2pt }
-/*-----------------------------------------------------------
------------------------------------------------------------*/
--->
-
-</style>
-</head>
-
-<body>
-
-<h1>CMSIS Debug Support</h1>
-
-<hr>
-
-<h2>Cortex-M3 ITM Debug Access</h2>
-<p>
- The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
- the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
- 32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
- communication channels are used by CMSIS to output the following information:
-</p>
-<ul>
- <li>ITM Channel 0: used for printf-style output via the debug interface.</li>
- <li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
-</ul>
-
-<h2>Debug IN / OUT functions</h2>
-<p>CMSIS provides following debug functions:</p>
-<ul>
- <li>ITM_SendChar (uses ITM channel 0)</li>
- <li>ITM_ReceiveChar (uses global variable)</li>
- <li>ITM_CheckChar (uses global variable)</li>
-</ul>
-
-<h3>ITM_SendChar</h3>
-<p>
- <strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
- the microcontroller system to the debug system. <br>
- Only a 8 bit value is transmitted.
-</p>
-<pre>
-static __INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- /* check if debugger connected and ITM channel enabled for tracing */
- if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
- (ITM->TCR & ITM_TCR_ITMENA) &&
- (ITM->TER & (1UL << 0)) )
- {
- while (ITM->PORT[0].u32 == 0);
- ITM->PORT[0].u8 = (uint8_t)ch;
- }
- return (ch);
-}</pre>
-
-<h3>ITM_ReceiveChar</h3>
-<p>
- ITM communication channel is only capable for OUT direction. For IN direction
- a globel variable is used. A simple mechansim detects if a character is received.
- The project to test need to be build with debug information.
-</p>
-
-<p>
- The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
- to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
-</p>
-<pre>
-extern volatile int ITM_RxBuffer; /* variable to receive characters */
-</pre>
-<p>
- A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
- or contains a valid value.
-</p>
-<pre>
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
-</pre>
-<p>
- <strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
- It returns the received character or '-1' if no character was available.
-</p>
-<pre>
-static __INLINE int ITM_ReceiveChar (void) {
- int ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-</pre>
-
-<h3>ITM_CheckChar</h3>
-<p>
- <strong>ITM_CheckChar</strong> is used to check if a character is received.
-</p>
-<pre>
-static __INLINE int ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}</pre>
-
-
-<h2>ITM Debug Support in uVision</h2>
-<p>
- uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
- display the debug data.
-</p>
-<p>Direction microcontroller system -> uVision:</p>
-<ul>
- <li>
- Characters received via ITM communication channel 0 are written in a printf style
- to <strong>Debug (printf) Viewer</strong> window.
- </li>
-</ul>
-
-<p>Direction uVision -> microcontroller system:</p>
-<ul>
- <li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
- <li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
- <li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
-</ul>
-
-<p class="Note">Note</p>
-<ul>
- <li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
- </li>
-</ul>
-
-<h2>RTX Kernel awareness in uVision</h2>
-<p>
- uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
- No format overhead is necessary.<br>
- uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
- to ITM communication channel 31.
-</p>
-
-<p>Following RTX events are traced:</p>
-<ul>
- <li>Task Create / Delete event
- <ol>
- <li>32 bit access. Task start address is transmitted</li>
- <li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
- High byte holds Create/Delete flag, Low byte holds TASK ID.
- </li>
- </ol>
- </li>
- <li>Task switch event
- <ol>
- <li>8 bit access. Task ID of current task is transmitted</li>
- </ol>
- </li>
-</ul>
-
-<p class="Note">Note</p>
-<ul>
- <li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
- </li>
-</ul>
-
-
-<p class="MsoNormal"><span lang="EN-GB"> </span></p>
-
-<hr>
-
-<p class="TinyT">Copyright � KEIL - An ARM Company.<br>
-All rights reserved.<br>
-Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
-</p>
-
-</body>
-
-</html>
\ No newline at end of file
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- </style></head>
-<body>
-<h1>Cortex Microcontroller Software Interface Standard</h1>
-
-<p align="center">This file describes the Cortex Microcontroller Software Interface Standard (CMSIS).</p>
-<p align="center">Version: 1.30 - 30. October 2009</p>
-
-<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
- Copyright � ARM Ltd.<br>All rights reserved.
-</p>
-
-<hr>
-
-<p><span style="FONT-WEIGHT: bold">Revision History</span></p>
-<ul>
- <li>Version 1.00: initial release. </li>
- <li>Version 1.01: added __LDREX<em>x</em>, __STREX<em>x</em>, and __CLREX.</li>
- <li>Version 1.02: added Cortex-M0. </li>
- <li>Version 1.10: second review. </li>
- <li>Version 1.20: third review. </li>
- <li>Version 1.30 PRE-RELEASE: reworked Startup Concept, additional Debug Functionality.</li>
- <li>Version 1.30 2nd PRE-RELEASE: changed folder structure, added doxyGen comments, added Bit definitions.</li>
- <li>Version 1.30: updated Device Support Packages.</li>
-</ul>
-
-<hr>
-
-<h2>Contents</h2>
-
-<ol>
- <li class="LI2"><a href="#1">About</a></li>
- <li class="LI2"><a href="#2">Coding Rules and Conventions</a></li>
- <li class="LI2"><a href="#3">CMSIS Files</a></li>
- <li class="LI2"><a href="#4">Core Peripheral Access Layer</a></li>
- <li class="LI2"><a href="#5">CMSIS Example</a></li>
-</ol>
-
-<h2><a name="1"></a>About</h2>
-
-<p>
- The <strong>Cortex Microcontroller Software Interface Standard (CMSIS)</strong> answers the challenges
- that are faced when software components are deployed to physical microcontroller devices based on a
- Cortex-M0 or Cortex-M3 processor. The CMSIS will be also expanded to future Cortex-M
- processor cores (the term Cortex-M is used to indicate that). The CMSIS is defined in close co-operation
- with various silicon and software vendors and provides a common approach to interface to peripherals,
- real-time operating systems, and middleware components.
-</p>
-
-<p>ARM provides as part of the CMSIS the following software layers that are
-available for various compiler implementations:</p>
-<ul>
- <li><strong>Core Peripheral Access Layer</strong>: contains name definitions,
- address definitions and helper functions to
- access core registers and peripherals. It defines also a device
- independent interface for RTOS Kernels that includes debug channel
- definitions.</li>
-</ul>
-
-<p>These software layers are expanded by Silicon partners with:</p>
-<ul>
- <li><strong>Device Peripheral Access Layer</strong>: provides definitions
- for all device peripherals</li>
- <li><strong>Access Functions for Peripherals (optional)</strong>: provides
- additional helper functions for peripherals</li>
-</ul>
-
-<p>CMSIS defines for a Cortex-M Microcontroller System:</p>
-<ul>
- <li style="text-align: left;">A common way to access peripheral registers
- and a common way to define exception vectors.</li>
- <li style="text-align: left;">The register names of the <strong>Core
- Peripherals</strong> and<strong> </strong>the names of the <strong>Core
- Exception Vectors</strong>.</li>
- <li>An device independent interface for RTOS Kernels including a debug
- channel.</li>
-</ul>
-
-<p>
- By using CMSIS compliant software components, the user can easier re-use template code.
- CMSIS is intended to enable the combination of software components from multiple middleware vendors.
-</p>
-
-<h2><a name="2"></a>Coding Rules and Conventions</h2>
-
-<p>
- The following section describes the coding rules and conventions used in the CMSIS
- implementation. It contains also information about data types and version number information.
-</p>
-
-<h3>Essentials</h3>
-<ul>
- <li>The CMSIS C code conforms to MISRA 2004 rules. In case of MISRA violations,
- there are disable and enable sequences for PC-LINT inserted.</li>
- <li>ANSI standard data types defined in the ANSI C header file
- <strong><stdint.h></strong> are used.</li>
- <li>#define constants that include expressions must be enclosed by
- parenthesis.</li>
- <li>Variables and parameters have a complete data type.</li>
- <li>All functions in the <strong>Core Peripheral Access Layer</strong> are
- re-entrant.</li>
- <li>The <strong>Core Peripheral Access Layer</strong> has no blocking code
- (which means that wait/query loops are done at other software layers).</li>
- <li>For each exception/interrupt there is definition for:
- <ul>
- <li>an exception/interrupt handler with the postfix <strong>_Handler </strong>
- (for exceptions) or <strong>_IRQHandler</strong> (for interrupts).</li>
- <li>a default exception/interrupt handler (weak definition) that contains an endless loop.</li>
- <li>a #define of the interrupt number with the postfix <strong>_IRQn</strong>.</li>
- </ul></li>
-</ul>
-
-<h3>Recommendations</h3>
-
-<p>The CMSIS recommends the following conventions for identifiers.</p>
-<ul>
- <li><strong>CAPITAL</strong> names to identify Core Registers, Peripheral Registers, and CPU Instructions.</li>
- <li><strong>CamelCase</strong> names to identify peripherals access functions and interrupts.</li>
- <li><strong>PERIPHERAL_</strong> prefix to identify functions that belong to specify peripherals.</li>
- <li><strong>Doxygen</strong> comments for all functions are included as described under <strong>Function Comments</strong> below.</li>
-</ul>
-
-<b>Comments</b>
-
-<ul>
- <li>Comments use the ANSI C90 style (<em>/* comment */</em>) or C++ style
- (<em>// comment</em>). It is assumed that the programming tools support today
- consistently the C++ comment style.</li>
- <li><strong>Function Comments</strong> provide for each function the following information:
- <ul>
- <li>one-line brief function overview.</li>
- <li>detailed parameter explanation.</li>
- <li>detailed information about return values.</li>
- <li>detailed description of the actual function.</li>
- </ul>
- <p><b>Doxygen Example:</b></p>
- <pre>
-/**
- * @brief Enable Interrupt in NVIC Interrupt Controller
- * @param IRQn interrupt number that specifies the interrupt
- * @return none.
- * Enable the specified interrupt in the NVIC Interrupt Controller.
- * Other settings of the interrupt such as priority are not affected.
- */</pre>
- </li>
-</ul>
-
-<h3>Data Types and IO Type Qualifiers</h3>
-
-<p>
- The <strong>Cortex-M HAL</strong> uses the standard types from the standard ANSI C header file
- <strong><stdint.h></strong>. <strong>IO Type Qualifiers</strong> are used to specify the access
- to peripheral variables. IO Type Qualifiers are indented to be used for automatic generation of
- debug information of peripheral registers.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">IO Type Qualifier</th>
- <th class="kt">#define</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__I</td>
- <td class="kt">volatile const</td>
- <td class="kt">Read access only</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__O</td>
- <td class="kt">volatile</td>
- <td class="kt">Write access only</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__IO</td>
- <td class="kt">volatile</td>
- <td class="kt">Read and write access</td>
- </tr>
- </tbody>
-</table>
-
-<h3>CMSIS Version Number</h3>
-<p>
- File <strong>core_cm3.h</strong> contains the version number of the CMSIS with the following define:
-</p>
-
-<pre>
-#define __CM3_CMSIS_VERSION_MAIN (0x01) /* [31:16] main version */
-#define __CM3_CMSIS_VERSION_SUB (0x30) /* [15:0] sub version */
-#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)</pre>
-
-<p>
- File <strong>core_cm0.h</strong> contains the version number of the CMSIS with the following define:
-</p>
-
-<pre>
-#define __CM0_CMSIS_VERSION_MAIN (0x01) /* [31:16] main version */
-#define __CM0_CMSIS_VERSION_SUB (0x30) /* [15:0] sub version */
-#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | __CM0_CMSIS_VERSION_SUB)</pre>
-
-
-<h3>CMSIS Cortex Core</h3>
-<p>
- File <strong>core_cm3.h</strong> contains the type of the CMSIS Cortex-M with the following define:
-</p>
-
-<pre>
-#define __CORTEX_M (0x03)</pre>
-
-<p>
- File <strong>core_cm0.h</strong> contains the type of the CMSIS Cortex-M with the following define:
-</p>
-
-<pre>
-#define __CORTEX_M (0x00)</pre>
-
-
-<h2><a name="3"></a>CMSIS Files</h2>
-<p>
- This section describes the Files provided in context with the CMSIS to access the Cortex-M
- hardware and peripherals.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">File</th>
- <th class="kt">Provider</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap"><i>device.h</i></td>
- <td class="kt">Device specific (provided by silicon partner)</td>
- <td class="kt">Defines the peripherals for the actual device. The file may use
- several other include files to define the peripherals of the actual device.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">core_cm0.h</td>
- <td class="kt">ARM (for RealView ARMCC, IAR, and GNU GCC)</td>
- <td class="kt">Defines the core peripherals for the Cortex-M0 CPU and core peripherals.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">core_cm3.h</td>
- <td class="kt">ARM (for RealView ARMCC, IAR, and GNU GCC)</td>
- <td class="kt">Defines the core peripherals for the Cortex-M3 CPU and core peripherals.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">core_cm0.c</td>
- <td class="kt">ARM (for RealView ARMCC, IAR, and GNU GCC)</td>
- <td class="kt">Provides helper functions that access core registers.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">core_cm3.c</td>
- <td class="kt">ARM (for RealView ARMCC, IAR, and GNU GCC)</td>
- <td class="kt">Provides helper functions that access core registers.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">startup<i>_device</i></td>
- <td class="kt">ARM (adapted by compiler partner / silicon partner)</td>
- <td class="kt">Provides the Cortex-M startup code and the complete (device specific) Interrupt Vector Table</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">system<i>_device</i></td>
- <td class="kt">ARM (adapted by silicon partner)</td>
- <td class="kt">Provides a device specific configuration file for the device. It configures the device initializes
- typically the oscillator (PLL) that is part of the microcontroller device</td>
- </tr>
- </tbody>
-</table>
-
-<h3><em>device.h</em></h3>
-
-<p>
- The file <em><strong>device.h</strong></em> is provided by the silicon vendor and is the
- <u><strong>central include file</strong></u> that the application programmer is using in
- the C source code. This file contains:
-</p>
-<ul>
- <li>
- <p><strong>Interrupt Number Definition</strong>: provides interrupt numbers
- (IRQn) for all core and device specific exceptions and interrupts.</p>
- </li>
- <li>
- <p><strong>Configuration for core_cm0.h / core_cm3.h</strong>: reflects the
- actual configuration of the Cortex-M processor that is part of the actual
- device. As such the file <strong>core_cm0.h / core_cm3.h</strong> is included that
- implements access to processor registers and core peripherals. </p>
- </li>
- <li>
- <p><strong>Device Peripheral Access Layer</strong>: provides definitions
- for all device peripherals. It contains all data structures and the address
- mapping for the device specific peripherals. </p>
- </li>
- <li><strong>Access Functions for Peripherals (optional)</strong>: provides
- additional helper functions for peripherals that are useful for programming
- of these peripherals. Access Functions may be provided as inline functions
- or can be extern references to a device specific library provided by the
- silicon vendor.</li>
-</ul>
-
-
-<h4><strong>Interrupt Number Definition</strong></h4>
-
-<p>To access the device specific interrupts the device.h file defines IRQn
-numbers for the complete device using a enum typedef as shown below:</p>
-<pre>
-typedef enum IRQn
-{
-/****** Cortex-M3 Processor Exceptions/Interrupt Numbers ************************************************/
- NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
- HardFault_IRQn = -13, /*!< 3 Cortex-M3 Hard Fault Interrupt */
- MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
- BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
- UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
- SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
- DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
- PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
- SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
-/****** STM32 specific Interrupt Numbers ****************************************************************/
- WWDG_STM_IRQn = 0, /*!< Window WatchDog Interrupt */
- PVD_STM_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
- :
- :
- } IRQn_Type;</pre>
-
-
-<h4>Configuration for core_cm0.h / core_cm3.h</h4>
-<p>
- The Cortex-M core configuration options which are defined for each device implementation. Some
- configuration options are reflected in the CMSIS layer using the #define settings described below.
-</p>
-<p>
- To access core peripherals file <em><strong>device.h</strong></em> includes file <b>core_cm0.h / core_cm3.h</b>.
- Several features in <strong>core_cm0.h / core_cm3.h</strong> are configured by the following defines that must be
- defined before <strong>#include <core_cm0.h></strong> / <strong>#include <core_cm3.h></strong>
- preprocessor command.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">#define</th>
- <th class="kt" nowrap="nowrap">File</th>
- <th class="kt" nowrap="nowrap">Value</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__NVIC_PRIO_BITS</td>
- <td class="kt">core_cm0.h</td>
- <td class="kt" nowrap="nowrap">(2)</td>
- <td class="kt">Number of priority bits implemented in the NVIC (device specific)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__NVIC_PRIO_BITS</td>
- <td class="kt">core_cm3.h</td>
- <td class="kt" nowrap="nowrap">(2 ... 8)</td>
- <td class="kt">Number of priority bits implemented in the NVIC (device specific)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__MPU_PRESENT</td>
- <td class="kt">core_cm0.h, core_cm3.h</td>
- <td class="kt" nowrap="nowrap">(0, 1)</td>
- <td class="kt">Defines if an MPU is present or not</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">__Vendor_SysTickConfig</td>
- <td class="kt">core_cm0.h, core_cm3.h</td>
- <td class="kt" nowrap="nowrap">(1)</td>
- <td class="kt">When this define is setup to 1, the <strong>SysTickConfig</strong> function
- in <strong>core_cm3.h</strong> is excluded. In this case the <em><strong>device.h</strong></em>
- file must contain a vendor specific implementation of this function.</td>
- </tr>
- </tbody>
-</table>
-
-
-<h4>Device Peripheral Access Layer</h4>
-<p>
- Each peripheral uses a prefix which consists of <strong><device abbreviation>_</strong>
- and <strong><peripheral name>_</strong> to identify peripheral registers that access this
- specific peripheral. The intention of this is to avoid name collisions caused
- due to short names. If more than one peripheral of the same type exists,
- identifiers have a postfix (digit or letter). For example:
-</p>
-<ul>
- <li><device abbreviation>_UART_Type: defines the generic register layout for all UART channels in a device.
- <pre>
-typedef struct
-{
- union {
- __I uint8_t RBR; /*!< Offset: 0x000 Receiver Buffer Register */
- __O uint8_t THR; /*!< Offset: 0x000 Transmit Holding Register */
- __IO uint8_t DLL; /*!< Offset: 0x000 Divisor Latch LSB */
- uint32_t RESERVED0;
- };
- union {
- __IO uint8_t DLM; /*!< Offset: 0x004 Divisor Latch MSB */
- __IO uint32_t IER; /*!< Offset: 0x004 Interrupt Enable Register */
- };
- union {
- __I uint32_t IIR; /*!< Offset: 0x008 Interrupt ID Register */
- __O uint8_t FCR; /*!< Offset: 0x008 FIFO Control Register */
- };
- __IO uint8_t LCR; /*!< Offset: 0x00C Line Control Register */
- uint8_t RESERVED1[7];
- __I uint8_t LSR; /*!< Offset: 0x014 Line Status Register */
- uint8_t RESERVED2[7];
- __IO uint8_t SCR; /*!< Offset: 0x01C Scratch Pad Register */
- uint8_t RESERVED3[3];
- __IO uint32_t ACR; /*!< Offset: 0x020 Autobaud Control Register */
- __IO uint8_t ICR; /*!< Offset: 0x024 IrDA Control Register */
- uint8_t RESERVED4[3];
- __IO uint8_t FDR; /*!< Offset: 0x028 Fractional Divider Register */
- uint8_t RESERVED5[7];
- __IO uint8_t TER; /*!< Offset: 0x030 Transmit Enable Register */
- uint8_t RESERVED6[39];
- __I uint8_t FIFOLVL; /*!< Offset: 0x058 FIFO Level Register */
-} LPC_UART_TypeDef;</pre>
- </li>
- <li><device abbreviation>_UART1: is a pointer to a register structure that refers to a specific UART.
- For example UART1->DR is the data register of UART1.
- <pre>
-#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
-#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )</pre>
- </li>
-</ul>
-
-<h5>Minimal Requiements</h5>
-<p>
- To access the peripheral registers and related function in a device the files <strong><em>device.h</em></strong>
- and <strong>core_cm0.h</strong> / <strong>core_cm3.h</strong> defines as a minimum:
-</p>
-<ul>
- <li>The <strong>Register Layout Typedef</strong> for each peripheral that defines all register names.
- Names that start with RESERVE are used to introduce space into the structure to adjust the addresses of
- the peripheral registers. For example:
- <pre>
-typedef struct {
- __IO uint32_t CTRL; /* SysTick Control and Status Register */
- __IO uint32_t LOAD; /* SysTick Reload Value Register */
- __IO uint32_t VAL; /* SysTick Current Value Register */
- __I uint32_t CALIB; /* SysTick Calibration Register */
- } SysTick_Type;</pre>
- </li>
-
- <li>
- <strong>Base Address</strong> for each peripheral (in case of multiple peripherals
- that use the same <strong>register layout typedef</strong> multiple base addresses are defined). For example:
- <pre>
-#define SysTick_BASE (SCS_BASE + 0x0010) /* SysTick Base Address */</pre>
- </li>
-
- <li>
- <strong>Access Definition</strong> for each peripheral (in case of multiple peripherals that use
- the same <strong>register layout typedef</strong> multiple access definitions exist, i.e. LPC_UART0,
- LPC_UART2). For Example:
- <pre>
-#define SysTick ((SysTick_Type *) SysTick_BASE) /* SysTick access definition */</pre>
- </li>
-</ul>
-
-<p>
- These definitions allow to access the peripheral registers from user code with simple assignments like:
-</p>
-<pre>SysTick->CTRL = 0;</pre>
-
-<h5>Optional Features</h5>
-<p>In addition the <em> <strong>device.h </strong></em>file may define:</p>
-<ul>
- <li>
- #define constants that simplify access to the peripheral registers.
- These constant define bit-positions or other specific patterns are that required for the
- programming of the peripheral registers. The identifiers used start with
- <strong><device abbreviation>_</strong> and <strong><peripheral name>_</strong>.
- It is recommended to use CAPITAL letters for such #define constants.
- </li>
- <li>
- Functions that perform more complex functions with the peripheral (i.e. status query before
- a sending register is accessed). Again these function start with
- <strong><device abbreviation>_</strong> and <strong><peripheral name>_</strong>.
- </li>
-</ul>
-
-<h3>core_cm0.h and core_cm0.c</h3>
-<p>
- File <b>core_cm0.h</b> describes the data structures for the Cortex-M0 core peripherals and does
- the address mapping of this structures. It also provides basic access to the Cortex-M0 core registers
- and core peripherals with efficient functions (defined as <strong>static inline</strong>).
-</p>
-<p>
- File <b>core_cm0.c</b> defines several helper functions that access processor registers.
-</p>
-<p>Together these files implement the <a href="#4">Core Peripheral Access Layer</a> for a Cortex-M0.</p>
-
-<h3>core_cm3.h and core_cm3.c</h3>
-<p>
- File <b>core_cm3.h</b> describes the data structures for the Cortex-M3 core peripherals and does
- the address mapping of this structures. It also provides basic access to the Cortex-M3 core registers
- and core peripherals with efficient functions (defined as <strong>static inline</strong>).
-</p>
-<p>
- File <b>core_cm3.c</b> defines several helper functions that access processor registers.
-</p>
-<p>Together these files implement the <a href="#4">Core Peripheral Access Layer</a> for a Cortex-M3.</p>
-
-<h3>startup_<em>device</em></h3>
-<p>
- A template file for <strong>startup_<em>device</em></strong> is provided by ARM for each supported
- compiler. It is adapted by the silicon vendor to include interrupt vectors for all device specific
- interrupt handlers. Each interrupt handler is defined as <strong><em>weak</em></strong> function
- to an dummy handler. Therefore the interrupt handler can be directly used in application software
- without any requirements to adapt the <strong>startup_<em>device</em></strong> file.
-</p>
-<p>
- The following exception names are fixed and define the start of the vector table for a Cortex-M0:
-</p>
-<pre>
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler</pre>
-
-<p>
- The following exception names are fixed and define the start of the vector table for a Cortex-M3:
-</p>
-<pre>
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler</pre>
-
-<p>
- In the following examples for device specific interrupts are shown:
-</p>
-<pre>
-; External Interrupts
- DCD WWDG_IRQHandler ; Window Watchdog
- DCD PVD_IRQHandler ; PVD through EXTI Line detect
- DCD TAMPER_IRQHandler ; Tamper</pre>
-
-<p>
- Device specific interrupts must have a dummy function that can be overwritten in user code.
- Below is an example for this dummy function.
-</p>
-<pre>
-Default_Handler PROC
- EXPORT WWDG_IRQHandler [WEAK]
- EXPORT PVD_IRQHandler [WEAK]
- EXPORT TAMPER_IRQHandler [WEAK]
- :
- :
- WWDG_IRQHandler
- PVD_IRQHandler
- TAMPER_IRQHandler
- :
- :
- B .
- ENDP</pre>
-
-<p>
- The user application may simply define an interrupt handler function by using the handler name
- as shown below.
-</p>
-<pre>
-void WWDG_IRQHandler(void)
-{
- :
- :
-}</pre>
-
-
-<h3><a name="4"></a>system_<em>device</em>.c</h3>
-<p>
- A template file for <strong>system_<em>device</em>.c</strong> is provided by ARM but adapted by
- the silicon vendor to match their actual device. As a <strong>minimum requirement</strong>
- this file must provide a device specific system configuration function and a global variable
- that contains the system frequency. It configures the device and initializes typically the
- oscillator (PLL) that is part of the microcontroller device.
-</p>
-<p>
- The file <strong>system_</strong><em><strong>device</strong></em><strong>.c</strong> must provide
- as a minimum requirement the SystemInit function as shown below.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt">Function Definition</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void SystemInit (void)</td>
- <td class="kt">Setup the microcontroller system. Typically this function configures the
- oscillator (PLL) that is part of the microcontroller device. For systems
- with variable clock speed it also updates the variable SystemCoreClock.<br>
- SystemInit is called from startup<i>_device</i> file.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void SystemCoreClockUpdate (void)</td>
- <td class="kt">Updates the variable SystemCoreClock and must be called whenever the
- core clock is changed during program execution. SystemCoreClockUpdate()
- evaluates the clock register settings and calculates the current core clock.
-</td>
- </tr>
- </tbody>
-</table>
-
-<p>
- Also part of the file <strong>system_</strong><em><strong>device</strong></em><strong>.c</strong>
- is the variable <strong>SystemCoreClock</strong> which contains the current CPU clock speed shown below.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt">Variable Definition</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t SystemCoreClock</td>
- <td class="kt">Contains the system core clock (which is the system clock frequency supplied
- to the SysTick timer and the processor core clock). This variable can be
- used by the user application to setup the SysTick timer or configure other
- parameters. It may also be used by debugger to query the frequency of the
- debug timer or configure the trace clock speed.<br>
- SystemCoreClock is initialized with a correct predefined value.<br><br>
- The compiler must be configured to avoid the removal of this variable in
- case that the application program is not using it. It is important for
- debug systems that the variable is physically present in memory so that
- it can be examined to configure the debugger.</td>
- </tr>
- </tbody>
-</table>
-
-<p class="Note">Note</p>
-<ul>
- <li><p>The above definitions are the minimum requirements for the file <strong>
- system_</strong><em><strong>device</strong></em><strong>.c</strong>. This
- file may export more functions or variables that provide a more flexible
- configuration of the microcontroller system.</p>
- </li>
-</ul>
-
-
-<h2>Core Peripheral Access Layer</h2>
-
-<h3>Cortex-M Core Register Access</h3>
-<p>
- The following functions are defined in <strong>core_cm0.h</strong> / <strong>core_cm3.h</strong>
- and provide access to Cortex-M core registers.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt">Function Definition</th>
- <th class="kt">Core</th>
- <th class="kt">Core Register</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __enable_irq (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">PRIMASK = 0</td>
- <td class="kt">Global Interrupt enable (using the instruction <strong>CPSIE
- i</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __disable_irq (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">PRIMASK = 1</td>
- <td class="kt">Global Interrupt disable (using the instruction <strong>
- CPSID i</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_PRIMASK (uint32_t value)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">PRIMASK = value</td>
- <td class="kt">Assign value to Priority Mask Register (using the instruction
- <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __get_PRIMASK (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">return PRIMASK</td>
- <td class="kt">Return Priority Mask Register (using the instruction
- <strong>MRS</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __enable_fault_irq (void)</td>
- <td class="kt">M3</td>
- <td class="kt">FAULTMASK = 0</td>
- <td class="kt">Global Fault exception and Interrupt enable (using the
- instruction <strong>CPSIE
- f</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __disable_fault_irq (void)</td>
- <td class="kt">M3</td>
- <td class="kt">FAULTMASK = 1</td>
- <td class="kt">Global Fault exception and Interrupt disable (using the
- instruction <strong>CPSID f</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_FAULTMASK (uint32_t value)</td>
- <td class="kt">M3</td>
- <td class="kt">FAULTMASK = value</td>
- <td class="kt">Assign value to Fault Mask Register (using the instruction
- <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __get_FAULTMASK (void)</td>
- <td class="kt">M3</td>
- <td class="kt">return FAULTMASK</td>
- <td class="kt">Return Fault Mask Register (using the instruction <strong>MRS</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_BASEPRI (uint32_t value)</td>
- <td class="kt">M3</td>
- <td class="kt">BASEPRI = value</td>
- <td class="kt">Set Base Priority (using the instruction <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uiuint32_t __get_BASEPRI (void)</td>
- <td class="kt">M3</td>
- <td class="kt">return BASEPRI</td>
- <td class="kt">Return Base Priority (using the instruction <strong>MRS</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_CONTROL (uint32_t value)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">CONTROL = value</td>
- <td class="kt">Set CONTROL register value (using the instruction <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __get_CONTROL (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">return CONTROL</td>
- <td class="kt">Return Control Register Value (using the instruction
- <strong>MRS</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_PSP (uint32_t TopOfProcStack)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">PSP = TopOfProcStack</td>
- <td class="kt">Set Process Stack Pointer value (using the instruction
- <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __get_PSP (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">return PSP</td>
- <td class="kt">Return Process Stack Pointer (using the instruction <strong>MRS</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __set_MSP (uint32_t TopOfMainStack)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">MSP = TopOfMainStack</td>
- <td class="kt">Set Main Stack Pointer (using the instruction <strong>MSR</strong>)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __get_MSP (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">return MSP</td>
- <td class="kt">Return Main Stack Pointer (using the instruction <strong>MRS</strong>)</td>
- </tr>
- </tbody>
-</table>
-
-<h3>Cortex-M Instruction Access</h3>
-<p>
- The following functions are defined in <strong>core_cm0.h</strong> / <strong>core_cm3.h</strong>and
- generate specific Cortex-M instructions. The functions are implemented in the file
- <strong>core_cm0.c</strong> / <strong>core_cm3.c</strong>.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt">Name</th>
- <th class="kt">Core</th>
- <th class="kt">Generated CPU Instruction</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __NOP (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">NOP</td>
- <td class="kt">No Operation</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __WFI (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">WFI</td>
- <td class="kt">Wait for Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __WFE (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">WFE</td>
- <td class="kt">Wait for Event</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __SEV (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">SEV</td>
- <td class="kt">Set Event</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __ISB (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">ISB</td>
- <td class="kt">Instruction Synchronization Barrier</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __DSB (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">DSB</td>
- <td class="kt">Data Synchronization Barrier</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __DMB (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">DMB</td>
- <td class="kt">Data Memory Barrier</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __REV (uint32_t value)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">REV</td>
- <td class="kt">Reverse byte order in integer value.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __REV16 (uint16_t value)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">REV16</td>
- <td class="kt">Reverse byte order in unsigned short value. </td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">sint32_t __REVSH (sint16_t value)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">REVSH</td>
- <td class="kt">Reverse byte order in signed short value with sign extension to integer.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __RBIT (uint32_t value)</td>
- <td class="kt">M3</td>
- <td class="kt">RBIT</td>
- <td class="kt">Reverse bit order of value</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint8_t __LDREXB (uint8_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">LDREXB</td>
- <td class="kt">Load exclusive byte</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint16_t __LDREXH (uint16_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">LDREXH</td>
- <td class="kt">Load exclusive half-word</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __LDREXW (uint32_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">LDREXW</td>
- <td class="kt">Load exclusive word</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __STREXB (uint8_t value, uint8_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">STREXB</td>
- <td class="kt">Store exclusive byte</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __STREXB (uint16_t value, uint16_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">STREXH</td>
- <td class="kt">Store exclusive half-word</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t __STREXB (uint32_t value, uint32_t *addr)</td>
- <td class="kt">M3</td>
- <td class="kt">STREXW</td>
- <td class="kt">Store exclusive word</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void __CLREX (void)</td>
- <td class="kt">M3</td>
- <td class="kt">CLREX</td>
- <td class="kt">Remove the exclusive lock created by __LDREXB, __LDREXH, or __LDREXW</td>
- </tr>
- </tbody>
-</table>
-
-
-<h3>NVIC Access Functions</h3>
-<p>
- The CMSIS provides access to the NVIC via the register interface structure and several helper
- functions that simplify the setup of the NVIC. The CMSIS HAL uses IRQ numbers (IRQn) to
- identify the interrupts. The first device interrupt has the IRQn value 0. Therefore negative
- IRQn values are used for processor core exceptions.
-</p>
-<p>
- For the IRQn values of core exceptions the file <strong><em>device.h</em></strong> provides
- the following enum names.
-</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">Core Exception enum Value</th>
- <th class="kt">Core</th>
- <th class="kt">IRQn</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">NonMaskableInt_IRQn</td>
- <td class="kt">M0, M3</td>
- <td class="kt">-14</td>
- <td class="kt">Cortex-M Non Maskable Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">HardFault_IRQn</td>
- <td class="kt">M0, M3</td>
- <td class="kt">-13</td>
- <td class="kt">Cortex-M Hard Fault Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">MemoryManagement_IRQn</td>
- <td class="kt">M3</td>
- <td class="kt">-12</td>
- <td class="kt">Cortex-M Memory Management Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">BusFault_IRQn</td>
- <td class="kt">M3</td>
- <td class="kt">-11</td>
- <td class="kt">Cortex-M Bus Fault Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">UsageFault_IRQn</td>
- <td class="kt">M3</td>
- <td class="kt">-10</td>
- <td class="kt">Cortex-M Usage Fault Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">SVCall_IRQn</td>
- <td class="kt">M0, M3</td>
- <td class="kt">-5</td>
- <td class="kt">Cortex-M SV Call Interrupt </td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">DebugMonitor_IRQn</td>
- <td class="kt">M3</td>
- <td class="kt">-4</td>
- <td class="kt">Cortex-M Debug Monitor Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">PendSV_IRQn</td>
- <td class="kt">M0, M3</td>
- <td class="kt">-2</td>
- <td class="kt">Cortex-M Pend SV Interrupt</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">SysTick_IRQn</td>
- <td class="kt">M0, M3</td>
- <td class="kt">-1</td>
- <td class="kt">Cortex-M System Tick Interrupt</td>
- </tr>
- </tbody>
-</table>
-
-<p>The following functions simplify the setup of the NVIC.
-The functions are defined as <strong>static inline</strong>.</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">Name</th>
- <th class="kt">Core</th>
- <th class="kt">Parameter</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)</td>
- <td class="kt">M3</td>
- <td class="kt">Priority Grouping Value</td>
- <td class="kt">Set the Priority Grouping (Groups . Subgroups)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t NVIC_GetPriorityGrouping (void)</td>
- <td class="kt">M3</td>
- <td class="kt">(void)</td>
- <td class="kt">Get the Priority Grouping (Groups . Subgroups)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_EnableIRQ (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Enable IRQn</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_DisableIRQ (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Disable IRQn</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Return 1 if IRQn is pending else 0</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_SetPendingIRQ (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Set IRQn Pending</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_ClearPendingIRQ (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Clear IRQn Pending Status</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t NVIC_GetActive (IRQn_Type IRQn)</td>
- <td class="kt">M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Return 1 if IRQn is active else 0</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number, Priority</td>
- <td class="kt">Set Priority for IRQn<br>
- (not threadsafe for Cortex-M0)</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t NVIC_GetPriority (IRQn_Type IRQn)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">IRQ Number</td>
- <td class="kt">Get Priority for IRQn</td>
- </tr>
- <tr>
-<!-- <td class="kt" nowrap="nowrap">uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</td> -->
- <td class="kt">uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</td>
- <td class="kt">M3</td>
- <td class="kt">IRQ Number, Priority Group, Preemptive Priority, Sub Priority</td>
- <td class="kt">Encode priority for given group, preemptive and sub priority</td>
- </tr>
-<!-- <td class="kt" nowrap="nowrap">NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)</td> -->
- <td class="kt">NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)</td>
- <td class="kt">M3</td>
- <td class="kt">IRQ Number, Priority, pointer to Priority Group, pointer to Preemptive Priority, pointer to Sub Priority</td>
- <td class="kt">Deccode given priority to group, preemptive and sub priority</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void NVIC_SystemReset (void)</td>
- <td class="kt">M0, M3</td>
- <td class="kt">(void)</td>
- <td class="kt">Resets the System</td>
- </tr>
- </tbody>
-</table>
-<p class="Note">Note</p>
-<ul>
- <li><p>The processor exceptions have negative enum values. Device specific interrupts
- have positive enum values and start with 0. The values are defined in
- <b><em>device.h</em></b> file.
- </p>
- </li>
- <li><p>The values for <b>PreemptPriority</b> and <b>SubPriority</b>
- used in functions <b>NVIC_EncodePriority</b> and <b>NVIC_DecodePriority</b>
- depend on the available __NVIC_PRIO_BITS implemented in the NVIC.
- </p>
- </li>
-</ul>
-
-
-<h3>SysTick Configuration Function</h3>
-
-<p>The following function is used to configure the SysTick timer and start the
-SysTick interrupt.</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">Name</th>
- <th class="kt">Parameter</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">uint32_t Sys<span class="style1">TickConfig
- (uint32_t ticks)</span></td>
- <td class="kt">ticks is SysTick counter reload value</td>
- <td class="kt">Setup the SysTick timer and enable the SysTick interrupt. After this
- call the SysTick timer creates interrupts with the specified time
- interval. <br>
- <br>
- Return: 0 when successful, 1 on failure.<br>
- </td>
- </tr>
- </tbody>
-</table>
-
-
-<h3>Cortex-M3 ITM Debug Access</h3>
-
-<p>The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that
-provides together with the Serial Viewer Output trace capabilities for the
-microcontroller system. The ITM has 32 communication channels; two ITM
-communication channels are used by CMSIS to output the following information:</p>
-<ul>
- <li>ITM Channel 0: implements the <strong>ITM_SendChar</strong> function
- which can be used for printf-style output via the debug interface.</li>
- <li>ITM Channel 31: is reserved for the RTOS kernel and can be used for
- kernel awareness debugging.</li>
-</ul>
-<p class="Note">Note</p>
-<ul>
- <li><p>The ITM channel 31 is selected for the RTOS kernel since some kernels
- may use the Privileged level for program execution. ITM
- channels have 4 groups with 8 channels each, whereby each group can be
- configured for access rights in the Unprivileged level. The ITM channel 0
- may be therefore enabled for the user task whereas ITM channel 31 may be
- accessible only in Privileged level from the RTOS kernel itself.</p>
- </li>
-</ul>
-
-<p>The prototype of the <strong>ITM_SendChar</strong> routine is shown in the
-table below.</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">Name</th>
- <th class="kt">Parameter</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">void uint32_t ITM_SendChar(uint32_t chr)</td>
- <td class="kt">character to output</td>
- <td class="kt">The function outputs a character via the ITM channel 0. The
- function returns when no debugger is connected that has booked the
- output. It is blocking when a debugger is connected, but the
- previous character send is not transmitted. <br><br>
- Return: the input character 'chr'.</td>
- </tr>
- </tbody>
-</table>
-
-<p>
- Example for the usage of the ITM Channel 31 for RTOS Kernels:
-</p>
-<pre>
- // check if debugger connected and ITM channel enabled for tracing
- if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
- (ITM->TCR & ITM_TCR_ITMENA) &&
- (ITM->TER & (1UL << 31))) {
- // transmit trace data
- while (ITM->PORT31_U32 == 0);
- ITM->PORT[31].u8 = task_id; // id of next task
- while (ITM->PORT[31].u32 == 0);
- ITM->PORT[31].u32 = task_status; // status information
- }</pre>
-
-
-<h3>Cortex-M3 additional Debug Access</h3>
-
-<p>CMSIS provides additional debug functions to enlarge the Cortex-M3 Debug Access.
-Data can be transmitted via a certain global buffer variable towards the target system.</p>
-
-<p>The buffer variable and the prototypes of the additional functions are shown in the
-table below.</p>
-
-<table class="kt" border="0" cellpadding="0" cellspacing="0">
- <tbody>
- <tr>
- <th class="kt" nowrap="nowrap">Name</th>
- <th class="kt">Parameter</th>
- <th class="kt">Description</th>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">extern volatile int ITM_RxBuffer</td>
- <td class="kt"> </td>
- <td class="kt">Buffer to transmit data towards debug system. <br><br>
- Value 0x5AA55AA5 indicates that buffer is empty.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">int ITM_ReceiveChar (void)</td>
- <td class="kt">none</td>
- <td class="kt">The nonblocking functions returns the character stored in
- ITM_RxBuffer. <br><br>
- Return: -1 indicates that no character was received.</td>
- </tr>
- <tr>
- <td class="kt" nowrap="nowrap">int ITM_CheckChar (void)</td>
- <td class="kt">none</td>
- <td class="kt">The function checks if a character is available in ITM_RxBuffer. <br><br>
- Return: 1 indicates that a character is available, 0 indicates that
- no character is available.</td>
- </tr>
- </tbody>
-</table>
-
-
-<h2><a name="5"></a>CMSIS Example</h2>
-<p>
- The following section shows a typical example for using the CMSIS layer in user applications.
- The example is based on a STM32F10x Device.
-</p>
-<pre>
-#include "stm32f10x.h"
-
-volatile uint32_t msTicks; /* timeTicks counter */
-
-void SysTick_Handler(void) {
- msTicks++; /* increment timeTicks counter */
-}
-
-__INLINE static void Delay (uint32_t dlyTicks) {
- uint32_t curTicks = msTicks;
-
- while ((msTicks - curTicks) < dlyTicks);
-}
-
-__INLINE static void LED_Config(void) {
- ; /* Configure the LEDs */
-}
-
-__INLINE static void LED_On (uint32_t led) {
- ; /* Turn On LED */
-}
-
-__INLINE static void LED_Off (uint32_t led) {
- ; /* Turn Off LED */
-}
-
-int main (void) {
- if (SysTick_Config (SystemCoreClock / 1000)) { /* Setup SysTick for 1 msec interrupts */
- ; /* Handle Error */
- while (1);
- }
-
- LED_Config(); /* configure the LEDs */
-
- while(1) {
- LED_On (0x100); /* Turn on the LED */
- Delay (100); /* delay 100 Msec */
- LED_Off (0x100); /* Turn off the LED */
- Delay (100); /* delay 100 Msec */
- }
-}</pre>
-
-
-</body></html>
\ No newline at end of file
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/License.doc b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/License.doc
deleted file mode 100644
index b6b8acecc1..0000000000
Binary files a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/CMSIS/License.doc and /dev/null differ
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/FreeRTOSConfig.h
deleted file mode 100644
index 8e9c1f005f..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/FreeRTOSConfig.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *
- * See http://www.freertos.org/a00110.html.
- *----------------------------------------------------------*/
-
-#define configUSE_PREEMPTION 1
-#define configUSE_IDLE_HOOK 1
-#define configUSE_TICK_HOOK 0
-#define configCPU_CLOCK_HZ ( 14000000UL )
-#define configTICK_RATE_HZ ( ( TickType_t ) 100 )
-#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 10 * 1024 ) )
-#define configMAX_TASK_NAME_LEN ( 10 )
-#define configUSE_TRACE_FACILITY 0
-#define configUSE_16_BIT_TICKS 0
-#define configIDLE_SHOULD_YIELD 0
-#define configUSE_CO_ROUTINES 1
-#define configUSE_MUTEXES 1
-
-#define configMAX_PRIORITIES ( 4 )
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
-
-#define configUSE_COUNTING_SEMAPHORES 0
-#define configUSE_ALTERNATIVE_API 0
-#define configCHECK_FOR_STACK_OVERFLOW 2
-#define configUSE_RECURSIVE_MUTEXES 1
-#define configQUEUE_REGISTRY_SIZE 0
-#define configGENERATE_RUN_TIME_STATS 0
-
-/* Set the following definitions to 1 to include the API function, or zero
-to exclude the API function. */
-#define INCLUDE_vTaskPrioritySet 1
-#define INCLUDE_uxTaskPriorityGet 1
-#define INCLUDE_vTaskDelete 0
-#define INCLUDE_vTaskCleanUpResources 0
-#define INCLUDE_vTaskSuspend 1
-#define INCLUDE_vTaskDelayUntil 1
-#define INCLUDE_vTaskDelay 1
-
-
-#define configKERNEL_INTERRUPT_PRIORITY 255
-/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
-See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xa0, or priority 5. */
-
-
-#endif /* FREERTOS_CONFIG_H */
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ParTest.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ParTest.c
deleted file mode 100644
index f55b1a2102..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ParTest.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* Demo app includes. */
-#include "partest.h"
-
-/* Library includes. */
-#include "dvk.h"
-
-void vParTestInitialise( void )
-{
- DVK_init();
- DVK_setLEDs( 0 );
-}
-/*-----------------------------------------------------------*/
-
-void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
-{
-unsigned long ulLEDs;
-
- /* Suspend all other tasks, in order to make sure no other tasks excecutes
- this code at the same time. */
- vTaskSuspendAll();
- {
- ulLEDs = DVK_getLEDs();
-
- if( xValue == pdTRUE )
- {
- /* Turn the LED on if xValue is true. */
- ulLEDs = ulLEDs | ( 1 << uxLED );
- }
- else
- {
- /* Turn the LED off if xValue is not true. */
- ulLEDs &= ~( 1 << uxLED );
- }
-
- DVK_setLEDs( ulLEDs );
- }
- xTaskResumeAll();
-}
-/*-----------------------------------------------------------*/
-
-void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
-{
-unsigned long ulLEDs;
-
- vTaskSuspendAll();
- {
- ulLEDs = DVK_getLEDs();
- ulLEDs = ulLEDs ^ ( 1 << uxLED );
- DVK_setLEDs( ulLEDs );
- }
- xTaskResumeAll();
-}
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewd b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewd
deleted file mode 100644
index b04237f4de..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewd
+++ /dev/null
@@ -1,879 +0,0 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<project>
- <fileVersion>2</fileVersion>
- <configuration>
- <name>Debug</name>
- <toolchain>
- <name>ARM</name>
- </toolchain>
- <debug>1</debug>
- <settings>
- <name>C-SPY</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>22</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>CInput</name>
- <state>1</state>
- </option>
- <option>
- <name>CEndian</name>
- <state>1</state>
- </option>
- <option>
- <name>CProcessor</name>
- <state>1</state>
- </option>
- <option>
- <name>OCVariant</name>
- <state>0</state>
- </option>
- <option>
- <name>MacOverride</name>
- <state>0</state>
- </option>
- <option>
- <name>MacFile</name>
- <state></state>
- </option>
- <option>
- <name>MemOverride</name>
- <state>0</state>
- </option>
- <option>
- <name>MemFile</name>
- <state>$TOOLKIT_DIR$\CONFIG\debugger\EnergyMicro\EFM32G890F128.ddf</state>
- </option>
- <option>
- <name>RunToEnable</name>
- <state>1</state>
- </option>
- <option>
- <name>RunToName</name>
- <state>main</state>
- </option>
- <option>
- <name>CExtraOptionsCheck</name>
- <state>0</state>
- </option>
- <option>
- <name>CExtraOptions</name>
- <state></state>
- </option>
- <option>
- <name>CFpuProcessor</name>
- <state>1</state>
- </option>
- <option>
- <name>OCDDFArgumentProducer</name>
- <state></state>
- </option>
- <option>
- <name>OCDownloadSuppressDownload</name>
- <state>0</state>
- </option>
- <option>
- <name>OCDownloadVerifyAll</name>
- <state>0</state>
- </option>
- <option>
- <name>OCProductVersion</name>
- <state>5.41.2.51798</state>
- </option>
- <option>
- <name>OCDynDriverList</name>
- <state>JLINK_ID</state>
- </option>
- <option>
- <name>OCLastSavedByProductVersion</name>
- <state>6.20.1.52589</state>
- </option>
- <option>
- <name>OCDownloadAttachToProgram</name>
- <state>0</state>
- </option>
- <option>
- <name>UseFlashLoader</name>
- <state>1</state>
- </option>
- <option>
- <name>CLowLevel</name>
- <state>1</state>
- </option>
- <option>
- <name>OCBE8Slave</name>
- <state>1</state>
- </option>
- <option>
- <name>MacFile2</name>
- <state></state>
- </option>
- <option>
- <name>CDevice</name>
- <state>1</state>
- </option>
- <option>
- <name>FlashLoadersV3</name>
- <state>$TOOLKIT_DIR$\config\flashloader\EnergyMicro\FlashEFM32.board</state>
- </option>
- <option>
- <name>OCImagesSuppressCheck1</name>
- <state>0</state>
- </option>
- <option>
- <name>OCImagesPath1</name>
- <state></state>
- </option>
- <option>
- <name>OCImagesSuppressCheck2</name>
- <state>0</state>
- </option>
- <option>
- <name>OCImagesPath2</name>
- <state></state>
- </option>
- <option>
- <name>OCImagesSuppressCheck3</name>
- <state>0</state>
- </option>
- <option>
- <name>OCImagesPath3</name>
- <state></state>
- </option>
- <option>
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- <archiveVersion>2</archiveVersion>
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- <name>ANGELTCPIP</name>
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- <option>
- <name>OCDriverInfo</name>
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- </settings>
- <settings>
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- <archiveVersion>2</archiveVersion>
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- <version>0</version>
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- <name>CCJTagUpdateBreakpoints</name>
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- <archiveVersion>2</archiveVersion>
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- <version>1</version>
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- <name>CRomCommBaud</name>
- <version>0</version>
- <state>7</state>
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- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
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- </settings>
- <settings>
- <name>JLINK_ID</name>
- <archiveVersion>2</archiveVersion>
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- <version>13</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>JLinkSpeed</name>
- <state>32</state>
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- <name>CCJLinkDoLogfile</name>
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- <option>
- <name>CCJLinkIRLength</name>
- <state>0</state>
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- <option>
- <name>CCJLinkCommRadio</name>
- <state>0</state>
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- <option>
- <name>CCJLinkTCPIP</name>
- <state>aaa.bbb.ccc.ddd</state>
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- <option>
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- <state>0</state>
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- <name>CCUSBDevice</name>
- <version>1</version>
- <state>1</state>
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- <option>
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- <option>
- <name>CCRDICatchUndef</name>
- <state>0</state>
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- <option>
- <name>CCRDICatchSWI</name>
- <state>0</state>
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- <name>CCRDICatchData</name>
- <state>0</state>
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- <option>
- <name>CCRDICatchPrefetch</name>
- <state>0</state>
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- <option>
- <name>CCRDICatchIRQ</name>
- <state>0</state>
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- <option>
- <name>CCRDICatchFIQ</name>
- <state>0</state>
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- <option>
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- <state>0</state>
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- <option>
- <name>CCJLinkDoUpdateBreakpoints</name>
- <state>0</state>
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- <option>
- <name>CCJLinkUpdateBreakpoints</name>
- <state>main</state>
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- <option>
- <name>CCJLinkInterfaceRadio</name>
- <state>1</state>
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- <option>
- <name>OCJLinkAttachSlave</name>
- <state>1</state>
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- <option>
- <name>CCJLinkResetList</name>
- <version>5</version>
- <state>7</state>
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- <option>
- <name>CCJLinkInterfaceCmdLine</name>
- <state>0</state>
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- <option>
- <name>CCCatchCORERESET</name>
- <state>0</state>
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- <option>
- <name>CCCatchMMERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchNOCPERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchCHRERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchSTATERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchBUSERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchINTERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchHARDERR</name>
- <state>0</state>
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- <option>
- <name>CCCatchDummy</name>
- <state>0</state>
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- <option>
- <name>OCJLinkScriptFile</name>
- <state>1</state>
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- <option>
- <name>CCJLinkUsbSerialNo</name>
- <state></state>
- </option>
- <option>
- <name>CCTcpIpAlt</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>CCJLinkTcpIpSerialNo</name>
- <state></state>
- </option>
- <option>
- <name>CCCpuClockEdit</name>
- <state>72.0</state>
- </option>
- <option>
- <name>CCSwoClockAuto</name>
- <state>0</state>
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- <option>
- <name>CCSwoClockEdit</name>
- <state>2000</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>LMIFTDI_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>2</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
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- <option>
- <name>LmiftdiSpeed</name>
- <state>500</state>
- </option>
- <option>
- <name>CCLmiftdiDoLogfile</name>
- <state>0</state>
- </option>
- <option>
- <name>CCLmiftdiLogFile</name>
- <state>$PROJ_DIR$\cspycomm.log</state>
- </option>
- <option>
- <name>CCLmiFtdiInterfaceRadio</name>
- <state>0</state>
- </option>
- <option>
- <name>CCLmiFtdiInterfaceCmdLine</name>
- <state>0</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>MACRAIGOR_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>3</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>jtag</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>EmuSpeed</name>
- <state>1</state>
- </option>
- <option>
- <name>TCPIP</name>
- <state>aaa.bbb.ccc.ddd</state>
- </option>
- <option>
- <name>DoLogfile</name>
- <state>0</state>
- </option>
- <option>
- <name>LogFile</name>
- <state>$PROJ_DIR$\cspycomm.log</state>
- </option>
- <option>
- <name>DoEmuMultiTarget</name>
- <state>0</state>
- </option>
- <option>
- <name>EmuMultiTarget</name>
- <state>0@ARM7TDMI</state>
- </option>
- <option>
- <name>EmuHWReset</name>
- <state>0</state>
- </option>
- <option>
- <name>CEmuCommBaud</name>
- <version>0</version>
- <state>4</state>
- </option>
- <option>
- <name>CEmuCommPort</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>jtago</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
- <option>
- <name>UnusedAddr</name>
- <state>0x00800000</state>
- </option>
- <option>
- <name>CCMacraigorHWResetDelay</name>
- <state></state>
- </option>
- <option>
- <name>CCJTagBreakpointRadio</name>
- <state>0</state>
- </option>
- <option>
- <name>CCJTagDoUpdateBreakpoints</name>
- <state>0</state>
- </option>
- <option>
- <name>CCJTagUpdateBreakpoints</name>
- <state>main</state>
- </option>
- <option>
- <name>CCMacraigorInterfaceRadio</name>
- <state>0</state>
- </option>
- <option>
- <name>CCMacraigorInterfaceCmdLine</name>
- <state>0</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>PEMICRO_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>0</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
- <option>
- <name>OCPEMicroAttachSlave</name>
- <state>1</state>
- </option>
- <option>
- <name>CCPEMicroInterfaceList</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>CCPEMicroResetDelay</name>
- <state></state>
- </option>
- <option>
- <name>CCPEMicroJtagSpeed</name>
- <state>#UNINITIALIZED#</state>
- </option>
- <option>
- <name>CCJPEMicroShowSettings</name>
- <state>0</state>
- </option>
- <option>
- <name>DoLogfile</name>
- <state>0</state>
- </option>
- <option>
- <name>LogFile</name>
- <state>$PROJ_DIR$\cspycomm.log</state>
- </option>
- <option>
- <name>CCPEMicroUSBDevice</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>CCPEMicroSerialPort</name>
- <version>0</version>
- <state>0</state>
- </option>
- <option>
- <name>CCJPEMicroTCPIPAutoScanNetwork</name>
- <state>1</state>
- </option>
- <option>
- <name>CCPEMicroTCPIP</name>
- <state>10.0.0.1</state>
- </option>
- <option>
- <name>CCPEMicroCommCmdLineProducer</name>
- <state>0</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>RDI_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>2</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>CRDIDriverDll</name>
- <state>###Uninitialized###</state>
- </option>
- <option>
- <name>CRDILogFileCheck</name>
- <state>0</state>
- </option>
- <option>
- <name>CRDILogFileEdit</name>
- <state>$PROJ_DIR$\cspycomm.log</state>
- </option>
- <option>
- <name>CCRDIHWReset</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchReset</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchUndef</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchSWI</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchData</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchPrefetch</name>
- <state>0</state>
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- <option>
- <name>CCRDICatchIRQ</name>
- <state>0</state>
- </option>
- <option>
- <name>CCRDICatchFIQ</name>
- <state>0</state>
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- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>STLINK_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>2</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
- <option>
- <name>CCSTLinkInterfaceRadio</name>
- <state>0</state>
- </option>
- <option>
- <name>CCSTLinkInterfaceCmdLine</name>
- <state>0</state>
- </option>
- <option>
- <name>CCSTLinkResetList</name>
- <version>1</version>
- <state>0</state>
- </option>
- <option>
- <name>CCCpuClockEdit</name>
- <state>72.0</state>
- </option>
- <option>
- <name>CCSwoClockAuto</name>
- <state>0</state>
- </option>
- <option>
- <name>CCSwoClockEdit</name>
- <state>2000</state>
- </option>
- </data>
- </settings>
- <settings>
- <name>THIRDPARTY_ID</name>
- <archiveVersion>2</archiveVersion>
- <data>
- <version>0</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>CThirdPartyDriverDll</name>
- <state>###Uninitialized###</state>
- </option>
- <option>
- <name>CThirdPartyLogFileCheck</name>
- <state>0</state>
- </option>
- <option>
- <name>CThirdPartyLogFileEditB</name>
- <state>$PROJ_DIR$\cspycomm.log</state>
- </option>
- <option>
- <name>OCDriverInfo</name>
- <state>1</state>
- </option>
- </data>
- </settings>
- <debuggerPlugins>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB6_Plugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
- <loadFlag>1</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\FreeRTOS\FreeRTOSPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
- <loadFlag>0</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>
- <loadFlag>1</loadFlag>
- </plugin>
- <plugin>
- <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
- <loadFlag>1</loadFlag>
- </plugin>
- </debuggerPlugins>
- </configuration>
-</project>
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewp b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewp
deleted file mode 100644
index 5042446cf2..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.ewp
+++ /dev/null
@@ -1,995 +0,0 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<project>
- <fileVersion>2</fileVersion>
- <configuration>
- <name>Debug</name>
- <toolchain>
- <name>ARM</name>
- </toolchain>
- <debug>1</debug>
- <settings>
- <name>General</name>
- <archiveVersion>3</archiveVersion>
- <data>
- <version>21</version>
- <wantNonLocal>1</wantNonLocal>
- <debug>1</debug>
- <option>
- <name>ExePath</name>
- <state>Debug\Exe</state>
- </option>
- <option>
- <name>ObjPath</name>
- <state>Debug\Obj</state>
- </option>
- <option>
- <name>ListPath</name>
- <state>Debug\List</state>
- </option>
- <option>
- <name>Variant</name>
- <version>19</version>
- <state>37</state>
- </option>
- <option>
- <name>GEndianMode</name>
- <state>0</state>
- </option>
- <option>
- <name>Input variant</name>
- <version>3</version>
- <state>1</state>
- </option>
- <option>
- <name>Input description</name>
- <state>Full formatting.</state>
- </option>
- <option>
- <name>Output variant</name>
- <version>2</version>
- <state>1</state>
- </option>
- <option>
- <name>Output description</name>
- <state>Full formatting.</state>
- </option>
- <option>
- <name>GOutputBinary</name>
- <state>0</state>
- </option>
- <option>
- <name>FPU</name>
- <version>2</version>
- <state>0</state>
- </option>
- <option>
- <name>OGCoreOrChip</name>
- <state>1</state>
- </option>
- <option>
- <name>GRuntimeLibSelect</name>
- <version>0</version>
- <state>1</state>
- </option>
- <option>
- <name>GRuntimeLibSelectSlave</name>
- <version>0</version>
- <state>1</state>
- </option>
- <option>
- <name>RTDescription</name>
- <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
- </option>
- <option>
- <name>OGProductVersion</name>
- <state>5.41.0.51757</state>
- </option>
- <option>
- <name>OGLastSavedByProductVersion</name>
- <state>6.20.1.52589</state>
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- <option>
- <name>GeneralEnableMisra</name>
- <state>0</state>
- </option>
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- </file>
- <file>
- <name>$PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s</name>
- </file>
- </group>
- <file>
- <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>
- </file>
- <file>
- <name>$PROJ_DIR$\..\..\Source\list.c</name>
- </file>
- <file>
- <name>$PROJ_DIR$\..\..\Source\queue.c</name>
- </file>
- <file>
- <name>$PROJ_DIR$\..\..\Source\tasks.c</name>
- </file>
- </group>
- <file>
- <name>$PROJ_DIR$\startup_efm32.s</name>
- </file>
-</project>
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.eww b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.eww
deleted file mode 100644
index 239a9381ec..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/RTOSDemo.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<workspace>
- <project>
- <path>$WS_DIR$\RTOSDemo.ewp</path>
- </project>
- <batchBuild/>
-</workspace>
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ReadMe.txt b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ReadMe.txt
new file mode 100644
index 0000000000..751d1be36d
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ReadMe.txt
@@ -0,0 +1,8 @@
+If you need the demo that used to be in this directory then download FreeRTOS V8.2.3
+from http://sourceforge.net/projects/freertos/files/FreeRTOS/
+
+See the following link for information on newer EFM32 demos:
+http://www.freertos.org/a00090.html#SILICONLABS
+
+
+
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/chip.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/chip.h
deleted file mode 100644
index 3fed3d9f7e..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/chip.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief Chip initialization, SW workarounds for chip errata issues
- * @author Energy Micro AS
- * @version 1.1.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __CHIP_H
-#define __CHIP_H
-
-#include <stdint.h>
-
-/**************************************************************************//**
- * @brief Chip errata workarounds
- *****************************************************************************/
-static inline void CHIP_init(void)
-{
- uint32_t rev;
- volatile uint32_t *reg;
-
- rev = *(volatile uint32_t *)(0x0FE081FC);
- /* Engineering Sample calibration setup */
- if ((rev >> 24) == 0)
- {
- reg = (volatile uint32_t *) 0x400CA00C;
- *reg &= ~(0x70UL);
- /* DREG */
- reg = (volatile uint32_t *) 0x400C6020;
- *reg &= ~(0xE0000000UL);
- *reg |= ~(7 << 25);
- }
- if ((rev >> 24) <= 1)
- {
- /* DREG */
- reg = (volatile uint32_t *) 0x400C6020;
- *reg &= ~(0x00001F80UL);
- /* Update CMU reset values */
- reg = (volatile uint32_t *) 0x400C8040;
- *reg = 0;
- reg = (volatile uint32_t *) 0x400C8044;
- *reg = 0;
- reg = (volatile uint32_t *) 0x400C8058;
- *reg = 0;
- reg = (volatile uint32_t *) 0x400C8060;
- *reg = 0;
- reg = (volatile uint32_t *) 0x400C8078;
- *reg = 0;
- }
-}
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.c
deleted file mode 100644
index 720c95caab..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief DVK board support package, initialization
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-
-/**************************************************************************//**
- * @brief Initializes DVK, configures board control access
- *****************************************************************************/
-void DVK_init(void)
-{
-#ifdef DVK_EBI_CONTROL
- DVK_EBI_init();
-#endif
-#ifdef DVK_SPI_CONTROL
- DVK_SPI_init();
-#endif
- /* Inform AEM application that we are in Energy Mode 0 by default */
- DVK_setEnergyMode(0);
-}
-
-/**************************************************************************//**
- * @brief Disables DVK, free up resources
- *****************************************************************************/
-void DVK_disable(void)
-{
-#ifdef DVK_EBI_CONTROL
- /* Handover bus control */
- DVK_disableBus();
- /* Disable EBI interface */
- DVK_EBI_disable();
-#endif
-
-#ifdef DVK_SPI_CONTROL
- DVK_SPI_disable();
-#endif
-}
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.h
deleted file mode 100644
index 318e9f0bbd..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Board Support, master header file
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_H
-#define __DVK_H
-
-#include <stdint.h>
-#include "dvk_boardcontrol.h"
-#include "dvk_bcregisters.h"
-
-/* IF not user overrides default, try to decide DVK access interface based on
- * part number */
-#ifndef DVK_SPI_CONTROL
-#ifndef DVK_EBI_CONTROL
-
-#if defined(EFM32G200F16)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G200F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G200F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G210F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G280F128)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G280F32)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G280F64)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F128)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F32)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F64)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G840F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G840F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G840F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F64)
-#define DVK_SPI_CONTROL
-#else
-#define DVK_SPI_CONTROL
-#endif
-
-#endif
-#endif
-
-/* EBI access */
-void DVK_EBI_init(void);
-void DVK_EBI_disable(void);
-
-void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
-uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
-
-/* SPI access */
-void DVK_SPI_init(void);
-void DVK_SPI_disable(void);
-
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
-
-
-/* Accodring to configuration, use either SPI or EBI */
-#ifdef DVK_EBI_CONTROL
-#define DVK_writeRegister(A, B) DVK_EBI_writeRegister(A, B)
-#define DVK_readRegister(A) DVK_EBI_readRegister(A)
-#endif
-
-#ifdef DVK_SPI_CONTROL
-#define DVK_writeRegister(A, B) DVK_SPI_writeRegister(A, B)
-#define DVK_readRegister(A) DVK_SPI_readRegister(A)
-#endif
-
-/* General initialization routines */
-void DVK_init(void);
-void DVK_disable(void);
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_bcregisters.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_bcregisters.h
deleted file mode 100644
index 71dc18318d..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_bcregisters.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief Board Control register definitions
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_BCREGISTERS_H
-#define __DVK_BCREGISTERS_H
-
-#include <stdint.h>
-
-/**************************************************************************//**
- * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
- * i.e. board control registers
- *****************************************************************************/
-#define BC_REGISTER_BASE 0x8c000000
-
-#define BC_CFG ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x00))
-#define BC_EM ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x01))
-#define BC_MAGIC ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x02))
-#define BC_LED ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x03))
-#define BC_PUSHBUTTON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x04))
-#define BC_DIPSWITCH ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x05))
-#define BC_JOYSTICK ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x06))
-#define BC_AEM ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x07))
-#define BC_DISPLAY_CTRL ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x08))
-#define BC_EBI_CFG ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x09))
-#define BC_BUS_CFG ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0a))
-#define BC_PERCTRL ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0c))
-#define BC_AEMSTATE ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0d))
-#define BC_SPI_CFG ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0e))
-#define BC_RESET ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0f))
-#define BC_ADC_START ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x10))
-#define BC_ADC_STATUS ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x11))
-#define BC_ADC_DATA ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x12))
-#define BC_HW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14))
-#define BC_FW_BUILDNO ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15))
-#define BC_FW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16))
-#define BC_SCRATCH_COMMON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17))
-#define BC_SCRATCH_EFM0 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18))
-#define BC_SCRATCH_EFM1 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19))
-#define BC_SCRATCH_EFM2 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A))
-#define BC_SCRATCH_EFM3 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1B))
-#define BC_SCRATCH_BC0 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1C))
-#define BC_SCRATCH_BC1 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1D))
-#define BC_SCRATCH_BC2 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1E))
-#define BC_SCRATCH_BC3 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1f))
-#define BC_INTFLAG ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x20))
-#define BC_INTEN ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x21))
-
-/**************************************************************************//**
- * Defines bit fields for board control registers
- *****************************************************************************/
-#define BC_PERCTRL_ACCEL (1 << 0)
-#define BC_PERCTRL_AMBIENT (1 << 1)
-#define BC_PERCTRL_POTMETER (1 << 2)
-#define BC_PERCTRL_RS232A (1 << 3)
-#define BC_PERCTRL_RS232B (1 << 4)
-#define BC_PERCTRL_SPI (1 << 5)
-#define BC_PERCTRL_I2C (1 << 6)
-#define BC_PERCTRL_IRDA (1 << 7)
-#define BC_PERCTRL_ANALOG_SE (1 << 8)
-#define BC_PERCTRL_ANALOG_DIFF (1 << 9)
-#define BC_PERCTRL_AUDIO_OUT (1 << 10)
-#define BC_PERCTRL_AUDIO_IN (1 << 11)
-#define BC_PERCTRL_ACCEL_GSEL (1 << 12)
-#define BC_PERCTRL_ACCEL_SELFTEST (1 << 13)
-#define BC_PERCTRL_RS232_SHUTDOWN (1 << 14)
-#define BC_PERCTRL_IRDA_SHUTDOWN (1 << 15)
-
-#define BC_INTEN_PB (1 << 0)
-#define BC_INTEN_DIP (1 << 1)
-#define BC_INTEN_JOYSTICK (1 << 2)
-#define BC_INTEN_AEM (1 << 3)
-
-#define BC_CFG_SPI (0)
-#define BC_CFG_EBI (1)
-
-#define BC_MAGIC_VALUE (0xef32)
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.c
deleted file mode 100644
index 456fff1e0e..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Peripheral Board Control API implementation
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-#include "dvk_boardcontrol.h"
-#include "dvk_bcregisters.h"
-
-/**************************************************************************//**
- * @brief Enable EFM32 access to periheral on DVK board
- * @param peri Peripheral to enable
- *****************************************************************************/
-void DVK_enablePeripheral(DVKPeripheral peri)
-{
- uint16_t bit;
- uint16_t tmp;
-
- /* Calculate which bit to set */
- bit = (uint16_t) peri;
-
- /* Read peripheral control register */
- tmp = DVK_readRegister(BC_PERCTRL);
-
- /* Enable peripheral */
- tmp |= bit;
-
- /* Special case for RS232, if enabled disable shutdown */
- if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
- {
- /* clear shutdown bit */
- tmp &= ~(BC_PERCTRL_RS232_SHUTDOWN);
- }
-
- /* Special case for IRDA if enabled disable shutdown */
- if (peri == DVK_IRDA)
- {
- /* clear shutdown bit */
- tmp &= ~(BC_PERCTRL_IRDA_SHUTDOWN);
- }
-
- DVK_writeRegister(BC_PERCTRL, tmp);
-}
-
-/**************************************************************************//**
- * @brief Disable EFM32 access to peripheral on DVK board
- * @param peri Peripheral to disable
- *****************************************************************************/
-void DVK_disablePeripheral(DVKPeripheral peri)
-{
- uint16_t bit;
- uint16_t tmp;
-
- /* Calculate which bit to set */
- bit = (uint16_t) peri;
-
- /* Read peripheral control register */
- tmp = DVK_readRegister(BC_PERCTRL);
-
- /* Disable peripheral */
- tmp &= ~(bit);
-
- /* Special case for RS232, if enabled disable shutdown */
- if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
- {
- /* Set shutdown bit */
- tmp |= (BC_PERCTRL_RS232_SHUTDOWN);
- }
-
- /* Special case for IRDA */
- if (peri == DVK_IRDA)
- {
- /* Set shutdown bit */
- tmp |= (BC_PERCTRL_IRDA_SHUTDOWN);
- }
-
-
- DVK_writeRegister(BC_PERCTRL, tmp);
-}
-
-
-/**************************************************************************//**
- * @brief Enable BUS access
- *****************************************************************************/
-void DVK_enableBus(void)
-{
- /* Enable bus access */
- DVK_writeRegister(BC_BUS_CFG, 1);
-}
-
-
-/**************************************************************************//**
- * @brief Disable BUS access
- *****************************************************************************/
-void DVK_disableBus(void)
-{
- DVK_writeRegister(BC_BUS_CFG, 0);
-}
-
-
-/**************************************************************************//**
- * @brief Inform AEM about current energy mode
- * @param energyMode What energy mode we are going to use next
- *****************************************************************************/
-void DVK_setEnergyMode(uint16_t energyMode)
-{
- DVK_writeRegister(BC_EM, energyMode);
-}
-
-
-/**************************************************************************//**
- * @brief Get status of bush buttons
- * @return Status of push buttons
- *****************************************************************************/
-uint16_t DVK_getPushButtons(void)
-{
- uint16_t tmp;
-
- tmp = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f;
- return tmp;
-}
-
-/**************************************************************************//**
- * @brief Get joystick button status
- * @return Joystick controller status
- *****************************************************************************/
-uint16_t DVK_getJoystick(void)
-{
- uint16_t tmp;
-
- tmp = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f;
- return tmp;
-}
-
-/**************************************************************************//**
- * @brief Get dipswitch status
- * The DIP switches are free for user programmable purposes
- * @return Joystick controller status
- *****************************************************************************/
-uint16_t DVK_getDipSwitch(void)
-{
- uint16_t tmp;
-
- tmp = (~(DVK_readRegister(BC_DIPSWITCH))) & 0x00ff;
- return tmp;
-}
-
-/**************************************************************************//**
- * @brief Sets user leds
- * @param leds 16-bits which enables or disables the board "User leds"
- *****************************************************************************/
-void DVK_setLEDs(uint16_t leds)
-{
- DVK_writeRegister(BC_LED, leds);
-}
-
-/**************************************************************************//**
- * @brief Get status of user LEDs
- * @return Status of 16 user leds, bit 1 = on, bit 0 = off
- *****************************************************************************/
-uint16_t DVK_getLEDs(void)
-{
- return DVK_readRegister(BC_LED);
-}
-
-/**************************************************************************//**
- * @brief Enable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_enableInterrupt(uint16_t flags)
-{
- uint16_t tmp;
-
- /* Add flags to interrupt enable register */
- tmp = DVK_readRegister(BC_INTEN);
- tmp |= flags;
- DVK_writeRegister(BC_INTEN, tmp);
-}
-
-/**************************************************************************//**
- * @brief Disable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_disableInterrupt(uint16_t flags)
-{
- uint16_t tmp;
-
- /* Clear flags from interrupt enable register */
- tmp = DVK_readRegister(BC_INTEN);
- flags = ~(flags);
- tmp &= flags;
- DVK_writeRegister(BC_INTEN, tmp);
-}
-
-/**************************************************************************//**
- * @brief Clear interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_clearInterruptFlags(uint16_t flags)
-{
- DVK_writeRegister(BC_INTFLAG, flags);
-}
-
-/**************************************************************************//**
- * @brief Read interrupt flags
- * @return Returns currently triggered interrupts
- *****************************************************************************/
-uint16_t DVK_getInterruptFlags(void)
-{
- return DVK_readRegister(BC_INTFLAG);
-}
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.h
deleted file mode 100644
index 90280d2a05..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_boardcontrol.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Peripheral Board Control, prototypes and definitions
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_BOARDCONTROL_H
-#define __DVK_BOARDCONTROL_H
-
-#include <stdint.h>
-#include "dvk_bcregisters.h"
-
-/** Periperhal access switches */
-typedef enum
-{
- DVK_ACCEL = BC_PERCTRL_ACCEL,
- DVK_AMBIENT = BC_PERCTRL_AMBIENT,
- DVK_POTMETER = BC_PERCTRL_POTMETER,
- DVK_RS232A = BC_PERCTRL_RS232A,
- DVK_RS232B = BC_PERCTRL_RS232B,
- DVK_SPI = BC_PERCTRL_SPI,
- DVK_I2C = BC_PERCTRL_I2C,
- DVK_IRDA = BC_PERCTRL_IRDA,
- DVK_ANALOG_SE = BC_PERCTRL_ANALOG_SE,
- DVK_ANALOG_DIFF = BC_PERCTRL_ANALOG_DIFF,
- DVK_AUDIO_OUT = BC_PERCTRL_AUDIO_OUT,
- DVK_AUDIO_IN = BC_PERCTRL_AUDIO_IN,
- DVK_ACCEL_GSEL = BC_PERCTRL_ACCEL_GSEL,
- DVK_ACCEL_SELFTEST = BC_PERCTRL_ACCEL_SELFTEST,
- DVK_RS232_SHUTDOWN = BC_PERCTRL_RS232_SHUTDOWN,
- DVK_IRDA_SHUTDOWN = BC_PERCTRL_IRDA_SHUTDOWN,
-} DVKPeripheral;
-
-/* Peripheral Control */
-void DVK_enablePeripheral(DVKPeripheral peri);
-void DVK_disablePeripheral(DVKPeripheral peri);
-void DVK_enableBus(void);
-void DVK_disableBus(void);
-
-/* Read board controllers */
-uint16_t DVK_getPushButtons(void);
-uint16_t DVK_getJoystick(void);
-uint16_t DVK_getDipSwitch(void);
-
-/* Report AEM status */
-void DVK_setEnergyMode(uint16_t energyMode);
-
-/* User LEDs */
-void DVK_setLEDs(uint16_t leds);
-uint16_t DVK_getLEDs(void);
-
-/* Interrupt callback */
-void DVK_enableInterrupt(uint16_t flags);
-void DVK_disableInterrupt(uint16_t flags);
-
-uint16_t DVK_getInterruptFlags(void);
-void DVK_clearInterruptFlags(uint16_t flags);
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_ebi.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_ebi.c
deleted file mode 100644
index 8701365bd1..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_ebi.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief EBI implementation of Board Control interface
- * This implementation works for devices w/o LCD display on the
- * MCU module, specifically the EFM32_G2xx_DK development board
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-/**************************************************************************//**
- * @brief Configure EBI (external bus interface) for Board Control register
- * access
- *****************************************************************************/
-void DVK_EBI_configure(void)
-{
- GPIO_TypeDef *gpio = GPIO;
- EBI_TypeDef *ebi = EBI;
- CMU_TypeDef *cmu = CMU;
-
- /* Run time check if we have EBI on-chip capability on this device */
- switch ((DEVINFO->PART & _DEVINFO_PART_DEVICE_NUMBER_MASK) >>
- _DEVINFO_PART_DEVICE_NUMBER_SHIFT)
- {
- /* Only device types EFM32G 280/290/880 and 890 have EBI capability */
- case 280:
- case 290:
- case 880:
- case 890:
- break;
- default:
- /* This device do not have EBI capability - use SPI to interface DVK */
- /* With high probability your project has been configured for an */
- /* incorrect part number. */
- while (1) ;
- }
-
- /* Enable clocks */
- cmu->HFCORECLKEN0 |= CMU_HFCORECLKEN0_EBI;
- cmu->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
-
- /* Configure bus connect PC bit 12 active low */
- gpio->P[2].MODEH |=
- GPIO_P_MODEH_MODE12_PUSHPULL;
-
- gpio->P[2].DOUT &= ~(1UL << 12);
-
- /* Configure GPIO pins as push pull */
- /* EBI AD9..15 */
- gpio->P[0].MODEL |=
- (GPIO_P_MODEL_MODE0_PUSHPULL |
- GPIO_P_MODEL_MODE1_PUSHPULL |
- GPIO_P_MODEL_MODE2_PUSHPULL |
- GPIO_P_MODEL_MODE3_PUSHPULL |
- GPIO_P_MODEL_MODE4_PUSHPULL |
- GPIO_P_MODEL_MODE5_PUSHPULL |
- GPIO_P_MODEL_MODE6_PUSHPULL);
- /* EBI AD8 */
- gpio->P[0].MODEH |=
- GPIO_P_MODEH_MODE15_PUSHPULL;
- /* EBI CS0-CS3 */
- gpio->P[3].MODEH |=
- (GPIO_P_MODEH_MODE9_PUSHPULL |
- GPIO_P_MODEH_MODE10_PUSHPULL |
- GPIO_P_MODEH_MODE11_PUSHPULL |
- GPIO_P_MODEH_MODE12_PUSHPULL);
- /* EBI AD0..7 */
- gpio->P[4].MODEH |=
- (GPIO_P_MODEH_MODE8_PUSHPULL |
- GPIO_P_MODEH_MODE9_PUSHPULL |
- GPIO_P_MODEH_MODE10_PUSHPULL |
- GPIO_P_MODEH_MODE11_PUSHPULL |
- GPIO_P_MODEH_MODE12_PUSHPULL |
- GPIO_P_MODEH_MODE13_PUSHPULL |
- GPIO_P_MODEH_MODE14_PUSHPULL |
- GPIO_P_MODEH_MODE15_PUSHPULL);
- /* EBI ARDY/ALEN/Wen/Ren */
- gpio->P[5].MODEL |=
- (GPIO_P_MODEL_MODE2_PUSHPULL |
- GPIO_P_MODEL_MODE3_PUSHPULL |
- GPIO_P_MODEL_MODE4_PUSHPULL |
- GPIO_P_MODEL_MODE5_PUSHPULL);
-
- /* Configure EBI controller */
- /* 16 bit address, 16 bit data mode */
- /* Enable bank 0 address map 0x80000000, FPGA Flash */
- /* Enable bank 1 address map 0x84000000, FPGA SRAM */
- /* Enable bank 2 address map 0x88000000, FPGA TFT Display (SSD2119) */
- /* Enable bank 3 address map 0x8c000000, FPGA Board Control Registers */
- ebi->CTRL =
- EBI_CTRL_MODE_D16A16ALE |
- EBI_CTRL_BANK0EN |
- EBI_CTRL_BANK1EN |
- EBI_CTRL_BANK2EN |
- EBI_CTRL_BANK3EN;
-
- /* Setup and hold time */
- ebi->ADDRTIMING = 3 << _EBI_ADDRTIMING_ADDRHOLD_SHIFT | 3 << _EBI_ADDRTIMING_ADDRSET_SHIFT;
-
- /* Default values for all write timing registers, read timing conservative */
- ebi->RDTIMING = 7 << _EBI_RDTIMING_RDSTRB_SHIFT | 3 << _EBI_RDTIMING_RDHOLD_SHIFT | 3 << _EBI_RDTIMING_RDSETUP_SHIFT;
- ebi->WRTIMING = 7 << _EBI_WRTIMING_WRSTRB_SHIFT | 3 << _EBI_WRTIMING_WRHOLD_SHIFT | 3 << _EBI_WRTIMING_WRSETUP_SHIFT;
- ebi->POLARITY = _EBI_POLARITY_RESETVALUE;
-
- /* Toggle on all chip selects for all banks */
- ebi->ROUTE =
- EBI_ROUTE_CS0PEN |
- EBI_ROUTE_CS1PEN |
- EBI_ROUTE_CS2PEN |
- EBI_ROUTE_CS3PEN |
- EBI_ROUTE_ALEPEN |
- EBI_ROUTE_EBIPEN;
-}
-
-
-/**************************************************************************//**
- * @brief Initialize EBI
- * access
- *****************************************************************************/
-void DVK_EBI_init(void)
-{
- uint16_t ebiMagic;
- int ctr;
- volatile int i;
-
- /* Configure EBI */
- DVK_EBI_configure();
- /* Verify that EBI access is working, if not kit is in SPI mode and needs to
- * be configured for EBI access */
- ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
- if (ebiMagic != BC_MAGIC_VALUE)
- {
- /* Disable EBI */
- DVK_EBI_disable();
- /* Enable SPI interface */
- DVK_SPI_init();
- /* Set EBI mode - after this SPI access will no longer be available */
- DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI);
- /* Disable SPI */
- DVK_SPI_disable();
- /* Now setup EBI again */
- DVK_EBI_configure();
- /* Wait until ready */
- ctr = 0;
- do {
- /* Check if FPGA responds */
- ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
- ctr++;
- DVK_EBI_writeRegister(BC_LED, ctr);
- } while (ebiMagic != BC_MAGIC_VALUE);
- }
-}
-
-/**************************************************************************//**
- * @brief Disable EBI interface, free all GPIO pins
- *****************************************************************************/
-void DVK_EBI_disable(void)
-{
- GPIO_TypeDef *gpio = GPIO;
- EBI_TypeDef *ebi = EBI;
- CMU_TypeDef *cmu = CMU;
-
- /* Toggle off all chip selects for all banks */
- ebi->ROUTE = _EBI_ROUTE_RESETVALUE;
-
- /* Disable EBI controller */
- ebi->CTRL = _EBI_CTRL_RESETVALUE;
-
- /* Disable EBI clock */
- cmu->HFCORECLKEN0 &= ~(CMU_HFCORECLKEN0_EBI);
-
- /* Disable EBI _BC_BUS_CONNECT */
- gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE12_MASK);
-
- /* Configure GPIO pins as disabled */
- gpio->P[0].MODEL &= ~(
- _GPIO_P_MODEL_MODE0_MASK |
- _GPIO_P_MODEL_MODE1_MASK |
- _GPIO_P_MODEL_MODE2_MASK |
- _GPIO_P_MODEL_MODE3_MASK |
- _GPIO_P_MODEL_MODE4_MASK |
- _GPIO_P_MODEL_MODE5_MASK |
- _GPIO_P_MODEL_MODE6_MASK);
- gpio->P[0].MODEH &= ~(_GPIO_P_MODEH_MODE15_MASK);
- gpio->P[3].MODEH &= ~(
- _GPIO_P_MODEH_MODE9_MASK|
- _GPIO_P_MODEH_MODE10_MASK|
- _GPIO_P_MODEH_MODE11_MASK|
- _GPIO_P_MODEH_MODE12_MASK
- );
- gpio->P[4].MODEH &= ~(
- _GPIO_P_MODEH_MODE8_MASK |
- _GPIO_P_MODEH_MODE9_MASK |
- _GPIO_P_MODEH_MODE10_MASK |
- _GPIO_P_MODEH_MODE11_MASK |
- _GPIO_P_MODEH_MODE12_MASK |
- _GPIO_P_MODEH_MODE13_MASK |
- _GPIO_P_MODEH_MODE14_MASK |
- _GPIO_P_MODEH_MODE15_MASK);
- gpio->P[5].MODEL &= ~(
- _GPIO_P_MODEL_MODE2_MASK |
- _GPIO_P_MODEL_MODE3_MASK |
- _GPIO_P_MODEL_MODE4_MASK |
- _GPIO_P_MODEL_MODE5_MASK);
-}
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register
- * @param addr Address to board control register
- * @param data Data to write into register
- *****************************************************************************/
-void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
- *addr = data;
-}
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register
- * @param addr Register to read from
- *****************************************************************************/
-uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
-{
- return *addr;
-}
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_spi.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_spi.c
deleted file mode 100644
index 3ba08b0ec7..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/bsp/dvk_spi.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief SPI implementation of Board Control interface
- * This implementation use the USART2 SPI interface to control board
- * control registers. It works
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-#define clear_bit(reg, bit) (reg &= ~(1 << bit))
-
-static volatile uint16_t *lastAddr = 0;
-
-/**************************************************************************//**
- * @brief Initializes USART2 SPI interface for access to FPGA registers
- * for board control
- *****************************************************************************/
-static void spiInit(void)
-{
- USART_TypeDef *usart = USART2;
- GPIO_TypeDef *gpio = GPIO;
- uint32_t clk, spidiv;
- const uint32_t baudrate = 7000000;
- const uint32_t div = (2 * baudrate / 256);
-
- /* Configure SPI bus connect pins */
- gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE13_MASK);
- gpio->P[2].MODEH |= (GPIO_P_MODEH_MODE13_PUSHPULL);
- gpio->P[2].DOUT &= ~(1UL << 13);
-
- /* Configure SPI pins */
- gpio->P[2].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK |
- _GPIO_P_MODEL_MODE3_MASK |
- _GPIO_P_MODEL_MODE4_MASK |
- _GPIO_P_MODEL_MODE5_MASK);
- gpio->P[2].MODEL |= (GPIO_P_MODEL_MODE2_PUSHPULL |
- GPIO_P_MODEL_MODE3_PUSHPULL |
- GPIO_P_MODEL_MODE4_PUSHPULL |
- GPIO_P_MODEL_MODE5_PUSHPULL);
- gpio->P[2].DOUT |= (1UL << 5);
-
- /* Configure USART2 as SPI master with manual CS */
- /* Get peripheral clock - ensure updated SystemCoreClock */
- SystemCoreClockUpdate();
- clk = (SystemCoreClock >> ((CMU->HFPERCLKDIV & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) >>
- _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT));
- /* Drive spi at max 7Mhz or half clockrate if core freq < 14Mhz */
- if (clk < 14000000)
- {
- spidiv = 0;
- }
- else
- {
- spidiv = (clk) / (div) - 256;
- }
-
- /* Never allow higher frequency than specified, round up 1/4 div */
- if (spidiv & 0x3f) spidiv += 0x40;
-
- usart->CLKDIV = spidiv;
- usart->CTRL = USART_CTRL_SYNC;
- usart->CMD = USART_CMD_CLEARRX | USART_CMD_CLEARTX;
- usart->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
- usart->CMD = USART_CMD_MASTEREN | USART_CMD_TXEN | USART_CMD_RXEN;
-}
-
-/**************************************************************************//**
- * @brief Disables GPIO pins and USART2 from FPGA register access
- *****************************************************************************/
-static void spiDisable(void)
-{
- USART_TypeDef *usart = USART2;
- GPIO_TypeDef *gpio = GPIO;
-
- /* Disable USART2 */
- usart->CTRL = _USART_CTRL_RESETVALUE;
- usart->ROUTE = _USART_ROUTE_RESETVALUE;
- usart->CMD = USART_CMD_MASTERDIS | USART_CMD_TXDIS | USART_CMD_RXDIS;
-
- /* Disable SPI pins */
- gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE13_MASK);
- gpio->P[2].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK |
- _GPIO_P_MODEL_MODE3_MASK |
- _GPIO_P_MODEL_MODE4_MASK |
- _GPIO_P_MODEL_MODE5_MASK);
-}
-
-/**************************************************************************//**
- * @brief Performs USART2 SPI Transfer
- *****************************************************************************/
-static uint16_t spiAccess(uint8_t spiadr, uint8_t rw, uint16_t spidata)
-{
- USART_TypeDef *usart = USART2;
- GPIO_TypeDef *gpio = GPIO;
- uint16_t tmp;
-
- clear_bit(gpio->P[2].DOUT, 5);
-
- /* SPI address */
- usart->TXDATA = (spiadr & 0x3) | rw << 3;
- while (!(usart->STATUS & USART_STATUS_TXC)) ;
- tmp = (usart->RXDATA) << 0;
-
- /* SPI data LSB */
- usart->TXDATA = spidata & 0xFF;
- while (!(usart->STATUS & USART_STATUS_TXC)) ;
- tmp = (usart->RXDATA);
-
- /* SPI data MSB */
- usart->TXDATA = spidata >> 8;
- while (!(usart->STATUS & USART_STATUS_TXC)) ;
- tmp |= (usart->RXDATA) << 8;
-
- gpio->P[2].DOUT |= (1 << 5);
-
- return tmp;
-}
-
-/**************************************************************************//**
- * @brief Performs USART2 SPI write to FPGA register
- * @param spiadr Address of register
- * @param spidata Data to write
- *****************************************************************************/
-static void spiWrite(uint8_t spiadr, uint16_t spidata)
-{
- spiAccess(spiadr, 0, spidata);
-}
-
-/**************************************************************************//**
- * @brief Performs USART2 SPI read from FPGA register
- * @param spiadr Address of register
- * @param spidata Dummy data
- *****************************************************************************/
-static uint16_t spiRead(uint8_t spiadr, uint16_t spidata)
-{
- return spiAccess(spiadr, 1, spidata);
-}
-
-/**************************************************************************//**
- * @brief Initializes DVK register access
- *****************************************************************************/
-void DVK_SPI_init(void)
-{
- uint16_t spiMagic;
-
- spiInit();
- /* Read "board control Magic" register to verify SPI is up and running */
- /* if not FPGA is configured to be in EBI mode */
-
- spiMagic = DVK_SPI_readRegister(BC_MAGIC);
- if (spiMagic != BC_MAGIC_VALUE)
- {
- /* Development Kit is configured to use EBI mode, restart of kit required */
- /* to use USART2-SPI for configuration */
- spiDisable();
- while (1) ;
- }
-}
-
-/**************************************************************************//**
- * @brief Disable and free up resources used by SPI board control access
- *****************************************************************************/
-void DVK_SPI_disable(void)
-{
- spiDisable();
-}
-
-/**************************************************************************//**
- * @brief Perform read from DVK board control register
- * @param addr Address of register to read from
- *****************************************************************************/
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
-{
- uint16_t data;
-
- if (addr != lastAddr)
- {
- spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
- spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
- spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
- }
- /* Read twice */
- data = spiRead(0x03, 0);
- data = spiRead(0x03, 0);
- lastAddr = addr;
- return data;
-}
-
-/**************************************************************************//**
- * @brief Perform write to DVK board control register
- * @param addr Address of register to write to
- * @param data 16-bit to write into register
- *****************************************************************************/
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
- if (addr != lastAddr)
- {
- spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
- spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
- spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
- }
- spiWrite(0x03, data); /*Data*/
- lastAddr = addr;
-}
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.c
deleted file mode 100644
index 347e986a3e..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.c
+++ /dev/null
@@ -1,542 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief LCD Controller driver
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#include "FreeRTOS.h"
-#include "task.h"
-
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-#include "efm32.h"
-#include "lcdcontroller.h"
-#include "lcddisplay.h"
-
-/** Counts every n'th frame */
-int frameCounter = 0;
-
-/**************************************************************************//**
- * @brief LCD Interrupt Handler, triggers on frame counter, every n'th frame
- *****************************************************************************/
-void LCD_IRQHandler(void)
-{
- LCD_TypeDef *lcd = LCD;
-
- /* clear interrupt */
- lcd->IFC = 0xFFFFFFFF;
- frameCounter++;
-}
-
-/**************************************************************************//**
- * @brief Enables a segment on the LCD display
- * @param lcd Pointer to LCD register block
- * @param com COM segment number
- * @param bitvalue Bit value for segment
- *****************************************************************************/
-static void LCD_enableSegment(LCD_TypeDef * lcd, int com, int bitvalue)
-{
- switch (com)
- {
- case 0:
- lcd->SEGD0L |= bitvalue;
- break;
- case 1:
- lcd->SEGD1L |= bitvalue;
- break;
- case 2:
- lcd->SEGD2L |= bitvalue;
- break;
- case 3:
- lcd->SEGD3L |= bitvalue;
- break;
- case 4:
- lcd->SEGD0H |= bitvalue;
- break;
- case 5:
- lcd->SEGD1H |= bitvalue;
- break;
- case 6:
- lcd->SEGD2H |= bitvalue;
- break;
- case 7:
- lcd->SEGD3H |= bitvalue;
- break;
- }
-}
-
-/**************************************************************************//**
- * @brief Disables a segment on the LCD Display
- * @param lcd Pointer to LCD register structure
- * @param com COM segment number
- * @param bitvalue Bit value for segment
- *****************************************************************************/
-static void LCD_disableSegment(LCD_TypeDef * lcd, int com, int bitvalue)
-{
- switch (com)
- {
- case 0:
- lcd->SEGD0L &= ~bitvalue;
- break;
- case 1:
- lcd->SEGD1L &= ~bitvalue;
- break;
- case 2:
- lcd->SEGD2L &= ~bitvalue;
- break;
- case 3:
- lcd->SEGD3L &= ~bitvalue;
- break;
- case 4:
- lcd->SEGD0H &= ~bitvalue;
- break;
- case 5:
- lcd->SEGD1H &= ~bitvalue;
- break;
- case 6:
- lcd->SEGD2H &= ~bitvalue;
- break;
- case 7:
- lcd->SEGD3H &= ~bitvalue;
- break;
- }
-}
-
-/**************************************************************************//**
- * @brief Write number on numeric part on LCD display
- * @param lcd Pointer to LCD control block
- * @param value Numeric value to put on display, in range -999 to +9999
- *****************************************************************************/
-void LCD_Number(LCD_TypeDef *lcd, int value)
-{
- int num, i, com, bit, digit, div, neg;
- uint16_t bitpattern;
-
- /* Parameter consistancy check */
- if (value >= 9999)
- {
- value = 9999;
- }
- if (value <= -1000)
- {
- value = -999;
- }
- if (value < 0)
- {
- value = abs(value);
- neg = 1;
- }
- else
- {
- neg = 0;
- }
- /* Extract useful digits */
- div = 1;
- for (digit = 0; digit < 4; digit++)
- {
- num = (value / div) % 10;
- if ((neg == 1) && (digit == 3)) num = 10;
- bitpattern = EM_Numbers[num];
- for (i = 0; i < 7; i++)
- {
- bit = EFMDisplay.Number[digit].bit[i];
- com = EFMDisplay.Number[digit].com[i];
- if (bitpattern & (1 << i))
- {
- LCD_enableSegment(lcd, com, 1 << bit);
- }
- else
- {
- LCD_disableSegment(lcd, com, 1 << bit);
- }
- }
- div = div * 10;
- }
-}
-
-/**************************************************************************//**
- * @brief Turn all segments on numeric display off
- * @param lcd Pointer to LCD register structure
- *****************************************************************************/
-void LCD_NumberOff(LCD_TypeDef *lcd)
-{
- int digit, i, bit, com;
-
- /* Turn off all segments */
- for (digit = 0; digit < 4; digit++)
- {
- for (i = 0; i < 7; i++)
- {
- bit = EFMDisplay.Number[digit].bit[i];
- com = EFMDisplay.Number[digit].com[i];
- LCD_disableSegment(lcd, com, 1 << bit);
- }
- }
- return;
-}
-
-
-/**************************************************************************//**
- * @brief Write text on LCD display
- * @param lcd Pointer to LCD register structure
- * @param string Text string to show on display
- *****************************************************************************/
-void LCD_Write(LCD_TypeDef *lcd, char *string)
-{
- int data, length, index;
- uint16_t bitfield;
- uint32_t value;
- uint32_t com, bit;
- int i;
-
- length = strlen(string);
- index = 0;
- /* fill out all characters on display */
- for (index = 0; index < 7; index++)
- {
- if (index < length)
- {
- data = (int) *string;
- }
- else /* padding with space */
- {
- data = 0x20; /* SPACE */
- }
- /* defined letters currently starts at "SPACE" - 0x20; */
- data = data - 0x20;
- bitfield = EM_alphabet[data];
-
-
- for (i = 0; i < 14; i++)
- {
- bit = EFMDisplay.Text[index].bit[i];
- com = EFMDisplay.Text[index].com[i];
- value = (1 << bit);
-
- if (bitfield & (1 << i))
- {
- /* Turn on segment */
- LCD_enableSegment(lcd, com, value);
- }
- else
- {
- /* Turn off segment */
- LCD_disableSegment(lcd, com, value);
- }
- }
- string++;
- }
- while (lcd->SYNCBUSY) ;
-}
-
-/**************************************************************************//**
- * @brief LCD Disable all segments
- * @param lcd Pointer to LCD register block
- *****************************************************************************/
-void LCD_AllOff(LCD_TypeDef *lcd)
-{
- lcd->SEGD0L = 0x00000000;
- lcd->SEGD0H = 0x00000000;
- lcd->SEGD1L = 0x00000000;
- lcd->SEGD1H = 0x00000000;
- lcd->SEGD2L = 0x00000000;
- lcd->SEGD2H = 0x00000000;
- lcd->SEGD3L = 0x00000000;
- lcd->SEGD3H = 0x00000000;
- while (lcd->SYNCBUSY) ;
-}
-
-/**************************************************************************//**
- * @brief LCD Enable all segments
- * @param lcd Pointer to LCD register block
- *****************************************************************************/
-void LCD_AllOn(LCD_TypeDef *lcd)
-{
- lcd->SEGD0L = 0xffffffff;
- lcd->SEGD0H = 0xffffffff;
- lcd->SEGD1L = 0xffffffff;
- lcd->SEGD1H = 0xffffffff;
- lcd->SEGD2L = 0xffffffff;
- lcd->SEGD2H = 0xffffffff;
- lcd->SEGD3L = 0xffffffff;
- lcd->SEGD3H = 0xffffffff;
- while (lcd->SYNCBUSY) ;
-}
-
-/**************************************************************************//**
- * @brief LCD Light up or shut off Energy Mode indicator
- * @param lcd Pointer to LCD register block
- * @pararm em Energy Mode numer 0 to 4
- * @param on Zero is off, non-zero is on
- *****************************************************************************/
-void LCD_EnergyMode(LCD_TypeDef *lcd, int em, int on)
-{
- uint32_t com, bitvalue;
-
- com = EFMDisplay.EMode.com[em];
- bitvalue = 1 << EFMDisplay.EMode.bit[em];
-
- if (on)
- {
- LCD_enableSegment(lcd, com, bitvalue);
- }
- else
- {
- LCD_disableSegment(lcd, com, bitvalue);
- }
-}
-
-/**************************************************************************//**
- * @brief LCD Light up or shut off Ring of Indicators
- * @param lcd Pointer to LCD register block
- * @param anum "Segment number" on "Ring", range 0 - 7
- * @param on Zero is off, non-zero is on
- *****************************************************************************/
-void LCD_ARing(LCD_TypeDef *lcd, int anum, int on)
-{
- uint32_t com, bitvalue;
-
- com = EFMDisplay.ARing.com[anum];
- bitvalue = 1 << EFMDisplay.ARing.bit[anum];
-
- if (on)
- {
- LCD_enableSegment(lcd, com, bitvalue);
- }
- else
- {
- LCD_disableSegment(lcd, com, bitvalue);
- }
-}
-
-/**************************************************************************//**
- * @brief LCD Light up or shut off various symbols on LCD Display
- * @param lcd Pointer to LCD register block
- * @param s Which symbol to turn on or off
- * @param on Zero is off, non-zero is on
- *****************************************************************************/
-void LCD_Symbol(LCD_TypeDef *lcd, lcdSymbol s, int on)
-{
- int com, bit;
-
- switch (s)
- {
- case LCD_SYMBOL_GECKO:
- com = 3; bit = 8;
- break;
- case LCD_SYMBOL_ANT:
- com = 3; bit = 1;
- break;
- case LCD_SYMBOL_PAD0:
- com = 1; bit = 8;
- break;
- case LCD_SYMBOL_PAD1:
- com = 2; bit = 8;
- break;
- case LCD_SYMBOL_AM:
- com = 4; bit = 0;
- break;
- case LCD_SYMBOL_PM:
- com = 4; bit = 3;
- break;
- case LCD_SYMBOL_EFM32:
- com = 0; bit = 8;
- break;
- case LCD_SYMBOL_MINUS:
- com = 0; bit = 9;
- break;
- case LCD_SYMBOL_COL3:
- com = 0; bit = 16;
- break;
- case LCD_SYMBOL_COL5:
- com = 0; bit = 24;
- break;
- case LCD_SYMBOL_COL10:
- com = 4; bit = 7;
- break;
- case LCD_SYMBOL_DP2:
- com = 4; bit = 2;
- break;
- case LCD_SYMBOL_DP3:
- com = 5; bit = 2;
- break;
- case LCD_SYMBOL_DP4:
- com = 6; bit = 2;
- break;
- case LCD_SYMBOL_DP5:
- com = 7; bit = 2;
- break;
- case LCD_SYMBOL_DP6:
- com = 0; bit = 21;
- break;
- case LCD_SYMBOL_DP10:
- com = 4; bit = 5;
- break;
- }
- if (on)
- {
- LCD_enableSegment(lcd, com, 1 << bit);
- }
- else
- {
- LCD_disableSegment(lcd, com, 1 << bit);
- }
-}
-
-/**************************************************************************//**
- * @brief LCD Light up or shut off Battery Indicator
- * @param lcd Pointer to LCD register block
- * @param batteryLevel Battery Level, 0 to 4 (0 turns all off)
- *****************************************************************************/
-void LCD_Battery(LCD_TypeDef *lcd, int batteryLevel)
-{
- uint32_t com, bitvalue;
- int i, on;
-
- for (i = 0; i < 4; i++)
- {
- if (i < batteryLevel)
- {
- on = 1;
- }
- else
- {
- on = 0;
- }
- com = EFMDisplay.Battery.com[i];
- bitvalue = 1 << EFMDisplay.Battery.bit[i];
-
- if (on)
- {
- LCD_enableSegment(lcd, com, bitvalue);
- }
- else
- {
- LCD_disableSegment(lcd, com, bitvalue);
- }
- }
-}
-
-/**************************************************************************//**
- * @brief LCD Initialization routine for EFM32 DVK display
- * @param lcd Pointer to LCD register block
- *****************************************************************************/
-void LCD_Init(LCD_TypeDef *lcd)
-{
- CMU_TypeDef *cmu = CMU;
-
- /* Enable LFXO oscillator */
- cmu->OSCENCMD |= CMU_OSCENCMD_LFXOEN;
- while (!(cmu->STATUS & CMU_STATUS_LFXORDY)) ;
-
- /* Enable LCD clock in CMU */
- cmu->LFACLKEN0 |= CMU_LFACLKEN0_LCD;
-
- /* Select LFXO for LCD */
- cmu->LFCLKSEL = CMU_LFCLKSEL_LFA_LFXO | CMU_LFCLKSEL_LFB_LFXO;
-
- /* LCD Controller Prescaler (divide by 1) */
- /* CLKlcd = 0.25 kHz */
- cmu->LFAPRESC0 &= ~_CMU_LFAPRESC0_LCD_MASK;
- cmu->LFAPRESC0 |= _CMU_LFAPRESC0_LCD_DIV128 << _CMU_LFAPRESC0_LCD_SHIFT;
-
- /* Set up interrupt handler */
- lcd->IEN = 0;
- while (lcd->SYNCBUSY) ;
-
- /* Clear pending interrupts */
- lcd->IFC = ~0;
- /* Enable interrupt */
- NVIC_EnableIRQ(LCD_IRQn);
- lcd->IEN = LCD_IEN_FC;
-
- /* Frame rate is 32Hz, 0.25Khz LFCLK128, QUADRUPLEX mode, FDIV=0 */
- lcd->DISPCTRL = LCD_DISPCTRL_MUX_QUADRUPLEX |
- LCD_DISPCTRL_BIAS_ONETHIRD |
- LCD_DISPCTRL_WAVE_LOWPOWER |
- LCD_DISPCTRL_CONLEV_MAX |
- LCD_DISPCTRL_VLCDSEL_VDD |
- LCD_DISPCTRL_VBLEV_3V00;
-
- /* No voltage boost, framerate 32Hz */
- cmu->LCDCTRL = 0;
-
- /* Turn all segments off */
- LCD_AllOff(lcd);
-
- /* Enable all segment registers */
- lcd->SEGEN = 0x000003FF;
- lcd->CTRL = LCD_CTRL_EN | LCD_CTRL_UDCTRL_FRAMESTART;
- while (lcd->SYNCBUSY) ;
-
- /* Configure LCD to give a frame counter interrupt every 8th frame. */
- lcd->BACTRL = LCD_BACTRL_FCEN | (7 << _LCD_BACTRL_FCTOP_SHIFT) | (0 << _LCD_BACTRL_FCPRESC_SHIFT);
- while (lcd->SYNCBUSY) ;
- lcd->IFC = LCD_IFC_FC;
- lcd->IEN = LCD_IEN_FC;
-}
-
-
-/**************************************************************************//**
- * @brief Disables LCD controller
- * @param lcd Pointer to LCD register block
- *****************************************************************************/
-void LCD_Disable(LCD_TypeDef *lcd)
-{
- CMU_TypeDef *cmu = CMU;
-
- /* Turn off interrupts */
- lcd->IEN = 0x00000000;
- lcd->IFC = LCD_IFC_FC;
- NVIC_DisableIRQ(LCD_IRQn);
- /* Disable LCD */
- lcd->CTRL = 0;
- /* Turn off LCD clock */
- cmu->LFACLKEN0 &= ~(CMU_LFACLKEN0_LCD);
- /* Turn off voltage boost if enabled */
- cmu->LCDCTRL = 0;
-}
-
-/**************************************************************************//**
- * @brief LCD scrolls a text over the display, sort of "polled printf"
- * @param lcd Pointer to LCD register block
- *****************************************************************************/
-void LCD_ScrollText(LCD_TypeDef *lcd, char *scrolltext)
-{
- int i, len;
- char buffer[8];
-
- buffer[7] = 0x00;
- len = strlen(scrolltext);
- if (len < 7) return;
- for (i = 0; i < (len - 7); i++)
- {
- memcpy(buffer, scrolltext + i, 7);
- LCD_Write(lcd, buffer);
- vTaskDelay(100/portTICK_PERIOD_MS);
- }
-}
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.h
deleted file mode 100644
index 605bea4fad..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcdcontroller.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief LCD Controller header file
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef _LCDCONTROLLER_H
-#define _LCDCONTROLLER_H
-
-#include "efm32.h"
-
-/* Range of symbols available on display */
-typedef enum
-{
- LCD_SYMBOL_GECKO,
- LCD_SYMBOL_ANT,
- LCD_SYMBOL_PAD0,
- LCD_SYMBOL_PAD1,
- LCD_SYMBOL_AM,
- LCD_SYMBOL_PM,
- LCD_SYMBOL_EFM32,
- LCD_SYMBOL_MINUS,
- LCD_SYMBOL_COL3,
- LCD_SYMBOL_COL5,
- LCD_SYMBOL_COL10,
- LCD_SYMBOL_DP2,
- LCD_SYMBOL_DP3,
- LCD_SYMBOL_DP4,
- LCD_SYMBOL_DP5,
- LCD_SYMBOL_DP6,
- LCD_SYMBOL_DP10,
-} lcdSymbol;
-
-/* Regular functions */
-void LCD_Init(LCD_TypeDef *lcd);
-void LCD_IRQHandler(void);
-void LCD_Disable(LCD_TypeDef *lcd);
-
-void LCD_AllOff(LCD_TypeDef *lcd);
-void LCD_AllOn(LCD_TypeDef *lcd);
-
-void LCD_ARing(LCD_TypeDef *lcd, int anum, int on);
-void LCD_Battery(LCD_TypeDef *lcd, int batteryLevel);
-void LCD_EnergyMode(LCD_TypeDef *lcd, int em, int on);
-void LCD_Number(LCD_TypeDef *lcd, int value);
-void LCD_NumberOff(LCD_TypeDef *lcd);
-void LCD_Symbol(LCD_TypeDef *lcd, lcdSymbol s, int on);
-void LCD_Write(LCD_TypeDef *lcd, char *string);
-void LCD_ScrollText(LCD_TypeDef *lcd, char *scrolltext);
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcddisplay.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcddisplay.h
deleted file mode 100644
index fe798604f6..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcd/lcddisplay.h
+++ /dev/null
@@ -1,391 +0,0 @@
-/**************************************************************************//**
- * @file
- * @brief LCD Controller font and display layout for EFM32 development MCU
- * module
- * @author Energy Micro AS
- * @version 1.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
- ******************************************************************************
- *
- * This source code is the property of Energy Micro AS. The source and compiled
- * code may only be used on Energy Micro "EFM32" microcontrollers.
- *
- * This copyright notice may not be removed from the source code nor changed.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- ****************************************************************************/
-
-#ifndef _LCDDISPLAY_H
-#define _LCDDISPLAY_H
-
-#include <stdint.h>
-/**************************************************************************//**
- * @brief
- * Defines each text symbol's segment in terms of COM and BIT numbers,
- * in a way that we can enumerate each bit for each text segment in the
- * following bit pattern:
- * @verbatim
- * -------0------
- *
- * | \7 |8 /9 |
- * |5 \ | / |1
- *
- * --6--- ---10--
- *
- * | / | \11 |
- * |4 /13 |12 \ |2
- *
- * -------3------
- * @endverbatim
- * E.g.: First text character bit pattern #3 (above) is
- * Segment 1D for Display
- * Location COM 3, BIT 0
- *****************************************************************************/
-typedef struct
-{
- uint32_t com[14]; /**< LCD COM line (for multiplexing) */
- uint32_t bit[14]; /**< LCD bit number */
-} CHAR_TypeDef;
-
-
-/**************************************************************************//**
- * @brief Defines segment COM and BIT fields numeric display
- *****************************************************************************/
-typedef struct
-{
- uint32_t com[7];
- uint32_t bit[7];
-} NUMBER_TypeDef;
-
-/**************************************************************************//**
- * @brief Defines segment COM and BIT fields for Energy Modes on display
- *****************************************************************************/
-typedef struct
-{
- uint32_t com[5]; /**< LCD COM line (for multiplexing) */
- uint32_t bit[5]; /**< LCD bit number */
-} EM_TypeDef;
-
-/**************************************************************************//**
- * @brief Defines segment COM and BIT fields for A-wheel (suited for Anim)
- *****************************************************************************/
-typedef struct
-{
- uint32_t com[8]; /**< LCD COM line (for multiplexing) */
- uint32_t bit[8]; /**< LCD bit number */
-} ARING_TypeDef;
-
-/**************************************************************************//**
- * @brief Defines segment COM and BIT fields for A-wheel (suited for Anim)
- *****************************************************************************/
-typedef struct
-{
- uint32_t com[4]; /**< LCD COM line (for multiplexing) */
- uint32_t bit[4]; /**< LCD bit number */
-} BATTERY_TypeDef;
-
-/**************************************************************************//**
- * @brief Defines prototype for all segments in display
- *****************************************************************************/
-typedef struct
-{
- CHAR_TypeDef Text[7];
- NUMBER_TypeDef Number[4];
- EM_TypeDef EMode;
- ARING_TypeDef ARing;
- BATTERY_TypeDef Battery;
-} MCU_DISPLAY;
-
-/**************************************************************************//**
- * @brief Working instance of LCD display
- *****************************************************************************/
-MCU_DISPLAY EFMDisplay = {
- .Text = {
- { /* 1 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 10, .bit[1] = 12, .bit[2] = 12, .bit[3] = 10,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 9, .bit[5] = 9, .bit[6] = 9, .bit[7] = 10,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 11, .bit[9] = 11, .bit[10] = 12, .bit[11] = 11,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 11, .bit[13] = 10
- },
- { /* 2 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 14, .bit[1] = 16, .bit[2] = 16, .bit[3] = 14,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 13, .bit[5] = 13, .bit[6] = 13, .bit[7] = 14,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 15, .bit[9] = 15, .bit[10] = 16, .bit[11] = 15,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 15, .bit[13] = 14
- },
- { /* 3 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 18, .bit[1] = 20, .bit[2] = 20, .bit[3] = 18,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 17, .bit[5] = 17, .bit[6] = 17, .bit[7] = 18,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 19, .bit[9] = 19, .bit[10] = 20, .bit[11] = 19,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 19, .bit[13] = 18
- },
- { /* 4 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 22, .bit[1] = 24, .bit[2] = 24, .bit[3] = 22,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 21, .bit[5] = 21, .bit[6] = 21, .bit[7] = 22,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 23, .bit[9] = 23, .bit[10] = 24, .bit[11] = 23,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 23, .bit[13] = 22
- },
- { /* 5 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 25, .bit[1] = 6, .bit[2] = 6, .bit[3] = 25,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 7, .bit[5] = 7, .bit[6] = 7, .bit[7] = 25,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 26, .bit[9] = 26, .bit[10] = 6, .bit[11] = 26,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 26, .bit[13] = 25
- },
- { /* 6 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 27, .bit[1] = 04, .bit[2] = 04, .bit[3] = 27,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 5, .bit[5] = 5, .bit[6] = 5, .bit[7] = 27,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 28, .bit[9] = 28, .bit[10] = 4, .bit[11] = 28,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 28, .bit[13] = 27
- },
- { /* 7 */
- .com[0] = 3, .com[1] = 3, .com[2] = 1, .com[3] = 0,
- .bit[0] = 29, .bit[1] = 2, .bit[2] = 2, .bit[3] = 29,
-
- .com[4] = 1, .com[5] = 3, .com[6] = 2, .com[7] = 2,
- .bit[4] = 03, .bit[5] = 3, .bit[6] = 3, .bit[7] = 29,
-
- .com[8] = 2, .com[9] = 3, .com[10] = 2, .com[11] = 0,
- .bit[8] = 30, .bit[9] = 30, .bit[10] = 2, .bit[11] = 30,
-
- .com[12] = 1, .com[13] = 1,
- .bit[12] = 30, .bit[13] = 29
- }
- },
- .Number = {
- {
- .com[0] = 3, .com[1] = 2, .com[2] = 1, .com[3] = 0,
- .bit[0] = 31, .bit[1] = 31, .bit[2] = 31, .bit[3] = 31,
-
- .com[4] = 5, .com[5] = 7, .com[6] = 6,
- .bit[4] = 0, .bit[5] = 0, .bit[6] = 0,
- },
- {
- .com[0] = 7, .com[1] = 6, .com[2] = 5, .com[3] = 4,
- .bit[0] = 1, .bit[1] = 1, .bit[2] = 1, .bit[3] = 1,
-
- .com[4] = 5, .com[5] = 7, .com[6] = 6,
- .bit[4] = 3, .bit[5] = 3, .bit[6] = 3,
- },
- {
- .com[0] = 7, .com[1] = 6, .com[2] = 5, .com[3] = 4,
- .bit[0] = 4, .bit[1] = 4, .bit[2] = 4, .bit[3] = 4,
-
- .com[4] = 5, .com[5] = 7, .com[6] = 6,
- .bit[4] = 5, .bit[5] = 5, .bit[6] = 5,
- },
- {
- .com[0] = 7, .com[1] = 6, .com[2] = 5, .com[3] = 4,
- .bit[0] = 6, .bit[1] = 6, .bit[2] = 6, .bit[3] = 6,
-
- .com[4] = 5, .com[5] = 7, .com[6] = 6,
- .bit[4] = 7, .bit[5] = 7, .bit[6] = 7,
- },
- },
- .EMode = {
- .com[0] = 1, .bit[0] = 1,
- .com[1] = 2, .bit[1] = 1,
- .com[2] = 1, .bit[2] = 0,
- .com[3] = 2, .bit[3] = 0,
- .com[4] = 3, .bit[4] = 0,
- },
- .ARing = {
- .com[0] = 0, .bit[0] = 0,
- .com[1] = 0, .bit[1] = 1,
- .com[2] = 0, .bit[2] = 2,
- .com[3] = 0, .bit[3] = 3,
-
- .com[4] = 0, .bit[4] = 4,
- .com[5] = 0, .bit[5] = 5,
- .com[6] = 0, .bit[6] = 6,
- .com[7] = 0, .bit[7] = 7,
- },
- .Battery = {
- .com[0] = 0, .bit[0] = 12,
- .com[1] = 0, .bit[1] = 17,
- .com[2] = 0, .bit[2] = 20,
- .com[3] = 0, .bit[3] = 13,
- }
-};
-
-/**************************************************************************//**
- * @brief
- * Defines higlighted segments for the alphabet, starting from "blank" (SPACE)
- * Uses bit pattern as defined for text segments above.
- * E.g. a capital O, would have bits 0 1 2 3 4 5 => 0x003f defined
- *****************************************************************************/
-uint16_t EM_alphabet[] = {
- 0x0000, /* space */
- 0x1100, /* ! */
- 0x0280, /* " */
- 0x0000, /* # */
- 0x0000, /* $ */
- 0x0000, /* % */
- 0x0000, /* & */
- 0x0000, /* � */
- 0x0039, /* ( */
- 0x000f, /* ) */
- 0x0000, /* * */
- 0x1540, /* + */
- 0x0000, /* , */
- 0x0440, /* - */
- 0x0000, /* . */
- 0x2200, /* / */
-
- 0x003f, /* 0 */
- 0x0006, /* 1 */
- 0x045b, /* 2 */
- 0x044f, /* 3 */
- 0x0466, /* 4 */
- 0x046d, /* 5 */
- 0x047d, /* 6 */
- 0x0007, /* 7 */
- 0x047f, /* 8 */
- 0x046f, /* 9 */
-
- 0x0000, /* : */
- 0x0000, /* ; */
- 0x0a00, /* < */
- 0x0000, /* = */
- 0x2080, /* > */
- 0x0000, /* ? */
- 0xffff, /* @ */
-
- 0x0477, /* A */
- 0x0a79, /* B */
- 0x0039, /* C */
- 0x20b0, /* D */
- 0x0079, /* E */
- 0x0071, /* F */
- 0x047d, /* G */
- 0x0476, /* H */
- 0x0006, /* I */
- 0x000e, /* J */
- 0x0a70, /* K */
- 0x0038, /* L */
- 0x02b6, /* M */
- 0x08b6, /* N */
- 0x003f, /* O */
- 0x0473, /* P */
- 0x083f, /* Q */
- 0x0c73, /* R */
- 0x046d, /* S */
- 0x1101, /* T */
- 0x003e, /* U */
- 0x2230, /* V */
- 0x2836, /* W */
- 0x2a80, /* X */
- 0x046e, /* Y */
- 0x2209, /* Z */
-
- 0x0039, /* [ */
- 0x0880, /* backslash */
- 0x000f, /* ] */
- 0x0001, /* ^ */
- 0x0008, /* _ */
- 0x0100, /* ` */
-
- 0x1058, /* a */
- 0x047c, /* b */
- 0x0058, /* c */
- 0x045e, /* d */
- 0x2058, /* e */
- 0x0471, /* f */
- 0x0c0c, /* g */
- 0x0474, /* h */
- 0x0004, /* i */
- 0x000e, /* j */
- 0x0c70, /* k */
- 0x0038, /* l */
- 0x1454, /* m */
- 0x0454, /* n */
- 0x045c, /* o */
- 0x0473, /* p */
- 0x0467, /* q */
- 0x0450, /* r */
- 0x0c08, /* s */
- 0x0078, /* t */
- 0x001c, /* u */
- 0x2010, /* v */
- 0x2814, /* w */
- 0x2a80, /* x */
- 0x080c, /* y */
- 0x2048, /* z */
-
- 0x0000,
-};
-
-/**************************************************************************//**
- * @brief
- * Defines higlighted segments for the numeric display
- *****************************************************************************/
-uint16_t EM_Numbers[] =
-{
- 0x003f, /* 0 */
- 0x0006, /* 1 */
- 0x005b, /* 2 */
- 0x004f, /* 3 */
- 0x0066, /* 4 */
- 0x006d, /* 5 */
- 0x007d, /* 6 */
- 0x0007, /* 7 */
- 0x007f, /* 8 */
- 0x006f, /* 9 */
- 0x0040, /* - */
-};
-
-#endif
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.c
deleted file mode 100644
index d61533fe71..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-/* Kernel includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* Demo includes. */
-#include "lcdtest.h"
-
-#define lcdSHORT_DELAY ( 60 / portTICK_PERIOD_MS )
-#define lcdQUARTER_SECOND ( 250 / portTICK_PERIOD_MS )
-#define lcdONE_SECOND ( 1000 / portTICK_PERIOD_MS )
-
-void vLCDTask( void *pvParameters )
-{
-long x;
-LCD_TypeDef *xLCD = LCD;
-char *pcScrollText = "FreeRTOS Energy Micro ";
-
- /* Loop through various different displays. */
- for( ;; )
- {
- /* Start by scrolling some text. */
- LCD_ScrollText( xLCD, pcScrollText );
- LCD_AllOff( xLCD );
-
- /* Count down from 100 on the number section of the LCD display. */
- for( x = 100; x > 0; x--)
- {
- LCD_Number( xLCD, x );
- vTaskDelay( 10 );
- }
- LCD_NumberOff( xLCD );
-
- /* Turn on gecko and EFM32 symbol. */
- LCD_Symbol( xLCD, LCD_SYMBOL_GECKO, 1 );
- LCD_Symbol( xLCD, LCD_SYMBOL_EFM32, 1 );
- LCD_Write( xLCD, " Gecko " );
- vTaskDelay( lcdONE_SECOND );
-
- LCD_AllOn( xLCD);
- vTaskDelay( lcdONE_SECOND );
-
- LCD_AllOff( xLCD);
- LCD_Write( xLCD, "OOOOOOO" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, "XXXXXXX" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, "+++++++" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, "@@@@@@@" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, "ENERGY " );
- vTaskDelay( lcdQUARTER_SECOND );
- LCD_Write( xLCD, "@@ERGY " );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " @@RGY " );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " M@@GY " );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " MI@@Y " );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " MIC@@ " );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " MICR@@" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " MICRO@" );
- vTaskDelay( lcdSHORT_DELAY );
- LCD_Write( xLCD, " MICRO " );
- vTaskDelay( lcdQUARTER_SECOND );
- LCD_Write( xLCD, "-EFM32-" );
- vTaskDelay( lcdQUARTER_SECOND );
- }
-}
\ No newline at end of file
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.h b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.h
deleted file mode 100644
index 6f69c029a8..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/lcdtest.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef _LCDTEST_H
-#define _LCDTEST_H
-
-#include "FreeRTOS.h"
-#include "task.h"
-
-#include "lcdcontroller.h"
-
-/*
- * The task that writes to the LCD.
- */
-void vLCDTask( void *pvParameters );
-
-#endif
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.c
deleted file mode 100644
index bebc5205c9..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-/* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* Demo app includes. */
-#include "ledtest.h"
-
-#define lLEDOnE_SECOND ( 1000UL / portTICK_PERIOD_MS )
-
-void vLEDTask( void *pvParameters )
-{
-long lLEDOn = pdTRUE, x;
-
- for( ;; )
- {
- for( x = 8; x < 16; x++ )
- {
- /*Depending on if lLEDOn is true or false, turn on or off led number i*/
- vParTestSetLED( x,lLEDOn );
-
- /*Delay for 1000 ms*/
- vTaskDelay( lLEDOnE_SECOND );
- }
-
- /*After the for loop, we flip lLEDOn. On the next run through the
- for loop above, the leds will be flipped.*/
- lLEDOn = ~lLEDOn;
- }
-}
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/main.c b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/main.c
deleted file mode 100644
index 9bb7a25c8d..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/main.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-
-/*
- * Creates all the demo application tasks, then starts the scheduler. The WEB
- * documentation provides more details of the standard demo application tasks.
- * In addition to the standard demo tasks, the following tasks and tests are
- * defined and/or created within this file:
- *
- * "LCD test" task - the LCD task writes a continually repeating series of patterns
- * to the LCD display.
- *
- * "LED test" task - This is a very simple task that just turns on user LEDs
- * 8 to 15 in turn, before turning them off again.
- *
- * "Check task" - The check task only runs every five seconds but has the highest
- * priority so is guaranteed to get processing time. Its main job is to inspect
- * all the other standard demo tasks to ensure they are executing without error.
- * The Check task will toggle LED 0 every five seconds while no errors exist,
- * with the toggle frequency increasing to 200ms should an error be detected in
- * any other task.
- *
- * Both the check task and the idle task place the processor into energy saving
- * mode 1, which will be exited following each tick interrupt. The check task
- * is the highest priority task in the system, so while it is executing no other
- * task will execute. If the check task places the processor into a low power
- * mode without blocking then the energy consumption as viewed on the Energy
- * Micro Gecko board will go down noticeably as in effect no tasks will be running.
- * The check task places the processor into low power mode for two out of every
- * five seconds. The current use of low power modes is very basic. Future
- * FreeRTOS releases will aim to make significant improvements.
- *
- */
- /* Scheduler includes. */
-#include "FreeRTOS.h"
-#include "croutine.h"
-#include "task.h"
-#include "queue.h"
-#include "semphr.h"
-
-/* Common demo application includes. */
-#include "partest.h"
-#include "GenQTest.h"
-#include "QPeek.h"
-#include "recmutex.h"
-#include "semtest.h"
-
-/* Demo application includes. */
-#include "lcdcontroller.h"
-#include "ledtest.h"
-#include "lcdtest.h"
-#include "chip.h"
-
-/* Task priorities. */
-#define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
-#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
-#define mainGEN_Q_TASK_PRIORITY ( tskIDLE_PRIORITY )
-#define mainSEMAPHORE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
-#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
-
-/* A period of two seconds, adjusted to use the tick frequency. */
-#define mainTWO_SECONDS ( 2000 / portTICK_PERIOD_MS )
-
-/* The length of the delay between each cycle of the check task when an error
-has / has not been detected. */
-#define mainNO_ERROR_CHECK_FREQUENCY ( 5000 / portTICK_PERIOD_MS )
-#define mainERROR_CHECK_FREQUENCY ( 200 / portTICK_PERIOD_MS )
-
-/* The LED that is toggled by the check task. The rate of the toggle indicates
-whether or not an error has been found, as defined by the
-mainNO_ERROR_CHECK_FREQUENCY and mainERROR_CHECK_FREQUENCY definitions above. */
-#define mainCHECK_LED ( 0 )
-
-/*-----------------------------------------------------------*/
-
-/*
- * Configure the hardware as required by the demo.
- */
-static void prvSetupHardware( void );
-
-/*
- * The check task as described at the top of this file.
- */
-static void prvCheckTask( void *pvParameters );
-
-/*
- * Put the CPU into the least low power low power mode.
- */
-static void prvLowPowerMode1( void );
-
-/*-----------------------------------------------------------*/
-
-int main( void )
-{
- /* Perform the necessary hardware configuration. */
- prvSetupHardware();
-
- /* Create the task that writes various text and patterns to the LCD. */
- xTaskCreate( vLCDTask, "LCD", configMINIMAL_STACK_SIZE, NULL, mainLCD_TASK_PRIORITY, NULL );
-
- /* Create a task that writes to LEDs 8 to 15. */
- xTaskCreate( vLEDTask, "LEDTask", configMINIMAL_STACK_SIZE, NULL, mainLED_TASK_PRIORITY, NULL );
-
- /* Create some of the standard demo tasks. These just test the port and
- demonstrate how the FreeRTOS API can be used. They do not provide any
- specific functionality. */
- vStartGenericQueueTasks( mainGEN_Q_TASK_PRIORITY );
- vStartQueuePeekTasks();
- vStartRecursiveMutexTasks();
- vStartSemaphoreTasks( mainSEMAPHORE_TASK_PRIORITY );
-
- /* Create the check task as described at the top of this file. */
- xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
-
- /* Start the scheduler. */
- vTaskStartScheduler();
-
- /* The scheduler should now be running the tasks so the following code should
- never be reached. If it is reached then there was insufficient heap space
- for the idle task to be created. In this case the heap size is set by
- configTOTAL_HEAP_SIZE in FreeRTOSConfig.h. */
- for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationIdleHook( void )
-{
- /* Use the idle task to place the CPU into a low power mode. Greater power
- saving could be achieved by not including any demo tasks that never block. */
- prvLowPowerMode1();
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
-{
- /* This function will be called if a task overflows its stack, if
- configCHECK_FOR_STACK_OVERFLOW != 0. It might be that the function
- parameters have been corrupted, depending on the severity of the stack
- overflow. When this is the case pxCurrentTCB can be inspected in the
- debugger to find the offending task. */
- for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckTask( void *pvParameters )
-{
-TickType_t xLastExecutionTime, xFrequency = mainNO_ERROR_CHECK_FREQUENCY;
-long lCount;
-
- /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
- works correctly. */
- xLastExecutionTime = xTaskGetTickCount();
-
- for( ;; )
- {
- /* Perform this check at a frequency that indicates whether or not an
- error has been found. */
- vTaskDelayUntil( &xLastExecutionTime, xFrequency );
-
- /* Check all the other tasks are running without error. */
- if( xAreGenericQueueTasksStillRunning() != pdPASS )
- {
- xFrequency = mainERROR_CHECK_FREQUENCY;
- }
-
- if( xAreQueuePeekTasksStillRunning() != pdPASS )
- {
- xFrequency = mainERROR_CHECK_FREQUENCY;
- }
-
- if( xAreRecursiveMutexTasksStillRunning() != pdPASS )
- {
- xFrequency = mainERROR_CHECK_FREQUENCY;
- }
-
- if( xAreSemaphoreTasksStillRunning() != pdPASS )
- {
- xFrequency = mainERROR_CHECK_FREQUENCY;
- }
-
- /* Toggle the LED to show that the check hook function is running.
- The toggle freequency will increase if an error has been found in any
- task. */
- vParTestToggleLED( mainCHECK_LED );
-
- /* Just loop around putting the processor into low power mode 1 for
- a while. This is the highest priority task, and this loop does not
- cause it to block, so it will remain as the running task. Each time it
- runs for the next two seconds it will simply put the processor to sleep.
- No other task will run so nothing else will happen. This periodic two
- seconds of lower power should be viewable using the Advanced Energy
- Monitor on the Energy Micro Gecko board. */
- for( lCount = 0; lCount < mainTWO_SECONDS; lCount++ )
- {
- prvLowPowerMode1();
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvSetupHardware( void )
-{
- /* Initialise the LEDs. */
- vParTestInitialise();
-
- /* Configure the LCD. */
- LCD_Init( LCD );
-}
-/*-----------------------------------------------------------*/
-
-static void prvLowPowerMode1( void )
-{
- /* Clear SLEEPDEEP for EM1 */
- SCB->SCR &= ~( 1 << SCB_SCR_SLEEPDEEP_Pos );
-
- /* Power down. */
- __DSB();
- __WFI();
-}
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.cspy.bat b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.cspy.bat
deleted file mode 100644
index e3c9e7993c..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.cspy.bat
+++ /dev/null
@@ -1,15 +0,0 @@
-@REM This batch file has been generated by the IAR Embedded Workbench
-@REM C-SPY Debugger, as an aid to preparing a command line for running
-@REM the cspybat command line utility using the appropriate settings.
-@REM
-@REM You can launch cspybat by typing the name of this batch file followed
-@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
-@REM Note that this file is generated every time a new debug session
-@REM is initialized, so you may want to move or rename the file before
-@REM making changes.
-@REM
-
-
-"C:\devtools\IAR Systems\Embedded Workbench 6.0\common\bin\cspybat" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armproc.dll" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armjlink.dll" %1 --plugin "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\bin\armbat.dll" --flash_loader "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\config\flashloader\EnergyMicro\FlashEFM32.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "C:\devtools\IAR Systems\Embedded Workbench 6.0\arm\CONFIG\debugger\EnergyMicro\EFM32G890F128.ddf" "--semihosting" "--device=EFM32G890F128" "--drv_communication=USB0" "--jlink_speed=auto" "--jlink_initial_speed=32" "--jlink_reset_strategy=0,0" "--jlink_interface=SWD" "--drv_catch_exceptions=0x000" "--drv_swo_clock_setup=72000000,0,2000000"
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dbgdt b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dbgdt
deleted file mode 100644
index 8fdf1b1c38..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dbgdt
+++ /dev/null
@@ -1,79 +0,0 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<Project>
- <Desktop>
- <Static>
- <Debug-Log>
-
-
- <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1622</ColumnWidth1></Debug-Log>
- <Build>
- <ColumnWidth0>20</ColumnWidth0>
- <ColumnWidth1>1216</ColumnWidth1>
- <ColumnWidth2>324</ColumnWidth2>
- <ColumnWidth3>81</ColumnWidth3>
- </Build>
- <Workspace>
- <ColumnWidths>
-
-
-
-
- <Column0>231</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
- </Workspace>
- <Disassembly>
-
-
-
- <PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><MixedMode>1</MixedMode><CodeCovShow>0</CodeCovShow><InstrProfShow>0</InstrProfShow></Disassembly>
- <Watch><Format><struct_types/><watch_formats/></Format><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><Column0>100</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></Watch></Static>
- <Windows>
-
-
-
- <Wnd2>
- <Tabs>
- <Tab>
- <Identity>TabID-7696-3812</Identity>
- <TabName>Debug Log</TabName>
- <Factory>Debug-Log</Factory>
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- <Tab>
- <Identity>TabID-7174-3822</Identity>
- <TabName>Build</TabName>
- <Factory>Build</Factory>
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- <Tabs>
- <Tab>
- <Identity>TabID-18445-3816</Identity>
- <TabName>Workspace</TabName>
- <Factory>Workspace</Factory>
- <Session>
-
- <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Energy Micro Code</ExpandedNode><ExpandedNode>RTOSDemo/Energy Micro Code/bsp</ExpandedNode><ExpandedNode>RTOSDemo/FreeRTOS source</ExpandedNode></NodeDict></Session>
- </Tab>
- </Tabs>
-
- <SelectedTab>0</SelectedTab></Wnd3></Windows>
- <Editor>
-
-
-
-
- <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>60</YPos><SelStart>4045</SelStart><SelEnd>4045</SelEnd></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\Source\portable\MemMang\heap_2.c</Filename><XPos>0</XPos><YPos>251</YPos><SelStart>10647</SelStart><SelEnd>10666</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\..\..\..\..\..\devtools\IAR Systems\Embedded Workbench 5.4\arm\INC\DLib_Product_string.h</Filename><XPos>0</XPos><YPos>36</YPos><SelStart>1408</SelStart><SelEnd>1408</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\..\Common\Minimal\GenQTest.c</Filename><XPos>0</XPos><YPos>321</YPos><SelStart>18528</SelStart><SelEnd>18528</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\ParTest.c</Filename><XPos>0</XPos><YPos>68</YPos><SelStart>4153</SelStart><SelEnd>4153</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\bsp\dvk_boardcontrol.c</Filename><XPos>0</XPos><YPos>163</YPos><SelStart>5883</SelStart><SelEnd>5883</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
- <Positions>
-
-
-
-
-
- <Top><Row0><Sizes><Toolbar-00abb208><key>iaridepm.enu1</key></Toolbar-00abb208><Toolbar-02dfc390><key>debuggergui.enu1</key></Toolbar-02dfc390></Sizes></Row0></Top><Left><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>305</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>182738</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd3></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
- </Desktop>
-</Project>
-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dni b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dni
deleted file mode 100644
index 1525b10b6c..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.dni
+++ /dev/null
@@ -1,105 +0,0 @@
-[DebugChecksum]
-Checksum=-346520476
-[DisAssemblyWindow]
-NumStates=_ 1
-State 1=_ 1
-[InstructionProfiling]
-Enabled=_ 0
-[CodeCoverage]
-Enabled=_ 0
-[Profiling]
-Enabled=0
-[StackPlugin]
-Enabled=0
-OverflowWarningsEnabled=1
-WarningThreshold=90
-SpWarningsEnabled=0
-WarnHow=0
-UseTrigger=1
-TriggerName=main
-LimitSize=0
-ByteLimit=50
-[TraceHelper]
-Enabled=0
-ShowSource=1
-[JLinkDriver]
-SWOInfo_CpuClock=0x044AA200
-SWOInfo_SWOClockAutoDetect=0
-SWOInfo_JtagSpeed=0x001E8480
-SWOInfo_SWOPrescaler=0x00000024
-SWOInfo_SWOClockWanted=0x001E8480
-SWOInfo_HWTraceEnabled=1
-SWOInfo_TimestampsEnabled=1
-SWOInfo_TimestampsPrescalerIndex=0x00000000
-SWOInfo_TimestampsPrescalerData=0x00000000
-SWOInfo_PCSamplingEnabled=0
-SWOInfo_PCSamplingCYCTAP=0x00000001
-SWOInfo_PCSamplingPOSTCNT=0x0000000F
-SWOInfo_DataLogMode=0x00000000
-SWOInfo_CPIEnabled=0
-SWOInfo_EXCEnabled=0
-SWOInfo_SLEEPEnabled=0
-SWOInfo_LSUEnabled=0
-SWOInfo_FOLDEnabled=0
-SWOInfo_EXCTRCEnabled=1
-SWOInfo_ITMPortsEnabled=0x00000000
-SWOInfo_ITMPortsTermIO=0x00000000
-SWOInfo_ITMPortsLogFile=0x00000000
-SWOInfo_ITMLogFile=$PROJ_DIR$\ITM.log
-[Log file]
-LoggingEnabled=_ 0
-LogFile=_ ""
-Category=_ 0
-[TermIOLog]
-LoggingEnabled=_ 0
-LogFile=_ ""
-[DataLog]
-LogEnabled=0
-SumEnabled=0
-ShowTimeLog=1
-ShowTimeSum=1
-[TraceHelperExtra]
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-ShowSource=1
-[DriverProfiling]
-Enabled=0
-Source=4
-Graph=0
-[Breakpoints]
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-[Stack]
-FillEnabled=0
-OverflowWarningsEnabled=1
-WarningThreshold=90
-SpWarningsEnabled=1
-WarnLogOnly=1
-UseTrigger=1
-TriggerName=main
-LimitSize=0
-ByteLimit=50
-[InterruptLog]
-LogEnabled=1
-SumEnabled=1
-GraphEnabled=0
-ShowTimeLog=1
-ShowTimeSum=1
-SumSortOrder=0
-[Interrupts]
-Enabled=1
-[MemoryMap]
-Enabled=0
-Base=0
-UseAuto=0
-TypeViolation=1
-UnspecRange=1
-ActionState=1
-[Trace1]
-Enabled=0
-ShowSource=1
-[Disassemble mode]
-mode=1
-[Breakpoints2]
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-[Aliases]
-Count=0
-SuppressDialog=0
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.wsdt b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.wsdt
deleted file mode 100644
index ec80e1cfb7..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo.wsdt
+++ /dev/null
@@ -1,77 +0,0 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<Workspace>
- <ConfigDictionary>
-
- <CurrentConfigs><Project>RTOSDemo/Debug</Project></CurrentConfigs></ConfigDictionary>
- <Desktop>
- <Static>
- <Workspace>
- <ColumnWidths>
-
-
-
-
- <Column0>228</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
- </Workspace>
- <Build>
-
-
-
-
- <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1216</ColumnWidth1><ColumnWidth2>324</ColumnWidth2><ColumnWidth3>81</ColumnWidth3></Build>
- <TerminalIO/>
- <Debug-Log>
-
-
- <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1622</ColumnWidth1></Debug-Log>
- </Static>
- <Windows>
-
-
- <Wnd0>
- <Tabs>
- <Tab>
- <Identity>TabID-28378-3630</Identity>
- <TabName>Workspace</TabName>
- <Factory>Workspace</Factory>
- <Session>
-
- <NodeDict><ExpandedNode>RTOSDemo</ExpandedNode><ExpandedNode>RTOSDemo/Demo</ExpandedNode><ExpandedNode>RTOSDemo/Output</ExpandedNode></NodeDict></Session>
- </Tab>
- </Tabs>
-
- <SelectedTab>0</SelectedTab></Wnd0><Wnd1>
- <Tabs>
- <Tab>
- <Identity>TabID-11879-3734</Identity>
- <TabName>Build</TabName>
- <Factory>Build</Factory>
- <Session/>
- </Tab>
- <Tab>
- <Identity>TabID-7638-1339</Identity>
- <TabName>Debug Log</TabName>
- <Factory>Debug-Log</Factory>
- <Session/>
- </Tab>
- </Tabs>
-
- <SelectedTab>0</SelectedTab></Wnd1></Windows>
- <Editor>
-
-
-
-
- <Pane><Tab><Factory>TextEditor</Factory><Filename>$WS_DIR$\main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
- <Positions>
-
-
-
-
-
- <Top><Row0><Sizes><Toolbar-01336218><key>iaridepm.enu1</key></Toolbar-01336218></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>740</Bottom><Right>302</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>119048</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>180952</sizeVertCX><sizeVertCY>755601</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1682</Right><x>-2</x><y>-2</y><xscreen>1684</xscreen><yscreen>200</yscreen><sizeHorzCX>1002381</sizeHorzCX><sizeHorzCY>203666</sizeHorzCY><sizeVertCX>119048</sizeVertCX><sizeVertCY>203666</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
- </Desktop>
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-
-
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo_Debug.jlink b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo_Debug.jlink
deleted file mode 100644
index e49918734a..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/settings/RTOSDemo_Debug.jlink
+++ /dev/null
@@ -1,14 +0,0 @@
-[FLASH]
-SkipProgOnCRCMatch = 1
-VerifyDownload = 1
-AllowCaching = 1
-EnableFlashDL = 2
-Override = 0
-Device="ADUC7020X62"
-[BREAKPOINTS]
-ShowInfoWin = 1
-EnableFlashBP = 2
-BPDuringExecution = 0
-[CPU]
-OverrideMemMap = 0
-AllowSimulation = 1
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/startup_efm32.s b/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/startup_efm32.s
deleted file mode 100644
index ef0128092e..0000000000
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/startup_efm32.s
+++ /dev/null
@@ -1,323 +0,0 @@
-;/*************************************************************************//**
-; * @file: startup_efm32.s
-; * @purpose: CMSIS Cortex-M3 Core Device Startup File
-; * for the Energy Micro 'EFM32G' Device Series
-; * @version 1.0.2
-; * @date: 10. September 2009
-; *----------------------------------------------------------------------------
-; *
-; * Copyright (C) 2009 ARM Limited. All rights reserved.
-; *
-; * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
-; * processor based microcontrollers. This file can be freely distributed
-; * within development tools that are supporting such ARM based processors.
-; *
-; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-; *
-; ******************************************************************************/
-
-
-;
-; The modules in this file are included in the libraries, and may be replaced
-; by any user-defined modules that define the PUBLIC symbol _program_start or
-; a user defined start symbol.
-; To override the cstartup defined in the library, simply add your modified
-; version to the workbench project.
-;
-; The vector table is normally located at address 0.
-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
-; The name "__vector_table" has special meaning for C-SPY:
-; it is where the SP start value is found, and the NVIC vector
-; table register (VTOR) is initialized to this address if != 0.
-;
-; Cortex-M version
-;
- MODULE ?cstartup
-
- ;; Forward declaration of sections.
- SECTION CSTACK:DATA:NOROOT(3)
-
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- EXTERN SystemInit
- PUBLIC __vector_table
- PUBLIC __vector_table_0x1c
- PUBLIC __Vectors
- PUBLIC __Vectors_End
- PUBLIC __Vectors_Size
-
- DATA
-
-__vector_table
- DCD sfe(CSTACK)
- DCD Reset_Handler
-
- DCD NMI_Handler
- DCD HardFault_Handler
- DCD MemManage_Handler
- DCD BusFault_Handler
- DCD UsageFault_Handler
-__vector_table_0x1c
- DCD 0
- DCD 0
- DCD 0
- DCD 0
- DCD vPortSVCHandler
- DCD DebugMon_Handler
- DCD 0
- DCD xPortPendSVHandler
- DCD xPortSysTickHandler
-
- ; External Interrupts
- DCD DMA_IRQHandler ; 0: DMA Interrupt
- DCD GPIO_EVEN_IRQHandler ; 1: GPIO_EVEN Interrupt
- DCD TIMER0_IRQHandler ; 2: TIMER0 Interrupt
- DCD USART0_RX_IRQHandler ; 3: USART0_RX Interrupt
- DCD USART0_TX_IRQHandler ; 4: USART0_TX Interrupt
- DCD ACMP0_IRQHandler ; 5: ACMP0 Interrupt
- DCD ADC0_IRQHandler ; 6: ADC0 Interrupt
- DCD DAC0_IRQHandler ; 7: DAC0 Interrupt
- DCD I2C0_IRQHandler ; 8: I2C0 Interrupt
- DCD GPIO_ODD_IRQHandler ; 9: GPIO_ODD Interrupt
- DCD TIMER1_IRQHandler ; 10: TIMER1 Interrupt
- DCD TIMER2_IRQHandler ; 11: TIMER2 Interrupt
- DCD USART1_RX_IRQHandler ; 12: USART1_RX Interrupt
- DCD USART1_TX_IRQHandler ; 13: USART1_TX Interrupt
- DCD USART2_RX_IRQHandler ; 14: USART2_RX Interrupt
- DCD USART2_TX_IRQHandler ; 15: USART2_TX Interrupt
- DCD UART0_RX_IRQHandler ; 16: UART0_RX Interrupt
- DCD UART0_TX_IRQHandler ; 17: UART0_TX Interrupt
- DCD LEUART0_IRQHandler ; 18: LEUART0 Interrupt
- DCD LEUART1_IRQHandler ; 19: LEUART1 Interrupt
- DCD LETIMER0_IRQHandler ; 20: LETIMER0 Interrupt
- DCD PCNT0_IRQHandler ; 21: PCNT0 Interrupt
- DCD PCNT1_IRQHandler ; 22: PCNT1 Interrupt
- DCD PCNT2_IRQHandler ; 23: PCNT2 Interrupt
- DCD SYSTICCK_IRQHandler;DCD RTC_IRQHandler ; 24: RTC Interrupt
- DCD CMU_IRQHandler ; 25: CMU Interrupt
- DCD VCMP_IRQHandler ; 26: VCMP Interrupt
- DCD LCD_IRQHandler ; 27: LCD Interrupt
- DCD MSC_IRQHandler ; 28: MSC Interrupt
- DCD AES_IRQHandler ; 29: AES Interrupt
-
-__Vectors_End
-__Vectors EQU __vector_table
-__Vectors_Size EQU __Vectors_End - __Vectors
-
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Default interrupt handlers.
-;;
- THUMB
-
- PUBWEAK Reset_Handler
- SECTION .text:CODE:REORDER(2)
-Reset_Handler
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__iar_program_start
- BX R0
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:REORDER(1)
-NMI_Handler
- B NMI_Handler
-
- PUBWEAK HardFault_Handler
- SECTION .text:CODE:REORDER(1)
-HardFault_Handler
- B HardFault_Handler
-
- PUBWEAK MemManage_Handler
- SECTION .text:CODE:REORDER(1)
-MemManage_Handler
- B MemManage_Handler
-
- PUBWEAK BusFault_Handler
- SECTION .text:CODE:REORDER(1)
-BusFault_Handler
- B BusFault_Handler
-
- PUBWEAK UsageFault_Handler
- SECTION .text:CODE:REORDER(1)
-UsageFault_Handler
- B UsageFault_Handler
-
- PUBWEAK vPortSVCHandler
- SECTION .text:CODE:REORDER(1)
-vPortSVCHandler
- B vPortSVCHandler
-
- PUBWEAK DebugMon_Handler
- SECTION .text:CODE:REORDER(1)
-DebugMon_Handler
- B DebugMon_Handler
-
- PUBWEAK xPortPendSVHandler
- SECTION .text:CODE:REORDER(1)
-xPortPendSVHandler
- B xPortPendSVHandler
-
- PUBWEAK SYSTICCK_IRQHandler
- SECTION .text:CODE:REORDER(1)
-SYSTICCK_IRQHandler
- B SYSTICCK_IRQHandler
- ; EFM32G specific interrupt handlers
-
- PUBWEAK DMA_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DMA_IRQHandler
- B DMA_IRQHandler
-
- PUBWEAK GPIO_EVEN_IRQHandler
- SECTION .text:CODE:REORDER(1)
-GPIO_EVEN_IRQHandler
- B GPIO_EVEN_IRQHandler
-
- PUBWEAK TIMER0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIMER0_IRQHandler
- B TIMER0_IRQHandler
-
- PUBWEAK USART0_RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART0_RX_IRQHandler
- B USART0_RX_IRQHandler
-
- PUBWEAK USART0_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART0_TX_IRQHandler
- B USART0_TX_IRQHandler
-
- PUBWEAK ACMP0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ACMP0_IRQHandler
- B ACMP0_IRQHandler
-
- PUBWEAK ADC0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-ADC0_IRQHandler
- B ADC0_IRQHandler
-
- PUBWEAK DAC0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-DAC0_IRQHandler
- B DAC0_IRQHandler
-
- PUBWEAK I2C0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-I2C0_IRQHandler
- B I2C0_IRQHandler
-
- PUBWEAK GPIO_ODD_IRQHandler
- SECTION .text:CODE:REORDER(1)
-GPIO_ODD_IRQHandler
- B GPIO_ODD_IRQHandler
-
- PUBWEAK TIMER1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIMER1_IRQHandler
- B TIMER1_IRQHandler
-
- PUBWEAK TIMER2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-TIMER2_IRQHandler
- B TIMER2_IRQHandler
-
- PUBWEAK USART1_RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART1_RX_IRQHandler
- B USART1_RX_IRQHandler
-
- PUBWEAK USART1_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART1_TX_IRQHandler
- B USART1_TX_IRQHandler
-
- PUBWEAK USART2_RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART2_RX_IRQHandler
- B USART2_RX_IRQHandler
-
- PUBWEAK USART2_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-USART2_TX_IRQHandler
- B USART2_TX_IRQHandler
-
- PUBWEAK UART0_RX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-UART0_RX_IRQHandler
- B UART0_RX_IRQHandler
-
- PUBWEAK UART0_TX_IRQHandler
- SECTION .text:CODE:REORDER(1)
-UART0_TX_IRQHandler
- B UART0_TX_IRQHandler
-
- PUBWEAK LEUART0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-LEUART0_IRQHandler
- B LEUART0_IRQHandler
-
- PUBWEAK LEUART1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-LEUART1_IRQHandler
- B LEUART1_IRQHandler
-
- PUBWEAK LETIMER0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-LETIMER0_IRQHandler
- B LETIMER0_IRQHandler
-
- PUBWEAK PCNT0_IRQHandler
- SECTION .text:CODE:REORDER(1)
-PCNT0_IRQHandler
- B PCNT0_IRQHandler
-
- PUBWEAK PCNT1_IRQHandler
- SECTION .text:CODE:REORDER(1)
-PCNT1_IRQHandler
- B PCNT1_IRQHandler
-
- PUBWEAK PCNT2_IRQHandler
- SECTION .text:CODE:REORDER(1)
-PCNT2_IRQHandler
- B PCNT2_IRQHandler
-
- PUBWEAK xPortSysTickHandler
- SECTION .text:CODE:REORDER(1)
-xPortSysTickHandler
- B xPortSysTickHandler
-
- PUBWEAK CMU_IRQHandler
- SECTION .text:CODE:REORDER(1)
-CMU_IRQHandler
- B CMU_IRQHandler
-
- PUBWEAK VCMP_IRQHandler
- SECTION .text:CODE:REORDER(1)
-VCMP_IRQHandler
- B VCMP_IRQHandler
-
- PUBWEAK LCD_IRQHandler
- SECTION .text:CODE:REORDER(1)
-LCD_IRQHandler
- B LCD_IRQHandler
-
- PUBWEAK MSC_IRQHandler
- SECTION .text:CODE:REORDER(1)
-MSC_IRQHandler
- B MSC_IRQHandler
-
- PUBWEAK AES_IRQHandler
- SECTION .text:CODE:REORDER(1)
-AES_IRQHandler
- B AES_IRQHandler
-
- END
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/FreeRTOSConfig.h
index 89325a633f..382c5e5aa3 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/ParTest.c b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/ParTest.c
index d5142be2ad..f27bfc8f2d 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main-full.c b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main-full.c
index 2157ab407e..6ac557bcbd 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main_blinky.c b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main_blinky.c
index e81ea48899..99142682f5 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/uIP_Task.c b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/uIP_Task.c
index 120bde920c..fc97fdd5ec 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.c b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.c
index 2f2343899b..3332aaaac1 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.c
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.h b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.h
index cd6730e485..4c149a6c8a 100644
--- a/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.h
+++ b/FreeRTOS/Demo/CORTEX_Kinetis_K60_Tower_IAR/webserver/EMAC.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
index 889b7973e2..6112ebf68b 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
index 5b2d7af371..60bcd4a6f6 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo1/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
index 6e93458775..5c9732b4f4 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
index 9bcefa38ad..c55c317648 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/Demo2/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
index 709ba9bf1e..84fbefa7ec 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
index 011b521d41..bb3c9a266d 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/main.c
index 5b2d7af371..60bcd4a6f6 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
index 709ba9bf1e..84fbefa7ec 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
index 011b521d41..bb3c9a266d 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
index 8c1f155adc..6127412a52 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
index 5094df7543..06d06f5185 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
index 011b521d41..bb3c9a266d 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
index b065a8a91a..1eee5b40fa 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
index 1e3f0860d1..b03a40427c 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
index 8708c83029..a4323c2bb4 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
index 9295ee1e19..4561b21481 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
index fb7dfab82e..c3a06c2262 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
index 011b521d41..bb3c9a266d 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.c b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.c
index c23f84c858..629a3a52c8 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.h b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.h
index 0fe023ac9e..ad3fcf41aa 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/commstest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/main.c b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/main.c
index e14d331136..8383342241 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S316_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S316_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
index 885ae2ff98..836c34513d 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_GCC/main.c b/FreeRTOS/Demo/CORTEX_LM3S811_GCC/main.c
index 3e5170c3d5..9f24d0095f 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
index ed26a02c8d..30a4a270ab 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_IAR/main.c b/FreeRTOS/Demo/CORTEX_LM3S811_IAR/main.c
index 2cf9b3bf86..22267bdc1b 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
index f9416173d9..0512c8b8d8 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
index fab319a62c..4a9b1942d7 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/main.c b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/main.c
index ff9f466150..d4e88d17f3 100644
--- a/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3S811_KEIL/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
index 8c9a332ace..b801c9a444 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.c
index c928aaa965..21eb82e5b1 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c
index 6b56f89a59..931c93ae1c 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c
index 2e7d6b26da..ccf1c2b793 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c
index 4861eb134f..e21fb1a233 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c
index 15a01ccb79..bfd7293984 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c
index 8aad159546..71966947f7 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/FreeRTOSConfig.h
index 1b4e6c714e..910fdc84d3 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.c
index c928aaa965..21eb82e5b1 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/ParTest/ParTest.c
index 6b56f89a59..931c93ae1c 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/main.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/main.c
index 91f5826700..0c1603a967 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/main.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/timertest.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/timertest.c
index 86f3a5deb2..615c85d6f8 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/emac.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/emac.c
index 83bd670971..fa4d5f6e08 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/uIP_Task.c
index 8ba142866c..026ae2909c 100644
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_Rowley/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h
index 8d451ca909..7a379ed8c2 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/ParTest.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/ParTest.c
index fa3abc4372..74038a12ea 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
index 5250391241..47542bc51f 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/emac.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/emac.c
index 8a5a9d3fc9..bdb745984e 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/uIP_Task.c
index 7a489b6fb1..41242fc850 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_RedSuite/src/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/FreeRTOSConfig.h
index 75860dd36f..0d63f35e9b 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/LED.h b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/LED.h
index 2e5fe3ebd6..023c948e2d 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/LED.h
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/LED.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/ParTest.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/ParTest.c
index 8dac7f77ae..898b704c91 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/main.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/main.c
index c9c1ddc771..654d0acdfa 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/main.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/emac.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/emac.c
index 4a5ed3b9ab..e971ba416d 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/uIP_Task.c
index 11fb219d0d..e41567a6ec 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_GCC_Rowley/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/FreeRTOSConfig.h
index 20c27aedd7..c9d26fae93 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/LED.h b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/LED.h
index 2e5fe3ebd6..023c948e2d 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/LED.h
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/LED.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/ParTest.c b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/ParTest.c
index 7bf822e733..f7311b0924 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/main.c b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/main.c
index 223ed8abea..e90d5c9915 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/emac.c b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/emac.c
index 1a9414f861..4d6f164fa0 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/uIP_Task.c
index 11fb219d0d..e41567a6ec 100644
--- a/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_LPC1768_IAR/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c
index f69af5fbc3..9a01212974 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c
index dcc09449ac..ab3e26d0b2 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c
index 8c591bc2ae..7a117b2329 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h
index 626008d170..9f31d40ad2 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h
index e63a299dce..4a73313a13 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c
index 91e93df888..8af6e73288 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c
index 243693c00a..38c7e5e9a1 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c
index 56fbe59e1a..732edecec6 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c
index b7c7eae1aa..864a04191a 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h
index 394c75bb06..44c98a56a1 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
index 0aa73f522b..4740bf491f 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s
index b0af6545f8..1259e0baf3 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
;
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c
index 02023a1477..2a098b46a0 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c
index 584c81fbce..50433fa299 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c
index bc8460371e..e60206017f 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c
index 2ed5809cd5..1a39583b34 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c
index 9ad1794651..4fafea4a8c 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
index f13397017c..1c52b1c862 100644
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h
index 9027095bae..d4ea980250 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c
index 7f0b566e99..11ff1de290 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c
index ecb984f11c..83d2eb6777 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c
index ae5363687b..05c428eb4e 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c
index 4499a65fdf..c5e4b65f1f 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c
index e1fb152d32..2ed253d5b7 100644
--- a/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c
+++ b/FreeRTOS/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h
index db1b00a585..ab9ac582cf 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c
index e422ff0572..b6f272fda8 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s
index f5afa0304f..8baf1512d8 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
index a959e62945..6e7b98d23c 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c
index 4f82e54292..fb4bb2f86f 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main.c b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main.c
index 53537fcde9..d5ed37c2d7 100644
--- a/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_M0_STM32F0518_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.c
index adce3bc52c..f385ee932c 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/ParTest.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/ParTest.c
index abfa6a78ce..cb17213f78 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/RunTimeStatsTimer.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/RunTimeStatsTimer.c
index 99553c92be..123426d9e6 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/RunTimeStatsTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/RunTimeStatsTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
index 53d702bed3..24c86bfe26 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/config/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main.c
index 04a2d75e5a..dc81b9b24c 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_blinky.c
index 9336e8c258..115c5be711 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_full.c
index eeb4a74a48..7c89b163a9 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_ATSAM4E_Atmel_Studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h
index b6e7ec3b48..526b47903d 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c
index 05fac0ecc0..c274fde0b7 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c
index bc0eda66b9..359dea55f6 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c
index d89c69eae1..b282f84d25 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c
index 45f66dd1da..0ce33166ef 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h
index db2bb01a9c..8af92a4ba2 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c
index f74f6588a1..3467e5a524 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c
index a698b9fcab..7acd9b8a2d 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c
index d22be6a24d..464f669abe 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h
new file mode 100644
index 0000000000..dba6cf4133
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h
@@ -0,0 +1,251 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+
+/* Set configCREATE_LOW_POWER_DEMO to one to run the simple blinky demo low power
+example, or 1 to run the more comprehensive test and demo application. See
+the comments at the top of main.c for more information. */
+#define configCREATE_LOW_POWER_DEMO 0
+
+/* Some configuration is dependent on the demo being built. */
+#if( configCREATE_LOW_POWER_DEMO == 1 )
+
+ /* The low power demo uses a slow low power clock, so the SysTick clock,
+ which is used by default by Cortex-M ports, is not used to generate the
+ tick interrupt. */
+ #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 1
+
+ /* The slow clock used to generate the tick interrupt in the low power demo
+ runs at 32768Hz. Ensure the clock is a multiple of the tick rate. */
+ #define configTICK_RATE_HZ ( 128 )
+
+ /* The low power demo uses the tickless idle feature. */
+ #define configUSE_TICKLESS_IDLE 1
+
+#else
+
+ /* Some of the standard demo test tasks assume a tick rate of 1KHz, even
+ though that is faster than would normally be warranted by a real
+ application. */
+ #define configTICK_RATE_HZ ( 1000 )
+
+ /* The full demo always has tasks to run so the tick will never be turned
+ off. The blinky demo will use the default tickless idle implementation to
+ turn the tick off. */
+ #define configUSE_TICKLESS_IDLE 0
+
+#endif
+
+#define configUSE_PREEMPTION 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configUSE_QUEUE_SETS 1
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 1
+#define configCPU_CLOCK_HZ 48000000
+#define configMAX_PRIORITIES ( 5 )
+#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 190 )
+#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 25 * 1024 ) )
+#define configMAX_TASK_NAME_LEN ( 10 )
+#define configUSE_TRACE_FACILITY 0
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_MUTEXES 1
+#define configQUEUE_REGISTRY_SIZE 0
+#define configCHECK_FOR_STACK_OVERFLOW 2
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_MALLOC_FAILED_HOOK 1
+#define configUSE_APPLICATION_TASK_TAG 0
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configSUPPORT_STATIC_ALLOCATION 1
+
+/* Run time stats gathering definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
+#define portGET_RUN_TIME_COUNTER_VALUE()
+
+/* This demo makes use of one or more example stats formatting functions. These
+format the raw data provided by the uxTaskGetSystemState() function in to human
+readable ASCII form. See the notes in the implementation of vTaskList() within
+FreeRTOS/Source/tasks.c for limitations. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
+#define configTIMER_QUEUE_LENGTH 5
+#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet 1
+#define INCLUDE_uxTaskPriorityGet 1
+#define INCLUDE_vTaskDelete 1
+#define INCLUDE_vTaskCleanUpResources 1
+#define INCLUDE_vTaskSuspend 1
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_eTaskGetState 1
+#define INCLUDE_xTimerPendFunctionCall 1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS 3 /* 7 priority levels */
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x7
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define xPortPendSVHandler PendSV_Handler
+#define vPortSVCHandler SVC_Handler
+#define xPortSysTickHandler SysTick_Handler
+
+/* Cannot bracket x when using MikroC. */
+#define configASSERT( x ) if( x == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
+
+/* Adjustments required to build the FreeRTOS source code when using the MikroC
+compiler follow --------------------------------------------------------------*/
+
+/* NOTE! Must purge invalid paths if the MikroC project is moved. */
+/* MikroC won't build the FreeRTOS code when const is used, so remove it. */
+#define const
+
+/* The compiler needs to be told functions that are only referenced by
+pointer are to be included in the build. NOTE: Omitting these lines will
+result in a run-time crash, not a linker error! */
+#pragma funcall main_full prvCheckTask prvRegTestTaskEntry1 prvRegTestTaskEntry2
+#pragma funcall vStartDynamicPriorityTasks xSuspendedTestQueue vContinuousIncrementTask vLimitedIncrementTask vCounterControlTask vQueueSendWhenSuspendedTask vQueueReceiveWhenSuspendedTask
+#pragma funcall vStartBlockingQueueTasks vBlockingQueueConsumer vBlockingQueueProducer vBlockingQueueConsumer vBlockingQueueProducer vBlockingQueueProducer vBlockingQueueConsumer
+#pragma funcall vStartMathTasks vCompetingMathTask1 vCompetingMathTask2 vCompetingMathTask3 vCompetingMathTask4
+#pragma funcall vStartEventGroupTasks prvTestSlaveTask prvTestMasterTask prvSyncTask xSyncTask2
+#pragma funcall vStartTaskNotifyTask prvNotifiedTask
+#pragma funcall vCreateBlockTimeTasks vPrimaryBlockTimeTestTask vSecondaryBlockTimeTestTask
+#pragma funcall vStartDynamicPriorityTasks vContinuousIncrementTask vLimitedIncrementTask vCounterControlTask vQueueSendWhenSuspendedTask vQueueReceiveWhenSuspendedTask
+#pragma funcall vStartGenericQueueTasks prvSendFrontAndBackTest prvLowPriorityMutexTask prvMediumPriorityMutexTask prvHighPriorityMutexTask
+#pragma funcall vStartTimerDemoTask prvTimerTestTask
+#pragma funcall prvTimerTestTask prvOneShotTimerCallback
+#pragma funcall prvTest1_CreateTimersWithoutSchedulerRunning prvAutoReloadTimerCallback prvISRAutoReloadTimerCallback prvISROneShotTimerCallback
+#pragma funcall vStartInterruptQueueTasks prvHigherPriorityNormallyEmptyTask prvHigherPriorityNormallyEmptyTask prvLowerPriorityNormallyEmptyTask prv1stHigherPriorityNormallyFullTask prv2ndHigherPriorityNormallyFullTask prvLowerPriorityNormallyFullTask
+#pragma funcall vStartBlockingQueueTasks vBlockingQueueConsumer vBlockingQueueProducer vBlockingQueueConsumer vBlockingQueueProducer vBlockingQueueProducer vBlockingQueueConsumer
+#pragma funcall vStartCountingSemaphoreTasks prvCountingSemaphoreTask
+#pragma funcall vStartRecursiveMutexTasks prvRecursiveMutexControllingTask prvRecursiveMutexBlockingTask prvRecursiveMutexPollingTask
+#pragma funcall vStartSemaphoreTasks prvSemaphoreTest
+#pragma funcall vCreateSuicidalTasks vCreateTasks
+#pragma funcall vCreateTasks vSuicidalTask vSuicidalTask
+
+#define configTOGGLE_LED() do{ ulLED++; GPIO_OUTPUT_PIN_154_bit = ( ulLED & 0x01UL ); } while( 0 )
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* FREERTOS_CONFIG_H */
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RTOSDemo.mcpar b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RTOSDemo.mcpar
new file mode 100644
index 0000000000..4b5dda76b2
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RTOSDemo.mcpar
@@ -0,0 +1,194 @@
+[DEVICE]
+Name=CEC1302
+Clock=16000000
+[MEMORY_MODEL]
+Value=0
+[BUILD_TYPE]
+Value=1
+[ACTIVE_TAB]
+Value=..\main.c
+[USE_EEPROM]
+Value=0
+[USE_HEAP]
+Value=0
+[HEAP_SIZE]
+Value=0
+[EEPROM_DEFINITION]
+Value=
+[FILES]
+Count=20
+File0=..\..\..\Source\tasks.c
+File1=..\..\..\Source\event_groups.c
+File2=..\..\..\Source\list.c
+File3=..\..\..\Source\queue.c
+File4=..\..\..\Source\timers.c
+File5=..\..\..\Source\portable\MikroC\ARM_CM4F\port.c
+File6=..\..\..\Source\portable\MemMang\heap_4.c
+File7=..\main.c
+File8=..\main_full\main_full.c
+File9=..\..\Common\Minimal\EventGroupsDemo.c
+File10=..\..\Common\Minimal\flop.c
+File11=..\..\Common\Minimal\TaskNotify.c
+File12=RegTest.c
+File13=..\main_low_power\low_power_tick_config.c
+File14=..\main_low_power\main_low_power.c
+File15=..\main_full\IntQueueTimer.c
+File16=..\..\Common\Minimal\IntQueue.c
+File17=..\..\Common\Minimal\GenQTest.c
+File18=..\..\Common\Minimal\TimerDemo.c
+File19=..\..\Common\Minimal\StaticAllocation.c
+[BINARIES]
+Count=0
+[IMAGES]
+Count=0
+ActiveImageIndex=-1
+[OPENED_FILES]
+Count=7
+File0=..\main_low_power\low_power_tick_config.c
+File1=..\main.c
+File2=..\..\..\Source\tasks.c
+File3=..\..\..\..\..\..\..\..\..\..\devtools\Mikroelektronika\mikroC PRO for ARM\Defs\CEC1302.c
+File4=..\main_full\IntQueueTimer.c
+File5=..\..\..\..\..\..\..\..\..\..\devtools\Mikroelektronika\mikroC PRO for ARM\Packages\MC_CEC1302\Uses\interrupt.h
+File6=..\..\Common\Minimal\TimerDemo.c
+[EEPROM]
+Count=0
+[ACTIVE_COMMENTS_FILES]
+Count=0
+[OTHER_FILES]
+Count=0
+[SEARCH_PATH]
+Count=13
+Path0=C:\devtools\Mikroelektronika\mikroC PRO for ARM\Defs\
+Path1=C:\devtools\Mikroelektronika\mikroC PRO for ARM\Uses\
+Path2=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\MikroC_Specific\
+Path3=C:\DevTools\Mikroelektronika\mikroC PRO for ARM\Uses\MCHP M4\
+Path4=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\
+Path5=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\portable\MikroC\ARM_CM4F\
+Path6=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\portable\MemMang\
+Path7=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\include\
+Path8=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\Common\Minimal\
+Path9=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\
+Path10=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\main_full\
+Path11=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\main_low_power\
+Path12=C:\devtools\Mikroelektronika\mikroC PRO for ARM\Packages\MC_CEC1302\Uses\
+[HEADER_PATH]
+Count=6
+Path0=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\include\
+Path1=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Source\portable\MikroC\ARM_CM4F\
+Path2=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\Common\include\
+Path3=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\
+Path4=C:\devtools\Mikroelektronika\mikroC PRO for ARM\Packages\MC_CEC1302\Uses\
+Path5=C:\E\Dev\FreeRTOS\Trial\Active\Microchip_CEC1302\WorkingCopy\Demo\CORTEX_M4F_CEC1302_MikroC\main_full\
+[HEADERS]
+Count=12
+File0=..\..\..\Source\include\deprecated_definitions.h
+File1=..\..\..\Source\include\event_groups.h
+File2=..\..\..\Source\include\list.h
+File3=..\..\..\Source\include\portable.h
+File4=..\..\..\Source\include\projdefs.h
+File5=..\..\..\Source\include\queue.h
+File6=..\..\..\Source\include\semphr.h
+File7=..\..\..\Source\include\StackMacros.h
+File8=..\..\..\Source\include\task.h
+File9=..\..\..\Source\include\timers.h
+File10=..\FreeRTOSConfig.h
+File11=..\..\..\Source\portable\MikroC\ARM_CM4F\portmacro.h
+[PLDS]
+Count=0
+[Useses]
+Count=81
+File0=C_String
+File1=C_Math
+File2=BTIMER_CEC1302
+File3=PCR_CEC1302
+File4=Interrupt_CEC1302
+File5=ADC
+File6=AES
+File7=Button
+File8=CAN_SPI
+File9=Compact_Flash
+File10=Compact_Flash_FAT16
+File11=Conversions
+File12=C_Stdlib
+File13=C_Type
+File14=EPSON_S1D13700
+File15=FFT
+File16=FIR
+File17=Glcd
+File18=Glcd_Fonts
+File19=I2C
+File20=IIR
+File21=Keypad4x4
+File22=Lcd
+File23=Lcd_Constants
+File24=Manchester
+File25=Matrices
+File26=MemManager
+File27=Mmc
+File28=Mmc_FAT16
+File29=Mmc_Fat16_Config
+File30=One_Wire
+File31=PKE
+File32=Port_Expander
+File33=PrintOut
+File34=PS2
+File35=PWM
+File36=Q15
+File37=Q31
+File38=RNG
+File39=RS485
+File40=RSA
+File41=SHA
+File42=Software_I2C
+File43=Software_SPI
+File44=Software_UART
+File45=Sound
+File46=SPI
+File47=SPI_Ethernet
+File48=SPI_Ethernet_24j600
+File49=SPI_Glcd
+File50=SPI_Lcd
+File51=SPI_Lcd8
+File52=SPI_T6963C
+File53=Sprintf
+File54=Sprinti
+File55=Sprintl
+File56=T6963C
+File57=TFT
+File58=TFT_16bit
+File59=TFT_16bit_Defs
+File60=TFT_Defs
+File61=TFT_TouchPanel
+File62=Time
+File63=TouchPanel
+File64=Trigonometry
+File65=UART
+File66=Vectors
+File67=ADC_CEC1302
+File68=BCLINK_CEC1302
+File69=GPIO_CEC1302_1
+File70=HTIMER_CEC1302
+File71=LED_CEC1302
+File72=PWM_CEC1302
+File73=RTC_CEC1302
+File74=SCANMATRIX_CEC1302
+File75=SMB_CEC1302
+File76=SPI_API_CEC1302
+File77=TACH_CEC1302
+File78=TIMER_CEC1302
+File79=UART_CEC1302
+File80=WDT_CEC1302
+[EXPANDED_NODES]
+Node0=Sources
+Count=1
+[PROGRAMMER_OPTIONS]
+Value=JTAG
+[PROGRAMMER_TYPE]
+Value=mE
+[DEBUGGER_TYPE]
+Value=CMSIS-DAP
+[AT_DEBUG_STARTUP]
+LOAD_BIN_TO_RAM=0
+START_EXEC_FROM_ADDR=0
+START_ADDR=-1
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c
new file mode 100644
index 0000000000..b1b91ba841
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c
@@ -0,0 +1,449 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+#include "FreeRTOS.h"
+
+extern uint32_t ulRegTest1LoopCounter, ulRegTest2LoopCounter;
+
+void vRegTest1Implementation( void )
+{
+ __asm {
+
+ /* Fill the core registers with known values. */
+ mov r0, #100
+ mov r1, #101
+ mov r2, #102
+ mov r3, #103
+ mov r4, #104
+ mov r5, #105
+ mov r6, #106
+ mov r7, #107
+ mov r8, #108
+ mov r9, #109
+ mov r10, #110
+ mov r11, #111
+ mov r12, #112
+
+ /* Fill the VFP registers with known values. */
+ vmov d0, r0, r1
+ vmov d1, r2, r3
+ vmov d2, r4, r5
+ vmov d3, r6, r7
+ vmov d4, r8, r9
+ vmov d5, r10, r11
+ vmov d6, r0, r1
+ vmov d7, r2, r3
+ vmov d8, r4, r5
+ vmov d9, r6, r7
+ vmov d10, r8, r9
+ vmov d11, r10, r11
+ vmov d12, r0, r1
+ vmov d13, r2, r3
+ vmov d14, r4, r5
+ vmov d15, r6, r7
+
+reg1_loop:
+ /* Check all the VFP registers still contain the values set above.
+ First save registers that are clobbered by the test. */
+ push ( r0-r1 )
+
+ vmov r0, r1, d0
+ cmp r0, #100
+ bne reg1_error_loopf
+ cmp r1, #101
+ bne reg1_error_loopf
+ vmov r0, r1, d1
+ cmp r0, #102
+ bne reg1_error_loopf
+ cmp r1, #103
+ bne reg1_error_loopf
+ vmov r0, r1, d2
+ cmp r0, #104
+ bne reg1_error_loopf
+ cmp r1, #105
+ bne reg1_error_loopf
+ vmov r0, r1, d3
+ cmp r0, #106
+ bne reg1_error_loopf
+ cmp r1, #107
+ bne reg1_error_loopf
+ vmov r0, r1, d4
+ cmp r0, #108
+ bne reg1_error_loopf
+ cmp r1, #109
+ bne reg1_error_loopf
+ vmov r0, r1, d5
+ cmp r0, #110
+ bne reg1_error_loopf
+ cmp r1, #111
+ bne reg1_error_loopf
+ vmov r0, r1, d6
+ cmp r0, #100
+ bne reg1_error_loopf
+ cmp r1, #101
+ bne reg1_error_loopf
+ vmov r0, r1, d7
+ cmp r0, #102
+ bne reg1_error_loopf
+ cmp r1, #103
+ bne reg1_error_loopf
+ vmov r0, r1, d8
+ cmp r0, #104
+ bne reg1_error_loopf
+ cmp r1, #105
+ bne reg1_error_loopf
+ vmov r0, r1, d9
+ cmp r0, #106
+ bne reg1_error_loopf
+ cmp r1, #107
+ bne reg1_error_loopf
+ vmov r0, r1, d10
+ cmp r0, #108
+ bne reg1_error_loopf
+ cmp r1, #109
+ bne reg1_error_loopf
+ vmov r0, r1, d11
+ cmp r0, #110
+ bne reg1_error_loopf
+ cmp r1, #111
+ bne reg1_error_loopf
+ vmov r0, r1, d12
+ cmp r0, #100
+ bne reg1_error_loopf
+ cmp r1, #101
+ bne reg1_error_loopf
+ vmov r0, r1, d13
+ cmp r0, #102
+ bne reg1_error_loopf
+ cmp r1, #103
+ bne reg1_error_loopf
+ vmov r0, r1, d14
+ cmp r0, #104
+ bne reg1_error_loopf
+ cmp r1, #105
+ bne reg1_error_loopf
+ vmov r0, r1, d15
+ cmp r0, #106
+ bne reg1_error_loopf
+ cmp r1, #107
+ bne reg1_error_loopf
+
+ /* Restore the registers that were clobbered by the test. */
+ pop (r0-r1)
+
+ /* VFP register test passed. Jump to the core register test. */
+ b reg1_loopf_pass
+
+reg1_error_loopf:
+ /* If this line is hit then a VFP register value was found to be
+ incorrect. */
+ b reg1_error_loopf
+
+reg1_loopf_pass:
+
+ cmp r0, #100
+ bne reg1_error_loop
+ cmp r1, #101
+ bne reg1_error_loop
+ cmp r2, #102
+ bne reg1_error_loop
+ cmp r3, #103
+ bne reg1_error_loop
+ cmp r4, #104
+ bne reg1_error_loop
+ cmp r5, #105
+ bne reg1_error_loop
+ cmp r6, #106
+ bne reg1_error_loop
+ cmp r7, #107
+ bne reg1_error_loop
+ cmp r8, #108
+ bne reg1_error_loop
+ cmp r9, #109
+ bne reg1_error_loop
+ cmp r10, #110
+ bne reg1_error_loop
+ cmp r11, #111
+ bne reg1_error_loop
+ cmp r12, #112
+ bne reg1_error_loop
+
+ /* Everything passed, increment the loop counter. */
+ push ( r0-r1 )
+ ldr r0, =_ulRegTest1LoopCounter
+ ldr r1, [r0]
+ adds r1, r1, #1
+ str r1, [r0]
+ pop ( r0-r1 )
+
+ /* Start again. */
+ b reg1_loop
+
+reg1_error_loop:
+ /* If this line is hit then there was an error in a core register value.
+ The loop ensures the loop counter stops incrementing. */
+ b reg1_error_loop
+ nop
+
+ } /* __asm */
+}
+/*-----------------------------------------------------------*/
+
+void vRegTest2Implementation( void )
+{
+ __asm {
+ /* Set all the core registers to known values. */
+ mov r0, #-1
+ mov r1, #1
+ mov r2, #2
+ mov r3, #3
+ mov r4, #4
+ mov r5, #5
+ mov r6, #6
+ mov r7, #7
+ mov r8, #8
+ mov r9, #9
+ mov r10, #10
+ mov r11, #11
+ mov r12, #12
+
+ /* Set all the VFP to known values. */
+ vmov d0, r0, r1
+ vmov d1, r2, r3
+ vmov d2, r4, r5
+ vmov d3, r6, r7
+ vmov d4, r8, r9
+ vmov d5, r10, r11
+ vmov d6, r0, r1
+ vmov d7, r2, r3
+ vmov d8, r4, r5
+ vmov d9, r6, r7
+ vmov d10, r8, r9
+ vmov d11, r10, r11
+ vmov d12, r0, r1
+ vmov d13, r2, r3
+ vmov d14, r4, r5
+ vmov d15, r6, r7
+
+reg2_loop:
+
+ /* Check all the VFP registers still contain the values set above.
+ First save registers that are clobbered by the test. */
+ push ( r0-r1 )
+
+ vmov r0, r1, d0
+ cmp r0, #-1
+ bne reg2_error_loopf
+ cmp r1, #1
+ bne reg2_error_loopf
+ vmov r0, r1, d1
+ cmp r0, #2
+ bne reg2_error_loopf
+ cmp r1, #3
+ bne reg2_error_loopf
+ vmov r0, r1, d2
+ cmp r0, #4
+ bne reg2_error_loopf
+ cmp r1, #5
+ bne reg2_error_loopf
+ vmov r0, r1, d3
+ cmp r0, #6
+ bne reg2_error_loopf
+ cmp r1, #7
+ bne reg2_error_loopf
+ vmov r0, r1, d4
+ cmp r0, #8
+ bne reg2_error_loopf
+ cmp r1, #9
+ bne reg2_error_loopf
+ vmov r0, r1, d5
+ cmp r0, #10
+ bne reg2_error_loopf
+ cmp r1, #11
+ bne reg2_error_loopf
+ vmov r0, r1, d6
+ cmp r0, #-1
+ bne reg2_error_loopf
+ cmp r1, #1
+ bne reg2_error_loopf
+ vmov r0, r1, d7
+ cmp r0, #2
+ bne reg2_error_loopf
+ cmp r1, #3
+ bne reg2_error_loopf
+ vmov r0, r1, d8
+ cmp r0, #4
+ bne reg2_error_loopf
+ cmp r1, #5
+ bne reg2_error_loopf
+ vmov r0, r1, d9
+ cmp r0, #6
+ bne reg2_error_loopf
+ cmp r1, #7
+ bne reg2_error_loopf
+ vmov r0, r1, d10
+ cmp r0, #8
+ bne reg2_error_loopf
+ cmp r1, #9
+ bne reg2_error_loopf
+ vmov r0, r1, d11
+ cmp r0, #10
+ bne reg2_error_loopf
+ cmp r1, #11
+ bne reg2_error_loopf
+ vmov r0, r1, d12
+ cmp r0, #-1
+ bne reg2_error_loopf
+ cmp r1, #1
+ bne reg2_error_loopf
+ vmov r0, r1, d13
+ cmp r0, #2
+ bne reg2_error_loopf
+ cmp r1, #3
+ bne reg2_error_loopf
+ vmov r0, r1, d14
+ cmp r0, #4
+ bne reg2_error_loopf
+ cmp r1, #5
+ bne reg2_error_loopf
+ vmov r0, r1, d15
+ cmp r0, #6
+ bne reg2_error_loopf
+ cmp r1, #7
+ bne reg2_error_loopf
+
+ /* Restore the registers that were clobbered by the test. */
+ pop (r0-r1)
+
+ /* VFP register test passed. Jump to the core register test. */
+ b reg2_loopf_pass
+
+reg2_error_loopf:
+ /* If this line is hit then a VFP register value was found to be
+ incorrect. */
+ b reg2_error_loopf
+
+reg2_loopf_pass:
+
+ cmp r0, #-1
+ bne reg2_error_loop
+ cmp r1, #1
+ bne reg2_error_loop
+ cmp r2, #2
+ bne reg2_error_loop
+ cmp r3, #3
+ bne reg2_error_loop
+ cmp r4, #4
+ bne reg2_error_loop
+ cmp r5, #5
+ bne reg2_error_loop
+ cmp r6, #6
+ bne reg2_error_loop
+ cmp r7, #7
+ bne reg2_error_loop
+ cmp r8, #8
+ bne reg2_error_loop
+ cmp r9, #9
+ bne reg2_error_loop
+ cmp r10, #10
+ bne reg2_error_loop
+ cmp r11, #11
+ bne reg2_error_loop
+ cmp r12, #12
+ bne reg2_error_loop
+
+ /* Increment the loop counter to indicate this test is still functioning
+ correctly. */
+ push ( r0-r1 )
+ ldr r0, =_ulRegTest2LoopCounter
+ ldr r1, [r0]
+ adds r1, r1, #1
+ str r1, [r0]
+
+ /* Yield to increase test coverage. */
+ movs r0, #0x01
+ ldr r1, =0xe000ed04 /*NVIC_INT_CTRL */
+ lsl r0, r0, #28 /* Shift to PendSV bit */
+ str r0, [r1]
+ dsb
+
+ pop ( r0-r1 )
+
+ /* Start again. */
+ b reg2_loop
+
+reg2_error_loop:
+ /* If this line is hit then there was an error in a core register value.
+ This loop ensures the loop counter variable stops incrementing. */
+ b reg2_error_loop
+
+ } /* __asm */
+}
+/*-----------------------------------------------------------*/
+
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/ReadMe_Instructions.url b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/ReadMe_Instructions.url
new file mode 100644
index 0000000000..c6648b33e0
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/ReadMe_Instructions.url
@@ -0,0 +1,5 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,2
+[InternetShortcut]
+URL=http://www.freertos.org/Microchip_CEC1302_ARM_Cortex-M4F_Low_Power_Demo.html
+IDList=
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main.c
new file mode 100644
index 0000000000..f198db11a4
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main.c
@@ -0,0 +1,292 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/******************************************************************************
+ * This project provides two demo applications. A simple blinky style project
+ * that demonstrates low power tickless functionality, and a more comprehensive
+ * test and demo application. The configCREATE_LOW_POWER_DEMO setting, which is
+ * defined in FreeRTOSConfig.h, is used to select between the two. The simply
+ * blinky low power demo is implemented and described in main_low_power.c. The
+ * more comprehensive test and demo application is implemented and described in
+ * main_full.c.
+ *
+ * This file implements the code that is not demo specific, including the
+ * hardware setup and standard FreeRTOS hook functions.
+ *
+ * ENSURE TO READ THE DOCUMENTATION PAGE FOR THIS PORT AND DEMO APPLICATION ON
+ * THE http://www.FreeRTOS.org WEB SITE FOR FULL INFORMATION ON USING THIS DEMO
+ * APPLICATION, AND ITS ASSOCIATE FreeRTOS ARCHITECTURE PORT!
+ *
+ */
+
+/* Scheduler include files. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Hardware register addresses and value. */
+#define mainVTOR ( * ( uint32_t * ) 0xE000ED08 )
+#define mainNVIC_AUX_ACTLR ( * ( uint32_t * ) 0xE000E008 )
+#define mainEC_INTERRUPT_CONTROL ( * ( volatile uint32_t * ) 0x4000FC18 )
+#define mainMMCR_PCR_PROCESSOR_CLOCK_CONTROL ( * ( volatile uint32_t * )( 0x40080120 ) )
+#define mainCPU_CLOCK_DIVIDER 1
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Configure the hardware as necessary to run this demo.
+ */
+static void prvSetupHardware( void );
+
+/*
+ * main_low_power() is used when configCREATE_LOW_POWER_DEMO is set to 1.
+ * main_full() is used when configCREATE_LOW_POWER_DEMO is set to 0.
+ */
+#if( configCREATE_LOW_POWER_DEMO == 1 )
+
+ extern void main_low_power( void );
+
+#else
+
+ extern void main_full( void );
+
+ /* Some of the tests and examples executed as part of the full demo make use
+ of the tick hook to call API functions from an interrupt context. */
+ extern void vFullDemoTickHook( void );
+
+#endif /* #if configCREATE_LOW_POWER_DEMO == 1 */
+
+/* Prototypes for the standard FreeRTOS callback/hook functions implemented
+within this file. */
+void vApplicationMallocFailedHook( void );
+void vApplicationIdleHook( void );
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
+void vApplicationTickHook( void );
+
+/*-----------------------------------------------------------*/
+
+/* The variable that is incremented to represent each LED toggle. On the
+clicker hardware the LED state is set to the value of the least significant bit
+of this variable. On other hardware, where an LED is not used, the LED just
+keeps a count of the number of times the LED would otherwise have been toggled.
+See the comments in main_low_power.c and main_full.c for information on the
+expected LED toggle rate). */
+volatile uint32_t ulLED = 0;
+
+/*-----------------------------------------------------------*/
+
+int main( void )
+{
+ /* Configure the hardware ready to run the demo. */
+ prvSetupHardware();
+
+ /* The configCREATE_LOW_POWER_DEMO setting is described at the top
+ of this file. */
+ #if( configCREATE_LOW_POWER_DEMO == 1 )
+ {
+ main_low_power();
+ }
+ #else
+ {
+ main_full();
+ }
+ #endif
+
+ /* Should not get here. */
+ return 0;
+}
+/*-----------------------------------------------------------*/
+
+static void prvSetupHardware( void )
+{
+ /* Disable M4 write buffer: fix MEC1322 hardware bug. */
+ mainNVIC_AUX_ACTLR |= 0x07;
+
+ /* Set divider to 8 for 8MHz operation, MCLK in silicon chip is 64MHz,
+ CPU=MCLK/Divider. */
+ mainMMCR_PCR_PROCESSOR_CLOCK_CONTROL = mainCPU_CLOCK_DIVIDER;
+
+ /* Enable alternative NVIC vectors. */
+ mainEC_INTERRUPT_CONTROL = pdTRUE;
+
+ /* Initialise the LED on the clicker board. */
+ GPIO_Digital_Output( &GPIO_PORT_150_157, _GPIO_PINMASK_4 | _GPIO_PINMASK_5 );
+ GPIO_OUTPUT_PIN_154_bit = 0;
+ GPIO_OUTPUT_PIN_155_bit = 0;
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationMallocFailedHook( void )
+{
+ /* Called if a call to pvPortMalloc() fails because there is insufficient
+ free memory available in the FreeRTOS heap. pvPortMalloc() is called
+ internally by FreeRTOS API functions that create tasks, queues, software
+ timers, and semaphores. The size of the FreeRTOS heap is set by the
+ configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */
+
+ /* Force an assert. */
+ configASSERT( ( volatile void * ) NULL );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
+{
+ ( void ) pcTaskName;
+ ( void ) pxTask;
+
+ /* Run time stack overflow checking is performed if
+ configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
+ function is called if a stack overflow is detected. */
+
+ /* Force an assert. */
+ configASSERT( ( volatile void * ) NULL );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationIdleHook( void )
+{
+volatile size_t xFreeHeapSpace;
+
+ /* This is just a trivial example of an idle hook. It is called on each
+ cycle of the idle task. It must *NOT* attempt to block. In this case the
+ idle task just queries the amount of FreeRTOS heap that remains. See the
+ memory management section on the http://www.FreeRTOS.org web site for memory
+ management options. If there is a lot of heap memory free then the
+ configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
+ RAM. */
+ xFreeHeapSpace = xPortGetFreeHeapSize();
+
+ /* Remove compiler warning about xFreeHeapSpace being set but never used. */
+ ( void ) xFreeHeapSpace;
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationTickHook( void )
+{
+ /* The full demo includes tests that run from the tick hook. */
+ #if( configCREATE_LOW_POWER_DEMO == 0 )
+ {
+ /* Some of the tests and demo tasks executed by the full demo include
+ interaction from an interrupt - for which the tick interrupt is used
+ via the tick hook function. */
+ vFullDemoTickHook();
+ }
+ #endif
+}
+/*-----------------------------------------------------------*/
+
+/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
+implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
+used by the Idle task. */
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+{
+/* If the buffers to be provided to the Idle task are declared inside this
+function then they must be declared static - otherwise they will be allocated on
+the stack and so not exists after this function exits. */
+static StaticTask_t xIdleTaskTCB;
+static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];
+
+ /* Pass out a pointer to the StaticTask_t structure in which the Idle task's
+ state will be stored. */
+ *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
+
+ /* Pass out the array that will be used as the Idle task's stack. */
+ *ppxIdleTaskStackBuffer = uxIdleTaskStack;
+
+ /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
+ Note that, as the array is necessarily of type StackType_t,
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+ *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+}
+/*-----------------------------------------------------------*/
+
+/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
+application must provide an implementation of vApplicationGetTimerTaskMemory()
+to provide the memory that is used by the Timer service task. */
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
+{
+/* If the buffers to be provided to the Timer task are declared inside this
+function then they must be declared static - otherwise they will be allocated on
+the stack and so not exists after this function exits. */
+static StaticTask_t xTimerTaskTCB;
+static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];
+
+ /* Pass out a pointer to the StaticTask_t structure in which the Timer
+ task's state will be stored. */
+ *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
+
+ /* Pass out the array that will be used as the Timer task's stack. */
+ *ppxTimerTaskStackBuffer = uxTimerTaskStack;
+
+ /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
+ Note that, as the array is necessarily of type StackType_t,
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+ *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
+}
+
+
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c
new file mode 100644
index 0000000000..77285f0990
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c
@@ -0,0 +1,208 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/*
+ * This file initialises three timers as follows:
+ *
+ * Basic timer channels 0 and 1 provide the interrupts that are used with the
+ * IntQ standard demo tasks, which test interrupt nesting and using queues from
+ * interrupts. The interrupts use slightly different frequencies so will
+ * occasionally nest.
+ *
+ * Basic timer channel 2 provides a much higher frequency timer that tests the
+ * nesting of interrupts that don't use the FreeRTOS API.
+ *
+ * All the timers can nest with the tick interrupt - creating a maximum
+ * interrupt nesting depth of 4 (which is shown as a max nest count of 3 as the
+ * tick interrupt does not increment the nesting count variable).
+ *
+ */
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Demo includes. */
+#include "IntQueueTimer.h"
+#include "IntQueue.h"
+
+/* Library includes. */
+#include "btimer.h"
+#include "interrupt.h"
+
+/* The frequencies at which the first two timers expire are slightly offset to
+ensure they don't remain synchronised. The frequency of the highest priority
+interrupt is 20 times faster so really hammers the interrupt entry and exit
+code. */
+#define tmrTIMER_0_FREQUENCY ( 2000UL )
+#define tmrTIMER_1_FREQUENCY ( 2003UL )
+#define tmrTIMER_2_FREQUENCY ( 20000UL )
+
+/* The basic timer channels used for generating the three interrupts. */
+#define tmrTIMER_CHANNEL_0 0 /* At tmrTIMER_0_FREQUENCY */
+#define tmrTIMER_CHANNEL_1 1 /* At tmrTIMER_1_FREQUENCY */
+#define tmrTIMER_CHANNEL_2 2 /* At tmrTIMER_2_FREQUENCY */
+
+/* The high frequency interrupt is given a priority above the maximum at which
+interrupt safe FreeRTOS calls can be made. The priority of the lower frequency
+timers must still be above the tick interrupt priority. */
+#define tmrLOWER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
+#define tmrMEDIUM_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 0 )
+#define tmrHIGHER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY - 1 )
+
+/* Hardware register locations. */
+#define tmrGIRQ23_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C130 )
+
+#define tmrRECORD_NESTING_DEPTH() \
+ ulNestingDepth++; \
+ if( ulNestingDepth > ulMaxRecordedNestingDepth ) \
+ { \
+ ulMaxRecordedNestingDepth = ulNestingDepth; \
+ }
+
+/* Used to count the nesting depth, and record the maximum nesting depth. */
+volatile uint32_t ulNestingDepth = 0, ulMaxRecordedNestingDepth = 0;
+
+/*-----------------------------------------------------------*/
+
+void vInitialiseTimerForIntQueueTest( void )
+{
+const uint32_t ulTimer0Count = configCPU_CLOCK_HZ / tmrTIMER_0_FREQUENCY;
+const uint32_t ulTimer1Count = configCPU_CLOCK_HZ / tmrTIMER_1_FREQUENCY;
+const uint32_t ulTimer2Count = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY;
+const uint8_t ucEnable = 1;
+
+ tmrGIRQ23_ENABLE_SET = 0x03;
+
+ /* Initialise the three timers as described at the top of this file, and
+ enable their interrupts in the NVIC. */
+ btimer_init( tmrTIMER_CHANNEL_0, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer0Count, ulTimer0Count );
+ btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_0 );
+ interrupt_device_enable( BTMR0_IROUTE );
+ interrupt_device_nvic_priority_set( BTMR0_IROUTE, tmrLOWER_PRIORITY );
+ interrupt_device_nvic_pending_clear( BTMR0_IROUTE );
+ interrupt_device_nvic_enable( BTMR0_IROUTE, ucEnable );
+ btimer_start( tmrTIMER_CHANNEL_0 );
+
+ btimer_init( tmrTIMER_CHANNEL_1, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer1Count, ulTimer1Count );
+ btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_1 );
+ interrupt_device_enable( BTMR1_IROUTE );
+ interrupt_device_nvic_priority_set( BTMR1_IROUTE, tmrMEDIUM_PRIORITY );
+ interrupt_device_nvic_pending_clear( BTMR1_IROUTE );
+ interrupt_device_nvic_enable( BTMR1_IROUTE, ucEnable );
+ btimer_start( tmrTIMER_CHANNEL_1 );
+
+ btimer_init( tmrTIMER_CHANNEL_2, BTIMER_AUTO_RESTART | BTIMER_COUNT_DOWN | BTIMER_INT_EN, 0, ulTimer2Count, ulTimer2Count );
+ btimer_interrupt_status_get_clr( tmrTIMER_CHANNEL_2 );
+ interrupt_device_enable( BTMR2_IROUTE );
+ interrupt_device_nvic_priority_set( BTMR2_IROUTE, tmrHIGHER_PRIORITY );
+ interrupt_device_nvic_pending_clear( BTMR2_IROUTE );
+ interrupt_device_nvic_enable( BTMR2_IROUTE, ucEnable );
+ btimer_start( tmrTIMER_CHANNEL_2 );
+}
+/*-----------------------------------------------------------*/
+
+/* The TMR0 interrupt is used for different purposes by the low power and full
+demos respectively. */
+#if( configCREATE_LOW_POWER_DEMO == 0 )
+
+ void NVIC_Handler_TMR0( void ) iv IVT_INT_TIMER0 ics ICS_AUTO
+ {
+ tmrRECORD_NESTING_DEPTH();
+
+ /* Call the IntQ test function for this channel. */
+ portYIELD_FROM_ISR( xFirstTimerHandler() );
+
+ ulNestingDepth--;
+ }
+
+#endif /* configCREATE_LOW_POWER_DEMO */
+/*-----------------------------------------------------------*/
+
+void NVIC_Handler_TMR1( void ) iv IVT_INT_TIMER1 ics ICS_AUTO
+{
+ tmrRECORD_NESTING_DEPTH();
+
+ /* Just testing the xPortIsInsideInterrupt() functionality. */
+ configASSERT( xPortIsInsideInterrupt() == pdTRUE );
+
+ /* Call the IntQ test function for this channel. */
+ portYIELD_FROM_ISR( xSecondTimerHandler() );
+
+ ulNestingDepth--;
+}
+/*-----------------------------------------------------------*/
+
+void NVIC_Handler_TMR2( void ) iv IVT_INT_TIMER2 ics ICS_AUTO
+{
+ tmrRECORD_NESTING_DEPTH();
+ ulNestingDepth--;
+}
+/*-----------------------------------------------------------*/
+
diff --git a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.h b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h
similarity index 91%
rename from FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.h
rename to FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h
index 8bdd643194..8af92a4ba2 100644
--- a/FreeRTOS/Demo/CORTEX_EFMG890F128_IAR/ledtest.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -67,16 +67,12 @@
1 tab == 4 spaces!
*/
-#ifndef LEDTEST_H
-#define LEDTEST_H
+#ifndef INT_QUEUE_TIMER_H
+#define INT_QUEUE_TIMER_H
-#include "FreeRTOS.h"
-#include "task.h"
-#include "partest.h"
+void vInitialiseTimerForIntQueueTest( void );
+BaseType_t xTimer0Handler( void );
+BaseType_t xTimer1Handler( void );
-/*
- * A task that writes to the LEDs.
- */
-void vLEDTask( void *pvParamters );
+#endif
-#endif /* LEDTEST_H */
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c
new file mode 100644
index 0000000000..2c11348aee
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c
@@ -0,0 +1,384 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/******************************************************************************
+ * NOTE 1: This project provides two demo applications. A simple blinky style
+ * project that demonstrates the tickless low power features of FreeRTOS, and a
+ * more comprehensive test and demo application. The configCREATE_LOW_POWER_DEMO
+ * setting in FreeRTOSConifg.h is used to select between the two. See the notes
+ * on using conifgCREATE_LOW_POWER_DEMO in main.c. This file implements the
+ * comprehensive test and demo version.
+ *
+ * NOTE 2: This file only contains the source code that is specific to the
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions
+ * required to configure the hardware, are defined in main.c.
+ *
+ ******************************************************************************
+ *
+ * main_full() creates all the demo application tasks and software timers, then
+ * starts the scheduler. The web documentation provides more details of the
+ * standard demo application tasks, which provide no particular functionality,
+ * but do provide a good example of how to use the FreeRTOS API.
+ *
+ * In addition to the standard demo tasks, the following tasks and tests are
+ * defined and/or created within this file:
+ *
+ * "Reg test" tasks - These fill both the core and floating point registers with
+ * known values, then check that each register maintains its expected value for
+ * the lifetime of the task. Each task uses a different set of values. The reg
+ * test tasks execute with a very low priority, so get preempted very
+ * frequently. A register containing an unexpected value is indicative of an
+ * error in the context switching mechanism.
+ *
+ * "Check" task - The check task period is initially set to three seconds. The
+ * task checks that all the standard demo tasks, and the register check tasks,
+ * are not only still executing, but are executing without reporting any errors.
+ * If the check task discovers that a task has either stalled, or reported an
+ * error, then it changes its own execution period from the initial three
+ * seconds, to just 200ms. The check task also toggles an LED each time it is
+ * called. This provides a visual indication of the system status: If the LED
+ * toggles every three seconds, then no issues have been discovered. If the LED
+ * toggles every 200ms, then an issue has been discovered with at least one
+ * task.
+ */
+
+/* Standard includes. */
+#include <stdio.h>
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "timers.h"
+#include "semphr.h"
+
+/* Standard demo application includes. */
+#include "flop.h"
+#include "GenQTest.h"
+#include "TimerDemo.h"
+#include "IntQueue.h"
+#include "EventGroupsDemo.h"
+#include "TaskNotify.h"
+#include "StaticAllocation.h"
+
+/* Priorities for the demo application tasks. */
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
+#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
+
+/* A block time of zero simply means "don't block". */
+#define mainDONT_BLOCK ( 0UL )
+
+/* The period of the check task, in ms, provided no errors have been reported by
+any of the standard demo tasks. ms are converted to the equivalent in ticks
+using the pdMS_TO_TICKS() macro constant. */
+#define mainNO_ERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 3000UL )
+
+/* The period of the check task, in ms, if an error has been reported in one of
+the standard demo tasks. ms are converted to the equivalent in ticks using the
+pdMS_TO_TICKS() macro. */
+#define mainERROR_CHECK_TASK_PERIOD pdMS_TO_TICKS( 200UL )
+
+/* Parameters that are passed into the register check tasks solely for the
+purpose of ensuring parameters are passed into tasks correctly. */
+#define mainREG_TEST_TASK_1_PARAMETER ( ( void * ) 0x12345678 )
+#define mainREG_TEST_TASK_2_PARAMETER ( ( void * ) 0x87654321 )
+
+/* The base period used by the timer test tasks. */
+#define mainTIMER_TEST_PERIOD ( 50 )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Called by main() to run the full demo (as opposed to the blinky demo) when
+ * configCREATE_LOW_POWER_DEMO is set to 0.
+ */
+void main_full( void );
+
+/*
+ * The check task, as described at the top of this file.
+ */
+static void prvCheckTask( void *pvParameters );
+
+/*
+ * Some of the tests and demo tasks executed by the full demo include
+ * interaction from an interrupt - for which the tick interrupt is used via the
+ * tick hook function.
+ */
+void vFullDemoTickHook( void );
+
+/*
+ * Register check tasks, and the tasks used to write over and check the contents
+ * of the FPU registers, as described at the top of this file. The nature of
+ * these files necessitates that they are written in an assembly file, but the
+ * entry points are kept in the C file for the convenience of checking the task
+ * parameter.
+ */
+static void prvRegTestTaskEntry1( void *pvParameters );
+extern void vRegTest1Implementation( void );
+static void prvRegTestTaskEntry2( void *pvParameters );
+extern void vRegTest2Implementation( void );
+
+/*-----------------------------------------------------------*/
+
+/* The following two variables are used to communicate the status of the
+register check tasks to the check task. If the variables keep incrementing,
+then the register check tasks have not discovered any errors. If a variable
+stops incrementing, then an error has been found. */
+volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
+
+/* The variable that is incremented to represent each LED toggle. On the
+clicker hardware the LED state is set to the value of the least significant bit
+of this variable. */
+extern volatile uint32_t ulLED;
+
+/*-----------------------------------------------------------*/
+
+void main_full( void )
+{
+ /* Start all the other standard demo/test tasks. They have no particular
+ functionality, but do demonstrate how to use the FreeRTOS API and test the
+ kernel port. */
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );
+ vStartTimerDemoTask( mainTIMER_TEST_PERIOD );
+ vStartEventGroupTasks();
+ vStartTaskNotifyTask();
+ vStartInterruptQueueTasks();
+ vStartStaticallyAllocatedTasks();
+
+ /* Create the register check tasks, as described at the top of this file */
+ xTaskCreate( prvRegTestTaskEntry1, "Reg1", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_1_PARAMETER, tskIDLE_PRIORITY, NULL );
+ xTaskCreate( prvRegTestTaskEntry2, "Reg2", configMINIMAL_STACK_SIZE, mainREG_TEST_TASK_2_PARAMETER, tskIDLE_PRIORITY, NULL );
+
+ /* Create the task that performs the 'check' functionality, as described at
+ the top of this file. */
+ xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
+
+ /* Start the scheduler. */
+ vTaskStartScheduler();
+
+ /* If all is well, the scheduler will now be running, and the following
+ line will never be reached. If the following line does execute, then
+ there was insufficient FreeRTOS heap memory available for the Idle and/or
+ timer tasks to be created. See the memory management section on the
+ FreeRTOS web site for more details on the FreeRTOS heap
+ http://www.freertos.org/a00111.html. */
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+static void prvCheckTask( void *pvParameters )
+{
+TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;
+TickType_t xLastExecutionTime;
+static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
+unsigned long ulErrorFound = pdFALSE;
+
+ /* Just to stop compiler warnings. */
+ ( void ) pvParameters;
+
+ /* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
+ works correctly. */
+ xLastExecutionTime = xTaskGetTickCount();
+
+ /* Cycle for ever, delaying then checking all the other tasks are still
+ operating without error. The onboard LED is toggled on each iteration.
+ If an error is detected then the delay period is decreased from
+ mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the
+ effect of increasing the rate at which the onboard LED toggles, and in so
+ doing gives visual feedback of the system status. */
+ for( ;; )
+ {
+ /* Delay until it is time to execute again. */
+ vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
+
+ /* Check all the demo tasks (other than the flash tasks) to ensure
+ that they are all still running, and that none have detected an error. */
+ if( xAreIntQueueTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = 1UL << 0UL;
+ }
+
+ if( xAreMathsTaskStillRunning() != pdTRUE )
+ {
+ ulErrorFound = 1UL << 1UL;
+ }
+
+ if( xAreStaticAllocationTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = 1UL << 2UL;
+ }
+
+ if( xAreGenericQueueTasksStillRunning() != pdTRUE )
+ {
+ ulErrorFound = 1UL << 5UL;
+ }
+
+ if( xAreTimerDemoTasksStillRunning( ( TickType_t ) xDelayPeriod ) != pdPASS )
+ {
+ ulErrorFound = 1UL << 9UL;
+ }
+
+ if( xAreEventGroupTasksStillRunning() != pdPASS )
+ {
+ ulErrorFound = 1UL << 12UL;
+ }
+
+ if( xAreTaskNotificationTasksStillRunning() != pdPASS )
+ {
+ ulErrorFound = 1UL << 14UL;
+ }
+
+ /* Check that the register test 1 task is still running. */
+ if( ulLastRegTest1Value == ulRegTest1LoopCounter )
+ {
+ ulErrorFound = 1UL << 15UL;
+ }
+ ulLastRegTest1Value = ulRegTest1LoopCounter;
+
+ /* Check that the register test 2 task is still running. */
+ if( ulLastRegTest2Value == ulRegTest2LoopCounter )
+ {
+ ulErrorFound = 1UL << 16UL;
+ }
+ ulLastRegTest2Value = ulRegTest2LoopCounter;
+
+ /* Toggle the check LED to give an indication of the system status. If
+ the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then
+ everything is ok. A faster toggle indicates an error. */
+ configTOGGLE_LED();
+
+ if( ulErrorFound != pdFALSE )
+ {
+ /* An error has been detected in one of the tasks - flash the LED
+ at a higher frequency to give visible feedback that something has
+ gone wrong. */
+ xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;
+ }
+
+ configASSERT( ulErrorFound == pdFALSE );
+
+ /* Just testing the xPortIsInsideInterrupt() functionality. */
+ configASSERT( xPortIsInsideInterrupt() == pdFALSE );
+ }
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTestTaskEntry1( void *pvParameters )
+{
+ /* Although the regtest task is written in assembler, its entry point is
+ written in C for convenience of checking the task parameter is being passed
+ in correctly. */
+ if( pvParameters == mainREG_TEST_TASK_1_PARAMETER )
+ {
+ /* Start the part of the test that is written in assembler. */
+ vRegTest1Implementation();
+ }
+
+ /* The following line will only execute if the task parameter is found to
+ be incorrect. The check task will detect that the regtest loop counter is
+ not being incremented and flag an error. */
+ vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvRegTestTaskEntry2( void *pvParameters )
+{
+ /* Although the regtest task is written in assembler, its entry point is
+ written in C for convenience of checking the task parameter is being passed
+ in correctly. */
+ if( pvParameters == mainREG_TEST_TASK_2_PARAMETER )
+ {
+ /* Start the part of the test that is written in assembler. */
+ vRegTest2Implementation();
+ }
+
+ /* The following line will only execute if the task parameter is found to
+ be incorrect. The check task will detect that the regtest loop counter is
+ not being incremented and flag an error. */
+ vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
+
+void vFullDemoTickHook( void )
+{
+ /* Some of the tests and demo tasks executed by the full demo include
+ interaction from an interrupt - for which the tick interrupt is used via
+ the tick hook function. */
+
+ /* The full demo includes a software timer demo/test that requires
+ prodding periodically from the tick interrupt. */
+ vTimerPeriodicISRTests();
+
+ /* Call the periodic event group from ISR demo. */
+ vPeriodicEventGroupsProcessing();
+
+ /* Call the code that 'gives' a task notification from an ISR. */
+ xNotifyTaskFromISR();
+}
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c
new file mode 100644
index 0000000000..e116c1dfe1
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c
@@ -0,0 +1,353 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/* Standard includes. */
+#include <limits.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Library includes. */
+#include "htimer.h"
+
+/* This file contains functions that will override the default implementations
+in the RTOS port layer. Therefore only build this file if the low power demo
+is being built. */
+#if( configCREATE_LOW_POWER_DEMO == 1 )
+
+/* ID of the hibernation timer used to generate the tick. */
+#define mainTICK_HTIMER_ID 0
+
+/* Written to the hibernation timer control register to configure the timer for
+its higher resolution. */
+#define mainHTIMER_HIGH_RESOLUTION 0
+
+/* The frequency of the hibernation timer when it is running at its higher
+resolution and low resolution respectively. */
+#define mainHIGHER_RESOLUTION_TIMER_HZ ( 32787 ) /* (1000000us / 30.5us) as each LSB is 30.5us. */
+#define mainLOW_RESOLUTION_TIMER_HZ ( 8UL ) /* ( 1000ms / 125ms ) as each LSB is 0.125s. */
+
+/* Some registers are accessed directly as the library is not compatible with
+all the compilers used. */
+#define lpHTIMER_PRELOAD_REGISTER ( * ( volatile uint16_t * ) 0x40009800 )
+#define lpHTIMER_COUNT_REGISTER ( * ( volatile uint16_t * ) 0x40009808 )
+#define lpEC_GIRQ17_ENABLE_SET ( * ( volatile uint32_t * ) 0x4000C0B8 )
+#define lpHTIMER_INTERRUPT_CONTROL_BIT ( 1UL << 20UL )
+
+/*
+ * The low power demo does not use the SysTick, so override the
+ * vPortSetupTickInterrupt() function with an implementation that configures
+ * the low power clock. NOTE: This function name must not be changed as it
+ * is called from the RTOS portable layer.
+ */
+void vPortSetupTimerInterrupt( void );
+
+/*-----------------------------------------------------------*/
+
+/* The reload value to use in the timer to generate the tick interrupt -
+assumes the timer is running at its higher resolution. */
+static const uint16_t usHighResolutionReloadValue = ( mainHIGHER_RESOLUTION_TIMER_HZ / ( uint16_t ) configTICK_RATE_HZ );
+
+/* Calculate how many clock increments make up a single tick period. */
+static const uint32_t ulReloadValueForOneHighResolutionTick = ( mainHIGHER_RESOLUTION_TIMER_HZ / configTICK_RATE_HZ );
+
+/* Calculate the maximum number of ticks that can be suppressed when using the
+high resolution clock and low resolution clock respectively. */
+static uint32_t ulMaximumPossibleSuppressedHighResolutionTicks = 0;
+
+/* As the clock is only 2KHz, it is likely a value of 1 will be too much, so
+use zero - but leave the value here to assist porting to different clock
+speeds. */
+static const uint32_t ulStoppedTimerCompensation = 0UL;
+
+/* Flag set from the tick interrupt to allow the sleep processing to know if
+sleep mode was exited because of an timer interrupt or a different interrupt. */
+static volatile uint32_t ulTickFlag = pdFALSE;
+
+/*-----------------------------------------------------------*/
+
+void NVIC_Handler_HIB_TMR( void ) iv IVT_INT_HTIMER ics ICS_AUTO
+{
+ lpHTIMER_PRELOAD_REGISTER = usHighResolutionReloadValue;
+
+ /* Increment the RTOS tick. */
+ if( xTaskIncrementTick() != pdFALSE )
+ {
+ /* A context switch is required. Context switching is performed in
+ the PendSV interrupt. Pend the PendSV interrupt. */
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+ }
+
+ /* The CPU woke because of a tick. */
+ ulTickFlag = pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortSetupTimerInterrupt( void )
+{
+ /* Cannot be a const when using the MikroC compiler. */
+ ulMaximumPossibleSuppressedHighResolutionTicks = ( ( uint32_t ) USHRT_MAX ) / ulReloadValueForOneHighResolutionTick;
+
+ /* Set up the hibernation timer to start at the value required by the
+ tick interrupt. */
+ htimer_enable( mainTICK_HTIMER_ID, usHighResolutionReloadValue, mainHTIMER_HIGH_RESOLUTION );
+
+ /* Enable the HTIMER interrupt. Equivalent to enable_htimer0_irq(); */
+ lpEC_GIRQ17_ENABLE_SET |= lpHTIMER_INTERRUPT_CONTROL_BIT;
+
+ /* The hibernation timer is not an auto-reload timer, so gets reset
+ from within the ISR itself. For that reason it's interrupt is set
+ to the highest possible priority to ensure clock slippage is minimised. */
+ NVIC_SetIntPriority( IVT_INT_HTIMER, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+ NVIC_IntEnable( IVT_INT_HTIMER );
+}
+/*-----------------------------------------------------------*/
+
+/* Override the default definition of vPortSuppressTicksAndSleep() that is
+weakly defined in the FreeRTOS Cortex-M port layer with a version that manages
+the hibernation timer, as the tick is generated from the low power hibernation
+timer and not the SysTick as would normally be the case on a Cortex-M. */
+void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+{
+uint32_t ulCompleteTickPeriods, ulReloadValue, ulCompletedTimerDecrements, ulCountAfterSleep, ulCountBeforeSleep;
+eSleepModeStatus eSleepAction;
+TickType_t xModifiableIdleTime;
+
+ /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
+
+ /* Make sure the hibernation timer reload value does not overflow the
+ counter. */
+ if( xExpectedIdleTime > ( TickType_t ) ulMaximumPossibleSuppressedHighResolutionTicks )
+ {
+ xExpectedIdleTime = ( TickType_t ) ulMaximumPossibleSuppressedHighResolutionTicks;
+ }
+
+ /* Stop the timer momentarily. The time the timer is stopped for is
+ accounted for as best it can be, but using the tickless mode will
+ inevitably result in some tiny drift of the time maintained by the kernel
+ with respect to calendar time. Take the count value first as clearing
+ the preload value also seems to clear the count. */
+ ulCountBeforeSleep = ( uint32_t ) lpHTIMER_COUNT_REGISTER;
+ lpHTIMER_PRELOAD_REGISTER = 0;
+
+ /* Calculate the reload value required to wait xExpectedIdleTime tick
+ periods. -1 is used as the current time slice will already be part way
+ through, the part value coming from the current timer count value. */
+ ulReloadValue = ulCountBeforeSleep + ( ulReloadValueForOneHighResolutionTick * ( xExpectedIdleTime - 1UL ) );
+
+ if( ulReloadValue > ulStoppedTimerCompensation )
+ {
+ /* Compensate for the fact that the timer is going to be stopped
+ momentarily. */
+ ulReloadValue -= ulStoppedTimerCompensation;
+ }
+
+ /* Enter a critical section but don't use the taskENTER_CRITICAL() method as
+ that will mask interrupts that should exit sleep mode. */
+ __asm { cpsid i
+ dsb
+ isb };
+
+ /* The tick flag is set to false before sleeping. If it is true when sleep
+ mode is exited then sleep mode was probably exited because the tick was
+ suppressed for the entire xExpectedIdleTime period. */
+ ulTickFlag = pdFALSE;
+
+ /* If a context switch is pending then abandon the low power entry as
+ the context switch might have been pended by an external interrupt that
+ requires processing. */
+ eSleepAction = eTaskConfirmSleepModeStatus();
+ if( eSleepAction == eAbortSleep )
+ {
+ /* Resetart the timer from whatever remains in the counter register,
+ but 0 is not a valid value. */
+ ulReloadValue = ulCountBeforeSleep - ulStoppedTimerCompensation;
+
+ if( ulReloadValue == 0 )
+ {
+ ulReloadValue = ulReloadValueForOneHighResolutionTick;
+ ulCompleteTickPeriods = 1UL;
+ }
+ else
+ {
+ ulCompleteTickPeriods = 0UL;
+ }
+
+ lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ above. */
+ __asm { cpsie i
+ dsb
+ isb };
+
+ }
+ else
+ {
+ /* Write the calculated reload value, which will also start the
+ timer. */
+ lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
+
+ /* Allow the application to define some pre-sleep processing. */
+ xModifiableIdleTime = xExpectedIdleTime;
+ configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+
+ /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
+ means the application defined code has already executed the sleep
+ instructions. */
+ if( xModifiableIdleTime > 0 )
+ {
+ __asm { dsb
+ wfi
+ isb };
+ }
+
+ /* Allow the application to define some post sleep processing. */
+ configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
+
+ /* Stop the hibernation timer. Again, the time the tiemr is stopped
+ for is accounted for as best it can be, but using the tickless mode
+ will inevitably result in some tiny drift of the time maintained by the
+ kernel with respect to calendar time. Take the count value first as
+ setting the preload to zero also seems to clear the count. */
+ ulCountAfterSleep = ( uint32_t ) lpHTIMER_COUNT_REGISTER;
+ lpHTIMER_PRELOAD_REGISTER = 0;
+
+ /* Re-enable interrupts - see comments above the cpsid instruction()
+ above. */
+ __asm { cpsie i
+ dsb
+ isb };
+
+
+ if( ulTickFlag != pdFALSE )
+ {
+ /* The tick interrupt has already executed, although because this
+ function is called with the scheduler suspended the actual tick
+ processing will not occur until after this function has exited.
+ The timer has already been reloaded to count in ticks, and can just
+ continue counting down from its current value. */
+ ulReloadValue = ulCountAfterSleep;
+
+ /* Sanity check that the timer's reload value has indeed been
+ reset. */
+ configASSERT( ( uint32_t ) lpHTIMER_PRELOAD_REGISTER == ulReloadValueForOneHighResolutionTick );
+
+ /* The tick interrupt handler will already have pended the tick
+ processing in the kernel. As the pending tick will be processed as
+ soon as this function exits, the tick value maintained by the tick
+ is stepped forward by one less than the time spent sleeping. The
+ actual stepping of the tick appears later in this function. */
+ ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+ }
+ else
+ {
+ /* Something other than the tick interrupt ended the sleep. How
+ many complete tick periods passed while the processor was
+ sleeping? */
+ ulCompletedTimerDecrements = ulReloadValue - ulCountAfterSleep;
+
+ /* Undo the adjustment that was made to the reload value to account
+ for the fact that a time slice was part way through when this
+ function was called before working out how many complete tick
+ periods this represents. (could have used [ulExpectedIdleTime *
+ ulReloadValueForOneHighResolutionTick] instead of ulReloadValue on
+ the previous line, but this way avoids the multiplication). */
+ ulCompletedTimerDecrements += ( ulReloadValueForOneHighResolutionTick - ulCountBeforeSleep );
+ ulCompleteTickPeriods = ulCompletedTimerDecrements / ulReloadValueForOneHighResolutionTick;
+
+ /* The reload value is set to whatever fraction of a single tick
+ period remains. */
+ ulReloadValue = ( ( ulCompleteTickPeriods + 1UL ) * ulReloadValueForOneHighResolutionTick ) - ulCompletedTimerDecrements;
+ }
+
+ /* Cannot use a reload value of 0 - it will not start the timer. */
+ if( ulReloadValue == 0 )
+ {
+ /* There is no fraction remaining. */
+ ulReloadValue = ulReloadValueForOneHighResolutionTick;
+ ulCompleteTickPeriods++;
+ }
+
+ /* Restart the timer so it runs down from the reload value. The reload
+ value will get set to the value required to generate exactly one tick
+ period the next time the tick interrupt executes. */
+ lpHTIMER_PRELOAD_REGISTER = ( uint16_t ) ulReloadValue;
+ }
+
+ /* Wind the tick forward by the number of tick periods that the CPU
+ remained in a low power state. */
+ vTaskStepTick( ulCompleteTickPeriods );
+}
+/*-----------------------------------------------------------*/
+
+
+#endif /* configCREATE_LOW_POWER_DEMO */
+
diff --git a/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c
new file mode 100644
index 0000000000..caae6e76af
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c
@@ -0,0 +1,237 @@
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/******************************************************************************
+ * NOTE 1: This project provides two demo applications. A simple blinky demo
+ * that demonstrates tickless low power operation, and a more comprehensive
+ * test and demo application. The configCREATE_LOW_POWER_DEMO setting in
+ * FreeRTOSConfig.h is used to select between the two. See the notes on using
+ * configCREATE_LOW_POWER_DEMO in main.c. This file implements the low power
+ * version.
+ *
+ * NOTE 2: This file only contains the source code that is specific to the
+ * low power demo. Generic functions, such FreeRTOS hook functions, and
+ * functions required to configure the hardware are defined in main.c.
+ ******************************************************************************
+ *
+ * main_low_power() creates one queue, and two tasks. It then starts the
+ * scheduler.
+ *
+ * The Queue Send Task:
+ * The queue send task is implemented by the prvQueueSendTask() function in
+ * this file. It sends the value 100 to the queue every second.
+ *
+ * The Queue Receive Task:
+ * The queue receive task is implemented by the prvQueueReceiveTask() function
+ * in this file. prvQueueReceiveTask() blocks on the queue, blipping (quickly
+ * turn on then off again) the LED each time it received the value 100 from the
+ * queue send task. The queue send task writes to the queue every second, so
+ * the LED will blip once a second.
+ *
+ * The RTOS tick is turned off when the queue send task and queue receive task
+ * are both in the Blocked state.
+ *
+ */
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* Priorities at which the tasks are created. */
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
+
+/* The rate at which data is sent to the queue. The 200ms value is converted
+to ticks using the portTICK_PERIOD_MS constant. */
+#define mainQUEUE_SEND_FREQUENCY_MS pdMS_TO_TICKS( 1000 )
+
+/* The number of items the queue can hold. This is 1 as the receive task
+will remove items as they are added, meaning the send task should always find
+the queue empty. */
+#define mainQUEUE_LENGTH ( 1 )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Called by main when configCREATE_LOW_POWER_DEMO is set to 1 in
+ * main.c.
+ */
+void main_low_power( void );
+
+/*
+ * The tasks as described in the comments at the top of this file.
+ */
+static void prvQueueReceiveTask( void *pvParameters );
+static void prvQueueSendTask( void *pvParameters );
+
+/*-----------------------------------------------------------*/
+
+/* The queue used by both tasks. */
+static QueueHandle_t xQueue = NULL;
+
+/* The variable that is incremented to represent each LED toggle. On the
+clicker hardware the LED state is set to the value of the least significant bit
+of this variable. On other hardware, where an LED is not used, the LED just
+keeps a count of the number of times the LED would otherwise have been toggled.
+See the comments at the top of this file for information on the expected LED
+toggle rate. */
+extern volatile uint32_t ulLED;
+
+/*-----------------------------------------------------------*/
+
+void main_low_power( void )
+{
+ /* Create the queue. */
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
+
+ if( xQueue != NULL )
+ {
+ /* Start the two tasks as described in the comments at the top of this
+ file. */
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
+ "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
+ NULL, /* The parameter passed to the task - not used in this case. */
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
+ NULL ); /* The task handle is not required, so NULL is passed. */
+
+ xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
+
+ /* Start the tasks and timer running. */
+ vTaskStartScheduler();
+ }
+
+ /* If all is well, the scheduler will now be running, and the following
+ line will never be reached. If the following line does execute, then
+ there was insufficient FreeRTOS heap memory available for the Idle and/or
+ timer tasks to be created. See the memory management section on the
+ FreeRTOS web site for more details on the FreeRTOS heap
+ http://www.freertos.org/a00111.html. */
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+static void prvQueueSendTask( void *pvParameters )
+{
+TickType_t xNextWakeTime;
+const uint32_t ulValueToSend = 100UL;
+
+ /* Remove compiler warning about unused parameter. */
+ ( void ) pvParameters;
+
+ /* Initialise xNextWakeTime - this only needs to be done once. */
+ xNextWakeTime = xTaskGetTickCount();
+
+ for( ;; )
+ {
+ /* Place this task in the blocked state until it is time to run again. */
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
+
+ /* Send to the queue - causing the queue receive task to unblock and
+ toggle the LED. 0 is used as the block time so the sending operation
+ will not block - it shouldn't need to block as the queue should always
+ be empty at this point in the code. */
+ xQueueSend( xQueue, &ulValueToSend, 0U );
+ }
+}
+/*-----------------------------------------------------------*/
+
+static void prvQueueReceiveTask( void *pvParameters )
+{
+uint32_t ulReceivedValue;
+const uint32_t ulExpectedValue = 100UL;
+const TickType_t xShortDelay = pdMS_TO_TICKS( 10 );
+
+ /* Remove compiler warning about unused parameter. */
+ ( void ) pvParameters;
+
+ for( ;; )
+ {
+ /* Wait until something arrives in the queue - this task will block
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
+ FreeRTOSConfig.h. */
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
+
+ /* To get here something must have been received from the queue, but
+ is it the expected value? If it is, toggle the LED. */
+ if( ulReceivedValue == ulExpectedValue )
+ {
+ /* Blip the LED briefly to show the demo is running, but without
+ leaving the LED on too long as energy is being conserved. */
+ configTOGGLE_LED();
+ vTaskDelay( xShortDelay );
+ configTOGGLE_LED();
+
+ ulReceivedValue = 0U;
+ }
+ }
+}
+/*-----------------------------------------------------------*/
+
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h
index b20b35872e..f68ef65d30 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c
index cbf95ba9ae..664f811845 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c
index 17273846f2..6479a2d27a 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c
index ab97444790..c7ef0ae6f5 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h
index 3783319100..5759ab1a89 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s
index 881d37a315..59b1981c3b 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c
index 9da0562b48..dfa10f31f0 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c
index 17273846f2..6479a2d27a 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c
index 185c8e67fd..2a31c3a1bb 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h
index bd8db41b48..80c968c61f 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c
index 11656e5aeb..f75f8079d6 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c
index 7a1631d766..8c028a1325 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c
index 17273846f2..6479a2d27a 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c
index 679ad481bd..25c58974a7 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h
index 14b1d8fb58..b189a7fa9d 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c
index 1cffea22aa..73fe6aa59e 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c
index 7690760036..2c401db6df 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c
index dffde83bfa..deb1748c74 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h
index 5628a5d46b..afceb76595 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c
index b59b5cb6d0..49ca451184 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c
index 22eadcb0f7..292a860bbf 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c
index 8fd2a3720f..7bcdbf4d08 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h
index fae5af7b6c..d60c09e603 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c
index 9325b2445d..cb9371f01b 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c
index 0a36def1f3..f9e9055774 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c
index c2f7b9b9ae..0821b9f863 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h
index 99bcaca3a3..1c330b5734 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h
@@ -1,33 +1,70 @@
/*
- FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- ***NOTE*** The exception to the GPL is included to allow you to distribute
- a combined work that includes FreeRTOS without being obliged to provide the
- source code for proprietary components outside of the FreeRTOS kernel.
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
*/
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
index c4679db4eb..da743c2f38 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm
index 5b43c634ac..61ea6a4e5c 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c
index ebb70df666..171055d5b7 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s
index 2226a452c5..0d861cbc5c 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c
index f65cbf43c1..dd06ad5571 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c
index 3215744a19..68a3c22585 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c
index d0343eb79a..2651144050 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c
index 17b46dd41e..f596ae06f1 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c
index 87c0bd13e9..15a842a5e6 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h
index 16ff078b4d..052eef077a 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c
index 78be2cbcc2..0be41d0c46 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s
index ff475a09e5..3de702608d 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s
+++ b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c
index e9d1b59266..923bd882a2 100644
--- a/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c
index ac88d8d13d..5b1d8f1fa1 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
index b8fcdc6141..321dfe62ed 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h
index 4d257f9e0a..6717a29599 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c
index 84ec8ceb60..b8eba2a38f 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c
index 21053488f8..fc4f25cd52 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c
index 4c188ba936..8f7457b150 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c
index 74a3c58943..893193c4c6 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
index 71f30da7ea..94b3f28654 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h
index 6702b3112e..55c5d07cde 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c
index 1e5905d420..5793a0baac 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c
index a434cd48cd..c4487fa415 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c
index 7ae1d2ce5f..b8038a7cc6 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c
index 1952fbc19a..88a1ce4c93 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c
index 5468f0ebf8..51b73f363f 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c
index 463c1a00b5..2627f97e4e 100644
--- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c
+++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c
index 9bc02822ae..b77b75ae28 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h
index f6607c7019..32d5645f23 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c
index aa9e603bff..89936d3eb7 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c
index c80f970ea9..77c8411a99 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c
index 0f358f1f50..7c4883c405 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c
index d3aa75ce94..ea418159bb 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c
index 00546d97c5..fdd9181d25 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h
index dc75bc88e9..e77a500892 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c
index c698280639..8f1d851612 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c
index c80f970ea9..77c8411a99 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c
index 00cfd9fc1f..0d9eed88eb 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c
index 4d7287db7d..ed0e75543c 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c
index 00546d97c5..fdd9181d25 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h
index dc75bc88e9..e77a500892 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c
index ec0b273032..648c400e25 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c
index 789f075edc..a2ffa0eb8c 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s
index 66d295c227..06293b7f5d 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c
index 00cfd9fc1f..0d9eed88eb 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c
index 7233927377..918e34db18 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c
index e0eaf3491d..2a1b2981f9 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h
index 1a4958f4c2..7e41162880 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c
index 7507b84ccc..d552ed2d7f 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s
index 66d295c227..06293b7f5d 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c
index 789f075edc..a2ffa0eb8c 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c
index 88818a6930..da9337e8d7 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c
index 19a29aa080..4218f5b0f6 100644
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h
index e8b4181a51..fb2f0f3bbb 100644
--- a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c
index 72b7b29568..e3597ceee2 100644
--- a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c
index 2f840377f4..b22cf0222f 100644
--- a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c
index f3129bf25e..79ee203167 100644
--- a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/serial.c b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/serial.c
index d06842540e..b43b32fa7c 100644
--- a/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/serial.c
+++ b/FreeRTOS/Demo/CORTEX_MB9A310_IAR_Keil/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h
index 3830365eac..0c2da3b1e0 100644
--- a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c
index 713121be2d..5ac8239cb2 100644
--- a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c
index 2ccf474fe1..2045e552aa 100644
--- a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c
+++ b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c
index 824b451e3b..5fc05e2de3 100644
--- a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/serial.c b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/serial.c
index a83ce04461..9969628fb4 100644
--- a/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/serial.c
+++ b/FreeRTOS/Demo/CORTEX_MB9B500_IAR_Keil/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h
index 612a84c77d..ab69534d45 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c
index a3b8c907cf..5b45ce1660 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c
index e2b8cfaaac..90e1625c59 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c
index f8556063f8..d4dc592a94 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm
index 7480dd6254..3f336047bf 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c
index 07dd3f6ed1..e6d90d0a5c 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h
index 9274949c21..114b25a9d9 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c
index 6bfb84d6f7..a6603d7a44 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c
index bb977bd9ed..239b7eae28 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c
index 20a6da1a4d..d136add062 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S
index bb852814f0..8e430deb31 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm
index 3edab05a18..c65fd4974f 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c
index 413ff00632..63ea270d7b 100644
--- a/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h
index 62bdf8d717..8416c06cc6 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c
index 16842e44a6..e491504659 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h
index 74460f9818..0dabc92517 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c
index e2ff293c78..cd064dc1a5 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c
index 54130a3ec3..85a54d1c0c 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h
index 7c6aa17cfa..7e624f00a6 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c
index 6d55b1e406..a2ef93ffff 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c
index 2bf0ccf515..9a3c40a2b5 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c
index a2532b91e7..ef84c06afd 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm
index 19734d0305..16271a9465 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c
index 4319450f80..c65a0c4d60 100644
--- a/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c
+++ b/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c
index d5d8aad77c..7bc077fee7 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h
index 2b8292a61c..caebc91ede 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c
index e55323fd63..33038b8286 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c
index 732b7cea7f..8ec7fee6f9 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c
index 73a4dc06ae..fb6114afc1 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S
index 3393005af3..c46085e847 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c
index 5c6c602a52..4db7b72210 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c
@@ -1,314 +1,314 @@
-/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
- All rights reserved
-
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
-
- ***************************************************************************
- >>! NOTE: The modification to the GPL is included to allow you to !<<
- >>! distribute a combined work that includes FreeRTOS without being !<<
- >>! obliged to provide the source code for proprietary components !<<
- >>! outside of the FreeRTOS kernel. !<<
- ***************************************************************************
-
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available on the following
- link: http://www.freertos.org/a00114.html
-
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that is more than just the market leader, it *
- * is the industry's de facto standard. *
- * *
- * Help yourself get started quickly while simultaneously helping *
- * to support the FreeRTOS project by purchasing a FreeRTOS *
- * tutorial book, reference manual, or both: *
- * http://www.FreeRTOS.org/Documentation *
- * *
- ***************************************************************************
-
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
- the FAQ page "My application does not run, what could be wrong?". Have you
- defined configASSERT()?
-
- http://www.FreeRTOS.org/support - In return for receiving this top quality
- embedded software for free we request you assist our global community by
- participating in the support forum.
-
- http://www.FreeRTOS.org/training - Investing in training allows your team to
- be as productive as possible as early as possible. Now you can receive
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
- Ltd, and the world's leading authority on the world's leading RTOS.
-
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS
- compatible FAT file system, and our tiny thread aware UDP/IP stack.
-
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
-
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and commercial middleware.
-
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety
- engineered and independently SIL3 certified version for use in safety and
- mission critical applications that require provable dependability.
-
- 1 tab == 4 spaces!
-*/
-
-/******************************************************************************
- * NOTE 1: This project provides two demo applications. A simple blinky
- * style project, and a more comprehensive test and demo application. The
- * mainSELECTED_APPLICATION setting in main.c is used to select between the two.
- * See the notes on using mainSELECTED_APPLICATION where it is defined below.
- *
- * NOTE 2: This file only contains the source code that is not specific to
- * either the simply blinky or full demos - this includes initialisation code
- * and callback functions.
- */
-
-/* Standard includes. */
-#include <stdio.h>
-
-/* Scheduler include files. */
-#include "FreeRTOS.h"
-#include "task.h"
-
-/* Xilinx includes. */
-#include "platform.h"
-#include "xparameters.h"
-#include "xscugic.h"
-#include "xil_printf.h"
-
-/* mainSELECTED_APPLICATION is used to select between two demo applications,
- * as described at the top of this file.
- *
- * When mainSELECTED_APPLICATION is set to 0 the simple blinky example will
- * be run.
- *
- * When mainSELECTED_APPLICATION is set to 1 the comprehensive test and demo
- * application will be run.
- */
-#define mainSELECTED_APPLICATION 0
-
-/*-----------------------------------------------------------*/
-
-/*
- * Configure the hardware as necessary to run this demo.
- */
-static void prvSetupHardware( void );
-
-/*
- * See the comments at the top of this file and above the
- * mainSELECTED_APPLICATION definition.
- */
-#if ( mainSELECTED_APPLICATION == 0 )
- extern void main_blinky( void );
-#elif ( mainSELECTED_APPLICATION == 1 )
- extern void main_full( void );
-#else
- #error Invalid mainSELECTED_APPLICATION setting. See the comments at the top of this file and above the mainSELECTED_APPLICATION definition.
-#endif
-
-/* Prototypes for the standard FreeRTOS callback/hook functions implemented
-within this file. */
-void vApplicationMallocFailedHook( void );
-void vApplicationIdleHook( void );
-void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
-void vApplicationTickHook( void );
-
-/*-----------------------------------------------------------*/
-
-/* The interrupt controller is initialised in this file, and made available to
-other modules. */
-XScuGic xInterruptController;
-
-/*-----------------------------------------------------------*/
-
-int main( void )
-{
- /* Configure the hardware ready to run the demo. */
- prvSetupHardware();
-
- /* The mainSELECTED_APPLICATION setting is described at the top
- of this file. */
- #if( mainSELECTED_APPLICATION == 0 )
- {
- main_blinky();
- }
- #elif( mainSELECTED_APPLICATION == 1 )
- {
- main_full();
- }
- #endif
-
- /* Don't expect to reach here. */
- return 0;
-}
-/*-----------------------------------------------------------*/
-
-static void prvSetupHardware( void )
-{
-BaseType_t xStatus;
-XScuGic_Config *pxGICConfig;
-
- /* Ensure no interrupts execute while the scheduler is in an inconsistent
- state. Interrupts are automatically enabled when the scheduler is
- started. */
- portDISABLE_INTERRUPTS();
-
- init_platform();
-
- /* Obtain the configuration of the GIC. */
- pxGICConfig = XScuGic_LookupConfig( XPAR_SCUGIC_SINGLE_DEVICE_ID );
-
- /* Sanity check the FreeRTOSConfig.h settings are correct for the
- hardware. */
- configASSERT( pxGICConfig );
- configASSERT( pxGICConfig->CpuBaseAddress == ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) );
- configASSERT( pxGICConfig->DistBaseAddress == configINTERRUPT_CONTROLLER_BASE_ADDRESS );
-
- /* Install a default handler for each GIC interrupt. */
- xStatus = XScuGic_CfgInitialize( &xInterruptController, pxGICConfig, pxGICConfig->CpuBaseAddress );
- configASSERT( xStatus == XST_SUCCESS );
- ( void ) xStatus; /* Remove compiler warning if configASSERT() is not defined. */
-
- /* Ensure the FPU is accessible by enabling access to CP 10 and 11. */
- __asm volatile( "MRC p15, 0, r0, c1, c0, 2 \n" \
- "ORR r0, r0, #(0xF << 20) \n" \
- "MCR p15, 0, r0, c1, c0, 2 \n" \
- "ISB " );
-
-
- /* Ensure the FPU is enabled. */
- __asm volatile( "VMRS r0, FPEXC \n" \
- "ORR r1, r0, #(1<<30) \n" \
- "VMSR FPEXC, r1 \n" \
- ::: "r0", "r1" );
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationMallocFailedHook( void )
-{
- /* Called if a call to pvPortMalloc() fails because there is insufficient
- free memory available in the FreeRTOS heap. pvPortMalloc() is called
- internally by FreeRTOS API functions that create tasks, queues, software
- timers, and semaphores. The size of the FreeRTOS heap is set by the
- configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */
- taskDISABLE_INTERRUPTS();
- for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
-{
- ( void ) pcTaskName;
- ( void ) pxTask;
-
- /* Run time stack overflow checking is performed if
- configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
- function is called if a stack overflow is detected. */
- taskDISABLE_INTERRUPTS();
- for( ;; );
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationIdleHook( void )
-{
-volatile size_t xFreeHeapSpace;
-
- /* This is just a trivial example of an idle hook. It is called on each
- cycle of the idle task. It must *NOT* attempt to block. In this case the
- idle task just queries the amount of FreeRTOS heap that remains. See the
- memory management section on the http://www.FreeRTOS.org web site for memory
- management options. If there is a lot of heap memory free then the
- configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
- RAM. */
- xFreeHeapSpace = xPortGetFreeHeapSize();
-
- /* Remove compiler warning about xFreeHeapSpace being set but never used. */
- ( void ) xFreeHeapSpace;
-}
-/*-----------------------------------------------------------*/
-
-void vApplicationTickHook( void )
-{
- #if( mainSELECTED_APPLICATION == 1 )
- {
- /* Only the comprehensive demo actually uses the tick hook. */
- extern void vFullDemoTickHook( void );
- vFullDemoTickHook();
- }
- #endif
-}
-/*-----------------------------------------------------------*/
-
-/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
-implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
-used by the Idle task. */
-void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
-{
-/* If the buffers to be provided to the Idle task are declared inside this
-function then they must be declared static - otherwise they will be allocated on
-the stack and so not exists after this function exits. */
-static StaticTask_t xIdleTaskTCB;
-static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];
-
- /* Pass out a pointer to the StaticTask_t structure in which the Idle task's
- state will be stored. */
- *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
-
- /* Pass out the array that will be used as the Idle task's stack. */
- *ppxIdleTaskStackBuffer = uxIdleTaskStack;
-
- /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
- Note that, as the array is necessarily of type StackType_t,
- configMINIMAL_STACK_SIZE is specified in words, not bytes. */
- *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
-}
-/*-----------------------------------------------------------*/
-
-/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
-application must provide an implementation of vApplicationGetTimerTaskMemory()
-to provide the memory that is used by the Timer service task. */
-void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
-{
-/* If the buffers to be provided to the Timer task are declared inside this
-function then they must be declared static - otherwise they will be allocated on
-the stack and so not exists after this function exits. */
-static StaticTask_t xTimerTaskTCB;
-static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];
-
- /* Pass out a pointer to the StaticTask_t structure in which the Timer
- task's state will be stored. */
- *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
-
- /* Pass out the array that will be used as the Timer task's stack. */
- *ppxTimerTaskStackBuffer = uxTimerTaskStack;
-
- /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
- Note that, as the array is necessarily of type StackType_t,
- configMINIMAL_STACK_SIZE is specified in words, not bytes. */
- *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
-}
-/*-----------------------------------------------------------*/
-
-void vMainAssertCalled( const char *pcFileName, uint32_t ulLineNumber )
-{
- xil_printf( "ASSERT! Line %lu of file %s\r\n", ulLineNumber, pcFileName );
- taskENTER_CRITICAL();
- for( ;; );
-}
-
-
+/*
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
+ All rights reserved
+
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License (version 2) as published by the
+ Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+
+ ***************************************************************************
+ >>! NOTE: The modification to the GPL is included to allow you to !<<
+ >>! distribute a combined work that includes FreeRTOS without being !<<
+ >>! obliged to provide the source code for proprietary components !<<
+ >>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
+
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
+ link: http://www.freertos.org/a00114.html
+
+ ***************************************************************************
+ * *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
+ * *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
+ * *
+ ***************************************************************************
+
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
+
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.
+
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
+
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety
+ engineered and independently SIL3 certified version for use in safety and
+ mission critical applications that require provable dependability.
+
+ 1 tab == 4 spaces!
+*/
+
+/******************************************************************************
+ * NOTE 1: This project provides two demo applications. A simple blinky
+ * style project, and a more comprehensive test and demo application. The
+ * mainSELECTED_APPLICATION setting in main.c is used to select between the two.
+ * See the notes on using mainSELECTED_APPLICATION where it is defined below.
+ *
+ * NOTE 2: This file only contains the source code that is not specific to
+ * either the simply blinky or full demos - this includes initialisation code
+ * and callback functions.
+ */
+
+/* Standard includes. */
+#include <stdio.h>
+
+/* Scheduler include files. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Xilinx includes. */
+#include "platform.h"
+#include "xparameters.h"
+#include "xscugic.h"
+#include "xil_printf.h"
+
+/* mainSELECTED_APPLICATION is used to select between two demo applications,
+ * as described at the top of this file.
+ *
+ * When mainSELECTED_APPLICATION is set to 0 the simple blinky example will
+ * be run.
+ *
+ * When mainSELECTED_APPLICATION is set to 1 the comprehensive test and demo
+ * application will be run.
+ */
+#define mainSELECTED_APPLICATION 0
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Configure the hardware as necessary to run this demo.
+ */
+static void prvSetupHardware( void );
+
+/*
+ * See the comments at the top of this file and above the
+ * mainSELECTED_APPLICATION definition.
+ */
+#if ( mainSELECTED_APPLICATION == 0 )
+ extern void main_blinky( void );
+#elif ( mainSELECTED_APPLICATION == 1 )
+ extern void main_full( void );
+#else
+ #error Invalid mainSELECTED_APPLICATION setting. See the comments at the top of this file and above the mainSELECTED_APPLICATION definition.
+#endif
+
+/* Prototypes for the standard FreeRTOS callback/hook functions implemented
+within this file. */
+void vApplicationMallocFailedHook( void );
+void vApplicationIdleHook( void );
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
+void vApplicationTickHook( void );
+
+/*-----------------------------------------------------------*/
+
+/* The interrupt controller is initialised in this file, and made available to
+other modules. */
+XScuGic xInterruptController;
+
+/*-----------------------------------------------------------*/
+
+int main( void )
+{
+ /* Configure the hardware ready to run the demo. */
+ prvSetupHardware();
+
+ /* The mainSELECTED_APPLICATION setting is described at the top
+ of this file. */
+ #if( mainSELECTED_APPLICATION == 0 )
+ {
+ main_blinky();
+ }
+ #elif( mainSELECTED_APPLICATION == 1 )
+ {
+ main_full();
+ }
+ #endif
+
+ /* Don't expect to reach here. */
+ return 0;
+}
+/*-----------------------------------------------------------*/
+
+static void prvSetupHardware( void )
+{
+BaseType_t xStatus;
+XScuGic_Config *pxGICConfig;
+
+ /* Ensure no interrupts execute while the scheduler is in an inconsistent
+ state. Interrupts are automatically enabled when the scheduler is
+ started. */
+ portDISABLE_INTERRUPTS();
+
+ init_platform();
+
+ /* Obtain the configuration of the GIC. */
+ pxGICConfig = XScuGic_LookupConfig( XPAR_SCUGIC_SINGLE_DEVICE_ID );
+
+ /* Sanity check the FreeRTOSConfig.h settings are correct for the
+ hardware. */
+ configASSERT( pxGICConfig );
+ configASSERT( pxGICConfig->CpuBaseAddress == ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET ) );
+ configASSERT( pxGICConfig->DistBaseAddress == configINTERRUPT_CONTROLLER_BASE_ADDRESS );
+
+ /* Install a default handler for each GIC interrupt. */
+ xStatus = XScuGic_CfgInitialize( &xInterruptController, pxGICConfig, pxGICConfig->CpuBaseAddress );
+ configASSERT( xStatus == XST_SUCCESS );
+ ( void ) xStatus; /* Remove compiler warning if configASSERT() is not defined. */
+
+ /* Ensure the FPU is accessible by enabling access to CP 10 and 11. */
+ __asm volatile( "MRC p15, 0, r0, c1, c0, 2 \n" \
+ "ORR r0, r0, #(0xF << 20) \n" \
+ "MCR p15, 0, r0, c1, c0, 2 \n" \
+ "ISB " );
+
+
+ /* Ensure the FPU is enabled. */
+ __asm volatile( "VMRS r0, FPEXC \n" \
+ "ORR r1, r0, #(1<<30) \n" \
+ "VMSR FPEXC, r1 \n" \
+ ::: "r0", "r1" );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationMallocFailedHook( void )
+{
+ /* Called if a call to pvPortMalloc() fails because there is insufficient
+ free memory available in the FreeRTOS heap. pvPortMalloc() is called
+ internally by FreeRTOS API functions that create tasks, queues, software
+ timers, and semaphores. The size of the FreeRTOS heap is set by the
+ configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */
+ taskDISABLE_INTERRUPTS();
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
+{
+ ( void ) pcTaskName;
+ ( void ) pxTask;
+
+ /* Run time stack overflow checking is performed if
+ configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
+ function is called if a stack overflow is detected. */
+ taskDISABLE_INTERRUPTS();
+ for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationIdleHook( void )
+{
+volatile size_t xFreeHeapSpace;
+
+ /* This is just a trivial example of an idle hook. It is called on each
+ cycle of the idle task. It must *NOT* attempt to block. In this case the
+ idle task just queries the amount of FreeRTOS heap that remains. See the
+ memory management section on the http://www.FreeRTOS.org web site for memory
+ management options. If there is a lot of heap memory free then the
+ configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
+ RAM. */
+ xFreeHeapSpace = xPortGetFreeHeapSize();
+
+ /* Remove compiler warning about xFreeHeapSpace being set but never used. */
+ ( void ) xFreeHeapSpace;
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationTickHook( void )
+{
+ #if( mainSELECTED_APPLICATION == 1 )
+ {
+ /* Only the comprehensive demo actually uses the tick hook. */
+ extern void vFullDemoTickHook( void );
+ vFullDemoTickHook();
+ }
+ #endif
+}
+/*-----------------------------------------------------------*/
+
+/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
+implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
+used by the Idle task. */
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
+{
+/* If the buffers to be provided to the Idle task are declared inside this
+function then they must be declared static - otherwise they will be allocated on
+the stack and so not exists after this function exits. */
+static StaticTask_t xIdleTaskTCB;
+static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];
+
+ /* Pass out a pointer to the StaticTask_t structure in which the Idle task's
+ state will be stored. */
+ *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
+
+ /* Pass out the array that will be used as the Idle task's stack. */
+ *ppxIdleTaskStackBuffer = uxIdleTaskStack;
+
+ /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
+ Note that, as the array is necessarily of type StackType_t,
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+ *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+}
+/*-----------------------------------------------------------*/
+
+/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
+application must provide an implementation of vApplicationGetTimerTaskMemory()
+to provide the memory that is used by the Timer service task. */
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
+{
+/* If the buffers to be provided to the Timer task are declared inside this
+function then they must be declared static - otherwise they will be allocated on
+the stack and so not exists after this function exits. */
+static StaticTask_t xTimerTaskTCB;
+static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];
+
+ /* Pass out a pointer to the StaticTask_t structure in which the Timer
+ task's state will be stored. */
+ *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
+
+ /* Pass out the array that will be used as the Timer task's stack. */
+ *ppxTimerTaskStackBuffer = uxTimerTaskStack;
+
+ /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
+ Note that, as the array is necessarily of type StackType_t,
+ configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+ *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
+}
+/*-----------------------------------------------------------*/
+
+void vMainAssertCalled( const char *pcFileName, uint32_t ulLineNumber )
+{
+ xil_printf( "ASSERT! Line %lu of file %s\r\n", ulLineNumber, pcFileName );
+ taskENTER_CRITICAL();
+ for( ;; );
+}
+
+
diff --git a/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h
index 65a99f4d7e..dba9342461 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c b/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c
index 459a26b569..4a6e4b3494 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c
index f02d812097..7689d2e673 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h
index f5ad62c71f..e0b440b0fb 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h
index 9c639184dd..bcbf384aa6 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c
index bbe86008e5..1ba18edd58 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c
index 54daecb003..232b86918d 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/main.c b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/main.c
index aeecddafcb..bd5cea8d78 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_GCC_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
index ad185aa585..cb056ec891 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
index 54daecb003..232b86918d 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/main.c b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/main.c
index 019304c5df..9a8e54eae4 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/serial/serial.c b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/serial/serial.c
index a8a35f2d5a..8601a86315 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/timertest.c b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/timertest.c
index 8b6b888275..f79047724b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_IAR/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_IAR/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h
index ad185aa585..cb056ec891 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c
index 54daecb003..232b86918d 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/main.c b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/main.c
index 019304c5df..9a8e54eae4 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/serial/serial.c b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/serial/serial.c
index a8a35f2d5a..8601a86315 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/serial/serial.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/timertest.c b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/timertest.c
index 8b6b888275..f79047724b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Keil/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Keil/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h
index 3261e8b45e..bcaa610f30 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c
index 7728261a88..33214f9216 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h
index 43300fb9c9..f07565af98 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/main.c b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/main.c
index d070089d98..72abe0cb8e 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c
index 8b6b888275..f79047724b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/FreeRTOSConfig.h
index 7b1ba3a9d4..7aa182265d 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/ParTest/ParTest.c b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/ParTest/ParTest.c
index 449d2ba636..a55ff4efed 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/main.c b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/main.c
index 792050288a..65f504a46d 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/timertest.c b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/timertest.c
index a2a368a638..928864fd2b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/timertest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.c b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.c
index 0f3e3257b1..4dc46fa72c 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.h b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.h
index a9f37e89f9..c959008fb3 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.h
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/emac.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/uIP_Task.c b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/uIP_Task.c
index 7c69f73d62..b74087e81f 100644
--- a/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/uIP_Task.c
+++ b/FreeRTOS/Demo/CORTEX_STM32F107_GCC_Rowley/webserver/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c
index ba6543835c..73631c9b3b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h
index f63b79f667..0fdd35fb58 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main.c b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main.c
index 5589260f19..afc0cdf3ee 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c
index dcb9577d28..0613f7227f 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c
index 9885dda3a2..3b6d39d4c5 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h
index 90ef36cd69..41542af91e 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/ParTest.c b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/ParTest.c
index ebccca87f9..5e10390d8a 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/main.c b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/main.c
index 58a4e39a28..9025da166b 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/main.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/serial.c b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/serial.c
index 820ac47850..847ac03755 100644
--- a/FreeRTOS/Demo/CORTEX_STM32L152_IAR/serial.c
+++ b/FreeRTOS/Demo/CORTEX_STM32L152_IAR/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Blinky-Demo/main_blinky.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Blinky-Demo/main_blinky.c
index 4e48e50145..0abe769c7e 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Blinky-Demo/main_blinky.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Blinky-Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/FreeRTOSConfig.h
index 4c677c3811..9a3842ea8e 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-releated-CLI-commands.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-releated-CLI-commands.c
index 96877edd4b..bb64bda499 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-releated-CLI-commands.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-releated-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-system-demo.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-system-demo.c
index 99c13efb21..238af7d732 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-system-demo.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/File-system-demo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c
index 19fcc6ad6d..fc8441a6c5 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/Sample-CLI-commands.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.c
index 6875add734..d88235ce2e 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.h b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.h
index 626008d170..9f31d40ad2 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.h
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/UARTCommandConsole.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/main_full.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/main_full.c
index 8440460f9d..b9889993f6 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/main_full.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/Full-Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/ParTest.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/ParTest.c
index 08bf456ce0..95672676d7 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/RunTimeStatsTimer.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/RunTimeStatsTimer.c
index 15eba6d106..7e2f054aa0 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/RunTimeStatsTimer.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/RunTimeStatsTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/main.c b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/main.c
index fed3d1e78c..669a34a86e 100644
--- a/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/CORTEX_SmartFusion2_M2S050_SoftConsole/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.c b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.c
index f26bb26ed3..01077bb6ab 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.c
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.h b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.h
index bbd20c95e2..b48b4aa41e 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.h
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/7seg.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h
index 0d43367917..d04e3e44b1 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/ParTest.c b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/ParTest.c
index 335c7229d4..307401baad 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/ParTest.c
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c
index 58d0ce9651..9f9853709d 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.h b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.h
index 2dd7663c6b..10e137cfcc 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.h
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h
index d8870b9e51..381146b490 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/main.c b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/main.c
index fc8326cead..095c218de5 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/main.c
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/serial.c b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/serial.c
index 1283d7caba..507b9e13fa 100644
--- a/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/serial.c
+++ b/FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/FreeRTOSConfig.h b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/FreeRTOSConfig.h
index ca883361bc..efe98f0676 100644
--- a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/ParTest/ParTest.c b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/ParTest/ParTest.c
index db3de9db0a..9feae582a5 100644
--- a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/httpd/uIP_Task.c b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/httpd/uIP_Task.c
index 9cf11b136f..bea5800be1 100644
--- a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/httpd/uIP_Task.c
+++ b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/httpd/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/main.c b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/main.c
index 8d74c01789..83bf5ff493 100644
--- a/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/main.c
+++ b/FreeRTOS/Demo/ColdFire_MCF51CN128_CodeWarrior/Sources/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
index 1fe895af6f..b19b81285e 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c
index b7d507c11c..3687355df7 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c
index 28c54a4885..314dae710d 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
index ac286c82e6..34ea858cd2 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c
index d72c29e690..979633e55b 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h
index 4f3d8e5921..8373200883 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c
index e4c8c68ac9..f3e44f69d7 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c
index ba8d2a9f55..e9024e4bf5 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h
index 0a5e672eeb..813c62a7c2 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c
index 28c54a4885..314dae710d 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/main.c b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/main.c
index 7964f37856..3d75df8f9c 100644
--- a/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/main.c
+++ b/FreeRTOS/Demo/ColdFire_MCF52259_CodeWarrior/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/BlockQ.c b/FreeRTOS/Demo/Common/Full/BlockQ.c
index 4a11f789aa..5780fdcda1 100644
--- a/FreeRTOS/Demo/Common/Full/BlockQ.c
+++ b/FreeRTOS/Demo/Common/Full/BlockQ.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/PollQ.c b/FreeRTOS/Demo/Common/Full/PollQ.c
index c0cf3c25ae..f6d6bb7f30 100644
--- a/FreeRTOS/Demo/Common/Full/PollQ.c
+++ b/FreeRTOS/Demo/Common/Full/PollQ.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/comtest.c b/FreeRTOS/Demo/Common/Full/comtest.c
index 74af70c49c..5c961f35f1 100644
--- a/FreeRTOS/Demo/Common/Full/comtest.c
+++ b/FreeRTOS/Demo/Common/Full/comtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/death.c b/FreeRTOS/Demo/Common/Full/death.c
index 9dfbd8b451..db8b180080 100644
--- a/FreeRTOS/Demo/Common/Full/death.c
+++ b/FreeRTOS/Demo/Common/Full/death.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/dynamic.c b/FreeRTOS/Demo/Common/Full/dynamic.c
index b63f044a2e..fca4b82208 100644
--- a/FreeRTOS/Demo/Common/Full/dynamic.c
+++ b/FreeRTOS/Demo/Common/Full/dynamic.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/events.c b/FreeRTOS/Demo/Common/Full/events.c
index 6bd5f415f3..2a89975da1 100644
--- a/FreeRTOS/Demo/Common/Full/events.c
+++ b/FreeRTOS/Demo/Common/Full/events.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/flash.c b/FreeRTOS/Demo/Common/Full/flash.c
index b720f559be..19d49b630e 100644
--- a/FreeRTOS/Demo/Common/Full/flash.c
+++ b/FreeRTOS/Demo/Common/Full/flash.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/flop.c b/FreeRTOS/Demo/Common/Full/flop.c
index 6dfd977351..e73762e6fc 100644
--- a/FreeRTOS/Demo/Common/Full/flop.c
+++ b/FreeRTOS/Demo/Common/Full/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/integer.c b/FreeRTOS/Demo/Common/Full/integer.c
index 22bb42bbc0..417234e071 100644
--- a/FreeRTOS/Demo/Common/Full/integer.c
+++ b/FreeRTOS/Demo/Common/Full/integer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/print.c b/FreeRTOS/Demo/Common/Full/print.c
index 9e4ec8648c..3b5c36826a 100644
--- a/FreeRTOS/Demo/Common/Full/print.c
+++ b/FreeRTOS/Demo/Common/Full/print.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Full/semtest.c b/FreeRTOS/Demo/Common/Full/semtest.c
index 82cb4920bd..a9744b83dd 100644
--- a/FreeRTOS/Demo/Common/Full/semtest.c
+++ b/FreeRTOS/Demo/Common/Full/semtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/AbortDelay.c b/FreeRTOS/Demo/Common/Minimal/AbortDelay.c
index d32d31dc86..d7ae30bcfe 100644
--- a/FreeRTOS/Demo/Common/Minimal/AbortDelay.c
+++ b/FreeRTOS/Demo/Common/Minimal/AbortDelay.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/BlockQ.c b/FreeRTOS/Demo/Common/Minimal/BlockQ.c
index bfab0745be..141731e211 100644
--- a/FreeRTOS/Demo/Common/Minimal/BlockQ.c
+++ b/FreeRTOS/Demo/Common/Minimal/BlockQ.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/EventGroupsDemo.c b/FreeRTOS/Demo/Common/Minimal/EventGroupsDemo.c
index 51fd320ac9..67c874579f 100644
--- a/FreeRTOS/Demo/Common/Minimal/EventGroupsDemo.c
+++ b/FreeRTOS/Demo/Common/Minimal/EventGroupsDemo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/GenQTest.c b/FreeRTOS/Demo/Common/Minimal/GenQTest.c
index 4346598600..7b43395630 100644
--- a/FreeRTOS/Demo/Common/Minimal/GenQTest.c
+++ b/FreeRTOS/Demo/Common/Minimal/GenQTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/IntQueue.c b/FreeRTOS/Demo/Common/Minimal/IntQueue.c
index aaa7541c16..490ec8c63a 100644
--- a/FreeRTOS/Demo/Common/Minimal/IntQueue.c
+++ b/FreeRTOS/Demo/Common/Minimal/IntQueue.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/IntSemTest.c b/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
index 234591612c..40517c87aa 100644
--- a/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
+++ b/FreeRTOS/Demo/Common/Minimal/IntSemTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/PollQ.c b/FreeRTOS/Demo/Common/Minimal/PollQ.c
index 9e575e0e66..ce6d80594c 100644
--- a/FreeRTOS/Demo/Common/Minimal/PollQ.c
+++ b/FreeRTOS/Demo/Common/Minimal/PollQ.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/QPeek.c b/FreeRTOS/Demo/Common/Minimal/QPeek.c
index 26f1abfb47..9152b9426c 100644
--- a/FreeRTOS/Demo/Common/Minimal/QPeek.c
+++ b/FreeRTOS/Demo/Common/Minimal/QPeek.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/QueueOverwrite.c b/FreeRTOS/Demo/Common/Minimal/QueueOverwrite.c
index 0e0b7b02b2..47233185db 100644
--- a/FreeRTOS/Demo/Common/Minimal/QueueOverwrite.c
+++ b/FreeRTOS/Demo/Common/Minimal/QueueOverwrite.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/QueueSet.c b/FreeRTOS/Demo/Common/Minimal/QueueSet.c
index da688d9052..f97ebb0830 100644
--- a/FreeRTOS/Demo/Common/Minimal/QueueSet.c
+++ b/FreeRTOS/Demo/Common/Minimal/QueueSet.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/QueueSetPolling.c b/FreeRTOS/Demo/Common/Minimal/QueueSetPolling.c
index e4e03859e3..7b51561acf 100644
--- a/FreeRTOS/Demo/Common/Minimal/QueueSetPolling.c
+++ b/FreeRTOS/Demo/Common/Minimal/QueueSetPolling.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/StaticAllocation.c b/FreeRTOS/Demo/Common/Minimal/StaticAllocation.c
index 0c3a2b69d8..e45901689a 100644
--- a/FreeRTOS/Demo/Common/Minimal/StaticAllocation.c
+++ b/FreeRTOS/Demo/Common/Minimal/StaticAllocation.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/TaskNotify.c b/FreeRTOS/Demo/Common/Minimal/TaskNotify.c
index e2c6b37e86..2eafef4649 100644
--- a/FreeRTOS/Demo/Common/Minimal/TaskNotify.c
+++ b/FreeRTOS/Demo/Common/Minimal/TaskNotify.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/TimerDemo.c b/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
index ec4996dea7..d5b0360de0 100644
--- a/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
+++ b/FreeRTOS/Demo/Common/Minimal/TimerDemo.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/blocktim.c b/FreeRTOS/Demo/Common/Minimal/blocktim.c
index 883a1c5a88..cbc4269ab2 100644
--- a/FreeRTOS/Demo/Common/Minimal/blocktim.c
+++ b/FreeRTOS/Demo/Common/Minimal/blocktim.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/comtest.c b/FreeRTOS/Demo/Common/Minimal/comtest.c
index 477bc1f488..daea5d2dcb 100644
--- a/FreeRTOS/Demo/Common/Minimal/comtest.c
+++ b/FreeRTOS/Demo/Common/Minimal/comtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/comtest_strings.c b/FreeRTOS/Demo/Common/Minimal/comtest_strings.c
index d23beb8500..dcd4fb22ec 100644
--- a/FreeRTOS/Demo/Common/Minimal/comtest_strings.c
+++ b/FreeRTOS/Demo/Common/Minimal/comtest_strings.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/countsem.c b/FreeRTOS/Demo/Common/Minimal/countsem.c
index 4f2e5dc7f3..575eded65e 100644
--- a/FreeRTOS/Demo/Common/Minimal/countsem.c
+++ b/FreeRTOS/Demo/Common/Minimal/countsem.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/crflash.c b/FreeRTOS/Demo/Common/Minimal/crflash.c
index 4feeab49eb..9d0f07632d 100644
--- a/FreeRTOS/Demo/Common/Minimal/crflash.c
+++ b/FreeRTOS/Demo/Common/Minimal/crflash.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/crhook.c b/FreeRTOS/Demo/Common/Minimal/crhook.c
index 641d5ff956..4251122066 100644
--- a/FreeRTOS/Demo/Common/Minimal/crhook.c
+++ b/FreeRTOS/Demo/Common/Minimal/crhook.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/death.c b/FreeRTOS/Demo/Common/Minimal/death.c
index 83c225c811..144e23c10d 100644
--- a/FreeRTOS/Demo/Common/Minimal/death.c
+++ b/FreeRTOS/Demo/Common/Minimal/death.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/dynamic.c b/FreeRTOS/Demo/Common/Minimal/dynamic.c
index dd0edfde40..0c15710199 100644
--- a/FreeRTOS/Demo/Common/Minimal/dynamic.c
+++ b/FreeRTOS/Demo/Common/Minimal/dynamic.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/flash.c b/FreeRTOS/Demo/Common/Minimal/flash.c
index 8627a57813..113aa847cf 100644
--- a/FreeRTOS/Demo/Common/Minimal/flash.c
+++ b/FreeRTOS/Demo/Common/Minimal/flash.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/flash_timer.c b/FreeRTOS/Demo/Common/Minimal/flash_timer.c
index d554681007..8c58522918 100644
--- a/FreeRTOS/Demo/Common/Minimal/flash_timer.c
+++ b/FreeRTOS/Demo/Common/Minimal/flash_timer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/flop.c b/FreeRTOS/Demo/Common/Minimal/flop.c
index 07dae770f8..0c107b7b67 100644
--- a/FreeRTOS/Demo/Common/Minimal/flop.c
+++ b/FreeRTOS/Demo/Common/Minimal/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/integer.c b/FreeRTOS/Demo/Common/Minimal/integer.c
index ffdab958e9..8e01ff1c8b 100644
--- a/FreeRTOS/Demo/Common/Minimal/integer.c
+++ b/FreeRTOS/Demo/Common/Minimal/integer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/recmutex.c b/FreeRTOS/Demo/Common/Minimal/recmutex.c
index 9c648428a1..0e0b1e85b5 100644
--- a/FreeRTOS/Demo/Common/Minimal/recmutex.c
+++ b/FreeRTOS/Demo/Common/Minimal/recmutex.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/semtest.c b/FreeRTOS/Demo/Common/Minimal/semtest.c
index 4ff98dd384..4c2ef9348f 100644
--- a/FreeRTOS/Demo/Common/Minimal/semtest.c
+++ b/FreeRTOS/Demo/Common/Minimal/semtest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/Minimal/sp_flop.c b/FreeRTOS/Demo/Common/Minimal/sp_flop.c
index 4c98d2341b..41b9cc9e20 100644
--- a/FreeRTOS/Demo/Common/Minimal/sp_flop.c
+++ b/FreeRTOS/Demo/Common/Minimal/sp_flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c
index 5b02029234..1c4db81989 100644
--- a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c
+++ b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c
index 5d85d6e06f..cd0b1832a9 100644
--- a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c
+++ b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h
index 78a7305459..33cf7a9b2a 100644
--- a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h
+++ b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c
index b6be10b86c..b3ae35ec6c 100644
--- a/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c
+++ b/FreeRTOS/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/AbortDelay.h b/FreeRTOS/Demo/Common/include/AbortDelay.h
index bb1abbb8af..cdd2b840f8 100644
--- a/FreeRTOS/Demo/Common/include/AbortDelay.h
+++ b/FreeRTOS/Demo/Common/include/AbortDelay.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/BlockQ.h b/FreeRTOS/Demo/Common/include/BlockQ.h
index 35a473aabd..6bb2964c95 100644
--- a/FreeRTOS/Demo/Common/include/BlockQ.h
+++ b/FreeRTOS/Demo/Common/include/BlockQ.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/EventGroupsDemo.h b/FreeRTOS/Demo/Common/include/EventGroupsDemo.h
index 48281abfe5..b1c0365174 100644
--- a/FreeRTOS/Demo/Common/include/EventGroupsDemo.h
+++ b/FreeRTOS/Demo/Common/include/EventGroupsDemo.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/GenQTest.h b/FreeRTOS/Demo/Common/include/GenQTest.h
index 7dad7f56ca..ec761b2e1a 100644
--- a/FreeRTOS/Demo/Common/include/GenQTest.h
+++ b/FreeRTOS/Demo/Common/include/GenQTest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/IntQueue.h b/FreeRTOS/Demo/Common/include/IntQueue.h
index f83a69f2f9..23b96216dd 100644
--- a/FreeRTOS/Demo/Common/include/IntQueue.h
+++ b/FreeRTOS/Demo/Common/include/IntQueue.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/IntSemTest.h b/FreeRTOS/Demo/Common/include/IntSemTest.h
index 49ac8d4c39..fcf65d6fed 100644
--- a/FreeRTOS/Demo/Common/include/IntSemTest.h
+++ b/FreeRTOS/Demo/Common/include/IntSemTest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/PollQ.h b/FreeRTOS/Demo/Common/include/PollQ.h
index f73eebf450..a5e933237d 100644
--- a/FreeRTOS/Demo/Common/include/PollQ.h
+++ b/FreeRTOS/Demo/Common/include/PollQ.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/QPeek.h b/FreeRTOS/Demo/Common/include/QPeek.h
index a0e5e00c6b..de62c120a7 100644
--- a/FreeRTOS/Demo/Common/include/QPeek.h
+++ b/FreeRTOS/Demo/Common/include/QPeek.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/QueueOverwrite.h b/FreeRTOS/Demo/Common/include/QueueOverwrite.h
index 661ae55ef6..1ddee842cd 100644
--- a/FreeRTOS/Demo/Common/include/QueueOverwrite.h
+++ b/FreeRTOS/Demo/Common/include/QueueOverwrite.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/QueueSet.h b/FreeRTOS/Demo/Common/include/QueueSet.h
index ce2ccc19bc..6bbdc71ef0 100644
--- a/FreeRTOS/Demo/Common/include/QueueSet.h
+++ b/FreeRTOS/Demo/Common/include/QueueSet.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/QueueSetPolling.h b/FreeRTOS/Demo/Common/include/QueueSetPolling.h
index e06c2bd206..636947c96a 100644
--- a/FreeRTOS/Demo/Common/include/QueueSetPolling.h
+++ b/FreeRTOS/Demo/Common/include/QueueSetPolling.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/StaticAllocation.h b/FreeRTOS/Demo/Common/include/StaticAllocation.h
index e230911ce4..f63e5517c0 100644
--- a/FreeRTOS/Demo/Common/include/StaticAllocation.h
+++ b/FreeRTOS/Demo/Common/include/StaticAllocation.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/TaskNotify.h b/FreeRTOS/Demo/Common/include/TaskNotify.h
index 250522260b..794470ea8f 100644
--- a/FreeRTOS/Demo/Common/include/TaskNotify.h
+++ b/FreeRTOS/Demo/Common/include/TaskNotify.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/TimerDemo.h b/FreeRTOS/Demo/Common/include/TimerDemo.h
index 7ee7a66505..1b66cf2895 100644
--- a/FreeRTOS/Demo/Common/include/TimerDemo.h
+++ b/FreeRTOS/Demo/Common/include/TimerDemo.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/blocktim.h b/FreeRTOS/Demo/Common/include/blocktim.h
index caba85a36a..74ca72756d 100644
--- a/FreeRTOS/Demo/Common/include/blocktim.h
+++ b/FreeRTOS/Demo/Common/include/blocktim.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/comtest.h b/FreeRTOS/Demo/Common/include/comtest.h
index 3c4093dbc6..08d3e95efb 100644
--- a/FreeRTOS/Demo/Common/include/comtest.h
+++ b/FreeRTOS/Demo/Common/include/comtest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/comtest2.h b/FreeRTOS/Demo/Common/include/comtest2.h
index 78e1db008f..ca73c7b159 100644
--- a/FreeRTOS/Demo/Common/include/comtest2.h
+++ b/FreeRTOS/Demo/Common/include/comtest2.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/comtest_strings.h b/FreeRTOS/Demo/Common/include/comtest_strings.h
index 554d139e12..1607392104 100644
--- a/FreeRTOS/Demo/Common/include/comtest_strings.h
+++ b/FreeRTOS/Demo/Common/include/comtest_strings.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/countsem.h b/FreeRTOS/Demo/Common/include/countsem.h
index 1bab590ec1..6fb0325b2d 100644
--- a/FreeRTOS/Demo/Common/include/countsem.h
+++ b/FreeRTOS/Demo/Common/include/countsem.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/crflash.h b/FreeRTOS/Demo/Common/include/crflash.h
index bcdce4a7ff..3c2d6227b5 100644
--- a/FreeRTOS/Demo/Common/include/crflash.h
+++ b/FreeRTOS/Demo/Common/include/crflash.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/crhook.h b/FreeRTOS/Demo/Common/include/crhook.h
index 7841970b66..73fd515d3b 100644
--- a/FreeRTOS/Demo/Common/include/crhook.h
+++ b/FreeRTOS/Demo/Common/include/crhook.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/death.h b/FreeRTOS/Demo/Common/include/death.h
index 6ab69837bf..2874a7a72f 100644
--- a/FreeRTOS/Demo/Common/include/death.h
+++ b/FreeRTOS/Demo/Common/include/death.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/dynamic.h b/FreeRTOS/Demo/Common/include/dynamic.h
index 895823e491..a27b198bf4 100644
--- a/FreeRTOS/Demo/Common/include/dynamic.h
+++ b/FreeRTOS/Demo/Common/include/dynamic.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/fileIO.h b/FreeRTOS/Demo/Common/include/fileIO.h
index aaf0b2e88a..3c06b12da4 100644
--- a/FreeRTOS/Demo/Common/include/fileIO.h
+++ b/FreeRTOS/Demo/Common/include/fileIO.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/flash.h b/FreeRTOS/Demo/Common/include/flash.h
index 8555c56343..2e08b43890 100644
--- a/FreeRTOS/Demo/Common/include/flash.h
+++ b/FreeRTOS/Demo/Common/include/flash.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/flash_timer.h b/FreeRTOS/Demo/Common/include/flash_timer.h
index 0aaf1a0d51..d5866c2cf2 100644
--- a/FreeRTOS/Demo/Common/include/flash_timer.h
+++ b/FreeRTOS/Demo/Common/include/flash_timer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/flop.h b/FreeRTOS/Demo/Common/include/flop.h
index ae765efbfc..0cf3316cb3 100644
--- a/FreeRTOS/Demo/Common/include/flop.h
+++ b/FreeRTOS/Demo/Common/include/flop.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/integer.h b/FreeRTOS/Demo/Common/include/integer.h
index c58aac47e2..2c8d20b849 100644
--- a/FreeRTOS/Demo/Common/include/integer.h
+++ b/FreeRTOS/Demo/Common/include/integer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/mevents.h b/FreeRTOS/Demo/Common/include/mevents.h
index 0964d69f3e..3ac78a00b7 100644
--- a/FreeRTOS/Demo/Common/include/mevents.h
+++ b/FreeRTOS/Demo/Common/include/mevents.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/partest.h b/FreeRTOS/Demo/Common/include/partest.h
index 6ba1b5da52..ab48ebfe18 100644
--- a/FreeRTOS/Demo/Common/include/partest.h
+++ b/FreeRTOS/Demo/Common/include/partest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/print.h b/FreeRTOS/Demo/Common/include/print.h
index b1a1ed91a0..badea5f1bd 100644
--- a/FreeRTOS/Demo/Common/include/print.h
+++ b/FreeRTOS/Demo/Common/include/print.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/recmutex.h b/FreeRTOS/Demo/Common/include/recmutex.h
index 71409948f3..a1c641967c 100644
--- a/FreeRTOS/Demo/Common/include/recmutex.h
+++ b/FreeRTOS/Demo/Common/include/recmutex.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/semtest.h b/FreeRTOS/Demo/Common/include/semtest.h
index 6e5a25f173..2a4c2f19a6 100644
--- a/FreeRTOS/Demo/Common/include/semtest.h
+++ b/FreeRTOS/Demo/Common/include/semtest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Common/include/serial.h b/FreeRTOS/Demo/Common/include/serial.h
index 71f30da7ea..94b3f28654 100644
--- a/FreeRTOS/Demo/Common/include/serial.h
+++ b/FreeRTOS/Demo/Common/include/serial.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Cygnal/FreeRTOSConfig.h b/FreeRTOS/Demo/Cygnal/FreeRTOSConfig.h
index d8a41be20b..830d77042f 100644
--- a/FreeRTOS/Demo/Cygnal/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/Cygnal/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Cygnal/Makefile b/FreeRTOS/Demo/Cygnal/Makefile
index feb6580a2c..b3ef6d08a9 100644
--- a/FreeRTOS/Demo/Cygnal/Makefile
+++ b/FreeRTOS/Demo/Cygnal/Makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/Cygnal/ParTest/ParTest.c b/FreeRTOS/Demo/Cygnal/ParTest/ParTest.c
index 9b20b19530..da96e336aa 100644
--- a/FreeRTOS/Demo/Cygnal/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/Cygnal/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Cygnal/main.c b/FreeRTOS/Demo/Cygnal/main.c
index 27830cf7a7..78a7ffdd4b 100644
--- a/FreeRTOS/Demo/Cygnal/main.c
+++ b/FreeRTOS/Demo/Cygnal/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Cygnal/serial/serial.c b/FreeRTOS/Demo/Cygnal/serial/serial.c
index 0cdfe798f5..9cee48d076 100644
--- a/FreeRTOS/Demo/Cygnal/serial/serial.c
+++ b/FreeRTOS/Demo/Cygnal/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/FRConfig.h b/FreeRTOS/Demo/Flshlite/FRConfig.h
index a3e89afa72..151f813c3f 100644
--- a/FreeRTOS/Demo/Flshlite/FRConfig.h
+++ b/FreeRTOS/Demo/Flshlite/FRConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/FileIO/fileIO.c b/FreeRTOS/Demo/Flshlite/FileIO/fileIO.c
index 8a887446e9..63d4a839a4 100644
--- a/FreeRTOS/Demo/Flshlite/FileIO/fileIO.c
+++ b/FreeRTOS/Demo/Flshlite/FileIO/fileIO.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/FreeRTOSConfig.h b/FreeRTOS/Demo/Flshlite/FreeRTOSConfig.h
index cc9a5e6cab..9d83934999 100644
--- a/FreeRTOS/Demo/Flshlite/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/Flshlite/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/ParTest/ParTest.c b/FreeRTOS/Demo/Flshlite/ParTest/ParTest.c
index 46a4bffd29..396978a784 100644
--- a/FreeRTOS/Demo/Flshlite/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/Flshlite/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/main.c b/FreeRTOS/Demo/Flshlite/main.c
index 0bf3c583d9..3bfe78703d 100644
--- a/FreeRTOS/Demo/Flshlite/main.c
+++ b/FreeRTOS/Demo/Flshlite/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Flshlite/serial/serial.c b/FreeRTOS/Demo/Flshlite/serial/serial.c
index b5355d6b30..8fddda42dd 100644
--- a/FreeRTOS/Demo/Flshlite/serial/serial.c
+++ b/FreeRTOS/Demo/Flshlite/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/H8S/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
index e0f2ac62d6..4452765368 100644
--- a/FreeRTOS/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/H8S/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/H8S/RTOSDemo/ParTest/ParTest.c b/FreeRTOS/Demo/H8S/RTOSDemo/ParTest/ParTest.c
index e0a0081556..ac25aa967b 100644
--- a/FreeRTOS/Demo/H8S/RTOSDemo/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/H8S/RTOSDemo/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/H8S/RTOSDemo/main.c b/FreeRTOS/Demo/H8S/RTOSDemo/main.c
index 1776d15eac..cf73558ca8 100644
--- a/FreeRTOS/Demo/H8S/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/H8S/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/H8S/RTOSDemo/serial/serial.c b/FreeRTOS/Demo/H8S/RTOSDemo/serial/serial.c
index 5c421ad208..5de635f0fe 100644
--- a/FreeRTOS/Demo/H8S/RTOSDemo/serial/serial.c
+++ b/FreeRTOS/Demo/H8S/RTOSDemo/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
index 450a6c0b16..e1a8b9312d 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
index a7d56ed528..3c6baec92e 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/main.c b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/main.c
index b7f8044519..3ec56cb97a 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/main.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/main.c
@@ -1,6 +1,6 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/serial/serial.c b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/serial/serial.c
index 58782c3e8b..68b40762f2 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_banked/serial/serial.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_banked/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h b/FreeRTOS/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
index 54bab4782c..c60417c2f4 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c b/FreeRTOS/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
index a7d56ed528..3c6baec92e 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_small/main.c b/FreeRTOS/Demo/HCS12_CodeWarrior_small/main.c
index 12a4e76829..d2ae393e82 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_small/main.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_small/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_CodeWarrior_small/serial/serial.c b/FreeRTOS/Demo/HCS12_CodeWarrior_small/serial/serial.c
index 60195b9774..d7075a2f4b 100644
--- a/FreeRTOS/Demo/HCS12_CodeWarrior_small/serial/serial.c
+++ b/FreeRTOS/Demo/HCS12_CodeWarrior_small/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_GCC_banked/FreeRTOSConfig.h b/FreeRTOS/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
index 48a97f2107..f253f7752c 100644
--- a/FreeRTOS/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/HCS12_GCC_banked/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_GCC_banked/ParTest.c b/FreeRTOS/Demo/HCS12_GCC_banked/ParTest.c
index ca0694c5dd..f6ca9a6ec6 100644
--- a/FreeRTOS/Demo/HCS12_GCC_banked/ParTest.c
+++ b/FreeRTOS/Demo/HCS12_GCC_banked/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_GCC_banked/main.c b/FreeRTOS/Demo/HCS12_GCC_banked/main.c
index 1189f9cf84..acfd9b78b1 100644
--- a/FreeRTOS/Demo/HCS12_GCC_banked/main.c
+++ b/FreeRTOS/Demo/HCS12_GCC_banked/main.c
@@ -1,6 +1,6 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/HCS12_GCC_banked/startup.c b/FreeRTOS/Demo/HCS12_GCC_banked/startup.c
index 7260a0d31c..04e0a64344 100644
--- a/FreeRTOS/Demo/HCS12_GCC_banked/startup.c
+++ b/FreeRTOS/Demo/HCS12_GCC_banked/startup.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c
index 0b517f00cb..84e9a4ad29 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h
index 924dea4e0e..cb77411858 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c
index 1a9352aacc..efd704b2f8 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S
index a60b2154fb..60b54719fd 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c
index 7388a514d2..d4811446b3 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c
index aeadbd3ded..93695784b9 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h
index 6d624b6a58..c6805cbafc 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S
index fb4f7f59c2..9fa452821b 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h
index 746e162647..bb4088590e 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c
index a7b5204113..7f55acfb7f 100644
--- a/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c
+++ b/FreeRTOS/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h b/FreeRTOS/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h
index 7b76e034fd..100ed38c88 100644
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/crflash_modified.c b/FreeRTOS/Demo/MB91460_Softune/SRC/crflash_modified.c
index 0e3c350299..da69f59943 100644
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/crflash_modified.c
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/crflash_modified.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/main.c b/FreeRTOS/Demo/MB91460_Softune/SRC/main.c
index f21e469c0d..02593501d6 100644
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/main.c
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/partest/partest.c b/FreeRTOS/Demo/MB91460_Softune/SRC/partest/partest.c
index 7c92956f7d..a392301ced 100644
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/partest/partest.c
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/partest/partest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB91460_Softune/SRC/serial/serial.c b/FreeRTOS/Demo/MB91460_Softune/SRC/serial/serial.c
index b50826533c..06a3b43f50 100644
--- a/FreeRTOS/Demo/MB91460_Softune/SRC/serial/serial.c
+++ b/FreeRTOS/Demo/MB91460_Softune/SRC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h
index e3465790c8..a70cc71494 100644
--- a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c
index 0e3c350299..da69f59943 100644
--- a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c
+++ b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c
index 3032738602..738e7e7ea5 100644
--- a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c
+++ b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c
index fc3002d846..38d6efe3e4 100644
--- a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c
+++ b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c
index b508791462..a8ba600bf2 100644
--- a/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c
+++ b/FreeRTOS/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.c b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.c
index 9885853504..011b2336bf 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.c
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.h b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.h
index 9ffd13d199..45ca232d16 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.h
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/DiceTask.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h
index 9831265beb..5b4c2c3356 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c
index 29376f68b0..1ff53549c6 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c
index b424447291..47747efe53 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/main.c b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/main.c
index 19e7b086c7..bac46ce687 100644
--- a/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/main.c
+++ b/FreeRTOS/Demo/MB96350_Softune_Dice_Kit/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h
index 2337e7f46d..dd7a138b15 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c
index 141d65bd33..54e67ee8a4 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm
index c26146927b..5f9a211168 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm
@@ -1,6 +1,6 @@
;
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c
index a37c2b1380..4138c041a6 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c
index da66b1be41..1aa032dbdd 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c
index 9780b7ccd7..d871992a4d 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
index 991fb6356d..084033f1d4 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/ParTest.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/ParTest.c
index 141d65bd33..54e67ee8a4 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/ParTest.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
index f0cd7ba691..5e72ad7d96 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RTOSDemo.ewp
@@ -585,7 +585,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_LARGE__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -1104,7 +1104,11 @@
<debug>1</debug>
<option>
<name>CUTest</name>
- <state>###Uninitialized###</state>
+ <state>-I$TOOLKIT_DIR$\inc</state>
+ <state>-@$TOOLKIT_DIR$\bin\iar.cmd</state>
+ <state>-@$PROJ_DIR$\source.txt</state>
+ <state>-@$PROJ_DIR$\include.txt</state>
+ <state>--preinclude=$PROJ_DIR$\IAR_ULPAdvisor_Defs.h</state>
</option>
<option>
<name>ULPRules</name>
@@ -1158,7 +1162,7 @@
</option>
<option>
<name>Hardware Multiplier</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>GOutputBinary</name>
@@ -1183,11 +1187,11 @@
</option>
<option>
<name>RTConfigPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xlff.h</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xllff.h</state>
</option>
<option>
<name>RTLibraryPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xlff.r43</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xllff.r43</state>
</option>
<option>
<name>Input variant</name>
@@ -1353,7 +1357,7 @@
</option>
<option>
<name>Math description</name>
- <state></state>
+ <state>Default variants of cos, sin, tan, log, log10, pow, and exp.</state>
</option>
</data>
</settings>
@@ -1714,7 +1718,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_LARGE__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -2287,7 +2291,7 @@
</option>
<option>
<name>Hardware Multiplier</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>GOutputBinary</name>
@@ -2312,11 +2316,11 @@
</option>
<option>
<name>RTConfigPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xsff.h</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xlsff.h</state>
</option>
<option>
<name>RTLibraryPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xsff.r43</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xlsff.r43</state>
</option>
<option>
<name>Input variant</name>
@@ -2482,7 +2486,7 @@
</option>
<option>
<name>Math description</name>
- <state></state>
+ <state>Default variants of cos, sin, tan, log, log10, pow, and exp.</state>
</option>
</data>
</settings>
@@ -2843,7 +2847,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_SMALL__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -3416,7 +3420,7 @@
</option>
<option>
<name>Hardware Multiplier</name>
- <state>1</state>
+ <state>0</state>
</option>
<option>
<name>GOutputBinary</name>
@@ -3441,11 +3445,11 @@
</option>
<option>
<name>RTConfigPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xlff.h</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xlmff.h</state>
</option>
<option>
<name>RTLibraryPath</name>
- <state>$TOOLKIT_DIR$\LIB\DLIB\dl430xlff.r43</state>
+ <state>$TOOLKIT_DIR$\lib\dlib\dl430xlmff.r43</state>
</option>
<option>
<name>Input variant</name>
@@ -3611,7 +3615,7 @@
</option>
<option>
<name>Math description</name>
- <state></state>
+ <state>Default variants of cos, sin, tan, log, log10, pow, and exp.</state>
</option>
</data>
</settings>
@@ -3972,7 +3976,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_MEDIUM__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43
index d99a0ae2b8..34addb34f2 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c
index 28a8300853..c4a3ae5aab 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/main.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/main.c
index 665d5e256c..78b7587363 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/main.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/serial.c b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/serial.c
index cd7c1a859e..b85c34c073 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/serial.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430F5438_IAR/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c
index a2fa2df67b..ed4dd492b9 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm
index 918e3b5b00..6c669b47c5 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm
@@ -1,6 +1,6 @@
;
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h
index 12685919e3..004b5cde2c 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c
index 8376713c2a..eb1ac0485f 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c
index b4867269f6..968c53c67e 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43 b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43
index e8d3a502dd..85f69f858c 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c
index d3a8f3676f..b698a379a3 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewd b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewd
index 4de54d6c64..02e616e5a7 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewd
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewd
@@ -153,7 +153,7 @@
<name>430FET</name>
<archiveVersion>1</archiveVersion>
<data>
- <version>29</version>
+ <version>30</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -318,6 +318,10 @@
<name>cycleCounterLevel</name>
<state>0</state>
</option>
+ <option>
+ <name>variablewatch</name>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
@@ -563,7 +567,7 @@
<name>430FET</name>
<archiveVersion>1</archiveVersion>
<data>
- <version>29</version>
+ <version>30</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
@@ -728,6 +732,10 @@
<name>cycleCounterLevel</name>
<state>0</state>
</option>
+ <option>
+ <name>variablewatch</name>
+ <state>0</state>
+ </option>
</data>
</settings>
<settings>
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewp b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewp
index 97c10d545b..063b8368ac 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewp
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/RTOSDemo.ewp
@@ -10,7 +10,7 @@
<debug>1</debug>
<settings>
<name>General</name>
- <archiveVersion>17</archiveVersion>
+ <archiveVersion>18</archiveVersion>
<data>
<version>33</version>
<wantNonLocal>1</wantNonLocal>
@@ -584,7 +584,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_LARGE__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -753,7 +753,7 @@
</option>
<option>
<name>FormatVariant</name>
- <version>8</version>
+ <version>9</version>
<state>2</state>
</option>
<option>
@@ -947,7 +947,7 @@
</option>
<option>
<name>ExtraFormatVariant</name>
- <version>8</version>
+ <version>9</version>
<state>2</state>
</option>
<option>
@@ -1142,7 +1142,7 @@
<debug>1</debug>
<settings>
<name>General</name>
- <archiveVersion>17</archiveVersion>
+ <archiveVersion>18</archiveVersion>
<data>
<version>33</version>
<wantNonLocal>1</wantNonLocal>
@@ -1716,7 +1716,7 @@
</option>
<option>
<name>ADefines</name>
- <state>__DATA_MODEL_SMALL__</state>
+ <state></state>
</option>
<option>
<name>AList</name>
@@ -1885,7 +1885,7 @@
</option>
<option>
<name>FormatVariant</name>
- <version>8</version>
+ <version>9</version>
<state>2</state>
</option>
<option>
@@ -2079,7 +2079,7 @@
</option>
<option>
<name>ExtraFormatVariant</name>
- <version>8</version>
+ <version>9</version>
<state>2</state>
</option>
<option>
diff --git a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c
index 730c5ac025..e4060eb438 100644
--- a/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c
+++ b/FreeRTOS/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c
index 2d5e6c604c..95eb259c77 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h
index 0552024741..21130bdad1 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S
index c32439644e..c482df5f2d 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
index 1b06ef2442..6964298f25 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c
index 0b5b53da62..2cf97c7038 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
index de7925af87..70b7e6ed82 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
index ff8b9ee8d8..8c1ab6bb2d 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
index f331909d57..c5febefd9d 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c
index ff7153067a..8e47e3a45e 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c
index c7c9cd33ad..cc61b30720 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c
index feea775cdb..2ebfeab151 100644
--- a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c
+++ b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonISR.s26 b/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonISR.s26
index ea7e2bdfff..314bc04b74 100644
--- a/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonISR.s26
+++ b/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonISR.s26
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonTask.c b/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonTask.c
index e6a6bfbef3..e741199c81 100644
--- a/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonTask.c
+++ b/FreeRTOS/Demo/NEC_78K0R_IAR/ButtonTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h
index 5a8f256cd9..ebbe5be0f7 100644
--- a/FreeRTOS/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_78K0R_IAR/RegTest.s26 b/FreeRTOS/Demo/NEC_78K0R_IAR/RegTest.s26
index a5edb7d21e..429d06485f 100644
--- a/FreeRTOS/Demo/NEC_78K0R_IAR/RegTest.s26
+++ b/FreeRTOS/Demo/NEC_78K0R_IAR/RegTest.s26
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/NEC_78K0R_IAR/main.c b/FreeRTOS/Demo/NEC_78K0R_IAR/main.c
index 4fcf43d898..297a34698f 100644
--- a/FreeRTOS/Demo/NEC_78K0R_IAR/main.c
+++ b/FreeRTOS/Demo/NEC_78K0R_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h
index 8fa59ffaf9..d4b9228cf6 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c
index cf8f89a7ba..b12c7d5b34 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c
index eb910777e8..4f51253e65 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c
index 737998b61e..30d40bbca7 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c b/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c
index cdb0b95faf..c8254d8d05 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c b/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c
index 5a61465b45..80c031f66d 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/RegTest.s85 b/FreeRTOS/Demo/NEC_V850ES_IAR/RegTest.s85
index bab4fdaa1a..895bdf0a8e 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/RegTest.s85
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/RegTest.s85
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/main.c b/FreeRTOS/Demo/NEC_V850ES_IAR/main.c
index f2735e2958..7b61bda358 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/main.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NEC_V850ES_IAR/serial/serial.c b/FreeRTOS/Demo/NEC_V850ES_IAR/serial/serial.c
index a7ef69204d..b49f541804 100644
--- a/FreeRTOS/Demo/NEC_V850ES_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/NEC_V850ES_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h
index f89f59506c..f9bbc96252 100644
--- a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c
index d4402458d6..0650042fee 100644
--- a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c
index bfd7d877fd..d0ff737136 100644
--- a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c
index e46512faf0..25f9e4db95 100644
--- a/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c
+++ b/FreeRTOS/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_MPLAB/FreeRTOSConfig.h
index fe2d2a0d6d..acc71b748f 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/ParTest/ParTest.c b/FreeRTOS/Demo/PIC18_MPLAB/ParTest/ParTest.c
index 1db18caa86..02b90c44b9 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/PIC18_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/main1.c b/FreeRTOS/Demo/PIC18_MPLAB/main1.c
index b46d56f901..26a3528a2c 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/main1.c
+++ b/FreeRTOS/Demo/PIC18_MPLAB/main1.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/main2.c b/FreeRTOS/Demo/PIC18_MPLAB/main2.c
index ca630b91f2..a4df4279a4 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/main2.c
+++ b/FreeRTOS/Demo/PIC18_MPLAB/main2.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/main3.c b/FreeRTOS/Demo/PIC18_MPLAB/main3.c
index d6afc2ab1e..f499532a30 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/main3.c
+++ b/FreeRTOS/Demo/PIC18_MPLAB/main3.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_MPLAB/serial/serial.c b/FreeRTOS/Demo/PIC18_MPLAB/serial/serial.c
index 1a3956ccf1..87cce718d8 100644
--- a/FreeRTOS/Demo/PIC18_MPLAB/serial/serial.c
+++ b/FreeRTOS/Demo/PIC18_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
index dd1c7b4454..73770714f1 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo1/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo1/WIZCmake.h
index 0a9f7012eb..fab961ff37 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo1/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo1/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo1/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo1/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo1/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo1/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo1/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo1/interrupt.c
index 087ef88035..0fbbc94a59 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo1/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo1/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo1/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo1/main.c
index 3ffb620304..c76559c530 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo1/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo1/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
index e0fd0cd041..7498ef79cd 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo2/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo2/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo2/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo2/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo2/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo2/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo2/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo2/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo2/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo2/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo2/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo2/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo2/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo2/main.c
index b1e8d1b465..c2511d021c 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo2/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo2/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
index 543e0e9b51..9b23888561 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo3/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo3/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo3/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo3/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo3/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo3/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo3/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo3/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo3/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo3/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo3/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo3/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo3/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo3/main.c
index cc5eba1d3a..7bcbd731c8 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo3/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo3/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
index 2d3185eb0e..8afedc476a 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo4/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo4/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo4/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo4/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo4/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo4/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo4/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo4/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo4/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo4/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo4/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo4/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo4/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo4/main.c
index 32b5fa0fa1..2068f95d66 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo4/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo4/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
index 35003525c5..9165fed90f 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo5/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo5/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo5/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo5/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo5/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo5/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo5/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo5/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo5/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo5/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo5/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo5/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo5/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo5/main.c
index 4ed465db62..16ec996090 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo5/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo5/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
index 245733c82e..cb9e102e06 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo6/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo6/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo6/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo6/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo6/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo6/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo6/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo6/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo6/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo6/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo6/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo6/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo6/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo6/main.c
index 7113c9792f..62c5e1461a 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo6/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo6/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
index b6511797e7..c128ba1ac3 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo7/WIZCmake.h b/FreeRTOS/Demo/PIC18_WizC/Demo7/WIZCmake.h
index bc55a75c1a..2f786b5fbc 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo7/WIZCmake.h
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo7/WIZCmake.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo7/fuses.c b/FreeRTOS/Demo/PIC18_WizC/Demo7/fuses.c
index 9e4d4faf75..edfd1a1e68 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo7/fuses.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo7/fuses.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo7/interrupt.c b/FreeRTOS/Demo/PIC18_WizC/Demo7/interrupt.c
index 5b9c86fe5d..d3d96c33bf 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo7/interrupt.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo7/interrupt.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/Demo7/main.c b/FreeRTOS/Demo/PIC18_WizC/Demo7/main.c
index 59028248b2..2856a4782f 100644
--- a/FreeRTOS/Demo/PIC18_WizC/Demo7/main.c
+++ b/FreeRTOS/Demo/PIC18_WizC/Demo7/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/ParTest/ParTest.c b/FreeRTOS/Demo/PIC18_WizC/ParTest/ParTest.c
index 1f6127a75d..4861cd1c4f 100644
--- a/FreeRTOS/Demo/PIC18_WizC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/PIC18_WizC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialRx.c b/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialRx.c
index bf67ffbab9..dab8805c02 100644
--- a/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialRx.c
+++ b/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialRx.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialTx.c b/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialTx.c
index e7b47b434e..9988cc6321 100644
--- a/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialTx.c
+++ b/FreeRTOS/Demo/PIC18_WizC/serial/isrSerialTx.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC18_WizC/serial/serial.c b/FreeRTOS/Demo/PIC18_WizC/serial/serial.c
index f826cfe723..d54dd831b2 100644
--- a/FreeRTOS/Demo/PIC18_WizC/serial/serial.c
+++ b/FreeRTOS/Demo/PIC18_WizC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC24_MPLAB/FreeRTOSConfig.h
index 1ee2827927..de2f7eb8e5 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC24_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/ParTest/ParTest.c b/FreeRTOS/Demo/PIC24_MPLAB/ParTest/ParTest.c
index 7099a9ceda..492b00ec22 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/PIC24_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/lcd.c b/FreeRTOS/Demo/PIC24_MPLAB/lcd.c
index 21618b5c69..8d488c299e 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/lcd.c
+++ b/FreeRTOS/Demo/PIC24_MPLAB/lcd.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/lcd.h b/FreeRTOS/Demo/PIC24_MPLAB/lcd.h
index 1b19295aed..5ec6f693dc 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/lcd.h
+++ b/FreeRTOS/Demo/PIC24_MPLAB/lcd.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/main.c b/FreeRTOS/Demo/PIC24_MPLAB/main.c
index c2d790a2a6..2c55e16db6 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/main.c
+++ b/FreeRTOS/Demo/PIC24_MPLAB/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/serial/serial.c b/FreeRTOS/Demo/PIC24_MPLAB/serial/serial.c
index fdcb15c06f..dc00c6188c 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/serial/serial.c
+++ b/FreeRTOS/Demo/PIC24_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/timertest.c b/FreeRTOS/Demo/PIC24_MPLAB/timertest.c
index a9dc0ecd61..9f5403ebbc 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/timertest.c
+++ b/FreeRTOS/Demo/PIC24_MPLAB/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC24_MPLAB/timertest.h b/FreeRTOS/Demo/PIC24_MPLAB/timertest.h
index 9abb5856f7..6f77c22c8e 100644
--- a/FreeRTOS/Demo/PIC24_MPLAB/timertest.h
+++ b/FreeRTOS/Demo/PIC24_MPLAB/timertest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c
index 591dad1949..2bf4586ed6 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h
index bc283c2572..495cfc73a9 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c
index 915040ab00..b3298e3ad3 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S
index 52c62e80e0..bc1f6a7a60 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S
index f262c0ffa1..04812546fc 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c
index 4e92465a39..c9e830941d 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c
index 95e18be142..e431332fcd 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h
index f62315415b..0af5314fab 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c
index 0f0b409ee4..a358c264a9 100644
--- a/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c
+++ b/FreeRTOS/Demo/PIC32MEC14xx_MPLAB/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.c b/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.c
index fbdd18e31d..e9f6ca3245 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.h b/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.h
index 27173b532d..f68ad2651f 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.h
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/ConfigPerformance.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h
index e5b4ac05b5..1b35961f88 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.c b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.c
index d242083975..1ef8e640b6 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.h b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.h
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S
index 7de52b0c9f..8784d99750 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c b/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c
index c5c2342513..98e58c2eac 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c b/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c
index 8d59bb8363..dbf5505641 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/RegisterTestTasks.S b/FreeRTOS/Demo/PIC32MX_MPLAB/RegisterTestTasks.S
index fdbf4021a6..bae2fcfaf2 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/RegisterTestTasks.S
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/RegisterTestTasks.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.c b/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.c
index 2ad161a545..2edbe5fe73 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.h b/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.h
index 1b19295aed..5ec6f693dc 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.h
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/lcd.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/main.c b/FreeRTOS/Demo/PIC32MX_MPLAB/main.c
index 8519d26bfa..9ee4609126 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/main.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/main_blinky.c b/FreeRTOS/Demo/PIC32MX_MPLAB/main_blinky.c
index 90603ea785..a717c88317 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/main_blinky.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/main_full.c b/FreeRTOS/Demo/PIC32MX_MPLAB/main_full.c
index 68e4b2c561..3aaea64711 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/main_full.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/serial/serial.c b/FreeRTOS/Demo/PIC32MX_MPLAB/serial/serial.c
index 69f8457150..10bf47e60a 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/serial/serial.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.c b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.c
index 1fc2990c79..f3c0edfeba 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.c
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.h b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.h
index 9abb5856f7..6f77c22c8e 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.h
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest_isr.S b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest_isr.S
index 5c0351a202..8fe46b6a77 100644
--- a/FreeRTOS/Demo/PIC32MX_MPLAB/timertest_isr.S
+++ b/FreeRTOS/Demo/PIC32MX_MPLAB/timertest_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.c
index 2af81b5eb3..995cfe67bb 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.h b/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.h
index 27173b532d..f68ad2651f 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.h
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/ConfigPerformance.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h b/FreeRTOS/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h
index 2e9d73281f..e448f24c85 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c
index 9f656bf71b..8464bfd74d 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S b/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S
index 9ea502309f..a3f5d2117e 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.c
index d242083975..1ef8e640b6 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.h b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.h
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S
index 34c329b7c4..72c341c973 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c
index 9848e66e97..ee0cfd4016 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S b/FreeRTOS/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S
index 0ed56ebb2f..d6468e2556 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.c
index 1e8ee15e69..7018ed0809 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.h b/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.h
index 7c6aa17cfa..7e624f00a6 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.h
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/flop_mz.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/main.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/main.c
index 556f3104a5..2013dc080c 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/main.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/main_blinky.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/main_blinky.c
index 1780cd231d..1bfe05599a 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/main_blinky.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/main_full.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/main_full.c
index 588c0a948d..13abcdb0de 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/main_full.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.c b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.c
index cf22043559..56588b05f0 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.c
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.h b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.h
index 9abb5856f7..6f77c22c8e 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.h
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest_isr.S b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest_isr.S
index 1f5d5b4702..e934e1f1f6 100644
--- a/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest_isr.S
+++ b/FreeRTOS/Demo/PIC32MZ_MPLAB/timertest_isr.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
index cc308bfff5..5f02611005 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
index 16aff76d9d..312c58141d 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
index ee587f0c5e..2c607a2a4f 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
index a3de2faf9a..98efaa1ff2 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
index 38c70d59d7..0634d83174 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
index 7e5fccf0c8..36a0fdc050 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
index 45fbe8790d..d1a9c58858 100644
--- a/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
+++ b/FreeRTOS/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
index cc308bfff5..5f02611005 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
index 1d2d19d328..8f4080529c 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
index ee587f0c5e..2c607a2a4f 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
index 32b4485e51..475d612d5f 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
index 0e919aead9..edb0fec9d0 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
index 7e5fccf0c8..36a0fdc050 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
index 45fbe8790d..d1a9c58858 100644
--- a/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
+++ b/FreeRTOS/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
index 304b15717b..82a57fb70b 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
index 1d2d19d328..8f4080529c 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
index ee587f0c5e..2c607a2a4f 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
index 32b4485e51..475d612d5f 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c
index 4b002dd3e5..6ce1f43f4d 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
index ac71a1cc51..baee6b69e5 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
index 45fbe8790d..d1a9c58858 100644
--- a/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
+++ b/FreeRTOS/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h
index ede46d7bbf..db75ce2612 100644
--- a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/RegTest.s87 b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/RegTest.s87
index bda478972e..d0780d6eeb 100644
--- a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/RegTest.s87
+++ b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/RegTest.s87
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c
index 40c0077af1..9dcddc60a2 100644
--- a/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c
+++ b/FreeRTOS/Demo/RL78_RL78G13_Promo_Board_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/ExampleISR.s87 b/FreeRTOS/Demo/RL78_multiple_IAR/ExampleISR.s87
index 2587fd926c..8792549d34 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/ExampleISR.s87
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/ExampleISR.s87
@@ -1,4 +1,4 @@
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
; FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
; http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RL78_multiple_IAR/FreeRTOSConfig.h
index ad048ab20a..9f77e8cac9 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/RegTest.s87 b/FreeRTOS/Demo/RL78_multiple_IAR/RegTest.s87
index cbd3427b41..ebb5ff5265 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/RegTest.s87
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/RegTest.s87
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/demo_specific_io.h b/FreeRTOS/Demo/RL78_multiple_IAR/demo_specific_io.h
index d4115cf955..f3184e9b01 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/demo_specific_io.h
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/demo_specific_io.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/main.c b/FreeRTOS/Demo/RL78_multiple_IAR/main.c
index 4d00f21d9f..321178e15a 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/main.c
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/main_blinky.c b/FreeRTOS/Demo/RL78_multiple_IAR/main_blinky.c
index 7c8bded4a5..af834295b4 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/main_blinky.c
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RL78_multiple_IAR/main_full.c b/FreeRTOS/Demo/RL78_multiple_IAR/main_full.c
index b4fe575f1f..7f3ff51a8e 100644
--- a/FreeRTOS/Demo/RL78_multiple_IAR/main_full.c
+++ b/FreeRTOS/Demo/RL78_multiple_IAR/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/FreeRTOSConfig.h
index c4debcb777..161fee499b 100644
--- a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/ParTest.c
index 2e80749b89..cb89500595 100644
--- a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main.c b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main.c
index 1d65cb6a26..f7c9288f02 100644
--- a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_full.c b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_full.c
index 2586ec9f7e..92b0604b17 100644
--- a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_full.c
+++ b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_low_power.c b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_low_power.c
index 09959b18fc..389b8c0bbc 100644
--- a/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_low_power.c
+++ b/FreeRTOS/Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RX100-RSK_IAR/FreeRTOSConfig.h
index 1fbae371c6..446380f821 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/ParTest.c b/FreeRTOS/Demo/RX100-RSK_IAR/ParTest.c
index 2e80749b89..cb89500595 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/ParTest.c
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/PriorityDefinitions.h b/FreeRTOS/Demo/RX100-RSK_IAR/PriorityDefinitions.h
index 096b3e9d61..04c0a371f6 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/main.c b/FreeRTOS/Demo/RX100-RSK_IAR/main.c
index 30a159cc69..5f7cb35d34 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/main.c
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/main_full.c b/FreeRTOS/Demo/RX100-RSK_IAR/main_full.c
index d87cd9101c..6637d42469 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/main_full.c
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/main_low_power.c b/FreeRTOS/Demo/RX100-RSK_IAR/main_low_power.c
index 2c901fab95..2eb217c78a 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/main_low_power.c
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s b/FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s
index f8ef51b2cf..b47aedefef 100644
--- a/FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s
+++ b/FreeRTOS/Demo/RX100-RSK_IAR/reg_test.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/FreeRTOSConfig.h
index cdf310de47..9ec0bf7e5c 100644
--- a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/ParTest.c
index 2e80749b89..cb89500595 100644
--- a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main.c b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main.c
index 2463401d8b..993de8bef7 100644
--- a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_full.c b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_full.c
index 12033e93f2..cca1cde004 100644
--- a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_full.c
+++ b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_low_power.c b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_low_power.c
index b2d3eba136..4cee022dcb 100644
--- a/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_low_power.c
+++ b/FreeRTOS/Demo/RX100-RSK_Renesas_e2studio/RTOSDemo/main_low_power.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
index c62e9d5471..b407b8002d 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
index a3a8a8afc8..f26b4fe1ff 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
index 15fe6417f6..37c2b5f52b 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
index d82a6e49aa..92de138d75 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
index 6b0e7eab16..014ed5ff72 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
index 0239a86de6..372636f21a 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
index 06a254efd6..1b52fbf106 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/main.c b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/main.c
index eb9c57ae9b..fe5c9cf4f1 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/main.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
index c62e9d5471..b407b8002d 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
index 84b2c622b8..fcb093f09c 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
index fd5f732320..268f4b9f27 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
index ba50e8acf2..d9f87e8491 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/main.c b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/main.c
index 44ce82e53d..03409cd610 100644
--- a/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/main.c
+++ b/FreeRTOS/Demo/RX100_RX113-RSK_Renesas_e2studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ButtonAndLCD.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ButtonAndLCD.c
index 90689109f2..2258e8a393 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ButtonAndLCD.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ButtonAndLCD.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
index b8d52f193e..0efd05c932 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
index 56beb686c2..f169d47ca9 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/IntQueueTimer.c
index 6444cf93f5..bb34e6bac0 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ParTest.c
index eb47054ad8..cd4a4405b0 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/ButtonAndLCD.h b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/ButtonAndLCD.h
index 9df3c3b808..0ba740b869 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/ButtonAndLCD.h
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/ButtonAndLCD.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-blinky.c
index 591632f3a8..73a81ba546 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-full.c
index 8b5ddf4e32..284484b433 100644
--- a/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX200_RX210-RSK_Renesas/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
index 8873b68303..28677a5cf7 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
index aa4095f5fa..6ebbdcf0ad 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
index dba52dc6f7..7e72f52b4f 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
index d82a6e49aa..92de138d75 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
index b5e159b752..3232105c18 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
index aa25147532..489d0df774 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
index 06a254efd6..1b52fbf106 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c
index 65a6941b68..fefb7c8bfb 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
index 8873b68303..28677a5cf7 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
index 8b09ff039a..ec4192effa 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
index 4b7139fa54..eb3786a7c6 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
index d2ccb7c51d..01a3a3b9ff 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/main.c b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/main.c
index c71b606082..bf9fa1995f 100644
--- a/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/main.c
+++ b/FreeRTOS/Demo/RX200_RX231-RSK_Renesas_e2studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/FreeRTOSConfig.h
index 5c879cf5ca..84c6749c24 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
index 67184e46a8..721c61127e 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/IntQueueTimer.c
index b0a651fde9..32091682e5 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/ParTest.c
index 3797d147fc..6cdc5d10a9 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-blinky.c
index b34917d105..6bb424bab7 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-full.c
index 8195b62594..4843d3a0cb 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/uIP_Task.c
index f32d16b5a8..0a1bb373e4 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/webserver/EMAC.c
index 2cbf9611f1..c7931cff8e 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_GNURX/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h
index bedee18a2f..d3a6d881fa 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c
index 5820c24792..4cc3e4ebac 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c
index 6d0e55ac4f..4c8b25e825 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/ParTest.c
index e226cbf593..095faa0ca6 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/PriorityDefinitions.h b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/PriorityDefinitions.h
index 19850f75f8..0c4f3d82d0 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/RegTest.s b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/RegTest.s
index 69b98d7fc0..5939d7b3b2 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/RegTest.s
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-blinky.c
index 50af28d07b..89900c42b6 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-full.c
index c1d6a98cb6..7085c52e82 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c
index 7a5594506e..413586ce09 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c
index 6b8a97357c..14a75ab472 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_IAR/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
index b8f9c09536..a157cd0b68 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
index 56beb686c2..f169d47ca9 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
index 6444cf93f5..bb34e6bac0 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/ParTest.c
index 665ef0ab37..20b95dcd8c 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-blinky.c
index e423775de6..bd002f4370 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-full.c
index dc92ffefc8..d3efd8abae 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/uIP_Task.c
index f32d16b5a8..0a1bb373e4 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
index 7cc8333cc3..241ff3b191 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/FreeRTOSConfig.h
index 081ab73f2e..e028e61adb 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
index 67184e46a8..721c61127e 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/IntQueueTimer.c
index b0a651fde9..32091682e5 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/ParTest.c
index 9039babce2..75df199c9a 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-blinky.c
index b34917d105..6bb424bab7 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-full.c
index 8195b62594..4843d3a0cb 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/uIP_Task.c
index f32d16b5a8..0a1bb373e4 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/webserver/EMAC.c
index 2cbf9611f1..c7931cff8e 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_GNURX/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/FreeRTOSConfig.h
index 6adb9922b3..d930d4b583 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/HighFrequencyTimerTest.c
index 5820c24792..4cc3e4ebac 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/IntQueueTimer.c
index 6d0e55ac4f..4c8b25e825 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/ParTest.c
index 63c9d9ad6f..efff804d32 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/PriorityDefinitions.h b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/PriorityDefinitions.h
index 19850f75f8..0c4f3d82d0 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/RegTest.s b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/RegTest.s
index 69b98d7fc0..5939d7b3b2 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/RegTest.s
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/RegTest.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-blinky.c
index 0cbbd6c412..1fc1f2fdc6 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-full.c
index 9536a2b86d..62e2f39d96 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/uIP_Task.c
index 7a5594506e..413586ce09 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/webserver/EMAC.c
index 6b8a97357c..14a75ab472 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_IAR/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
index 0a92875ebb..8190d87183 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
index 56beb686c2..f169d47ca9 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/IntQueueTimer.c
index 6444cf93f5..bb34e6bac0 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/ParTest.c
index 9039babce2..75df199c9a 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-blinky.c
index e423775de6..bd002f4370 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-full.c
index fc7091bf20..9ae6d89abb 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/uIP_Task.c
index f32d16b5a8..0a1bb373e4 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/webserver/EMAC.c
index 2d004d7e18..8e1bd1a834 100644
--- a/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX62N-RSK_Renesas/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
index bc19f88b54..1dd57472ab 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
index 56beb686c2..f169d47ca9 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/IntQueueTimer.c
index 6444cf93f5..bb34e6bac0 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/ParTest.c
index eb47054ad8..cd4a4405b0 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/include/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-blinky.c
index cc6145e029..bd3866fd8f 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-full.c
index 8f9fa82e6f..070cfd11be 100644
--- a/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX630-RSK_Renesas/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
index 324b23c839..721b2873be 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
index 77261cd6d2..3e4c789941 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/HighFrequencyTimerTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
index 339a6d08f3..6b48d2c216 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/ParTest.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/ParTest.c
index b2147a9fff..9c23b84cdc 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-blinky.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-blinky.c
index 888e7928d5..4919374087 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-blinky.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-full.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-full.c
index a518f53677..ebdc17c3fb 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-full.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/main-full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/uIP_Task.c
index f32d16b5a8..0a1bb373e4 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
index e1018eccd7..d38d9c675d 100644
--- a/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/RX600_RX63N-RDK_Renesas/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h
index 0fe0cb1208..72590c7f5e 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c
index 308285400e..2add172d1a 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c
index 1b87ae5d8c..3ba0a71687 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S
index 763026e25f..1ea7ab35f1 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/RegTest.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c
index 0e63dcdc67..7c2ab507d2 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_blinky.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_blinky.c
index c2519bad05..2ab8195123 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_blinky.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c
index 8bbb5a28d7..9f606893b7 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_GCC_e2studio/src/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h
index 0fe0cb1208..72590c7f5e 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c
index ebe01b0ed2..61fb923a40 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.h b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.h
index 4b16bc503f..d7c7a892bc 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/ParTest.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/ParTest.c
index 837a54a144..a11d77441f 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/ParTest.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/RegTest.src b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/RegTest.src
index 99deede39b..cdfd1b4ff8 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/RegTest.src
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/RegTest.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c
index d51daac589..2e3a76c3a4 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_blinky.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_blinky.c
index c2519bad05..2ab8195123 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_blinky.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_full.c b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_full.c
index 7fe474f8ed..f59815871e 100644
--- a/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_full.c
+++ b/FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
index 3277267db5..76e540eeda 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
index e016d99c73..ca03cb2be9 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
index 6086df7677..494790a9ee 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
index 763026e25f..1ea7ab35f1 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_GCC.S
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
index b5e159b752..3232105c18 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
index 394f6c97c7..c789b25789 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
index 06a254efd6..1b52fbf106 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/PriorityDefinitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/main.c b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/main.c
index 2f0d48262a..f480ffab90 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/main.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
index 3277267db5..76e540eeda 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Blinky_Demo/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/FreeRTOSConfig.h
index 5b735be125..9dfce96d36 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
index cf469f6f74..bdfead2786 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
index 30c61462bf..41dc9978c9 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/IntQueueTimer.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/main_full.c b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/main_full.c
index a5a19e710b..c404adbb9e 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/main_full.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/Full_Demo/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/main.c b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/main.c
index a00cbd1b3d..78c045acdd 100644
--- a/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/main.c
+++ b/FreeRTOS/Demo/RX700_RX71M_RSK_Renesas_e2studio/src/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/FreeRTOSConfig.h
index 47121aafda..76583d1391 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/ParTest/ParTest.c b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/ParTest/ParTest.c
index e58a144a36..10b7d9eca6 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/flop.c b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/flop.c
index f21948245d..706f30808c 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/flop.c
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/flop.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c
index a433d3c702..7df767ec06 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/regtest.src b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/regtest.src
index 94db89684e..8339cfd954 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/regtest.src
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/regtest.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/uIP_Task.c b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/uIP_Task.c
index 93a4d62a89..9ac8ffcebb 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/uIP_Task.c
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/uIP_Task.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC.c b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC.c
index f1a08c1245..42779e6651 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC.c
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC_ISR.src b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC_ISR.src
index 017073de5c..524119c631 100644
--- a/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC_ISR.src
+++ b/FreeRTOS/Demo/SuperH_SH7216_Renesas/RTOSDemo/webserver/EMAC_ISR.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
;
;
; ***************************************************************************
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h
index e68ad87291..41632a90dc 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.c b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.c
index 7177730529..dd423d9c89 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.c
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.h b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.h
index c60faab05e..194b5791eb 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.h
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/InterruptNestTest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c
index babd80bc19..178879ca14 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c
index c766bae1a4..062ffbb60e 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c
index db3aa759c7..c4465fd6ff 100644
--- a/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c
+++ b/FreeRTOS/Demo/TriCore_TC1782_TriBoard_GCC/RTOSDemo/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/FreeRTOSConfig.h b/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/FreeRTOSConfig.h
index cf163313a4..75af47c8bb 100644
--- a/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/main.c b/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/main.c
index b51b8dbb9c..2631042e0f 100644
--- a/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/main.c
+++ b/FreeRTOS/Demo/WIN32-MSVC-Static-Allocation-Only/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC/FreeRTOSConfig.h b/FreeRTOS/Demo/WIN32-MSVC/FreeRTOSConfig.h
index 38ef2ec5c2..aa988e0e39 100644
--- a/FreeRTOS/Demo/WIN32-MSVC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/WIN32-MSVC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC/Run-time-stats-utils.c b/FreeRTOS/Demo/WIN32-MSVC/Run-time-stats-utils.c
index 5b71a7d56a..cf81dade0f 100644
--- a/FreeRTOS/Demo/WIN32-MSVC/Run-time-stats-utils.c
+++ b/FreeRTOS/Demo/WIN32-MSVC/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC/main.c b/FreeRTOS/Demo/WIN32-MSVC/main.c
index 61d8e54ac7..effbafd51c 100644
--- a/FreeRTOS/Demo/WIN32-MSVC/main.c
+++ b/FreeRTOS/Demo/WIN32-MSVC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC/main_blinky.c b/FreeRTOS/Demo/WIN32-MSVC/main_blinky.c
index 469d72e1a7..5fc333a86b 100644
--- a/FreeRTOS/Demo/WIN32-MSVC/main_blinky.c
+++ b/FreeRTOS/Demo/WIN32-MSVC/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MSVC/main_full.c b/FreeRTOS/Demo/WIN32-MSVC/main_full.c
index 8af29dbaaa..d77d8442b0 100644
--- a/FreeRTOS/Demo/WIN32-MSVC/main_full.c
+++ b/FreeRTOS/Demo/WIN32-MSVC/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/DemosModifiedForLowTickRate/recmutex.c b/FreeRTOS/Demo/WIN32-MingW/DemosModifiedForLowTickRate/recmutex.c
index 75ee003fcc..69966ee7da 100644
--- a/FreeRTOS/Demo/WIN32-MingW/DemosModifiedForLowTickRate/recmutex.c
+++ b/FreeRTOS/Demo/WIN32-MingW/DemosModifiedForLowTickRate/recmutex.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/FreeRTOSConfig.h b/FreeRTOS/Demo/WIN32-MingW/FreeRTOSConfig.h
index 07d57b6aad..201446637a 100644
--- a/FreeRTOS/Demo/WIN32-MingW/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/WIN32-MingW/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/Run-time-stats-utils.c b/FreeRTOS/Demo/WIN32-MingW/Run-time-stats-utils.c
index 5b71a7d56a..cf81dade0f 100644
--- a/FreeRTOS/Demo/WIN32-MingW/Run-time-stats-utils.c
+++ b/FreeRTOS/Demo/WIN32-MingW/Run-time-stats-utils.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/main.c b/FreeRTOS/Demo/WIN32-MingW/main.c
index eae4c0da01..8e0eccfdad 100644
--- a/FreeRTOS/Demo/WIN32-MingW/main.c
+++ b/FreeRTOS/Demo/WIN32-MingW/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/main_blinky.c b/FreeRTOS/Demo/WIN32-MingW/main_blinky.c
index cffdf780aa..4b8fbf4c73 100644
--- a/FreeRTOS/Demo/WIN32-MingW/main_blinky.c
+++ b/FreeRTOS/Demo/WIN32-MingW/main_blinky.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WIN32-MingW/main_full.c b/FreeRTOS/Demo/WIN32-MingW/main_full.c
index 9aaedfce03..be20151294 100644
--- a/FreeRTOS/Demo/WIN32-MingW/main_full.c
+++ b/FreeRTOS/Demo/WIN32-MingW/main_full.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
index cde0554cf5..7ea4440c6e 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
index 75046a4199..5b2d8d989a 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
index 365becc5c4..0f33cb6a76 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/Makefile b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/Makefile
index f0b805552e..5cb041cb84 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/Makefile
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/Makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
index 8cb27d99ad..f2069d9de2 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.h b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
index 72cc1801b8..7758c3fef3 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCP.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
index fc7d416bce..f761e7927f 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
index 3f7a193dea..2b35263817 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/html_pages.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
index ebef408304..65dc322270 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.h b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
index cbe179d8c0..3c4031cb0f 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2c.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
index 3c32946885..86c03c5154 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/main.c b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/main.c
index 04911f4b8d..f16a5413bc 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/main.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_GCC_ARM7/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
index bfad2b3ca2..df98a876e3 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.c b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
index 34295a970c..bcf5db5c87 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.h b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
index 2c71ed2afc..0ef078f4df 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
+++ b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/HTTPTask.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/main.c b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/main.c
index 44364d34be..350d8b0822 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/main.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/serial/serial.c b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/serial/serial.c
index 5592a9cbd3..50c4fb0d49 100644
--- a/FreeRTOS/Demo/WizNET_DEMO_TERN_186/serial/serial.c
+++ b/FreeRTOS/Demo/WizNET_DEMO_TERN_186/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/ARM_CA9/portZynq7000.c b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/ARM_CA9/portZynq7000.c
index 667de340a9..faa8a1f486 100644
--- a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/ARM_CA9/portZynq7000.c
+++ b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/ARM_CA9/portZynq7000.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/MicroBlazeV8/portmicroblaze.c b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/MicroBlazeV8/portmicroblaze.c
index da53e46b8a..327b2ac13a 100644
--- a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/MicroBlazeV8/portmicroblaze.c
+++ b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/bsp/freertos822_xilinx_v1_0/src/Source/portable/GCC/MicroBlazeV8/portmicroblaze.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/sw_apps/freertos_hello_world/src/freertos_hello_world.c b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/sw_apps/freertos_hello_world/src/freertos_hello_world.c
index 04ab46747c..820c3564bf 100644
--- a/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/sw_apps/freertos_hello_world/src/freertos_hello_world.c
+++ b/FreeRTOS/Demo/Xilinx_FreeRTOS_BSP/repo/sw_apps/freertos_hello_world/src/freertos_hello_world.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/FreeRTOSConfig.h b/FreeRTOS/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
index 89d0318d84..1510d0c0de 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/ParTest/ParTest.c b/FreeRTOS/Demo/dsPIC_MPLAB/ParTest/ParTest.c
index 4f280ba9f2..ef08b46d3e 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/lcd.c b/FreeRTOS/Demo/dsPIC_MPLAB/lcd.c
index 3348ee0db6..e5f1869a5a 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/lcd.c
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/lcd.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/lcd.h b/FreeRTOS/Demo/dsPIC_MPLAB/lcd.h
index 1b19295aed..5ec6f693dc 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/lcd.h
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/lcd.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/main.c b/FreeRTOS/Demo/dsPIC_MPLAB/main.c
index d1df408d60..7c61b3b489 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/main.c
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/serial/serial.c b/FreeRTOS/Demo/dsPIC_MPLAB/serial/serial.c
index 6d20e72e17..7b723784b0 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/serial/serial.c
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/timertest.c b/FreeRTOS/Demo/dsPIC_MPLAB/timertest.c
index a9dc0ecd61..9f5403ebbc 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/timertest.c
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/timertest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/dsPIC_MPLAB/timertest.h b/FreeRTOS/Demo/dsPIC_MPLAB/timertest.h
index 9abb5856f7..6f77c22c8e 100644
--- a/FreeRTOS/Demo/dsPIC_MPLAB/timertest.h
+++ b/FreeRTOS/Demo/dsPIC_MPLAB/timertest.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
index 7785610e58..464bac7f49 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
index e4ade0aa2d..8eb65e5c17 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
index a5260962a9..84ff1943e8 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
index 252109ff43..1a5eb62951 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
index f7c6dc0ec5..3ff4c920a5 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
index b87daf9636..359b332c2e 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
index 6f11b872fc..904e3aab83 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
index e7373403ca..eea8de15eb 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
index c5be013080..1d182a1ec6 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
index 9db3dfe370..d2d86043b0 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
index 2d0573745e..adb9ebbafe 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
index c0423dc28c..7950a0ad1b 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/main.c b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/main.c
index bba97f61e1..f6ef98733e 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/main.c
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/makefile b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/makefile
index c03a10cd6b..a1a45404eb 100644
--- a/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/makefile
+++ b/FreeRTOS/Demo/lwIP_Demo_Rowley_ARM7/makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/msp430_CrossWorks/FreeRTOSConfig.h b/FreeRTOS/Demo/msp430_CrossWorks/FreeRTOSConfig.h
index da3b893dc8..0bb8d353e6 100644
--- a/FreeRTOS/Demo/msp430_CrossWorks/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/msp430_CrossWorks/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_CrossWorks/ParTest/ParTest.c b/FreeRTOS/Demo/msp430_CrossWorks/ParTest/ParTest.c
index 94bf6e6abf..08b6fe627a 100644
--- a/FreeRTOS/Demo/msp430_CrossWorks/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/msp430_CrossWorks/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_CrossWorks/main.c b/FreeRTOS/Demo/msp430_CrossWorks/main.c
index 08eee305e7..4d7ffc9832 100644
--- a/FreeRTOS/Demo/msp430_CrossWorks/main.c
+++ b/FreeRTOS/Demo/msp430_CrossWorks/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_CrossWorks/serial/serial.c b/FreeRTOS/Demo/msp430_CrossWorks/serial/serial.c
index 824da2dd99..9a6d8d43e4 100644
--- a/FreeRTOS/Demo/msp430_CrossWorks/serial/serial.c
+++ b/FreeRTOS/Demo/msp430_CrossWorks/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_CrossWorks/serial/serialASM.asm b/FreeRTOS/Demo/msp430_CrossWorks/serial/serialASM.asm
index ce8181a883..7c5c98938c 100644
--- a/FreeRTOS/Demo/msp430_CrossWorks/serial/serialASM.asm
+++ b/FreeRTOS/Demo/msp430_CrossWorks/serial/serialASM.asm
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_GCC/FreeRTOSConfig.h b/FreeRTOS/Demo/msp430_GCC/FreeRTOSConfig.h
index 3aee12b7e8..5073a41a1d 100644
--- a/FreeRTOS/Demo/msp430_GCC/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/msp430_GCC/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_GCC/ParTest/ParTest.c b/FreeRTOS/Demo/msp430_GCC/ParTest/ParTest.c
index 8410a21457..301c425af4 100644
--- a/FreeRTOS/Demo/msp430_GCC/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/msp430_GCC/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_GCC/main.c b/FreeRTOS/Demo/msp430_GCC/main.c
index 14c67c07e8..13e8124308 100644
--- a/FreeRTOS/Demo/msp430_GCC/main.c
+++ b/FreeRTOS/Demo/msp430_GCC/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_GCC/makefile b/FreeRTOS/Demo/msp430_GCC/makefile
index 82b17c923d..cd1a1ebf8c 100644
--- a/FreeRTOS/Demo/msp430_GCC/makefile
+++ b/FreeRTOS/Demo/msp430_GCC/makefile
@@ -1,5 +1,5 @@
#/*
-# FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+# FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
#
#
# ***************************************************************************
diff --git a/FreeRTOS/Demo/msp430_GCC/serial/serial.c b/FreeRTOS/Demo/msp430_GCC/serial/serial.c
index 5244637069..573969c1cd 100644
--- a/FreeRTOS/Demo/msp430_GCC/serial/serial.c
+++ b/FreeRTOS/Demo/msp430_GCC/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_IAR/FreeRTOSConfig.h b/FreeRTOS/Demo/msp430_IAR/FreeRTOSConfig.h
index 82ae507905..ac4a00bd0f 100644
--- a/FreeRTOS/Demo/msp430_IAR/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/msp430_IAR/FreeRTOSConfig.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_IAR/ParTest/ParTest.c b/FreeRTOS/Demo/msp430_IAR/ParTest/ParTest.c
index 94bf6e6abf..08b6fe627a 100644
--- a/FreeRTOS/Demo/msp430_IAR/ParTest/ParTest.c
+++ b/FreeRTOS/Demo/msp430_IAR/ParTest/ParTest.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_IAR/main.c b/FreeRTOS/Demo/msp430_IAR/main.c
index 4c63ee0345..c635ab6b18 100644
--- a/FreeRTOS/Demo/msp430_IAR/main.c
+++ b/FreeRTOS/Demo/msp430_IAR/main.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_IAR/serial/serial.c b/FreeRTOS/Demo/msp430_IAR/serial/serial.c
index 60a51d6e96..04bb13d5e1 100644
--- a/FreeRTOS/Demo/msp430_IAR/serial/serial.c
+++ b/FreeRTOS/Demo/msp430_IAR/serial/serial.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Demo/msp430_IAR/serial/serialASM.s43 b/FreeRTOS/Demo/msp430_IAR/serial/serialASM.s43
index 57e6f1f557..d23284c144 100644
--- a/FreeRTOS/Demo/msp430_IAR/serial/serialASM.s43
+++ b/FreeRTOS/Demo/msp430_IAR/serial/serialASM.s43
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/croutine.c b/FreeRTOS/Source/croutine.c
index f4b09a966b..6d2cff6d5e 100644
--- a/FreeRTOS/Source/croutine.c
+++ b/FreeRTOS/Source/croutine.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/event_groups.c b/FreeRTOS/Source/event_groups.c
index 858ceb556f..15ffd644cc 100644
--- a/FreeRTOS/Source/event_groups.c
+++ b/FreeRTOS/Source/event_groups.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/FreeRTOS.h b/FreeRTOS/Source/include/FreeRTOS.h
index e874843509..08a6be4f64 100644
--- a/FreeRTOS/Source/include/FreeRTOS.h
+++ b/FreeRTOS/Source/include/FreeRTOS.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/StackMacros.h b/FreeRTOS/Source/include/StackMacros.h
index 91d5024000..914c48f3bb 100644
--- a/FreeRTOS/Source/include/StackMacros.h
+++ b/FreeRTOS/Source/include/StackMacros.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/croutine.h b/FreeRTOS/Source/include/croutine.h
index b26d093bcd..de66545366 100644
--- a/FreeRTOS/Source/include/croutine.h
+++ b/FreeRTOS/Source/include/croutine.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/deprecated_definitions.h b/FreeRTOS/Source/include/deprecated_definitions.h
index 126293e9a4..681998c7f0 100644
--- a/FreeRTOS/Source/include/deprecated_definitions.h
+++ b/FreeRTOS/Source/include/deprecated_definitions.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/event_groups.h b/FreeRTOS/Source/include/event_groups.h
index fd392c40ed..bcb3b23145 100644
--- a/FreeRTOS/Source/include/event_groups.h
+++ b/FreeRTOS/Source/include/event_groups.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/list.h b/FreeRTOS/Source/include/list.h
index 6de2300569..cde5453f23 100644
--- a/FreeRTOS/Source/include/list.h
+++ b/FreeRTOS/Source/include/list.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/mpu_prototypes.h b/FreeRTOS/Source/include/mpu_prototypes.h
index 4a1fbab4a1..b4a1d09803 100644
--- a/FreeRTOS/Source/include/mpu_prototypes.h
+++ b/FreeRTOS/Source/include/mpu_prototypes.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/mpu_wrappers.h b/FreeRTOS/Source/include/mpu_wrappers.h
index cfa44007af..7d3334282d 100644
--- a/FreeRTOS/Source/include/mpu_wrappers.h
+++ b/FreeRTOS/Source/include/mpu_wrappers.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/portable.h b/FreeRTOS/Source/include/portable.h
index cdcf98e2dd..177130cd9b 100644
--- a/FreeRTOS/Source/include/portable.h
+++ b/FreeRTOS/Source/include/portable.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/projdefs.h b/FreeRTOS/Source/include/projdefs.h
index 7ecd91b97f..0da6f1bbe4 100644
--- a/FreeRTOS/Source/include/projdefs.h
+++ b/FreeRTOS/Source/include/projdefs.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/queue.h b/FreeRTOS/Source/include/queue.h
index f4bc73ecf9..b96ed5b38a 100644
--- a/FreeRTOS/Source/include/queue.h
+++ b/FreeRTOS/Source/include/queue.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/semphr.h b/FreeRTOS/Source/include/semphr.h
index 9a61599d82..f9867ae494 100644
--- a/FreeRTOS/Source/include/semphr.h
+++ b/FreeRTOS/Source/include/semphr.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/include/task.h b/FreeRTOS/Source/include/task.h
index ee57e4cd11..5e409c8dd8 100644
--- a/FreeRTOS/Source/include/task.h
+++ b/FreeRTOS/Source/include/task.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -85,7 +85,7 @@ extern "C" {
* MACROS AND DEFINITIONS
*----------------------------------------------------------*/
-#define tskKERNEL_VERSION_NUMBER "V9.0.0rc2"
+#define tskKERNEL_VERSION_NUMBER "V9.0.0"
#define tskKERNEL_VERSION_MAJOR 9
#define tskKERNEL_VERSION_MINOR 0
#define tskKERNEL_VERSION_BUILD 0
diff --git a/FreeRTOS/Source/include/timers.h b/FreeRTOS/Source/include/timers.h
index 5942f629e0..fda71ca0d3 100644
--- a/FreeRTOS/Source/include/timers.h
+++ b/FreeRTOS/Source/include/timers.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/list.c b/FreeRTOS/Source/list.c
index 5e76bf209c..0c0047423e 100644
--- a/FreeRTOS/Source/list.c
+++ b/FreeRTOS/Source/list.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/port.c b/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/port.c
index e63cb3cf0f..7a75209261 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/port.c
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h b/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
index ca9595c979..5779f5eb35 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/Flsh186/prtmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/PC/port.c b/FreeRTOS/Source/portable/BCC/16BitDOS/PC/port.c
index b2e2b94a23..c7cbdf0239 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/PC/port.c
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/PC/prtmacro.h b/FreeRTOS/Source/portable/BCC/16BitDOS/PC/prtmacro.h
index f5214c5af5..309d221eeb 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/PC/prtmacro.h
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/PC/prtmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/common/portasm.h b/FreeRTOS/Source/portable/BCC/16BitDOS/common/portasm.h
index f49a3cb63f..9036858ada 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/common/portasm.h
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/BCC/16BitDOS/common/portcomn.c b/FreeRTOS/Source/portable/BCC/16BitDOS/common/portcomn.c
index 4443e75375..ea1b9e20ee 100644
--- a/FreeRTOS/Source/portable/BCC/16BitDOS/common/portcomn.c
+++ b/FreeRTOS/Source/portable/BCC/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c b/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c
index a02254419f..631d68ec17 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm b/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm
index 09e25e4a92..a392583b07 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm
+++ b/FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/CCS/ARM_CM4F/portmacro.h
index 4ea2699b80..47302ca200 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/CCS/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
index d0bba1b095..e031797be7 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
+++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm
index 8ed9038ee1..ffa91ff8d6 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm
+++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portASM.asm
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
index 019c976ac4..11013b83ce 100644
--- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
+++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/MSP430X/data_model.h b/FreeRTOS/Source/portable/CCS/MSP430X/data_model.h
index bda2d0ae82..b6081e98f3 100644
--- a/FreeRTOS/Source/portable/CCS/MSP430X/data_model.h
+++ b/FreeRTOS/Source/portable/CCS/MSP430X/data_model.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/CCS/MSP430X/port.c b/FreeRTOS/Source/portable/CCS/MSP430X/port.c
index 93c9c0db68..4b25c69a1f 100644
--- a/FreeRTOS/Source/portable/CCS/MSP430X/port.c
+++ b/FreeRTOS/Source/portable/CCS/MSP430X/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CCS/MSP430X/portext.asm b/FreeRTOS/Source/portable/CCS/MSP430X/portext.asm
index 935776849f..432069b5c0 100644
--- a/FreeRTOS/Source/portable/CCS/MSP430X/portext.asm
+++ b/FreeRTOS/Source/portable/CCS/MSP430X/portext.asm
@@ -1,6 +1,6 @@
;
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/CCS/MSP430X/portmacro.h b/FreeRTOS/Source/portable/CCS/MSP430X/portmacro.h
index 864b15b49f..543205fb60 100644
--- a/FreeRTOS/Source/portable/CCS/MSP430X/portmacro.h
+++ b/FreeRTOS/Source/portable/CCS/MSP430X/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/port.c b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/port.c
index 2d3e3716fe..54e19d5c06 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/port.c
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portasm.S b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portasm.S
index f086fe8b48..3ee5e7f45d 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portasm.S
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portmacro.h b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portmacro.h
index 2ef849f1e3..b634724081 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portmacro.h
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V1/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/port.c b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/port.c
index 546eee5207..cf06848b58 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/port.c
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portasm.S b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portasm.S
index af0801db5d..3b8399afa2 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portasm.S
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portmacro.h b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portmacro.h
index cb702b3186..3aabb7732e 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portmacro.h
+++ b/FreeRTOS/Source/portable/CodeWarrior/ColdFire_V2/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/HCS12/port.c b/FreeRTOS/Source/portable/CodeWarrior/HCS12/port.c
index f33a2dfa03..51530b60d8 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/HCS12/port.c
+++ b/FreeRTOS/Source/portable/CodeWarrior/HCS12/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h b/FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h
index 54eb5b0885..b424e4634d 100644
--- a/FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h
+++ b/FreeRTOS/Source/portable/CodeWarrior/HCS12/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Common/mpu_wrappers.c b/FreeRTOS/Source/portable/Common/mpu_wrappers.c
index b1da73e750..8a5115b789 100644
--- a/FreeRTOS/Source/portable/Common/mpu_wrappers.c
+++ b/FreeRTOS/Source/portable/Common/mpu_wrappers.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c
index 7058b060d1..29710c01c1 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
index b224025a27..73e9b28790 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
index 5f06ddb7f4..a4819b0371 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91FR40008/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c
index 69d8fcb97d..366795eac6 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
index bdb480477d..1b96739cbb 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
index f063dd534c..b2f6e1749a 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c
index 35e066f3a9..144b5013e1 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c
index 601d942044..36f52894f4 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h
index bbfb02ede5..17fd21edc2 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c
index da10b65745..65e6979ef5 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c
index d53f22a1a4..3954b32bd8 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
index 25f041099c..c6b00fd518 100644
--- a/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM7_LPC23xx/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c
index 190c890807..51c7508250 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S
index 2abedf03c6..ad12a68a86 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portASM.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
index 54be2bb1e7..a617b829b5 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA53_64_BIT/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
index d43b321a5c..5c843851b7 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
index c561b7e584..46ff2cfcd0 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
index f13c624a3d..e2b3c25172 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
index e9cf103b90..191d19c438 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
index 26477e6617..c9475959fe 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
index e72fc3ec48..6f3611b0b1 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
index e5fa061337..b72042d4a8 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
index 61268361a8..0f30f01615 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
index 3ffd3832e1..7b899661dd 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
index 45a0e69e73..42f5b378bd 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
index e5fa061337..b72042d4a8 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
index 842a9c52c9..83e1753019 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
index 3ffd3832e1..7b899661dd 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM4_MPU/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
index d585aa7ad4..ce19d6af55 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
index 6a964e0b94..66cb4b6666 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c b/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c
index 34d29e7fa9..97487724df 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S
index 5d3a377607..13b9713421 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portASM.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
index b37939dad4..7163af8bb7 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c
index 9e96da799b..173ec77b56 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c
+++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S
index 572045947a..67f88fb32c 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portASM.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
diff --git a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
index 739500883e..a8bd1e8773 100644
--- a/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CRx_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ATMega323/port.c b/FreeRTOS/Source/portable/GCC/ATMega323/port.c
index ec70631a0b..512d95b95f 100644
--- a/FreeRTOS/Source/portable/GCC/ATMega323/port.c
+++ b/FreeRTOS/Source/portable/GCC/ATMega323/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h b/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h
index 37f38a4af0..405d1e8d22 100644
--- a/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c b/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c
index 28391e1a20..9efa3f1d54 100644
--- a/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c
+++ b/FreeRTOS/Source/portable/GCC/AVR32_UC3/port.c
@@ -13,7 +13,7 @@
*****************************************************************************/
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h b/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h
index b6583d4b18..8072373c20 100644
--- a/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/AVR32_UC3/portmacro.h
@@ -13,7 +13,7 @@
*****************************************************************************/
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c
index 95e1839f41..12cb3e8225 100644
--- a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c
+++ b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h
index abf88f948d..bcfcbbd0c0 100644
--- a/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/CORTUS_APS3/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c b/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c
index 43339f8531..feb5b9daec 100644
--- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c
+++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S
index 9d8740a2b6..b01c183791 100644
--- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h
index 8da70420a4..1e701b9ab7 100644
--- a/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ColdFire_V2/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/H8S2329/port.c b/FreeRTOS/Source/portable/GCC/H8S2329/port.c
index ef65fcfc60..4bce27de74 100644
--- a/FreeRTOS/Source/portable/GCC/H8S2329/port.c
+++ b/FreeRTOS/Source/portable/GCC/H8S2329/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h b/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h
index 73be6a8778..3ab76a3513 100644
--- a/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/H8S2329/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/HCS12/port.c b/FreeRTOS/Source/portable/GCC/HCS12/port.c
index ed5d83cdf9..0fcac7f903 100644
--- a/FreeRTOS/Source/portable/GCC/HCS12/port.c
+++ b/FreeRTOS/Source/portable/GCC/HCS12/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h b/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h
index e27f9252dd..6607981e35 100644
--- a/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/HCS12/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h b/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h
index 4dec3e7807..701b6c0e1f 100644
--- a/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h
+++ b/FreeRTOS/Source/portable/GCC/IA32_flat/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/port.c b/FreeRTOS/Source/portable/GCC/IA32_flat/port.c
index 0565d2a66e..f374625b9f 100644
--- a/FreeRTOS/Source/portable/GCC/IA32_flat/port.c
+++ b/FreeRTOS/Source/portable/GCC/IA32_flat/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S b/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S
index 9c7ec1d5d4..d647a8308c 100644
--- a/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/IA32_flat/portASM.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h b/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h
index 1e9b727d40..0f370653c9 100644
--- a/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/IA32_flat/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MSP430F449/port.c b/FreeRTOS/Source/portable/GCC/MSP430F449/port.c
index 436452840b..7518de226d 100644
--- a/FreeRTOS/Source/portable/GCC/MSP430F449/port.c
+++ b/FreeRTOS/Source/portable/GCC/MSP430F449/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h b/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h
index ce8bc3ca12..b9854d9c4d 100644
--- a/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c b/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c
index 0ca17dd471..16ed4927a0 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c
+++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s b/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s
index 413c6e66f9..8ce3bf98a3 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s
+++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/portasm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h
index 9232dc09f6..817d31c180 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/MicroBlaze/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c
index 8e759f201e..6e5ac4d520 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c
index f76e0aa7a8..a8b71d9704 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/port_exceptions.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S
index be28fc710c..4084578132 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h
index c993002dfe..15866d28e4 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV8/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c
index fbdaafe8d4..f7b7f4e5d3 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c
index f76e0aa7a8..a8b71d9704 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/port_exceptions.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S
index be28fc710c..4084578132 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h
index c993002dfe..15866d28e4 100644
--- a/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/MicroBlazeV9/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/port.c b/FreeRTOS/Source/portable/GCC/NiosII/port.c
index 8f46737890..b288d846a4 100644
--- a/FreeRTOS/Source/portable/GCC/NiosII/port.c
+++ b/FreeRTOS/Source/portable/GCC/NiosII/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S b/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S
index 0f3e7f9454..02d1f1df8d 100644
--- a/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S
+++ b/FreeRTOS/Source/portable/GCC/NiosII/port_asm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h b/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h
index 37e363de4b..e9cca8054a 100644
--- a/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/NiosII/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h
index 7154c57ea6..616c9ddba4 100644
--- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h
+++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/FPU_Macros.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c
index 632149c427..0358cbbcf7 100644
--- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c
+++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S
index 91ecb0d22f..d999e1dcb4 100644
--- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h
index 1a1ac5c2df..d24d6ba9b7 100644
--- a/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/PPC405_Xilinx/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h
index 7154c57ea6..616c9ddba4 100644
--- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h
+++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/FPU_Macros.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
index aee066f170..a2d63dab5d 100644
--- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
+++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S
index 91ecb0d22f..d999e1dcb4 100644
--- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portasm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h
index 1a1ac5c2df..d24d6ba9b7 100644
--- a/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/PPC440_Xilinx/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RL78/isr_support.h b/FreeRTOS/Source/portable/GCC/RL78/isr_support.h
index 852a3b97ae..125bc5e11a 100644
--- a/FreeRTOS/Source/portable/GCC/RL78/isr_support.h
+++ b/FreeRTOS/Source/portable/GCC/RL78/isr_support.h
@@ -1,60 +1,64 @@
/*
- FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that has become a de facto standard. *
- * *
- * Help yourself get started quickly and support the FreeRTOS *
- * project by purchasing a FreeRTOS tutorial book, reference *
- * manual, or both from: http://www.FreeRTOS.org/Documentation *
- * *
- * Thank you! *
- * *
- ***************************************************************************
-
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+ ***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available from the following
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
- 1 tab == 4 spaces!
-
***************************************************************************
* *
- * Having a problem? Start by reading the FAQ "My application does *
- * not run, what could be wrong?" *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
* *
- * http://www.FreeRTOS.org/FAQHelp.html *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,
- license and Real Time Engineers Ltd. contact details.
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and middleware.
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
diff --git a/FreeRTOS/Source/portable/GCC/RL78/port.c b/FreeRTOS/Source/portable/GCC/RL78/port.c
index bd8c8c0e5d..c97bf78747 100644
--- a/FreeRTOS/Source/portable/GCC/RL78/port.c
+++ b/FreeRTOS/Source/portable/GCC/RL78/port.c
@@ -1,60 +1,64 @@
/*
- FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that has become a de facto standard. *
- * *
- * Help yourself get started quickly and support the FreeRTOS *
- * project by purchasing a FreeRTOS tutorial book, reference *
- * manual, or both from: http://www.FreeRTOS.org/Documentation *
- * *
- * Thank you! *
- * *
- ***************************************************************************
-
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+ ***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available from the following
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
- 1 tab == 4 spaces!
-
***************************************************************************
* *
- * Having a problem? Start by reading the FAQ "My application does *
- * not run, what could be wrong?" *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
* *
- * http://www.FreeRTOS.org/FAQHelp.html *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,
- license and Real Time Engineers Ltd. contact details.
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and middleware.
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
diff --git a/FreeRTOS/Source/portable/GCC/RL78/portasm.S b/FreeRTOS/Source/portable/GCC/RL78/portasm.S
index 43f2dfc48f..9531504ecc 100644
--- a/FreeRTOS/Source/portable/GCC/RL78/portasm.S
+++ b/FreeRTOS/Source/portable/GCC/RL78/portasm.S
@@ -1,60 +1,64 @@
/*
- FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that has become a de facto standard. *
- * *
- * Help yourself get started quickly and support the FreeRTOS *
- * project by purchasing a FreeRTOS tutorial book, reference *
- * manual, or both from: http://www.FreeRTOS.org/Documentation *
- * *
- * Thank you! *
- * *
- ***************************************************************************
-
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+ ***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available from the following
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
- 1 tab == 4 spaces!
-
***************************************************************************
* *
- * Having a problem? Start by reading the FAQ "My application does *
- * not run, what could be wrong?" *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
* *
- * http://www.FreeRTOS.org/FAQHelp.html *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,
- license and Real Time Engineers Ltd. contact details.
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and middleware.
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
diff --git a/FreeRTOS/Source/portable/GCC/RL78/portmacro.h b/FreeRTOS/Source/portable/GCC/RL78/portmacro.h
index d58dec6ef2..ba499884a4 100644
--- a/FreeRTOS/Source/portable/GCC/RL78/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RL78/portmacro.h
@@ -1,60 +1,64 @@
/*
- FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
- ***************************************************************************
- * *
- * FreeRTOS provides completely free yet professionally developed, *
- * robust, strictly quality controlled, supported, and cross *
- * platform software that has become a de facto standard. *
- * *
- * Help yourself get started quickly and support the FreeRTOS *
- * project by purchasing a FreeRTOS tutorial book, reference *
- * manual, or both from: http://www.FreeRTOS.org/Documentation *
- * *
- * Thank you! *
- * *
- ***************************************************************************
-
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
+ ***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
+ ***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. Full license text is available from the following
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
- 1 tab == 4 spaces!
-
***************************************************************************
* *
- * Having a problem? Start by reading the FAQ "My application does *
- * not run, what could be wrong?" *
+ * FreeRTOS provides completely free yet professionally developed, *
+ * robust, strictly quality controlled, supported, and cross *
+ * platform software that is more than just the market leader, it *
+ * is the industry's de facto standard. *
* *
- * http://www.FreeRTOS.org/FAQHelp.html *
+ * Help yourself get started quickly while simultaneously helping *
+ * to support the FreeRTOS project by purchasing a FreeRTOS *
+ * tutorial book, reference manual, or both: *
+ * http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,
- license and Real Time Engineers Ltd. contact details.
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
+ the FAQ page "My application does not run, what could be wrong?". Have you
+ defined configASSERT()?
+
+ http://www.FreeRTOS.org/support - In return for receiving this top quality
+ embedded software for free we request you assist our global community by
+ participating in the support forum.
+
+ http://www.FreeRTOS.org/training - Investing in training allows your team to
+ be as productive as possible as early as possible. Now you can receive
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
+ Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
- licenses offer ticketed support, indemnification and middleware.
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
+
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
+ licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
diff --git a/FreeRTOS/Source/portable/GCC/RX100/port.c b/FreeRTOS/Source/portable/GCC/RX100/port.c
index b4483c5648..0e59aa3d8e 100644
--- a/FreeRTOS/Source/portable/GCC/RX100/port.c
+++ b/FreeRTOS/Source/portable/GCC/RX100/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RX100/portmacro.h b/FreeRTOS/Source/portable/GCC/RX100/portmacro.h
index a96ba3ba95..e1603dd996 100644
--- a/FreeRTOS/Source/portable/GCC/RX100/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RX100/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RX600/port.c b/FreeRTOS/Source/portable/GCC/RX600/port.c
index 864a94f610..0217972d2b 100644
--- a/FreeRTOS/Source/portable/GCC/RX600/port.c
+++ b/FreeRTOS/Source/portable/GCC/RX600/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RX600/portmacro.h b/FreeRTOS/Source/portable/GCC/RX600/portmacro.h
index 50943811d8..942d71bfd9 100644
--- a/FreeRTOS/Source/portable/GCC/RX600/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RX600/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RX600v2/port.c b/FreeRTOS/Source/portable/GCC/RX600v2/port.c
index 9b1bcc51af..be5a575049 100644
--- a/FreeRTOS/Source/portable/GCC/RX600v2/port.c
+++ b/FreeRTOS/Source/portable/GCC/RX600v2/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h b/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h
index 50943811d8..942d71bfd9 100644
--- a/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RX600v2/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/port.c b/FreeRTOS/Source/portable/GCC/STR75x/port.c
index a0625858b8..d175b5ccca 100644
--- a/FreeRTOS/Source/portable/GCC/STR75x/port.c
+++ b/FreeRTOS/Source/portable/GCC/STR75x/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/portISR.c b/FreeRTOS/Source/portable/GCC/STR75x/portISR.c
index 87af199be1..2dc9a4eb45 100644
--- a/FreeRTOS/Source/portable/GCC/STR75x/portISR.c
+++ b/FreeRTOS/Source/portable/GCC/STR75x/portISR.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h b/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h
index 3703fb807d..8d2e59e620 100644
--- a/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/STR75x/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c b/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c
index c112fb29ec..aef809ccc8 100644
--- a/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c
+++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h b/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h
index bcc8ca9477..109a3183c0 100644
--- a/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c b/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c
index fd6783a954..f7b31ef536 100644
--- a/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c
+++ b/FreeRTOS/Source/portable/GCC/TriCore_1782/porttrap.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h b/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h
index 19e28728b0..e03010c45d 100644
--- a/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/78K0R/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/port.c b/FreeRTOS/Source/portable/IAR/78K0R/port.c
index ed824f4c68..f8593890a0 100644
--- a/FreeRTOS/Source/portable/IAR/78K0R/port.c
+++ b/FreeRTOS/Source/portable/IAR/78K0R/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26 b/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26
index f2a91541b8..f17f74dfd3 100644
--- a/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26
+++ b/FreeRTOS/Source/portable/IAR/78K0R/portasm.s26
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h b/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h
index b526eaaeae..3193fa61f9 100644
--- a/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/78K0R/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c
index e24aea10ae..1a621fe408 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h
index b1b9b44db1..ccbbe4db03 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
index e07cd05b8e..7bc68de19d 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portASM.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h
index c6c96b871b..0f5333470e 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
index 3cbae9f051..758ca0422f 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h
index cb2d7ece13..90aa77aee5 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s
index ec265bd2e5..cc9a2c721b 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portASM.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
index a78f8b831a..eaa701bc60 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
index cc616e8e90..ed00f22475 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
index 3730bb6e3d..604b11f94f 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
index 9efe84269b..eb73e49506 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
index bcbe25cb19..c6f4ac291e 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s
index e297f60c52..cf7a6a3a1b 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/portasm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
index aee50af1b0..3c23e3b0cf 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
index b66c4873ed..3d102b6c64 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
index 53706bf79e..758d6fa971 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portasm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
index b74133b71a..1e98725a20 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c
index ce9c879350..da08e49711 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s
index 6c1c3afe0b..2ab809a0e3 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portasm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h
index ff7f60b05c..9760ee312a 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c
index a95b5e79ea..5cfdb11037 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c
+++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s
index f1d62dda1b..dc1d9be14c 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portASM.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
diff --git a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h
index 2bedf50b33..9022ee745c 100644
--- a/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CRx_No_GIC/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/port.c b/FreeRTOS/Source/portable/IAR/ATMega323/port.c
index 33375bd458..37f0d52924 100644
--- a/FreeRTOS/Source/portable/IAR/ATMega323/port.c
+++ b/FreeRTOS/Source/portable/IAR/ATMega323/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h
index a27890bc2e..577b36f780 100644
--- a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90 b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90
index 3e6383ebea..53c2bf706e 100644
--- a/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90
+++ b/FreeRTOS/Source/portable/IAR/ATMega323/portmacro.s90
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c b/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c
index 9d72a83bf5..8cf5c4c66a 100644
--- a/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c
+++ b/FreeRTOS/Source/portable/IAR/AVR32_UC3/port.c
@@ -13,7 +13,7 @@
*****************************************************************************/
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h b/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h
index 35dd6614e7..1aaad551fa 100644
--- a/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/AVR32_UC3/portmacro.h
@@ -13,7 +13,7 @@
*****************************************************************************/
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h
index 5757fee639..af77eca72e 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c
index a00e3f40fa..6dfcbdc8bf 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79 b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79
index 47ee097d43..d6398f5d37 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portasm.s79
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h
index 563d6cfcab..64e407680b 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM7S64/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c
index f2f4266522..1310c16322 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h
index e24a8b5ff5..8f7088b4ef 100644
--- a/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/AtmelSAM9XE/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h b/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h
index 5757fee639..af77eca72e 100644
--- a/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/LPC2000/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/port.c b/FreeRTOS/Source/portable/IAR/LPC2000/port.c
index 6ce6c2d598..3151794c48 100644
--- a/FreeRTOS/Source/portable/IAR/LPC2000/port.c
+++ b/FreeRTOS/Source/portable/IAR/LPC2000/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79 b/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79
index 6ba5ccbc36..43c41c8578 100644
--- a/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79
+++ b/FreeRTOS/Source/portable/IAR/LPC2000/portasm.s79
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h b/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h
index 8bed5489dd..64b1062fae 100644
--- a/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/LPC2000/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/port.c b/FreeRTOS/Source/portable/IAR/MSP430/port.c
index fffa802c9c..2b04e6040d 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430/port.c
+++ b/FreeRTOS/Source/portable/IAR/MSP430/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portasm.h b/FreeRTOS/Source/portable/IAR/MSP430/portasm.h
index 5657c467b5..51e08ac8bd 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430/portasm.h
+++ b/FreeRTOS/Source/portable/IAR/MSP430/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43
index 42e9b8dd56..f70128cc7d 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430/portext.s43
+++ b/FreeRTOS/Source/portable/IAR/MSP430/portext.s43
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h b/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h
index 17e693a350..8a594f6f8d 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/MSP430/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h b/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h
index 49ce8c1bc2..334f866091 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h
+++ b/FreeRTOS/Source/portable/IAR/MSP430X/data_model.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
@@ -70,7 +70,7 @@
#ifndef DATA_MODEL_H
#define DATA_MODEL_H
-#ifdef __DATA_MODEL_SMALL__
+#if __DATA_MODEL__ == __DATA_MODEL_SMALL__
#define pushm_x pushm.w
#define popm_x popm.w
#define push_x push.w
@@ -79,7 +79,7 @@
#define cmp_x cmp.w
#endif
-#ifdef __DATA_MODEL_MEDIUM__
+#if __DATA_MODEL__ == __DATA_MODEL_MEDIUM__
#define pushm_x pushm.a
#define popm_x popm.a
#define push_x pushx.a
@@ -88,7 +88,7 @@
#define cmp_x cmp.w
#endif
-#ifdef __DATA_MODEL_LARGE__
+#if __DATA_MODEL__ == __DATA_MODEL_LARGE__
#define pushm_x pushm.a
#define popm_x popm.a
#define push_x pushx.a
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/port.c b/FreeRTOS/Source/portable/IAR/MSP430X/port.c
index 674573e5b5..f699e3ae17 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430X/port.c
+++ b/FreeRTOS/Source/portable/IAR/MSP430X/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43 b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43
index 8db35d3c21..63353252c1 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43
+++ b/FreeRTOS/Source/portable/IAR/MSP430X/portext.s43
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h b/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h
index 87c84203b5..8754b4a669 100644
--- a/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/MSP430X/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h b/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h
index ee728f392d..45b970fc6b 100644
--- a/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/RL78/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/RL78/port.c b/FreeRTOS/Source/portable/IAR/RL78/port.c
index e650427baf..b8248e8f7d 100644
--- a/FreeRTOS/Source/portable/IAR/RL78/port.c
+++ b/FreeRTOS/Source/portable/IAR/RL78/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87
index 70cc267a8d..a83c38eebb 100644
--- a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87
+++ b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h
index 5ba6fcf9b3..2da00d697b 100644
--- a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX100/port.c b/FreeRTOS/Source/portable/IAR/RX100/port.c
index dde287e10c..ba52db2ad3 100644
--- a/FreeRTOS/Source/portable/IAR/RX100/port.c
+++ b/FreeRTOS/Source/portable/IAR/RX100/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX100/port_asm.s b/FreeRTOS/Source/portable/IAR/RX100/port_asm.s
index 0d3175a508..2b998b2e71 100644
--- a/FreeRTOS/Source/portable/IAR/RX100/port_asm.s
+++ b/FreeRTOS/Source/portable/IAR/RX100/port_asm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX100/portmacro.h b/FreeRTOS/Source/portable/IAR/RX100/portmacro.h
index 372bf5ddf8..2b9366c7fe 100644
--- a/FreeRTOS/Source/portable/IAR/RX100/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/RX100/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX600/port.c b/FreeRTOS/Source/portable/IAR/RX600/port.c
index 8c84cdc258..62cb2f7265 100644
--- a/FreeRTOS/Source/portable/IAR/RX600/port.c
+++ b/FreeRTOS/Source/portable/IAR/RX600/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX600/port_asm.s b/FreeRTOS/Source/portable/IAR/RX600/port_asm.s
index 460254578b..016f28557b 100644
--- a/FreeRTOS/Source/portable/IAR/RX600/port_asm.s
+++ b/FreeRTOS/Source/portable/IAR/RX600/port_asm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RX600/portmacro.h b/FreeRTOS/Source/portable/IAR/RX600/portmacro.h
index 62578d03cf..0bbb527add 100644
--- a/FreeRTOS/Source/portable/IAR/RX600/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/RX600/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/port.c b/FreeRTOS/Source/portable/IAR/RXv2/port.c
index 49060839a3..409b6bc762 100644
--- a/FreeRTOS/Source/portable/IAR/RXv2/port.c
+++ b/FreeRTOS/Source/portable/IAR/RXv2/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s b/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s
index 662eb0e582..da92a9bfdf 100644
--- a/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s
+++ b/FreeRTOS/Source/portable/IAR/RXv2/port_asm.s
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h b/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h
index 0d8ee12f0b..b1f3a31f4d 100644
--- a/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/RXv2/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h
index 5757fee639..af77eca72e 100644
--- a/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/STR71x/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/port.c b/FreeRTOS/Source/portable/IAR/STR71x/port.c
index 7f44f7fa95..940d88986c 100644
--- a/FreeRTOS/Source/portable/IAR/STR71x/port.c
+++ b/FreeRTOS/Source/portable/IAR/STR71x/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79
index b0e91f7af2..017e2a3092 100644
--- a/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79
+++ b/FreeRTOS/Source/portable/IAR/STR71x/portasm.s79
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h
index 7519ff92e6..3d951c3690 100644
--- a/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/STR71x/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h
index 50498b5375..f022488201 100644
--- a/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/STR75x/ISR_Support.h
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/port.c b/FreeRTOS/Source/portable/IAR/STR75x/port.c
index 277eba3cd5..1c75bd9e29 100644
--- a/FreeRTOS/Source/portable/IAR/STR75x/port.c
+++ b/FreeRTOS/Source/portable/IAR/STR75x/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79
index 35311a8c99..f42fb31809 100644
--- a/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79
+++ b/FreeRTOS/Source/portable/IAR/STR75x/portasm.s79
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h
index 6fe65520e6..a29de63821 100644
--- a/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/STR75x/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h b/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h
index a0e61ef2b3..8b1578f8e8 100644
--- a/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/STR91x/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/port.c b/FreeRTOS/Source/portable/IAR/STR91x/port.c
index df7ca21e94..5153e44494 100644
--- a/FreeRTOS/Source/portable/IAR/STR91x/port.c
+++ b/FreeRTOS/Source/portable/IAR/STR91x/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79 b/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79
index c4a32855ba..586b10ef60 100644
--- a/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79
+++ b/FreeRTOS/Source/portable/IAR/STR91x/portasm.s79
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h b/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h
index 472611e1e7..d1839b8879 100644
--- a/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/STR91x/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h b/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h
index d91de5852c..8154ab6eca 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h
+++ b/FreeRTOS/Source/portable/IAR/V850ES/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/port.c b/FreeRTOS/Source/portable/IAR/V850ES/port.c
index 09ab589d87..b847127a46 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/port.c
+++ b/FreeRTOS/Source/portable/IAR/V850ES/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85
index 0a88216b8b..e8cfa4b898 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85
+++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm.s85
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85
index a778c9bda8..8c6ec3d106 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85
+++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Fx3.s85
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85 b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85
index 1eb9f5f75b..5a048c49af 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85
+++ b/FreeRTOS/Source/portable/IAR/V850ES/portasm_Hx2.s85
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h b/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h
index b1cdcd4660..81f5417a7c 100644
--- a/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/V850ES/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC18F/port.c b/FreeRTOS/Source/portable/MPLAB/PIC18F/port.c
index d581b34ab5..8a045f137c 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC18F/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC18F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC18F/portmacro.h b/FreeRTOS/Source/portable/MPLAB/PIC18F/portmacro.h
index 8868b5235b..46860c66dc 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC18F/portmacro.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC18F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c
index 4293e09bd6..465fe050ba 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
index 31db8b4045..f298df9dd2 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_PIC24.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
index 192b218a5c..26e0604eb5 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portasm_dsPIC.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
index c6c71db46f..0ee6983637 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/ISR_Support.h b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
index 03733c1115..6a444ef808 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c
index c5a4a9f059..bab8706fff 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port_asm.S b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port_asm.S
index 3b6a4874f0..7f932f1e97 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port_asm.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/port_asm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/portmacro.h b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/portmacro.h
index 5750aac87c..114d40d782 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/portmacro.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MEC14xx/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h b/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h
index 60e22f24d6..1697d4367b 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
index d06382a48c..43da50f14c 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
index 30940d686e..6f6ee62836 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/port_asm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h b/FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
index c3d15722d5..83a1ce36b0 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/ISR_Support.h b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/ISR_Support.h
index 2182d34da0..15349e69b5 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/ISR_Support.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/ISR_Support.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port.c b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port.c
index d764828e8b..b573b16d3d 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port.c
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S
index 0a76ca1b53..33d974034f 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/port_asm.S
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/portmacro.h b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/portmacro.h
index 05457d32aa..203508a040 100644
--- a/FreeRTOS/Source/portable/MPLAB/PIC32MZ/portmacro.h
+++ b/FreeRTOS/Source/portable/MPLAB/PIC32MZ/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MSVC-MingW/port.c b/FreeRTOS/Source/portable/MSVC-MingW/port.c
index 99892bb737..8189fb0dd1 100644
--- a/FreeRTOS/Source/portable/MSVC-MingW/port.c
+++ b/FreeRTOS/Source/portable/MSVC-MingW/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MSVC-MingW/portmacro.h b/FreeRTOS/Source/portable/MSVC-MingW/portmacro.h
index cb1e6b3677..34634fd2e9 100644
--- a/FreeRTOS/Source/portable/MSVC-MingW/portmacro.h
+++ b/FreeRTOS/Source/portable/MSVC-MingW/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MemMang/heap_1.c b/FreeRTOS/Source/portable/MemMang/heap_1.c
index 30b8f93de9..435c99d05b 100644
--- a/FreeRTOS/Source/portable/MemMang/heap_1.c
+++ b/FreeRTOS/Source/portable/MemMang/heap_1.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MemMang/heap_2.c b/FreeRTOS/Source/portable/MemMang/heap_2.c
index d8037f2e15..fb9c8b1ce0 100644
--- a/FreeRTOS/Source/portable/MemMang/heap_2.c
+++ b/FreeRTOS/Source/portable/MemMang/heap_2.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MemMang/heap_3.c b/FreeRTOS/Source/portable/MemMang/heap_3.c
index 05f1d795b4..cda8aa7030 100644
--- a/FreeRTOS/Source/portable/MemMang/heap_3.c
+++ b/FreeRTOS/Source/portable/MemMang/heap_3.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MemMang/heap_4.c b/FreeRTOS/Source/portable/MemMang/heap_4.c
index 019d851e4e..1091371e30 100644
--- a/FreeRTOS/Source/portable/MemMang/heap_4.c
+++ b/FreeRTOS/Source/portable/MemMang/heap_4.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MemMang/heap_5.c b/FreeRTOS/Source/portable/MemMang/heap_5.c
index a2dcd1fb3e..8ac661e73e 100644
--- a/FreeRTOS/Source/portable/MemMang/heap_5.c
+++ b/FreeRTOS/Source/portable/MemMang/heap_5.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MikroC/ARM_CM4F/port.c b/FreeRTOS/Source/portable/MikroC/ARM_CM4F/port.c
index 9946f4e82d..97a7c8dd1e 100644
--- a/FreeRTOS/Source/portable/MikroC/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/MikroC/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/MikroC/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/MikroC/ARM_CM4F/portmacro.h
index 0e84f87b8c..58d65633ca 100644
--- a/FreeRTOS/Source/portable/MikroC/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/MikroC/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/port.c b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/port.c
index b61c16dd62..9764554b88 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/port.c
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
index 74886cfcdc..aeefdf1c4f 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
index 4a11380a71..bbeeacc51c 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/large_untested/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/port.c b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/port.c
index 58b1343135..b4d53301ed 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/port.c
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portasm.h b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portasm.h
index ede7905ef7..aab227f626 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portasm.h
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portmacro.h b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portmacro.h
index 37f4ee0177..1d826725b5 100644
--- a/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portmacro.h
+++ b/FreeRTOS/Source/portable/Paradigm/Tern_EE/small/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/port.c b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/port.c
index 30fb3d4d9b..e8d05e49d0 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s
index 92755cd61f..1a588d1174 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s
+++ b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portASM.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.h
index 28a5c4e78b..d667596a0a 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
index 86161674c8..37fe6dfd4a 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
+++ b/FreeRTOS/Source/portable/RVDS/ARM7_LPC21xx/portmacro.inc
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
index 007ecfcaca..10f6ae457e 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CA9/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portASM.s b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portASM.s
index f6027adaa5..55091c815c 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portASM.s
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portASM.s
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.h
index 68ad0b1c45..469120ddba 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.inc b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.inc
index c065fc3ff9..4a46924bd3 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.inc
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CA9/portmacro.inc
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
index b19b969fb5..6fc1e94b67 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
index e3c49c12f2..70a12e501b 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
index 45a8f565d8..61d85967d7 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h
index 7532f3ad3f..25a69a2103 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
index bb128f8e43..1dc1b5b005 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/portmacro.h
index 7532f3ad3f..25a69a2103 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
index 599c589e31..bbe2a96a88 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/portmacro.h
index bbe3c53908..8d441eef6f 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM4_MPU/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
index ccefbd9795..ef34402f68 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/portmacro.h b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/portmacro.h
index daf9cb98f8..a1562401c0 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/portmacro.h
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM7/r0p1/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX100/port.c b/FreeRTOS/Source/portable/Renesas/RX100/port.c
index 2eb5feb974..4acc091b5d 100644
--- a/FreeRTOS/Source/portable/Renesas/RX100/port.c
+++ b/FreeRTOS/Source/portable/Renesas/RX100/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX100/port_asm.src b/FreeRTOS/Source/portable/Renesas/RX100/port_asm.src
index d9c5a587bb..e1b89ae412 100644
--- a/FreeRTOS/Source/portable/Renesas/RX100/port_asm.src
+++ b/FreeRTOS/Source/portable/Renesas/RX100/port_asm.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/RX100/portmacro.h b/FreeRTOS/Source/portable/Renesas/RX100/portmacro.h
index 48cb866711..da0ea121af 100644
--- a/FreeRTOS/Source/portable/Renesas/RX100/portmacro.h
+++ b/FreeRTOS/Source/portable/Renesas/RX100/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX200/port.c b/FreeRTOS/Source/portable/Renesas/RX200/port.c
index 7ea72bc633..01294edc2a 100644
--- a/FreeRTOS/Source/portable/Renesas/RX200/port.c
+++ b/FreeRTOS/Source/portable/Renesas/RX200/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX200/port_asm.src b/FreeRTOS/Source/portable/Renesas/RX200/port_asm.src
index d9c5a587bb..e1b89ae412 100644
--- a/FreeRTOS/Source/portable/Renesas/RX200/port_asm.src
+++ b/FreeRTOS/Source/portable/Renesas/RX200/port_asm.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/RX200/portmacro.h b/FreeRTOS/Source/portable/Renesas/RX200/portmacro.h
index 3f667f72dd..fed2a716ac 100644
--- a/FreeRTOS/Source/portable/Renesas/RX200/portmacro.h
+++ b/FreeRTOS/Source/portable/Renesas/RX200/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX600/port.c b/FreeRTOS/Source/portable/Renesas/RX600/port.c
index c047bfcd87..124ee72659 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600/port.c
+++ b/FreeRTOS/Source/portable/Renesas/RX600/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX600/port_asm.src b/FreeRTOS/Source/portable/Renesas/RX600/port_asm.src
index d9c5a587bb..e1b89ae412 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600/port_asm.src
+++ b/FreeRTOS/Source/portable/Renesas/RX600/port_asm.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/RX600/portmacro.h b/FreeRTOS/Source/portable/Renesas/RX600/portmacro.h
index 02697ab360..e2bb8449ec 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600/portmacro.h
+++ b/FreeRTOS/Source/portable/Renesas/RX600/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX600v2/port.c b/FreeRTOS/Source/portable/Renesas/RX600v2/port.c
index 4721e14932..c7b8f95927 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600v2/port.c
+++ b/FreeRTOS/Source/portable/Renesas/RX600v2/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/RX600v2/port_asm.src b/FreeRTOS/Source/portable/Renesas/RX600v2/port_asm.src
index 7f1a5a2a12..40abfc89a1 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600v2/port_asm.src
+++ b/FreeRTOS/Source/portable/Renesas/RX600v2/port_asm.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/RX600v2/portmacro.h b/FreeRTOS/Source/portable/Renesas/RX600v2/portmacro.h
index 28d6983984..8e159bd189 100644
--- a/FreeRTOS/Source/portable/Renesas/RX600v2/portmacro.h
+++ b/FreeRTOS/Source/portable/Renesas/RX600v2/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/ISR_Support.inc b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/ISR_Support.inc
index b473b2fa02..5484ea6aa1 100644
--- a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/ISR_Support.inc
+++ b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/ISR_Support.inc
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/port.c b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/port.c
index 9ab2d1fff2..117f76453a 100644
--- a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/port.c
+++ b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portasm.src b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portasm.src
index 3f879bbe67..81a4146199 100644
--- a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portasm.src
+++ b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portasm.src
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portmacro.h b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portmacro.h
index 0cf33e36bb..1ba51a9dea 100644
--- a/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portmacro.h
+++ b/FreeRTOS/Source/portable/Renesas/SH2A_FPU/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Rowley/MSP430F449/port.c b/FreeRTOS/Source/portable/Rowley/MSP430F449/port.c
index 4788c6f2c3..e725ca2e20 100644
--- a/FreeRTOS/Source/portable/Rowley/MSP430F449/port.c
+++ b/FreeRTOS/Source/portable/Rowley/MSP430F449/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Rowley/MSP430F449/portasm.h b/FreeRTOS/Source/portable/Rowley/MSP430F449/portasm.h
index c0a161d3a7..ca67ce27b0 100644
--- a/FreeRTOS/Source/portable/Rowley/MSP430F449/portasm.h
+++ b/FreeRTOS/Source/portable/Rowley/MSP430F449/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm b/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm
index 58077c288f..ada08b4bd0 100644
--- a/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm
+++ b/FreeRTOS/Source/portable/Rowley/MSP430F449/portext.asm
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Rowley/MSP430F449/portmacro.h b/FreeRTOS/Source/portable/Rowley/MSP430F449/portmacro.h
index 2df29f0a28..8bd888e805 100644
--- a/FreeRTOS/Source/portable/Rowley/MSP430F449/portmacro.h
+++ b/FreeRTOS/Source/portable/Rowley/MSP430F449/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/SDCC/Cygnal/port.c b/FreeRTOS/Source/portable/SDCC/Cygnal/port.c
index 0e3139519a..414f5abd57 100644
--- a/FreeRTOS/Source/portable/SDCC/Cygnal/port.c
+++ b/FreeRTOS/Source/portable/SDCC/Cygnal/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/SDCC/Cygnal/portmacro.h b/FreeRTOS/Source/portable/SDCC/Cygnal/portmacro.h
index eb62032d3c..80fc200235 100644
--- a/FreeRTOS/Source/portable/SDCC/Cygnal/portmacro.h
+++ b/FreeRTOS/Source/portable/SDCC/Cygnal/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Softune/MB91460/port.c b/FreeRTOS/Source/portable/Softune/MB91460/port.c
index c222881636..76c1ba6fa7 100644
--- a/FreeRTOS/Source/portable/Softune/MB91460/port.c
+++ b/FreeRTOS/Source/portable/Softune/MB91460/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Softune/MB91460/portmacro.h b/FreeRTOS/Source/portable/Softune/MB91460/portmacro.h
index 7e1a5a7b71..8a7ddd27b5 100644
--- a/FreeRTOS/Source/portable/Softune/MB91460/portmacro.h
+++ b/FreeRTOS/Source/portable/Softune/MB91460/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Softune/MB96340/port.c b/FreeRTOS/Source/portable/Softune/MB96340/port.c
index 5e7a683181..7841f47a0c 100644
--- a/FreeRTOS/Source/portable/Softune/MB96340/port.c
+++ b/FreeRTOS/Source/portable/Softune/MB96340/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Softune/MB96340/portmacro.h b/FreeRTOS/Source/portable/Softune/MB96340/portmacro.h
index cc0c016a09..023a32e61e 100644
--- a/FreeRTOS/Source/portable/Softune/MB96340/portmacro.h
+++ b/FreeRTOS/Source/portable/Softune/MB96340/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port.c b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port.c
index 4c95cf49b6..6f44c25ecd 100644
--- a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port.c
+++ b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port_asm.asm b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port_asm.asm
index 8b8cd94fbf..4ab1663ce2 100644
--- a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port_asm.asm
+++ b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/port_asm.asm
@@ -1,5 +1,5 @@
;/*
-; FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+; FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
; All rights reserved
;
;
diff --git a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/portmacro.h
index 293eed45bd..4a2d456b4d 100644
--- a/FreeRTOS/Source/portable/Tasking/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/Tasking/ARM_CM4F/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c b/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
index bdcb6d5855..921903a00f 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
+++ b/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/Tick.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c b/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
index 305852b3fa..652d55c0ea 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
+++ b/FreeRTOS/Source/portable/WizC/PIC18/Drivers/Tick/isrTick.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/Install.bat b/FreeRTOS/Source/portable/WizC/PIC18/Install.bat
index 816bdde668..9d67175e0e 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/Install.bat
+++ b/FreeRTOS/Source/portable/WizC/PIC18/Install.bat
@@ -1,5 +1,5 @@
REM/*
-REM FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+REM FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
REM
REM
REM ***************************************************************************
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/addFreeRTOS.h b/FreeRTOS/Source/portable/WizC/PIC18/addFreeRTOS.h
index e2e05f25e3..da38e4833a 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/addFreeRTOS.h
+++ b/FreeRTOS/Source/portable/WizC/PIC18/addFreeRTOS.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/port.c b/FreeRTOS/Source/portable/WizC/PIC18/port.c
index 34cfbe8a86..85ba6c07b0 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/port.c
+++ b/FreeRTOS/Source/portable/WizC/PIC18/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/WizC/PIC18/portmacro.h b/FreeRTOS/Source/portable/WizC/PIC18/portmacro.h
index 67506027de..b12cb9240e 100644
--- a/FreeRTOS/Source/portable/WizC/PIC18/portmacro.h
+++ b/FreeRTOS/Source/portable/WizC/PIC18/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/port.c b/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
index 9210808a0a..b56e898316 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h b/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
index 4c23901be4..13dd4d859e 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/Flsh186/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/port.c b/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/port.c
index e18019ce2d..a6d3eb90be 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/port.c
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/port.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/portmacro.h b/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
index 0abe3e699a..2db988c956 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/PC/portmacro.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portasm.h b/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portasm.h
index 4ffc80a6e5..63637e84b0 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portasm.h
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portasm.h
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portcomn.c b/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portcomn.c
index ae780908a7..e673b6a2cd 100644
--- a/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portcomn.c
+++ b/FreeRTOS/Source/portable/oWatcom/16BitDOS/common/portcomn.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/queue.c b/FreeRTOS/Source/queue.c
index 5901174bf6..9884658eb9 100644
--- a/FreeRTOS/Source/queue.c
+++ b/FreeRTOS/Source/queue.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/tasks.c b/FreeRTOS/Source/tasks.c
index e7f9ba1eb6..8aea1cd915 100644
--- a/FreeRTOS/Source/tasks.c
+++ b/FreeRTOS/Source/tasks.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
diff --git a/FreeRTOS/Source/timers.c b/FreeRTOS/Source/timers.c
index f82bfcb237..e49587f511 100644
--- a/FreeRTOS/Source/timers.c
+++ b/FreeRTOS/Source/timers.c
@@ -1,5 +1,5 @@
/*
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
+ FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.