github-forks
/
FreeRTOS
mirror of https://github.com/FreeRTOS/FreeRTOS.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Remove older Renesas BSP files from the RX63N RSK demo in preparation to add in the latest BSP files.

Browse Source
pull/1/head
Richard Barry 13 years ago
parent 88bff5d198
commit 1bd702777d
8 changed files with 0 additions and 1095 deletions
Show Stats Download Patch File Download Diff File

66
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/dbsct.c
Unescape Escape View File

@ -1,66 +0,0 @@
/***********************************************************************/
/* */
/* FILE :dbsct.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of B,R Section */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : dbsct.c
*
* Abstract : Setting of B,R Section.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "typedefine.h"
#pragma unpack
#pragma section C C$DSEC
extern const struct {
_UBYTE *rom_s; /* Start address of the initialized data section in ROM */
_UBYTE *rom_e; /* End address of the initialized data section in ROM */
_UBYTE *ram_s; /* Start address of the initialized data section in RAM */
} _DTBL[] = {
{ __sectop("D"), __secend("D"), __sectop("R") },
{ __sectop("D_2"), __secend("D_2"), __sectop("R_2") },
{ __sectop("D_1"), __secend("D_1"), __sectop("R_1") }
};
#pragma section C C$BSEC
extern const struct {
_UBYTE *b_s; /* Start address of non-initialized data section */
_UBYTE *b_e; /* End address of non-initialized data section */
} _BTBL[] = {
{ __sectop("B"), __secend("B") },
{ __sectop("B_2"), __secend("B_2") },
{ __sectop("B_1"), __secend("B_1") }
};
#pragma section
/*
** CTBL prevents excessive output of L1100 messages when linking.
** Even if CTBL is deleted, the operation of the program does not change.
*/
_UBYTE * const _CTBL[] = {
__sectop("C_1"), __sectop("C_2"), __sectop("C"),
__sectop("W_1"), __sectop("W_2"), __sectop("W")
};
#pragma packoption

293
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/hwsetup.c
Unescape Escape View File

@ -1,293 +0,0 @@
/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : hwsetup.c
* Version : 1.00
* Description : Power up hardware initializations
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
#include "iodefine.h"
#include "r_ether.h"
#include "rskrx63ndef.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
void io_set_cpg(void);
void ConfigurePortPins(void);
void EnablePeripheralModules(void);
/******************************************************************************
* Function Name: HardwareSetup
* Description : This function does initial setting for CPG port pins used in
* : the Demo including the MII pins of the Ethernet PHY connection.
* Arguments : none
* Return Value : none
******************************************************************************/
void HardwareSetup(void)
{
/* CPG setting */
io_set_cpg();
/* Setup the port pins */
ConfigurePortPins();
/* Enables peripherals */
EnablePeripheralModules();
#if INCLUDE_LCD == 1
/* Initialize display */
InitialiseDisplay();
#endif
}
/******************************************************************************
* Function Name: EnablePeripheralModules
* Description : Enables Peripheral Modules before use
* Arguments : none
* Return Value : none
******************************************************************************/
void EnablePeripheralModules(void)
{
/* Module standby clear */
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
}
/******************************************************************************
* Function Name: ConfigurePortPins
* Description : Configures port pins.
* Arguments : none
* Return Value : none
******************************************************************************/
void ConfigurePortPins(void)
{
/* Port pins default to inputs. To ensure safe initialisation set the pin states
before changing the data direction registers. This will avoid any unintentional
state changes on the external ports.
Many peripheral modules will override the setting of the port registers. Ensure
that the state is safe for external devices if the internal peripheral module is
disabled or powered down. */
#if(0) /* NOTE: ETHERNET PORT IS NOT YET CONFIGURED FOR THE RX63N. */
/* ==== MII/RMII Pins setting ==== */
/*--------------------------------------*/
/* Port Function Control Register */
/*--------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x9A;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x82;
#endif /* ETH_MODE_SEL */
/*-------------------------------------------*/
/* Input Buffer Control Register (ICR) */
/*-------------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set ET_ERXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set ET_ERXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set ET_RX_CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set ET_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set ET_CRS input */
PORT8.ICR.BIT.B3 = 1;
/* PC0=1 Set ET_ERXD3 input */
PORTC.ICR.BIT.B0 = 1;
/* PC1=1 Set ET_ERXD2 input */
PORTC.ICR.BIT.B1 = 1;
/* PC2=1 Set ET_RX_DV input */
PORTC.ICR.BIT.B2 = 1;
/* PC4=1 Set EX_TX_CLK input */
PORTC.ICR.BIT.B4 = 1;
/* PC7=1 Set ET_COL input */
PORTC.ICR.BIT.B7 = 1;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set RMII_RXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set RMII_RXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set REF50CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set RMII_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set RMII_CRS_DV input */
PORT8.ICR.BIT.B3 = 1;
#endif /* ETH_MODE_SEL */
#endif /* 0 */
/* Configure LED 0-4 pin settings */
PORT1.PODR.BIT.B4 = 1;
PORT1.PODR.BIT.B5 = 1;
PORT1.PODR.BIT.B6 = 1;
PORT1.PODR.BIT.B7 = 1;
PORT1.PDR.BIT.B4 = 1;
PORT1.PDR.BIT.B5 = 1;
PORT1.PDR.BIT.B6 = 1;
PORT1.PDR.BIT.B7 = 1;
#if INCLUDE_LCD == 1
/* Set LCD pins as outputs */
/* LCD-RS */
PORTJ.PDR.BIT.B1 = 1;
/* LCD-EN */
PORTJ.PDR.BIT.B3 = 1;
/*LCD-data */
PORTH.PDR.BYTE = 0x0F;
#endif
}
/******************************************************************************
* Function Name: io_set_cpg
* Description : Sets up operating speed
* Arguments : none
* Return Value : none
******************************************************************************/
void io_set_cpg(void)
{
unsigned long i;
SYSTEM.PRCR.WORD = 0xA503; /* Access registers via PRCR */
SYSTEM.SOSCCR.BYTE = 0x00; /* Sub-clock oscillator ON */
SYSTEM.HOCOPCR.BYTE = 0x00; /* HOCO ON */
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
/* 262144 states */
SYSTEM.PLLWTCR.BYTE = 0x0e; /* PLL Wait Control Register */
/* 2097152 states */
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
SYSTEM.PLLCR.WORD = 0x0f00; /* x16 @PLL */
/* Input to PLL = EXTAL */
/* Therefore: */
/* PLL = EXTAL */
/* = 12 */
/* PLL * 16 = 192MHz */
/* External oscillation input selection */
SYSTEM.PLLCR2.BYTE = 0x00; /* PLL ON */
for(i = 0; i<2500; i++) /* Wait for stabilisation of PLL and main clock */
{ /* = 20ms */
/* (2500 x 1/125kHz = 20ms) */
}
/************************************************************************/
/* */
/* SYSTEM.SCKCR.BIT.PCKB = 2; ( b11: b8 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.PCKA = 2; ( b15:b12 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.BCK = 2; ( b16:b19 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.PSTOP0 = 1; ( b22 ) SDCLK CLK OUT Disabled */
/* SYSTEM.SCKCR.BIT.PSTOP1 = 1; ( b23 ) BUS CLK OUT Disabled */
/* SYSTEM.SCKCR.BIT.ICK = 1; ( b24:b27 ) PLL/2 = 96MHz */
/* SYSTEM.SCKCR.BIT.FCK = 2; ( b31:b28 ) PLL/3 = 48MHz */
/* */
/* SYSTEM.SCKCR2.BIT.UCK = 2; PLL/4 = 48MHz */
/* SYSTEM.SCKCR2.BIT.IEBCK = 3; PLL/4 = 48MHz */
/************************************************************************/
SYSTEM.SCKCR.LONG = 0x21c22222; /* set these bits to the same a this bit */
/* ||| | | */
/* |++---------------+ | */
/* | | */
/* +-------------------------------------+ */
SYSTEM.SCKCR2.WORD = 0x0033;
// SYSTEM.SCKCR3.WORD = 0x0000; /* LOCO -> LOCO */
// SYSTEM.SCKCR3.WORD = 0x0100; /* LOCO -> HOCO */
// SYSTEM.SCKCR3.WORD = 0x0200; /* LOCO -> MAIN */
// SYSTEM.SCKCR3.WORD = 0x0300; /* LOCO -> Sub-Clock */
SYSTEM.SCKCR3.WORD = 0x0400; /* LOCO -> PLL */
#if 1
// Configure LED - I/O pins as Outputs
// First set the Data Levels
LED0 = 1; // LED0 : OFF =1, ON = 0
LED1 = 1; // LED1 : OFF =1, ON = 0
LED2 = 1; // LED2 : OFF =1, ON = 0
LED3 = 1; // LED3 : OFF =1, ON = 0
// Set Port Direction Registers
LED0_PDR = 1; // LED0 : 1 = output
LED1_PDR = 1; // LED1 : 1 = output
LED2_PDR = 1; // LED2 : 1 = output
LED3_PDR = 1; // LED3 : 1 = output
#endif
/* Gain access to the Port Function Select Registers */
MPC.PWPR.BIT.B0WI = 0;
MPC.PWPR.BIT.PFSWE = 1;
}

53
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/intprg.c
Unescape Escape View File

@ -1,53 +0,0 @@
/***********************************************************************/
/* */
/* FILE :intprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Interrupt Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : intprg.c
*
* Abstract : Interrupt Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include "vect.h"
#pragma section IntPRG
// Exception(Supervisor Instruction)
void Excep_SuperVisorInst(void){/* brk(); */}
// Exception(Undefined Instruction)
void Excep_UndefinedInst(void){/* brk(); */}
// Exception(Floating Point)
void Excep_FloatingPoint(void){/* brk(); */}
// NMI
void NonMaskableInterrupt(void){/* brk(); */}
// Dummy
void Dummy(void){/* brk(); */}
// BRK
void Excep_BRK(void){ wait(); }

120
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/lowlvl.src
Unescape Escape View File

@ -1,120 +0,0 @@
; Comment out the orginal code
.IF 0
;------------------------------------------------------------------------
; |
; FILE :lowlvl.src |
; DATE :Wed, Jun 16, 2010 |
; DESCRIPTION :Program of Low level |
; CPU TYPE :Other |
; |
; This file is generated by Renesas Project Generator (Ver.4.50). |
; NOTE:THIS IS A TYPICAL EXAMPLE. |
; |
;------------------------------------------------------------------------
.GLB _charput
.GLB _charget
SIM_IO .EQU 0h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
MOV.L #IO_BUF,R2
MOV.B R1,[R2]
MOV.L #1220000h,R1
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
MOV.L #1210000h,R1
MOV.L #IO_BUF,R2
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
MOV.L #IO_BUF,R2
MOVU.B [R2],R1
RTS
;-----------------------------------------------------------------------
; I/O Buffer
;-----------------------------------------------------------------------
.SECTION B,DATA,ALIGN=4
PARM: .BLKL 1
.SECTION B_1,DATA
IO_BUF: .BLKB 1
; .END ; Commented out for conditional assembly
; Code below is for debug console
.ELSE
;-----------------------------------------------------------------------
;
; FILE :lowlvl.src
; DATE :Wed, Jul 01, 2009
; DESCRIPTION :Program of Low level
; CPU TYPE :RX
;
;-----------------------------------------------------------------------
.GLB _charput
.GLB _charget
FC2E0 .EQU 00084080h
FE2C0 .EQU 00084090h
DBGSTAT .EQU 000840C0h
RXFL0EN .EQU 00001000h
TXFL0EN .EQU 00000100h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
.STACK _charput = 00000000h
__C2ESTART: MOV.L #TXFL0EN,R3
MOV.L #DBGSTAT,R4
__TXLOOP: MOV.L [R4],R5
AND R3,R5
BNZ __TXLOOP
__WRITEFC2E0: MOV.L #FC2E0,R2
MOV.L R1,[R2]
__CHARPUTEXIT: RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
.STACK _charget = 00000000h
__E2CSTART: MOV.L #RXFL0EN,R3
MOV.L #DBGSTAT,R4
__RXLOOP: MOV.L [R4],R5
AND R3,R5
BZ __RXLOOP
__READFE2C0: MOV.L #FE2C0,R2
MOV.L [R2],R1
__CHARGETEXIT: RTS
;-----------------------------------------------------------------------
; End of conditional code
.ENDIF
.END

329
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/lowsrc.c
Unescape Escape View File

@ -1,329 +0,0 @@
/***********************************************************************/
/* */
/* FILE :lowsrc.c */
/* DATE :Wed, Jun 16, 2010 */
/* DESCRIPTION :Program of I/O Stream */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : lowsrc.c
*
* Abstract : Program of I/O Stream.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <string.h>
#include <stdio.h>
#include <stddef.h>
#include "lowsrc.h"
/* file number */
#define STDIN 0 /* Standard input (console) */
#define STDOUT 1 /* Standard output (console) */
#define STDERR 2 /* Standard error output (console) */
#define FLMIN 0 /* Minimum file number */
#define _MOPENR 0x1
#define _MOPENW 0x2
#define _MOPENA 0x4
#define _MTRUNC 0x8
#define _MCREAT 0x10
#define _MBIN 0x20
#define _MEXCL 0x40
#define _MALBUF 0x40
#define _MALFIL 0x80
#define _MEOF 0x100
#define _MERR 0x200
#define _MLBF 0x400
#define _MNBF 0x800
#define _MREAD 0x1000
#define _MWRITE 0x2000
#define _MBYTE 0x4000
#define _MWIDE 0x8000
/* File Flags */
#define O_RDONLY 0x0001 /* Read only */
#define O_WRONLY 0x0002 /* Write only */
#define O_RDWR 0x0004 /* Both read and Write */
#define O_CREAT 0x0008 /* A file is created if it is not existed */
#define O_TRUNC 0x0010 /* The file size is changed to 0 if it is existed. */
#define O_APPEND 0x0020 /* The position is set for next reading/writing */
/* 0: Top of the file 1: End of file */
/* Special character code */
#define CR 0x0d /* Carriage return */
#define LF 0x0a /* Line feed */
#if defined( __RX )
const long _nfiles = IOSTREAM; /* The number of files for input/output files */
#else
const int _nfiles = IOSTREAM; /* The number of files for input/output files */
#endif
char flmod[IOSTREAM]; /* The location for the mode of opened file. */
unsigned char sml_buf[IOSTREAM];
#define FPATH_STDIN "C:\\stdin"
#define FPATH_STDOUT "C:\\stdout"
#define FPATH_STDERR "C:\\stderr"
/* H8 Normal mode ,SH and RX */
#if defined( __2000N__ ) || defined( __2600N__ ) || defined( __300HN__ ) || defined( _SH )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
extern char fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* RX */
#elif defined( __RX )
/* Output one character to standard output */
extern void charput(unsigned char);
/* Input one character from standard input */
extern unsigned char charget(void);
/* H8 Advanced mode */
#elif defined( __2000A__ ) || defined( __2600A__ ) || defined( __300HA__ ) || defined( __H8SXN__ ) || defined( __H8SXA__ ) || defined( __H8SXM__ ) || defined( __H8SXX__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* H8300 and H8300L */
#elif defined( __300__ ) || defined( __300L__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
/* Move the file offset */
extern char __regparam3 fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
#endif
#include <stdio.h>
FILE *_Files[IOSTREAM]; // structure for FILE
char *env_list[] = { // Array for environment variables(**environ)
"ENV1=temp01",
"ENV2=temp02",
"ENV9=end",
'\0' // Terminal for environment variables
};
char **environ = env_list;
/****************************************************************************/
/* _INIT_IOLIB */
/* Initialize C library Functions, if necessary. */
/* Define USES_SIMIO on Assembler Option. */
/****************************************************************************/
void _INIT_IOLIB( void )
{
/* A file for standard input/output is opened or created. Each FILE */
/* structure members are initialized by the library. Each _Buf member */
/* in it is re-set the end of buffer pointer. */
/* Standard Input File */
if( freopen( FPATH_STDIN, "r", stdin ) == NULL )
stdin->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdin->_Mode = _MOPENR; /* Read only attribute */
stdin->_Mode |= _MNBF; /* Non-buffering for data */
stdin->_Bend = stdin->_Buf + 1; /* Re-set pointer to the end of buffer */
/* Standard Output File */
if( freopen( FPATH_STDOUT, "w", stdout ) == NULL )
stdout->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdout->_Mode |= _MNBF; /* Non-buffering for data */
stdout->_Bend = stdout->_Buf + 1;/* Re-set pointer to the end of buffer */
/* Standard Error File */
if( freopen( FPATH_STDERR, "w", stderr ) == NULL )
stderr->_Mode = 0xffff; /* Not allow the access if it fails to open */
stderr->_Mode |= _MNBF; /* Non-buffering for data */
stderr->_Bend = stderr->_Buf + 1;/* Re-set pointer to the end of buffer */
}
/****************************************************************************/
/* _CLOSEALL */
/****************************************************************************/
void _CLOSEALL( void )
{
long i;
for( i=0; i < _nfiles; i++ )
{
/* Checks if the file is opened or not */
if( _Files[i]->_Mode & (_MOPENR | _MOPENW | _MOPENA ) )
fclose( _Files[i] ); /* Closes the file */
}
}
/**************************************************************************/
/* open:file open */
/* Return value:File number (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long open(const char *name, /* File name */
long mode, /* Open mode */
long flg) /* Open flag */
#else
int open(char *name, /* File name */
int mode, /* Open mode */
int flg) /* Open flag */
#endif
{
if( strcmp( name, FPATH_STDIN ) == 0 ) /* Standard Input file? */
{
if( ( mode & O_RDONLY ) == 0 ) return -1;
flmod[STDIN] = mode;
return STDIN;
}
else if( strcmp( name, FPATH_STDOUT ) == 0 )/* Standard Output file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDOUT] = mode;
return STDOUT;
}
else if(strcmp(name, FPATH_STDERR ) == 0 ) /* Standard Error file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDERR] = mode;
return STDERR;
}
else return -1; /*Others */
}
#if defined( __RX )
long close( long fileno )
#else
int close( int fileno )
#endif
{
return 1;
}
/**************************************************************************/
/* write:Data write */
/* Return value:Number of write characters (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long write(long fileno, /* File number */
const unsigned char *buf, /* The address of destination buffer */
long count) /* The number of chacter to write */
#else
int write(int fileno, /* File number */
char *buf, /* The address of destination buffer */
int count) /* The number of chacter to write */
#endif
{
long i; /* A variable for counter */
unsigned char c; /* An output character */
/* Checking the mode of file , output each character */
/* Checking the attribute for Write-Only, Read-Only or Read-Write */
if(flmod[fileno]&O_WRONLY || flmod[fileno]&O_RDWR)
{
if( fileno == STDIN ) return -1; /* Standard Input */
else if( (fileno == STDOUT) || (fileno == STDERR) )
/* Standard Error/output */
{
for( i = count; i > 0; --i )
{
c = *buf++;
charput(c);
}
return count; /*Return the number of written characters */
}
else return -1; /* Incorrect file number */
}
else return -1; /* An error */
}
#if defined( __RX )
long read( long fileno, unsigned char *buf, long count )
#else
int read( int fileno, char *buf, unsigned int count )
#endif
{
long i;
/* Checking the file mode with the file number, each character is input and stored the buffer */
if((flmod[fileno]&_MOPENR) || (flmod[fileno]&O_RDWR)){
for(i = count; i > 0; i--){
*buf = charget();
if(*buf==CR){ /* Replace the new line character */
*buf = LF;
}
buf++;
}
return count;
}
else {
return -1;
}
}
#if defined( __RX )
long lseek( long fileno, long offset, long base )
#else
long lseek( int fileno, long offset, int base )
#endif
{
return -1L;
}

142
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/resetprg.c
Unescape Escape View File

@ -1,142 +0,0 @@
/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
/* Types used in this file. */
#include "typedefine.h"
/* Defines machine level functions used in this file */
#include <machine.h>
/* Defines MCU configuration functions used in this file */
#include <_h_c_lib.h>
/* Hardware definitions" */
#include "iodefine.h"
/* Defines the size of the stack which configured in this file */
#include "stacksct.h"
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
extern void HardwareSetup( void );
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
/* It is ok to use stack variables here because "#pragma entry" is used, so the
stack is setup in the compiler generated prologue. */
void PowerON_Reset_PC(void)
{
volatile unsigned int i;
set_intb(__sectop("C$VECT"));
set_fpsw(FPSW_init);
/* MCU boots using the LOCO, so turn the speed up before setting up the C
run-time environment.
Clock Description Frequency
----------------------------------------
Input Clock Frequency............ 12 MHz
PLL frequency (x16).............. 192 MHz
Internal Clock Frequency......... 96 MHz
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
/* PLL wait is 4,194,304 cycles (default) * 192 MHz (12 MHz * 16) = 20.1 ms*/
SYSTEM.PLLWTCR.BYTE = 0x04;
/* x16 @PLL */
SYSTEM.PLLCR.WORD = 0x0F00;
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
nop() ;
}
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
b27:b24 ICK[3:0] 0x01 = System clock: PLL/2 = (192 / 2) = 96 MHz
b23 PSTOP1 0x00 = BCLK pin output is enabled
b19:b16 BCK[3:0] 0x03 = BCLK: PLL/8 = 24 MHz
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
/* Setup IEBUS and USB clocks
SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
/* Initialize C runtime environment */
_INITSCT();
/* Setup the hardware for the RSK. */
HardwareSetup();
nop();
/* Set Ubit and Ibit for PSW. */
set_psw(PSW_init);
/* Call the application code. */
main();
/* Main should not return. */
brk();
}

28
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/sbrk.c
Unescape Escape View File

@ -1,28 +0,0 @@
#include <stddef.h>
#include <stdio.h>
#define HEAPSIZE 0x400
signed char *sbrk( size_t size );
union HEAP_TYPE
{
signed long dummy;
signed char heap[HEAPSIZE];
};
static union HEAP_TYPE heap_area;
/* End address allocated by sbrk */
static signed char *brk = ( signed char * ) &heap_area;
signed char *sbrk( size_t size )
{
signed char *p;
if( brk + size > heap_area.heap + HEAPSIZE )
{
p = ( signed char * ) - 1;
}
else
{
p = brk;
brk += size;
}
return p;
}

64
Demo/RX600_RX63N-RSK_Renesas/RTOSDemo/Renesas-Files/vecttbl.c
Unescape Escape View File

@ -1,64 +0,0 @@
/***********************************************************************/
/* */
/* FILE :vecttbl.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Initialize of Vector Table */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vecttbl.c
*
* Abstract : Initialize of Vector Table.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "vect.h"
#pragma section C FIXEDVECT
void* const Fixed_Vectors[] = {
//;0xffffffd0 Exception(Supervisor Instruction)
(void*) Excep_SuperVisorInst,
//;0xffffffd4 Reserved
Dummy,
//;0xffffffd8 Reserved
Dummy,
//;0xffffffdc Exception(Undefined Instruction)
(void*) Excep_UndefinedInst,
//;0xffffffe0 Reserved
Dummy,
//;0xffffffe4 Exception(Floating Point)
(void*) Excep_FloatingPoint,
//;0xffffffe8 Reserved
Dummy,
//;0xffffffec Reserved
Dummy,
//;0xfffffff0 Reserved
Dummy,
//;0xfffffff4 Reserved
Dummy,
//;0xfffffff8 NMI
(void*) NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
PowerON_Reset_PC
//;<<VECTOR DATA END (POWER ON RESET)>>
};
Write Preview
Loading…
Cancel
Save