diff --git a/FreeRTOS/Source/include/atomic.h b/FreeRTOS/Source/include/atomic.h index b1789a057f..e0d0af3a4f 100644 --- a/FreeRTOS/Source/include/atomic.h +++ b/FreeRTOS/Source/include/atomic.h @@ -29,9 +29,9 @@ * @file atomic.h * @brief FreeRTOS atomic operation support. * - * This file implements atomic by disabling interrupts globally. - * Implementation with architecture specific atomic instructions - * are to be provided under each compiler directory. + * This file implements atomic functions by disabling interrupts globally. + * Implementations with architecture specific atomic instructions can be + * provided under each compiler directory. */ #ifndef ATOMIC_H @@ -48,12 +48,14 @@ extern "C" { #endif -/* Port specific definitions -- entering/exiting critical section. +/* + * Port specific definitions -- entering/exiting critical section. * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h * * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with * ATOMIC_ENTER_CRITICAL(). - * */ + * + */ #if defined( portSET_INTERRUPT_MASK_FROM_ISR ) /* Nested interrupt scheme is supported in this port. */ @@ -71,11 +73,12 @@ extern "C" { #endif /* portSET_INTERRUPT_MASK_FROM_ISR() */ -/* Port specific definition -- "always inline". - * Inline is compiler specific, and may not always get inlined depending on your optimization level. - * Also, inline is considerred as performance optimization for atomic. - * Thus, if portFORCE_INLINE is not provided by portmacro.h, instead of resulting error, - * simply define it. +/* + * Port specific definition -- "always inline". + * Inline is compiler specific, and may not always get inlined depending on your + * optimization level. Also, inline is considered as performance optimization + * for atomic. Thus, if portFORCE_INLINE is not provided by portmacro.h, + * instead of resulting error, simply define it away. */ #ifndef portFORCE_INLINE #define portFORCE_INLINE @@ -91,97 +94,98 @@ extern "C" { * * @brief Performs an atomic compare-and-swap operation on the specified values. * - * @param[in, out] pDestination Pointer to memory location from where value is - * to be loaded and checked. - * @param[in] ulExchange If condition meets, write this value to memory. - * @param[in] ulComparand Swap condition. + * @param[in, out] pulDestination Pointer to memory location from where value is + * to be loaded and checked. + * @param[in] ulExchange If condition meets, write this value to memory. + * @param[in] ulComparand Swap condition. * * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. * - * @note This function only swaps *pDestination with ulExchange, if previous - * *pDestination value equals ulComparand. + * @note This function only swaps *pulDestination with ulExchange, if previous + * *pulDestination value equals ulComparand. */ -static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( - uint32_t volatile * pDestination, - uint32_t ulExchange, - uint32_t ulComparand ) +static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination, + uint32_t ulExchange, + uint32_t ulComparand ) { - - uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; +uint32_t ulReturnValue; ATOMIC_ENTER_CRITICAL(); - - if ( *pDestination == ulComparand ) { - *pDestination = ulExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + if( *pulDestination == ulComparand ) + { + *pulDestination = ulExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + else + { + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + } } - ATOMIC_EXIT_CRITICAL(); return ulReturnValue; - } +/*-----------------------------------------------------------*/ /** * Atomic swap (pointers) * - * @brief Atomically sets the address pointed to by *ppDestination to the value - * of *pExchange. + * @brief Atomically sets the address pointed to by *ppvDestination to the value + * of *pvExchange. * - * @param[in, out] ppDestination Pointer to memory location from where a pointer - * value is to be loaded and written back to. - * @param[in] pExchange Pointer value to be written to *ppDestination. + * @param[in, out] ppvDestination Pointer to memory location from where a pointer + * value is to be loaded and written back to. + * @param[in] pvExchange Pointer value to be written to *ppvDestination. * - * @return The initial value of *ppDestination. + * @return The initial value of *ppvDestination. */ -static portFORCE_INLINE void * Atomic_SwapPointers_p32( - void * volatile * ppDestination, - void * pExchange ) +static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination, + void * pvExchange ) { - void * pReturnValue; +void * pReturnValue; ATOMIC_ENTER_CRITICAL(); - - pReturnValue = *ppDestination; - - *ppDestination = pExchange; - + { + pReturnValue = *ppvDestination; + *ppvDestination = pvExchange; + } ATOMIC_EXIT_CRITICAL(); return pReturnValue; } +/*-----------------------------------------------------------*/ /** * Atomic compare-and-swap (pointers) * * @brief Performs an atomic compare-and-swap operation on the specified pointer - * values. + * values. * - * @param[in, out] ppDestination Pointer to memory location from where a pointer - * value is to be loaded and checked. - * @param[in] pExchange If condition meets, write this value to memory. - * @param[in] pComparand Swap condition. + * @param[in, out] ppvDestination Pointer to memory location from where a pointer + * value is to be loaded and checked. + * @param[in] pvExchange If condition meets, write this value to memory. + * @param[in] pvComparand Swap condition. * * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. * - * @note This function only swaps *ppDestination with pExchange, if previous - * *ppDestination value equals pComparand. + * @note This function only swaps *ppvDestination with pvExchange, if previous + * *ppvDestination value equals pvComparand. */ -static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( - void * volatile * ppDestination, - void * pExchange, void * pComparand ) +static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination, + void * pvExchange, + void * pvComparand ) { - uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; +uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; ATOMIC_ENTER_CRITICAL(); - - if ( *ppDestination == pComparand ) { - *ppDestination = pExchange; - ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + if( *ppvDestination == pvComparand ) + { + *ppvDestination = pvExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } } - ATOMIC_EXIT_CRITICAL(); return ulReturnValue; @@ -195,103 +199,100 @@ static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( * * @brief Atomically adds count to the value of the specified pointer points to. * - * @param[in,out] pAddend Pointer to memory location from where value is to be - * loaded and written back to. - * @param[in] ulCount Value to be added to *pAddend. + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be added to *pulAddend. * - * @return previous *pAddend value. + * @return previous *pulAddend value. */ -static portFORCE_INLINE uint32_t Atomic_Add_u32( - uint32_t volatile * pAddend, - uint32_t ulCount ) +static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend, + uint32_t ulCount ) { uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pAddend; - - *pAddend += ulCount; - + { + ulCurrent = *pulAddend; + *pulAddend += ulCount; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic subtract * * @brief Atomically subtracts count from the value of the specified pointer - * pointers to. + * pointers to. * - * @param[in,out] pAddend Pointer to memory location from where value is to be - * loaded and written back to. - * @param[in] ulCount Value to be subtract from *pAddend. + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be subtract from *pulAddend. * - * @return previous *pAddend value. + * @return previous *pulAddend value. */ -static portFORCE_INLINE uint32_t Atomic_Subtract_u32( - uint32_t volatile * pAddend, - uint32_t ulCount ) +static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend, + uint32_t ulCount ) { uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pAddend; - - *pAddend -= ulCount; - + { + ulCurrent = *pulAddend; + *pulAddend -= ulCount; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic increment * * @brief Atomically increments the value of the specified pointer points to. * - * @param[in,out] pAddend Pointer to memory location from where value is to be - * loaded and written back to. + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. * - * @return *pAddend value before increment. + * @return *pulAddend value before increment. */ -static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pAddend ) +static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pAddend; - - *pAddend += 1; - + { + ulCurrent = *pulAddend; + *pulAddend += 1; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic decrement * * @brief Atomically decrements the value of the specified pointer points to * - * @param[in,out] pAddend Pointer to memory location from where value is to be - * loaded and written back to. + * @param[in,out] pulAddend Pointer to memory location from where value is to be + * loaded and written back to. * - * @return *pAddend value before decrement. + * @return *pulAddend value before decrement. */ -static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pAddend ) +static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pAddend; - - *pAddend -= 1; - + { + ulCurrent = *pulAddend; + *pulAddend -= 1; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; @@ -304,108 +305,103 @@ static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pAdde * * @brief Performs an atomic OR operation on the specified values. * - * @param [in, out] pDestination Pointer to memory location from where value is - * to be loaded and written back to. - * @param [in] ulValue Value to be ORed with *pDestination. + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ORed with *pulDestination. * - * @return The original value of *pDestination. + * @return The original value of *pulDestination. */ -static portFORCE_INLINE uint32_t Atomic_OR_u32( - uint32_t volatile * pDestination, - uint32_t ulValue ) +static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pDestination; - - *pDestination |= ulValue; - + { + ulCurrent = *pulDestination; + *pulDestination |= ulValue; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic AND * * @brief Performs an atomic AND operation on the specified values. * - * @param [in, out] pDestination Pointer to memory location from where value is - * to be loaded and written back to. - * @param [in] ulValue Value to be ANDed with *pDestination. + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ANDed with *pulDestination. * - * @return The original value of *pDestination. + * @return The original value of *pulDestination. */ -static portFORCE_INLINE uint32_t Atomic_AND_u32( - uint32_t volatile * pDestination, - uint32_t ulValue ) +static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pDestination; - - *pDestination &= ulValue; - + { + ulCurrent = *pulDestination; + *pulDestination &= ulValue; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic NAND * * @brief Performs an atomic NAND operation on the specified values. * - * @param [in, out] pDestination Pointer to memory location from where value is - * to be loaded and written back to. - * @param [in] ulValue Value to be NANDed with *pDestination. + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be NANDed with *pulDestination. * - * @return The original value of *pDestination. + * @return The original value of *pulDestination. */ -static portFORCE_INLINE uint32_t Atomic_NAND_u32( - uint32_t volatile * pDestination, - uint32_t ulValue ) +static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pDestination; - - *pDestination = ~(ulCurrent & ulValue); - + { + ulCurrent = *pulDestination; + *pulDestination = ~( ulCurrent & ulValue ); + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; } +/*-----------------------------------------------------------*/ /** * Atomic XOR * * @brief Performs an atomic XOR operation on the specified values. * - * @param [in, out] pDestination Pointer to memory location from where value is - * to be loaded and written back to. - * @param [in] ulValue Value to be XORed with *pDestination. + * @param [in, out] pulDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be XORed with *pulDestination. * - * @return The original value of *pDestination. + * @return The original value of *pulDestination. */ -static portFORCE_INLINE uint32_t Atomic_XOR_u32( - uint32_t volatile * pDestination, - uint32_t ulValue ) +static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination, + uint32_t ulValue ) { - uint32_t ulCurrent; +uint32_t ulCurrent; ATOMIC_ENTER_CRITICAL(); - - ulCurrent = *pDestination; - - *pDestination ^= ulValue; - + { + ulCurrent = *pulDestination; + *pulDestination ^= ulValue; + } ATOMIC_EXIT_CRITICAL(); return ulCurrent; diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S index d6157c4d74..fc1236e467 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S +++ b/FreeRTOS/Source/portable/GCC/RISC-V/portASM.S @@ -172,7 +172,7 @@ handle_asynchronous: li t4, -1 lw t2, 0(t1) /* Load the low word of ullNextTime into t2. */ lw t3, 4(t1) /* Load the high word of ullNextTime into t3. */ - sw t4, 0(t0) /* Low word no smaller than old value to start with - will be overwritten below. */ + sw t4, 0(t0) /* Low word no smaller than old value. */ sw t3, 4(t0) /* Store high word of ullNextTime into compare register. No smaller than new value. */ sw t2, 0(t0) /* Store low word of ullNextTime into compare register. */ lw t0, uxTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */ @@ -402,7 +402,7 @@ xPortStartFirstTask: pxPortInitialiseStack: csrr t0, mstatus /* Obtain current mstatus value. */ - addi t1, x0, 0x188 /* Generate the value 0x1888, which are the MIE, MPIE and privilege bits to set in mstatus. */ + addi t1, x0, 0x188 /* Generate the value 0x1880, which are the MPIE and MPP bits to set in mstatus. */ slli t1, t1, 4 or t0, t0, t1 /* Set MPIE and MPP bits in mstatus value. */ diff --git a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h index 6f79672aa0..8e185d6f68 100644 --- a/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h +++ b/FreeRTOS/Source/portable/GCC/RISC-V/portmacro.h @@ -65,6 +65,13 @@ typedef portBASE_TYPE BaseType_t; typedef portUBASE_TYPE UBaseType_t; typedef portUBASE_TYPE TickType_t; +/* Legacy type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short + /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do not need to be guarded with a critical section. */ #define portTICK_TYPE_IS_ATOMIC 1 diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/port.c b/FreeRTOS/Source/portable/IAR/RISC-V/port.c index 8c59aef2ff..dd32a8e50e 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/port.c +++ b/FreeRTOS/Source/portable/IAR/RISC-V/port.c @@ -152,6 +152,12 @@ extern void xPortStartFirstTask( void ); stack that was being used by main() prior to the scheduler being started. */ configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 ); + + #ifdef configISR_STACK_SIZE_WORDS + { + memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) ); + } + #endif /* configISR_STACK_SIZE_WORDS */ } #endif /* configASSERT_DEFINED */ diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s index 84cf6c950d..c4082c7b3c 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s +++ b/FreeRTOS/Source/portable/IAR/RISC-V/portASM.s @@ -180,7 +180,7 @@ handle_asynchronous: li t4, -1 lw t2, 0(t1) /* Load the low word of ullNextTime into t2. */ lw t3, 4(t1) /* Load the high word of ullNextTime into t3. */ - sw t4, 0(t0) /* Low word no smaller than old value. */ + sw t4, 0(t0) /* Low word no smaller than old value to start with - will be overwritten below. */ sw t3, 4(t0) /* Store high word of ullNextTime into compare register. No smaller than new value. */ sw t2, 0(t0) /* Store low word of ullNextTime into compare register. */ lw t0, uxTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */ @@ -304,6 +304,7 @@ xPortStartFirstTask: portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */ load_x t0, 29 * portWORD_SIZE( sp ) /* mstatus */ + addi t0, t0, 0x08 /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */ csrrw x0, CSR_MSTATUS, t0 /* Interrupts enabled from here! */ load_x x5, 2 * portWORD_SIZE( sp ) /* t0 */ diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h b/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h index c2a15ddbfb..4fbaeb5fb0 100644 --- a/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RISC-V/portmacro.h @@ -67,6 +67,13 @@ typedef portBASE_TYPE BaseType_t; typedef portUBASE_TYPE UBaseType_t; typedef portUBASE_TYPE TickType_t; +/* Legacy type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short + /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do not need to be guarded with a critical section. */ #define portTICK_TYPE_IS_ATOMIC 1 diff --git a/FreeRTOS/Source/tasks.c b/FreeRTOS/Source/tasks.c index dfff3ec5ef..c5b2256817 100644 --- a/FreeRTOS/Source/tasks.c +++ b/FreeRTOS/Source/tasks.c @@ -300,7 +300,10 @@ typedef struct tskTaskControlBlock /* The old naming convention is used to pr responsible for resulting newlib operation. User must be familiar with newlib and must provide system-wide implementations of the necessary stubs. Be warned that (at the time of writing) the current newlib design - implements a system-wide malloc() that must be provided with locks. */ + implements a system-wide malloc() that must be provided with locks. + + See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html + for additional information. */ struct _reent xNewLib_reent; #endif @@ -993,7 +996,9 @@ UBaseType_t x; #if ( configUSE_NEWLIB_REENTRANT == 1 ) { - /* Initialise this task's Newlib reent structure. */ + /* Initialise this task's Newlib reent structure. + See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html + for additional information. */ _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) ); } #endif @@ -1218,12 +1223,12 @@ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) else { --uxCurrentNumberOfTasks; + traceTASK_DELETE( pxTCB ); prvDeleteTCB( pxTCB ); /* Reset the next expected unblock time in case it referred to the task that has just been deleted. */ prvResetNextTaskUnblockTime(); - traceTASK_DELETE( pxTCB ); } } taskEXIT_CRITICAL(); @@ -2044,7 +2049,9 @@ BaseType_t xReturn; #if ( configUSE_NEWLIB_REENTRANT == 1 ) { /* Switch Newlib's _impure_ptr variable to point to the _reent - structure specific to the task that will run first. */ + structure specific to the task that will run first. + See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html + for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ @@ -2846,6 +2853,19 @@ BaseType_t xSwitchRequired = pdFALSE; } } #endif /* configUSE_TICK_HOOK */ + + #if ( configUSE_PREEMPTION == 1 ) + { + if( xYieldPending != pdFALSE ) + { + xSwitchRequired = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_PREEMPTION */ } else { @@ -2860,19 +2880,6 @@ BaseType_t xSwitchRequired = pdFALSE; #endif } - #if ( configUSE_PREEMPTION == 1 ) - { - if( xYieldPending != pdFALSE ) - { - xSwitchRequired = pdTRUE; - } - else - { - mtCOVERAGE_TEST_MARKER(); - } - } - #endif /* configUSE_PREEMPTION */ - return xSwitchRequired; } /*-----------------------------------------------------------*/ @@ -3052,7 +3059,9 @@ void vTaskSwitchContext( void ) #if ( configUSE_NEWLIB_REENTRANT == 1 ) { /* Switch Newlib's _impure_ptr variable to point to the _reent - structure specific to this task. */ + structure specific to this task. + See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html + for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ @@ -3874,7 +3883,9 @@ static void prvCheckTasksWaitingTermination( void ) portCLEAN_UP_TCB( pxTCB ); /* Free up the memory allocated by the scheduler for the task. It is up - to the task to free any memory allocated at the application level. */ + to the task to free any memory allocated at the application level. + See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html + for additional information. */ #if ( configUSE_NEWLIB_REENTRANT == 1 ) { _reclaim_reent( &( pxTCB->xNewLib_reent ) );