Remove unused project.
parent
1398ff5f3b
commit
12e207f913
@ -1,146 +0,0 @@
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@ -1,146 +0,0 @@
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@ -1,45 +0,0 @@
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@ -1,265 +0,0 @@
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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Watch Variable6=[xRxedChars],92040000,1,-1 -1
|
||||
Watch Variable7=[xCharsForTx],92040000,1,-1 -1
|
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Watch Variable8=[xBigQueue],10080000,1,-1 -1
|
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Watch Variable9=[SSR0],A0070000,1,-1 -1
|
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Watch Variable10=[TMCSR0],A0070000,1,-1 -1
|
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SymbolSize=0 0 420 128
|
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|
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Watch Variable11=[cChar],10080000,1,-1 -1
|
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Watch Variable12=[xTaskCheck],10010000,1,-1 -1
|
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Watch Variable13=[xPolledQueue],10080000,1,-1 -1
|
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Watch Variable14=[BGR2],A0070000,1,-1 -1
|
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Layer6=2000,Src\watchdog\watchdog.c
|
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|
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Layer8=2000,Src\port\portmacro.h
|
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Layer9=2000,Src\vectors.c
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|
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Layer11=2000,Src\FreeRTOSConfig.h
|
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Layer12=2000,Src\port\port.c
|
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Layer13=2000,Src\Start.asm
|
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|
||||
Layer3=1005,
|
||||
Layer4=2000,Src\taskutility.c
|
||||
Register Select0=H'00000000
|
||||
Register Select1=H'00000003
|
||||
Register Select2=H'00000004
|
||||
Register Select3=H'00000005
|
||||
Register Select4=H'00000006
|
||||
Register Select5=H'00000007
|
||||
Register Select6=H'00000008
|
||||
Register Select7=H'00000010
|
||||
Register Select8=H'00000011
|
||||
Register Select9=H'00000012
|
||||
Register Select10=H'00000013
|
||||
Register Select11=H'00000014
|
||||
Register Select12=H'00000015
|
||||
Register Select13=H'00000016
|
||||
Register Select14=H'00000017
|
||||
Register Select15=H'00000018
|
||||
Register Select16=H'00000022
|
||||
Register Select17=H'00000023
|
||||
Register Select18=H'00000024
|
||||
Register Select19=H'00000025
|
||||
Register Select20=H'00000026
|
||||
Register Select21=H'00000027
|
||||
Register Select22=H'00000028
|
||||
Register Select23=H'00000029
|
||||
Register Select24=H'00000035
|
||||
Source0Name=Src\Main.c
|
||||
Source0Size=0 0 491 287
|
||||
Source0State=0
|
||||
Source0Line=DA
|
||||
Source0Mode=2
|
||||
Source1Name=Src\port\port.c
|
||||
Source1Size=22 22 828 421
|
||||
Source1State=0
|
||||
Source1Line=2E
|
||||
Source1Mode=2
|
||||
Watch Variable0=[usCriticalNesting],00080000,1,-1 -1
|
||||
Watch Variable1=[pxCurrentTCB],92040000,1,-1 -1
|
||||
Watch Variable2=[pxNewTCB],00080000,1,-1 -1
|
||||
TraceSize=244 196 977 510
|
||||
TraceState=0
|
||||
Watch Variable3=[maindata],10080000,1,-1 -1
|
||||
Watch Variable4=[pxReadyTasksLists],10010000,1,-1 -1
|
||||
Layer5=2000,src\os\tasks.c
|
||||
Watch Variable5=[queueFail],91030000,1,-1 -1
|
||||
Watch Variable6=[xRxedChars],92040000,1,-1 -1
|
||||
Watch Variable7=[xCharsForTx],92040000,1,-1 -1
|
||||
Watch Variable8=[xBigQueue],10080000,1,-1 -1
|
||||
Watch Variable9=[SSR0],A0070000,1,-1 -1
|
||||
Watch Variable10=[TMCSR0],A0070000,1,-1 -1
|
||||
SymbolSize=0 0 420 128
|
||||
SymbolState=0
|
||||
Watch Variable11=[cChar],10080000,1,-1 -1
|
||||
Watch Variable12=[xTaskCheck],10010000,1,-1 -1
|
||||
Watch Variable13=[xPolledQueue],10080000,1,-1 -1
|
||||
Watch Variable14=[BGR2],A0070000,1,-1 -1
|
||||
Layer6=2000,Src\watchdog\watchdog.c
|
||||
Layer7=2000,Src\watchdog\watchdog.h
|
||||
Layer8=2000,Src\port\portmacro.h
|
||||
Layer9=2000,Src\vectors.c
|
||||
Layer10=2000,Src\__STD_LIB_sbrk.c
|
||||
Layer11=2000,Src\FreeRTOSConfig.h
|
||||
Layer12=2000,Src\port\port.c
|
||||
Layer13=2000,Src\Start.asm
|
||||
Layer14=2000,Src\Main.c
|
||||
Source2Name=src\os\tasks.c
|
||||
Source2Size=66 66 872 465
|
||||
Source2State=0
|
||||
Source2Line=480
|
||||
Source2Mode=2
|
||||
Source3Name=Src\Start.asm
|
||||
Source3Size=88 88 894 487
|
||||
Source3State=0
|
||||
Source3Line=40F
|
||||
Source3Mode=2
|
||||
Source4Name=Src\watchdog\watchdog.h
|
||||
Source4Size=132 132 938 531
|
||||
Source4State=0
|
||||
Source4Line=2E
|
||||
Source4Mode=2
|
||||
Source5Name=Src\watchdog\watchdog.c
|
||||
Source5Size=154 154 960 553
|
||||
Source5State=0
|
||||
Source5Line=1
|
||||
Source5Mode=2
|
||||
Source6Name=Src\taskutility.c
|
||||
Source6Size=176 176 986 579
|
||||
Source6State=0
|
||||
Source6Line=64
|
||||
Source6Mode=2
|
||||
Source7Name=Src\port\portmacro.h
|
||||
Source7Size=22 22 832 425
|
||||
Source7State=0
|
||||
Source7Line=46
|
||||
Source7Mode=2
|
||||
Source8Name=Src\vectors.c
|
||||
Source8Size=44 44 854 447
|
||||
Source8State=0
|
||||
Source8Line=1
|
||||
Source8Mode=2
|
||||
Source9Name=Src\__STD_LIB_sbrk.c
|
||||
Source9Size=66 66 876 469
|
||||
Source9State=0
|
||||
Source9Line=1
|
||||
Source9Mode=2
|
||||
Layer15=1002,
|
||||
Source10Name=Src\FreeRTOSConfig.h
|
||||
Source10Size=110 110 920 513
|
||||
Source10State=0
|
||||
Source10Line=22
|
||||
Source10Mode=2
|
||||
Watch Variable15=[sState],90030000,1,-1 -1
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
Source=
|
||||
[Map]
|
||||
Flag=Enable
|
||||
Undef=On
|
||||
Inrom Access=Off
|
||||
Inrom=Off
|
||||
Inrom Image=On
|
||||
Area0=00000180 0000037F 7 1 0
|
||||
Area1=00002240 00007FFF 7 1 0
|
||||
Area2=00000000 000000EF 3 1 0
|
||||
Area3=00000100 0000017F 3 1 0
|
||||
Area4=00000380 00000BFF 3 1 0
|
||||
GuardArea0=00010000 000FDFFF 7
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
Mode=10
|
||||
Source=1
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
Size=0
|
||||
Mode=0
|
||||
MBuf=0
|
||||
Check=1
|
||||
CSiz=100
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
GoIntMask=0
|
||||
StepUnit=3
|
||||
StepIntMask=0
|
||||
StepIntpCtrl=4
|
||||
GoTrcCtrl=2
|
||||
OnTheFlyBreakAdmit=0
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
Data MB21981=0000247C 00FFFFFF 0 2 1 1 1 1 000000DE 0000FFFF
|
||||
DataBreakFlag1=Enable
|
||||
Data MB21982=00002538 00FFFFFF 0 2 1 1 1 1 000000DE 0000FFFF
|
||||
DataBreakFlag2=Enable
|
||||
Code MB21986=00DE2616 00FFFFFF 1 0 1 flash.c$98
|
||||
CodeBreakFlag6=Enable
|
||||
Code MB21987=00DE261E 00FFFFFF 1 0 1 flash.c$110
|
||||
CodeBreakFlag7=Enable
|
||||
Code MB21988=00DE2633 00FFFFFF 1 0 1 flash.c$125
|
||||
CodeBreakFlag8=Enable
|
||||
Code MB21989=00DE2650 00FFFFFF 1 0 1 flash.c$138
|
||||
CodeBreakFlag9=Enable
|
||||
Code MB21980=00DE00D4 00FFFFFF 1 0 1
|
||||
CodeBreakFlag0=Enable
|
||||
Debug File=C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs\96340_FreeRTOS_96348hs\ABS\96340_FreeRTOS_96348hs.abs
|
||||
Code MB21981=00F8016E 00FFFFFF 1 0 1 main.c$223
|
||||
CodeBreakFlag1=Enable
|
||||
Code MB21983=00F801A8 00FFFFFF 1 0 1 \vParTestSetLED
|
||||
CodeBreakFlag3=Enable
|
||||
[Emulation Environment]
|
||||
Flag=Enable
|
||||
RunMode=0
|
||||
Verify=1
|
||||
EventMode=0
|
||||
Limit Volt MB2198=5.75 2.5
|
||||
WatchDoc=0
|
||||
Resource=0
|
||||
External Pin=0
|
||||
DefaultBreak=0
|
||||
DebugArea1=12D714 2AB11CC 27874 1234724 0
|
||||
DebugArea2=0 B65720 11154784 1237400 0
|
||||
ParallelPort=-1 0
|
||||
Performance Break=2
|
||||
Coverage Status=0
|
||||
Frequency=40
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
MemoryWindow=0
|
||||
WatchWindow=1
|
||||
ObjectWindow=0
|
||||
ElapseTime=3E8
|
||||
Unit=1
|
||||
Mode=0
|
||||
RealtimeMemoryWindow=0
|
||||
[Error]
|
||||
Flag=Enable
|
||||
GuiErrorOutput=2
|
||||
CommandErrorOutput=1
|
||||
BatchErrorOutput=1
|
||||
ErrorOutputLevel=0
|
||||
[Color]
|
||||
Flag=Enable
|
||||
[Tab Environment]
|
||||
TabSize=8
|
||||
[Communication]
|
||||
Send=63992
|
||||
Receive=32000
|
||||
[Trace Environment]
|
||||
Trace Break=0
|
||||
Trace Status=1
|
||||
Trace StartPosition=1
|
||||
Trace BufferfulStop=0
|
||||
Trace Instruction=1
|
||||
Trace Verbose=0
|
||||
Trace DataArea1=1 00000000 00FFFFFF 7
|
||||
Trace DataArea2=2 00000000 FFFFFFFF 0
|
@ -1,146 +0,0 @@
|
||||
[Information]
|
||||
DebChangeFlag=0
|
||||
MCUChangeFlag=1
|
||||
[Version]
|
||||
Version=1
|
||||
Level=1
|
||||
Revision=0
|
||||
[Debug Type]
|
||||
Type=0
|
||||
Virtual CPU File=wv907e4.dll
|
||||
Core ID=0
|
||||
Monitor Load=1
|
||||
Monitor Load Condition=Enable
|
||||
Mode=FFFFFFFF
|
||||
[Device]
|
||||
Communication=RS COM1 115200
|
||||
ProductID=0
|
||||
Protocol=3
|
||||
[Target]
|
||||
AutoLoad=Enable
|
||||
Before Batch File=
|
||||
After Batch File=
|
||||
Non AutoMap=Disable
|
||||
Load DebInfo Only=Disable
|
||||
Ondemand Load Condition=Disable
|
||||
[Start]
|
||||
Batch File=
|
||||
[Window]
|
||||
Flag=Enable
|
||||
AssemblySize=0 0 0 0
|
||||
AssemblyState=0
|
||||
AssemblyFGColor=0 0 255
|
||||
RegisterSize=0 0 0 0
|
||||
RegisterState=0
|
||||
MemorySize=0 0 0 0
|
||||
MemoryState=0
|
||||
CommandSize=0 0 0 0
|
||||
CommandState=0
|
||||
Assembly Address=H'000000
|
||||
Memory Address=H'000000
|
||||
Memory Mode=H'FFFFFFFF
|
||||
Memory Ascii=H'00000001
|
||||
Memory SplitRow=0
|
||||
RMemory Address=H'000000
|
||||
RMemory Mode=H'FFFFFFFF
|
||||
RMemory Ascii=H'00000001
|
||||
RMemory SplitRow=0
|
||||
Trace ViewMode=FFFFFFFF
|
||||
Command Max History=H'00000032
|
||||
Source Display Mode=Enable
|
||||
Source Multi Mode=Enable
|
||||
Source Ask Mode=Enable
|
||||
Source Active Mode=Enable
|
||||
Source PC Color=255 255 0
|
||||
Source Scope Color=255 0 255
|
||||
Source Back Trace=255 0 255
|
||||
Register Change Color=255 0 0
|
||||
Perfomance Mode=H'00000001
|
||||
Perfomance Scale=1 0 0.000000 0.000000
|
||||
Coverage Address=H'000000
|
||||
Coverage Type=H'00000000
|
||||
Coverage SplitRow=0
|
||||
RMemory Change Color=255 0 0
|
||||
RMemory Invalid Color=128 128 128
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
Source=
|
||||
[Map]
|
||||
Flag=Enable
|
||||
Undef=On
|
||||
Inrom Access=Off
|
||||
Inrom=Off
|
||||
Inrom Image=On
|
||||
Area0=00000180 0000037F 7 1 0
|
||||
Area1=00002240 00007FFF 7 1 0
|
||||
Area2=00000000 000000EF 3 1 0
|
||||
Area3=00000100 0000017F 3 1 0
|
||||
Area4=00000380 00000BFF 3 1 0
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
Mode=10
|
||||
Source=1
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
Size=0
|
||||
Mode=0
|
||||
MBuf=0
|
||||
Check=1
|
||||
CSiz=100
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
GoIntMask=0
|
||||
StepUnit=3
|
||||
StepIntMask=0
|
||||
StepIntpCtrl=4
|
||||
GoTrcCtrl=2
|
||||
OnTheFlyBreakAdmit=0
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
[Emulation Environment]
|
||||
Flag=Enable
|
||||
RunMode=0
|
||||
Verify=1
|
||||
EventMode=0
|
||||
Limit Volt MB2198=5.75 2.5
|
||||
WatchDoc=0
|
||||
Resource=0
|
||||
External Pin=0
|
||||
DefaultBreak=0
|
||||
DebugArea1=105 34A066E 49356 1234724 0
|
||||
DebugArea2=0 326508 13702376 1237400 0
|
||||
ParallelPort=-1 0
|
||||
Performance Break=2
|
||||
Coverage Status=0
|
||||
Frequency=40
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
MemoryWindow=0
|
||||
WatchWindow=0
|
||||
ObjectWindow=0
|
||||
ElapseTime=3E8
|
||||
Unit=1
|
||||
Mode=0
|
||||
RealtimeMemoryWindow=0
|
||||
[Error]
|
||||
Flag=Enable
|
||||
GuiErrorOutput=2
|
||||
CommandErrorOutput=1
|
||||
BatchErrorOutput=1
|
||||
ErrorOutputLevel=0
|
||||
[Color]
|
||||
Flag=Enable
|
||||
[Tab Environment]
|
||||
TabSize=8
|
||||
[Communication]
|
||||
Send=1000
|
||||
Receive=800
|
||||
[Trace Environment]
|
||||
Trace Break=0
|
||||
Trace Status=1
|
||||
Trace StartPosition=1
|
||||
Trace BufferfulStop=0
|
||||
Trace Instruction=1
|
||||
Trace Verbose=0
|
||||
Trace DataArea1=1 00000000 FFFFFFFF 7
|
||||
Trace DataArea2=2 00000000 FFFFFFFF 0
|
@ -1,146 +0,0 @@
|
||||
[Information]
|
||||
DebChangeFlag=0
|
||||
MCUChangeFlag=1
|
||||
[Version]
|
||||
Version=1
|
||||
Level=1
|
||||
Revision=0
|
||||
[Debug Type]
|
||||
Type=0
|
||||
Virtual CPU File=wv907e4.dll
|
||||
Core ID=0
|
||||
Monitor Load=1
|
||||
Monitor Load Condition=Enable
|
||||
Mode=FFFFFFFF
|
||||
[Device]
|
||||
Communication=RS COM2 115200
|
||||
ProductID=2002
|
||||
Protocol=3
|
||||
[Target]
|
||||
AutoLoad=Enable
|
||||
Before Batch File=
|
||||
After Batch File=
|
||||
Non AutoMap=Disable
|
||||
Load DebInfo Only=Disable
|
||||
Ondemand Load Condition=Disable
|
||||
[Start]
|
||||
Batch File=
|
||||
[Window]
|
||||
Flag=Enable
|
||||
AssemblySize=0 0 0 0
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||||
AssemblyState=0
|
||||
AssemblyFGColor=0 0 255
|
||||
RegisterSize=0 0 0 0
|
||||
RegisterState=0
|
||||
MemorySize=0 0 0 0
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||||
MemoryState=0
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||||
CommandSize=0 0 0 0
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||||
CommandState=0
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||||
Assembly Address=H'000000
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||||
Memory Address=H'000000
|
||||
Memory Mode=H'FFFFFFFF
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||||
Memory Ascii=H'00000001
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||||
Memory SplitRow=0
|
||||
RMemory Address=H'000000
|
||||
RMemory Mode=H'FFFFFFFF
|
||||
RMemory Ascii=H'00000001
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||||
RMemory SplitRow=0
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||||
Trace ViewMode=FFFFFFFF
|
||||
Command Max History=H'00000032
|
||||
Source Display Mode=Enable
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||||
Source Multi Mode=Enable
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||||
Source Ask Mode=Enable
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||||
Source Active Mode=Enable
|
||||
Source PC Color=255 255 0
|
||||
Source Scope Color=255 0 255
|
||||
Source Back Trace=255 0 255
|
||||
Register Change Color=255 0 0
|
||||
Perfomance Mode=H'00000001
|
||||
Perfomance Scale=1 0 0.000000 0.000000
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||||
Coverage Address=H'000000
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||||
Coverage Type=H'00000000
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||||
Coverage SplitRow=0
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||||
RMemory Change Color=255 0 0
|
||||
RMemory Invalid Color=128 128 128
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
Source=
|
||||
[Map]
|
||||
Flag=Enable
|
||||
Undef=On
|
||||
Inrom Access=Off
|
||||
Inrom=Off
|
||||
Inrom Image=On
|
||||
Area0=00000180 0000037F 7 1 0
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||||
Area1=00002240 00007FFF 7 1 0
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||||
Area2=00000000 000000EF 3 1 0
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||||
Area3=00000100 0000017F 3 1 0
|
||||
Area4=00000380 00000BFF 3 1 0
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
Mode=10
|
||||
Source=1
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
Size=0
|
||||
Mode=0
|
||||
MBuf=0
|
||||
Check=1
|
||||
CSiz=100
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
GoIntMask=0
|
||||
StepUnit=3
|
||||
StepIntMask=0
|
||||
StepIntpCtrl=4
|
||||
GoTrcCtrl=2
|
||||
OnTheFlyBreakAdmit=0
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
[Emulation Environment]
|
||||
Flag=Enable
|
||||
RunMode=0
|
||||
Verify=1
|
||||
EventMode=0
|
||||
Limit Volt MB2198=5.75 2.5
|
||||
WatchDoc=0
|
||||
Resource=0
|
||||
External Pin=0
|
||||
DefaultBreak=0
|
||||
DebugArea1=105 34A0671 49356 1234724 0
|
||||
DebugArea2=0 326358 13702376 1237400 0
|
||||
ParallelPort=-1 0
|
||||
Performance Break=2
|
||||
Coverage Status=0
|
||||
Frequency=40
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
MemoryWindow=0
|
||||
WatchWindow=0
|
||||
ObjectWindow=0
|
||||
ElapseTime=3E8
|
||||
Unit=1
|
||||
Mode=0
|
||||
RealtimeMemoryWindow=0
|
||||
[Error]
|
||||
Flag=Enable
|
||||
GuiErrorOutput=2
|
||||
CommandErrorOutput=1
|
||||
BatchErrorOutput=1
|
||||
ErrorOutputLevel=0
|
||||
[Color]
|
||||
Flag=Enable
|
||||
[Tab Environment]
|
||||
TabSize=8
|
||||
[Communication]
|
||||
Send=1000
|
||||
Receive=800
|
||||
[Trace Environment]
|
||||
Trace Break=0
|
||||
Trace Status=1
|
||||
Trace StartPosition=1
|
||||
Trace BufferfulStop=0
|
||||
Trace Instruction=1
|
||||
Trace Verbose=0
|
||||
Trace DataArea1=1 00000000 FFFFFFFF 7
|
||||
Trace DataArea2=2 00000000 FFFFFFFF 0
|
@ -1,45 +0,0 @@
|
||||
[Information]
|
||||
DebChangeFlag=1
|
||||
MCUChangeFlag=1
|
||||
[Version]
|
||||
Version=1
|
||||
Level=1
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||||
Revision=0
|
||||
[Debug Type]
|
||||
Type=0
|
||||
Virtual CPU File=wv907e4.dll
|
||||
Core ID=0
|
||||
Monitor Load=1
|
||||
Monitor Load Condition=Enable
|
||||
[Device]
|
||||
Communication=LAN 127.0.0.1
|
||||
ProductID=0
|
||||
Protocol=3
|
||||
[Target]
|
||||
AutoLoad=Enable
|
||||
Before Batch File=
|
||||
After Batch File=
|
||||
[Start]
|
||||
Batch File=
|
||||
[Window]
|
||||
Flag=Enable
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
[Map]
|
||||
Flag=Enable
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
[Emulation Environment]
|
||||
Flag=Enable
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
[Error]
|
||||
Flag=Enable
|
||||
[Color]
|
||||
Flag=Enable
|
@ -1,286 +0,0 @@
|
||||
[Information]
|
||||
DebChangeFlag=0
|
||||
MCUChangeFlag=0
|
||||
[Version]
|
||||
Version=1
|
||||
Level=1
|
||||
Revision=0
|
||||
[Debug Type]
|
||||
Type=0
|
||||
Virtual CPU File=wv907e4.dll
|
||||
Core ID=0
|
||||
Monitor Load=1
|
||||
Monitor Load Condition=Enable
|
||||
Mode=FFFF
|
||||
[Device]
|
||||
Communication=USB
|
||||
ProductID=2002
|
||||
Protocol=3
|
||||
[Target]
|
||||
AutoLoad=Enable
|
||||
Before Batch File=
|
||||
After Batch File=
|
||||
Non AutoMap=Disable
|
||||
Load DebInfo Only=Disable
|
||||
Ondemand Load Condition=Disable
|
||||
[Start]
|
||||
Batch File=
|
||||
[Window]
|
||||
Flag=Enable
|
||||
AssemblySize=0 392 493 588
|
||||
AssemblyState=2
|
||||
AssemblyFGColor=0 0 255
|
||||
RegisterSize=491 191 982 382
|
||||
RegisterState=0
|
||||
MemorySize=491 382 982 573
|
||||
MemoryState=0
|
||||
CommandSize=0 0 0 0
|
||||
CommandState=0
|
||||
Assembly Address=H'F852F5
|
||||
Memory Address=H'F80198
|
||||
Memory Mode=H'00000001
|
||||
Memory Ascii=H'00000001
|
||||
Memory SplitRow=0
|
||||
RMemory Address=H'000000
|
||||
RMemory Mode=H'FFFFFFFF
|
||||
RMemory Ascii=H'00000001
|
||||
RMemory SplitRow=0
|
||||
Trace ViewMode=1
|
||||
Command Max History=H'00000032
|
||||
Source Display Mode=Enable
|
||||
Source Multi Mode=Enable
|
||||
Source Ask Mode=Enable
|
||||
Source Active Mode=Enable
|
||||
Source PC Color=255 255 0
|
||||
Source Scope Color=255 0 255
|
||||
Source Back Trace=255 0 255
|
||||
Register Change Color=255 0 0
|
||||
Perfomance Mode=H'00000001
|
||||
Perfomance Scale=1 0 0.000000 0.000000
|
||||
Coverage Address=H'000000
|
||||
Coverage Type=H'00000000
|
||||
Coverage SplitRow=0
|
||||
RMemory Change Color=255 0 0
|
||||
RMemory Invalid Color=128 128 128
|
||||
LocalSize=491 0 982 191
|
||||
LocalState=0
|
||||
WatchSize=0 287 491 574
|
||||
WatchState=0
|
||||
Layer0=1004,
|
||||
Layer1=1006,
|
||||
Layer2=1003,
|
||||
Layer3=1005,
|
||||
Layer4=2000,Src\taskutility.c
|
||||
Register Select0=H'00000000
|
||||
Register Select1=H'00000003
|
||||
Register Select2=H'00000004
|
||||
Register Select3=H'00000005
|
||||
Register Select4=H'00000006
|
||||
Register Select5=H'00000007
|
||||
Register Select6=H'00000008
|
||||
Register Select7=H'00000010
|
||||
Register Select8=H'00000011
|
||||
Register Select9=H'00000012
|
||||
Register Select10=H'00000013
|
||||
Register Select11=H'00000014
|
||||
Register Select12=H'00000015
|
||||
Register Select13=H'00000016
|
||||
Register Select14=H'00000017
|
||||
Register Select15=H'00000018
|
||||
Register Select16=H'00000022
|
||||
Register Select17=H'00000023
|
||||
Register Select18=H'00000024
|
||||
Register Select19=H'00000025
|
||||
Register Select20=H'00000026
|
||||
Register Select21=H'00000027
|
||||
Register Select22=H'00000028
|
||||
Register Select23=H'00000029
|
||||
Register Select24=H'00000035
|
||||
Source0Name=Src\Main.c
|
||||
Source0Size=0 0 491 287
|
||||
Source0State=0
|
||||
Source0Line=DA
|
||||
Source0Mode=2
|
||||
Source1Name=Src\port\port.c
|
||||
Source1Size=22 22 828 421
|
||||
Source1State=0
|
||||
Source1Line=2E
|
||||
Source1Mode=2
|
||||
Watch Variable0=[usCriticalNesting],00080000,1,-1 -1
|
||||
Watch Variable1=[pxCurrentTCB],92040000,1,-1 -1
|
||||
Watch Variable2=[pxNewTCB],00080000,1,-1 -1
|
||||
TraceSize=244 196 977 510
|
||||
TraceState=0
|
||||
Watch Variable3=[maindata],10080000,1,-1 -1
|
||||
Watch Variable4=[pxReadyTasksLists],10010000,1,-1 -1
|
||||
Layer5=2000,src\os\tasks.c
|
||||
Watch Variable5=[queueFail],91030000,1,-1 -1
|
||||
Watch Variable6=[xRxedChars],92040000,1,-1 -1
|
||||
Watch Variable7=[xCharsForTx],92040000,1,-1 -1
|
||||
Watch Variable8=[xBigQueue],10080000,1,-1 -1
|
||||
Watch Variable9=[SSR0],A0070000,1,-1 -1
|
||||
Watch Variable10=[TMCSR0],A0070000,1,-1 -1
|
||||
SymbolSize=0 0 420 128
|
||||
SymbolState=0
|
||||
Watch Variable11=[cChar],10080000,1,-1 -1
|
||||
Watch Variable12=[xTaskCheck],10010000,1,-1 -1
|
||||
Watch Variable13=[xPolledQueue],10080000,1,-1 -1
|
||||
Watch Variable14=[BGR2],A0070000,1,-1 -1
|
||||
Layer6=2000,Src\watchdog\watchdog.c
|
||||
Layer7=2000,Src\watchdog\watchdog.h
|
||||
Layer8=2000,Src\port\portmacro.h
|
||||
Layer9=2000,Src\vectors.c
|
||||
Layer10=2000,Src\__STD_LIB_sbrk.c
|
||||
Layer11=2000,Src\FreeRTOSConfig.h
|
||||
Layer12=2000,Src\port\port.c
|
||||
Layer13=2000,Src\Start.asm
|
||||
Layer14=2000,Src\Main.c
|
||||
Source2Name=src\os\tasks.c
|
||||
Source2Size=66 66 872 465
|
||||
Source2State=0
|
||||
Source2Line=480
|
||||
Source2Mode=2
|
||||
Source3Name=Src\Start.asm
|
||||
Source3Size=88 88 894 487
|
||||
Source3State=0
|
||||
Source3Line=40F
|
||||
Source3Mode=2
|
||||
Source4Name=Src\watchdog\watchdog.h
|
||||
Source4Size=132 132 938 531
|
||||
Source4State=0
|
||||
Source4Line=2E
|
||||
Source4Mode=2
|
||||
Source5Name=Src\watchdog\watchdog.c
|
||||
Source5Size=154 154 960 553
|
||||
Source5State=0
|
||||
Source5Line=1
|
||||
Source5Mode=2
|
||||
Source6Name=Src\taskutility.c
|
||||
Source6Size=176 176 986 579
|
||||
Source6State=0
|
||||
Source6Line=64
|
||||
Source6Mode=2
|
||||
Source7Name=Src\port\portmacro.h
|
||||
Source7Size=22 22 832 425
|
||||
Source7State=0
|
||||
Source7Line=46
|
||||
Source7Mode=2
|
||||
Source8Name=Src\vectors.c
|
||||
Source8Size=44 44 854 447
|
||||
Source8State=0
|
||||
Source8Line=1
|
||||
Source8Mode=2
|
||||
Source9Name=Src\__STD_LIB_sbrk.c
|
||||
Source9Size=66 66 876 469
|
||||
Source9State=0
|
||||
Source9Line=1
|
||||
Source9Mode=2
|
||||
Layer15=1002,
|
||||
Source10Name=Src\FreeRTOSConfig.h
|
||||
Source10Size=110 110 920 513
|
||||
Source10State=0
|
||||
Source10Line=22
|
||||
Source10Mode=2
|
||||
Watch Variable15=[sState],90030000,1,-1 -1
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
Source=
|
||||
[Map]
|
||||
Flag=Enable
|
||||
Undef=On
|
||||
Inrom Access=Off
|
||||
Inrom=Off
|
||||
Inrom Image=On
|
||||
Area0=00000180 0000037F 7 1 0
|
||||
Area1=00002240 00007FFF 7 1 0
|
||||
Area2=00000000 000000EF 3 1 0
|
||||
Area3=00000100 0000017F 3 1 0
|
||||
Area4=00000380 00000BFF 3 1 0
|
||||
GuardArea0=00010000 000FDFFF 7
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
Mode=10
|
||||
Source=1
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
Size=0
|
||||
Mode=0
|
||||
MBuf=0
|
||||
Check=1
|
||||
CSiz=100
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
GoIntMask=0
|
||||
StepUnit=3
|
||||
StepIntMask=0
|
||||
StepIntpCtrl=4
|
||||
GoTrcCtrl=2
|
||||
OnTheFlyBreakAdmit=0
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
Data MB21981=0000247C 00FFFFFF 0 2 1 1 1 1 000000DE 0000FFFF
|
||||
DataBreakFlag1=Enable
|
||||
Data MB21982=00002538 00FFFFFF 0 2 1 1 1 1 000000DE 0000FFFF
|
||||
DataBreakFlag2=Enable
|
||||
Code MB21986=00DE2616 00FFFFFF 1 0 1 flash.c$98
|
||||
CodeBreakFlag6=Enable
|
||||
Code MB21987=00DE261E 00FFFFFF 1 0 1 flash.c$110
|
||||
CodeBreakFlag7=Enable
|
||||
Code MB21988=00DE2633 00FFFFFF 1 0 1 flash.c$125
|
||||
CodeBreakFlag8=Enable
|
||||
Code MB21989=00DE2650 00FFFFFF 1 0 1 flash.c$138
|
||||
CodeBreakFlag9=Enable
|
||||
Code MB21980=00DE00D4 00FFFFFF 1 0 1
|
||||
CodeBreakFlag0=Enable
|
||||
Debug File=C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs\96340_FreeRTOS_96348hs\ABS\96340_FreeRTOS_96348hs.abs
|
||||
Code MB21981=00F8016E 00FFFFFF 1 0 1 main.c$223
|
||||
CodeBreakFlag1=Enable
|
||||
Code MB21983=00F801A8 00FFFFFF 1 0 1 \vParTestSetLED
|
||||
CodeBreakFlag3=Enable
|
||||
[Emulation Environment]
|
||||
Flag=Enable
|
||||
RunMode=0
|
||||
Verify=1
|
||||
EventMode=0
|
||||
Limit Volt MB2198=5.75 2.5
|
||||
WatchDoc=0
|
||||
Resource=0
|
||||
External Pin=0
|
||||
DefaultBreak=0
|
||||
DebugArea1=12D714 2AB11CC 27874 1234724 0
|
||||
DebugArea2=0 B65720 11154784 1237400 0
|
||||
ParallelPort=-1 0
|
||||
Performance Break=2
|
||||
Coverage Status=0
|
||||
Frequency=40
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
MemoryWindow=0
|
||||
WatchWindow=1
|
||||
ObjectWindow=0
|
||||
ElapseTime=3E8
|
||||
Unit=1
|
||||
Mode=0
|
||||
RealtimeMemoryWindow=0
|
||||
[Error]
|
||||
Flag=Enable
|
||||
GuiErrorOutput=2
|
||||
CommandErrorOutput=1
|
||||
BatchErrorOutput=1
|
||||
ErrorOutputLevel=0
|
||||
[Color]
|
||||
Flag=Enable
|
||||
[Tab Environment]
|
||||
TabSize=8
|
||||
[Communication]
|
||||
Send=63992
|
||||
Receive=32000
|
||||
[Trace Environment]
|
||||
Trace Break=0
|
||||
Trace Status=1
|
||||
Trace StartPosition=1
|
||||
Trace BufferfulStop=0
|
||||
Trace Instruction=1
|
||||
Trace Verbose=0
|
||||
Trace DataArea1=1 00000000 00FFFFFF 7
|
||||
Trace DataArea2=2 00000000 FFFFFFFF 0
|
File diff suppressed because it is too large
Load Diff
@ -1,325 +0,0 @@
|
||||
# Simulator only:
|
||||
# Copy ROM-mirror area to bank 0x00
|
||||
|
||||
if %EVAL(ROMM_CONFIG & 0x01) == 0x01
|
||||
|
||||
set variable ROMM_BANK = %EVAL(ROMM_CONFIG >> 4)
|
||||
set variable ROMM_SIZE = %EVAL((ROMM_CONFIG >> 1) & 0x03)
|
||||
|
||||
print "\n\n>Set ROM-mirror memory map...\n"
|
||||
|
||||
|
||||
if %ROMM_SIZE == 0
|
||||
set map /read H'00E000..H'00FFFF
|
||||
|
||||
if %ROMM_BANK == 0x00
|
||||
show map
|
||||
move H'f0e000..H'F0FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x01
|
||||
show map
|
||||
move H'f1e000..H'F1FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x02
|
||||
show map
|
||||
move H'f2e000..H'F2FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x03
|
||||
show map
|
||||
move H'f3e000..H'F3FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x04
|
||||
show map
|
||||
move H'f4e000..H'F4FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x05
|
||||
show map
|
||||
move H'f5e000..H'F5FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x06
|
||||
show map
|
||||
move H'f6e000..H'F6FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x07
|
||||
show map
|
||||
move H'f7e000..H'F7FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x08
|
||||
show map
|
||||
move H'f8e000..H'F8FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x09
|
||||
show map
|
||||
move H'f9e000..H'F9FFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0A
|
||||
show map
|
||||
move H'fAe000..H'FAFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBe000..H'FBFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBe000..H'FBFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0C
|
||||
show map
|
||||
move H'fCe000..H'FCFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0D
|
||||
show map
|
||||
move H'fde000..H'FDFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0E
|
||||
show map
|
||||
move H'fee000..H'FEFFFF,H'e000
|
||||
|
||||
elseif %ROMM_BANK == 0x0F
|
||||
show map
|
||||
move H'ffe000..H'FFFFFF,H'e000
|
||||
|
||||
endif # ROMM_BANK selection
|
||||
|
||||
elseif %ROMM_SIZE == 1
|
||||
set map /read H'00C000..H'00FFFF
|
||||
|
||||
if %ROMM_BANK == 0x00
|
||||
show map
|
||||
move H'f0c000..H'F0FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x01
|
||||
show map
|
||||
move H'f1c000..H'F1FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x02
|
||||
show map
|
||||
move H'f2c000..H'F2FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x03
|
||||
show map
|
||||
move H'f3c000..H'F3FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x04
|
||||
show map
|
||||
move H'f4c000..H'F4FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x05
|
||||
show map
|
||||
move H'f5c000..H'F5FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x06
|
||||
show map
|
||||
move H'f6c000..H'F6FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x07
|
||||
show map
|
||||
move H'f7c000..H'F7FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x08
|
||||
show map
|
||||
move H'f8c000..H'F8FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x09
|
||||
show map
|
||||
move H'f9c000..H'F9FFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0A
|
||||
show map
|
||||
move H'fAc000..H'FAFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBc000..H'FBFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBc000..H'FBFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0C
|
||||
show map
|
||||
move H'fCc000..H'FCFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0D
|
||||
show map
|
||||
move H'fdc000..H'FDFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0E
|
||||
show map
|
||||
move H'fec000..H'FEFFFF,H'c000
|
||||
|
||||
elseif %ROMM_BANK == 0x0F
|
||||
show map
|
||||
move H'ffc000..H'FFFFFF,H'c000
|
||||
|
||||
endif # ROMM_BANK selection
|
||||
|
||||
elseif %ROMM_SIZE == 2
|
||||
set map /read H'00A000..H'00FFFF
|
||||
|
||||
if %ROMM_BANK == 0x00
|
||||
show map
|
||||
move H'f0a000..H'F0FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x01
|
||||
show map
|
||||
move H'f1a000..H'F1FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x02
|
||||
show map
|
||||
move H'f2a000..H'F2FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x03
|
||||
show map
|
||||
move H'f3a000..H'F3FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x04
|
||||
show map
|
||||
move H'f4a000..H'F4FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x05
|
||||
show map
|
||||
move H'f5a000..H'F5FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x06
|
||||
show map
|
||||
move H'f6a000..H'F6FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x07
|
||||
show map
|
||||
move H'f7a000..H'F7FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x08
|
||||
show map
|
||||
move H'f8a000..H'F8FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x09
|
||||
show map
|
||||
move H'f9a000..H'F9FFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0A
|
||||
show map
|
||||
move H'fAa000..H'FAFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBa000..H'FBFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fBa000..H'FBFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0C
|
||||
show map
|
||||
move H'fCa000..H'FCFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0D
|
||||
show map
|
||||
move H'fda000..H'FDFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0E
|
||||
show map
|
||||
move H'fea000..H'FEFFFF,H'a000
|
||||
|
||||
elseif %ROMM_BANK == 0x0F
|
||||
show map
|
||||
move H'ffa000..H'FFFFFF,H'a000
|
||||
|
||||
endif # ROMM_BANK selection
|
||||
|
||||
elseif %ROMM_SIZE == 3
|
||||
set map /read H'008000..H'00FFFF
|
||||
|
||||
if %ROMM_BANK == 0x00
|
||||
show map
|
||||
move H'f08000..H'F0FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x01
|
||||
show map
|
||||
move H'f18000..H'F1FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x02
|
||||
show map
|
||||
move H'f28000..H'F2FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x03
|
||||
show map
|
||||
move H'f38000..H'F3FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x04
|
||||
show map
|
||||
move H'f48000..H'F4FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x05
|
||||
show map
|
||||
move H'f58000..H'F5FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x06
|
||||
show map
|
||||
move H'f68000..H'F6FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x07
|
||||
show map
|
||||
move H'f78000..H'F7FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x08
|
||||
show map
|
||||
move H'f88000..H'F8FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x09
|
||||
show map
|
||||
move H'f98000..H'F9FFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0A
|
||||
show map
|
||||
move H'fA8000..H'FAFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fB8000..H'FBFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0B
|
||||
show map
|
||||
move H'fB8000..H'FBFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0C
|
||||
show map
|
||||
move H'fC8000..H'FCFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0D
|
||||
show map
|
||||
move H'fd8000..H'FDFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0E
|
||||
show map
|
||||
move H'fe8000..H'FEFFFF,H'8000
|
||||
|
||||
elseif %ROMM_BANK == 0x0F
|
||||
show map
|
||||
move H'ff8000..H'FFFFFF,H'8000
|
||||
|
||||
endif # ROMM_BANK selection
|
||||
|
||||
endif # ROMM_SIZE selection
|
||||
|
||||
print ">Copy ROMCONST for simulation..."
|
||||
print "OK"
|
||||
|
||||
print "\n-----------------------------------------------------------"
|
||||
print "\nUse command \"batch prc\\romconst.prc\" after each download"
|
||||
print "\n-----------------------------------------------------------"
|
||||
|
||||
else
|
||||
|
||||
print "\n----------------------"
|
||||
print "\nROM Mirror disabled!!!"
|
||||
print "\n----------------------"
|
||||
|
||||
endif
|
||||
|
||||
print "\n-------------------------------------------------------------------"
|
||||
print "\nSetting CKMR to 0xF0 to allow for the Clock Wait in that start.asm."
|
||||
print "\n-------------------------------------------------------------------"
|
||||
|
||||
set MEM /byte 0x0403 = 0xF0
|
@ -1,210 +0,0 @@
|
||||
[Information]
|
||||
DebChangeFlag=0
|
||||
MCUChangeFlag=0
|
||||
|
||||
[Version]
|
||||
Version=1
|
||||
Level=1
|
||||
Revision=0
|
||||
|
||||
[Debug Type]
|
||||
Type=1
|
||||
Virtual CPU File=wv907f1.dll
|
||||
Monitor Load=1
|
||||
Monitor Load Condition=Disable
|
||||
Core ID=0
|
||||
|
||||
[Device]
|
||||
Communication=LAN 141.187.6.53
|
||||
ProductID=0
|
||||
Protocol=3
|
||||
|
||||
[Target]
|
||||
AutoLoad=Enable
|
||||
Before Batch File=
|
||||
After Batch File=Prc\romconst.prc
|
||||
Non AutoMap=Disable
|
||||
Load DebInfo Only=Disable
|
||||
Ondemand Load Condition=Disable
|
||||
|
||||
[Start]
|
||||
Batch File=
|
||||
|
||||
[Window]
|
||||
Flag=Enable
|
||||
AssemblySize=0 0 0 0
|
||||
AssemblyState=0
|
||||
AssemblyFGColor=0 0 255
|
||||
Assembly Address=H'000000
|
||||
Memory Address=H'004241
|
||||
Memory Mode=H'00000001
|
||||
Memory Ascii=H'00000001
|
||||
Memory SplitRow=0
|
||||
RMemory Address=H'000000
|
||||
RMemory Mode=H'FFFFFFFF
|
||||
RMemory Ascii=H'00000001
|
||||
RMemory SplitRow=0
|
||||
Trace ViewMode=1
|
||||
Command Max History=H'00000032
|
||||
Source Display Mode=Enable
|
||||
Source Multi Mode=Enable
|
||||
Source Ask Mode=Enable
|
||||
Source Active Mode=Enable
|
||||
Source PC Color=255 255 0
|
||||
Source Scope Color=255 0 255
|
||||
Source Back Trace=255 0 255
|
||||
Register Change Color=255 0 0
|
||||
Perfomance Mode=H'00000001
|
||||
Perfomance Scale=1 0 0.000000 0.000000
|
||||
Coverage Address=H'000000
|
||||
Coverage Type=H'00000000
|
||||
RMemory Change Color=255 0 0
|
||||
RMemory Invalid Color=128 128 128
|
||||
CommandSize=0 534 359 712
|
||||
CommandState=0
|
||||
MemorySize=487 476 974 714
|
||||
MemoryState=0
|
||||
Layer0=1003,
|
||||
Coverage SplitRow=0
|
||||
Layer1=1006,
|
||||
Layer2=1004,
|
||||
Source0Name=Src\Main.c
|
||||
Source0Size=487 238 974 476
|
||||
Source0State=2
|
||||
Source0Line=21
|
||||
Source0Mode=1
|
||||
Source1Name=Src\Start.asm
|
||||
Source1Size=154 154 912 653
|
||||
Source1State=0
|
||||
Source1Line=40C
|
||||
Source1Mode=2
|
||||
RegisterSize=487 0 974 238
|
||||
RegisterState=0
|
||||
Layer3=2000,Src\Start.asm
|
||||
Register Select0=H'00000000
|
||||
Register Select1=H'00000003
|
||||
Register Select2=H'00000004
|
||||
Register Select3=H'00000005
|
||||
Register Select4=H'00000006
|
||||
Register Select5=H'00000007
|
||||
Register Select6=H'00000008
|
||||
Register Select7=H'00000010
|
||||
Register Select8=H'00000011
|
||||
Register Select9=H'00000012
|
||||
Register Select10=H'00000013
|
||||
Register Select11=H'00000014
|
||||
Register Select12=H'00000015
|
||||
Register Select13=H'00000016
|
||||
Register Select14=H'00000017
|
||||
Register Select15=H'00000018
|
||||
Register Select16=H'00000022
|
||||
Register Select17=H'00000023
|
||||
Register Select18=H'00000024
|
||||
Register Select19=H'00000025
|
||||
Register Select20=H'00000026
|
||||
Register Select21=H'00000027
|
||||
Register Select22=H'00000028
|
||||
Register Select23=H'00000029
|
||||
Register Select24=H'00000035
|
||||
WatchSize=0 357 487 714
|
||||
WatchState=0
|
||||
Watch Variable0=[pxCurrentTCB],92040000,1,-1 -1
|
||||
Watch Variable1=[pxTCB],10080000,1,-1 -1
|
||||
Watch Variable2=[usCriticalNesting],91030000,1,-1 -1
|
||||
LocalSize=388 0 582 161
|
||||
LocalState=0
|
||||
Layer4=1007,
|
||||
Layer5=2000,Src\Main.c
|
||||
TraceSize=243 178 486 356
|
||||
TraceState=0
|
||||
Watch Variable3=[*ptr],90080000,1,-1 -1
|
||||
|
||||
[Path Environment]
|
||||
Flag=Enable
|
||||
Source=
|
||||
|
||||
[Map]
|
||||
Flag=Enable
|
||||
Area0=00000000 000000EF 3 0 0
|
||||
Area2=00000100 0000017F 3 0 0
|
||||
Area3=00000180 0000018F 7 0 0
|
||||
Area4=00000190 00000369 3 0 0
|
||||
Area5=0000036A 0000037F 7 0 0
|
||||
Area6=00000380 00000BFF 3 0 0
|
||||
Area8=00002240 0000470F 3 0 0
|
||||
Area9=00004710 00007FFF 7 0 0
|
||||
Area10=00008000 0000FFFF 1 0 0
|
||||
Area12=000F0000 000F0FFF 3 0 0
|
||||
Area14=000FE000 000FFFFF 5 0 0
|
||||
Area16=00DE0000 00DE7FFF 5 0 0
|
||||
Area18=00DF0000 00DF7FFF 5 0 0
|
||||
Area20=00F80000 00FFFFFF 5 0 0
|
||||
Inrom Image=Off
|
||||
|
||||
[Radix Environment]
|
||||
Flag=Enable
|
||||
Mode=10
|
||||
Source=1
|
||||
|
||||
[Watch Environment]
|
||||
Flag=Enable
|
||||
Size=0
|
||||
Mode=0
|
||||
MBuf=0
|
||||
Check=1
|
||||
CSiz=100
|
||||
|
||||
[Exec Environment]
|
||||
Flag=Enable
|
||||
GoIntMask=0
|
||||
StepUnit=3
|
||||
StepIntMask=0
|
||||
StepIntpCtrl=4
|
||||
GoTrcCtrl=2
|
||||
OnTheFlyBreakAdmit=0
|
||||
|
||||
[Break Environment]
|
||||
Flag=Enable
|
||||
Code0=00DE00F1 1 0 1
|
||||
CodeBreakFlag0=Enable
|
||||
Code1=00DE012F 1 0 1 main.c$103
|
||||
CodeBreakFlag1=Enable
|
||||
Debug File=C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\ABS\96340_FreeRTOS_96348hs.abs
|
||||
Code2=00DE013E 1 0 1
|
||||
CodeBreakFlag2=Enable
|
||||
Code3=00DE1B64 1 0 1 \prvRLT0_TICKISR
|
||||
CodeBreakFlag3=Enable
|
||||
|
||||
[Emulation Environment]
|
||||
Flag=Disable
|
||||
|
||||
[Monitor Environment]
|
||||
Flag=Enable
|
||||
MemoryWindow=1
|
||||
WatchWindow=0
|
||||
ObjectWindow=0
|
||||
ElapseTime=3E8
|
||||
Unit=1
|
||||
Mode=0
|
||||
RealtimeMemoryWindow=0
|
||||
|
||||
[Error]
|
||||
Flag=Enable
|
||||
GuiErrorOutput=2
|
||||
CommandErrorOutput=1
|
||||
BatchErrorOutput=1
|
||||
ErrorOutputLevel=0
|
||||
|
||||
[Color]
|
||||
Flag=Enable
|
||||
|
||||
[Tab Environment]
|
||||
TabSize=8
|
||||
|
||||
[Communication]
|
||||
Send=1000
|
||||
Receive=64
|
||||
|
||||
[Trace Environment]
|
||||
Trace Break=0
|
||||
Trace Status=1
|
@ -1,397 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*---------------------------------------------------------------------------
|
||||
MAIN.C
|
||||
- description
|
||||
- See README.TXT for project description and disclaimer.
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
/* 16FX includes */
|
||||
#include "mb96348hs.h"
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "semphr.h"
|
||||
#include <watchdog.h>
|
||||
#include <config.h>
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Demo task priorities. */
|
||||
#define WTC_TASK_PRIORITY ( tskIDLE_PRIORITY + 5 )
|
||||
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
|
||||
#define TASK_UTILITY_PRIORITY ( tskIDLE_PRIORITY + 3 )
|
||||
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 3 )
|
||||
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainQUEUE_BLOCK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainDEATH_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainGENERIC_QUEUE_PRIORITY ( tskIDLE_PRIORITY )
|
||||
|
||||
/* Baud rate used by the COM test tasks. */
|
||||
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 19200 )
|
||||
|
||||
/* The frequency at which the 'Check' tasks executes. See the comments at the
|
||||
top of the page. When the system is operating error free the 'Check' task
|
||||
toggles an LED every three seconds. If an error is discovered in any task the
|
||||
rate is increased to 500 milliseconds. [in this case the '*' characters on the
|
||||
LCD represent LED's]*/
|
||||
#define mainNO_ERROR_CHECK_DELAY ( ( portTickType ) 3000 / portTICK_RATE_MS )
|
||||
#define mainERROR_CHECK_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#define ledNUMBER_OF_LEDS 8
|
||||
#define mainCOM_TEST_LED 0x05
|
||||
#define mainCHECK_TEST_LED 0x07
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/*
|
||||
* The function that implements the Check task. See the comments at the head
|
||||
* of the page for implementation details.
|
||||
*/
|
||||
static void vErrorChecks( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Called by the Check task. Returns pdPASS if all the other tasks are found
|
||||
* to be operating without error - otherwise returns pdFAIL.
|
||||
*/
|
||||
static portSHORT prvCheckOtherTasksAreStillRunning( void );
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
static unsigned portCHAR sState = 0x00;
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below callback function is called from Tick ISR if configUSE_TICK_HOOK
|
||||
* is configured as 1.
|
||||
*---------------------------------------------------------------------------*/
|
||||
/*void vApplicationTickHook ( void )
|
||||
{
|
||||
#if WATCHDOG == WTC_IN_TICK
|
||||
Kick_Watchdog();
|
||||
#endif
|
||||
}*/
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK
|
||||
* is configured as 1.
|
||||
*---------------------------------------------------------------------------*/
|
||||
void vApplicationIdleHook ( void )
|
||||
{
|
||||
#if WATCHDOG == WTC_IN_IDLE
|
||||
Kick_Watchdog();
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartFlashCoRoutines == 1 || INCLUDE_StartHookCoRoutines == 1 )
|
||||
vCoRoutineSchedule();
|
||||
#endif
|
||||
}
|
||||
/*---------------------------------------------------------------------------
|
||||
* Initialize Port 00
|
||||
*---------------------------------------------------------------------------*/
|
||||
static void prvInitPort00( void )
|
||||
{
|
||||
DDR00 = 0xFF;
|
||||
PDR00 = 0x00;
|
||||
}
|
||||
/*---------------------------------------------------------------------------
|
||||
* Setup the hardware
|
||||
*---------------------------------------------------------------------------*/
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
prvInitPort00();
|
||||
|
||||
#if WATCHDOG != WTC_NONE
|
||||
InitWatchdog();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* main()
|
||||
*---------------------------------------------------------------------------*/
|
||||
void main(void)
|
||||
{
|
||||
InitIrqLevels(); /* Initialize interrupts */
|
||||
__set_il(7); /* Allow all levels */
|
||||
|
||||
prvSetupHardware();
|
||||
|
||||
#if WATCHDOG == WTC_IN_TASK
|
||||
vStartWatchdogTask( WTC_TASK_PRIORITY );
|
||||
#endif
|
||||
|
||||
/* Start the standard demo application tasks. */
|
||||
|
||||
#if ( INCLUDE_StartLEDFlashTasks == 1 )
|
||||
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartIntegerMathTasks == 1 )
|
||||
vStartIntegerMathTasks( tskIDLE_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_AltStartComTestTasks == 1 )
|
||||
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED - 1 );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartPolledQueueTasks == 1 )
|
||||
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartSemaphoreTasks == 1 )
|
||||
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartBlockingQueueTasks == 1 )
|
||||
vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartDynamicPriorityTasks == 1 )
|
||||
vStartDynamicPriorityTasks();
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartMathTasks == 1 )
|
||||
vStartMathTasks( tskIDLE_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartFlashCoRoutines == 1 )
|
||||
vStartFlashCoRoutines( ledNUMBER_OF_LEDS-1 );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartHookCoRoutines == 1 )
|
||||
vStartHookCoRoutines();
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartGenericQueueTasks == 1 )
|
||||
vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartQueuePeekTasks == 1 )
|
||||
vStartQueuePeekTasks();
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_CreateBlockTimeTasks == 1 )
|
||||
vCreateBlockTimeTasks();
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_CreateSuicidalTasks == 1 )
|
||||
vCreateSuicidalTasks( mainDEATH_PRIORITY );
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_TraceListTasks == 1 )
|
||||
vTraceListTasks( TASK_UTILITY_PRIORITY );
|
||||
#endif
|
||||
|
||||
/* Start the 'Check' task which is defined in this file. */
|
||||
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
|
||||
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Should not reach here */
|
||||
while (1)
|
||||
{
|
||||
__asm(" NOP "); //
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
if (uxLED < ledNUMBER_OF_LEDS)
|
||||
{
|
||||
vTaskSuspendAll();
|
||||
|
||||
/* Toggle the state of the single genuine on board LED. */
|
||||
if( (sState & ((portCHAR)(1 << uxLED))) == 0)
|
||||
{
|
||||
PDR00 |= (1 << uxLED);
|
||||
sState |= (1 << uxLED);
|
||||
}
|
||||
else
|
||||
{
|
||||
PDR00 &= ~(1 << uxLED);
|
||||
sState &= ~(1 << uxLED);
|
||||
}
|
||||
|
||||
xTaskResumeAll();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
|
||||
{
|
||||
/* Set or clear the output [in this case show or hide the '*' character. */
|
||||
if( uxLED < ledNUMBER_OF_LEDS )
|
||||
{
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
if( xValue )
|
||||
{
|
||||
PDR00 |= (1 << uxLED);
|
||||
sState |= (1 << uxLED);
|
||||
}
|
||||
else
|
||||
{
|
||||
PDR00 &= ~(1 << uxLED);
|
||||
sState &= ~(1 << uxLED);
|
||||
}
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void vErrorChecks( void *pvParameters )
|
||||
{
|
||||
static volatile unsigned portLONG ulDummyVariable = 3UL;
|
||||
portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY;
|
||||
|
||||
( void ) pvParameters;
|
||||
/* Cycle for ever, delaying then checking all the other tasks are still
|
||||
operating without error. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Wait until it is time to check again. The time we wait here depends
|
||||
on whether an error has been detected or not. When an error is
|
||||
detected the time is shortened resulting in a faster LED flash rate. */
|
||||
vTaskDelay( xDelayPeriod );
|
||||
|
||||
/* Perform a bit of 32bit maths to ensure the registers used by the
|
||||
integer tasks get some exercise outside of the integer tasks
|
||||
themselves. The result here is not important we are just deliberately
|
||||
changing registers used by other tasks to ensure that their context
|
||||
switch is operating as required. - see the demo application
|
||||
documentation for more info. */
|
||||
ulDummyVariable *= 3UL;
|
||||
|
||||
/* See if the other tasks are all ok. */
|
||||
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
|
||||
{
|
||||
/* An error occurred in one of the tasks so shorten the delay
|
||||
period - which has the effect of increasing the frequency of the
|
||||
LED toggle. */
|
||||
xDelayPeriod = mainERROR_CHECK_DELAY;
|
||||
}
|
||||
|
||||
/* Flash! */
|
||||
vParTestToggleLED(mainCHECK_TEST_LED);
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static portSHORT prvCheckOtherTasksAreStillRunning( void )
|
||||
{
|
||||
static portSHORT sNoErrorFound = pdTRUE;
|
||||
|
||||
/* The demo tasks maintain a count that increments every cycle of the task
|
||||
provided that the task has never encountered an error. This function
|
||||
checks the counts maintained by the tasks to ensure they are still being
|
||||
incremented. A count remaining at the same value between calls therefore
|
||||
indicates that an error has been detected. Only tasks that do not flash
|
||||
an LED are checked. */
|
||||
|
||||
#if ( INCLUDE_StartIntegerMathTasks == 1 )
|
||||
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_AltStartComTestTasks == 1 )
|
||||
if( xAreComTestTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartPolledQueueTasks == 1 )
|
||||
if( xArePollingQueuesStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartSemaphoreTasks == 1 )
|
||||
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartBlockingQueueTasks == 1 )
|
||||
if( xAreBlockingQueuesStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartDynamicPriorityTasks == 1 )
|
||||
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartMathTasks == 1 )
|
||||
if( xAreMathsTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if ( INCLUDE_StartFlashCoRoutines == 1 )
|
||||
if( xAreFlashCoRoutinesStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartHookCoRoutines == 1 )
|
||||
if( xAreHookCoRoutinesStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartGenericQueueTasks == 1 )
|
||||
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_StartQueuePeekTasks == 1 )
|
||||
if ( xAreQueuePeekTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_CreateBlockTimeTasks == 1 )
|
||||
if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ( INCLUDE_CreateSuicidalTasks == 1 )
|
||||
if( xIsCreateTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
sNoErrorFound = pdFALSE;
|
||||
}
|
||||
#endif
|
||||
|
||||
return sNoErrorFound;
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
File diff suppressed because it is too large
Load Diff
@ -1,84 +0,0 @@
|
||||
/*
|
||||
FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
FreeRTOS.org is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
FreeRTOS.org is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with FreeRTOS.org; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes FreeRTOS.org, without being obliged to provide
|
||||
the source code for any proprietary components. See the licensing section
|
||||
of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
|
||||
***************************************************************************
|
||||
See http://www.FreeRTOS.org for documentation, latest information, license
|
||||
and contact details. Please ensure to read the configuration and relevant
|
||||
port sections of the online documentation.
|
||||
|
||||
Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
|
||||
with commercial development and support options.
|
||||
***************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 1
|
||||
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 56000000 ) /* Clock setup from start.asm in the demo application. */
|
||||
#define configCLKP1_CLOCK_HZ ( ( unsigned portLONG ) 56000000 ) /* Clock setup from start.asm in the demo application. */
|
||||
#define configTICK_RATE_HZ ( ( portTickType ) 100 )
|
||||
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 6 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 176 )
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 21504 ) )
|
||||
#define configMAX_TASK_NAME_LEN ( 20 )
|
||||
#define configUSE_TRACE_FACILITY 1
|
||||
#define configUSE_16_BIT_TICKS 1
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 1
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 4 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vResumeFromISR 1
|
||||
//#define INCLUDE_xTaskResumeFromISR 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
@ -1,73 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*---------------------------------------------------------------------------
|
||||
config.h
|
||||
- This file contains the defines to include or exclude a certain demo
|
||||
application function.
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/* The below are the defines that includes the corresponding function (those create related
|
||||
* tasks) if they are defined aand vice a versa.
|
||||
*/
|
||||
|
||||
#define INCLUDE_StartIntegerMathTasks 1
|
||||
|
||||
#define INCLUDE_StartPolledQueueTasks 1
|
||||
#define INCLUDE_StartSemaphoreTasks 1
|
||||
#define INCLUDE_StartBlockingQueueTasks 1
|
||||
#define INCLUDE_StartDynamicPriorityTasks 1
|
||||
|
||||
#define INCLUDE_StartHookCoRoutines 1
|
||||
#define INCLUDE_StartGenericQueueTasks 1
|
||||
#define INCLUDE_StartQueuePeekTasks 1
|
||||
|
||||
#define INCLUDE_CreateSuicidalTasks 1
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
#if __CONFIG__ == 1
|
||||
#define INCLUDE_StartLEDFlashTasks 1
|
||||
#define INCLUDE_AltStartComTestTasks 1
|
||||
#define INCLUDE_StartMathTasks 0
|
||||
#define INCLUDE_StartFlashCoRoutines 0
|
||||
#define INCLUDE_CreateBlockTimeTasks 0
|
||||
#define INCLUDE_TraceListTasks 1
|
||||
#elif __CONFIG__ == 2
|
||||
#define INCLUDE_StartLEDFlashTasks 0
|
||||
#define INCLUDE_AltStartComTestTasks 0
|
||||
#define INCLUDE_StartMathTasks 0
|
||||
#define INCLUDE_StartFlashCoRoutines 1
|
||||
#define INCLUDE_CreateBlockTimeTasks 1
|
||||
#define INCLUDE_TraceListTasks 1
|
||||
#elif __CONFIG__ == 3
|
||||
#define INCLUDE_StartLEDFlashTasks 1
|
||||
#define INCLUDE_AltStartComTestTasks 1
|
||||
#define INCLUDE_StartMathTasks 1
|
||||
#define INCLUDE_StartFlashCoRoutines 0
|
||||
#define INCLUDE_CreateBlockTimeTasks 1
|
||||
#define INCLUDE_TraceListTasks 0
|
||||
#elif __CONFIG__ == 4
|
||||
#define INCLUDE_StartLEDFlashTasks 0
|
||||
#define INCLUDE_AltStartComTestTasks 0
|
||||
#define INCLUDE_StartMathTasks 1
|
||||
#define INCLUDE_StartFlashCoRoutines 1
|
||||
#define INCLUDE_CreateBlockTimeTasks 0
|
||||
#define INCLUDE_TraceListTasks 1
|
||||
#else
|
||||
#error __CONFIG__ should be defined and it should have value between 1 to 4
|
||||
#endif
|
||||
|
||||
/* vStartFlashCoRoutines() can only be used (by defining INCLUDE_StartFlashCoRoutines as 1)
|
||||
* if vStartLEDFlashTasks() and vAltStartComTestTasks() functions are not used (by defining
|
||||
* INCLUDE_StartLEDFlashTasks and INCLUDE_AltStartComTestTasks both as 0) and vice a versa.
|
||||
* This is because tasks created by these functions shares the LEDs connected to Port 00. The
|
||||
* corresponding code from the function prvCheckOtherTasksAreStillRunning() should also be
|
||||
* commented.
|
||||
*/
|
||||
|
||||
/* In order to have vTraceListTasks() the below define INCLUDE_TraceListTasks should be defined
|
||||
* as 1. While doing so one have to compromise on some of the other tasks as vTraceListTasks()
|
||||
* requires high amount of memory. It should be noted that if all the task are tried to be inclued
|
||||
* then the compiler would give memory overflow error.
|
||||
*/
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,218 +0,0 @@
|
||||
/*
|
||||
FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
FreeRTOS.org is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
FreeRTOS.org is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with FreeRTOS.org; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes FreeRTOS.org, without being obliged to provide
|
||||
the source code for any proprietary components. See the licensing section
|
||||
of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
|
||||
***************************************************************************
|
||||
See http://www.FreeRTOS.org for documentation, latest information, license
|
||||
and contact details. Please ensure to read the configuration and relevant
|
||||
port sections of the online documentation.
|
||||
|
||||
Also see http://www.SafeRTOS.com a version that has been certified for use
|
||||
in safety critical systems, plus commercial licensing, development and
|
||||
support options.
|
||||
***************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
|
||||
*
|
||||
* This file only supports UART 1
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
|
||||
/* The queue used to hold received characters. */
|
||||
static xQueueHandle xRxedChars;
|
||||
|
||||
/* The queue used to hold characters waiting transmission. */
|
||||
static xQueueHandle xCharsForTx;
|
||||
|
||||
static volatile portSHORT sTHREEmpty;
|
||||
|
||||
static volatile portSHORT queueFail = pdFALSE;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
|
||||
{
|
||||
|
||||
/* Initialise the hardware. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/* Create the queues used by the com test task. */
|
||||
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
|
||||
if ( xRxedChars == 0)
|
||||
{
|
||||
queueFail = pdTRUE;
|
||||
}
|
||||
|
||||
if ( xCharsForTx == 0)
|
||||
{
|
||||
queueFail = pdTRUE;
|
||||
}
|
||||
|
||||
/* Initialize UART asynchronous mode */
|
||||
BGR0 = configCLKP1_CLOCK_HZ / ulWantedBaud;
|
||||
|
||||
SCR0 = 0x17; /* 8N1 */
|
||||
SMR0 = 0x0d; /* enable SOT3, Reset, normal mode */
|
||||
SSR0 = 0x02; /* LSB first, enable receive interrupts */
|
||||
|
||||
PIER08_IE2 = 1; /* enable input */
|
||||
DDR08_D2 = 0; /* switch P08_2 to input */
|
||||
DDR08_D3 = 1; /* switch P08_3 to output */
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
/* Unlike other ports, this serial code does not allow for more than one
|
||||
com port. We therefore don't return a pointer to a port structure and can
|
||||
instead just return NULL. */
|
||||
return NULL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
|
||||
{
|
||||
/* Get the next character from the buffer. Return false if no characters
|
||||
are available, or arrive before xBlockTime expires. */
|
||||
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
|
||||
{
|
||||
return pdTRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return pdFALSE;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
|
||||
{
|
||||
signed portBASE_TYPE xReturn;
|
||||
|
||||
/* Transmit a character. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
if( sTHREEmpty == pdTRUE )
|
||||
{
|
||||
/* If sTHREEmpty is true then the UART Tx ISR has indicated that
|
||||
there are no characters queued to be transmitted - so we can
|
||||
write the character directly to the shift Tx register. */
|
||||
sTHREEmpty = pdFALSE;
|
||||
TDR0 = cOutChar;
|
||||
xReturn = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* sTHREEmpty is false, so there are still characters waiting to be
|
||||
transmitted. We have to queue this character so it gets
|
||||
transmitted in turn. */
|
||||
|
||||
/* Return false if after the block time there is no room on the Tx
|
||||
queue. It is ok to block inside a critical section as each task
|
||||
maintains it's own critical section status. */
|
||||
if (xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdTRUE)
|
||||
{
|
||||
xReturn = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = pdFAIL;
|
||||
}
|
||||
}
|
||||
|
||||
if (pdPASS == xReturn)
|
||||
{
|
||||
/* Turn on the Tx interrupt so the ISR will remove the character from the
|
||||
queue and send it. This does not need to be in a critical section as
|
||||
if the interrupt has already removed the character the next interrupt
|
||||
will simply turn off the Tx interrupt again. */
|
||||
SSR0_TIE = 1;
|
||||
}
|
||||
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
return pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* UART RX interrupt service routine.
|
||||
*/
|
||||
__interrupt void UART0_RxISR (void)
|
||||
{
|
||||
volatile signed portCHAR cChar;
|
||||
|
||||
/* Get the character from the UART and post it on the queue of Rxed
|
||||
characters. */
|
||||
cChar = RDR0;
|
||||
|
||||
if( xQueueGenericSendFromISR( xRxedChars, (const void * const) &cChar, (signed portBASE_TYPE) pdFALSE, (portBASE_TYPE) 0 ) )
|
||||
{
|
||||
/*If the post causes a task to wake force a context switch
|
||||
as the woken task may have a higher priority than the task we have
|
||||
interrupted. */
|
||||
portYIELDFromISR();
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* UART Tx interrupt service routine.
|
||||
*/
|
||||
__interrupt void UART0_TxISR (void)
|
||||
{
|
||||
signed portCHAR cChar;
|
||||
signed portBASE_TYPE xTaskWoken;
|
||||
|
||||
/* The previous character has been transmitted. See if there are any
|
||||
further characters waiting transmission. */
|
||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
|
||||
{
|
||||
/* There was another character queued - transmit it now. */
|
||||
TDR0 = cChar;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* There were no other characters to transmit. */
|
||||
sTHREEmpty = pdTRUE;
|
||||
|
||||
/* Disable transmit interrupts */
|
||||
SSR0_TIE = 0;
|
||||
}
|
||||
}
|
||||
|
@ -1,199 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
taskutility.C
|
||||
-
|
||||
-------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*************************@INCLUDE_START************************/
|
||||
#include "mb96348hs.h"
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
|
||||
static void vUART2Task( void *pvParameters );
|
||||
|
||||
/**************************@INCLUDE_END*************************/
|
||||
/*********************@GLOBAL_VARIABLES_START*******************/
|
||||
const char ASCII[] = "0123456789ABCDEF";
|
||||
|
||||
xTaskHandle UART_TaskHandle;
|
||||
|
||||
void InitUart2(void)
|
||||
{
|
||||
/* Initialize UART asynchronous mode */
|
||||
BGR2 = configCLKP1_CLOCK_HZ / 9600; /* 9600 Baud @ CLKP1 - 56 MHz */
|
||||
|
||||
SCR2 = 0x17; /* 8N1 */
|
||||
SMR2 = 0x0d; /* enable SOT3, Reset, normal mode */
|
||||
SSR2 = 0x02; /* LSB first, enable receive interrupts */
|
||||
|
||||
PIER05_IE0 = 1; /* enable input */
|
||||
DDR05_D0 = 0; /* switch P05_0 to input */
|
||||
DDR05_D1 = 1; /* switch P05_1 to output */
|
||||
|
||||
}
|
||||
|
||||
void Putch2(char ch) /* sends a char */
|
||||
{
|
||||
while (SSR2_TDRE == 0); /* wait for transmit buffer empty */
|
||||
TDR2 = ch; /* put ch into buffer */
|
||||
}
|
||||
|
||||
char Getch2(void) /* waits for and returns incomming char */
|
||||
{
|
||||
volatile unsigned ch;
|
||||
|
||||
while(SSR2_RDRF == 0); /* wait for data received */
|
||||
if (SSR2_ORE) /* overrun error */
|
||||
{
|
||||
ch = RDR2; /* reset error flags */
|
||||
return (char)(-1);
|
||||
}
|
||||
else
|
||||
return (RDR2); /* return char */
|
||||
}
|
||||
|
||||
void Puts2(const char *Name2) /* Puts a String to UART */
|
||||
{
|
||||
volatile portSHORT i,len;
|
||||
len = strlen(Name2);
|
||||
|
||||
for (i=0; i<strlen(Name2); i++) /* go through string */
|
||||
{
|
||||
if (Name2[i] == 10)
|
||||
Putch2(13);
|
||||
Putch2(Name2[i]); /* send it out */
|
||||
}
|
||||
}
|
||||
|
||||
void Puthex2(unsigned long n, unsigned char digits)
|
||||
{
|
||||
unsigned portCHAR digit=0,div=0,i;
|
||||
|
||||
div=(4*(digits-1)); /* init shift divisor */
|
||||
for (i=0;i<digits;i++)
|
||||
{
|
||||
digit = ((n >> div)&0xF); /* get hex-digit value */
|
||||
Putch2(digit + ((digit < 0xA) ? '0' : 'A' - 0xA));
|
||||
div-=4; /* next digit shift */
|
||||
}
|
||||
}
|
||||
|
||||
void Putdec2(unsigned long x, int digits)
|
||||
{
|
||||
portSHORT i;
|
||||
portCHAR buf[10],sign=1;
|
||||
|
||||
if (digits < 0) { /* should be print of zero? */
|
||||
digits *= (-1);
|
||||
sign =1;
|
||||
}
|
||||
buf[digits]='\0'; /* end sign of string */
|
||||
|
||||
for (i=digits; i>0; i--) {
|
||||
buf[i-1] = ASCII[x % 10];
|
||||
x = x/10;
|
||||
}
|
||||
|
||||
if ( sign )
|
||||
{
|
||||
for (i=0; buf[i]=='0'; i++) { /* no print of zero */
|
||||
if ( i<digits-1)
|
||||
buf[i] = ' ';
|
||||
}
|
||||
}
|
||||
|
||||
Puts2(buf); /* send string */
|
||||
}
|
||||
|
||||
void vTraceListTasks( unsigned portBASE_TYPE uxPriority )
|
||||
{
|
||||
portENTER_CRITICAL();
|
||||
InitUart2();
|
||||
portENTER_CRITICAL();
|
||||
xTaskCreate( vUART2Task , ( signed portCHAR * ) "UART2", ( unsigned portSHORT ) 2048, ( void * ) NULL, uxPriority, &UART_TaskHandle );
|
||||
}
|
||||
|
||||
static void vUART2Task( void *pvParameters )
|
||||
{
|
||||
portCHAR tasklist_buff[512];
|
||||
portCHAR trace_buff[512];
|
||||
unsigned portLONG trace_len;
|
||||
signed portLONG i, j, l=0;
|
||||
|
||||
unsigned portCHAR ch;
|
||||
|
||||
( void ) pvParameters;
|
||||
|
||||
Puts2("\n -------------MB96348 FreeRTOS DEMO Task List and Trace Utility----------- \n");
|
||||
|
||||
for(;;)
|
||||
{
|
||||
Puts2("\n\rPress any of the following keys for the corresponding functionality: ");
|
||||
|
||||
Puts2("\n\r1: To call vTaskList() and display current task status ");
|
||||
|
||||
Puts2("\n\r2: To call vTaskStartTrace() and to display trace results once the trace ends");
|
||||
|
||||
SSR2_RIE=1;
|
||||
|
||||
vTaskSuspend(NULL);
|
||||
|
||||
ch=Getch2();
|
||||
|
||||
switch ( ch )
|
||||
{
|
||||
case '1':
|
||||
vTaskList( ( signed char * ) tasklist_buff );
|
||||
Puts2("\n\rThe current task list is as follows....");
|
||||
Puts2("\n\r----------------------------------------------");
|
||||
Puts2("\n\rName State Priority Stack Number");
|
||||
Puts2("\n\r----------------------------------------------");
|
||||
Puts2(tasklist_buff);
|
||||
Puts2("\r----------------------------------------------");
|
||||
break;
|
||||
|
||||
case '2':
|
||||
vTaskStartTrace(( signed char * ) trace_buff, 512);
|
||||
Puts2("\n\rThe trace started!!");
|
||||
vTaskDelay( ( portTickType ) 500);
|
||||
trace_len = ulTaskEndTrace();
|
||||
Puts2("\n\rThe trace ended!!");
|
||||
Puts2("\n\rThe trace is as follows....");
|
||||
Puts2("\n\r--------------------------------------------------------");
|
||||
Puts2("\n\r Tick | Task Number | Tick | Task Number |");
|
||||
Puts2("\n\r--------------------------------------------------------\n\r");
|
||||
|
||||
for( i = 0 ; i < trace_len ; i+=4 )
|
||||
{
|
||||
for( j = i+3 ; j >= i ; j-- )
|
||||
{
|
||||
Puthex2(trace_buff[j],2);
|
||||
}
|
||||
Puts2(" | ");
|
||||
l++;
|
||||
if ( l == 4)
|
||||
{
|
||||
Puts2("\n");
|
||||
l = 0;
|
||||
}
|
||||
}
|
||||
Puts2("\r--------------------------------------------------------");
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
Puts2("\n");
|
||||
}
|
||||
}
|
||||
|
||||
__interrupt void UART2_RxISR ( void )
|
||||
{
|
||||
SSR2_RIE=0;
|
||||
vTaskResume( UART_TaskHandle );
|
||||
}
|
@ -1,179 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*---------------------------------------------------------------------------
|
||||
VECTORS.C
|
||||
- Interrupt level (priority) setting
|
||||
- Interrupt vector definition
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
#include "mb96348hs.h"
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
InitIrqLevels()
|
||||
This function pre-sets all interrupt control registers. It can be used
|
||||
to set all interrupt priorities in static applications. If this file
|
||||
contains assignments to dedicated resources, verify that the
|
||||
appropriate controller is used.
|
||||
NOTE: value 7 disables the interrupt and value 0 sets highest priority.
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
#define MIN_ICR 12
|
||||
#define MAX_ICR 96
|
||||
|
||||
#define DEFAULT_ILM_MASK 7
|
||||
|
||||
void InitIrqLevels(void)
|
||||
{
|
||||
volatile int irq;
|
||||
|
||||
for (irq = MIN_ICR; irq <= MAX_ICR; irq++)
|
||||
{
|
||||
ICR = (irq << 8) | DEFAULT_ILM_MASK;
|
||||
}
|
||||
|
||||
ICR = ((51 & 0xFF) << 8) | 6; /* Reload Timer 0 of MB9634x Series */
|
||||
ICR = ((12 & 0xFF) << 8) | 6; /* Delayed interrupt of 16FX Family */
|
||||
ICR = (79 << 8) | 5; /* UART 0 Rx of MB9634x Series*/
|
||||
ICR = (80 << 8) | 5; /* UART 0 Tx of MB9634x Series*/
|
||||
ICR = (83 << 8) | 5; /* UART 2 Rx of MB9634x Series*/
|
||||
}
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
Prototypes
|
||||
Add your own prototypes here. Each vector definition needs is proto-
|
||||
type. Either do it here or include a header file containing them.
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
__interrupt void DefaultIRQHandler (void);
|
||||
|
||||
extern __interrupt void prvRLT0_TICKISR (void);
|
||||
extern __interrupt void UART0_RxISR (void);
|
||||
extern __interrupt void UART0_TxISR (void);
|
||||
extern __interrupt void vPortYield (void);
|
||||
extern __interrupt void vPortYieldDelayed (void);
|
||||
|
||||
extern __interrupt void UART2_RxISR (void);
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
Vector definiton for MB9634x
|
||||
Use following statements to define vectors. All resource related
|
||||
vectors are predefined. Remaining software interrupts can be added here
|
||||
as well.
|
||||
NOTE: If software interrupts 0 to 7 are defined here, this might
|
||||
conflict with the reset vector in the start-up file.
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
#pragma intvect DefaultIRQHandler 11 /* Non-maskable Interrupt */
|
||||
|
||||
#pragma intvect vPortYieldDelayed 12 /* Delayed Interrupt */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 13 /* RC Timer */
|
||||
#pragma intvect DefaultIRQHandler 14 /* Main Clock Timer */
|
||||
#pragma intvect DefaultIRQHandler 15 /* Sub Clock Timer */
|
||||
#pragma intvect DefaultIRQHandler 16 /* Reserved */
|
||||
#pragma intvect DefaultIRQHandler 17 /* EXT0 */
|
||||
#pragma intvect DefaultIRQHandler 18 /* EXT1 */
|
||||
#pragma intvect DefaultIRQHandler 19 /* EXT2 */
|
||||
#pragma intvect DefaultIRQHandler 20 /* EXT3 */
|
||||
#pragma intvect DefaultIRQHandler 21 /* EXT4 */
|
||||
#pragma intvect DefaultIRQHandler 22 /* EXT5 */
|
||||
#pragma intvect DefaultIRQHandler 23 /* EXT6 */
|
||||
#pragma intvect DefaultIRQHandler 24 /* EXT7 */
|
||||
#pragma intvect DefaultIRQHandler 25 /* EXT8 */
|
||||
#pragma intvect DefaultIRQHandler 26 /* EXT9 */
|
||||
#pragma intvect DefaultIRQHandler 27 /* EXT10 */
|
||||
#pragma intvect DefaultIRQHandler 28 /* EXT11 */
|
||||
#pragma intvect DefaultIRQHandler 29 /* EXT12 */
|
||||
#pragma intvect DefaultIRQHandler 30 /* EXT13 */
|
||||
#pragma intvect DefaultIRQHandler 31 /* EXT14 */
|
||||
#pragma intvect DefaultIRQHandler 32 /* EXT15 */
|
||||
#pragma intvect DefaultIRQHandler 33 /* CAN0 */
|
||||
#pragma intvect DefaultIRQHandler 34 /* CAN1 */
|
||||
#pragma intvect DefaultIRQHandler 35 /* PPG0 */
|
||||
#pragma intvect DefaultIRQHandler 36 /* PPG1 */
|
||||
#pragma intvect DefaultIRQHandler 37 /* PPG2 */
|
||||
#pragma intvect DefaultIRQHandler 38 /* PPG3 */
|
||||
#pragma intvect DefaultIRQHandler 39 /* PPG4 */
|
||||
#pragma intvect DefaultIRQHandler 40 /* PPG5 */
|
||||
#pragma intvect DefaultIRQHandler 41 /* PPG6 */
|
||||
#pragma intvect DefaultIRQHandler 42 /* PPG7 */
|
||||
#pragma intvect DefaultIRQHandler 43 /* PPG8 */
|
||||
#pragma intvect DefaultIRQHandler 44 /* PPG9 */
|
||||
#pragma intvect DefaultIRQHandler 45 /* PPG10 */
|
||||
#pragma intvect DefaultIRQHandler 46 /* PPG11 */
|
||||
#pragma intvect DefaultIRQHandler 47 /* PPG12 */
|
||||
#pragma intvect DefaultIRQHandler 48 /* PPG13 */
|
||||
#pragma intvect DefaultIRQHandler 49 /* PPG14 */
|
||||
#pragma intvect DefaultIRQHandler 50 /* PPG15 */
|
||||
|
||||
#pragma intvect prvRLT0_TICKISR 51 /* RLT0 */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 52 /* RLT1 */
|
||||
#pragma intvect DefaultIRQHandler 53 /* RLT2 */
|
||||
#pragma intvect DefaultIRQHandler 54 /* RLT3 */
|
||||
#pragma intvect DefaultIRQHandler 55 /* PPGRLT - RLT6 */
|
||||
#pragma intvect DefaultIRQHandler 56 /* ICU0 */
|
||||
#pragma intvect DefaultIRQHandler 57 /* ICU1 */
|
||||
#pragma intvect DefaultIRQHandler 58 /* ICU2 */
|
||||
#pragma intvect DefaultIRQHandler 59 /* ICU3 */
|
||||
#pragma intvect DefaultIRQHandler 60 /* ICU4 */
|
||||
#pragma intvect DefaultIRQHandler 61 /* ICU5 */
|
||||
#pragma intvect DefaultIRQHandler 62 /* ICU6 */
|
||||
#pragma intvect DefaultIRQHandler 63 /* ICU7 */
|
||||
#pragma intvect DefaultIRQHandler 64 /* OCU0 */
|
||||
#pragma intvect DefaultIRQHandler 65 /* OCU1 */
|
||||
#pragma intvect DefaultIRQHandler 66 /* OCU2 */
|
||||
#pragma intvect DefaultIRQHandler 67 /* OCU3 */
|
||||
#pragma intvect DefaultIRQHandler 68 /* OCU4 */
|
||||
#pragma intvect DefaultIRQHandler 69 /* OCU5 */
|
||||
#pragma intvect DefaultIRQHandler 70 /* OCU6 */
|
||||
#pragma intvect DefaultIRQHandler 71 /* OCU7 */
|
||||
#pragma intvect DefaultIRQHandler 72 /* FRT0 */
|
||||
#pragma intvect DefaultIRQHandler 73 /* FRT1 */
|
||||
#pragma intvect DefaultIRQHandler 74 /* I2C0 */
|
||||
#pragma intvect DefaultIRQHandler 75 /* I2C1 */
|
||||
#pragma intvect DefaultIRQHandler 76 /* ADC */
|
||||
#pragma intvect DefaultIRQHandler 77 /* ALARM0 */
|
||||
#pragma intvect DefaultIRQHandler 78 /* ALARM1 */
|
||||
|
||||
#pragma intvect UART0_RxISR 79 /* LIN-UART 0 RX */
|
||||
#pragma intvect UART0_TxISR 80 /* LIN-UART 0 TX */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 81 /* LIN-UART 1 RX */
|
||||
#pragma intvect DefaultIRQHandler 82 /* LIN-UART 1 TX */
|
||||
|
||||
#pragma intvect UART2_RxISR 83 /* LIN-UART 2 RX */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 84 /* LIN-UART 2 TX */
|
||||
#pragma intvect DefaultIRQHandler 85 /* LIN-UART 3 RX */
|
||||
#pragma intvect DefaultIRQHandler 86 /* LIN-UART 3 TX */
|
||||
#pragma intvect DefaultIRQHandler 87 /* MAIN FLASH IRQ */
|
||||
#pragma intvect DefaultIRQHandler 88 /* SATELLITE FLASH IRQ (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 89 /* LIN-UART 7 RX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 90 /* LIN-UART 7 TX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 91 /* LIN-UART 8 RX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 92 /* LIN-UART 8 TX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 93 /* LIN-UART 9 RX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 94 /* LIN-UART 9 TX (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 95 /* RTC (not on all devices) */
|
||||
#pragma intvect DefaultIRQHandler 96 /* CAL (not on all devices) */
|
||||
|
||||
#pragma intvect vPortYield 122 /* INT #122 */
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
DefaultIRQHandler()
|
||||
This function is a placeholder for all vector definitions. Either use
|
||||
your own placeholder or add necessary code here.
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
__interrupt
|
||||
void DefaultIRQHandler (void)
|
||||
{
|
||||
__DI(); /* disable interrupts */
|
||||
while(1)
|
||||
{
|
||||
__wait_nop(); /* halt system */
|
||||
}
|
||||
}
|
@ -1,62 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
watchdog.c
|
||||
- This file contains the function deefinition for hardware watchdog.
|
||||
-------------------------------------------------------------------------*/
|
||||
|
||||
#include "mb96348hs.h"
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "watchdog.h"
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Setup Watchdog
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG != WTC_NONE
|
||||
void InitWatchdog(void)
|
||||
{
|
||||
WDTC_WTI = WTC_PER_2_23; /* 2^23/CLKWT */
|
||||
WDTC_WTCS = WTC_CLKMC; /* CLKWT=CLKMC, Watchdog expiration delay = 2.097s @ 4MHZ CLKMC*/
|
||||
WDTCP = 0x00; /* Activate Watchdog, Clear Pattern 0x00 */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below task clears the watchdog and blocks itself for WTC_CLR_PER ticks.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG == WTC_IN_TASK
|
||||
static void prvWatchdogTask ( void *pvParameters )
|
||||
{
|
||||
const portTickType xFrequency = WTC_CLR_PER;
|
||||
portTickType xLastWakeTime;
|
||||
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Get currrent tick count */
|
||||
xLastWakeTime = xTaskGetTickCount();
|
||||
|
||||
for( ; ; )
|
||||
{
|
||||
/* Get currrent tick count */
|
||||
xLastWakeTime = xTaskGetTickCount();
|
||||
|
||||
Kick_Watchdog();
|
||||
|
||||
/* Block the task for WTC_CLR_PER ticks (1 s) at watchdog overflow period of WTC_PER_2_24 CLKMC cycles */
|
||||
vTaskDelayUntil( &xLastWakeTime, xFrequency );
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below function creates hardware watchdog task.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG == WTC_IN_TASK
|
||||
void vStartWatchdogTask( unsigned portBASE_TYPE uxPriority )
|
||||
{
|
||||
xTaskCreate( prvWatchdogTask , ( signed portCHAR * ) "KickWTC", portMINIMAL_STACK_SIZE, ( void * ) NULL, uxPriority, ( xTaskHandle * ) NULL );
|
||||
}
|
||||
#endif
|
@ -1,73 +0,0 @@
|
||||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
watchdog.h
|
||||
- This file contains the defines and function declaration for hardware watchdog.
|
||||
-------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Clear watchdog defines
|
||||
*/
|
||||
#define WTC_NONE 0 /* Don't initialize and clear watchdog */
|
||||
#define WTC_IN_TASK 1 /* Clear Watchdog in dedicated task */
|
||||
#define WTC_IN_TICK 2 /* Clear Watchdog in TICK Hook */
|
||||
#define WTC_IN_IDLE 3 /* Clear Watchdog in Idle Hook */
|
||||
|
||||
#define WATCHDOG WTC_IN_TASK /* Clear Watchdog in vWatchdogTask() */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog period defines
|
||||
*/
|
||||
#define WTC_PER_2_9 0 /* The watchdog period is 2^9/CLKWT */
|
||||
#define WTC_PER_2_10 1 /* The watchdog period is 2^10/CLKWT */
|
||||
#define WTC_PER_2_11 2 /* The watchdog period is 2^11/CLKWT */
|
||||
#define WTC_PER_2_12 3 /* The watchdog period is 2^12/CLKWT */
|
||||
#define WTC_PER_2_13 4 /* The watchdog period is 2^13/CLKWT */
|
||||
#define WTC_PER_2_14 5 /* The watchdog period is 2^14/CLKWT */
|
||||
#define WTC_PER_2_15 6 /* The watchdog period is 2^15/CLKWT */
|
||||
#define WTC_PER_2_16 7 /* The watchdog period is 2^16/CLKWT */
|
||||
#define WTC_PER_2_17 8 /* The watchdog period is 2^17/CLKWT */
|
||||
#define WTC_PER_2_18 9 /* The watchdog period is 2^18/CLKWT */
|
||||
#define WTC_PER_2_19 10 /* The watchdog period is 2^19/CLKWT */
|
||||
#define WTC_PER_2_20 11 /* The watchdog period is 2^20/CLKWT */
|
||||
#define WTC_PER_2_21 12 /* The watchdog period is 2^21/CLKWT */
|
||||
#define WTC_PER_2_22 13 /* The watchdog period is 2^22/CLKWT */
|
||||
#define WTC_PER_2_23 14 /* The watchdog period is 2^23/CLKWT */
|
||||
#define WTC_PER_2_24 15 /* The watchdog period is 2^24/CLKWT */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog Clock source defines
|
||||
*/
|
||||
#define WTC_CLKRC0 0 /* The watchdog clock is CLKRC */
|
||||
#define WTC_CLKRC1 1 /* The watchdog clock is CLKRC,
|
||||
changing RC clock while watchdog opeation causes reset */
|
||||
#define WTC_CLKMC 2 /* The watchdog clock is CLKMC */
|
||||
#define WTC_CLKSC 3 /* The watchdog clock is CLKSC */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog Reset at transition to Stop mode defines
|
||||
*/
|
||||
#define WTC_RSTP_0 0 /* No watchdog reset at transition to Stop mode */
|
||||
#define WTC_RSTP_1 1 /* watchdog reset at transition to Stop mode */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* After every WTC_CLR_PER ticks the watchdog would be cleared in the prvWatchdogTask().
|
||||
* This period needs to be chosed in accordance with the current CLKWT and the above
|
||||
* setting WTC_PER_2_XX.
|
||||
*/
|
||||
#define WTC_CLR_PER 100 /* The watchdog clear period in RTOS ticks */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Kick_watchdog Macro to clear watchdog
|
||||
*/
|
||||
#define Kick_Watchdog() \
|
||||
{ WDTCP = 0x00; \
|
||||
}
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog function declarations
|
||||
*/
|
||||
void InitWatchdog (void);
|
||||
void vStartWatchdogTask(unsigned portBASE_TYPE uxPriority);
|
||||
|
@ -1,386 +0,0 @@
|
||||
$CPUSERIES-907
|
||||
$Prj-Config_1
|
||||
$0
|
||||
-g
|
||||
-w 3
|
||||
-INF LIST
|
||||
-D __CONFIG__=1
|
||||
-I ".\Src"
|
||||
-I ".\Src\config"
|
||||
-I ".\Src\watchdog"
|
||||
-I "..\..\Common\include"
|
||||
-I "..\..\..\Source\include"
|
||||
-I "..\..\..\Source\portable\Softune\MB96340"
|
||||
-O 4
|
||||
-K SPEED
|
||||
-model MEDIUM
|
||||
-B
|
||||
-Xdof
|
||||
-xauto 127
|
||||
-x vTaskSwitchContext,vTaskIncrementTick
|
||||
-K EOPT
|
||||
-K LIB
|
||||
-K UNROLL
|
||||
$other
|
||||
-INF srcin
|
||||
-D __96340
|
||||
$time
|
||||
1202809404
|
||||
$end
|
||||
$1
|
||||
-g
|
||||
-w 2
|
||||
-D __CONFIG__=1
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\os"
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\port"
|
||||
-linf ON
|
||||
-lsrc ON
|
||||
-lsec ON
|
||||
-lcros OFF
|
||||
-linc ON
|
||||
-lexp OBJ
|
||||
-pl 60
|
||||
-pw 100
|
||||
-tab 8
|
||||
-lf
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396895
|
||||
$end
|
||||
$2
|
||||
-g
|
||||
-AL 2
|
||||
-ra _INRAM01=0x000180/0x00037F
|
||||
-ra _INRAM02=0x002240/0x007FFF
|
||||
-ro _INROM03=0xF80000/0xFFFFFF
|
||||
-ro _INROM01=0xDE0000/0xDE7FFF
|
||||
-ro _INROM02=0xDF0000/0xDF7FFF
|
||||
-sc CONST/Data/BYTE=0xFF8000
|
||||
-check_rora
|
||||
-check_locate
|
||||
-rg 0
|
||||
-m
|
||||
-pl 60
|
||||
-pw 132
|
||||
-Xals
|
||||
-Xalr
|
||||
-na
|
||||
-w 2
|
||||
-Xdof
|
||||
$other
|
||||
-Xset_rora
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$3
|
||||
-dt s,d,r,a
|
||||
-pl 60
|
||||
-pw 132
|
||||
-g
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$4
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200395885
|
||||
$end
|
||||
$5
|
||||
$other
|
||||
$time
|
||||
1200395885
|
||||
$end
|
||||
$Prjend
|
||||
$Prj-Config_2
|
||||
$0
|
||||
-g
|
||||
-w 3
|
||||
-INF LIST
|
||||
-D __CONFIG__=2
|
||||
-I ".\Src"
|
||||
-I ".\Src\config"
|
||||
-I ".\Src\watchdog"
|
||||
-I "..\..\Common\include"
|
||||
-I "..\..\..\Source\include"
|
||||
-I "..\..\..\Source\portable\Softune\MB96340"
|
||||
-O 4
|
||||
-K SPEED
|
||||
-model MEDIUM
|
||||
-B
|
||||
-Xdof
|
||||
-xauto 127
|
||||
-x vTaskSwitchContext,vTaskIncrementTick
|
||||
-K EOPT
|
||||
-K LIB
|
||||
-K UNROLL
|
||||
$other
|
||||
-INF srcin
|
||||
-D __96340
|
||||
$time
|
||||
1202809404
|
||||
$end
|
||||
$1
|
||||
-g
|
||||
-w 2
|
||||
-D __CONFIG__=2
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\os"
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\port"
|
||||
-linf ON
|
||||
-lsrc ON
|
||||
-lsec ON
|
||||
-lcros OFF
|
||||
-linc ON
|
||||
-lexp OBJ
|
||||
-pl 60
|
||||
-pw 100
|
||||
-tab 8
|
||||
-lf
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396910
|
||||
$end
|
||||
$2
|
||||
-g
|
||||
-AL 2
|
||||
-ra _INRAM01=0x000180/0x00037F
|
||||
-ra _INRAM02=0x002240/0x007FFF
|
||||
-ro _INROM03=0xF80000/0xFFFFFF
|
||||
-ro _INROM01=0xDE0000/0xDE7FFF
|
||||
-ro _INROM02=0xDF0000/0xDF7FFF
|
||||
-sc CONST/Data/BYTE=0xFF8000
|
||||
-check_rora
|
||||
-check_locate
|
||||
-rg 0
|
||||
-m
|
||||
-pl 60
|
||||
-pw 132
|
||||
-Xals
|
||||
-Xalr
|
||||
-na
|
||||
-w 2
|
||||
-Xdof
|
||||
$other
|
||||
-Xset_rora
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$3
|
||||
-dt s,d,r,a
|
||||
-pl 60
|
||||
-pw 132
|
||||
-g
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$4
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$5
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$Prjend
|
||||
$Prj-Config_3
|
||||
$0
|
||||
-g
|
||||
-w 3
|
||||
-INF LIST
|
||||
-D __CONFIG__=3
|
||||
-I ".\Src"
|
||||
-I ".\Src\config"
|
||||
-I ".\Src\watchdog"
|
||||
-I "..\..\Common\include"
|
||||
-I "..\..\..\Source\include"
|
||||
-I "..\..\..\Source\portable\Softune\MB96340"
|
||||
-O 4
|
||||
-K SPEED
|
||||
-model MEDIUM
|
||||
-B
|
||||
-Xdof
|
||||
-xauto 127
|
||||
-x vTaskSwitchContext,vTaskIncrementTick
|
||||
-K EOPT
|
||||
-K LIB
|
||||
-K UNROLL
|
||||
$other
|
||||
-INF srcin
|
||||
-D __96340
|
||||
$time
|
||||
1202809404
|
||||
$end
|
||||
$1
|
||||
-g
|
||||
-w 2
|
||||
-D __CONFIG__=3
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\os"
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\port"
|
||||
-linf ON
|
||||
-lsrc ON
|
||||
-lsec ON
|
||||
-lcros OFF
|
||||
-linc ON
|
||||
-lexp OBJ
|
||||
-pl 60
|
||||
-pw 100
|
||||
-tab 8
|
||||
-lf
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396949
|
||||
$end
|
||||
$2
|
||||
-g
|
||||
-AL 2
|
||||
-ra _INRAM01=0x000180/0x00037F
|
||||
-ra _INRAM02=0x002240/0x007FFF
|
||||
-ro _INROM03=0xF80000/0xFFFFFF
|
||||
-ro _INROM01=0xDE0000/0xDE7FFF
|
||||
-ro _INROM02=0xDF0000/0xDF7FFF
|
||||
-sc CONST/Data/BYTE=0xFF8000
|
||||
-check_rora
|
||||
-check_locate
|
||||
-rg 0
|
||||
-m
|
||||
-pl 60
|
||||
-pw 132
|
||||
-Xals
|
||||
-Xalr
|
||||
-na
|
||||
-w 2
|
||||
-Xdof
|
||||
$other
|
||||
-Xset_rora
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$3
|
||||
-dt s,d,r,a
|
||||
-pl 60
|
||||
-pw 132
|
||||
-g
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$4
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$5
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$Prjend
|
||||
$Prj-Config_4
|
||||
$0
|
||||
-g
|
||||
-w 3
|
||||
-INF LIST
|
||||
-D __CONFIG__=4
|
||||
-I ".\Src"
|
||||
-I ".\Src\config"
|
||||
-I ".\Src\watchdog"
|
||||
-I "..\..\Common\include"
|
||||
-I "..\..\..\Source\include"
|
||||
-I "..\..\..\Source\portable\Softune\MB96340"
|
||||
-O 4
|
||||
-K SPEED
|
||||
-model MEDIUM
|
||||
-B
|
||||
-Xdof
|
||||
-xauto 127
|
||||
-x vTaskSwitchContext,vTaskIncrementTick
|
||||
-K EOPT
|
||||
-K LIB
|
||||
-K UNROLL
|
||||
$other
|
||||
-INF srcin
|
||||
-D __96340
|
||||
$time
|
||||
1202809404
|
||||
$end
|
||||
$1
|
||||
-g
|
||||
-w 2
|
||||
-D __CONFIG__=4
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\os"
|
||||
-I "C:\Fujitsu\FreeRTOS\FreeRTOS Port 16FX\96340_FreeRTOS_96348hs-v17\96340_FreeRTOS_96348hs-v17\Src\port"
|
||||
-linf ON
|
||||
-lsrc ON
|
||||
-lsec ON
|
||||
-lcros OFF
|
||||
-linc ON
|
||||
-lexp OBJ
|
||||
-pl 60
|
||||
-pw 100
|
||||
-tab 8
|
||||
-lf
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396961
|
||||
$end
|
||||
$2
|
||||
-g
|
||||
-AL 2
|
||||
-ra _INRAM01=0x000180/0x00037F
|
||||
-ra _INRAM02=0x002240/0x007FFF
|
||||
-ro _INROM03=0xF80000/0xFFFFFF
|
||||
-ro _INROM01=0xDE0000/0xDE7FFF
|
||||
-ro _INROM02=0xDF0000/0xDF7FFF
|
||||
-sc CONST/Data/BYTE=0xFF8000
|
||||
-check_rora
|
||||
-check_locate
|
||||
-rg 0
|
||||
-m
|
||||
-pl 60
|
||||
-pw 132
|
||||
-Xals
|
||||
-Xalr
|
||||
-na
|
||||
-w 2
|
||||
-Xdof
|
||||
$other
|
||||
-Xset_rora
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$3
|
||||
-dt s,d,r,a
|
||||
-pl 60
|
||||
-pw 132
|
||||
-g
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1201865507
|
||||
$end
|
||||
$4
|
||||
-Xdof
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$5
|
||||
$other
|
||||
$time
|
||||
1200396397
|
||||
$end
|
||||
$Prjend
|
||||
$CPUSERIESEND
|
@ -1,133 +0,0 @@
|
||||
==========================================================================
|
||||
Template Project for MB96348HS Series
|
||||
==========================================================================
|
||||
Fujitsu Microelectronics Europe GmbH
|
||||
|
||||
The following software is for demonstration purposes only. It is not
|
||||
fully tested, nor validated in order to fullfill its task under all
|
||||
circumstances. Therefore, this software or any part of it must only be
|
||||
used in an evaluation laboratory environment.
|
||||
This software is subject to the rules of our standard DISCLAIMER, that is
|
||||
delivered with our SW-tools on the Fujitsu Microcontrollers DVD
|
||||
(V5.0 or higher "\START.HTM").
|
||||
==========================================================================
|
||||
|
||||
History
|
||||
Date Ver Author Softune Description
|
||||
2007-10-29 1.0 MPi V30L33R11 original version
|
||||
2007-11-02 1.1 MPi V30L33R11 Added the watchdog functionality
|
||||
Used vTaskStartScheduler() instead
|
||||
of xPortStartScheduler()
|
||||
2007-11-12 1.2 MPi V30L33R11 Updated FreeRTOS 4.6.1 and tested
|
||||
2007-11-23 1.3 MPi V30L33R11 Seperated watchdog functionality in watchdog.c
|
||||
and watchdog.h
|
||||
2008-01-03 1.4 MPi V30L33R11 Added portYIELDFromISR() and now all the
|
||||
demo application functions are working.
|
||||
2008-01-04 1.5 MPi V30L33R11 Updated FreeRTOS 4.7.0 and tested
|
||||
2008-01-10 1.6 MPi V30L33R11 Replaced INT9 with INT #122 in macro portYIELD()
|
||||
2008-01-15 1.7 MPi V30L33R11 Integrated SVN releases 1.5 and 1.6.
|
||||
==========================================================================
|
||||
1.0.
|
||||
This is a project is to test the FreeRTOS port for 16FX and the demo application
|
||||
which runs on FLASH-CAN-100P-240.
|
||||
|
||||
This FreeRTOS port uses the Task Stack pointed by User Stack pointer (USB:USP) for
|
||||
tasks and the system stack pointed by System Stack pointer (SSB:SSP) for everything
|
||||
else.
|
||||
|
||||
This port is tested with MEDIUM and LARGE memory model and seems to be working fine.
|
||||
The define MEMMODEL has to be configured in order to use the corresponding memory
|
||||
model.
|
||||
|
||||
This port doesnt use any register banking and always uses bank 0. It also consider that
|
||||
the parameters to the tasks is passed via stack and not via registers.
|
||||
|
||||
In this port the implemetation of portENTER_CRITICAL() and portEXIT_CRITICAL() macros
|
||||
is changed in order to make them more efficient. Now usCriticalNesting variable is not
|
||||
used to keep track of global interrupt enable. Rather the current PS is stored on to
|
||||
the stack and interrupts are disabled for portENTER_CRITICAL(). And for portEXIT_CRITICAL()
|
||||
simply the PS is restored from stack.
|
||||
|
||||
1.1.
|
||||
In this port, the functionality is added to initialize and clear the watchdog in the
|
||||
dedicated task, Tick Hook or the Idle Hook. The place exactly where the wtachdog can be
|
||||
cleared can be configured. Though Idle Hook is not an approproiate place to clear the
|
||||
watchdog, its done here for demonstration purpose only.
|
||||
|
||||
Also from Main function vTaskStartScheduler() function is called instead of xPortStartScheduler().
|
||||
After doing this change now no more IDLE task is required to be added seperately as
|
||||
vTaskStartScheduler() adds prvIdleTask() on its own.
|
||||
|
||||
1.2.
|
||||
Updated the FreeRTOS version to 4.6.1 and tested with the same.
|
||||
|
||||
1.3.
|
||||
Moved the watchdog functionality to watchdog.c and watchdog.h.
|
||||
|
||||
1.4.
|
||||
Added portYIELDFromISR() which uses delayed interrupt. This macro needs to be used from the
|
||||
application ISRs in order to force a context switch from them if required. It should be noted
|
||||
that the interrupt priority of such application ISRs MUST be always higher than the dealyed
|
||||
interrupt (currently 23) in order to perform the context switch correctly.
|
||||
|
||||
It should be also noted that the RLT0 and Delayed Interrupt priority MUST be always same in order
|
||||
to assure correct working of this port.
|
||||
|
||||
Now portYIELD() used software interrupt INT9 instead of delayed interrupt.
|
||||
|
||||
Now all the queue functions works ok.
|
||||
|
||||
Tested with the heap_1.c, heap_2.c and heap_3.c.
|
||||
|
||||
At one time, either of heap_1.c or heap_2.c or heap_3.c needs to be used. Hence the files those are not
|
||||
required to be used should be removed from the target of the build.
|
||||
|
||||
Added the __STD_LIB_sbrk.c file in order to define the *sbrk() function. This is required while using
|
||||
heap_3.c file which uses the dynamic memory allocation.
|
||||
|
||||
Made changes to the demo application files crhook.c. Please refer the file and grep for "Added by MPi"
|
||||
to find the changes. It should be noted that if INCLUDE_StartHookCoRoutines is defined as 0 (i.e. if
|
||||
vStartHookCoRoutines() functionality is NOT required) then crhook.c file should be removed from target
|
||||
build and uncomment the vApplicationTickHook() function from main.c should be uncommnented.
|
||||
|
||||
Added taskutility.c file. This file contains vUART2Task() which calls vTaskList() and vTaskStartTrace()
|
||||
functions.
|
||||
|
||||
If vCreateBlockTimeTasks() is not called then the LED at PDR00_P7 blinks at normal rate (3s).
|
||||
|
||||
This port is tested with MEDIUM and LARGE memory model and working fine.
|
||||
|
||||
configMINIMAL_STACK_SIZE value changed to 172 from 70 in order to make the port work.
|
||||
|
||||
1.5.
|
||||
Updated the FreeRTOS version to 4.7.0 and tested with the same. Tested for pre-emptive as well as
|
||||
co-operative approach.
|
||||
|
||||
1.6.
|
||||
portYIELD() macro now uses INT #122 instead of INT9.
|
||||
|
||||
Optimized functions vParTestToggleLED() and vParTestSetLED() in main.c.
|
||||
|
||||
Now watchdog uses 2^23 as clock prescaler instead of 2^24. Also updated the WTC_CLR_PER in watchdog.h.
|
||||
|
||||
1.7.
|
||||
It should be noted that the readme, appnote and SVN tag version numbers may be different for the same release.
|
||||
|
||||
This readme is specific to project FreeRTOS_96348hs_FLASHCAN100P340. And this project specifically works
|
||||
on board FLASH-CAN-100P-240 V1.0 along with MB2198-01 emulator+Softune Workbench.
|
||||
|
||||
Created 4 different configuration Config_1 to Config_4. Each config includes certain demo application function.
|
||||
More details specific to each configuration can be found in the appnote.
|
||||
|
||||
Used relative path to include files instead of absolute.
|
||||
|
||||
Created config, MemMang, serial and utility subdirectories and moved corresponding functionlaity there.
|
||||
|
||||
Updated config.h, main.c and start.asm in order to have configuration specific build.
|
||||
|
||||
Clock settings:
|
||||
---------------
|
||||
Crystal: 4 MHz
|
||||
CLKB: 56 MHz
|
||||
CLKP1: 56 MHz
|
||||
CLKP2: 56 MHz
|
Loading…
Reference in New Issue