Reverse order of projdefs.h and FreeRTOSConfig.h includes in FreeRTOS.h to allow addition of pdMS_TO_TICKS() macro.

Update RXv2 GCC port to match RXv2 Renesas port.
pull/1/head
Richard Barry 11 years ago
parent 5cd0b1e5ef
commit 1130a53ec8

@ -90,12 +90,12 @@
extern "C" {
#endif
/* Basic FreeRTOS definitions. */
#include "projdefs.h"
/* Application specific configuration options. */
#include "FreeRTOSConfig.h"
/* Basic FreeRTOS definitions. */
#include "projdefs.h"
/* configUSE_PORT_OPTIMISED_TASK_SELECTION must be defined before portable.h
is included as it is used by the port layer. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION

@ -72,6 +72,9 @@
*/
typedef void (*TaskFunction_t)( void * );
/* Converts a time in miliseconds to a time in ticks. */
#define pdMS_TO_TICKS( xTimeInMs ) ( ( ( TickType_t ) xTimeInMs * configTICK_RATE_HZ ) / ( TickType_t ) 1000 )
#define pdFALSE ( ( BaseType_t ) 0 )
#define pdTRUE ( ( BaseType_t ) 1 )

@ -74,9 +74,6 @@
/* Library includes. */
#include "string.h"
/* Hardware specifics. */
#include "iodefine.h"
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
@ -89,8 +86,8 @@ xTaskIncrementTick(), which is only ever called from interrupts at the kernel
priority - ie a known priority. Therefore these local macros are a slight
optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
which would require the old IPL to be read first and stored in a local variable. */
#define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
#define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
#define portMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
#define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
/*-----------------------------------------------------------*/
@ -176,9 +173,17 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
*pxTopOfStack = 0x11111111; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x22222222; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x33333333; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x44444444; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
*pxTopOfStack = 0x55555555; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x66666666; /* Accumulator 1. */
return pxTopOfStack;
}
@ -242,11 +247,27 @@ static void prvStartFirstTask( void )
"POP R15 \n" \
/* Accumulator low 32 bits. */
"MVTACLO R15 \n" \
"MVTACLO R15, A0 \n" \
"POP R15 \n" \
/* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n" \
"POP R15 \n" \
/* Accumulator high 32 bits. */
"MVTACHI R15 \n" \
/* Accumulator guard. */
"MVTACGU R15, A0 \n" \
"POP R15 \n" \
/* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n" \
"POP R15 \n" \
/* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n" \
"POP R15 \n" \
/* Accumulator guard. */
"MVTACGU R15, A1 \n" \
"POP R15 \n" \
/* Floating point status word. */
@ -300,14 +321,19 @@ void vSoftwareInterruptISR( void )
/* Save the FPSW and accumulator. */
"MVFC FPSW, R15 \n" \
"PUSH.L R15 \n" \
"MVFACHI R15 \n" \
"MVFACGU #0, A1, R15 \n" \
"PUSH.L R15 \n" \
/* Middle word. */
"MVFACMI R15 \n" \
/* Shifted left as it is restored to the low order word. */
"SHLL #16, R15 \n" \
"MVFACHI #0, A1, R15 \n" \
"PUSH.L R15 \n" \
/* Low order word. */
"MVFACLO #0, A1, R15 \n" \
"PUSH.L R15 \n" \
"MVFACGU #0, A0, R15 \n" \
"PUSH.L R15 \n" \
"MVFACHI #0, A0, R15 \n" \
"PUSH.L R15 \n" \
/* Low order word. */
"MVFACLO #0, A0, R15 \n" \
"PUSH.L R15 \n" \
/* Save the stack pointer to the TCB. */
@ -333,10 +359,30 @@ void vSoftwareInterruptISR( void )
/* Restore the context of the new task. The PSW (Program Status Word) and
PC will be popped by the RTE instruction. */
"POP R15 \n" \
"MVTACLO R15 \n" \
"POP R15 \n" \
"MVTACHI R15 \n" \
"POP R15 \n" \
/* Accumulator low 32 bits. */
"MVTACLO R15, A0 \n" \
"POP R15 \n" \
/* Accumulator high 32 bits. */
"MVTACHI R15, A0 \n" \
"POP R15 \n" \
/* Accumulator guard. */
"MVTACGU R15, A0 \n" \
"POP R15 \n" \
/* Accumulator low 32 bits. */
"MVTACLO R15, A1 \n" \
"POP R15 \n" \
/* Accumulator high 32 bits. */
"MVTACHI R15, A1 \n" \
"POP R15 \n" \
/* Accumulator guard. */
"MVTACGU R15, A1 \n" \
"POP R15 \n" \
"MVTC R15, FPSW \n" \
"POPM R1-R15 \n" \
@ -355,14 +401,14 @@ void vTickISR( void )
/* Increment the tick, and perform any processing the new tick value
necessitates. Ensure IPL is at the max syscall value first. */
portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
portMASK_INTERRUPTS_FROM_KERNEL_ISR();
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
}
/*-----------------------------------------------------------*/

@ -74,11 +74,7 @@
/* Library includes. */
#include "string.h"
/* Hardware specifics. */
#include "r_cg_iodefine.h"
/*-----------------------------------------------------------*/
#define USE_FULL_REGISTER_INITIALISATION
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
PSW is set with U and I set, and PM and IPL clear. */
@ -324,7 +320,7 @@ static void prvYieldHandler( void )
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14
/* Save the FPSW and accumulator. */
/* Save the FPSW and accumulators. */
MVFC FPSW, R15
PUSH.L R15
MVFACGU #0, A1, R15

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